/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>

#include "mt7628an.dtsi"

/ {
	compatible = "wavlink,wl-wn570ha1", "mediatek,mt7628an-soc";
	model = "Wavlink WL-WN570HA1";

	chosen {
		bootargs = "console=ttyS0,57600";
	};

	keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};
	};

	leds {
		compatible = "gpio-leds";

		power {
			label = "wl-wn570ha1:green:power";
			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
			default-state = "keep";
		};

		wan {
			label = "wl-wn570ha1:green:wan";
			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
		};

		wifi-high {
			label = "wl-wn570ha1:green:wifi-high";
			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
		};

		wifi-med {
			label = "wl-wn570ha1:green:wifi-med";
			gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
		};

		wifi-low {
			label = "wl-wn570ha1:green:wifi-low";
			gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
		};

		wifi {
			label = "wl-wn570ha1:green:wifi";
			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
		};
	};
};

&state_default {
	gpio {
		ralink,group = "i2c", "wled_an", "p0led_an", "wdt", "refclk";
		ralink,function = "gpio";
	};
};

&pcie {
	status = "okay";
};

&pcie0 {
	wifi@0,0 {
		reg = <0x0000 0 0 0 0>;
		mediatek,mtd-eeprom = <&factory 0x8000>;
		ieee80211-freq-limit = <5000000 6000000>;
	};
};

&spi0 {
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <10000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x0 0x30000>;
				read-only;
			};

			partition@30000 {
				label = "u-boot-env";
				reg = <0x30000 0x10000>;
				read-only;
			};

			factory: partition@40000 {
				label = "factory";
				reg = <0x40000 0x10000>;
				read-only;
			};

			partition@50000 {
				compatible = "denx,uimage";
				label = "firmware";
				reg = <0x50000 0x7b0000>;
			};
		};
	};
};

&wmac {
	status = "okay";
};

&ethernet {
	mtd-mac-address = <&factory 0x2e>;
	mediatek,portmap = "llllw";
};
