Support Orange Pi 5 Max
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This commit is contained in:
baiywt
parent
199d742832
commit
c204842a5b
80
configs/orangepi-5-max-rk3588_defconfig
Normal file
80
configs/orangepi-5-max-rk3588_defconfig
Normal file
@ -0,0 +1,80 @@
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CONFIG_TARGET_rockchip=y
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CONFIG_TARGET_rockchip_armv8=y
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CONFIG_TARGET_rockchip_armv8_DEVICE_xunlong_orangepi-5-max=y
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CONFIG_TARGET_KERNEL_PARTSIZE=64
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CONFIG_TARGET_ROOTFS_PARTSIZE=400
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# CONFIG_PACKAGE_dnsmasq is not set
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CONFIG_PACKAGE_dnsmasq-full=y
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CONFIG_PACKAGE_iperf3=y
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CONFIG_PACKAGE_docker=y
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CONFIG_PACKAGE_dockerd=y
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CONFIG_PACKAGE_rsync=y
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CONFIG_PACKAGE_rsyncd=y
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CONFIG_PACKAGE_openssh-sftp-server=y
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CONFIG_PACKAGE_iptables-mod-conntrack-extra=y
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CONFIG_PACKAGE_iptables-mod-ipopt=y
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CONFIG_PACKAGE_iptables-mod-tproxy=y
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CONFIG_PACKAGE_zerotier=y
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CONFIG_PACKAGE_wpa-supplicant=y
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CONFIG_PACKAGE_uhttpd=y
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CONFIG_PACKAGE_uhttpd-mod-ubus=y
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CONFIG_PACKAGE_hostapd=y
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CONFIG_PACKAGE_ifstat=y
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CONFIG_PACKAGE_iftop=y
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CONFIG_PACKAGE_ipset=y
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CONFIG_PACKAGE_netperf=y
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CONFIG_PACKAGE_squid=y
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CONFIG_PACKAGE_tcpdump=y
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CONFIG_PACKAGE_speedtest-netperf=y
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CONFIG_PACKAGE_htop=y
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CONFIG_PACKAGE_libusb-1.0=y
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CONFIG_PACKAGE_blkid=y
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CONFIG_LUCI_LANG_zh_Hans=y
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CONFIG_PACKAGE_luci-app-dockerman=y
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CONFIG_PACKAGE_luci-app-ttyd=y
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CONFIG_PACKAGE_luci-app-samba4=y
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CONFIG_PACKAGE_luci-app-statistics=y
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CONFIG_PACKAGE_luci-app-transmission=y
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CONFIG_PACKAGE_luci-app-commands=y
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CONFIG_PACKAGE_luci-app-vnstat2=y
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# CONFIG_PACKAGE_luci-theme-argon is not set
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CONFIG_PACKAGE_luci-app-aria2=y
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CONFIG_PACKAGE_luci-app-ddns=y
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CONFIG_PACKAGE_luci-app-watchcat=y
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CONFIG_PACKAGE_luci-app-adblock=y
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CONFIG_PACKAGE_luci-app-nlbwmon=y
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CONFIG_PACKAGE_luci-app-ntpc=y
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CONFIG_PACKAGE_luci-app-mwan3=y
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CONFIG_PACKAGE_luci-app-qos=y
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CONFIG_PACKAGE_luci-app-unbound=y
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CONFIG_PACKAGE_kmod-mt76x0u=y
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CONFIG_PACKAGE_kmod-mt7601u=y
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CONFIG_PACKAGE_kmod-mt76x2u=y
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CONFIG_PACKAGE_kmod-rtl8812au-ct=y
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CONFIG_PACKAGE_kmod-rtl8821ae=y
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CONFIG_PACKAGE_kmod-rtl8xxxu=y
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CONFIG_PACKAGE_kmod-ipt-nat6=y
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CONFIG_PACKAGE_kmod-nf-nat6=y
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CONFIG_PACKAGE_kmod-usb-serial-option=y
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CONFIG_PACKAGE_mt7601u-firmware=y
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CONFIG_PACKAGE_rtl8188eu-firmware=y
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CONFIG_PACKAGE_rtl8723au-firmware=y
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CONFIG_PACKAGE_rtl8723bu-firmware=y
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CONFIG_PACKAGE_rtl8821ae-firmware=y
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CONFIG_PACKAGE_iw=y
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CONFIG_PACKAGE_iwinfo=y
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CONFIG_PACKAGE_kmod-mac80211=y
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CONFIG_PACKAGE_kmod-cfg80211=y
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CONFIG_PACKAGE_kmod-rtl8821cu=y
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CONFIG_PACKAGE_kmod-rtw88=y
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CONFIG_PACKAGE_rtl8723bu-firmware=y
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CONFIG_PACKAGE_rtl8723du-firmware=y
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CONFIG_PACKAGE_bcmdhd-firmware=y
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CONFIG_PACKAGE_kmod-rtl8xxxu=y
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CONFIG_PACKAGE_kmod-bcmdhd=y
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CONFIG_PACKAGE_usbutils=y
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CONFIG_PACKAGE_usb-modeswitch=y
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CONFIG_PACKAGE_iwlwifi-firmware-ax200=y
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CONFIG_PACKAGE_iwlwifi-firmware-ax210=y
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77
configs/orangepi-cm5-rk3588_defconfig
Normal file
77
configs/orangepi-cm5-rk3588_defconfig
Normal file
@ -0,0 +1,77 @@
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CONFIG_TARGET_rockchip=y
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CONFIG_TARGET_rockchip_armv8=y
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CONFIG_TARGET_rockchip_armv8_DEVICE_xunlong_orangepi-cm5=y
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CONFIG_TARGET_KERNEL_PARTSIZE=64
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CONFIG_TARGET_ROOTFS_PARTSIZE=400
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# CONFIG_PACKAGE_dnsmasq is not set
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CONFIG_PACKAGE_dnsmasq-full=y
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CONFIG_PACKAGE_iperf3=y
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CONFIG_PACKAGE_docker=y
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CONFIG_PACKAGE_dockerd=y
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CONFIG_PACKAGE_rsync=y
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CONFIG_PACKAGE_rsyncd=y
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CONFIG_PACKAGE_openssh-sftp-server=y
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CONFIG_PACKAGE_iptables-mod-conntrack-extra=y
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CONFIG_PACKAGE_iptables-mod-ipopt=y
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CONFIG_PACKAGE_iptables-mod-tproxy=y
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CONFIG_PACKAGE_zerotier=y
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CONFIG_PACKAGE_wpa-supplicant=y
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CONFIG_PACKAGE_uhttpd=y
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CONFIG_PACKAGE_uhttpd-mod-ubus=y
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CONFIG_PACKAGE_hostapd=y
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CONFIG_PACKAGE_ifstat=y
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CONFIG_PACKAGE_iftop=y
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CONFIG_PACKAGE_ipset=y
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CONFIG_PACKAGE_netperf=y
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CONFIG_PACKAGE_squid=y
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CONFIG_PACKAGE_tcpdump=y
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CONFIG_PACKAGE_speedtest-netperf=y
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CONFIG_PACKAGE_htop=y
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CONFIG_PACKAGE_libusb-1.0=y
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CONFIG_PACKAGE_blkid=y
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CONFIG_LUCI_LANG_zh_Hans=y
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CONFIG_PACKAGE_luci-app-dockerman=y
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CONFIG_PACKAGE_luci-app-ttyd=y
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CONFIG_PACKAGE_luci-app-samba4=y
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CONFIG_PACKAGE_luci-app-statistics=y
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CONFIG_PACKAGE_luci-app-transmission=y
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CONFIG_PACKAGE_luci-app-commands=y
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CONFIG_PACKAGE_luci-app-vnstat2=y
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# CONFIG_PACKAGE_luci-theme-argon is not set
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CONFIG_PACKAGE_luci-app-aria2=y
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CONFIG_PACKAGE_luci-app-ddns=y
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CONFIG_PACKAGE_luci-app-watchcat=y
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CONFIG_PACKAGE_luci-app-adblock=y
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CONFIG_PACKAGE_luci-app-nlbwmon=y
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CONFIG_PACKAGE_luci-app-ntpc=y
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CONFIG_PACKAGE_luci-app-mwan3=y
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CONFIG_PACKAGE_luci-app-qos=y
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CONFIG_PACKAGE_luci-app-unbound=y
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CONFIG_PACKAGE_kmod-mt76x0u=y
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CONFIG_PACKAGE_kmod-mt7601u=y
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CONFIG_PACKAGE_kmod-mt76x2u=y
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CONFIG_PACKAGE_kmod-rtl8812au-ct=y
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CONFIG_PACKAGE_kmod-rtl8821ae=y
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CONFIG_PACKAGE_kmod-rtl8xxxu=y
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CONFIG_PACKAGE_kmod-ipt-nat6=y
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CONFIG_PACKAGE_kmod-nf-nat6=y
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CONFIG_PACKAGE_kmod-usb-serial-option=y
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CONFIG_PACKAGE_mt7601u-firmware=y
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CONFIG_PACKAGE_rtl8188eu-firmware=y
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CONFIG_PACKAGE_rtl8723au-firmware=y
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CONFIG_PACKAGE_rtl8723bu-firmware=y
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CONFIG_PACKAGE_rtl8821ae-firmware=y
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CONFIG_PACKAGE_iw=y
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CONFIG_PACKAGE_iwinfo=y
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CONFIG_PACKAGE_kmod-mac80211=y
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CONFIG_PACKAGE_kmod-cfg80211=y
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CONFIG_PACKAGE_kmod-rtl8821cu=y
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CONFIG_PACKAGE_kmod-rtw88=y
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CONFIG_PACKAGE_rtl8723bu-firmware=y
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CONFIG_PACKAGE_rtl8723du-firmware=y
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CONFIG_PACKAGE_kmod-rtl8xxxu=y
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CONFIG_PACKAGE_usbutils=y
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CONFIG_PACKAGE_usb-modeswitch=y
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CONFIG_PACKAGE_iwlwifi-firmware-ax200=y
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CONFIG_PACKAGE_iwlwifi-firmware-ax210=y
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@ -1,5 +1,6 @@
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LINUX_VERSION-5.10 = .110
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#LINUX_KERNEL_HASH-5.10.110 = c5c3221aa1a8a8de0fdc889cdbc9091e9a970e2199cbcfaf6cd84888a76caff8
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KERNEL_GIT_CLONE_URI = https://github.com/orangepi-xunlong/linux-orangepi
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KERNEL_GIT_REF = 815104dbe6b6b10c5aed20bbf983f36923188409
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#KERNEL_GIT_REF = 815104dbe6b6b10c5aed20bbf983f36923188409
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KERNEL_GIT_REF = 1f0b65cc7772b30ecf15d75fa3beaa79a39bde22
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KERNEL_GIT_OPT = --depth 1 -b orange-pi-5.10-rk3588-openwrt-v4
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@ -7,9 +7,9 @@ include $(INCLUDE_DIR)/kernel.mk
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PKG_SOURCE_PROTO:=git
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PKG_SOURCE_URL=https://github.com/orangepi-xunlong/u-boot-orangepi
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PKG_SOURCE_DATE:=2017-09
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PKG_SOURCE_VERSION:=d7c6b92f9e33283bea56dbaec7743f5ecb5a7f89
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PKG_MIRROR_HASH:=9c0d83c1a01a48173e47f63f7cb292347f0cebf4f0396d98616e0bfd5ce6f3fc
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PKG_SOURCE_DATE:=2017-09-rk3588
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PKG_SOURCE_VERSION:=260ed1ba444bb0c1a96491e9c54219ce39fea01d
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PKG_MIRROR_HASH:=df7997de57ebefc70d348e5eb715bcb69cd33172fbf33c526dd4c92ef7968c68
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include $(INCLUDE_DIR)/u-boot.mk
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include $(INCLUDE_DIR)/package.mk
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@ -35,6 +35,34 @@ define U-Boot/orangepi-5-rk3588
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#OF_PLATDATA:=$(1)
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endef
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define U-Boot/orangepi-cm5-rk3588
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#PKG_VERSION:=2023.04
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#PKG_RELEASE:=$(AUTORELEASE)
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#PKG_HASH:=e31cac91545ff41b71cec5d8c22afd695645cd6e2a442ccdacacd60534069341
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BUILD_SUBTARGET:=armv8
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NAME:=Orange Pi CM 5
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BUILD_DEVICES:= \
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xunlong_orangepi-cm5
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DEPENDS:=+PACKAGE_u-boot-orangepi-cm5-rk3588:arm-trusted-firmware-rk3588
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#:arm-trusted-firmware-rk3588
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PKG_BUILD_DEPENDS:=arm-trusted-firmware-rk3588
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ATF:=rk3588_bl31_v1.44.elf
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TPL=rk3588_ddr_lp4_2112MHz_lp5_2736MHz_v1.15.bin
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#OF_PLATDATA:=$(1)
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endef
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define U-Boot/orangepi-5-max-rk3588
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BUILD_SUBTARGET:=armv8
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NAME:=Orange Pi 5 Max
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BUILD_DEVICES:= \
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xunlong_orangepi-5-max
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DEPENDS:=+PACKAGE_u-boot-orangepi-5-max-rk3588:arm-trusted-firmware-rk3588
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PKG_BUILD_DEPENDS:=arm-trusted-firmware-rk3588
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ATF:=rk3588_bl31_v1.44.elf
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TPL=rk3588_ddr_lp4_2112MHz_lp5_2736MHz_v1.15.bin
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#OF_PLATDATA:=$(1)
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endef
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define U-Boot/orangepi-5-rk3588-spi
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BUILD_SUBTARGET:=armv8
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NAME:=Orange Pi 5 for Spi Boot
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@ -73,6 +101,8 @@ endef
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|
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UBOOT_TARGETS := \
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orangepi-5-rk3588 \
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orangepi-5-max-rk3588 \
|
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orangepi-cm5-rk3588 \
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orangepi-5-rk3588-spi \
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orangepi-5-plus-rk3588 \
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orangepi-5-plus-rk3588-spi \
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@ -83,6 +113,29 @@ UBOOT_MAKE_FLAGS += \
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BL31=$(STAGING_DIR_IMAGE)/$(ATF) \
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spl/u-boot-spl.bin u-boot.dtb u-boot.itb
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|
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RKBIN_URL:=https://github.com/orangepi-xunlong/rk-rootfs-build/raw/rkbin
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define Download/rk3588-ddr
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FILE:=rk3588_ddr_lp4_2112MHz_lp5_2736MHz_v1.15.bin
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URL:=$(RKBIN_URL)/rk35/
|
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HASH:=a8385c213d7d24a51ad07ae7702845467c7c66c675354729fe42d8194deec49d
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endef
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$(eval $(call Download,rk3588-ddr))
|
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define Download/rk3588-atf
|
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FILE:=rk3588_bl31_v1.44.elf
|
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URL:=$(RKBIN_URL)/rk35/
|
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HASH:=483b4219260495c4aeea616f33b61657db8e0978aae4cdf1f3c934873f68ef0e
|
||||
endef
|
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$(eval $(call Download,rk3588-atf))
|
||||
|
||||
|
||||
define Build/Prepare
|
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$(call Build/Prepare/Default)
|
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$(CP) $(DL_DIR)/rk3588_ddr_lp4_2112MHz_lp5_2736MHz_v1.15.bin $(STAGING_DIR_IMAGE)/
|
||||
$(CP) $(DL_DIR)/rk3588_bl31_v1.44.elf $(STAGING_DIR_IMAGE)/
|
||||
endef
|
||||
|
||||
define Build/Configure
|
||||
$(call Build/Configure/U-Boot)
|
||||
|
||||
|
||||
@ -1,66 +0,0 @@
|
||||
From ea133a0b014abc21ac8919e6e370a463784b909b Mon Sep 17 00:00:00 2001
|
||||
From: baiywt <baiywt_gj@163.com>
|
||||
Date: Wed, 26 Apr 2023 18:25:06 +0800
|
||||
Subject: [PATCH 1/4] Revert "gpt: return 1 directly when test the mbr sector"
|
||||
|
||||
This reverts commit https://github.com/rockchip-linux/u-boot/commit/3bdef7e642ae558d0e61ce26438d10b55b26ec9c
|
||||
|
||||
Reason: It causes recognition errors when the partition is not gpt
|
||||
---
|
||||
disk/part_efi.c | 18 +-----------------
|
||||
1 file changed, 1 insertion(+), 17 deletions(-)
|
||||
|
||||
diff --git a/disk/part_efi.c b/disk/part_efi.c
|
||||
index 0ec1bef..2ad5f9c 100644
|
||||
--- a/disk/part_efi.c
|
||||
+++ b/disk/part_efi.c
|
||||
@@ -445,7 +445,6 @@ static int part_efi_repair(struct blk_desc *dev_desc, gpt_entry *gpt_pte,
|
||||
static int part_test_efi(struct blk_desc *dev_desc)
|
||||
{
|
||||
ALLOC_CACHE_ALIGN_BUFFER_PAD(legacy_mbr, legacymbr, 1, dev_desc->blksz);
|
||||
- int ret = 0;
|
||||
|
||||
/* Read legacy MBR from block 0 and validate it */
|
||||
if ((blk_dread(dev_desc, 0, 1, (ulong *)legacymbr) != 1)
|
||||
@@ -489,10 +488,7 @@ static int part_test_efi(struct blk_desc *dev_desc)
|
||||
if (part_efi_repair(dev_desc, b_gpt_pte, b_gpt_head,
|
||||
head_gpt_valid, backup_gpt_valid))
|
||||
printf("Primary GPT repair fail!\n");
|
||||
- } else if (head_gpt_valid == 0 && backup_gpt_valid == 0) {
|
||||
- ret = -1;
|
||||
}
|
||||
-
|
||||
free(h_gpt_pte);
|
||||
h_gpt_pte = NULL;
|
||||
free(h_gpt_head);
|
||||
@@ -503,7 +499,7 @@ static int part_test_efi(struct blk_desc *dev_desc)
|
||||
b_gpt_head = NULL;
|
||||
#endif
|
||||
#endif
|
||||
- return ret;
|
||||
+ return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -1083,18 +1079,6 @@ static int is_pmbr_valid(legacy_mbr * mbr)
|
||||
{
|
||||
int i = 0;
|
||||
|
||||
-#ifdef CONFIG_ARCH_ROCKCHIP
|
||||
- /*
|
||||
- * In sd-update card, we use RKPARM partition in bootloader to load
|
||||
- * firmware, and use MS-DOS partition in recovery to update system.
|
||||
- * Now, we want to use gpt in bootloader and abandon the RKPARM
|
||||
- * partition. So in new sd-update card, we write the MS-DOS partition
|
||||
- * table and gpt to sd card. Then we must return 1 directly when test
|
||||
- * the mbr sector otherwise the gpt is unavailable.
|
||||
- */
|
||||
- return 1;
|
||||
-#endif
|
||||
-
|
||||
if (!mbr || le16_to_cpu(mbr->signature) != MSDOS_MBR_SIGNATURE)
|
||||
return 0;
|
||||
|
||||
--
|
||||
2.25.1
|
||||
|
||||
@ -1,123 +0,0 @@
|
||||
From dba96c1ef19f889f2c2e5270bd2dfbb34ae65108 Mon Sep 17 00:00:00 2001
|
||||
From: baiywt <baiywt_gj@163.com>
|
||||
Date: Tue, 16 May 2023 19:48:21 +0800
|
||||
Subject: [PATCH] Automatically detects boot devices and enters download mode
|
||||
if needed
|
||||
|
||||
---
|
||||
arch/arm/dts/rk3588-orangepi-5-plus.dts | 1 +
|
||||
arch/arm/mach-rockchip/boot_mode.c | 2 ++
|
||||
arch/arm/mach-rockchip/boot_rkimg.c | 12 ++++++++++++
|
||||
arch/arm/mach-rockchip/param.c | 3 +++
|
||||
include/configs/rockchip-common.h | 12 ++++++++++++
|
||||
5 files changed, 30 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/dts/rk3588-orangepi-5-plus.dts b/arch/arm/dts/rk3588-orangepi-5-plus.dts
|
||||
index cccecb82ff..66725aeea2 100644
|
||||
--- a/arch/arm/dts/rk3588-orangepi-5-plus.dts
|
||||
+++ b/arch/arm/dts/rk3588-orangepi-5-plus.dts
|
||||
@@ -163,6 +163,7 @@
|
||||
|
||||
&pcie3x4 {
|
||||
u-boot,dm-pre-reloc;
|
||||
+ vpcie3v3-supply = <&vcc3v3_pcie30>;
|
||||
reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
|
||||
index 0436290a4b..8375dcc105 100644
|
||||
--- a/arch/arm/mach-rockchip/boot_mode.c
|
||||
+++ b/arch/arm/mach-rockchip/boot_mode.c
|
||||
@@ -226,6 +226,7 @@ int rockchip_get_boot_mode(void)
|
||||
int setup_boot_mode(void)
|
||||
{
|
||||
char env_preboot[256] = {0};
|
||||
+ const char *devtype_num_set = "run rkimg_bootdev_download";
|
||||
|
||||
switch (rockchip_get_boot_mode()) {
|
||||
case BOOT_MODE_BOOTLOADER:
|
||||
@@ -251,6 +252,7 @@ int setup_boot_mode(void)
|
||||
break;
|
||||
#endif
|
||||
case BOOT_MODE_LOADER:
|
||||
+ run_command_list(devtype_num_set, -1, 0);
|
||||
printf("enter Rockusb!\n");
|
||||
env_set("preboot", "setenv preboot; download");
|
||||
run_command("download", 0);
|
||||
diff --git a/arch/arm/mach-rockchip/boot_rkimg.c b/arch/arm/mach-rockchip/boot_rkimg.c
|
||||
index 72e2abceaa..7c60eb8da8 100644
|
||||
--- a/arch/arm/mach-rockchip/boot_rkimg.c
|
||||
+++ b/arch/arm/mach-rockchip/boot_rkimg.c
|
||||
@@ -50,6 +50,13 @@ __weak int rk_board_scan_bootdev(void)
|
||||
return run_command_list(devtype_num_set, -1, 0);
|
||||
}
|
||||
|
||||
+__weak int rk_board_scan_bootdev_download(void)
|
||||
+{
|
||||
+ const char *devtype_num_set = "run rkimg_bootdev_download";
|
||||
+
|
||||
+ return run_command_list(devtype_num_set, -1, 0);
|
||||
+}
|
||||
+
|
||||
static int bootdev_init(const char *devtype, const char *devnum)
|
||||
{
|
||||
#ifdef CONFIG_MMC
|
||||
@@ -110,6 +117,10 @@ static void boot_devtype_init(void)
|
||||
}
|
||||
#endif
|
||||
|
||||
+#ifdef CONFIG_NVME
|
||||
+ pci_init();
|
||||
+#endif
|
||||
+
|
||||
/* scan list */
|
||||
#ifdef CONFIG_MMC
|
||||
mmc_initialize(gd->bd);
|
||||
@@ -328,6 +339,7 @@ void setup_download_mode(void)
|
||||
vbus = rockchip_u2phy_vbus_detect();
|
||||
#endif
|
||||
if (vbus > 0) {
|
||||
+ rk_board_scan_bootdev_download();
|
||||
printf("%sentering download mode...\n",
|
||||
IS_ENABLED(CONFIG_CMD_ROCKUSB) ?
|
||||
"" : "no rockusb, ");
|
||||
diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
|
||||
index 0f4f806486..6ea654b0e6 100644
|
||||
--- a/arch/arm/mach-rockchip/param.c
|
||||
+++ b/arch/arm/mach-rockchip/param.c
|
||||
@@ -257,6 +257,9 @@ int param_parse_atags_bootdev(char **devtype, char **devnum)
|
||||
case BOOT_TYPE_MTD_BLK_SPI_NOR:
|
||||
*devtype = "mtd";
|
||||
*devnum = "2";
|
||||
+#if (defined CONFIG_NVME || defined CONFIG_SCSI)
|
||||
+ return -EINVAL;
|
||||
+#endif
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
|
||||
index 0a73268933..44de67c240 100644
|
||||
--- a/include/configs/rockchip-common.h
|
||||
+++ b/include/configs/rockchip-common.h
|
||||
@@ -183,6 +183,18 @@
|
||||
"setenv devtype spinor; setenv devnum 1;" \
|
||||
"else" \
|
||||
"setenv devtype ramdisk; setenv devnum 0;" \
|
||||
+ "fi; \0" \
|
||||
+ "rkimg_bootdev_download=" \
|
||||
+ "scsi scan;" \
|
||||
+ "nvme scan;" \
|
||||
+ "if mmc dev 1; then " \
|
||||
+ "setenv devtype mmc; setenv devnum 1;" \
|
||||
+ "elif mmc dev 0; then " \
|
||||
+ "setenv devtype mmc; setenv devnum 0;" \
|
||||
+ "elif nvme dev 0; then " \
|
||||
+ "setenv devtype nvme; setenv devnum 0;" \
|
||||
+ "elif scsi dev 0; then " \
|
||||
+ "setenv devtype scsi; setenv devnum 0;" \
|
||||
"fi; \0"
|
||||
|
||||
#if defined(CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE)
|
||||
--
|
||||
2.34.1
|
||||
|
||||
@ -0,0 +1,257 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_ROCKCHIP=y
|
||||
CONFIG_SPL_GPIO_SUPPORT=y
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x80000
|
||||
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh"
|
||||
CONFIG_ROCKCHIP_RK3588=y
|
||||
CONFIG_ROCKCHIP_FIT_IMAGE=y
|
||||
CONFIG_ROCKCHIP_HWID_DTB=y
|
||||
CONFIG_ROCKCHIP_VENDOR_PARTITION=y
|
||||
CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
|
||||
CONFIG_ROCKCHIP_NEW_IDB=y
|
||||
CONFIG_LOADER_INI="RK3588MINIALL.ini"
|
||||
CONFIG_TRUST_INI="RK3588TRUST.ini"
|
||||
CONFIG_PSTORE=y
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
|
||||
CONFIG_TARGET_EVB_RK3588=y
|
||||
CONFIG_SPL_LIBDISK_SUPPORT=y
|
||||
CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
||||
CONFIG_SPL_SPI_SUPPORT=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="rk3588-orangepi-5-max"
|
||||
CONFIG_DEBUG_UART=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_IMAGE_POST_PROCESS=y
|
||||
CONFIG_FIT_HW_CRYPTO=y
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
|
||||
CONFIG_SPL_FIT_HW_CRYPTO=y
|
||||
# CONFIG_SPL_SYS_DCACHE_OFF is not set
|
||||
CONFIG_BOOTDELAY=0
|
||||
CONFIG_SYS_CONSOLE_INFO_QUIET=y
|
||||
# CONFIG_DISPLAY_CPUINFO is not set
|
||||
CONFIG_ANDROID_BOOTLOADER=y
|
||||
CONFIG_ANDROID_AVB=y
|
||||
CONFIG_ANDROID_BOOT_IMAGE_HASH=y
|
||||
CONFIG_SPL_BOARD_INIT=y
|
||||
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
||||
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
|
||||
CONFIG_SPL_SEPARATE_BSS=y
|
||||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
|
||||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1
|
||||
CONFIG_SPL_MMC_WRITE=y
|
||||
CONFIG_SPL_MTD_SUPPORT=y
|
||||
CONFIG_SPL_ATF=y
|
||||
CONFIG_FASTBOOT_BUF_ADDR=0xc00800
|
||||
CONFIG_FASTBOOT_BUF_SIZE=0x07000000
|
||||
CONFIG_FASTBOOT_FLASH=y
|
||||
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
CONFIG_CMD_DTIMG=y
|
||||
# CONFIG_CMD_ELF is not set
|
||||
# CONFIG_CMD_IMI is not set
|
||||
# CONFIG_CMD_IMLS is not set
|
||||
# CONFIG_CMD_XIMG is not set
|
||||
# CONFIG_CMD_LZMADEC is not set
|
||||
# CONFIG_CMD_UNZIP is not set
|
||||
# CONFIG_CMD_FLASH is not set
|
||||
# CONFIG_CMD_FPGA is not set
|
||||
CONFIG_CMD_GPT=y
|
||||
# CONFIG_CMD_LOADB is not set
|
||||
# CONFIG_CMD_LOADS is not set
|
||||
CONFIG_CMD_BOOT_ANDROID=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_PCI=y
|
||||
CONFIG_CMD_SF=y
|
||||
CONFIG_CMD_SPI=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_USB_MASS_STORAGE=y
|
||||
# CONFIG_CMD_ITEST is not set
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_TFTPPUT=y
|
||||
CONFIG_CMD_TFTP_BOOTM=y
|
||||
CONFIG_CMD_TFTP_FLASH=y
|
||||
# CONFIG_CMD_MISC is not set
|
||||
CONFIG_CMD_MTD_BLK=y
|
||||
# CONFIG_SPL_DOS_PARTITION is not set
|
||||
# CONFIG_ISO_PARTITION is not set
|
||||
CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_SPL_DTB_MINIMUM=y
|
||||
CONFIG_OF_LIVE=y
|
||||
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
||||
CONFIG_OF_U_BOOT_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
||||
# CONFIG_NET_TFTP_VARS is not set
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SPL_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_SPL_SYSCON=y
|
||||
# CONFIG_SARADC_ROCKCHIP is not set
|
||||
CONFIG_SARADC_ROCKCHIP_V2=y
|
||||
CONFIG_CLK=y
|
||||
CONFIG_SPL_CLK=y
|
||||
CONFIG_CLK_SCMI=y
|
||||
CONFIG_SPL_CLK_SCMI=y
|
||||
CONFIG_DM_CRYPTO=y
|
||||
CONFIG_SPL_DM_CRYPTO=y
|
||||
CONFIG_ROCKCHIP_CRYPTO_V2=y
|
||||
CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
|
||||
CONFIG_DM_RNG=y
|
||||
CONFIG_RNG_ROCKCHIP=y
|
||||
CONFIG_SCMI_FIRMWARE=y
|
||||
CONFIG_SPL_SCMI_FIRMWARE=y
|
||||
CONFIG_GPIO_HOG=y
|
||||
CONFIG_ROCKCHIP_GPIO=y
|
||||
CONFIG_ROCKCHIP_GPIO_V2=y
|
||||
CONFIG_SYS_I2C_ROCKCHIP=y
|
||||
CONFIG_I2C_MUX=y
|
||||
CONFIG_DM_KEY=y
|
||||
CONFIG_RK8XX_PWRKEY=y
|
||||
CONFIG_ADC_KEY=y
|
||||
CONFIG_MISC=y
|
||||
CONFIG_SPL_MISC=y
|
||||
CONFIG_MISC_DECOMPRESS=y
|
||||
CONFIG_SPL_MISC_DECOMPRESS=y
|
||||
CONFIG_ROCKCHIP_OTP=y
|
||||
CONFIG_ROCKCHIP_HW_DECOMPRESS=y
|
||||
CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
|
||||
CONFIG_SPL_ROCKCHIP_SECURE_OTP=y
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_ROCKCHIP=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_SDMA=y
|
||||
CONFIG_MMC_SDHCI_ROCKCHIP=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_BLK=y
|
||||
CONFIG_MTD_DEVICE=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_SPI_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_SPEED=80000000
|
||||
CONFIG_SPI_FLASH_EON=y
|
||||
CONFIG_SPI_FLASH_GIGADEVICE=y
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_SPI_FLASH_SST=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
CONFIG_SPI_FLASH_XMC=y
|
||||
CONFIG_SPI_FLASH_XTX=y
|
||||
CONFIG_SPI_FLASH_MTD=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_DM_ETH_PHY=y
|
||||
CONFIG_DWC_ETH_QOS=y
|
||||
CONFIG_GMAC_ROCKCHIP=y
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_DM_PCI=y
|
||||
CONFIG_DM_PCI_COMPAT=y
|
||||
CONFIG_PCIE_DW_ROCKCHIP=y
|
||||
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
|
||||
CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX=y
|
||||
CONFIG_PHY_ROCKCHIP_USBDP=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_SPL_PINCTRL=y
|
||||
CONFIG_DM_FUEL_GAUGE=y
|
||||
CONFIG_POWER_FG_CW201X=y
|
||||
CONFIG_POWER_FG_CW221X=y
|
||||
CONFIG_DM_PMIC=y
|
||||
CONFIG_PMIC_SPI_RK8XX=y
|
||||
CONFIG_DM_POWER_DELIVERY=y
|
||||
CONFIG_TYPEC_TCPM=y
|
||||
CONFIG_TYPEC_TCPCI=y
|
||||
CONFIG_TYPEC_HUSB311=y
|
||||
CONFIG_TYPEC_FUSB302=y
|
||||
CONFIG_REGULATOR_PWM=y
|
||||
CONFIG_DM_REGULATOR_FIXED=y
|
||||
CONFIG_DM_REGULATOR_GPIO=y
|
||||
CONFIG_REGULATOR_RK860X=y
|
||||
CONFIG_REGULATOR_RK806=y
|
||||
CONFIG_CHARGER_BQ25700=y
|
||||
CONFIG_CHARGER_BQ25890=y
|
||||
CONFIG_CHARGER_SC8551=y
|
||||
CONFIG_CHARGER_SGM41542=y
|
||||
CONFIG_DM_CHARGE_DISPLAY=y
|
||||
CONFIG_CHARGE_ANIMATION=y
|
||||
CONFIG_PWM_ROCKCHIP=y
|
||||
CONFIG_RAM=y
|
||||
CONFIG_SPL_RAM=y
|
||||
CONFIG_TPL_RAM=y
|
||||
CONFIG_DM_RAMDISK=y
|
||||
CONFIG_RAMDISK_RO=y
|
||||
CONFIG_DM_RESET=y
|
||||
CONFIG_SPL_DM_RESET=y
|
||||
CONFIG_SPL_RESET_ROCKCHIP=y
|
||||
CONFIG_BAUDRATE=1500000
|
||||
CONFIG_DEBUG_UART_BASE=0xFEB50000
|
||||
CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
CONFIG_DEBUG_UART_SHIFT=2
|
||||
CONFIG_ROCKCHIP_SPI=y
|
||||
CONFIG_ROCKCHIP_SFC=y
|
||||
CONFIG_SYSRESET=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_XHCI_PCI=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_EHCI_GENERIC=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_USB_OHCI_GENERIC=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_DWC3_GADGET=y
|
||||
CONFIG_USB_DWC3_GENERIC=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
|
||||
CONFIG_USB_GADGET_VENDOR_NUM=0x2207
|
||||
CONFIG_USB_GADGET_PRODUCT_NUM=0x350a
|
||||
CONFIG_USB_GADGET_DOWNLOAD=y
|
||||
CONFIG_DM_VIDEO=y
|
||||
CONFIG_DISPLAY=y
|
||||
CONFIG_DRM_ROCKCHIP=y
|
||||
CONFIG_DRM_MAXIM_MAX96745=y
|
||||
CONFIG_DRM_MAXIM_MAX96752F=y
|
||||
CONFIG_DRM_MAXIM_MAX96755F=y
|
||||
CONFIG_DRM_PANEL_MAXIM_DESERIALIZER=y
|
||||
CONFIG_DRM_ROHM_BU18XL82=y
|
||||
CONFIG_DRM_ROCKCHIP_DW_HDMI_QP=y
|
||||
CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI2=y
|
||||
CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
|
||||
CONFIG_DRM_ROCKCHIP_DW_DP=y
|
||||
CONFIG_DRM_ROCKCHIP_SAMSUNG_MIPI_DCPHY=y
|
||||
CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX_HDMI=y
|
||||
CONFIG_USE_TINY_PRINTF=y
|
||||
CONFIG_LIB_RAND=y
|
||||
CONFIG_SPL_TINY_MEMSET=y
|
||||
CONFIG_RSA=y
|
||||
CONFIG_SPL_RSA=y
|
||||
CONFIG_RSA_N_SIZE=0x200
|
||||
CONFIG_RSA_E_SIZE=0x10
|
||||
CONFIG_RSA_C_SIZE=0x20
|
||||
CONFIG_XBC=y
|
||||
CONFIG_LZ4=y
|
||||
CONFIG_LZMA=y
|
||||
CONFIG_ERRNO_STR=y
|
||||
# CONFIG_EFI_LOADER is not set
|
||||
CONFIG_AVB_LIBAVB=y
|
||||
CONFIG_AVB_LIBAVB_AB=y
|
||||
CONFIG_AVB_LIBAVB_ATX=y
|
||||
CONFIG_AVB_LIBAVB_USER=y
|
||||
CONFIG_RK_AVB_LIBAVB_USER=y
|
||||
CONFIG_OPTEE_CLIENT=y
|
||||
CONFIG_OPTEE_V2=y
|
||||
CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
|
||||
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
|
||||
CONFIG_CMD_SETEXPR=y
|
||||
CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y
|
||||
CONFIG_SYS_PROMPT="opi# "
|
||||
CONFIG_AHCI=y
|
||||
CONFIG_CMD_SCSI=y
|
||||
CONFIG_DM_SCSI=y
|
||||
CONFIG_DWC_AHCI=y
|
||||
CONFIG_LIBATA=y
|
||||
CONFIG_SCSI_AHCI=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_USING_KERNEL_DTB_V2=y
|
||||
CONFIG_MTD_BLK_U_BOOT_OFFS=0x400
|
||||
CONFIG_ROCKCHIP_EMMC_IOMUX=y
|
||||
@ -0,0 +1,257 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_ROCKCHIP=y
|
||||
CONFIG_SPL_GPIO_SUPPORT=y
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x80000
|
||||
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh"
|
||||
CONFIG_ROCKCHIP_RK3588=y
|
||||
CONFIG_ROCKCHIP_FIT_IMAGE=y
|
||||
CONFIG_ROCKCHIP_HWID_DTB=y
|
||||
CONFIG_ROCKCHIP_VENDOR_PARTITION=y
|
||||
CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
|
||||
CONFIG_ROCKCHIP_NEW_IDB=y
|
||||
CONFIG_LOADER_INI="RK3588MINIALL.ini"
|
||||
CONFIG_TRUST_INI="RK3588TRUST.ini"
|
||||
CONFIG_PSTORE=y
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
|
||||
CONFIG_TARGET_EVB_RK3588=y
|
||||
CONFIG_SPL_LIBDISK_SUPPORT=y
|
||||
CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
||||
CONFIG_SPL_SPI_SUPPORT=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="rk3588s-orangepi-cm5"
|
||||
CONFIG_DEBUG_UART=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_IMAGE_POST_PROCESS=y
|
||||
CONFIG_FIT_HW_CRYPTO=y
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
|
||||
CONFIG_SPL_FIT_HW_CRYPTO=y
|
||||
# CONFIG_SPL_SYS_DCACHE_OFF is not set
|
||||
CONFIG_BOOTDELAY=0
|
||||
CONFIG_SYS_CONSOLE_INFO_QUIET=y
|
||||
# CONFIG_DISPLAY_CPUINFO is not set
|
||||
CONFIG_ANDROID_BOOTLOADER=y
|
||||
CONFIG_ANDROID_AVB=y
|
||||
CONFIG_ANDROID_BOOT_IMAGE_HASH=y
|
||||
CONFIG_SPL_BOARD_INIT=y
|
||||
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
||||
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
|
||||
CONFIG_SPL_SEPARATE_BSS=y
|
||||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
|
||||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1
|
||||
CONFIG_SPL_MMC_WRITE=y
|
||||
CONFIG_SPL_MTD_SUPPORT=y
|
||||
CONFIG_SPL_ATF=y
|
||||
CONFIG_FASTBOOT_BUF_ADDR=0xc00800
|
||||
CONFIG_FASTBOOT_BUF_SIZE=0x07000000
|
||||
CONFIG_FASTBOOT_FLASH=y
|
||||
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
CONFIG_CMD_DTIMG=y
|
||||
# CONFIG_CMD_ELF is not set
|
||||
# CONFIG_CMD_IMI is not set
|
||||
# CONFIG_CMD_IMLS is not set
|
||||
# CONFIG_CMD_XIMG is not set
|
||||
# CONFIG_CMD_LZMADEC is not set
|
||||
# CONFIG_CMD_UNZIP is not set
|
||||
# CONFIG_CMD_FLASH is not set
|
||||
# CONFIG_CMD_FPGA is not set
|
||||
CONFIG_CMD_GPT=y
|
||||
# CONFIG_CMD_LOADB is not set
|
||||
# CONFIG_CMD_LOADS is not set
|
||||
CONFIG_CMD_BOOT_ANDROID=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_PCI=y
|
||||
CONFIG_CMD_SF=y
|
||||
CONFIG_CMD_SPI=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_USB_MASS_STORAGE=y
|
||||
# CONFIG_CMD_ITEST is not set
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_TFTPPUT=y
|
||||
CONFIG_CMD_TFTP_BOOTM=y
|
||||
CONFIG_CMD_TFTP_FLASH=y
|
||||
# CONFIG_CMD_MISC is not set
|
||||
CONFIG_CMD_MTD_BLK=y
|
||||
# CONFIG_SPL_DOS_PARTITION is not set
|
||||
# CONFIG_ISO_PARTITION is not set
|
||||
CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_SPL_DTB_MINIMUM=y
|
||||
CONFIG_OF_LIVE=y
|
||||
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
||||
CONFIG_OF_U_BOOT_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
||||
# CONFIG_NET_TFTP_VARS is not set
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SPL_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_SPL_SYSCON=y
|
||||
# CONFIG_SARADC_ROCKCHIP is not set
|
||||
CONFIG_SARADC_ROCKCHIP_V2=y
|
||||
CONFIG_CLK=y
|
||||
CONFIG_SPL_CLK=y
|
||||
CONFIG_CLK_SCMI=y
|
||||
CONFIG_SPL_CLK_SCMI=y
|
||||
CONFIG_DM_CRYPTO=y
|
||||
CONFIG_SPL_DM_CRYPTO=y
|
||||
CONFIG_ROCKCHIP_CRYPTO_V2=y
|
||||
CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
|
||||
CONFIG_DM_RNG=y
|
||||
CONFIG_RNG_ROCKCHIP=y
|
||||
CONFIG_SCMI_FIRMWARE=y
|
||||
CONFIG_SPL_SCMI_FIRMWARE=y
|
||||
CONFIG_GPIO_HOG=y
|
||||
CONFIG_ROCKCHIP_GPIO=y
|
||||
CONFIG_ROCKCHIP_GPIO_V2=y
|
||||
CONFIG_SYS_I2C_ROCKCHIP=y
|
||||
CONFIG_I2C_MUX=y
|
||||
CONFIG_DM_KEY=y
|
||||
CONFIG_RK8XX_PWRKEY=y
|
||||
CONFIG_ADC_KEY=y
|
||||
CONFIG_MISC=y
|
||||
CONFIG_SPL_MISC=y
|
||||
CONFIG_MISC_DECOMPRESS=y
|
||||
CONFIG_SPL_MISC_DECOMPRESS=y
|
||||
CONFIG_ROCKCHIP_OTP=y
|
||||
CONFIG_ROCKCHIP_HW_DECOMPRESS=y
|
||||
CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
|
||||
CONFIG_SPL_ROCKCHIP_SECURE_OTP=y
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_ROCKCHIP=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_SDMA=y
|
||||
CONFIG_MMC_SDHCI_ROCKCHIP=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_BLK=y
|
||||
CONFIG_MTD_DEVICE=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_SPI_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_SPEED=80000000
|
||||
CONFIG_SPI_FLASH_EON=y
|
||||
CONFIG_SPI_FLASH_GIGADEVICE=y
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_SPI_FLASH_SST=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
CONFIG_SPI_FLASH_XMC=y
|
||||
CONFIG_SPI_FLASH_XTX=y
|
||||
CONFIG_SPI_FLASH_MTD=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_DM_ETH_PHY=y
|
||||
CONFIG_DWC_ETH_QOS=y
|
||||
CONFIG_GMAC_ROCKCHIP=y
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_DM_PCI=y
|
||||
CONFIG_DM_PCI_COMPAT=y
|
||||
CONFIG_PCIE_DW_ROCKCHIP=y
|
||||
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
|
||||
CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX=y
|
||||
CONFIG_PHY_ROCKCHIP_USBDP=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_SPL_PINCTRL=y
|
||||
CONFIG_DM_FUEL_GAUGE=y
|
||||
CONFIG_POWER_FG_CW201X=y
|
||||
CONFIG_POWER_FG_CW221X=y
|
||||
CONFIG_DM_PMIC=y
|
||||
CONFIG_PMIC_SPI_RK8XX=y
|
||||
CONFIG_DM_POWER_DELIVERY=y
|
||||
CONFIG_TYPEC_TCPM=y
|
||||
CONFIG_TYPEC_TCPCI=y
|
||||
CONFIG_TYPEC_HUSB311=y
|
||||
CONFIG_TYPEC_FUSB302=y
|
||||
CONFIG_REGULATOR_PWM=y
|
||||
CONFIG_DM_REGULATOR_FIXED=y
|
||||
CONFIG_DM_REGULATOR_GPIO=y
|
||||
CONFIG_REGULATOR_RK860X=y
|
||||
CONFIG_REGULATOR_RK806=y
|
||||
CONFIG_CHARGER_BQ25700=y
|
||||
CONFIG_CHARGER_BQ25890=y
|
||||
CONFIG_CHARGER_SC8551=y
|
||||
CONFIG_CHARGER_SGM41542=y
|
||||
CONFIG_DM_CHARGE_DISPLAY=y
|
||||
CONFIG_CHARGE_ANIMATION=y
|
||||
CONFIG_PWM_ROCKCHIP=y
|
||||
CONFIG_RAM=y
|
||||
CONFIG_SPL_RAM=y
|
||||
CONFIG_TPL_RAM=y
|
||||
CONFIG_DM_RAMDISK=y
|
||||
CONFIG_RAMDISK_RO=y
|
||||
CONFIG_DM_RESET=y
|
||||
CONFIG_SPL_DM_RESET=y
|
||||
CONFIG_SPL_RESET_ROCKCHIP=y
|
||||
CONFIG_BAUDRATE=1500000
|
||||
CONFIG_DEBUG_UART_BASE=0xFEB50000
|
||||
CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
CONFIG_DEBUG_UART_SHIFT=2
|
||||
CONFIG_ROCKCHIP_SPI=y
|
||||
CONFIG_ROCKCHIP_SFC=y
|
||||
CONFIG_SYSRESET=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_XHCI_PCI=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_EHCI_GENERIC=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_USB_OHCI_GENERIC=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_DWC3_GADGET=y
|
||||
CONFIG_USB_DWC3_GENERIC=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
|
||||
CONFIG_USB_GADGET_VENDOR_NUM=0x2207
|
||||
CONFIG_USB_GADGET_PRODUCT_NUM=0x350a
|
||||
CONFIG_USB_GADGET_DOWNLOAD=y
|
||||
CONFIG_DM_VIDEO=y
|
||||
CONFIG_DISPLAY=y
|
||||
CONFIG_DRM_ROCKCHIP=y
|
||||
CONFIG_DRM_MAXIM_MAX96745=y
|
||||
CONFIG_DRM_MAXIM_MAX96752F=y
|
||||
CONFIG_DRM_MAXIM_MAX96755F=y
|
||||
CONFIG_DRM_PANEL_MAXIM_DESERIALIZER=y
|
||||
CONFIG_DRM_ROHM_BU18XL82=y
|
||||
CONFIG_DRM_ROCKCHIP_DW_HDMI_QP=y
|
||||
CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI2=y
|
||||
CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
|
||||
CONFIG_DRM_ROCKCHIP_DW_DP=y
|
||||
CONFIG_DRM_ROCKCHIP_SAMSUNG_MIPI_DCPHY=y
|
||||
CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX_HDMI=y
|
||||
CONFIG_USE_TINY_PRINTF=y
|
||||
CONFIG_LIB_RAND=y
|
||||
CONFIG_SPL_TINY_MEMSET=y
|
||||
CONFIG_RSA=y
|
||||
CONFIG_SPL_RSA=y
|
||||
CONFIG_RSA_N_SIZE=0x200
|
||||
CONFIG_RSA_E_SIZE=0x10
|
||||
CONFIG_RSA_C_SIZE=0x20
|
||||
CONFIG_XBC=y
|
||||
CONFIG_LZ4=y
|
||||
CONFIG_LZMA=y
|
||||
CONFIG_ERRNO_STR=y
|
||||
# CONFIG_EFI_LOADER is not set
|
||||
CONFIG_AVB_LIBAVB=y
|
||||
CONFIG_AVB_LIBAVB_AB=y
|
||||
CONFIG_AVB_LIBAVB_ATX=y
|
||||
CONFIG_AVB_LIBAVB_USER=y
|
||||
CONFIG_RK_AVB_LIBAVB_USER=y
|
||||
CONFIG_OPTEE_CLIENT=y
|
||||
CONFIG_OPTEE_V2=y
|
||||
CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
|
||||
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
|
||||
CONFIG_CMD_SETEXPR=y
|
||||
CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y
|
||||
CONFIG_SYS_PROMPT="opi# "
|
||||
CONFIG_AHCI=y
|
||||
CONFIG_CMD_SCSI=y
|
||||
CONFIG_DM_SCSI=y
|
||||
CONFIG_DWC_AHCI=y
|
||||
CONFIG_LIBATA=y
|
||||
CONFIG_SCSI_AHCI=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_USING_KERNEL_DTB_V2=y
|
||||
CONFIG_MTD_BLK_U_BOOT_OFFS=0x400
|
||||
CONFIG_ROCKCHIP_EMMC_IOMUX=y
|
||||
@ -13,9 +13,10 @@ PKG_RELEASE:=1
|
||||
PKG_SOURCE_PROTO:=git
|
||||
PKG_SOURCE_DATE:=2023-02-11
|
||||
PKG_SOURCE_URL:=https://github.com/lwfinger/rtw88.git
|
||||
PKG_SOURCE_VERSION:=3af004dd40588e86280f0c58a483de6f53b9803f
|
||||
PKG_MIRROR_HASH:=13a476c6e46702dee0a3ea2cd743587ab889414be2dce979e652f3bbfa106d76
|
||||
|
||||
# PKG_SOURCE_VERSION:=3af004dd40588e86280f0c58a483de6f53b9803f
|
||||
PKG_SOURCE_VERSION:=95983ffd7fd914b228299fcfcf1b7b51df97badc
|
||||
# PKG_MIRROR_HASH:=13a476c6e46702dee0a3ea2cd743587ab889414be2dce979e652f3bbfa106d76
|
||||
PKG_MIRROR_HASH:=47da1ffbd72649112e4fbc23059da3a46413b7d608279dc946fca27d27c27883
|
||||
PKG_BUILD_PARALLEL:=1
|
||||
|
||||
STAMP_CONFIGURED_DEPENDS := $(STAGING_DIR)/usr/include/mac80211-backport/backport/autoconf.h
|
||||
|
||||
@ -0,0 +1,102 @@
|
||||
From d883811d5f1a03efe4ee7e58369f55c7c87c71e6 Mon Sep 17 00:00:00 2001
|
||||
From: yml <ymlgdut@gmail.com>
|
||||
Date: Wed, 10 Jul 2024 20:10:24 +0800
|
||||
Subject: [PATCH] rtw88-usb support opi5max
|
||||
|
||||
---
|
||||
Makefile | 24 +++++++-----------------
|
||||
main.c | 3 ++-
|
||||
2 files changed, 9 insertions(+), 18 deletions(-)
|
||||
|
||||
diff --git a/Makefile b/Makefile
|
||||
index badfe33..f2e3cc4 100644
|
||||
--- a/Makefile
|
||||
+++ b/Makefile
|
||||
@@ -87,9 +87,6 @@ rtw_8822cu-objs := rtw8822cu.o
|
||||
obj-m += rtw_8723x.o
|
||||
rtw_8723x-objs := rtw8723x.o
|
||||
|
||||
-obj-m += rtw_8703b.o
|
||||
-rtw_8703b-objs := rtw8703b.o rtw8703b_tables.o
|
||||
-
|
||||
obj-m += rtw_8723x.o
|
||||
rtw_8723x-objs := rtw8723x.o
|
||||
|
||||
@@ -99,12 +96,6 @@ rtw_8822cs-objs := rtw8822cs.o
|
||||
obj-m += rtw_8723x.o
|
||||
rtw_8723x-objs := rtw8723x.o
|
||||
|
||||
-obj-m += rtw_8723cs.o
|
||||
-rtw_8723cs-objs := rtw8723cs.o
|
||||
-
|
||||
-obj-m += rtw_8723cs.o
|
||||
-rtw_8723cs-objs := rtw8723cs.o
|
||||
-
|
||||
obj-m += rtw_8723d.o
|
||||
rtw_8723d-objs := rtw8723d.o rtw8723d_table.o
|
||||
|
||||
@@ -113,8 +104,8 @@ obj-m += rtw_8723de.o
|
||||
rtw_8723de-objs := rtw8723de.o
|
||||
endif
|
||||
|
||||
-obj-m += rtw_8723du.o
|
||||
-rtw_8723du-objs := rtw8723du.o
|
||||
+obj-m += rtw88_8723du.o
|
||||
+rtw88_8723du-objs := rtw8723du.o
|
||||
|
||||
obj-m += rtw_8723ds.o
|
||||
rtw_8723ds-objs := rtw8723ds.o
|
||||
@@ -144,8 +135,8 @@ rtw_8812au-objs := rtw8812au.o
|
||||
obj-m += rtw_8821cs.o
|
||||
rtw_8821cs-objs := rtw8821cs.o
|
||||
|
||||
-obj-m += rtw_8821cu.o
|
||||
-rtw_8821cu-objs := rtw8821cu.o
|
||||
+obj-m += rtw88_8821cu.o
|
||||
+rtw88_8821cu-objs := rtw8821cu.o
|
||||
|
||||
ifeq ($(CONFIG_PCI), y)
|
||||
obj-m += rtw_pci.o
|
||||
@@ -158,8 +149,8 @@ rtw_sdio-objs := sdio.o
|
||||
obj-m += rtw_usb.o
|
||||
rtw_usb-objs := usb.o
|
||||
|
||||
-obj-m += rtw_usb.o
|
||||
-rtw_usb-objs := usb.o
|
||||
+obj-m += rtw88_usb.o
|
||||
+rtw88_usb-objs := usb.o
|
||||
|
||||
ccflags-y += -D__CHECK_ENDIAN__
|
||||
|
||||
@@ -273,5 +264,4 @@ endif
|
||||
@$(KSRC)/scripts/sign-file sha256 MOK.priv MOK.der rtw_8723x.ko
|
||||
@$(KSRC)/scripts/sign-file sha256 MOK.priv MOK.der rtw_8723cs.ko
|
||||
|
||||
-sign-install: all sign install
|
||||
-
|
||||
+sign-install: all sign install
|
||||
\ No newline at end of file
|
||||
diff --git a/main.c b/main.c
|
||||
index f85ee8d..c54227d 100644
|
||||
--- a/main.c
|
||||
+++ b/main.c
|
||||
@@ -219,6 +219,7 @@ static void rtw_watch_dog_work(struct work_struct *work)
|
||||
struct rtw_watch_dog_iter_data data = {};
|
||||
bool busy_traffic = test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
|
||||
bool ps_active;
|
||||
+ int received_beacons;
|
||||
|
||||
mutex_lock(&rtwdev->mutex);
|
||||
|
||||
@@ -258,7 +259,7 @@ static void rtw_watch_dog_work(struct work_struct *work)
|
||||
if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags))
|
||||
goto unlock;
|
||||
|
||||
- int received_beacons = rtwdev->dm_info.cur_pkt_count.num_bcn_pkt;
|
||||
+ received_beacons = rtwdev->dm_info.cur_pkt_count.num_bcn_pkt;
|
||||
|
||||
/* make sure BB/RF is working for dynamic mech */
|
||||
rtw_leave_lps(rtwdev);
|
||||
--
|
||||
2.34.1
|
||||
|
||||
@ -1,56 +0,0 @@
|
||||
--- a/Makefile
|
||||
+++ b/Makefile
|
||||
@@ -24,10 +24,6 @@ NO_SKIP_SIGN := y
|
||||
endif
|
||||
|
||||
EXTRA_CFLAGS += -O2
|
||||
-EXTRA_CFLAGS += -DCONFIG_RTW88_8822BE=1
|
||||
-EXTRA_CFLAGS += -DCONFIG_RTW88_8821CE=1
|
||||
-EXTRA_CFLAGS += -DCONFIG_RTW88_8822CE=1
|
||||
-EXTRA_CFLAGS += -DCONFIG_RTW88_8723DE=1
|
||||
#EXTRA_CFLAGS += -DCONFIG_RTW88_DEBUG=1
|
||||
#EXTRA_CFLAGS += -DCONFIG_RTW88_DEBUGFS=1
|
||||
#EXTRA_CFLAGS += -DCONFIG_RTW88_REGD_USER_REG_HINTS
|
||||
@@ -54,42 +50,27 @@ rtw_core-objs += main.o \
|
||||
obj-m += rtw_8822b.o
|
||||
rtw_8822b-objs := rtw8822b.o rtw8822b_table.o
|
||||
|
||||
-obj-m += rtw_8822be.o
|
||||
-rtw_8822be-objs := rtw8822be.o
|
||||
-
|
||||
obj-m += rtw88_8822bu.o
|
||||
rtw88_8822bu-objs := rtw8822bu.o
|
||||
|
||||
obj-m += rtw_8822c.o
|
||||
rtw_8822c-objs := rtw8822c.o rtw8822c_table.o
|
||||
|
||||
-obj-m += rtw_8822ce.o
|
||||
-rtw_8822ce-objs := rtw8822ce.o
|
||||
-
|
||||
obj-m += rtw88_8822cu.o
|
||||
rtw88_8822cu-objs := rtw8822cu.o
|
||||
|
||||
obj-m += rtw_8723d.o
|
||||
rtw_8723d-objs := rtw8723d.o rtw8723d_table.o
|
||||
|
||||
-obj-m += rtw_8723de.o
|
||||
-rtw_8723de-objs := rtw8723de.o
|
||||
-
|
||||
obj-m += rtw88_8723du.o
|
||||
rtw88_8723du-objs := rtw8723du.o
|
||||
|
||||
obj-m += rtw_8821c.o
|
||||
rtw_8821c-objs := rtw8821c.o rtw8821c_table.o
|
||||
|
||||
-obj-m += rtw_8821ce.o
|
||||
-rtw_8821ce-objs := rtw8821ce.o
|
||||
-
|
||||
obj-m += rtw88_8821cu.o
|
||||
rtw88_8821cu-objs := rtw8821cu.o
|
||||
|
||||
-obj-m += rtw_pci.o
|
||||
-rtw_pci-objs := pci.o
|
||||
-
|
||||
obj-m += rtw_usb.o
|
||||
rtw_usb-objs := usb.o
|
||||
|
||||
@ -15,6 +15,10 @@ rockchip_setup_interfaces()
|
||||
rockchip,rk3588-orangepi-5-plus)
|
||||
ucidef_set_interfaces_lan_wan 'eth0' 'eth1'
|
||||
;;
|
||||
rockchip,rk3588s-orangepi-cm5)
|
||||
ucidef_set_interface_wan 'eth0'
|
||||
ucidef_set_interface_lan "eth1 eth2"
|
||||
;;
|
||||
*)
|
||||
ucidef_set_interface_lan 'eth0'
|
||||
;;
|
||||
|
||||
@ -47,5 +47,11 @@ rockchip,rk3588-orangepi-5-plus)
|
||||
fi
|
||||
fi
|
||||
;;
|
||||
rockchip,rk3588s-orangepi-cm5)
|
||||
set_interface_core 10 "eth0"
|
||||
set_interface_core 20 "eth1"
|
||||
set_interface_core 30 "eth2"
|
||||
bash /usr/bin/led-lan.sh
|
||||
;;
|
||||
esac
|
||||
|
||||
|
||||
@ -4,6 +4,7 @@ START=22
|
||||
start() {
|
||||
rm -rf /etc/rc.d/S22resize-rootfs
|
||||
#service resize-rootfs disable
|
||||
/usr/bin/led-lan.sh
|
||||
/usr/bin/resize-rootfs.sh
|
||||
}
|
||||
|
||||
|
||||
18
target/linux/rockchip/armv8/base-files/usr/bin/led-lan.sh
Normal file
18
target/linux/rockchip/armv8/base-files/usr/bin/led-lan.sh
Normal file
@ -0,0 +1,18 @@
|
||||
#!/bin/bash
|
||||
. /lib/functions/system.sh
|
||||
board=$(board_name)
|
||||
if [[ ${board} == rockchip,rk3588s-orangepi-cm5 ]]; then
|
||||
declare -A led_map=(
|
||||
["lan2"]="eth2"
|
||||
["lan1"]="eth1"
|
||||
["wan"]="eth0"
|
||||
)
|
||||
for led in "${!led_map[@]}"; do
|
||||
interface=$(ls /sys/class/net/ | grep -E "${led_map[$led]}" | sed -n 1p)
|
||||
echo netdev > "/sys/class/leds/$led/trigger"
|
||||
echo "$interface" > "/sys/class/leds/$led/device_name"
|
||||
echo 1 > "/sys/class/leds/$led/tx"
|
||||
echo 1 > "/sys/class/leds/$led/rx"
|
||||
echo 1 > "/sys/class/leds/$led/link"
|
||||
done
|
||||
fi
|
||||
@ -540,6 +540,7 @@ CONFIG_INPUT_KEYBOARD=y
|
||||
CONFIG_INPUT_LEDS=y
|
||||
CONFIG_INPUT_MATRIXKMAP=y
|
||||
# CONFIG_INPUT_MISC is not set
|
||||
CONFIG_R8125=y
|
||||
CONFIG_INTEGRITY=y
|
||||
CONFIG_INTEGRITY_AUDIT=y
|
||||
CONFIG_IOMMU_API=y
|
||||
|
||||
@ -62,6 +62,16 @@ define Device/xunlong_orangepi-5-plus
|
||||
endef
|
||||
TARGET_DEVICES += xunlong_orangepi-5-plus
|
||||
|
||||
define Device/xunlong_orangepi-5-max
|
||||
DEVICE_VENDOR := XunLong
|
||||
DEVICE_MODEL := Orange Pi 5 Max
|
||||
SOC := rk3588
|
||||
UBOOT_DEVICE_NAME := orangepi-5-max-rk3588
|
||||
IMAGE/sysupgrade.img.gz := boot-common | boot-script orangepi-5 | pine64-img | gzip | append-metadata
|
||||
DEVICE_PACKAGES := kmod-usb-net-rtl8152 kmod-r8125 kmod-iwlwifi
|
||||
endef
|
||||
TARGET_DEVICES += xunlong_orangepi-5-max
|
||||
|
||||
define Device/xunlong_orangepi-5-sata
|
||||
DEVICE_VENDOR := XunLong
|
||||
DEVICE_MODEL := Orange Pi 5 For sata boot
|
||||
@ -72,6 +82,16 @@ define Device/xunlong_orangepi-5-sata
|
||||
endef
|
||||
TARGET_DEVICES += xunlong_orangepi-5-sata
|
||||
|
||||
define Device/xunlong_orangepi-cm5
|
||||
DEVICE_VENDOR := XunLong
|
||||
DEVICE_MODEL := Orange Pi CM 5
|
||||
SOC := rk3588s
|
||||
UBOOT_DEVICE_NAME := orangepi-cm5-rk3588
|
||||
IMAGE/sysupgrade.img.gz := boot-common | boot-script orangepi-5 | pine64-img | gzip | append-metadata
|
||||
DEVICE_PACKAGES := kmod-usb-net-rtl8152 kmod-r8125 kmod-iwlwifi
|
||||
endef
|
||||
TARGET_DEVICES += xunlong_orangepi-cm5
|
||||
|
||||
define Device/xunlong_orangepi-5-spi
|
||||
DEVICE_VENDOR := XunLong
|
||||
DEVICE_MODEL := Orange Pi 5 For Spi Boot
|
||||
|
||||
@ -0,0 +1,743 @@
|
||||
From 76a32615bd9e1f591333b33617e6cda1d6bda3f7 Mon Sep 17 00:00:00 2001
|
||||
From: yml <ymlgdut@gmail.com>
|
||||
Date: Wed, 3 Jul 2024 17:26:04 +0800
|
||||
Subject: [PATCH 1/2] Linux5.10-RK3588-openwrt support opicm5 dts
|
||||
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/Makefile | 1 +
|
||||
.../dts/rockchip/rk3588s-orangepi-cm5.dts | 397 ++++++++++++++++++
|
||||
.../dts/rockchip/rk3588s-orangepi-cm5.dtsi | 306 ++++++++++++++
|
||||
3 files changed, 704 insertions(+)
|
||||
create mode 100755 arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5.dts
|
||||
create mode 100755 arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5.dtsi
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
index 4ca33bd6c..2973dc51b 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/Makefile
|
||||
+++ b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
@@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-orangepi-5-plus.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-5-spi.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-5-sata.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-5b.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-cm5.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-orangepi-5-plus-spi.dtb
|
||||
|
||||
subdir-y := $(dts-dirs) overlay
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5.dts b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5.dts
|
||||
new file mode 100755
|
||||
index 000000000..60a98fa93
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5.dts
|
||||
@@ -0,0 +1,397 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
|
||||
+ *
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "rk3588s-orangepi-cm5.dtsi"
|
||||
+#include "rk3588-linux.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Orange Pi CM5";
|
||||
+ compatible = "rockchip,rk3588s-orangepi-cm5", "rockchip,rk3588";
|
||||
+
|
||||
+ vcc3v3_sys: vcc3v3-sys {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc3v3_sys";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ enable-active-high;
|
||||
+ gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
|
||||
+ startup-delay-us = <50000>;
|
||||
+ };
|
||||
+
|
||||
+ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc_1v1_nldo_s3";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1100000>;
|
||||
+ regulator-max-microvolt = <1100000>;
|
||||
+ vin-supply = <&vcc5v0_sys>;
|
||||
+ };
|
||||
+
|
||||
+ vcc5v0_host: vcc5v0-host {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc5v0_host";
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ enable-active-high;
|
||||
+ gpio = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
|
||||
+ vin-supply = <&vcc5v0_usb>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&vcc5v0_host_en>;
|
||||
+ };
|
||||
+
|
||||
+ leds: gpio-leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 =<&leds_gpio>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ lan1@0 {
|
||||
+ gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
|
||||
+ label = "lan1";
|
||||
+ default-state = "off";
|
||||
+ };
|
||||
+
|
||||
+ lan2@1 {
|
||||
+ gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_LOW>;
|
||||
+ label = "lan2";
|
||||
+ default-state = "off";
|
||||
+ };
|
||||
+
|
||||
+ wan@3 {
|
||||
+ gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
|
||||
+ label = "wan";
|
||||
+ default-state = "off";
|
||||
+ };
|
||||
+
|
||||
+ power@4 {
|
||||
+ gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
|
||||
+ label = "power";
|
||||
+ linux,default-trigger = "default-on";
|
||||
+ linux,default-trigger-delay-ms = <0>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ gpio_keys: gpio-keys {
|
||||
+ compatible = "gpio-keys";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&key1_pin>;
|
||||
+
|
||||
+ button@1 {
|
||||
+ debounce-interval = <50>;
|
||||
+ gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>;
|
||||
+ label = "K1";
|
||||
+ linux,code = <KEY_POWER>;
|
||||
+ wakeup-source;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&gmac1 {
|
||||
+ /* Use rgmii-rxid mode to disable rx delay inside Soc */
|
||||
+ phy-mode = "rgmii-rxid";
|
||||
+ clock_in_out = "output";
|
||||
+
|
||||
+ snps,reset-gpio = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>;
|
||||
+ snps,reset-active-low;
|
||||
+ /* Reset time is 20ms, 100ms for rtl8211f */
|
||||
+ snps,reset-delays-us = <0 20000 100000>;
|
||||
+
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&gmac1_miim
|
||||
+ &gmac1_tx_bus2
|
||||
+ &gmac1_rx_bus2
|
||||
+ &gmac1_rgmii_clk
|
||||
+ &gmac1_rgmii_bus>;
|
||||
+
|
||||
+ tx_delay = <0x42>;
|
||||
+ /* rx_delay = <0x3f>; */
|
||||
+
|
||||
+ phy-handle = <&rgmii_phy1>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&mdio1 {
|
||||
+ rgmii_phy1: phy@1 {
|
||||
+ compatible = "ethernet-phy-ieee802.3-c22";
|
||||
+ reg = <0x1>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&hdmi0 {
|
||||
+ enable-gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
|
||||
+ cec-enable;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi0_in_vp0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi0_sound {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdptxphy_hdmi0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&route_hdmi0{
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2s5_8ch {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2s1_8ch {
|
||||
+ status = "disabled";
|
||||
+ rockchip,i2s-tx-route = <3 2 1 0>;
|
||||
+ rockchip,i2s-rx-route = <1 3 2 0>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&i2s1m0_sclk
|
||||
+ &i2s1m0_lrck
|
||||
+ &i2s1m0_sdi1
|
||||
+ &i2s1m0_sdo3>;
|
||||
+};
|
||||
+
|
||||
+&i2c0 {
|
||||
+ status = "okay";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&i2c0m2_xfer>;
|
||||
+
|
||||
+ vdd_cpu_big0_s0: vdd_cpu_big0_mem_s0: rk8602@42 {
|
||||
+ compatible = "rockchip,rk8602";
|
||||
+ reg = <0x42>;
|
||||
+ vin-supply = <&vcc5v0_sys>;
|
||||
+ regulator-compatible = "rk860x-reg";
|
||||
+ regulator-name = "vdd_cpu_big0_s0";
|
||||
+ regulator-min-microvolt = <550000>;
|
||||
+ regulator-max-microvolt = <1050000>;
|
||||
+ regulator-ramp-delay = <2300>;
|
||||
+ rockchip,suspend-voltage-selector = <1>;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_cpu_big1_s0: vdd_cpu_big1_mem_s0: rk8603@43 {
|
||||
+ compatible = "rockchip,rk8603";
|
||||
+ reg = <0x43>;
|
||||
+ vin-supply = <&vcc5v0_sys>;
|
||||
+ regulator-compatible = "rk860x-reg";
|
||||
+ regulator-name = "vdd_cpu_big1_s0";
|
||||
+ regulator-min-microvolt = <550000>;
|
||||
+ regulator-max-microvolt = <1050000>;
|
||||
+ regulator-ramp-delay = <2300>;
|
||||
+ rockchip,suspend-voltage-selector = <1>;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c2 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ vdd_npu_s0: vdd_npu_mem_s0: rk8602@42 {
|
||||
+ compatible = "rockchip,rk8602";
|
||||
+ reg = <0x42>;
|
||||
+ vin-supply = <&vcc5v0_sys>;
|
||||
+ regulator-compatible = "rk860x-reg";
|
||||
+ regulator-name = "vdd_npu_s0";
|
||||
+ regulator-min-microvolt = <550000>;
|
||||
+ regulator-max-microvolt = <950000>;
|
||||
+ regulator-ramp-delay = <2300>;
|
||||
+ rockchip,suspend-voltage-selector = <1>;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c3 {
|
||||
+ status = "okay";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&i2c3m1_xfer>;
|
||||
+
|
||||
+ hym8563: hym8563@51 {
|
||||
+ compatible = "haoyu,hym8563";
|
||||
+ reg = <0x51>;
|
||||
+ #clock-cells = <0>;
|
||||
+ clock-frequency = <32768>;
|
||||
+ clock-output-names = "hym8563";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&hym8563_int>;
|
||||
+ interrupt-parent = <&gpio0>;
|
||||
+ interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ wakeup-source;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pwm7 {
|
||||
+ compatible = "rockchip,remotectl-pwm";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pwm7m0_pins>;
|
||||
+ remote_pwm_id = <3>;
|
||||
+ handle_cpu_id = <1>;
|
||||
+ remote_support_psci = <0>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ ir_key1 {
|
||||
+ rockchip,usercode = <0xfb04>;
|
||||
+ rockchip,key_table =
|
||||
+ <0xa3 KEY_ENTER>,
|
||||
+ <0xe4 388>,
|
||||
+ <0xf5 KEY_BACK>,
|
||||
+ <0xbb KEY_UP>,
|
||||
+ <0xe2 KEY_DOWN>,
|
||||
+ <0xe3 KEY_LEFT>,
|
||||
+ <0xb7 KEY_RIGHT>,
|
||||
+ <0xe0 KEY_HOME>,
|
||||
+ <0xba KEY_VOLUMEUP>,
|
||||
+ <0xda KEY_VOLUMEUP>,
|
||||
+ <0xe6 KEY_VOLUMEDOWN>,
|
||||
+ <0xdb KEY_VOLUMEDOWN>,
|
||||
+ <0xbc KEY_SEARCH>,
|
||||
+ <0xb2 KEY_POWER>,
|
||||
+ <0xe5 KEY_POWER>,
|
||||
+ <0xde KEY_POWER>,
|
||||
+ <0xdc KEY_MUTE>,
|
||||
+ <0xa2 KEY_MENU>,
|
||||
+ <0xec KEY_1>,
|
||||
+ <0xef KEY_2>,
|
||||
+ <0xee KEY_3>,
|
||||
+ <0xf0 KEY_4>,
|
||||
+ <0xf3 KEY_5>,
|
||||
+ <0xf2 KEY_6>,
|
||||
+ <0xf4 KEY_7>,
|
||||
+ <0xf7 KEY_8>,
|
||||
+ <0xf6 KEY_9>,
|
||||
+ <0xb8 KEY_0>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+/* watchdog */
|
||||
+&wdt {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&mipi_dcphy0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&mipi_dcphy1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&rkcif {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&rkcif_mmu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&rkisp0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&isp0_mmu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&rkisp1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&isp1_mmu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+//phy2
|
||||
+&pcie2x1l1 {
|
||||
+ reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pcie2x1l2 {
|
||||
+ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdmmc {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ /delete-property/ vmmc-supply;
|
||||
+};
|
||||
+
|
||||
+&pinctrl
|
||||
+{
|
||||
+ gpio-func {
|
||||
+ leds_gpio: leds-gpio {
|
||||
+ rockchip,pins =
|
||||
+ <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&dsi0 {
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&dsi1 {
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&u2phy0_otg {
|
||||
+ phy-supply = <&vcc5v0_host>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&u2phy2_host {
|
||||
+ phy-supply = <&vcc5v0_host>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdhci {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&emmc_rstnout &emmc_bus8 &emmc_clk &emmc_cmd &emmc_data_strobe>;
|
||||
+};
|
||||
+
|
||||
+&pinctrl {
|
||||
+ usb {
|
||||
+ vcc5v0_host_en: vcc5v0-host-en {
|
||||
+ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ hym8563 {
|
||||
+ hym8563_int: hym8563-int {
|
||||
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ gpio-key {
|
||||
+ key1_pin: key1-pin {
|
||||
+ rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5.dtsi
|
||||
new file mode 100755
|
||||
index 000000000..8d565d8d7
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5.dtsi
|
||||
@@ -0,0 +1,306 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
|
||||
+ *
|
||||
+ */
|
||||
+
|
||||
+#include "dt-bindings/usb/pd.h"
|
||||
+#include "rk3588s.dtsi"
|
||||
+#include "rk3588s-orangepi.dtsi"
|
||||
+#include "rk3588-rk806-single.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ combophy_avdd0v85: combophy-avdd0v85 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "combophy_avdd0v85";
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <850000>;
|
||||
+ regulator-max-microvolt = <850000>;
|
||||
+ vin-supply = <&vdd_0v85_s0>;
|
||||
+ };
|
||||
+
|
||||
+ combophy_avdd1v8: combophy-avdd1v8 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "combophy_avdd1v8";
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ vin-supply = <&avcc_1v8_s0>;
|
||||
+ };
|
||||
+
|
||||
+ wireless_bluetooth: wireless-bluetooth {
|
||||
+ compatible = "bluetooth-platdata";
|
||||
+ clocks = <&hym8563>;
|
||||
+ clock-names = "ext_clock";
|
||||
+ uart_rts_gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_LOW>;
|
||||
+ pinctrl-names = "default", "rts_gpio";
|
||||
+ pinctrl-0 = <&uart9m2_rtsn>, <&bt_gpio>;
|
||||
+ pinctrl-1 = <&uart9_gpios>;
|
||||
+ BT,reset_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
|
||||
+ BT,wake_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ wireless_wlan: wireless-wlan {
|
||||
+ compatible = "wlan-platdata";
|
||||
+ wifi_chip_type = "ap6275p";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&wifi_host_wake_irq>, <&wifi_poweren_gpio>;
|
||||
+ WIFI,host_wake_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
|
||||
+ WIFI,poweren_gpio = <&gpio0 RK_PD0 GPIO_ACTIVE_HIGH>;
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ //vbus5v0_typec: vbus5v0-typec {
|
||||
+ // compatible = "regulator-fixed";
|
||||
+ // regulator-name = "vbus5v0_typec";
|
||||
+ // regulator-min-microvolt = <5000000>;
|
||||
+ // regulator-max-microvolt = <5000000>;
|
||||
+ // enable-active-high;
|
||||
+ // gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
|
||||
+ // vin-supply = <&vcc5v0_usb>;
|
||||
+ // pinctrl-names = "default";
|
||||
+ // pinctrl-0 = <&typec5v_pwren>;
|
||||
+ //};
|
||||
+};
|
||||
+
|
||||
+&pwm6 {
|
||||
+ status = "okay";
|
||||
+ pinctrl-names = "active";
|
||||
+ pinctrl-0 = <&pwm6m0_pins>;
|
||||
+};
|
||||
+
|
||||
+&pwm2 {
|
||||
+ status = "okay";
|
||||
+ pinctrl-names = "active";
|
||||
+ pinctrl-0 = <&pwm2m0_pins>;
|
||||
+};
|
||||
+
|
||||
+&backlight_1 {
|
||||
+ pwms = <&pwm6 0 25000 0>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&backlight {
|
||||
+ pwms = <&pwm2 0 25000 0>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&combphy0_ps {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&dp0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&dp0_in_vp1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&dp0_in_vp2 {
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&dp0_sound{
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&spdif_tx2{
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&mipi_dcphy0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&mipi_dcphy1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c6 {
|
||||
+ status = "disabled";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&i2c6m3_xfer>;
|
||||
+
|
||||
+ //usbc0: fusb302@22 {
|
||||
+ // compatible = "fcs,fusb302";
|
||||
+ // reg = <0x22>;
|
||||
+ // interrupt-parent = <&gpio0>;
|
||||
+ // interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ // pinctrl-names = "default";
|
||||
+ // pinctrl-0 = <&usbc0_int>;
|
||||
+ // vbus-supply = <&vbus5v0_typec>;
|
||||
+ // status = "disabled";
|
||||
+
|
||||
+ // ports {
|
||||
+ // #address-cells = <1>;
|
||||
+ // #size-cells = <0>;
|
||||
+
|
||||
+ // port@0 {
|
||||
+ // reg = <0>;
|
||||
+ // usbc0_role_sw: endpoint@0 {
|
||||
+ // remote-endpoint = <&dwc3_0_role_switch>;
|
||||
+ // };
|
||||
+ // };
|
||||
+ // };
|
||||
+
|
||||
+ // usb_con: connector {
|
||||
+ // compatible = "usb-c-connector";
|
||||
+ // label = "USB-C";
|
||||
+ // data-role = "dual";
|
||||
+ // power-role = "dual";
|
||||
+ // try-power-role = "sink";
|
||||
+ // op-sink-microwatt = <1000000>;
|
||||
+ // sink-pdos =
|
||||
+ // <PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>;
|
||||
+ // source-pdos =
|
||||
+ // <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
|
||||
+
|
||||
+ // altmodes {
|
||||
+ // #address-cells = <1>;
|
||||
+ // #size-cells = <0>;
|
||||
+
|
||||
+ // altmode@0 {
|
||||
+ // reg = <0>;
|
||||
+ // svid = <0xff01>;
|
||||
+ // vdo = <0xffffffff>;
|
||||
+ // };
|
||||
+ // };
|
||||
+
|
||||
+ // ports {
|
||||
+ // #address-cells = <1>;
|
||||
+ // #size-cells = <0>;
|
||||
+
|
||||
+ // port@0 {
|
||||
+ // reg = <0>;
|
||||
+ // usbc0_orien_sw: endpoint {
|
||||
+ // remote-endpoint = <&usbdp_phy0_orientation_switch>;
|
||||
+ // };
|
||||
+ // };
|
||||
+
|
||||
+ // port@1 {
|
||||
+ // reg = <1>;
|
||||
+ // dp_altmode_mux: endpoint {
|
||||
+ // remote-endpoint = <&usbdp_phy0_dp_altmode_mux>;
|
||||
+ // };
|
||||
+ // };
|
||||
+ // };
|
||||
+ // };
|
||||
+ //};
|
||||
+};
|
||||
+
|
||||
+&pcie2x1l1 {
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&pcie2x1l2 {
|
||||
+ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
|
||||
+ rockchip,skip-scan-in-resume;
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&pinctrl {
|
||||
+ lcd {
|
||||
+ lcd0_rst_gpio: lcd0-rst-gpio {
|
||||
+ rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ lcd1_rst_gpio: lcd1-rst-gpio {
|
||||
+ rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ usb-typec {
|
||||
+ usbc0_int: usbc0-int {
|
||||
+ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+
|
||||
+ typec5v_pwren: typec5v-pwren {
|
||||
+ rockchip,pins = <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ wireless-bluetooth {
|
||||
+ uart9_gpios: uart9-gpios {
|
||||
+ rockchip,pins = <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ bt_gpio: bt-gpio {
|
||||
+ rockchip,pins =
|
||||
+ <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
|
||||
+ <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ wireless-wlan {
|
||||
+ wifi_host_wake_irq: wifi-host-wake-irq {
|
||||
+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||
+ };
|
||||
+
|
||||
+ wifi_poweren_gpio: wifi-poweren-gpio {
|
||||
+ rockchip,pins = <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&u2phy0_otg {
|
||||
+ rockchip,typec-vbus-det;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart9 {
|
||||
+ status = "disabled";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&uart9m2_xfer &uart9m2_ctsn>;
|
||||
+};
|
||||
+
|
||||
+&usbdp_phy0 {
|
||||
+ //orientation-switch;
|
||||
+ //svid = <0xff01>;
|
||||
+ //sbu1-dc-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
|
||||
+ //sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
|
||||
+
|
||||
+ //port {
|
||||
+ // #address-cells = <1>;
|
||||
+ // #size-cells = <0>;
|
||||
+ // usbdp_phy0_orientation_switch: endpoint@0 {
|
||||
+ // reg = <0>;
|
||||
+ // remote-endpoint = <&usbc0_orien_sw>;
|
||||
+ // };
|
||||
+
|
||||
+ // usbdp_phy0_dp_altmode_mux: endpoint@1 {
|
||||
+ // reg = <1>;
|
||||
+ // remote-endpoint = <&dp_altmode_mux>;
|
||||
+ // };
|
||||
+ //};
|
||||
+};
|
||||
+
|
||||
+&usbdrd_dwc3_0 {
|
||||
+ status = "okay";
|
||||
+ dr_mode = "host";
|
||||
+ usb-role-switch;
|
||||
+ //port {
|
||||
+ // #address-cells = <1>;
|
||||
+ // #size-cells = <0>;
|
||||
+ // dwc3_0_role_switch: endpoint@0 {
|
||||
+ // reg = <0>;
|
||||
+ // remote-endpoint = <&usbc0_role_sw>;
|
||||
+ // };
|
||||
+ //};
|
||||
+};
|
||||
+
|
||||
+&combphy2_psu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbhost3_0 {
|
||||
+ dr_mode = "host";
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&usbhost_dwc3_0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
--
|
||||
2.34.1
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
Loading…
x
Reference in New Issue
Block a user