diff --git a/package/boot/uboot-rockchip-rk3588/Makefile b/package/boot/uboot-rockchip-rk3588/Makefile index 8270e5d9fd..d034870857 100644 --- a/package/boot/uboot-rockchip-rk3588/Makefile +++ b/package/boot/uboot-rockchip-rk3588/Makefile @@ -5,12 +5,11 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk -PKG_VERSION:=2023.04 -PKG_RELEASE:=$(AUTORELEASE) - -PKG_HASH:=e31cac91545ff41b71cec5d8c22afd695645cd6e2a442ccdacacd60534069341 - -PKG_MAINTAINER:=Tobias Maedel +PKG_SOURCE_PROTO:=git +PKG_SOURCE_URL=https://github.com/orangepi-xunlong/u-boot-orangepi +PKG_SOURCE_DATE:=2017-09 +PKG_SOURCE_VERSION:=d7c6b92f9e33283bea56dbaec7743f5ecb5a7f89 +PKG_MIRROR_HASH:=9c0d83c1a01a48173e47f63f7cb292347f0cebf4f0396d98616e0bfd5ce6f3fc include $(INCLUDE_DIR)/u-boot.mk include $(INCLUDE_DIR)/package.mk @@ -42,9 +41,8 @@ UBOOT_TARGETS := \ UBOOT_CONFIGURE_VARS += USE_PRIVATE_LIBGCC=yes UBOOT_MAKE_FLAGS += \ - PATH=$(PATH):$(STAGING_DIR_HOST)/bin \ BL31=$(STAGING_DIR_IMAGE)/$(ATF) \ - ROCKCHIP_TPL=$(STAGING_DIR_IMAGE)/$(TPL) + spl/u-boot-spl.bin u-boot.dtb u-boot.itb define Build/Configure $(call Build/Configure/U-Boot) @@ -55,6 +53,8 @@ endef define Build/InstallDev $(INSTALL_DIR) $(STAGING_DIR_IMAGE) + $(PKG_BUILD_DIR)/tools/mkimage -n rk3588 -T rksd -d \ + $(STAGING_DIR_IMAGE)/$(TPL):$(PKG_BUILD_DIR)/spl/u-boot-spl.bin $(PKG_BUILD_DIR)/idbloader.img $(CP) $(PKG_BUILD_DIR)/idbloader.img $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-idbloader.img $(CP) $(PKG_BUILD_DIR)/u-boot.itb $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-u-boot.itb endef diff --git a/package/boot/uboot-rockchip-rk3588/patches/001-Merge-rk3588-rock5b-of-https-gitlab.collabora.com-ha.patch b/package/boot/uboot-rockchip-rk3588/patches/001-Merge-rk3588-rock5b-of-https-gitlab.collabora.com-ha.patch deleted file mode 100644 index e25eb35744..0000000000 --- a/package/boot/uboot-rockchip-rk3588/patches/001-Merge-rk3588-rock5b-of-https-gitlab.collabora.com-ha.patch +++ /dev/null @@ -1,101227 +0,0 @@ -From df89b38ea95e2a4bef6167c5c547ecd35b2e79f8 Mon Sep 17 00:00:00 2001 -From: baiywt -Date: Thu, 20 Apr 2023 15:54:17 +0800 -Subject: [PATCH] Merge rk3588-rock5b of - https://gitlab.collabora.com/hardware-enablement/rockchip-3588/u-boot - ---- - .azure-pipelines.yml | 36 +- - .gitlab-ci-upstream.yml | 490 ++ - .gitlab-ci.yml | 492 +- - Kconfig | 18 +- - MAINTAINERS | 6 + - Makefile | 24 +- - api/Kconfig | 11 +- - arch/arc/dts/abilis_tb100.dts | 2 +- - arch/arc/dts/axc001.dtsi | 2 +- - arch/arc/dts/axc003.dtsi | 2 +- - arch/arc/dts/axs10x_mb.dtsi | 6 +- - arch/arc/dts/emsdp.dts | 2 +- - arch/arc/dts/hsdk-common.dtsi | 2 +- - arch/arc/dts/iot_devkit.dts | 2 +- - arch/arc/dts/nsim.dts | 2 +- - arch/arc/dts/skeleton.dtsi | 2 +- - arch/arm/Kconfig | 3 +- - arch/arm/cpu/arm926ejs/Makefile | 1 - - arch/arm/cpu/armv7/ls102xa/fdt.c | 12 - - arch/arm/cpu/armv7/s5p4418/cpu.c | 7 - - arch/arm/cpu/armv8/Kconfig | 4 + - arch/arm/cpu/armv8/cache.S | 50 +- - arch/arm/cpu/armv8/cache_v8.c | 298 +- - arch/arm/cpu/armv8/cpu.c | 30 +- - arch/arm/dts/Makefile | 6 +- - arch/arm/dts/am335x-brppt1-mmc-u-boot.dtsi | 48 +- - arch/arm/dts/am335x-brsmarc1.dts | 28 +- - arch/arm/dts/am335x-brxre1.dts | 22 +- - arch/arm/dts/am335x-evm-u-boot.dtsi | 22 +- - arch/arm/dts/am335x-evmsk-u-boot.dtsi | 4 +- - arch/arm/dts/am335x-guardian-u-boot.dtsi | 28 +- - arch/arm/dts/am335x-pdu001-u-boot.dtsi | 30 +- - arch/arm/dts/am335x-pxm50-u-boot.dtsi | 4 +- - arch/arm/dts/am335x-regor-rdk-u-boot.dtsi | 8 +- - arch/arm/dts/am335x-rut-u-boot.dtsi | 4 +- - .../dts/am335x-sancloud-bbe-lite-u-boot.dtsi | 18 +- - arch/arm/dts/am335x-shc-u-boot.dtsi | 20 +- - arch/arm/dts/am335x-wega-rdk-u-boot.dtsi | 14 +- - arch/arm/dts/am33xx-u-boot.dtsi | 2 +- - arch/arm/dts/am3517-evm-u-boot.dtsi | 18 +- - arch/arm/dts/am4372-generic-u-boot.dtsi | 4 +- - arch/arm/dts/am4372-u-boot.dtsi | 20 +- - arch/arm/dts/am437x-gp-evm-u-boot.dtsi | 24 +- - arch/arm/dts/am437x-idk-evm-u-boot.dtsi | 8 +- - arch/arm/dts/am437x-sk-evm-u-boot.dtsi | 8 +- - arch/arm/dts/armada-3720-eDPU-u-boot.dtsi | 6 +- - arch/arm/dts/armada-3720-uDPU-u-boot.dtsi | 6 +- - arch/arm/dts/armada-385-atl-x530-u-boot.dtsi | 2 +- - .../dts/armada-385-turris-omnia-u-boot.dtsi | 12 +- - arch/arm/dts/armada-388-clearfog-u-boot.dtsi | 19 +- - arch/arm/dts/armada-388-helios4-u-boot.dtsi | 20 +- - .../armada-38x-controlcenterdc-u-boot.dtsi | 12 +- - arch/arm/dts/armada-ap80x-quad.dtsi | 8 +- - .../arm/dts/armada-xp-theadorable-u-boot.dtsi | 2 +- - arch/arm/dts/ast2500-evb.dts | 8 +- - arch/arm/dts/ast2500-u-boot.dtsi | 8 +- - arch/arm/dts/ast2600-evb.dts | 6 +- - arch/arm/dts/ast2600-u-boot.dtsi | 10 +- - .../dts/at91-sam9x60_curiosity-u-boot.dtsi | 34 +- - arch/arm/dts/at91-sama5d27_giantboard.dts | 16 +- - arch/arm/dts/at91-sama5d27_som1_ek.dts | 24 +- - .../dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi | 20 +- - arch/arm/dts/at91-sama5d2_icp-u-boot.dtsi | 18 +- - arch/arm/dts/at91-sama5d2_ptc_ek.dts | 18 +- - arch/arm/dts/at91-sama5d2_xplained.dts | 38 +- - arch/arm/dts/at91-sama5d3_xplained.dts | 14 +- - arch/arm/dts/at91-sama5d4_xplained.dts | 20 +- - arch/arm/dts/at91-sama5d4ek.dts | 20 +- - arch/arm/dts/at91-sama7g5ek-u-boot.dtsi | 24 +- - arch/arm/dts/at91sam9260-smartweb.dts | 4 +- - arch/arm/dts/at91sam9260.dtsi | 26 +- - arch/arm/dts/at91sam9260ek.dts | 4 +- - arch/arm/dts/at91sam9261.dtsi | 26 +- - arch/arm/dts/at91sam9263.dtsi | 26 +- - arch/arm/dts/at91sam9263ek.dts | 4 +- - arch/arm/dts/at91sam9g15ek.dts | 2 +- - arch/arm/dts/at91sam9g20-taurus.dts | 6 +- - arch/arm/dts/at91sam9g20ek_common.dtsi | 4 +- - ...1sam9g25-gardena-smart-gateway-u-boot.dtsi | 2 +- - arch/arm/dts/at91sam9g35ek.dts | 2 +- - arch/arm/dts/at91sam9g45-corvus.dts | 4 +- - arch/arm/dts/at91sam9g45-gurnard.dts | 4 +- - arch/arm/dts/at91sam9g45.dtsi | 12 +- - arch/arm/dts/at91sam9m10g45ek.dts | 4 +- - arch/arm/dts/at91sam9n12.dtsi | 26 +- - arch/arm/dts/at91sam9n12ek.dts | 4 +- - arch/arm/dts/at91sam9rl.dtsi | 30 +- - arch/arm/dts/at91sam9rlek.dts | 4 +- - arch/arm/dts/at91sam9x35ek.dts | 2 +- - arch/arm/dts/at91sam9x5.dtsi | 14 +- - arch/arm/dts/at91sam9x5dm.dtsi | 4 +- - arch/arm/dts/at91sam9x5ek.dtsi | 4 +- - arch/arm/dts/bcm283x-u-boot.dtsi | 10 +- - arch/arm/dts/bcm63158.dtsi | 4 +- - arch/arm/dts/bcm6855.dtsi | 4 +- - arch/arm/dts/bcm6856.dtsi | 4 +- - arch/arm/dts/bcm6858.dtsi | 4 +- - arch/arm/dts/bcm96753ref.dts | 2 +- - arch/arm/dts/bcm968360bg.dts | 2 +- - arch/arm/dts/bcm968580xref.dts | 2 +- - arch/arm/dts/bitmain-antminer-s9.dts | 4 +- - arch/arm/dts/ca-presidio-engboard.dts | 2 +- - arch/arm/dts/da850-evm-u-boot.dtsi | 12 +- - arch/arm/dts/da850-lcdk-u-boot.dtsi | 8 +- - arch/arm/dts/dm8168-evm-u-boot.dtsi | 2 +- - arch/arm/dts/dra7-evm-u-boot.dtsi | 18 +- - arch/arm/dts/dra7-ipu-common-early-boot.dtsi | 40 +- - arch/arm/dts/dra71-evm-u-boot.dtsi | 20 +- - arch/arm/dts/dra72-evm-revc-u-boot.dtsi | 20 +- - arch/arm/dts/dra72-evm-u-boot.dtsi | 8 +- - arch/arm/dts/dra76-evm-u-boot.dtsi | 14 +- - arch/arm/dts/dragonboard410c-uboot.dtsi | 12 +- - arch/arm/dts/dragonboard820c-uboot.dtsi | 12 +- - arch/arm/dts/dragonboard845c-uboot.dtsi | 8 +- - arch/arm/dts/exynos5.dtsi | 4 +- - arch/arm/dts/exynos5422-odroidxu3.dts | 2 +- - arch/arm/dts/exynos7420.dtsi | 14 +- - arch/arm/dts/exynos78x0.dtsi | 6 +- - arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi | 66 +- - arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi | 76 +- - arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi | 56 +- - arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi | 64 +- - arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi | 76 +- - arch/arm/dts/fsl-imx8qxp-mek.dts | 2 +- - .../dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi | 18 +- - arch/arm/dts/fsl-ls1088a-qds.dtsi | 2 +- - arch/arm/dts/fsl-ls1088a-rdb.dts | 6 +- - arch/arm/dts/fsl-ls2080a.dtsi | 57 +- - arch/arm/dts/fsl-ls2088a-rdb-qspi.dts | 2 +- - arch/arm/dts/fsl-lx2160a-qds.dtsi | 2 +- - arch/arm/dts/fsl-lx2160a-rdb.dts | 2 +- - arch/arm/dts/hi3660-hikey960-u-boot.dtsi | 2 +- - arch/arm/dts/hi6220-hikey-u-boot.dtsi | 4 +- - arch/arm/dts/hpe-gxp-u-boot.dtsi | 4 +- - arch/arm/dts/imx28-xea-u-boot.dtsi | 16 +- - arch/arm/dts/imx53-m53menlo-u-boot.dtsi | 18 +- - arch/arm/dts/imx53-ppd-uboot.dtsi | 10 +- - arch/arm/dts/imx6dl-brppt2.dts | 18 +- - .../dts/imx6dl-colibri-eval-v3-u-boot.dtsi | 2 +- - arch/arm/dts/imx6dl-icore-mipi-u-boot.dtsi | 2 +- - arch/arm/dts/imx6dl-mamoj-u-boot.dtsi | 4 +- - arch/arm/dts/imx6q-apalis-eval-u-boot.dtsi | 2 +- - arch/arm/dts/imx6q-bosch-acc-u-boot.dtsi | 32 +- - arch/arm/dts/imx6q-display5-u-boot.dtsi | 6 +- - arch/arm/dts/imx6q-icore-mipi-u-boot.dtsi | 2 +- - arch/arm/dts/imx6q-kp-u-boot.dtsi | 22 +- - arch/arm/dts/imx6q-logicpd-u-boot.dtsi | 12 +- - .../imx6q-phytec-mira-rdk-nand-u-boot.dtsi | 18 +- - arch/arm/dts/imx6q-tbs2910-u-boot.dtsi | 8 +- - .../arm/dts/imx6qdl-aristainetos2-u-boot.dtsi | 22 +- - .../dts/imx6qdl-aristainetos2c-u-boot.dtsi | 22 +- - .../imx6qdl-aristainetos2c_cslb-u-boot.dtsi | 22 +- - ...qdl-hummingboard2-emmc-som-v15-u-boot.dtsi | 20 +- - arch/arm/dts/imx6qdl-icore-rqs-u-boot.dtsi | 8 +- - arch/arm/dts/imx6qdl-icore-u-boot.dtsi | 14 +- - arch/arm/dts/imx6qdl-sabreauto-u-boot.dtsi | 4 +- - arch/arm/dts/imx6qdl-sabresd-u-boot.dtsi | 4 +- - arch/arm/dts/imx6qdl-u-boot.dtsi | 16 +- - arch/arm/dts/imx6sll-evk-u-boot.dtsi | 2 +- - arch/arm/dts/imx6sx-sabreauto-u-boot.dtsi | 2 +- - .../arm/dts/imx6sx-udoo-neo-basic-u-boot.dtsi | 8 +- - arch/arm/dts/imx6ul-14x14-evk-u-boot.dtsi | 10 +- - arch/arm/dts/imx6ul-geam-u-boot.dtsi | 8 +- - arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi | 2 +- - arch/arm/dts/imx6ul-isiot-u-boot.dtsi | 14 +- - arch/arm/dts/imx6ul-opos6ul-u-boot.dtsi | 10 +- - arch/arm/dts/imx6ul-opos6uldev-u-boot.dtsi | 10 +- - arch/arm/dts/imx6ul-u-boot.dtsi | 12 +- - arch/arm/dts/imx6ull-14x14-evk-u-boot.dtsi | 2 +- - .../dts/imx6ull-colibri-eval-v3-u-boot.dtsi | 10 +- - arch/arm/dts/imx6ull-dart-6ul.dtsi | 10 +- - arch/arm/dts/imx6ull-mys-6ulx-u-boot.dtsi | 14 +- - .../dts/imx6ull-seeed-npi-imx6ull-u-boot.dtsi | 14 +- - arch/arm/dts/imx6ull-u-boot.dtsi | 14 +- - arch/arm/dts/imx6ulz-14x14-evk-u-boot.dtsi | 2 +- - arch/arm/dts/imx6ulz-bsh-smm-m2-u-boot.dtsi | 16 +- - arch/arm/dts/imx7-cm-u-boot.dtsi | 6 +- - .../arm/dts/imx7d-colibri-eval-v3-u-boot.dtsi | 2 +- - arch/arm/dts/imx7d-pico-pi-u-boot.dtsi | 2 +- - arch/arm/dts/imx7s-warp-u-boot.dtsi | 8 +- - arch/arm/dts/imx7ulp-com-u-boot.dtsi | 16 +- - arch/arm/dts/imx7ulp-uboot.dtsi | 18 +- - arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi | 48 +- - .../dts/imx8mm-cl-iot-gate-optee-u-boot.dtsi | 42 +- - arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi | 44 +- - .../dts/imx8mm-data-modul-edm-sbc-u-boot.dtsi | 44 +- - arch/arm/dts/imx8mm-evk-u-boot.dtsi | 60 +- - .../imx8mm-icore-mx8mm-ctouch2-u-boot.dtsi | 12 +- - .../imx8mm-icore-mx8mm-edimm2.2-u-boot.dtsi | 12 +- - arch/arm/dts/imx8mm-icore-mx8mm-u-boot.dtsi | 10 +- - .../dts/imx8mm-kontron-bl-common-u-boot.dtsi | 60 +- - arch/arm/dts/imx8mm-mx8menlo-u-boot.dtsi | 10 +- - arch/arm/dts/imx8mm-phg-u-boot.dtsi | 50 +- - arch/arm/dts/imx8mm-u-boot.dtsi | 30 +- - arch/arm/dts/imx8mm-venice-gw700x-u-boot.dtsi | 6 +- - arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi | 8 +- - arch/arm/dts/imx8mm-venice-gw7902-u-boot.dtsi | 8 +- - arch/arm/dts/imx8mm-venice-gw7903-u-boot.dtsi | 8 +- - arch/arm/dts/imx8mm-venice-gw7904-u-boot.dtsi | 8 +- - arch/arm/dts/imx8mm-venice-u-boot.dtsi | 36 +- - .../dts/imx8mm-verdin-wifi-dev-u-boot.dtsi | 40 +- - arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi | 32 +- - .../dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi | 24 +- - arch/arm/dts/imx8mn-bsh-smm-s2-u-boot.dtsi | 4 +- - arch/arm/dts/imx8mn-bsh-smm-s2pro-u-boot.dtsi | 4 +- - arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 38 +- - arch/arm/dts/imx8mn-evk-u-boot.dtsi | 10 +- - arch/arm/dts/imx8mn-u-boot.dtsi | 30 +- - .../dts/imx8mn-var-som-symphony-u-boot.dtsi | 32 +- - arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi | 8 +- - arch/arm/dts/imx8mn-venice-u-boot.dtsi | 32 +- - arch/arm/dts/imx8mp-dhcom-pdk2.dts | 14 +- - arch/arm/dts/imx8mp-dhcom-pdk3-u-boot.dtsi | 6 + - arch/arm/dts/imx8mp-dhcom-pdk3.dts | 321 + - arch/arm/dts/imx8mp-dhcom-som.dtsi | 46 +- - arch/arm/dts/imx8mp-dhcom-u-boot.dtsi | 60 +- - arch/arm/dts/imx8mp-evk-u-boot.dtsi | 60 +- - .../imx8mp-icore-mx8mp-edimm2.2-u-boot.dtsi | 58 +- - arch/arm/dts/imx8mp-msc-sm2s-u-boot.dtsi | 26 +- - .../imx8mp-phyboard-pollux-rdk-u-boot.dtsi | 36 +- - arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi | 56 +- - arch/arm/dts/imx8mp-u-boot.dtsi | 26 +- - arch/arm/dts/imx8mp-venice-gw74xx-u-boot.dtsi | 34 +- - arch/arm/dts/imx8mp-venice-u-boot.dtsi | 36 +- - .../dts/imx8mp-verdin-wifi-dev-u-boot.dtsi | 62 +- - arch/arm/dts/imx8mq-cm-u-boot.dtsi | 4 +- - arch/arm/dts/imx8mq-evk-u-boot.dtsi | 4 +- - arch/arm/dts/imx8mq-librem5-r4-u-boot.dtsi | 4 +- - arch/arm/dts/imx8mq-phanbell-u-boot.dtsi | 4 +- - arch/arm/dts/imx8mq-pico-pi-u-boot.dtsi | 4 +- - arch/arm/dts/imx8mq-u-boot.dtsi | 12 +- - arch/arm/dts/imx8qxp-capricorn-u-boot.dtsi | 64 +- - arch/arm/dts/imx8ulp-evk-u-boot.dtsi | 18 +- - arch/arm/dts/imx93-11x11-evk-u-boot.dtsi | 50 +- - arch/arm/dts/imxrt1020-evk-u-boot.dtsi | 40 +- - arch/arm/dts/imxrt1050-evk-u-boot.dtsi | 40 +- - arch/arm/dts/imxrt1170-evk-u-boot.dtsi | 44 +- - arch/arm/dts/k3-am625-r5-sk.dts | 26 +- - arch/arm/dts/k3-am625-sk-u-boot.dtsi | 60 +- - arch/arm/dts/k3-am62a-ddr.dtsi | 2 +- - arch/arm/dts/k3-am62a7-r5-sk.dts | 26 +- - arch/arm/dts/k3-am62a7-sk-u-boot.dtsi | 62 +- - arch/arm/dts/k3-am62a7-sk.dts | 5 +- - arch/arm/dts/k3-am64-ddr.dtsi | 2 +- - arch/arm/dts/k3-am642-evm-u-boot.dtsi | 44 +- - arch/arm/dts/k3-am642-r5-evm.dts | 32 +- - arch/arm/dts/k3-am642-r5-sk.dts | 26 +- - arch/arm/dts/k3-am642-sk-u-boot.dtsi | 72 +- - arch/arm/dts/k3-am65-iot2050-boot-image.dtsi | 149 +- - .../dts/k3-am65-iot2050-common-u-boot.dtsi | 44 +- - arch/arm/dts/k3-am654-ddr.dtsi | 2 +- - .../dts/k3-am654-r5-base-board-u-boot.dtsi | 68 +- - arch/arm/dts/k3-am654-r5-base-board.dts | 52 +- - ...050-advanced-m2-bkey-ekey-pcie-overlay.dts | 27 + - ...-iot2050-advanced-m2-bkey-usb3-overlay.dts | 47 + - .../arm/dts/k3-am6548-iot2050-advanced-m2.dts | 121 + - .../arm/dts/k3-am68-sk-base-board-u-boot.dtsi | 46 +- - arch/arm/dts/k3-am68-sk-r5-base-board.dts | 22 +- - .../k3-j7200-common-proc-board-u-boot.dtsi | 66 +- - .../arm/dts/k3-j7200-r5-common-proc-board.dts | 38 +- - .../k3-j721e-common-proc-board-u-boot.dtsi | 84 +- - arch/arm/dts/k3-j721e-ddr.dtsi | 2 +- - .../k3-j721e-r5-common-proc-board-u-boot.dtsi | 4 +- - .../arm/dts/k3-j721e-r5-common-proc-board.dts | 38 +- - arch/arm/dts/k3-j721e-r5-sk-u-boot.dtsi | 4 +- - arch/arm/dts/k3-j721e-r5-sk.dts | 32 +- - arch/arm/dts/k3-j721e-sk-u-boot.dtsi | 70 +- - .../k3-j721s2-common-proc-board-u-boot.dtsi | 48 +- - arch/arm/dts/k3-j721s2-ddr.dtsi | 6 +- - .../dts/k3-j721s2-r5-common-proc-board.dts | 22 +- - arch/arm/dts/keystone-k2e-evm-u-boot.dtsi | 4 +- - arch/arm/dts/keystone-k2g-evm-u-boot.dtsi | 6 +- - arch/arm/dts/keystone-k2g-generic-u-boot.dtsi | 6 +- - arch/arm/dts/keystone-k2g-ice-u-boot.dtsi | 6 +- - arch/arm/dts/keystone-k2hk-evm-u-boot.dtsi | 4 +- - .../kirkwood-pogoplug-series-4-u-boot.dtsi | 2 +- - .../logicpd-som-lv-35xx-devkit-u-boot.dtsi | 16 +- - .../logicpd-som-lv-37xx-devkit-u-boot.dtsi | 16 +- - .../logicpd-torpedo-35xx-devkit-u-boot.dtsi | 16 +- - .../logicpd-torpedo-37xx-devkit-u-boot.dtsi | 14 +- - arch/arm/dts/ls1021a-twr-u-boot.dtsi | 14 +- - arch/arm/dts/meson-g12-common-u-boot.dtsi | 4 +- - arch/arm/dts/meson-gx-u-boot.dtsi | 4 +- - arch/arm/dts/mt7622-bananapi-bpi-r64.dts | 2 +- - arch/arm/dts/mt7622-rfb.dts | 4 +- - arch/arm/dts/mt7622-u-boot.dtsi | 12 +- - arch/arm/dts/mt7623-u-boot.dtsi | 12 +- - arch/arm/dts/mt7629-rfb-u-boot.dtsi | 18 +- - arch/arm/dts/mt7629-rfb.dts | 8 +- - arch/arm/dts/mt7981.dtsi | 14 +- - arch/arm/dts/mt7986-u-boot.dtsi | 14 +- - arch/arm/dts/mt7986.dtsi | 8 +- - arch/arm/dts/mt8516-u-boot.dtsi | 10 +- - arch/arm/dts/mvebu-u-boot.dtsi | 12 +- - arch/arm/dts/omap3-u-boot.dtsi | 34 +- - arch/arm/dts/omap5-u-boot.dtsi | 40 +- - arch/arm/dts/phycore-imx8mm-u-boot.dtsi | 30 +- - arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi | 30 +- - arch/arm/dts/px30-u-boot.dtsi | 30 +- - arch/arm/dts/qcom-ipq4019.dtsi | 10 +- - arch/arm/dts/qcs404-evb-uboot.dtsi | 8 +- - arch/arm/dts/r7s72100-gr-peach-u-boot.dts | 10 +- - arch/arm/dts/r8a774a1-u-boot.dtsi | 2 +- - arch/arm/dts/r8a774b1-u-boot.dtsi | 2 +- - arch/arm/dts/r8a774e1-u-boot.dtsi | 2 +- - arch/arm/dts/r8a7790-lager-u-boot.dts | 2 +- - arch/arm/dts/r8a7790-stout-u-boot.dts | 2 +- - arch/arm/dts/r8a7790-u-boot.dtsi | 6 +- - arch/arm/dts/r8a7791-koelsch-u-boot.dts | 2 +- - arch/arm/dts/r8a7791-porter-u-boot.dts | 2 +- - arch/arm/dts/r8a7791-u-boot.dtsi | 6 +- - arch/arm/dts/r8a7792-blanche-u-boot.dts | 2 +- - arch/arm/dts/r8a7792-u-boot.dtsi | 4 +- - arch/arm/dts/r8a7793-gose-u-boot.dts | 2 +- - arch/arm/dts/r8a7793-u-boot.dtsi | 6 +- - arch/arm/dts/r8a7794-alt-u-boot.dts | 2 +- - arch/arm/dts/r8a7794-silk-u-boot.dts | 2 +- - arch/arm/dts/r8a7794-u-boot.dtsi | 6 +- - arch/arm/dts/r8a77950-salvator-x-u-boot.dts | 6 +- - arch/arm/dts/r8a77950-u-boot.dtsi | 2 +- - arch/arm/dts/r8a77950-ulcb-u-boot.dts | 6 +- - arch/arm/dts/r8a77960-salvator-x-u-boot.dts | 6 +- - arch/arm/dts/r8a77960-u-boot.dtsi | 2 +- - arch/arm/dts/r8a77960-ulcb-u-boot.dts | 6 +- - arch/arm/dts/r8a77965-salvator-x-u-boot.dts | 6 +- - arch/arm/dts/r8a77965-u-boot.dtsi | 2 +- - arch/arm/dts/r8a77965-ulcb-u-boot.dts | 6 +- - arch/arm/dts/r8a77970-u-boot.dtsi | 2 +- - arch/arm/dts/r8a77980-condor-u-boot.dts | 6 +- - arch/arm/dts/r8a77980-u-boot.dtsi | 2 +- - arch/arm/dts/r8a77990-ebisu-u-boot.dts | 6 +- - arch/arm/dts/r8a77995-draak-u-boot.dts | 6 +- - arch/arm/dts/r8a779a0-u-boot.dtsi | 2 +- - arch/arm/dts/r8a779x-u-boot.dtsi | 8 +- - arch/arm/dts/rk3036-sdk-u-boot.dtsi | 6 +- - arch/arm/dts/rk3066a-mk808-u-boot.dtsi | 8 +- - arch/arm/dts/rk3128-evb-u-boot.dtsi | 2 +- - arch/arm/dts/rk3128-u-boot.dtsi | 6 +- - arch/arm/dts/rk3188-radxarock-u-boot.dtsi | 10 +- - arch/arm/dts/rk3229-evb-u-boot.dtsi | 4 +- - arch/arm/dts/rk322x-u-boot.dtsi | 8 +- - arch/arm/dts/rk3288-evb-u-boot.dtsi | 20 +- - arch/arm/dts/rk3288-firefly-u-boot.dtsi | 30 +- - arch/arm/dts/rk3288-miqi-u-boot.dtsi | 20 +- - arch/arm/dts/rk3288-phycore-rdk-u-boot.dtsi | 14 +- - arch/arm/dts/rk3288-popmetal-u-boot.dtsi | 20 +- - arch/arm/dts/rk3288-rock-pi-n8-u-boot.dtsi | 8 +- - arch/arm/dts/rk3288-rock2-square-u-boot.dtsi | 8 +- - arch/arm/dts/rk3288-tinker-s-u-boot.dtsi | 10 +- - arch/arm/dts/rk3288-tinker-u-boot.dtsi | 32 +- - arch/arm/dts/rk3288-u-boot.dtsi | 18 +- - arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi | 8 +- - arch/arm/dts/rk3288-veyron-u-boot.dtsi | 20 +- - arch/arm/dts/rk3288-vyasa-u-boot.dtsi | 8 +- - arch/arm/dts/rk3308-evb-u-boot.dtsi | 2 +- - arch/arm/dts/rk3308-roc-cc-u-boot.dtsi | 2 +- - arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi | 2 +- - arch/arm/dts/rk3308-u-boot.dtsi | 10 +- - arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi | 32 +- - arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 10 +- - arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 10 +- - arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 10 +- - arch/arm/dts/rk3328-rock64-u-boot.dtsi | 12 +- - arch/arm/dts/rk3328-u-boot.dtsi | 14 +- - arch/arm/dts/rk3368-geekbox-u-boot.dtsi | 14 +- - arch/arm/dts/rk3368-lion-haikou-u-boot.dtsi | 28 +- - arch/arm/dts/rk3368-px5-evb-u-boot.dtsi | 22 +- - arch/arm/dts/rk3368-sheep-u-boot.dtsi | 14 +- - arch/arm/dts/rk3399-evb-u-boot.dtsi | 6 +- - arch/arm/dts/rk3399-gru-u-boot.dtsi | 2 +- - arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 6 +- - arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi | 4 +- - arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi | 20 +- - arch/arm/dts/rk3399-roc-pc-u-boot.dtsi | 2 +- - arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 2 +- - arch/arm/dts/rk3399-u-boot.dtsi | 38 +- - arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi | 2 +- - arch/arm/dts/rk3568-evb-u-boot.dtsi | 2 +- - arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 2 +- - arch/arm/dts/rk356x-u-boot.dtsi | 14 +- - .../dts/rk3588-edgeble-neu6a-io-u-boot.dtsi | 2 - - arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 150 +- - arch/arm/dts/rk3588s-u-boot.dtsi | 207 +- - arch/arm/dts/rk3588s.dtsi | 15 + - arch/arm/dts/rk3xxx-u-boot.dtsi | 8 +- - arch/arm/dts/rv1108-u-boot.dtsi | 2 +- - arch/arm/dts/rv1126-u-boot.dtsi | 24 +- - arch/arm/dts/rz-g2-beacon-u-boot.dtsi | 10 +- - arch/arm/dts/s5p4418.dtsi | 4 +- - arch/arm/dts/s700-u-boot.dtsi | 6 +- - arch/arm/dts/s900-u-boot.dtsi | 6 +- - arch/arm/dts/sam9x60ek-u-boot.dtsi | 36 +- - arch/arm/dts/sama5d2.dtsi | 52 +- - arch/arm/dts/sama5d27_som1.dtsi | 8 +- - arch/arm/dts/sama5d3.dtsi | 72 +- - arch/arm/dts/sama5d3xdm.dtsi | 6 +- - arch/arm/dts/sama5d3xmb.dtsi | 18 +- - arch/arm/dts/sama5d3xmb_cmp.dtsi | 4 +- - arch/arm/dts/sama5d4.dtsi | 50 +- - arch/arm/dts/socfpga-common-u-boot.dtsi | 10 +- - arch/arm/dts/socfpga_agilex-u-boot.dtsi | 20 +- - arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi | 6 +- - arch/arm/dts/socfpga_arria10-handoff.dtsi | 42 +- - arch/arm/dts/socfpga_arria10-u-boot.dtsi | 44 +- - .../dts/socfpga_arria10_handoff_u-boot.dtsi | 44 +- - .../socfpga_arria10_mercury_aa1-u-boot.dtsi | 20 +- - .../arm/dts/socfpga_arria10_socdk-u-boot.dtsi | 4 +- - .../socfpga_arria10_socdk_sdmmc-u-boot.dtsi | 14 +- - arch/arm/dts/socfpga_arria5_secu1.dts | 6 +- - arch/arm/dts/socfpga_arria5_socdk-u-boot.dtsi | 8 +- - arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts | 4 +- - .../socfpga_cyclone5_de0_nano_soc-u-boot.dtsi | 4 +- - arch/arm/dts/socfpga_cyclone5_de10_nano.dts | 4 +- - .../dts/socfpga_cyclone5_de10_standard.dts | 4 +- - arch/arm/dts/socfpga_cyclone5_de1_soc.dts | 4 +- - arch/arm/dts/socfpga_cyclone5_is1.dts | 8 +- - .../dts/socfpga_cyclone5_mcvevk-u-boot.dtsi | 4 +- - .../dts/socfpga_cyclone5_socdk-u-boot.dtsi | 8 +- - .../dts/socfpga_cyclone5_sockit-u-boot.dtsi | 8 +- - .../dts/socfpga_cyclone5_socrates-u-boot.dtsi | 8 +- - arch/arm/dts/socfpga_cyclone5_sr1500.dts | 8 +- - .../socfpga_cyclone5_vining_fpga-u-boot.dtsi | 10 +- - arch/arm/dts/socfpga_n5x-u-boot.dtsi | 26 +- - arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi | 6 +- - arch/arm/dts/socfpga_stratix10.dtsi | 10 +- - .../dts/socfpga_stratix10_socdk-u-boot.dtsi | 10 +- - arch/arm/dts/socfpga_stratix10_socdk.dts | 2 +- - arch/arm/dts/starqltechn-uboot.dtsi | 12 +- - arch/arm/dts/stm32429i-eval-u-boot.dtsi | 54 +- - arch/arm/dts/stm32746g-eval-u-boot.dtsi | 8 +- - arch/arm/dts/stm32f429-disco-u-boot.dtsi | 52 +- - arch/arm/dts/stm32f469-disco-u-boot.dtsi | 54 +- - arch/arm/dts/stm32f7-u-boot.dtsi | 38 +- - arch/arm/dts/stm32f746-disco-u-boot.dtsi | 12 +- - arch/arm/dts/stm32f769-disco-u-boot.dtsi | 12 +- - arch/arm/dts/stm32h7-u-boot.dtsi | 44 +- - arch/arm/dts/stm32mp13-u-boot.dtsi | 46 +- - arch/arm/dts/stm32mp135f-dk-u-boot.dtsi | 8 +- - arch/arm/dts/stm32mp15-ddr.dtsi | 2 +- - arch/arm/dts/stm32mp15-scmi-u-boot.dtsi | 46 +- - arch/arm/dts/stm32mp15-u-boot.dtsi | 64 +- - arch/arm/dts/stm32mp157a-dk1-scmi-u-boot.dtsi | 8 +- - arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi | 34 +- - ...2mp157a-icore-stm32mp1-ctouch2-u-boot.dtsi | 16 +- - ...mp157a-icore-stm32mp1-edimm2.2-u-boot.dtsi | 16 +- - .../stm32mp157a-icore-stm32mp1-u-boot.dtsi | 28 +- - ...rogea-stm32mp1-microdev2.0-of7-u-boot.dtsi | 16 +- - ...-microgea-stm32mp1-microdev2.0-u-boot.dtsi | 16 +- - .../stm32mp157a-microgea-stm32mp1-u-boot.dtsi | 14 +- - arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi | 8 +- - arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi | 48 +- - arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi | 20 +- - .../dts/stm32mp157c-odyssey-som-u-boot.dtsi | 26 +- - arch/arm/dts/stm32mp157c-odyssey-u-boot.dtsi | 16 +- - arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi | 90 +- - .../stm32mp15xx-dhcor-avenger96-u-boot.dtsi | 36 +- - .../stm32mp15xx-dhcor-drc-compact-u-boot.dtsi | 34 +- - .../stm32mp15xx-dhcor-testbench-u-boot.dtsi | 34 +- - arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi | 56 +- - arch/arm/dts/t8103-u-boot.dtsi | 12 +- - arch/arm/dts/tegra124-nyan-big-u-boot.dtsi | 4 +- - arch/arm/dts/tegra20-u-boot.dtsi | 4 +- - arch/arm/dts/uniphier-ld11-global.dts | 4 + - arch/arm/dts/uniphier-ld11-ref.dts | 6 +- - arch/arm/dts/uniphier-ld11.dtsi | 94 +- - arch/arm/dts/uniphier-ld20.dtsi | 150 +- - arch/arm/dts/uniphier-ld4-ref.dts | 10 +- - arch/arm/dts/uniphier-ld4.dtsi | 76 +- - arch/arm/dts/uniphier-pro4-ace.dts | 8 + - arch/arm/dts/uniphier-pro4-ref.dts | 18 +- - arch/arm/dts/uniphier-pro4-sanji.dts | 6 +- - arch/arm/dts/uniphier-pro4.dtsi | 247 +- - arch/arm/dts/uniphier-pro5.dtsi | 101 +- - arch/arm/dts/uniphier-pxs2-gentil.dts | 4 + - arch/arm/dts/uniphier-pxs2.dtsi | 197 +- - arch/arm/dts/uniphier-pxs3-ref.dts | 18 +- - arch/arm/dts/uniphier-pxs3.dtsi | 248 +- - arch/arm/dts/uniphier-sld8-ref.dts | 10 +- - arch/arm/dts/uniphier-sld8.dtsi | 77 +- - arch/arm/dts/uniphier-v7-u-boot.dtsi | 24 +- - arch/arm/dts/versal-mini-emmc0.dts | 4 +- - arch/arm/dts/versal-mini-emmc1.dts | 4 +- - arch/arm/dts/versal-mini-ospi.dtsi | 4 +- - arch/arm/dts/versal-mini-qspi.dtsi | 4 +- - arch/arm/dts/versal-mini.dts | 2 +- - arch/arm/dts/versal-net-mini.dts | 8 +- - arch/arm/dts/vf610-bk4r1-u-boot.dtsi | 10 +- - .../arm/dts/vf610-colibri-eval-v3-u-boot.dtsi | 12 +- - arch/arm/dts/zynq-7000.dtsi | 22 +- - arch/arm/dts/zynq-cc108.dts | 2 +- - arch/arm/dts/zynq-cse-nand.dts | 10 +- - arch/arm/dts/zynq-cse-nor.dts | 12 +- - arch/arm/dts/zynq-cse-qspi.dtsi | 10 +- - arch/arm/dts/zynq-dlc20-rev1.0.dts | 6 +- - arch/arm/dts/zynq-microzed.dts | 6 +- - arch/arm/dts/zynq-minized.dts | 2 +- - arch/arm/dts/zynq-picozed.dts | 6 +- - arch/arm/dts/zynq-syzygy-hub.dts | 4 +- - arch/arm/dts/zynq-topic-miami.dts | 6 +- - arch/arm/dts/zynq-zc702.dts | 10 +- - arch/arm/dts/zynq-zc706.dts | 6 +- - arch/arm/dts/zynq-zc770-xm010.dts | 2 +- - arch/arm/dts/zynq-zc770-xm011.dts | 2 +- - arch/arm/dts/zynq-zc770-xm012.dts | 2 +- - arch/arm/dts/zynq-zc770-xm013.dts | 2 +- - arch/arm/dts/zynq-zed.dts | 6 +- - arch/arm/dts/zynq-zturn-common.dtsi | 10 +- - arch/arm/dts/zynq-zybo-z7.dts | 6 +- - arch/arm/dts/zynq-zybo.dts | 6 +- - arch/arm/dts/zynqmp-a2197-revA.dts | 12 +- - arch/arm/dts/zynqmp-clk-ccf.dtsi | 12 +- - arch/arm/dts/zynqmp-dlc21-revA.dts | 6 +- - arch/arm/dts/zynqmp-mini-emmc0.dts | 4 +- - arch/arm/dts/zynqmp-mini-emmc1.dts | 4 +- - arch/arm/dts/zynqmp-mini-nand.dts | 2 +- - arch/arm/dts/zynqmp-mini-qspi.dts | 2 +- - arch/arm/dts/zynqmp-mini.dts | 2 +- - arch/arm/dts/zynqmp-r5.dts | 6 +- - arch/arm/dts/zynqmp-sck-kr-g-revA.dts | 2 +- - arch/arm/dts/zynqmp-sck-kr-g-revB.dts | 2 +- - arch/arm/dts/zynqmp-sck-kv-g-revA.dts | 4 +- - arch/arm/dts/zynqmp-sck-kv-g-revB.dts | 4 +- - arch/arm/dts/zynqmp-sm-k26-revA.dts | 6 +- - arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 2 + - arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts | 119 +- - arch/arm/dts/zynqmp-zcu100-revC.dts | 2 +- - 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arch/arm/mach-mvebu/include/mach/soc.h | 41 +- - arch/arm/mach-mvebu/kwbimage.cfg.in | 5 + - .../serdes/a38x/high_speed_env_spec.c | 4 +- - .../serdes/a38x/high_speed_env_spec.h | 4 +- - arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c | 14 +- - arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h | 30 - - arch/arm/mach-mvebu/spl.c | 84 +- - arch/arm/mach-rmobile/Kconfig | 36 +- - arch/arm/mach-rmobile/Kconfig.32 | 3 - - arch/arm/mach-rmobile/Kconfig.64 | 208 +- - arch/arm/mach-rmobile/Kconfig.rcar3 | 201 + - arch/arm/mach-rmobile/Kconfig.rza1 | 3 - - arch/arm/mach-rmobile/cpu_info-rcar.c | 7 +- - arch/arm/mach-rockchip/Kconfig | 8 +- - arch/arm/mach-rockchip/rk3368/Kconfig | 2 + - .../mach-versal-net/include/mach/sys_proto.h | 7 +- - arch/arm/mach-versal/include/mach/sys_proto.h | 6 +- - arch/m68k/dts/M5208EVBE.dts | 2 +- - arch/m68k/dts/M5235EVB.dts | 2 +- - arch/m68k/dts/M5235EVB_Flash32.dts | 2 +- - arch/m68k/dts/M5249EVB.dts | 2 +- - arch/m68k/dts/M5253DEMO.dts | 2 +- - arch/m68k/dts/M5272C3.dts | 2 +- - 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arch/mips/dts/brcm,bcm6838.dtsi | 14 +- - arch/mips/dts/brcm,bcm968380gerg.dts | 2 +- - arch/mips/dts/comtrend,ar-5315u.dts | 2 +- - arch/mips/dts/comtrend,ar-5387un.dts | 2 +- - arch/mips/dts/comtrend,ct-5361.dts | 2 +- - arch/mips/dts/comtrend,vr-3032u.dts | 2 +- - arch/mips/dts/comtrend,wap-5813n.dts | 2 +- - arch/mips/dts/huawei,hg556a.dts | 2 +- - arch/mips/dts/img,boston.dts | 6 +- - arch/mips/dts/mrvl,cn73xx.dtsi | 6 +- - arch/mips/dts/mrvl,octeon-ebb7304.dts | 4 +- - arch/mips/dts/mrvl,octeon-nic23.dts | 4 +- - arch/mips/dts/mt7620-u-boot.dtsi | 4 +- - arch/mips/dts/mt7621-u-boot.dtsi | 16 +- - arch/mips/dts/mt7628-u-boot.dtsi | 16 +- - arch/mips/dts/mt7628a.dtsi | 2 +- - arch/mips/dts/mti,malta.dts | 2 +- - arch/mips/dts/netgear,cg3100d.dts | 2 +- - arch/mips/dts/netgear,dgnd3700v2.dts | 2 +- - arch/mips/dts/pic32mzda_sk.dts | 6 +- - arch/mips/dts/qca953x.dtsi | 2 +- - arch/mips/dts/sagem,f@st1704.dts | 2 +- - arch/mips/dts/sfr,nb4-ser.dts | 2 +- - arch/nios2/dts/10m50_devboard.dts | 2 +- - arch/powerpc/cpu/mpc83xx/cpu_init.c | 24 - - arch/powerpc/cpu/mpc83xx/elbc/Kconfig | 6 - - arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc0 | 733 -- - arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc1 | 733 -- - arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc2 | 733 -- - arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc3 | 733 -- - arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc4 | 733 -- - arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi | 18 +- - arch/powerpc/dts/km8321-uboot.dtsi | 26 +- - arch/powerpc/dts/km836x-uboot.dtsi | 26 +- - arch/powerpc/dts/kmcent2-u-boot.dtsi | 6 +- - arch/powerpc/dts/pq3-i2c-0.dtsi | 2 +- - arch/powerpc/dts/pq3-i2c-1.dtsi | 2 +- - arch/powerpc/dts/qoriq-i2c-0.dtsi | 4 +- - arch/powerpc/dts/qoriq-i2c-1.dtsi | 4 +- - arch/powerpc/dts/socrates-u-boot.dtsi | 4 +- - arch/riscv/dts/ae350-u-boot.dtsi | 28 +- - arch/riscv/dts/fu540-c000-u-boot.dtsi | 34 +- - arch/riscv/dts/fu740-c000-u-boot.dtsi | 36 +- - .../dts/hifive-unleashed-a00-u-boot.dtsi | 14 +- - .../dts/hifive-unmatched-a00-u-boot.dtsi | 14 +- - arch/riscv/dts/k210.dtsi | 8 +- - arch/riscv/dts/openpiton-riscv64.dts | 8 +- - arch/riscv/lib/semihosting.S | 22 + - arch/riscv/lib/semihosting.c | 24 - - arch/sandbox/dts/sandbox.dts | 8 +- - arch/sandbox/dts/sandbox.dtsi | 48 +- - arch/sandbox/dts/sandbox64.dts | 4 +- - arch/sandbox/dts/sandbox_vpl.dtsi | 4 +- - arch/sandbox/dts/test.dts | 28 +- - arch/sandbox/include/asm/rtc.h | 2 +- - arch/sh/dts/sh7751-r2dplus.dts | 4 +- - arch/x86/Kconfig | 4 +- - arch/x86/cpu/mp_init.c | 4 +- - arch/x86/dts/bayleybay.dts | 14 +- - arch/x86/dts/baytrail_som-db5800-som-6867.dts | 14 +- - arch/x86/dts/cherryhill.dts | 2 +- - arch/x86/dts/chromebook_coral.dts | 74 +- - arch/x86/dts/chromebook_link.dts | 46 +- - arch/x86/dts/chromebook_samus.dts | 74 +- - arch/x86/dts/chromebox_panther.dts | 8 +- - arch/x86/dts/conga-qeval20-qa3-e3845.dts | 14 +- - arch/x86/dts/coreboot.dts | 4 +- - arch/x86/dts/cougarcanyon2.dts | 10 +- - arch/x86/dts/crownbay.dts | 18 +- - arch/x86/dts/dfi-bt700.dtsi | 16 +- - arch/x86/dts/edison.dts | 4 +- - arch/x86/dts/efi-x86_app.dts | 3 +- - arch/x86/dts/efi-x86_payload.dts | 2 +- - arch/x86/dts/galileo.dts | 8 +- - arch/x86/dts/minnowmax.dts | 14 +- - arch/x86/dts/qemu-x86_i440fx.dts | 10 +- - arch/x86/dts/qemu-x86_q35.dts | 10 +- - arch/x86/dts/reset.dtsi | 2 +- - arch/x86/dts/rtc.dtsi | 2 +- - arch/x86/dts/serial.dtsi | 2 +- - arch/x86/dts/tsc_timer.dtsi | 2 +- - arch/x86/include/asm/bootm.h | 12 +- - arch/x86/include/asm/bootparam.h | 70 +- - arch/x86/include/asm/cpu.h | 1 + - arch/x86/lib/bdinfo.c | 6 + - arch/x86/lib/bootm.c | 43 +- - arch/x86/lib/fsp/fsp_graphics.c | 2 +- - arch/x86/lib/zimage.c | 17 +- - .../imx8mp_rsb3720a1/imx8mp_rsb3720a1.c | 20 +- - board/armltd/corstone1000/corstone1000.c | 3 +- - board/bosch/acc/acc.c | 3 +- - board/compulab/imx8mm-cl-iot-gate/ddr/ddr.h | 4 +- - board/dhelectronics/dh_imx8mp/Makefile | 2 +- - .../dh_imx8mp/imx8mp_dhcom_pdk2.c | 254 +- - board/dhelectronics/dh_imx8mp/lpddr4_timing.h | 1 + - .../dh_imx8mp/lpddr4_timing_2G_32.c | 1845 +++++ - board/dhelectronics/dh_imx8mp/spl.c | 2 +- - board/engicam/imx8mm/icore_mx8mm.c | 15 +- - board/engicam/imx8mp/icore_mx8mp.c | 16 - - board/freescale/imx8mp_evk/imx8mp_evk.c | 17 - - board/freescale/imx8ulp_evk/Makefile | 2 +- - board/freescale/imx8ulp_evk/ddr_init.c | 207 - - board/freescale/imx8ulp_evk/imx8ulp_evk.c | 16 +- - board/freescale/imx8ulp_evk/lpddr4_timing.c | 210 +- - .../freescale/imx8ulp_evk/lpddr4_timing_266.c | 6 +- - board/freescale/imx8ulp_evk/spl.c | 18 +- - board/freescale/ls1088a/eth_ls1088aqds.c | 739 +- - board/freescale/ls1088a/eth_ls1088ardb.c | 93 - - board/freescale/ls1088a/ls1088a.c | 2 +- - board/freescale/ls2080aqds/eth.c | 981 +-- - board/freescale/ls2080aqds/ls2080aqds.c | 2 +- - board/freescale/ls2080ardb/eth_ls2080rdb.c | 95 - - board/freescale/ls2080ardb/ls2080ardb.c | 2 +- - board/freescale/lx2160a/eth_lx2160aqds.c | 825 +-- - board/freescale/lx2160a/eth_lx2160ardb.c | 176 - - board/freescale/lx2160a/eth_lx2162aqds.c | 844 +-- - board/freescale/lx2160a/lx2160a.c | 6 +- - board/freescale/mx51evk/mx51evk_video.c | 98 - - board/freescale/mx53loco/mx53loco.c | 36 +- - board/freescale/mx53loco/mx53loco_video.c | 114 - - board/freescale/mx6sabreauto/mx6sabreauto.c | 107 +- - board/freescale/mx6sabresd/mx6sabresd.c | 63 +- - board/freescale/mx6sxsabreauto/MAINTAINERS | 2 +- - board/gateworks/gw_ventana/MAINTAINERS | 1 - - board/gateworks/venice/venice.c | 35 +- - board/keymile/common/common.c | 2 +- - board/kontron/pitx_imx8m/pitx_imx8m.c | 14 +- - board/msc/sm2s_imx8mp/sm2s_imx8mp.c | 15 - - board/purism/librem5/spl.c | 3 +- - board/renesas/falcon/falcon.c | 21 +- - board/renesas/rcar-common/common.c | 6 +- - board/siemens/iot2050/Kconfig | 35 +- - board/siemens/iot2050/board.c | 270 +- - board/siemens/iot2050/iot2050.env | 17 + - board/solidrun/clearfog/clearfog.c | 33 + - board/solidrun/mx6cuboxi/mx6cuboxi.c | 2 +- - board/ti/am62ax/Kconfig | 2 - - board/ti/am62ax/am62ax.env | 33 + - board/ti/am62x/Kconfig | 2 - - board/ti/am62x/am62x.env | 74 +- - board/ti/am64x/Kconfig | 2 - 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tools/{patman => u_boot_pylib}/tout.py | 2 +- - tools/u_boot_pylib/u_boot_pylib | 1 + - 1294 files changed, 37316 insertions(+), 24108 deletions(-) - create mode 100644 .gitlab-ci-upstream.yml - create mode 100644 arch/arm/dts/imx8mp-dhcom-pdk3-u-boot.dtsi - create mode 100644 arch/arm/dts/imx8mp-dhcom-pdk3.dts - create mode 100644 arch/arm/dts/k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dts - create mode 100644 arch/arm/dts/k3-am6548-iot2050-advanced-m2-bkey-usb3-overlay.dts - create mode 100644 arch/arm/dts/k3-am6548-iot2050-advanced-m2.dts - create mode 100644 arch/arm/lib/semihosting.S - delete mode 100644 arch/arm/lib/semihosting.c - create mode 100644 arch/arm/mach-imx/ele_ahab.c - delete mode 100644 arch/arm/mach-imx/imx8ulp/ahab.c - delete mode 100644 arch/arm/mach-imx/imx9/ahab.c - create mode 100644 arch/arm/mach-kirkwood/lowlevel.S - create mode 100644 arch/arm/mach-rmobile/Kconfig.rcar3 - delete mode 100644 arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc0 - delete mode 100644 arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc1 - delete mode 100644 arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc2 - delete mode 100644 arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc3 - delete mode 100644 arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc4 - create mode 100644 arch/riscv/lib/semihosting.S - delete mode 100644 arch/riscv/lib/semihosting.c - create mode 100644 board/dhelectronics/dh_imx8mp/lpddr4_timing_2G_32.c - delete mode 100644 board/freescale/imx8ulp_evk/ddr_init.c - delete mode 100644 board/freescale/mx51evk/mx51evk_video.c - delete mode 100644 board/freescale/mx53loco/mx53loco_video.c - create mode 100644 board/siemens/iot2050/iot2050.env - create mode 100644 board/ti/am62ax/am62ax.env - create mode 100644 board/ti/am65x/am65x.env - create mode 100644 board/ti/j721e/j721e.env - create mode 100644 board/ti/j721s2/j721s2.env - create mode 100644 cmd/efi_common.c - create mode 100644 cmd/pci_mps.c - create mode 100644 configs/clearfog_sata_defconfig - create mode 100644 configs/clearfog_spi_defconfig - create mode 100644 configs/db-88f6820-amc_nand_defconfig - delete mode 100644 configs/gwventana_gw5904_defconfig - create mode 100644 configs/imx8mp_dhcom_pdk3_defconfig - rename configs/{iot2050_defconfig => iot2050_pg1_defconfig} (93%) - create mode 100644 configs/iot2050_pg2_defconfig - create mode 100644 doc/device-tree-bindings/bootph.yaml - create mode 100644 doc/usage/cmd/efi.rst - create mode 100644 doc/usage/cmd/read.rst - create mode 100644 doc/usage/cmd/write.rst - create mode 100644 drivers/clk/at91/clk-sam9x60-usb.c - delete mode 100644 drivers/ddr/marvell/a38x/seq_exec.h - delete mode 100644 drivers/input/twl6030.c - delete mode 100644 drivers/mtd/nand/raw/kb9202_nand.c - create mode 100644 drivers/phy/socionext/phy-uniphier-usb3.c - create mode 100644 drivers/pinctrl/rockchip/pinctrl-rk3588.c - create mode 100644 drivers/reset/rst-rk3588.c - create mode 100644 drivers/rtc/max313xx.c - create mode 100644 drivers/timer/fttmr010_timer.c - create mode 100644 drivers/usb/dwc3/dwc3-generic.h - create mode 100644 drivers/video/console_core.c - create mode 100644 drivers/video/vidconsole_internal.h - create mode 100644 include/environment/ti/k3_dfu.env - create mode 100644 include/environment/ti/k3_rproc.env - create mode 100644 include/environment/ti/mmc.env - create mode 100644 include/environment/ti/nand.env - create mode 100644 include/environment/ti/ti_armv7_common.env - create mode 100644 include/environment/ti/ufs.env - create mode 100644 include/video_font_8x16.h - create mode 100644 include/video_font_sun12x22.h - create mode 100644 include/video_font_ter16x32.h - create mode 100755 rock5b-rk3588.ini - create mode 100755 scripts/make_pip.sh - create mode 100644 test/cmd/pci_mps.c - create mode 100644 test/cmd/rw.c - create mode 100644 test/py/tests/test_of_migrate.py - create mode 100644 tools/binman/btool/openssl.py - create mode 100644 tools/binman/etype/x509_cert.py - create mode 100644 tools/binman/pyproject.toml - create mode 100644 tools/binman/test/277_replace_fit_sibling.dts - create mode 100644 tools/binman/test/278_replace_section_deep.dts - create mode 100644 tools/binman/test/279_x509_cert.dts - create mode 100644 tools/binman/test/280_fit_sign.dts - create mode 100644 tools/binman/test/281_sign_non_fit.dts - create mode 100644 tools/binman/test/key.key - create mode 100644 tools/binman/test/key.pem - create mode 100644 tools/buildman/pyproject.toml - delete mode 100644 tools/concurrencytest/.gitignore - delete mode 100644 tools/concurrencytest/README.md - delete mode 100644 tools/concurrencytest/__init__.py - delete mode 100644 tools/concurrencytest/concurrencytest.py - create mode 100644 tools/dtoc/README.rst - create mode 100644 tools/dtoc/pyproject.toml - create mode 100644 tools/fdt_add_pubkey.c - create mode 100755 tools/iot2050-sign-fw.sh - create mode 100755 tools/key2dtsi.py - create mode 100644 tools/patman/pyproject.toml - create mode 100644 tools/u_boot_pylib/LICENSE - create mode 100644 tools/u_boot_pylib/README.rst - create mode 100644 tools/u_boot_pylib/__init__.py - create mode 100755 tools/u_boot_pylib/__main__.py - rename tools/{patman => u_boot_pylib}/command.py (99%) - rename tools/{patman => u_boot_pylib}/cros_subprocess.py (100%) - create mode 100644 tools/u_boot_pylib/pyproject.toml - rename tools/{patman => u_boot_pylib}/terminal.py (100%) - rename tools/{patman => u_boot_pylib}/test_util.py (85%) - rename tools/{patman => u_boot_pylib}/tools.py (99%) - rename tools/{patman => u_boot_pylib}/tout.py (99%) - create mode 120000 tools/u_boot_pylib/u_boot_pylib - -diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml -index 947c400f8d..64da11e87f 100644 ---- a/.azure-pipelines.yml -+++ b/.azure-pipelines.yml -@@ -2,7 +2,7 @@ variables: - windows_vm: windows-2019 - ubuntu_vm: ubuntu-22.04 - macos_vm: macOS-12 -- ci_runner_image: trini/u-boot-gitlab-ci-runner:jammy-20230126-10Feb2023 -+ ci_runner_image: trini/u-boot-gitlab-ci-runner:jammy-20230308-21Mar2023 - # Add '-u 0' options for Azure pipelines, otherwise we get "permission - # denied" error when it tries to "useradd -m -u 1001 vsts_azpcontainer", - # since our $(ci_runner_image) user is not root. -@@ -187,6 +187,13 @@ stages: - options: $(container_option) - steps: - - script: | -+ mkdir nokia_rx51_tmp -+ ln -s /opt/nokia/u-boot-gen-combined nokia_rx51_tmp/ -+ ln -s /opt/nokia/qemu-n900.tar.gz nokia_rx51_tmp/ -+ ln -s /opt/nokia/kernel_2.6.28-20103103+0m5_armel.deb nokia_rx51_tmp/ -+ ln -s /opt/nokia/libc6_2.5.1-1eglibc27+0m5_armel.deb nokia_rx51_tmp/ -+ ln -s /opt/nokia/busybox_1.10.2.legal-1osso30+0m5_armel.deb nokia_rx51_tmp/ -+ ln -s /opt/nokia/qemu-system-arm nokia_rx51_tmp/ - export PATH=/opt/gcc-12.2.0-nolibc/arm-linux-gnueabi/bin:$PATH - test/nokia_rx51_test.sh - -@@ -213,6 +220,28 @@ stages: - export PYTHONPATH=${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt - make pylint_err - -+ - job: check_for_pre_schema_tags -+ displayName: 'Check for pre-schema driver model tags' -+ pool: -+ vmImage: $(ubuntu_vm) -+ container: -+ image: $(ci_runner_image) -+ options: $(container_option) -+ steps: -+ # If grep succeeds and finds a match the test fails as we should -+ # have no matches. -+ - script: git grep u-boot,dm- -- '*.dts*' && exit 1 || exit 0 -+ -+ - job: check_packing_of_python_tools -+ displayName: 'Check we can package the Python tools' -+ pool: -+ vmImage: $(ubuntu_vm) -+ container: -+ image: $(ci_runner_image) -+ options: $(container_option) -+ steps: -+ - script: make pip -+ - - stage: test_py - jobs: - - job: test_py -@@ -234,7 +263,7 @@ stages: - TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff or test_spl" - sandbox_vpl: - TEST_PY_BD: "sandbox_vpl" -- TEST_PY_TEST_SPEC: "test_vpl_help or test_spl" -+ TEST_PY_TEST_SPEC: "vpl or test_spl" - sandbox_noinst: - TEST_PY_BD: "sandbox_noinst" - TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff or test_spl" -@@ -397,10 +426,11 @@ stages: - virtualenv -p /usr/bin/python3 /tmp/venv - . /tmp/venv/bin/activate - pip install -r test/py/requirements.txt -+ pip install pytest-azurepipelines - export PATH=/opt/qemu/bin:/tmp/uboot-test-hooks/bin:${PATH}; - export PYTHONPATH=/tmp/uboot-test-hooks/py/travis-ci; - # "${var:+"-k $var"}" expands to "" if $var is empty, "-k $var" if not -- ./test/py/test.py -ra --bd ${TEST_PY_BD} ${TEST_PY_ID} ${TEST_PY_TEST_SPEC:+"-k ${TEST_PY_TEST_SPEC}"} --build-dir "$UBOOT_TRAVIS_BUILD_DIR"; -+ ./test/py/test.py -ra -o cache_dir="$UBOOT_TRAVIS_BUILD_DIR"/.pytest_cache --bd ${TEST_PY_BD} ${TEST_PY_ID} ${TEST_PY_TEST_SPEC:+"-k ${TEST_PY_TEST_SPEC}"} --build-dir "$UBOOT_TRAVIS_BUILD_DIR" --report-dir "$UBOOT_TRAVIS_BUILD_DIR"; - # the below corresponds to .gitlab-ci.yml "after_script" - rm -rf /tmp/uboot-test-hooks /tmp/venv - EOF -diff --git a/.gitlab-ci-upstream.yml b/.gitlab-ci-upstream.yml -new file mode 100644 -index 0000000000..2a423744c5 ---- /dev/null -+++ b/.gitlab-ci-upstream.yml -@@ -0,0 +1,490 @@ -+# SPDX-License-Identifier: GPL-2.0+ -+ -+variables: -+ DEFAULT_TAG: "" -+ MIRROR_DOCKER: docker.io -+ -+default: -+ tags: -+ - ${DEFAULT_TAG} -+ -+# Grab our configured image. The source for this is found -+# in the u-boot tree at tools/docker/Dockerfile -+image: ${MIRROR_DOCKER}/trini/u-boot-gitlab-ci-runner:jammy-20230308-21Mar2023 -+ -+# We run some tests in different order, to catch some failures quicker. -+stages: -+ - testsuites -+ - test.py -+ - world build -+ -+.buildman_and_testpy_template: &buildman_and_testpy_dfn -+ stage: test.py -+ before_script: -+ # Clone uboot-test-hooks -+ - git config --global --add safe.directory "${CI_PROJECT_DIR}" -+ - git clone --depth=1 https://source.denx.de/u-boot/u-boot-test-hooks /tmp/uboot-test-hooks -+ - ln -s travis-ci /tmp/uboot-test-hooks/bin/`hostname` -+ - ln -s travis-ci /tmp/uboot-test-hooks/py/`hostname` -+ - grub-mkimage --prefix="" -o ~/grub_x86.efi -O i386-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd -+ - grub-mkimage --prefix="" -o ~/grub_x64.efi -O x86_64-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd -+ - if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]]; then -+ wget -O - https://github.com/riscv/opensbi/releases/download/v0.9/opensbi-0.9-rv-bin.tar.xz | tar -C /tmp -xJ; -+ export OPENSBI=/tmp/opensbi-0.9-rv-bin/share/opensbi/ilp32/generic/firmware/fw_dynamic.bin; -+ fi -+ - if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]] || [[ "${TEST_PY_BD}" == "sifive_unleashed" ]]; then -+ wget -O - https://github.com/riscv/opensbi/releases/download/v0.9/opensbi-0.9-rv-bin.tar.xz | tar -C /tmp -xJ; -+ export OPENSBI=/tmp/opensbi-0.9-rv-bin/share/opensbi/lp64/generic/firmware/fw_dynamic.bin; -+ fi -+ -+ after_script: -+ - cp -v /tmp/${TEST_PY_BD}/*.{html,css} . -+ - rm -rf /tmp/uboot-test-hooks /tmp/venv -+ script: -+ # If we've been asked to use clang only do one configuration. -+ - export UBOOT_TRAVIS_BUILD_DIR=/tmp/${TEST_PY_BD} -+ - echo BUILD_ENV ${BUILD_ENV} -+ - if [ -n "${BUILD_ENV}" ]; then -+ export ${BUILD_ENV}; -+ fi -+ - tools/buildman/buildman -o ${UBOOT_TRAVIS_BUILD_DIR} -w -E -W -e -+ --board ${TEST_PY_BD} ${OVERRIDE} -+ - cp ~/grub_x86.efi $UBOOT_TRAVIS_BUILD_DIR/ -+ - cp ~/grub_x64.efi $UBOOT_TRAVIS_BUILD_DIR/ -+ - cp /opt/grub/grubriscv64.efi $UBOOT_TRAVIS_BUILD_DIR/grub_riscv64.efi -+ - cp /opt/grub/grubaa64.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm64.efi -+ - cp /opt/grub/grubarm.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm.efi -+ # create sdcard / spi-nor images for sifive unleashed using genimage -+ - if [[ "${TEST_PY_BD}" == "sifive_unleashed" ]]; then -+ mkdir -p root; -+ cp ${UBOOT_TRAVIS_BUILD_DIR}/spl/u-boot-spl.bin .; -+ cp ${UBOOT_TRAVIS_BUILD_DIR}/u-boot.itb .; -+ rm -rf tmp; -+ genimage --inputpath . --config board/sifive/unleashed/genimage_sdcard.cfg; -+ cp images/sdcard.img ${UBOOT_TRAVIS_BUILD_DIR}/; -+ rm -rf tmp; -+ genimage --inputpath . --config board/sifive/unleashed/genimage_spi-nor.cfg; -+ cp images/spi-nor.img ${UBOOT_TRAVIS_BUILD_DIR}/; -+ fi -+ - if [[ "${TEST_PY_BD}" == "coreboot" ]]; then -+ wget -O - -+ "https://drive.google.com/uc?id=1x6nrtWIyIRPLS2cQBwYTnT2TbOI8UjmM&export=download" | -+ xz -dc >${UBOOT_TRAVIS_BUILD_DIR}/coreboot.rom; -+ wget -O - -+ "https://drive.google.com/uc?id=149Cz-5SZXHNKpi9xg6R_5XITWohu348y&export=download" > -+ cbfstool; -+ chmod a+x cbfstool; -+ ./cbfstool ${UBOOT_TRAVIS_BUILD_DIR}/coreboot.rom add-flat-binary -f ${UBOOT_TRAVIS_BUILD_DIR}/u-boot.bin -n fallback/payload -c LZMA -l 0x1110000 -e 0x1110000; -+ fi -+ - virtualenv -p /usr/bin/python3 /tmp/venv -+ - . /tmp/venv/bin/activate -+ - pip install -r test/py/requirements.txt -+ # "${var:+"-k $var"}" expands to "" if $var is empty, "-k $var" if not -+ - export PATH=/opt/qemu/bin:/tmp/uboot-test-hooks/bin:${PATH}; -+ export PYTHONPATH=/tmp/uboot-test-hooks/py/travis-ci; -+ ./test/py/test.py -ra --bd ${TEST_PY_BD} ${TEST_PY_ID} -+ ${TEST_PY_TEST_SPEC:+"-k ${TEST_PY_TEST_SPEC}"} -+ --build-dir "$UBOOT_TRAVIS_BUILD_DIR" -+ artifacts: -+ when: always -+ paths: -+ - "*.html" -+ - "*.css" -+ expire_in: 1 week -+ -+build all 32bit ARM platforms: -+ stage: world build -+ script: -+ - ret=0; -+ git config --global --add safe.directory "${CI_PROJECT_DIR}"; -+ ./tools/buildman/buildman -o /tmp -PEWM arm -x aarch64 || ret=$?; -+ if [[ $ret -ne 0 ]]; then -+ ./tools/buildman/buildman -o /tmp -seP; -+ exit $ret; -+ fi; -+ -+build all 64bit ARM platforms: -+ stage: world build -+ script: -+ - virtualenv -p /usr/bin/python3 /tmp/venv -+ - . /tmp/venv/bin/activate -+ - ret=0; -+ git config --global --add safe.directory "${CI_PROJECT_DIR}"; -+ ./tools/buildman/buildman -o /tmp -PEWM aarch64 || ret=$?; -+ if [[ $ret -ne 0 ]]; then -+ ./tools/buildman/buildman -o /tmp -seP; -+ exit $ret; -+ fi; -+ -+build all PowerPC platforms: -+ stage: world build -+ script: -+ - ret=0; -+ git config --global --add safe.directory "${CI_PROJECT_DIR}"; -+ ./tools/buildman/buildman -o /tmp -P -E -W powerpc || ret=$?; -+ if [[ $ret -ne 0 ]]; then -+ ./tools/buildman/buildman -o /tmp -seP; -+ exit $ret; -+ fi; -+ -+build all other platforms: -+ stage: world build -+ script: -+ - ret=0; -+ git config --global --add safe.directory "${CI_PROJECT_DIR}"; -+ ./tools/buildman/buildman -o /tmp -PEWM -x arm,powerpc || ret=$?; -+ if [[ $ret -ne 0 ]]; then -+ ./tools/buildman/buildman -o /tmp -seP; -+ exit $ret; -+ fi; -+ -+check for new CONFIG symbols outside Kconfig: -+ stage: testsuites -+ script: -+ - git config --global --add safe.directory "${CI_PROJECT_DIR}" -+ # If grep succeeds and finds a match the test fails as we should -+ # have no matches. -+ - git grep -E '^#[[:blank:]]*(define|undef)[[:blank:]]*CONFIG_' -+ :^doc/ :^arch/arm/dts/ :^scripts/kconfig/lkc.h -+ :^include/linux/kconfig.h :^tools/ && exit 1 || exit 0 -+ -+# QA jobs for code analytics -+# static code analysis with cppcheck (we can add --enable=all later) -+cppcheck: -+ stage: testsuites -+ script: -+ - cppcheck -j$(nproc) --force --quiet --inline-suppr . -+ -+# search for TODO within source tree -+grep TODO/FIXME/HACK: -+ stage: testsuites -+ script: -+ - grep -r TODO . -+ - grep -r FIXME . -+ # search for HACK within source tree and ignore HACKKIT board -+ - grep -r HACK . | grep -v HACKKIT -+ -+# build documentation -+docs: -+ stage: testsuites -+ script: -+ - virtualenv -p /usr/bin/python3 /tmp/venvhtml -+ - . /tmp/venvhtml/bin/activate -+ - pip install -r doc/sphinx/requirements.txt -+ - make htmldocs -+ - make infodocs -+ -+# some statistics about the code base -+sloccount: -+ stage: testsuites -+ script: -+ - sloccount . -+ -+# ensure all configs have MAINTAINERS entries -+Check for configs without MAINTAINERS entry: -+ stage: testsuites -+ script: -+ - ./tools/buildman/buildman -R -+ -+# Ensure host tools build -+Build tools-only: -+ stage: testsuites -+ script: -+ - make tools-only_config tools-only -j$(nproc) -+ -+# Ensure env tools build -+Build envtools: -+ stage: testsuites -+ script: -+ - make tools-only_config envtools -j$(nproc) -+ -+Run binman, buildman, dtoc, Kconfig and patman testsuites: -+ stage: testsuites -+ script: -+ - git config --global user.name "GitLab CI Runner"; -+ git config --global user.email trini@konsulko.com; -+ git config --global --add safe.directory "${CI_PROJECT_DIR}"; -+ export USER=gitlab; -+ virtualenv -p /usr/bin/python3 /tmp/venv; -+ . /tmp/venv/bin/activate; -+ pip install -r test/py/requirements.txt; -+ export UBOOT_TRAVIS_BUILD_DIR=/tmp/sandbox_spl; -+ export PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt"; -+ export PATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}"; -+ set +e; -+ ./tools/buildman/buildman -T0 -o ${UBOOT_TRAVIS_BUILD_DIR} -w -+ --board sandbox_spl; -+ set -e; -+ ./tools/binman/binman --toolpath ${UBOOT_TRAVIS_BUILD_DIR}/tools test; -+ ./tools/buildman/buildman -t; -+ ./tools/dtoc/dtoc -t; -+ ./tools/patman/patman test; -+ make testconfig -+ -+Run tests for Nokia RX-51 (aka N900): -+ stage: testsuites -+ script: -+ - mkdir nokia_rx51_tmp; -+ ln -s /opt/nokia/u-boot-gen-combined nokia_rx51_tmp/; -+ ln -s /opt/nokia/qemu-n900.tar.gz nokia_rx51_tmp/; -+ ln -s /opt/nokia/kernel_2.6.28-20103103+0m5_armel.deb nokia_rx51_tmp/; -+ ln -s /opt/nokia/libc6_2.5.1-1eglibc27+0m5_armel.deb nokia_rx51_tmp/; -+ ln -s /opt/nokia/busybox_1.10.2.legal-1osso30+0m5_armel.deb nokia_rx51_tmp/; -+ ln -s /opt/nokia/qemu-system-arm nokia_rx51_tmp/; -+ export PATH=/opt/gcc-12.2.0-nolibc/arm-linux-gnueabi/bin:$PATH; -+ test/nokia_rx51_test.sh -+ -+# Check for any pylint regressions -+Run pylint: -+ stage: testsuites -+ script: -+ - git config --global --add safe.directory "${CI_PROJECT_DIR}" -+ - pip install -r test/py/requirements.txt -+ - pip install asteval pylint==2.12.2 pyopenssl -+ - export PATH=${PATH}:~/.local/bin -+ - echo "[MASTER]" >> .pylintrc -+ - echo "load-plugins=pylint.extensions.docparams" >> .pylintrc -+ - export UBOOT_TRAVIS_BUILD_DIR=/tmp/sandbox_spl -+ - set +e -+ - ./tools/buildman/buildman -T0 -o ${UBOOT_TRAVIS_BUILD_DIR} -w -+ --board sandbox_spl -+ - set -e -+ - pylint --version -+ - export PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt" -+ - make pylint_err -+ -+# Check for pre-schema driver model tags -+Check for pre-schema tags: -+ stage: testsuites -+ script: -+ - git config --global --add safe.directory "${CI_PROJECT_DIR}"; -+ # If grep succeeds and finds a match the test fails as we should -+ # have no matches. -+ - git grep u-boot,dm- -- '*.dts*' && exit 1 || exit 0 -+ -+# Check we can package the Python tools -+Check packing of Python tools: -+ stage: testsuites -+ script: -+ - make pip -+ -+# Test sandbox with test.py -+sandbox test.py: -+ variables: -+ TEST_PY_BD: "sandbox" -+ <<: *buildman_and_testpy_dfn -+ -+sandbox with clang test.py: -+ variables: -+ TEST_PY_BD: "sandbox" -+ OVERRIDE: "-O clang-14" -+ <<: *buildman_and_testpy_dfn -+ -+sandbox without LTO test.py: -+ variables: -+ TEST_PY_BD: "sandbox" -+ BUILD_ENV: "NO_LTO=1" -+ <<: *buildman_and_testpy_dfn -+ -+sandbox_spl test.py: -+ variables: -+ TEST_PY_BD: "sandbox_spl" -+ TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff or test_spl" -+ <<: *buildman_and_testpy_dfn -+ -+sandbox_noinst_test.py: -+ variables: -+ TEST_PY_BD: "sandbox_noinst" -+ TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff or test_spl" -+ <<: *buildman_and_testpy_dfn -+ -+sandbox_vpl test.py: -+ variables: -+ TEST_PY_BD: "sandbox_vpl" -+ TEST_PY_TEST_SPEC: "vpl or test_spl" -+ <<: *buildman_and_testpy_dfn -+ -+# Enable tracing and disable LTO, to ensure functions are not elided -+sandbox trace_test.py: -+ variables: -+ TEST_PY_BD: "sandbox" -+ BUILD_ENV: "FTRACE=1 NO_LTO=1" -+ TEST_PY_TEST_SPEC: "trace" -+ OVERRIDE: "-a CONFIG_TRACE=y -a CONFIG_TRACE_EARLY=y -a CONFIG_TRACE_EARLY_SIZE=0x01000000" -+ <<: *buildman_and_testpy_dfn -+ -+evb-ast2500 test.py: -+ variables: -+ TEST_PY_BD: "evb-ast2500" -+ TEST_PY_ID: "--id qemu" -+ <<: *buildman_and_testpy_dfn -+ -+evb-ast2600 test.py: -+ variables: -+ TEST_PY_BD: "evb-ast2600" -+ TEST_PY_ID: "--id qemu" -+ <<: *buildman_and_testpy_dfn -+ -+sandbox_flattree test.py: -+ variables: -+ TEST_PY_BD: "sandbox_flattree" -+ <<: *buildman_and_testpy_dfn -+ -+vexpress_ca9x4 test.py: -+ variables: -+ TEST_PY_BD: "vexpress_ca9x4" -+ TEST_PY_ID: "--id qemu" -+ <<: *buildman_and_testpy_dfn -+ -+integratorcp_cm926ejs test.py: -+ variables: -+ TEST_PY_BD: "integratorcp_cm926ejs" -+ TEST_PY_TEST_SPEC: "not sleep" -+ TEST_PY_ID: "--id qemu" -+ <<: *buildman_and_testpy_dfn -+ -+qemu_arm test.py: -+ variables: -+ TEST_PY_BD: "qemu_arm" -+ TEST_PY_TEST_SPEC: "not sleep" -+ <<: *buildman_and_testpy_dfn -+ -+qemu_arm64 test.py: -+ variables: -+ TEST_PY_BD: "qemu_arm64" -+ TEST_PY_TEST_SPEC: "not sleep" -+ <<: *buildman_and_testpy_dfn -+ -+qemu_malta test.py: -+ variables: -+ TEST_PY_BD: "malta" -+ TEST_PY_TEST_SPEC: "not sleep and not efi" -+ TEST_PY_ID: "--id qemu" -+ <<: *buildman_and_testpy_dfn -+ -+qemu_maltael test.py: -+ variables: -+ TEST_PY_BD: "maltael" -+ TEST_PY_TEST_SPEC: "not sleep and not efi" -+ TEST_PY_ID: "--id qemu" -+ <<: *buildman_and_testpy_dfn -+ -+qemu_malta64 test.py: -+ variables: -+ TEST_PY_BD: "malta64" -+ TEST_PY_TEST_SPEC: "not sleep and not efi" -+ TEST_PY_ID: "--id qemu" -+ <<: *buildman_and_testpy_dfn -+ -+qemu_malta64el test.py: -+ variables: -+ TEST_PY_BD: "malta64el" -+ TEST_PY_TEST_SPEC: "not sleep and not efi" -+ TEST_PY_ID: "--id qemu" -+ <<: *buildman_and_testpy_dfn -+ -+qemu-ppce500 test.py: -+ variables: -+ TEST_PY_BD: "qemu-ppce500" -+ TEST_PY_TEST_SPEC: "not sleep" -+ <<: *buildman_and_testpy_dfn -+ -+qemu-riscv32 test.py: -+ variables: -+ TEST_PY_BD: "qemu-riscv32" -+ TEST_PY_TEST_SPEC: "not sleep" -+ <<: *buildman_and_testpy_dfn -+ -+qemu-riscv64 test.py: -+ variables: -+ TEST_PY_BD: "qemu-riscv64" -+ TEST_PY_TEST_SPEC: "not sleep" -+ <<: *buildman_and_testpy_dfn -+ -+qemu-riscv32_spl test.py: -+ variables: -+ TEST_PY_BD: "qemu-riscv32_spl" -+ TEST_PY_TEST_SPEC: "not sleep" -+ <<: *buildman_and_testpy_dfn -+ -+qemu-riscv64_spl test.py: -+ variables: -+ TEST_PY_BD: "qemu-riscv64_spl" -+ TEST_PY_TEST_SPEC: "not sleep" -+ <<: *buildman_and_testpy_dfn -+ -+qemu-x86 test.py: -+ variables: -+ TEST_PY_BD: "qemu-x86" -+ TEST_PY_TEST_SPEC: "not sleep" -+ <<: *buildman_and_testpy_dfn -+ -+qemu-x86_64 test.py: -+ variables: -+ TEST_PY_BD: "qemu-x86_64" -+ TEST_PY_TEST_SPEC: "not sleep" -+ <<: *buildman_and_testpy_dfn -+ -+r2dplus_i82557c test.py: -+ variables: -+ TEST_PY_BD: "r2dplus" -+ TEST_PY_ID: "--id i82557c_qemu" -+ <<: *buildman_and_testpy_dfn -+ -+r2dplus_pcnet test.py: -+ variables: -+ TEST_PY_BD: "r2dplus" -+ TEST_PY_ID: "--id pcnet_qemu" -+ <<: *buildman_and_testpy_dfn -+ -+r2dplus_rtl8139 test.py: -+ variables: -+ TEST_PY_BD: "r2dplus" -+ TEST_PY_ID: "--id rtl8139_qemu" -+ <<: *buildman_and_testpy_dfn -+ -+r2dplus_tulip test.py: -+ variables: -+ TEST_PY_BD: "r2dplus" -+ TEST_PY_ID: "--id tulip_qemu" -+ <<: *buildman_and_testpy_dfn -+ -+sifive_unleashed_sdcard test.py: -+ variables: -+ TEST_PY_BD: "sifive_unleashed" -+ TEST_PY_ID: "--id sdcard_qemu" -+ <<: *buildman_and_testpy_dfn -+ -+sifive_unleashed_spi-nor test.py: -+ variables: -+ TEST_PY_BD: "sifive_unleashed" -+ TEST_PY_ID: "--id spi-nor_qemu" -+ <<: *buildman_and_testpy_dfn -+ -+xilinx_zynq_virt test.py: -+ variables: -+ TEST_PY_BD: "xilinx_zynq_virt" -+ TEST_PY_TEST_SPEC: "not sleep" -+ TEST_PY_ID: "--id qemu" -+ <<: *buildman_and_testpy_dfn -+ -+xilinx_versal_virt test.py: -+ variables: -+ TEST_PY_BD: "xilinx_versal_virt" -+ TEST_PY_TEST_SPEC: "not sleep" -+ TEST_PY_ID: "--id qemu" -+ <<: *buildman_and_testpy_dfn -+ -+xtfpga test.py: -+ variables: -+ TEST_PY_BD: "xtfpga" -+ TEST_PY_TEST_SPEC: "not sleep" -+ TEST_PY_ID: "--id qemu" -+ <<: *buildman_and_testpy_dfn -+ -+coreboot test.py: -+ variables: -+ TEST_PY_BD: "coreboot" -+ TEST_PY_TEST_SPEC: "not sleep" -+ TEST_PY_ID: "--id qemu" -+ <<: *buildman_and_testpy_dfn -diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml -index 272d69e220..e4c7dcfe0d 100644 ---- a/.gitlab-ci.yml -+++ b/.gitlab-ci.yml -@@ -1,462 +1,42 @@ --# SPDX-License-Identifier: GPL-2.0+ -+default: -+ image: debian:bullseye-slim - --# Grab our configured image. The source for this is found --# in the u-boot tree at tools/docker/Dockerfile --image: trini/u-boot-gitlab-ci-runner:jammy-20230126-10Feb2023 -- --# We run some tests in different order, to catch some failures quicker. - stages: -- - testsuites -- - test.py -- - world build -- --.buildman_and_testpy_template: &buildman_and_testpy_dfn -- stage: test.py -- before_script: -- # Clone uboot-test-hooks -- - git config --global --add safe.directory "${CI_PROJECT_DIR}" -- - git clone --depth=1 https://source.denx.de/u-boot/u-boot-test-hooks /tmp/uboot-test-hooks -- - ln -s travis-ci /tmp/uboot-test-hooks/bin/`hostname` -- - ln -s travis-ci /tmp/uboot-test-hooks/py/`hostname` -- - grub-mkimage --prefix="" -o ~/grub_x86.efi -O i386-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd -- - grub-mkimage --prefix="" -o ~/grub_x64.efi -O x86_64-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd -- - if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]]; then -- wget -O - https://github.com/riscv/opensbi/releases/download/v0.9/opensbi-0.9-rv-bin.tar.xz | tar -C /tmp -xJ; -- export OPENSBI=/tmp/opensbi-0.9-rv-bin/share/opensbi/ilp32/generic/firmware/fw_dynamic.bin; -- fi -- - if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]] || [[ "${TEST_PY_BD}" == "sifive_unleashed" ]]; then -- wget -O - https://github.com/riscv/opensbi/releases/download/v0.9/opensbi-0.9-rv-bin.tar.xz | tar -C /tmp -xJ; -- export OPENSBI=/tmp/opensbi-0.9-rv-bin/share/opensbi/lp64/generic/firmware/fw_dynamic.bin; -- fi -- -- after_script: -- - rm -rf /tmp/uboot-test-hooks /tmp/venv -- script: -- # If we've been asked to use clang only do one configuration. -- - export UBOOT_TRAVIS_BUILD_DIR=/tmp/${TEST_PY_BD} -- - echo BUILD_ENV ${BUILD_ENV} -- - if [ -n "${BUILD_ENV}" ]; then -- export ${BUILD_ENV}; -- fi -- - tools/buildman/buildman -o ${UBOOT_TRAVIS_BUILD_DIR} -w -E -W -e -- --board ${TEST_PY_BD} ${OVERRIDE} -- - cp ~/grub_x86.efi $UBOOT_TRAVIS_BUILD_DIR/ -- - cp ~/grub_x64.efi $UBOOT_TRAVIS_BUILD_DIR/ -- - cp /opt/grub/grubriscv64.efi $UBOOT_TRAVIS_BUILD_DIR/grub_riscv64.efi -- - cp /opt/grub/grubaa64.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm64.efi -- - cp /opt/grub/grubarm.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm.efi -- # create sdcard / spi-nor images for sifive unleashed using genimage -- - if [[ "${TEST_PY_BD}" == "sifive_unleashed" ]]; then -- mkdir -p root; -- cp ${UBOOT_TRAVIS_BUILD_DIR}/spl/u-boot-spl.bin .; -- cp ${UBOOT_TRAVIS_BUILD_DIR}/u-boot.itb .; -- rm -rf tmp; -- genimage --inputpath . --config board/sifive/unleashed/genimage_sdcard.cfg; -- cp images/sdcard.img ${UBOOT_TRAVIS_BUILD_DIR}/; -- rm -rf tmp; -- genimage --inputpath . --config board/sifive/unleashed/genimage_spi-nor.cfg; -- cp images/spi-nor.img ${UBOOT_TRAVIS_BUILD_DIR}/; -- fi -- - if [[ "${TEST_PY_BD}" == "coreboot" ]]; then -- wget -O - -- "https://drive.google.com/uc?id=1x6nrtWIyIRPLS2cQBwYTnT2TbOI8UjmM&export=download" | -- xz -dc >${UBOOT_TRAVIS_BUILD_DIR}/coreboot.rom; -- wget -O - -- "https://drive.google.com/uc?id=149Cz-5SZXHNKpi9xg6R_5XITWohu348y&export=download" > -- cbfstool; -- chmod a+x cbfstool; -- ./cbfstool ${UBOOT_TRAVIS_BUILD_DIR}/coreboot.rom add-flat-binary -f ${UBOOT_TRAVIS_BUILD_DIR}/u-boot.bin -n fallback/payload -c LZMA -l 0x1110000 -e 0x1110000; -- fi -- - virtualenv -p /usr/bin/python3 /tmp/venv -- - . /tmp/venv/bin/activate -- - pip install -r test/py/requirements.txt -- # "${var:+"-k $var"}" expands to "" if $var is empty, "-k $var" if not -- - export PATH=/opt/qemu/bin:/tmp/uboot-test-hooks/bin:${PATH}; -- export PYTHONPATH=/tmp/uboot-test-hooks/py/travis-ci; -- ./test/py/test.py -ra --bd ${TEST_PY_BD} ${TEST_PY_ID} -- ${TEST_PY_TEST_SPEC:+"-k ${TEST_PY_TEST_SPEC}"} -- --build-dir "$UBOOT_TRAVIS_BUILD_DIR" -- # It seems that the files in /tmp go away, so copy out what we need -- - if [[ "${TEST_PY_BD}" == "coreboot" ]]; then -- cp -v /tmp/coreboot/*.{html,css} .; -- fi -- --build all 32bit ARM platforms: -- stage: world build -- script: -- - ret=0; -- git config --global --add safe.directory "${CI_PROJECT_DIR}"; -- ./tools/buildman/buildman -o /tmp -PEWM arm -x aarch64 || ret=$?; -- if [[ $ret -ne 0 ]]; then -- ./tools/buildman/buildman -o /tmp -seP; -- exit $ret; -- fi; -- --build all 64bit ARM platforms: -- stage: world build -- script: -- - virtualenv -p /usr/bin/python3 /tmp/venv -- - . /tmp/venv/bin/activate -- - ret=0; -- git config --global --add safe.directory "${CI_PROJECT_DIR}"; -- ./tools/buildman/buildman -o /tmp -PEWM aarch64 || ret=$?; -- if [[ $ret -ne 0 ]]; then -- ./tools/buildman/buildman -o /tmp -seP; -- exit $ret; -- fi; -- --build all PowerPC platforms: -- stage: world build -- script: -- - ret=0; -- git config --global --add safe.directory "${CI_PROJECT_DIR}"; -- ./tools/buildman/buildman -o /tmp -P -E -W powerpc || ret=$?; -- if [[ $ret -ne 0 ]]; then -- ./tools/buildman/buildman -o /tmp -seP; -- exit $ret; -- fi; -- --build all other platforms: -- stage: world build -- script: -- - ret=0; -- git config --global --add safe.directory "${CI_PROJECT_DIR}"; -- ./tools/buildman/buildman -o /tmp -PEWM -x arm,powerpc || ret=$?; -- if [[ $ret -ne 0 ]]; then -- ./tools/buildman/buildman -o /tmp -seP; -- exit $ret; -- fi; -- --check for new CONFIG symbols outside Kconfig: -- stage: testsuites -- script: -- - git config --global --add safe.directory "${CI_PROJECT_DIR}" -- # If grep succeeds and finds a match the test fails as we should -- # have no matches. -- - git grep -E '^#[[:blank:]]*(define|undef)[[:blank:]]*CONFIG_' -- :^doc/ :^arch/arm/dts/ :^scripts/kconfig/lkc.h -- :^include/linux/kconfig.h :^tools/ && exit 1 || exit 0 -- --# QA jobs for code analytics --# static code analysis with cppcheck (we can add --enable=all later) --cppcheck: -- stage: testsuites -- script: -- - cppcheck -j$(nproc) --force --quiet --inline-suppr . -- --# search for TODO within source tree --grep TODO/FIXME/HACK: -- stage: testsuites -- script: -- - grep -r TODO . -- - grep -r FIXME . -- # search for HACK within source tree and ignore HACKKIT board -- - grep -r HACK . | grep -v HACKKIT -- --# build documentation --docs: -- stage: testsuites -- script: -- - virtualenv -p /usr/bin/python3 /tmp/venvhtml -- - . /tmp/venvhtml/bin/activate -- - pip install -r doc/sphinx/requirements.txt -- - make htmldocs -- - make infodocs -- --# some statistics about the code base --sloccount: -- stage: testsuites -- script: -- - sloccount . -- --# ensure all configs have MAINTAINERS entries --Check for configs without MAINTAINERS entry: -- stage: testsuites -- script: -- - ./tools/buildman/buildman -R -- --# Ensure host tools build --Build tools-only: -- stage: testsuites -- script: -- - make tools-only_config tools-only -j$(nproc) -- --# Ensure env tools build --Build envtools: -- stage: testsuites -- script: -- - make tools-only_config envtools -j$(nproc) -- --Run binman, buildman, dtoc, Kconfig and patman testsuites: -- stage: testsuites -- script: -- - git config --global user.name "GitLab CI Runner"; -- git config --global user.email trini@konsulko.com; -- git config --global --add safe.directory "${CI_PROJECT_DIR}"; -- export USER=gitlab; -- virtualenv -p /usr/bin/python3 /tmp/venv; -- . /tmp/venv/bin/activate; -- pip install -r test/py/requirements.txt; -- export UBOOT_TRAVIS_BUILD_DIR=/tmp/sandbox_spl; -- export PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt"; -- export PATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}"; -- set +e; -- ./tools/buildman/buildman -T0 -o ${UBOOT_TRAVIS_BUILD_DIR} -w -- --board sandbox_spl; -- set -e; -- ./tools/binman/binman --toolpath ${UBOOT_TRAVIS_BUILD_DIR}/tools test; -- ./tools/buildman/buildman -t; -- ./tools/dtoc/dtoc -t; -- ./tools/patman/patman test; -- make testconfig -- --Run tests for Nokia RX-51 (aka N900): -- stage: testsuites -- script: -- - export PATH=/opt/gcc-12.2.0-nolibc/arm-linux-gnueabi/bin:$PATH; -- test/nokia_rx51_test.sh -- --# Check for any pylint regressions --Run pylint: -- stage: testsuites -- script: -- - git config --global --add safe.directory "${CI_PROJECT_DIR}" -- - pip install -r test/py/requirements.txt -- - pip install asteval pylint==2.12.2 pyopenssl -- - export PATH=${PATH}:~/.local/bin -- - echo "[MASTER]" >> .pylintrc -- - echo "load-plugins=pylint.extensions.docparams" >> .pylintrc -- - export UBOOT_TRAVIS_BUILD_DIR=/tmp/sandbox_spl -- - set +e -- - ./tools/buildman/buildman -T0 -o ${UBOOT_TRAVIS_BUILD_DIR} -w -- --board sandbox_spl -- - set -e -- - pylint --version -- - export PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt" -- - make pylint_err -- --# Test sandbox with test.py --sandbox test.py: -- variables: -- TEST_PY_BD: "sandbox" -- <<: *buildman_and_testpy_dfn -- --sandbox with clang test.py: -- variables: -- TEST_PY_BD: "sandbox" -- OVERRIDE: "-O clang-14" -- <<: *buildman_and_testpy_dfn -- --sandbox without LTO test.py: -- variables: -- TEST_PY_BD: "sandbox" -- BUILD_ENV: "NO_LTO=1" -- <<: *buildman_and_testpy_dfn -- --sandbox_spl test.py: -- variables: -- TEST_PY_BD: "sandbox_spl" -- TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff or test_spl" -- <<: *buildman_and_testpy_dfn -- --sandbox_noinst_test.py: -- variables: -- TEST_PY_BD: "sandbox_noinst" -- TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff or test_spl" -- <<: *buildman_and_testpy_dfn -- --sandbox_vpl test.py: -- variables: -- TEST_PY_BD: "sandbox_vpl" -- TEST_PY_TEST_SPEC: "test_vpl_help or test_spl" -- <<: *buildman_and_testpy_dfn -- --# Enable tracing and disable LTO, to ensure functions are not elided --sandbox trace_test.py: -- variables: -- TEST_PY_BD: "sandbox" -- BUILD_ENV: "FTRACE=1 NO_LTO=1" -- TEST_PY_TEST_SPEC: "trace" -- OVERRIDE: "-a CONFIG_TRACE=y -a CONFIG_TRACE_EARLY=y -a CONFIG_TRACE_EARLY_SIZE=0x01000000" -- <<: *buildman_and_testpy_dfn -- --evb-ast2500 test.py: -- variables: -- TEST_PY_BD: "evb-ast2500" -- TEST_PY_ID: "--id qemu" -- <<: *buildman_and_testpy_dfn -- --evb-ast2600 test.py: -- variables: -- TEST_PY_BD: "evb-ast2600" -- TEST_PY_ID: "--id qemu" -- <<: *buildman_and_testpy_dfn -- --sandbox_flattree test.py: -- variables: -- TEST_PY_BD: "sandbox_flattree" -- <<: *buildman_and_testpy_dfn -- --vexpress_ca9x4 test.py: -- variables: -- TEST_PY_BD: "vexpress_ca9x4" -- TEST_PY_ID: "--id qemu" -- <<: *buildman_and_testpy_dfn -- --integratorcp_cm926ejs test.py: -- variables: -- TEST_PY_BD: "integratorcp_cm926ejs" -- TEST_PY_TEST_SPEC: "not sleep" -- TEST_PY_ID: "--id qemu" -- <<: *buildman_and_testpy_dfn -- --qemu_arm test.py: -- variables: -- TEST_PY_BD: "qemu_arm" -- TEST_PY_TEST_SPEC: "not sleep" -- <<: *buildman_and_testpy_dfn -- --qemu_arm64 test.py: -- variables: -- TEST_PY_BD: "qemu_arm64" -- TEST_PY_TEST_SPEC: "not sleep" -- <<: *buildman_and_testpy_dfn -- --qemu_malta test.py: -- variables: -- TEST_PY_BD: "malta" -- TEST_PY_TEST_SPEC: "not sleep and not efi" -- TEST_PY_ID: "--id qemu" -- <<: *buildman_and_testpy_dfn -- --qemu_maltael test.py: -- variables: -- TEST_PY_BD: "maltael" -- TEST_PY_TEST_SPEC: "not sleep and not efi" -- TEST_PY_ID: "--id qemu" -- <<: *buildman_and_testpy_dfn -- --qemu_malta64 test.py: -- variables: -- TEST_PY_BD: "malta64" -- TEST_PY_TEST_SPEC: "not sleep and not efi" -- TEST_PY_ID: "--id qemu" -- <<: *buildman_and_testpy_dfn -- --qemu_malta64el test.py: -- variables: -- TEST_PY_BD: "malta64el" -- TEST_PY_TEST_SPEC: "not sleep and not efi" -- TEST_PY_ID: "--id qemu" -- <<: *buildman_and_testpy_dfn -- --qemu-ppce500 test.py: -- variables: -- TEST_PY_BD: "qemu-ppce500" -- TEST_PY_TEST_SPEC: "not sleep" -- <<: *buildman_and_testpy_dfn -- --qemu-riscv32 test.py: -- variables: -- TEST_PY_BD: "qemu-riscv32" -- TEST_PY_TEST_SPEC: "not sleep" -- <<: *buildman_and_testpy_dfn -- --qemu-riscv64 test.py: -- variables: -- TEST_PY_BD: "qemu-riscv64" -- TEST_PY_TEST_SPEC: "not sleep" -- <<: *buildman_and_testpy_dfn -- --qemu-riscv32_spl test.py: -- variables: -- TEST_PY_BD: "qemu-riscv32_spl" -- TEST_PY_TEST_SPEC: "not sleep" -- <<: *buildman_and_testpy_dfn -- --qemu-riscv64_spl test.py: -- variables: -- TEST_PY_BD: "qemu-riscv64_spl" -- TEST_PY_TEST_SPEC: "not sleep" -- <<: *buildman_and_testpy_dfn -- --qemu-x86 test.py: -- variables: -- TEST_PY_BD: "qemu-x86" -- TEST_PY_TEST_SPEC: "not sleep" -- <<: *buildman_and_testpy_dfn -- --qemu-x86_64 test.py: -- variables: -- TEST_PY_BD: "qemu-x86_64" -- TEST_PY_TEST_SPEC: "not sleep" -- <<: *buildman_and_testpy_dfn -- --r2dplus_i82557c test.py: -- variables: -- TEST_PY_BD: "r2dplus" -- TEST_PY_ID: "--id i82557c_qemu" -- <<: *buildman_and_testpy_dfn -- --r2dplus_pcnet test.py: -- variables: -- TEST_PY_BD: "r2dplus" -- TEST_PY_ID: "--id pcnet_qemu" -- <<: *buildman_and_testpy_dfn -- --r2dplus_rtl8139 test.py: -- variables: -- TEST_PY_BD: "r2dplus" -- TEST_PY_ID: "--id rtl8139_qemu" -- <<: *buildman_and_testpy_dfn -+ - build - --r2dplus_tulip test.py: -+build rock-5b: -+ stage: build - variables: -- TEST_PY_BD: "r2dplus" -- TEST_PY_ID: "--id tulip_qemu" -- <<: *buildman_and_testpy_dfn -- --sifive_unleashed_sdcard test.py: -- variables: -- TEST_PY_BD: "sifive_unleashed" -- TEST_PY_ID: "--id sdcard_qemu" -- <<: *buildman_and_testpy_dfn -- --sifive_unleashed_spi-nor test.py: -- variables: -- TEST_PY_BD: "sifive_unleashed" -- TEST_PY_ID: "--id spi-nor_qemu" -- <<: *buildman_and_testpy_dfn -- --xilinx_zynq_virt test.py: -- variables: -- TEST_PY_BD: "xilinx_zynq_virt" -- TEST_PY_TEST_SPEC: "not sleep" -- TEST_PY_ID: "--id qemu" -- <<: *buildman_and_testpy_dfn -- --xilinx_versal_virt test.py: -- variables: -- TEST_PY_BD: "xilinx_versal_virt" -- TEST_PY_TEST_SPEC: "not sleep" -- TEST_PY_ID: "--id qemu" -- <<: *buildman_and_testpy_dfn -- --xtfpga test.py: -- variables: -- TEST_PY_BD: "xtfpga" -- TEST_PY_TEST_SPEC: "not sleep" -- TEST_PY_ID: "--id qemu" -- <<: *buildman_and_testpy_dfn -- --coreboot test.py: -- variables: -- TEST_PY_BD: "coreboot" -- TEST_PY_TEST_SPEC: "not sleep" -- TEST_PY_ID: "--id qemu" -+ DEBIAN_FRONTEND: noninteractive -+ GIT_SUBMODULE_STRATEGY: normal -+ RKBIN_REPO_URL: https://gitlab-ci-token:${CI_JOB_TOKEN}@${CI_SERVER_HOST}/obbardc/rkbin.git -+ before_script: -+ - apt update -+ - apt install -y bc build-essential device-tree-compiler git python3 wget bison flex python3-setuptools swig python3-dev libssl-dev python3-pyelftools -+ -+ script: -+ # download rkbin -+ - git clone --depth 1 -b master ${RKBIN_REPO_URL} $CI_PROJECT_DIR/../rkbin -+ -+ # download compilers -+ - mkdir -p $CI_PROJECT_DIR/../toolchain && cd $CI_PROJECT_DIR/../toolchain -+ - wget "https://developer.arm.com/-/media/Files/downloads/gnu/12.2.rel1/binrel/arm-gnu-toolchain-12.2.rel1-x86_64-aarch64-none-linux-gnu.tar.xz?rev=6750d007ffbf4134b30ea58ea5bf5223&hash=6C7D2A7C9BD409C42077F203DF120385AEEBB3F5" -O arm-gnu-toolchain-12.2.rel1-x86_64-aarch64-none-linux-gnu.tar.xz -+ - tar xf arm-gnu-toolchain-12.2.rel1-x86_64-aarch64-none-linux-gnu.tar.xz -+ -+ # prepare PATH -+ - export PATH=$PATH:$CI_PROJECT_DIR/../toolchain/arm-gnu-toolchain-12.2.rel1-x86_64-aarch64-none-linux-gnu/bin -+ - export CROSS_COMPILE=aarch64-none-linux-gnu- -+ - export ARCH=arm64 -+ - export BL31=../rkbin/bin/rk35/rk3588_bl31_v1.27.elf -+ - export ROCKCHIP_TPL=../rkbin/bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2736MHz_v1.08.bin -+ -+ # build -+ - cd $CI_PROJECT_DIR -+ - make rock5b-rk3588_defconfig -+ - make -+ - ../rkbin/tools/boot_merger rock5b-rk3588.ini - artifacts: - paths: -- - "*.html" -- - "*.css" -- expire_in: 1 week -- <<: *buildman_and_testpy_dfn -+ - u-boot.itb -+ - idbloader.img -+ - rock5b-rk3588.bin -diff --git a/Kconfig b/Kconfig -index b8f65589f4..7a8c190a7b 100644 ---- a/Kconfig -+++ b/Kconfig -@@ -427,16 +427,16 @@ config REMAKE_ELF - - config BUILD_TARGET - string "Build target special images" -+ default "u-boot-elf.srec" if RCAR_GEN3 -+ default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT -+ default "u-boot-with-spl.bin" if MPC85xx && !E500MC && !E5500 && !E6500 && SPL -+ default "u-boot-with-spl.imx" if ARCH_MX6 && SPL -+ default "u-boot-with-spl.kwb" if ARMADA_32BIT && SPL - default "u-boot-with-spl.sfp" if TARGET_SOCFPGA_ARRIA10 - default "u-boot-with-spl.sfp" if TARGET_SOCFPGA_GEN5 -- default "u-boot-with-spl.kwb" if ARMADA_32BIT && SPL -- default "u-boot-elf.srec" if RCAR_GEN3 - default "u-boot.itb" if !BINMAN && SPL_LOAD_FIT && (ARCH_ROCKCHIP || \ - ARCH_SUNXI || RISCV || ARCH_ZYNQMP) - default "u-boot.kwb" if (ARCH_KIRKWOOD || ARMADA_32BIT) && !SPL -- default "u-boot-with-spl.bin" if MPC85xx && !E500MC && !E5500 && !E6500 && SPL -- default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT -- default "u-boot-with-spl.imx" if ARCH_MX6 && SPL - help - Some SoCs need special image types (e.g. U-Boot binary - with a special header) as build targets. By defining -@@ -575,14 +575,6 @@ config MP - This provides an option to bringup different processors - in multiprocessor cases. - --config EXAMPLES -- bool "Compile API examples" -- depends on !SANDBOX -- default y if ARCH_QEMU -- help -- U-Boot provides an API for standalone applications. Examples are -- provided in directory examples/. -- - endmenu # General setup - - source "api/Kconfig" -diff --git a/MAINTAINERS b/MAINTAINERS -index 91d40ea4b6..d2e245e5e9 100644 ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -1249,6 +1249,12 @@ M: Heiko Schocher - S: Maintained - F: drivers/pci/pci_mpc85xx.c - -+PCI MPS -+M: Stephen Carlson -+S: Maintained -+F: cmd/pci_mps.c -+F: test/cmd/pci_mps.c -+ - POWER - M: Jaehoon Chung - S: Maintained -diff --git a/Makefile b/Makefile -index af1408222d..af062c0c53 100644 ---- a/Makefile -+++ b/Makefile -@@ -522,7 +522,7 @@ env_h := include/generated/environment.h - no-dot-config-targets := clean clobber mrproper distclean \ - help %docs check% coccicheck \ - ubootversion backup tests check pcheck qcheck tcheck \ -- pylint pylint_err -+ pylint pylint_err _pip pip pip_test pip_release - - config-targets := 0 - mixed-targets := 0 -@@ -790,6 +790,7 @@ KBUILD_CFLAGS += $(call cc-disable-warning, tautological-compare) - # See modpost pattern 2 - KBUILD_CFLAGS += $(call cc-option, -mno-global-merge,) - KBUILD_CFLAGS += $(call cc-option, -fcatch-undefined-behavior) -+KBUILD_CFLAGS += $(call cc-disable-warning, deprecated-non-prototype) - endif - - # These warnings generated too much noise in a regular build. -@@ -957,7 +958,6 @@ endif - # Always append INPUTS so that arch config.mk's can add custom ones - INPUTS-y += u-boot.srec u-boot.bin u-boot.sym System.map binary_size_check - --INPUTS-$(CONFIG_ONENAND_U_BOOT) += u-boot-onenand.bin - ifeq ($(CONFIG_SPL_FSL_PBL),y) - INPUTS-$(CONFIG_RAMBOOT_PBL) += u-boot-with-spl-pbl.bin - else -@@ -2274,6 +2274,21 @@ backup: - F=`basename $(srctree)` ; cd .. ; \ - gtar --force-local -zcvf `LC_ALL=C date "+$$F-%Y-%m-%d-%T.tar.gz"` $$F - -+PHONY += _pip pip pip_release -+ -+pip_release: PIP_ARGS="--real" -+pip_test: PIP_ARGS="" -+pip: PIP_ARGS="-n" -+ -+pip pip_test pip_release: _pip -+ -+_pip: -+ scripts/make_pip.sh u_boot_pylib ${PIP_ARGS} -+ scripts/make_pip.sh patman ${PIP_ARGS} -+ scripts/make_pip.sh buildman ${PIP_ARGS} -+ scripts/make_pip.sh dtoc ${PIP_ARGS} -+ scripts/make_pip.sh binman ${PIP_ARGS} -+ - help: - @echo 'Cleaning targets:' - @echo ' clean - Remove most generated files but keep the config' -@@ -2307,6 +2322,11 @@ help: - @echo " cfg - Don't build, just create the .cfg files" - @echo " envtools - Build only the target-side environment tools" - @echo '' -+ @echo 'PyPi / pip targets:' -+ @echo ' pip - Check building of PyPi packages' -+ @echo ' pip_test - Build PyPi pakages and upload to test server' -+ @echo ' pip_release - Build PyPi pakages and upload to release server' -+ @echo '' - @echo 'Static analysers' - @echo ' checkstack - Generate a list of stack hogs' - @echo ' coccicheck - Execute static code analysis with Coccinelle' -diff --git a/api/Kconfig b/api/Kconfig -index d9362724e5..6072288f9b 100644 ---- a/api/Kconfig -+++ b/api/Kconfig -@@ -10,9 +10,16 @@ config SYS_MMC_MAX_DEVICE - depends on API - default 1 - --endmenu -+config EXAMPLES -+ bool "Compile API examples" -+ depends on !SANDBOX -+ default y if ARCH_QEMU -+ help -+ U-Boot provides an API for standalone applications. Examples are -+ provided in directory examples/. - - config STANDALONE_LOAD_ADDR -+ depends on EXAMPLES - hex "Address in memory to link standalone applications to" - default 0xffffffff80200000 if MIPS && 64BIT - default 0x8c000000 if SH -@@ -30,3 +37,5 @@ config STANDALONE_LOAD_ADDR - This option defines a board specific value for the address where - standalone program gets loaded, thus overwriting the architecture - dependent default settings. -+ -+endmenu -diff --git a/arch/arc/dts/abilis_tb100.dts b/arch/arc/dts/abilis_tb100.dts -index 19e45b9c66..8f72e1aff4 100644 ---- a/arch/arc/dts/abilis_tb100.dts -+++ b/arch/arc/dts/abilis_tb100.dts -@@ -18,7 +18,7 @@ - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <500000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -diff --git a/arch/arc/dts/axc001.dtsi b/arch/arc/dts/axc001.dtsi -index 412580a380..93d99186c3 100644 ---- a/arch/arc/dts/axc001.dtsi -+++ b/arch/arc/dts/axc001.dtsi -@@ -11,7 +11,7 @@ - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <750000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -diff --git a/arch/arc/dts/axc003.dtsi b/arch/arc/dts/axc003.dtsi -index 75a9de61de..7765d8efa7 100644 ---- a/arch/arc/dts/axc003.dtsi -+++ b/arch/arc/dts/axc003.dtsi -@@ -11,7 +11,7 @@ - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <100000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -diff --git a/arch/arc/dts/axs10x_mb.dtsi b/arch/arc/dts/axs10x_mb.dtsi -index d4ff4f7039..3a7f939a00 100644 ---- a/arch/arc/dts/axs10x_mb.dtsi -+++ b/arch/arc/dts/axs10x_mb.dtsi -@@ -13,11 +13,11 @@ - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x00000000 0xe0000000 0x10000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - clocks { - compatible = "simple-bus"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - apbclk: apbclk { - compatible = "fixed-clock"; -@@ -29,7 +29,7 @@ - compatible = "fixed-clock"; - clock-frequency = <33333333>; - #clock-cells = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - mmcclk_ciu: mmcclk-ciu { -diff --git a/arch/arc/dts/emsdp.dts b/arch/arc/dts/emsdp.dts -index dbebdb4e76..8222d3ea66 100644 ---- a/arch/arc/dts/emsdp.dts -+++ b/arch/arc/dts/emsdp.dts -@@ -21,7 +21,7 @@ - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <40000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -diff --git a/arch/arc/dts/hsdk-common.dtsi b/arch/arc/dts/hsdk-common.dtsi -index 3fc82e57d7..eef3ee01e8 100644 ---- a/arch/arc/dts/hsdk-common.dtsi -+++ b/arch/arc/dts/hsdk-common.dtsi -@@ -23,7 +23,7 @@ - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <500000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -diff --git a/arch/arc/dts/iot_devkit.dts b/arch/arc/dts/iot_devkit.dts -index 2122827527..a33cf1d408 100644 ---- a/arch/arc/dts/iot_devkit.dts -+++ b/arch/arc/dts/iot_devkit.dts -@@ -19,7 +19,7 @@ - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <144000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -diff --git a/arch/arc/dts/nsim.dts b/arch/arc/dts/nsim.dts -index c2899ef2ea..2d3a7ecbc2 100644 ---- a/arch/arc/dts/nsim.dts -+++ b/arch/arc/dts/nsim.dts -@@ -18,7 +18,7 @@ - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <70000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -diff --git a/arch/arc/dts/skeleton.dtsi b/arch/arc/dts/skeleton.dtsi -index 279fc6cacf..d32ca3b77b 100644 ---- a/arch/arc/dts/skeleton.dtsi -+++ b/arch/arc/dts/skeleton.dtsi -@@ -14,7 +14,7 @@ - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - timer@0 { - compatible = "snps,arc-timer"; -diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig -index 8a1e223422..f0118e2254 100644 ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -588,6 +588,7 @@ config ARCH_KIRKWOOD - - config ARCH_MVEBU - bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)" -+ select ARCH_EARLY_INIT_R if ARM64 - select DM - select DM_SERIAL - select DM_SPI -@@ -1208,6 +1209,7 @@ config ARCH_VF610 - config ARCH_ZYNQ - bool "Xilinx Zynq based platform" - select ARM_TWD_TIMER -+ select ARCH_EARLY_INIT_R if FPGA || (SPL && SPL_FPGA) - select CLK - select CLK_ZYNQ - select CPU_V7A -@@ -1229,7 +1231,6 @@ config ARCH_ZYNQ - select SPL_TIMER if SPL - select SUPPORT_SPL - select TIMER -- imply ARCH_EARLY_INIT_R - imply BOARD_LATE_INIT - imply CMD_CLK - imply CMD_DM -diff --git a/arch/arm/cpu/arm926ejs/Makefile b/arch/arm/cpu/arm926ejs/Makefile -index 7e7ad4f35d..8cfe3f0fbb 100644 ---- a/arch/arm/cpu/arm926ejs/Makefile -+++ b/arch/arm/cpu/arm926ejs/Makefile -@@ -13,7 +13,6 @@ endif - endif - - obj-$(if $(filter mxs,$(SOC)),y) += mxs/ --obj-$(if $(filter spear,$(SOC)),y) += spear/ - obj-$(CONFIG_ARCH_SUNXI) += sunxi/ - - # some files can only build in ARM or THUMB2, not THUMB1 -diff --git a/arch/arm/cpu/armv7/ls102xa/fdt.c b/arch/arm/cpu/armv7/ls102xa/fdt.c -index 599b7e18ef..a5c5c780ae 100644 ---- a/arch/arm/cpu/armv7/ls102xa/fdt.c -+++ b/arch/arm/cpu/armv7/ls102xa/fdt.c -@@ -25,11 +25,7 @@ DECLARE_GLOBAL_DATA_PTR; - - void ft_fixup_enet_phy_connect_type(void *fdt) - { --#ifdef CONFIG_DM_ETH - struct udevice *dev; --#else -- struct eth_device *dev; --#endif - struct tsec_private *priv; - const char *enet_path, *phy_path; - char enet[16]; -@@ -37,12 +33,8 @@ void ft_fixup_enet_phy_connect_type(void *fdt) - int phy_node; - int i = 0; - uint32_t ph; --#ifdef CONFIG_DM_ETH - char *name[3] = { "ethernet@2d10000", "ethernet@2d50000", - "ethernet@2d90000" }; --#else -- char *name[3] = { "eTSEC1", "eTSEC2", "eTSEC3" }; --#endif - - for (; i < ARRAY_SIZE(name); i++) { - dev = eth_get_dev_by_name(name[i]); -@@ -53,11 +45,7 @@ void ft_fixup_enet_phy_connect_type(void *fdt) - continue; - } - --#ifdef CONFIG_DM_ETH - priv = dev_get_priv(dev); --#else -- priv = dev->priv; --#endif - if (priv->flags & TSEC_SGMII) - continue; - -diff --git a/arch/arm/cpu/armv7/s5p4418/cpu.c b/arch/arm/cpu/armv7/s5p4418/cpu.c -index fcaafc0ff7..8febfe5276 100644 ---- a/arch/arm/cpu/armv7/s5p4418/cpu.c -+++ b/arch/arm/cpu/armv7/s5p4418/cpu.c -@@ -84,10 +84,3 @@ void enable_caches(void) - /* Enable D-cache. I-cache is already enabled in start.S */ - dcache_enable(); - } -- --#if defined(CONFIG_ARCH_MISC_INIT) --int arch_misc_init(void) --{ -- return 0; --} --#endif /* CONFIG_ARCH_MISC_INIT */ -diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig -index 1305238c9d..7d5cf1594d 100644 ---- a/arch/arm/cpu/armv8/Kconfig -+++ b/arch/arm/cpu/armv8/Kconfig -@@ -1,5 +1,9 @@ - if ARM64 - -+config CMO_BY_VA_ONLY -+ bool "Force cache maintenance to be exclusively by VA" -+ depends on !SYS_DISABLE_DCACHE_OPS -+ - config ARMV8_SPL_EXCEPTION_VECTORS - bool "Install crash dump exception vectors" - depends on SPL -diff --git a/arch/arm/cpu/armv8/cache.S b/arch/arm/cpu/armv8/cache.S -index d1cee23437..3fe935cf28 100644 ---- a/arch/arm/cpu/armv8/cache.S -+++ b/arch/arm/cpu/armv8/cache.S -@@ -12,6 +12,7 @@ - #include - #include - -+#ifndef CONFIG_CMO_BY_VA_ONLY - /* - * void __asm_dcache_level(level) - * -@@ -116,6 +117,41 @@ ENTRY(__asm_invalidate_dcache_all) - ENDPROC(__asm_invalidate_dcache_all) - .popsection - -+.pushsection .text.__asm_flush_l3_dcache, "ax" -+WEAK(__asm_flush_l3_dcache) -+ mov x0, #0 /* return status as success */ -+ ret -+ENDPROC(__asm_flush_l3_dcache) -+.popsection -+ -+.pushsection .text.__asm_invalidate_l3_icache, "ax" -+WEAK(__asm_invalidate_l3_icache) -+ mov x0, #0 /* return status as success */ -+ ret -+ENDPROC(__asm_invalidate_l3_icache) -+.popsection -+ -+#else /* CONFIG_CMO_BY_VA */ -+ -+/* -+ * Define these so that they actively clash with in implementation -+ * accidentally selecting CONFIG_CMO_BY_VA -+ */ -+ -+.pushsection .text.__asm_invalidate_l3_icache, "ax" -+ENTRY(__asm_invalidate_l3_icache) -+ mov x0, xzr -+ ret -+ENDPROC(__asm_invalidate_l3_icache) -+.popsection -+.pushsection .text.__asm_flush_l3_dcache, "ax" -+ENTRY(__asm_flush_l3_dcache) -+ mov x0, xzr -+ ret -+ENDPROC(__asm_flush_l3_dcache) -+.popsection -+#endif /* CONFIG_CMO_BY_VA */ -+ - /* - * void __asm_flush_dcache_range(start, end) - * -@@ -189,20 +225,6 @@ WEAK(__asm_invalidate_l3_dcache) - ENDPROC(__asm_invalidate_l3_dcache) - .popsection - --.pushsection .text.__asm_flush_l3_dcache, "ax" --WEAK(__asm_flush_l3_dcache) -- mov x0, #0 /* return status as success */ -- ret --ENDPROC(__asm_flush_l3_dcache) --.popsection -- --.pushsection .text.__asm_invalidate_l3_icache, "ax" --WEAK(__asm_invalidate_l3_icache) -- mov x0, #0 /* return status as success */ -- ret --ENDPROC(__asm_invalidate_l3_icache) --.popsection -- - /* - * void __asm_switch_ttbr(ulong new_ttbr) - * -diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c -index 2a226fd063..697334086f 100644 ---- a/arch/arm/cpu/armv8/cache_v8.c -+++ b/arch/arm/cpu/armv8/cache_v8.c -@@ -163,6 +163,83 @@ static u64 *find_pte(u64 addr, int level) - return NULL; - } - -+#ifdef CONFIG_CMO_BY_VA_ONLY -+static void __cmo_on_leaves(void (*cmo_fn)(unsigned long, unsigned long), -+ u64 pte, int level, u64 base) -+{ -+ u64 *ptep; -+ int i; -+ -+ ptep = (u64 *)(pte & GENMASK_ULL(47, PAGE_SHIFT)); -+ for (i = 0; i < PAGE_SIZE / sizeof(u64); i++) { -+ u64 end, va = base + i * BIT(level2shift(level)); -+ u64 type, attrs; -+ -+ pte = ptep[i]; -+ type = pte & PTE_TYPE_MASK; -+ attrs = pte & PMD_ATTRINDX_MASK; -+ debug("PTE %llx at level %d VA %llx\n", pte, level, va); -+ -+ /* Not valid? next! */ -+ if (!(type & PTE_TYPE_VALID)) -+ continue; -+ -+ /* Not a leaf? Recurse on the next level */ -+ if (!(type == PTE_TYPE_BLOCK || -+ (level == 3 && type == PTE_TYPE_PAGE))) { -+ __cmo_on_leaves(cmo_fn, pte, level + 1, va); -+ continue; -+ } -+ -+ /* -+ * From this point, this must be a leaf. -+ * -+ * Start excluding non memory mappings -+ */ -+ if (attrs != PTE_BLOCK_MEMTYPE(MT_NORMAL) && -+ attrs != PTE_BLOCK_MEMTYPE(MT_NORMAL_NC)) -+ continue; -+ -+ end = va + BIT(level2shift(level)) - 1; -+ -+ /* No intersection with RAM? */ -+ if (end < gd->ram_base || -+ va >= (gd->ram_base + gd->ram_size)) -+ continue; -+ -+ /* -+ * OK, we have a partial RAM mapping. However, this -+ * can cover *more* than the RAM. Yes, u-boot is -+ * *that* braindead. Compute the intersection we care -+ * about, and not a byte more. -+ */ -+ va = max(va, (u64)gd->ram_base); -+ end = min(end, gd->ram_base + gd->ram_size); -+ -+ debug("Flush PTE %llx at level %d: %llx-%llx\n", -+ pte, level, va, end); -+ cmo_fn(va, end); -+ } -+} -+ -+static void apply_cmo_to_mappings(void (*cmo_fn)(unsigned long, unsigned long)) -+{ -+ u64 va_bits; -+ int sl = 0; -+ -+ if (!gd->arch.tlb_addr) -+ return; -+ -+ get_tcr(NULL, &va_bits); -+ if (va_bits < 39) -+ sl = 1; -+ -+ __cmo_on_leaves(cmo_fn, gd->arch.tlb_addr, sl, 0); -+} -+#else -+static inline void apply_cmo_to_mappings(void *dummy) {} -+#endif -+ - /* Returns and creates a new full table (512 entries) */ - static u64 *create_table(void) - { -@@ -222,153 +299,110 @@ static void split_block(u64 *pte, int level) - set_pte_table(pte, new_table); - } - --/* Add one mm_region map entry to the page tables */ --static void add_map(struct mm_region *map) -+static void map_range(u64 virt, u64 phys, u64 size, int level, -+ u64 *table, u64 attrs) - { -- u64 *pte; -- u64 virt = map->virt; -- u64 phys = map->phys; -- u64 size = map->size; -- u64 attrs = map->attrs | PTE_TYPE_BLOCK | PTE_BLOCK_AF; -- u64 blocksize; -- int level; -- u64 *new_table; -+ u64 map_size = BIT_ULL(level2shift(level)); -+ int i, idx; - -- while (size) { -- pte = find_pte(virt, 0); -- if (pte && (pte_type(pte) == PTE_TYPE_FAULT)) { -- debug("Creating table for virt 0x%llx\n", virt); -- new_table = create_table(); -- set_pte_table(pte, new_table); -- } -+ idx = (virt >> level2shift(level)) & (MAX_PTE_ENTRIES - 1); -+ for (i = idx; size; i++) { -+ u64 next_size, *next_table; - -- for (level = 1; level < 4; level++) { -- pte = find_pte(virt, level); -- if (!pte) -- panic("pte not found\n"); -- -- blocksize = 1ULL << level2shift(level); -- debug("Checking if pte fits for virt=%llx size=%llx blocksize=%llx\n", -- virt, size, blocksize); -- if (size >= blocksize && !(virt & (blocksize - 1))) { -- /* Page fits, create block PTE */ -- debug("Setting PTE %p to block virt=%llx\n", -- pte, virt); -- if (level == 3) -- *pte = phys | attrs | PTE_TYPE_PAGE; -- else -- *pte = phys | attrs; -- virt += blocksize; -- phys += blocksize; -- size -= blocksize; -- break; -- } else if (pte_type(pte) == PTE_TYPE_FAULT) { -- /* Page doesn't fit, create subpages */ -- debug("Creating subtable for virt 0x%llx blksize=%llx\n", -- virt, blocksize); -- new_table = create_table(); -- set_pte_table(pte, new_table); -- } else if (pte_type(pte) == PTE_TYPE_BLOCK) { -- debug("Split block into subtable for virt 0x%llx blksize=0x%llx\n", -- virt, blocksize); -- split_block(pte, level); -- } -+ if (level >= 1 && -+ size >= map_size && !(virt & (map_size - 1))) { -+ if (level == 3) -+ table[i] = phys | attrs | PTE_TYPE_PAGE; -+ else -+ table[i] = phys | attrs; -+ -+ virt += map_size; -+ phys += map_size; -+ size -= map_size; -+ -+ continue; - } -+ -+ /* Going one level down */ -+ if (pte_type(&table[i]) == PTE_TYPE_FAULT) -+ set_pte_table(&table[i], create_table()); -+ -+ next_table = (u64 *)(table[i] & GENMASK_ULL(47, PAGE_SHIFT)); -+ next_size = min(map_size - (virt & (map_size - 1)), size); -+ -+ map_range(virt, phys, next_size, level + 1, next_table, attrs); -+ -+ virt += next_size; -+ phys += next_size; -+ size -= next_size; - } - } - --enum pte_type { -- PTE_INVAL, -- PTE_BLOCK, -- PTE_LEVEL, --}; -- --/* -- * This is a recursively called function to count the number of -- * page tables we need to cover a particular PTE range. If you -- * call this with level = -1 you basically get the full 48 bit -- * coverage. -- */ --static int count_required_pts(u64 addr, int level, u64 maxaddr) -+static void add_map(struct mm_region *map) - { -- int levelshift = level2shift(level); -- u64 levelsize = 1ULL << levelshift; -- u64 levelmask = levelsize - 1; -- u64 levelend = addr + levelsize; -- int r = 0; -- int i; -- enum pte_type pte_type = PTE_INVAL; -+ u64 attrs = map->attrs | PTE_TYPE_BLOCK | PTE_BLOCK_AF; -+ u64 va_bits; -+ int level = 0; - -- for (i = 0; mem_map[i].size || mem_map[i].attrs; i++) { -- struct mm_region *map = &mem_map[i]; -- u64 start = map->virt; -- u64 end = start + map->size; -+ get_tcr(NULL, &va_bits); -+ if (va_bits < 39) -+ level = 1; - -- /* Check if the PTE would overlap with the map */ -- if (max(addr, start) <= min(levelend, end)) { -- start = max(addr, start); -- end = min(levelend, end); -+ map_range(map->virt, map->phys, map->size, level, -+ (u64 *)gd->arch.tlb_addr, attrs); -+} - -- /* We need a sub-pt for this level */ -- if ((start & levelmask) || (end & levelmask)) { -- pte_type = PTE_LEVEL; -- break; -- } -+static void count_range(u64 virt, u64 size, int level, int *cntp) -+{ -+ u64 map_size = BIT_ULL(level2shift(level)); -+ int i, idx; - -- /* Lv0 can not do block PTEs, so do levels here too */ -- if (level <= 0) { -- pte_type = PTE_LEVEL; -- break; -- } -+ idx = (virt >> level2shift(level)) & (MAX_PTE_ENTRIES - 1); -+ for (i = idx; size; i++) { -+ u64 next_size; - -- /* PTE is active, but fits into a block */ -- pte_type = PTE_BLOCK; -- } -- } -+ if (level >= 1 && -+ size >= map_size && !(virt & (map_size - 1))) { -+ virt += map_size; -+ size -= map_size; - -- /* -- * Block PTEs at this level are already covered by the parent page -- * table, so we only need to count sub page tables. -- */ -- if (pte_type == PTE_LEVEL) { -- int sublevel = level + 1; -- u64 sublevelsize = 1ULL << level2shift(sublevel); -- -- /* Account for the new sub page table ... */ -- r = 1; -- -- /* ... and for all child page tables that one might have */ -- for (i = 0; i < MAX_PTE_ENTRIES; i++) { -- r += count_required_pts(addr, sublevel, maxaddr); -- addr += sublevelsize; -- -- if (addr >= maxaddr) { -- /* -- * We reached the end of address space, no need -- * to look any further. -- */ -- break; -- } -+ continue; - } -- } - -- return r; -+ /* Going one level down */ -+ (*cntp)++; -+ next_size = min(map_size - (virt & (map_size - 1)), size); -+ -+ count_range(virt, next_size, level + 1, cntp); -+ -+ virt += next_size; -+ size -= next_size; -+ } - } - --/* Returns the estimated required size of all page tables */ --__weak u64 get_page_table_size(void) -+static int count_ranges(void) - { -- u64 one_pt = MAX_PTE_ENTRIES * sizeof(u64); -- u64 size = 0; -+ int i, count = 0, level = 0; - u64 va_bits; -- int start_level = 0; - - get_tcr(NULL, &va_bits); - if (va_bits < 39) -- start_level = 1; -+ level = 1; -+ -+ for (i = 0; mem_map[i].size || mem_map[i].attrs; i++) -+ count_range(mem_map[i].virt, mem_map[i].size, level, &count); -+ -+ return count; -+} -+ -+/* Returns the estimated required size of all page tables */ -+__weak u64 get_page_table_size(void) -+{ -+ u64 one_pt = MAX_PTE_ENTRIES * sizeof(u64); -+ u64 size; - - /* Account for all page tables we would need to cover our memory map */ -- size = one_pt * count_required_pts(0, start_level - 1, 1ULL << va_bits); -+ size = one_pt * count_ranges(); - - /* - * We need to duplicate our page table once to have an emergency pt to -@@ -447,8 +481,12 @@ __weak void mmu_setup(void) - */ - void invalidate_dcache_all(void) - { -+#ifndef CONFIG_CMO_BY_VA_ONLY - __asm_invalidate_dcache_all(); - __asm_invalidate_l3_dcache(); -+#else -+ apply_cmo_to_mappings(invalidate_dcache_range); -+#endif - } - - /* -@@ -458,6 +496,7 @@ void invalidate_dcache_all(void) - */ - inline void flush_dcache_all(void) - { -+#ifndef CONFIG_CMO_BY_VA_ONLY - int ret; - - __asm_flush_dcache_all(); -@@ -466,6 +505,9 @@ inline void flush_dcache_all(void) - debug("flushing dcache returns 0x%x\n", ret); - else - debug("flushing dcache successfully.\n"); -+#else -+ apply_cmo_to_mappings(flush_dcache_range); -+#endif - } - - #ifndef CONFIG_SYS_DISABLE_DCACHE_OPS -@@ -520,9 +562,19 @@ void dcache_disable(void) - if (!(sctlr & CR_C)) - return; - -+ if (IS_ENABLED(CONFIG_CMO_BY_VA_ONLY)) { -+ /* -+ * When invalidating by VA, do it *before* turning the MMU -+ * off, so that at least our stack is coherent. -+ */ -+ flush_dcache_all(); -+ } -+ - set_sctlr(sctlr & ~(CR_C|CR_M)); - -- flush_dcache_all(); -+ if (!IS_ENABLED(CONFIG_CMO_BY_VA_ONLY)) -+ flush_dcache_all(); -+ - __asm_invalidate_tlb_all(); - } - -diff --git a/arch/arm/cpu/armv8/cpu.c b/arch/arm/cpu/armv8/cpu.c -index db5d460eb4..3c7f36ad8d 100644 ---- a/arch/arm/cpu/armv8/cpu.c -+++ b/arch/arm/cpu/armv8/cpu.c -@@ -48,18 +48,26 @@ int cleanup_before_linux(void) - - disable_interrupts(); - -- /* -- * Turn off I-cache and invalidate it -- */ -- icache_disable(); -- invalidate_icache_all(); -+ if (IS_ENABLED(CONFIG_CMO_BY_VA_ONLY)) { -+ /* -+ * Disable D-cache. -+ */ -+ dcache_disable(); -+ } else { -+ /* -+ * Turn off I-cache and invalidate it -+ */ -+ icache_disable(); -+ invalidate_icache_all(); - -- /* -- * turn off D-cache -- * dcache_disable() in turn flushes the d-cache and disables MMU -- */ -- dcache_disable(); -- invalidate_dcache_all(); -+ /* -+ * turn off D-cache -+ * dcache_disable() in turn flushes the d-cache and disables -+ * MMU -+ */ -+ dcache_disable(); -+ invalidate_dcache_all(); -+ } - - return 0; - } -diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index c160e884bf..97a48327c4 100644 ---- a/arch/arm/dts/Makefile -+++ b/arch/arm/dts/Makefile -@@ -996,6 +996,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \ - imx8mq-mnt-reform2.dtb \ - imx8mq-phanbell.dtb \ - imx8mp-dhcom-pdk2.dtb \ -+ imx8mp-dhcom-pdk3.dtb \ - imx8mp-evk.dtb \ - imx8mp-icore-mx8mp-edimm2.2.dtb \ - imx8mp-msc-sm2s.dtb \ -@@ -1259,7 +1260,10 @@ dtb-$(CONFIG_SOC_K3_AM654) += \ - k3-am6528-iot2050-basic.dtb \ - k3-am6528-iot2050-basic-pg2.dtb \ - k3-am6548-iot2050-advanced.dtb \ -- k3-am6548-iot2050-advanced-pg2.dtb -+ k3-am6548-iot2050-advanced-pg2.dtb \ -+ k3-am6548-iot2050-advanced-m2.dtb \ -+ k3-am6548-iot2050-advanced-m2-bkey-usb3-overlay.dtbo \ -+ k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dtbo - dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \ - k3-j721e-r5-common-proc-board.dtb \ - k3-j7200-common-proc-board.dtb \ -diff --git a/arch/arm/dts/am335x-brppt1-mmc-u-boot.dtsi b/arch/arm/dts/am335x-brppt1-mmc-u-boot.dtsi -index a3d5650e48..fe28ded757 100644 ---- a/arch/arm/dts/am335x-brppt1-mmc-u-boot.dtsi -+++ b/arch/arm/dts/am335x-brppt1-mmc-u-boot.dtsi -@@ -6,69 +6,69 @@ - - / { - ocp { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &l4_wkup { -- u-boot,dm-pre-reloc; -+ bootph-all; - segment@200000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - target-module@0 - { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "simple-bus"; - }; - target-module@7000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "simple-bus"; - }; - target-module@9000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "simple-bus"; - }; - }; - }; - - &wkup_cm { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &l4_wkup_clkctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &l4_per { -- u-boot,dm-pre-reloc; -+ bootph-all; - segment@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "simple-bus"; - target-module@4c000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "simple-bus"; - }; - }; - - segment@100000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "simple-bus"; - target-module@ac000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "simple-bus"; - }; - target-module@ae000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "simple-bus"; - }; - }; - }; - - &prcm { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio0_target { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &prcm_clocks { -@@ -80,33 +80,33 @@ - }; - - &i2c0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &mmc1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &mmc2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/am335x-brsmarc1.dts b/arch/arm/dts/am335x-brsmarc1.dts -index 25cdb11164..2c525c6e62 100644 ---- a/arch/arm/dts/am335x-brsmarc1.dts -+++ b/arch/arm/dts/am335x-brsmarc1.dts -@@ -122,7 +122,7 @@ - }; - - &uart0 { /* console uart */ -- u-boot,dm-spl; -+ bootph-pre-ram; - status = "okay"; - }; - -@@ -139,12 +139,12 @@ - }; - - &i2c0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - status = "okay"; - clock-frequency = <100000>; - - tps: tps@24 { /* PMIC controller */ -- u-boot,dm-spl; -+ bootph-pre-ram; - reg = <0x24>; - compatible = "ti,tps65217"; - }; -@@ -176,12 +176,12 @@ - }; - - &i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - status = "okay"; - }; - - &spi0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - status = "okay"; - - cs-gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>, -@@ -192,8 +192,8 @@ - spi-max-frequency = <24000000>; - - spi_flash: spiflash@0 { -- u-boot,dm-spl; -- u-boot,dm-pre-reloc; -+ bootph-pre-ram; -+ bootph-all; - compatible = "spidev", "spi-flash"; - spi-max-frequency = <24000000>; - reg = <0>; -@@ -201,7 +201,7 @@ - }; - - &spi1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - status = "okay"; - cs-gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>, - <&gpio0 19 GPIO_ACTIVE_HIGH>, -@@ -302,10 +302,10 @@ - segment@300000 { - - target-module@e000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - lcdc: lcdc@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - ti,no-reset-on-init; - ti,no-idle-on-init; -@@ -327,22 +327,22 @@ - }; - - &gpio0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - ti,no-reset-on-init; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - ti,no-reset-on-init; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - ti,no-reset-on-init; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - ti,no-reset-on-init; - }; - -diff --git a/arch/arm/dts/am335x-brxre1.dts b/arch/arm/dts/am335x-brxre1.dts -index 485c8e3613..544dc5170f 100644 ---- a/arch/arm/dts/am335x-brxre1.dts -+++ b/arch/arm/dts/am335x-brxre1.dts -@@ -113,7 +113,7 @@ - }; - - &uart0 { /* console uart */ -- u-boot,dm-spl; -+ bootph-pre-ram; - status = "okay"; - }; - -@@ -130,12 +130,12 @@ - }; - - &i2c0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - status = "okay"; - clock-frequency = <100000>; - - tps: tps@24 { /* PMIC controller */ -- u-boot,dm-spl; -+ bootph-pre-ram; - reg = <0x24>; - compatible = "ti,tps65217"; - -@@ -233,7 +233,7 @@ - }; - - &mmc1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - vmmc-supply = <&vmmcsd_fixed>; - bus-width = <0x4>; - ti,non-removable; -@@ -243,7 +243,7 @@ - }; - - &mmc2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - vmmc-supply = <&vmmcsd_fixed>; - bus-width = <0x8>; - ti,non-removable; -@@ -257,10 +257,10 @@ - segment@300000 { - - target-module@e000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - lcdc: lcdc@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - ti,no-reset-on-init; - ti,no-idle-on-init; -@@ -282,22 +282,22 @@ - }; - - &gpio0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - ti,no-reset-on-init; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - ti,no-reset-on-init; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - ti,no-reset-on-init; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - ti,no-reset-on-init; - }; - -diff --git a/arch/arm/dts/am335x-evm-u-boot.dtsi b/arch/arm/dts/am335x-evm-u-boot.dtsi -index 8fc65df2ef..82a483ae3e 100644 ---- a/arch/arm/dts/am335x-evm-u-boot.dtsi -+++ b/arch/arm/dts/am335x-evm-u-boot.dtsi -@@ -6,14 +6,14 @@ - #include "am33xx-u-boot.dtsi" - - &l4_per { -- u-boot,dm-pre-reloc; -+ bootph-all; - segment@300000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - target-module@e000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - lcdc: lcdc@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -@@ -28,27 +28,27 @@ - }; - - &i2c0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &l4_wkup { -- u-boot,dm-pre-reloc; -+ bootph-all; - segment@200000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - target-module@9000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &mmc1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &mmc2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/am335x-evmsk-u-boot.dtsi b/arch/arm/dts/am335x-evmsk-u-boot.dtsi -index 1003f4d31a..669cb6bf16 100644 ---- a/arch/arm/dts/am335x-evmsk-u-boot.dtsi -+++ b/arch/arm/dts/am335x-evmsk-u-boot.dtsi -@@ -12,10 +12,10 @@ - segment@300000 { - - target-module@e000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - lcdc: lcdc@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -diff --git a/arch/arm/dts/am335x-guardian-u-boot.dtsi b/arch/arm/dts/am335x-guardian-u-boot.dtsi -index 29d8147014..26c011dacd 100644 ---- a/arch/arm/dts/am335x-guardian-u-boot.dtsi -+++ b/arch/arm/dts/am335x-guardian-u-boot.dtsi -@@ -8,12 +8,12 @@ - - / { - ocp { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &l4_wkup { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &l4_per { -@@ -21,25 +21,25 @@ - segment@300000 { - - target-module@e000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - lcdc: lcdc@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; - }; - - &mmc1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &mmc1_pins { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &scm { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &spi0 { -@@ -54,31 +54,31 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0_pins { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &usb { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &usb_ctrl_mod { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &usb0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &usb0_phy { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &am33xx_pinmux { -- u-boot,dm-pre-reloc; -+ bootph-all; - - lcd0_pins: pinmux_lcd0_pins { - pinctrl-single,pins = < -diff --git a/arch/arm/dts/am335x-pdu001-u-boot.dtsi b/arch/arm/dts/am335x-pdu001-u-boot.dtsi -index f1860ee3e4..4bb4bed4c0 100644 ---- a/arch/arm/dts/am335x-pdu001-u-boot.dtsi -+++ b/arch/arm/dts/am335x-pdu001-u-boot.dtsi -@@ -6,65 +6,65 @@ - #include "am33xx-u-boot.dtsi" - - &l4_wkup { -- u-boot,dm-pre-reloc; -+ bootph-all; - segment@200000 { - - target-module@10000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; - - &l4_per { -- u-boot,dm-pre-reloc; -+ bootph-all; - segment@100000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - target-module@a6000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - segment@300000 { - - target-module@e000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - lcdc: lcdc@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; - }; - - &scm { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &am33xx_pinmux { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart3_pins { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &mmc1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &mmc1_pins { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &mmc2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &mmc2_pins { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/am335x-pxm50-u-boot.dtsi b/arch/arm/dts/am335x-pxm50-u-boot.dtsi -index e5af9fdf89..d8c21b6b82 100644 ---- a/arch/arm/dts/am335x-pxm50-u-boot.dtsi -+++ b/arch/arm/dts/am335x-pxm50-u-boot.dtsi -@@ -12,10 +12,10 @@ - segment@300000 { - - target-module@e000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - lcdc: lcdc@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -diff --git a/arch/arm/dts/am335x-regor-rdk-u-boot.dtsi b/arch/arm/dts/am335x-regor-rdk-u-boot.dtsi -index 4052d0ee21..e07e3aa8cb 100644 ---- a/arch/arm/dts/am335x-regor-rdk-u-boot.dtsi -+++ b/arch/arm/dts/am335x-regor-rdk-u-boot.dtsi -@@ -15,19 +15,19 @@ - }; - - ocp { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &i2c0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &mmc1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; - }; -diff --git a/arch/arm/dts/am335x-rut-u-boot.dtsi b/arch/arm/dts/am335x-rut-u-boot.dtsi -index a38c2dc607..62638c7da9 100644 ---- a/arch/arm/dts/am335x-rut-u-boot.dtsi -+++ b/arch/arm/dts/am335x-rut-u-boot.dtsi -@@ -12,10 +12,10 @@ - segment@300000 { - - target-module@e000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - lcdc: lcdc@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -diff --git a/arch/arm/dts/am335x-sancloud-bbe-lite-u-boot.dtsi b/arch/arm/dts/am335x-sancloud-bbe-lite-u-boot.dtsi -index 01c105ebb3..fd47bc23a2 100644 ---- a/arch/arm/dts/am335x-sancloud-bbe-lite-u-boot.dtsi -+++ b/arch/arm/dts/am335x-sancloud-bbe-lite-u-boot.dtsi -@@ -9,36 +9,36 @@ - &l4_wkup { - segment@200000 { - target-module@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; - - &prcm { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &per_cm { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &l4ls_clkctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &l4_per { -- u-boot,dm-pre-reloc; -+ bootph-all; - segment@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - target-module@30000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; - - &spi0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - channel@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; -diff --git a/arch/arm/dts/am335x-shc-u-boot.dtsi b/arch/arm/dts/am335x-shc-u-boot.dtsi -index 359ae05209..f9b6cb3256 100644 ---- a/arch/arm/dts/am335x-shc-u-boot.dtsi -+++ b/arch/arm/dts/am335x-shc-u-boot.dtsi -@@ -7,45 +7,45 @@ - - / { - ocp { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &l4_wkup { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &scm { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &am33xx_pinmux { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0_pins { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &mmc1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; - }; - - &emmc_pins { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &mmc2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &mmc1_pins { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &mmc3 { -diff --git a/arch/arm/dts/am335x-wega-rdk-u-boot.dtsi b/arch/arm/dts/am335x-wega-rdk-u-boot.dtsi -index b3f21e7f52..0e9804bd31 100644 ---- a/arch/arm/dts/am335x-wega-rdk-u-boot.dtsi -+++ b/arch/arm/dts/am335x-wega-rdk-u-boot.dtsi -@@ -15,16 +15,16 @@ - }; - - ocp { -- u-boot,dm-pre-reloc; -+ bootph-all; - - l4_wkup@44c00000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - segment@200000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - target-module@9000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -@@ -32,14 +32,14 @@ - }; - - &i2c0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &mmc1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; - }; -diff --git a/arch/arm/dts/am33xx-u-boot.dtsi b/arch/arm/dts/am33xx-u-boot.dtsi -index 61d10b841b..1d09f48bb2 100644 ---- a/arch/arm/dts/am33xx-u-boot.dtsi -+++ b/arch/arm/dts/am33xx-u-boot.dtsi -@@ -6,7 +6,7 @@ - - / { - ocp { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -diff --git a/arch/arm/dts/am3517-evm-u-boot.dtsi b/arch/arm/dts/am3517-evm-u-boot.dtsi -index 1a70630322..8d486f0020 100644 ---- a/arch/arm/dts/am3517-evm-u-boot.dtsi -+++ b/arch/arm/dts/am3517-evm-u-boot.dtsi -@@ -18,37 +18,37 @@ - }; - - &gpio1 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &gpio2 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &gpio3 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &gpio5 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &gpio6 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &mmc2 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &mmc3 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &uart1 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &uart2 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/am4372-generic-u-boot.dtsi b/arch/arm/dts/am4372-generic-u-boot.dtsi -index 6ba5c16492..1dd0a5dac1 100644 ---- a/arch/arm/dts/am4372-generic-u-boot.dtsi -+++ b/arch/arm/dts/am4372-generic-u-boot.dtsi -@@ -7,10 +7,10 @@ - - /{ - ocp { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &i2c0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/am4372-u-boot.dtsi b/arch/arm/dts/am4372-u-boot.dtsi -index 986ae17470..2fac2fcdf9 100644 ---- a/arch/arm/dts/am4372-u-boot.dtsi -+++ b/arch/arm/dts/am4372-u-boot.dtsi -@@ -27,41 +27,41 @@ - }; - - &dwc3_1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb2_phy1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &am43xx_control_usb2phy1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &ocp2scp0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &dwc3_2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb2_phy2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &am43xx_control_usb2phy2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &ocp2scp1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/am437x-gp-evm-u-boot.dtsi b/arch/arm/dts/am437x-gp-evm-u-boot.dtsi -index b55aa8e763..da0b1365ff 100644 ---- a/arch/arm/dts/am437x-gp-evm-u-boot.dtsi -+++ b/arch/arm/dts/am437x-gp-evm-u-boot.dtsi -@@ -11,50 +11,50 @@ - - /{ - ocp { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mmc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mac { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &davinci_mdio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &cpsw_emac0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &phy_sel { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &l4_wkup { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &scm { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &scm_conf { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - ðphy0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/am437x-idk-evm-u-boot.dtsi b/arch/arm/dts/am437x-idk-evm-u-boot.dtsi -index 50fe09cfc3..4e6ad9445b 100644 ---- a/arch/arm/dts/am437x-idk-evm-u-boot.dtsi -+++ b/arch/arm/dts/am437x-idk-evm-u-boot.dtsi -@@ -7,7 +7,7 @@ - - /{ - ocp { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - xtal25mhz: xtal25mhz { -@@ -18,11 +18,11 @@ - }; - - &uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - cdce913: cdce913@65 { - compatible = "ti,cdce913"; -@@ -34,5 +34,5 @@ - }; - - &mmc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/am437x-sk-evm-u-boot.dtsi b/arch/arm/dts/am437x-sk-evm-u-boot.dtsi -index 3aa9195e44..43e519c4e5 100644 ---- a/arch/arm/dts/am437x-sk-evm-u-boot.dtsi -+++ b/arch/arm/dts/am437x-sk-evm-u-boot.dtsi -@@ -7,18 +7,18 @@ - - /{ - ocp { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mmc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi -index 1b2648f64d..cb02b70e54 100644 ---- a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi -+++ b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi -@@ -21,15 +21,15 @@ - }; - - &spi0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - spi-flash@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &sdhci0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - ð0 { -diff --git a/arch/arm/dts/armada-3720-uDPU-u-boot.dtsi b/arch/arm/dts/armada-3720-uDPU-u-boot.dtsi -index 47d87d4bd8..485f1c5bb0 100644 ---- a/arch/arm/dts/armada-3720-uDPU-u-boot.dtsi -+++ b/arch/arm/dts/armada-3720-uDPU-u-boot.dtsi -@@ -21,15 +21,15 @@ - }; - - &spi0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - spi-flash@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &sdhci0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_sb { -diff --git a/arch/arm/dts/armada-385-atl-x530-u-boot.dtsi b/arch/arm/dts/armada-385-atl-x530-u-boot.dtsi -index 4a3fb2ce40..8fd829df70 100644 ---- a/arch/arm/dts/armada-385-atl-x530-u-boot.dtsi -+++ b/arch/arm/dts/armada-385-atl-x530-u-boot.dtsi -@@ -1,7 +1,7 @@ - // SPDX-License-Identifier: GPL-2.0 - - &watchdog { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - #include "mvebu-u-boot.dtsi" -diff --git a/arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi b/arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi -index 3f1e761a95..509d6ca69c 100644 ---- a/arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi -+++ b/arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi -@@ -12,24 +12,24 @@ - }; - - &i2c0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - i2cmux: i2cmux@70 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - i2c@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - i2c@1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - i2c@5 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - crypto@64 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -diff --git a/arch/arm/dts/armada-388-clearfog-u-boot.dtsi b/arch/arm/dts/armada-388-clearfog-u-boot.dtsi -index 96629294be..906d8f2e67 100644 ---- a/arch/arm/dts/armada-388-clearfog-u-boot.dtsi -+++ b/arch/arm/dts/armada-388-clearfog-u-boot.dtsi -@@ -1,38 +1,39 @@ - // SPDX-License-Identifier: GPL-2.0+ - - &spi1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - spi-flash@0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &sdhci { -- u-boot,dm-spl; -+ bootph-pre-ram; -+ non-removable; /* assume that the card is always present, required for eMMC variant */ - }; - - &gpio0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &ahci0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &ahci1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - eeprom@52 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - eeprom@53 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -diff --git a/arch/arm/dts/armada-388-helios4-u-boot.dtsi b/arch/arm/dts/armada-388-helios4-u-boot.dtsi -index bac4b06058..363056a705 100644 ---- a/arch/arm/dts/armada-388-helios4-u-boot.dtsi -+++ b/arch/arm/dts/armada-388-helios4-u-boot.dtsi -@@ -5,41 +5,41 @@ - }; - - &spi1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - spi-flash@0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &w25q32 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &ahci0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &ahci1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdhci { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - eeprom@52 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - eeprom@53 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -diff --git a/arch/arm/dts/armada-38x-controlcenterdc-u-boot.dtsi b/arch/arm/dts/armada-38x-controlcenterdc-u-boot.dtsi -index 0a94df9230..efeb16c1f1 100644 ---- a/arch/arm/dts/armada-38x-controlcenterdc-u-boot.dtsi -+++ b/arch/arm/dts/armada-38x-controlcenterdc-u-boot.dtsi -@@ -1,25 +1,25 @@ - &gpio0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &spi1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &I2C0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &PCA22 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - #include "mvebu-u-boot.dtsi" -diff --git a/arch/arm/dts/armada-ap80x-quad.dtsi b/arch/arm/dts/armada-ap80x-quad.dtsi -index 1220e986e3..19e27e4af5 100644 ---- a/arch/arm/dts/armada-ap80x-quad.dtsi -+++ b/arch/arm/dts/armada-ap80x-quad.dtsi -@@ -18,7 +18,7 @@ - - cpu@000 { - clocks; -- u-boot,dm-pre-reloc; -+ bootph-all; - device_type = "cpu"; - compatible = "arm,cortex-a72", "arm,armv8"; - reg = <0x000>; -@@ -26,7 +26,7 @@ - }; - cpu@001 { - clocks; -- u-boot,dm-pre-reloc; -+ bootph-all; - device_type = "cpu"; - compatible = "arm,cortex-a72", "arm,armv8"; - reg = <0x001>; -@@ -34,7 +34,7 @@ - }; - cpu@100 { - clocks; -- u-boot,dm-pre-reloc; -+ bootph-all; - device_type = "cpu"; - compatible = "arm,cortex-a72", "arm,armv8"; - reg = <0x100>; -@@ -42,7 +42,7 @@ - }; - cpu@101 { - clocks; -- u-boot,dm-pre-reloc; -+ bootph-all; - device_type = "cpu"; - compatible = "arm,cortex-a72", "arm,armv8"; - reg = <0x101>; -diff --git a/arch/arm/dts/armada-xp-theadorable-u-boot.dtsi b/arch/arm/dts/armada-xp-theadorable-u-boot.dtsi -index c98bfa1e18..48426f6d5c 100644 ---- a/arch/arm/dts/armada-xp-theadorable-u-boot.dtsi -+++ b/arch/arm/dts/armada-xp-theadorable-u-boot.dtsi -@@ -1,5 +1,5 @@ - &lcd0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - #include "mvebu-u-boot.dtsi" -diff --git a/arch/arm/dts/ast2500-evb.dts b/arch/arm/dts/ast2500-evb.dts -index 1fbacf985f..d481eadfeb 100644 ---- a/arch/arm/dts/ast2500-evb.dts -+++ b/arch/arm/dts/ast2500-evb.dts -@@ -19,7 +19,7 @@ - }; - - &uart5 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -@@ -28,17 +28,17 @@ - }; - - &wdt1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - - &wdt2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - - &wdt3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/arm/dts/ast2500-u-boot.dtsi b/arch/arm/dts/ast2500-u-boot.dtsi -index 057390fe70..ee14db3ee8 100644 ---- a/arch/arm/dts/ast2500-u-boot.dtsi -+++ b/arch/arm/dts/ast2500-u-boot.dtsi -@@ -8,19 +8,19 @@ - scu: clock-controller@1e6e2000 { - compatible = "aspeed,ast2500-scu"; - reg = <0x1e6e2000 0x1000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - rst: reset-controller { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "aspeed,ast2500-reset"; - #reset-cells = <1>; - }; - - sdrammc: sdrammc@1e6e0000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "aspeed,ast2500-sdrammc"; - reg = <0x1e6e0000 0x174 - 0x1e6e0200 0x1d4 >; -@@ -51,7 +51,7 @@ - }; - - &timer { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &mac0 { -diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts -index a097f320e4..9aac0e26f2 100644 ---- a/arch/arm/dts/ast2600-evb.dts -+++ b/arch/arm/dts/ast2600-evb.dts -@@ -58,7 +58,7 @@ - }; - - &uart5 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -@@ -258,11 +258,11 @@ - }; - - &hace { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - - &acry { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; -diff --git a/arch/arm/dts/ast2600-u-boot.dtsi b/arch/arm/dts/ast2600-u-boot.dtsi -index 4648c07437..f06f58204f 100644 ---- a/arch/arm/dts/ast2600-u-boot.dtsi -+++ b/arch/arm/dts/ast2600-u-boot.dtsi -@@ -8,21 +8,21 @@ - scu: clock-controller@1e6e2000 { - compatible = "aspeed,ast2600-scu"; - reg = <0x1e6e2000 0x1000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <1>; - #reset-cells = <1>; - uart-clk-source = <0x0>; /* uart clock source selection: 0: uxclk 1: huxclk*/ - }; - - rst: reset-controller { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "aspeed,ast2600-reset"; - aspeed,wdt = <&wdt1>; - #reset-cells = <1>; - }; - - sdrammc: sdrammc@1e6e0000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "aspeed,ast2600-sdrammc"; - reg = <0x1e6e0000 0x100 - 0x1e6e0100 0x300 -@@ -33,10 +33,10 @@ - }; - - ahb { -- u-boot,dm-pre-reloc; -+ bootph-all; - - apb { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - }; -diff --git a/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi b/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi -index d176e20f28..0c3c0406b4 100644 ---- a/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi -+++ b/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi -@@ -10,70 +10,70 @@ - - / { - ahb { -- u-boot,dm-pre-reloc; -+ bootph-all; - - apb { -- u-boot,dm-pre-reloc; -+ bootph-all; - - pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; - - chosen { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &clk32 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &dbgu { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &main_rc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &main_xtal { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_dbgu { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_sdhci0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pioA { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pioB { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pit64b0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdhci0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &slow_rc_osc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &slow_xtal { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/at91-sama5d27_giantboard.dts b/arch/arm/dts/at91-sama5d27_giantboard.dts -index 2625f81c8b..767766d4f8 100644 ---- a/arch/arm/dts/at91-sama5d27_giantboard.dts -+++ b/arch/arm/dts/at91-sama5d27_giantboard.dts -@@ -22,7 +22,7 @@ - }; - - chosen { -- u-boot,dm-pre-reloc; -+ bootph-all; - stdout-path = &uart1; - }; - -@@ -32,7 +32,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sdmmc1_default>; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - apb { -@@ -41,7 +41,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1_default>; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - i2c0: i2c@f8028000 { -@@ -65,12 +65,12 @@ - - pit: timer@f8048030 { - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - sfr: sfr@f8030000 { - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioA: pinctrl@fc038000 { -@@ -82,14 +82,14 @@ - , - ; - bias-pull-up; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - ck_cd { - pinmux = , - ; - bias-disable; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -97,7 +97,7 @@ - pinmux = , - ; - bias-disable; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pinctrl_i2c0_default: i2c0_default { -diff --git a/arch/arm/dts/at91-sama5d27_som1_ek.dts b/arch/arm/dts/at91-sama5d27_som1_ek.dts -index 70d15c8a62..861471dfdd 100644 ---- a/arch/arm/dts/at91-sama5d27_som1_ek.dts -+++ b/arch/arm/dts/at91-sama5d27_som1_ek.dts -@@ -51,7 +51,7 @@ - compatible = "atmel,sama5d27-som1-ek", "atmel,sama5d2", "atmel,sama5"; - - chosen { -- u-boot,dm-pre-reloc; -+ bootph-all; - stdout-path = &uart1; - }; - -@@ -85,7 +85,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sdmmc0_default>; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - sdmmc1: sdio-host@b0000000 { -@@ -93,7 +93,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sdmmc1_default>; - status = "okay"; /* conflict with qspi0 */ -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - apb { -@@ -103,10 +103,10 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - display-timings { -- u-boot,dm-pre-reloc; -+ bootph-all; - 480x272 { - clock-frequency = <9000000>; - hactive = <480>; -@@ -117,7 +117,7 @@ - vfront-porch = <2>; - vback-porch = <2>; - vsync-len = <11>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -@@ -126,7 +126,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1_default>; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioA: pinctrl@fc038000 { -@@ -178,7 +178,7 @@ - , - ; - bias-pull-up; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - ck_cd { -@@ -186,7 +186,7 @@ - , - ; - bias-disable; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -198,14 +198,14 @@ - , - ; - bias-pull-up; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - ck_cd { - pinmux = , - ; - bias-disable; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -213,7 +213,7 @@ - pinmux = , - ; - bias-disable; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pinctrl_usb_default: usb_default { -diff --git a/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi b/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi -index 41cf9061a1..8254392762 100644 ---- a/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi -+++ b/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi -@@ -9,42 +9,42 @@ - - / { - chosen { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &hlcdc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &qspi1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &qspi1_flash { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sfr { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_sdmmc0_default { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_uart0_default { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_qspi1_default { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/at91-sama5d2_icp-u-boot.dtsi b/arch/arm/dts/at91-sama5d2_icp-u-boot.dtsi -index b45de978c2..cd8976f7e1 100644 ---- a/arch/arm/dts/at91-sama5d2_icp-u-boot.dtsi -+++ b/arch/arm/dts/at91-sama5d2_icp-u-boot.dtsi -@@ -9,39 +9,39 @@ - - / { - chosen { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &pinctrl_mikrobus1_uart { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_qspi1_sck_cs_default { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_qspi1_dat_default { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_sdmmc0_default { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &qspi1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - flash@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &sdmmc0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0 { /* mikrobus1 uart */ -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - -diff --git a/arch/arm/dts/at91-sama5d2_ptc_ek.dts b/arch/arm/dts/at91-sama5d2_ptc_ek.dts -index 36d52c2c5e..b62b8a72cb 100644 ---- a/arch/arm/dts/at91-sama5d2_ptc_ek.dts -+++ b/arch/arm/dts/at91-sama5d2_ptc_ek.dts -@@ -52,7 +52,7 @@ - compatible = "atmel,sama5d2-ptc_ek", "atmel,sama5d2", "atmel,sama5"; - - chosen { -- u-boot,dm-pre-reloc; -+ bootph-all; - stdout-path = &uart0; - }; - -@@ -96,7 +96,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sdmmc0_default>; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - sdmmc1: sdio-host@b0000000 { -@@ -104,7 +104,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sdmmc1_default>; - status = "disabled"; /* conflicts with nand and qspi0*/ -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - apb { -@@ -123,7 +123,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart0_default>; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - i2c1: i2c@fc028000 { -@@ -175,7 +175,7 @@ - , - ; - bias-pull-up; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - ck_cd { -@@ -184,7 +184,7 @@ - , - ; - bias-disable; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -196,14 +196,14 @@ - , - ; - bias-pull-up; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - ck_cd { - pinmux = , - ; - bias-disable; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -211,7 +211,7 @@ - pinmux = , - ; - bias-disable; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pinctrl_usb_default: usb_default { -diff --git a/arch/arm/dts/at91-sama5d2_xplained.dts b/arch/arm/dts/at91-sama5d2_xplained.dts -index 78a3a851bb..4d28af6faa 100644 ---- a/arch/arm/dts/at91-sama5d2_xplained.dts -+++ b/arch/arm/dts/at91-sama5d2_xplained.dts -@@ -8,7 +8,7 @@ - compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5"; - - chosen { -- u-boot,dm-pre-reloc; -+ bootph-all; - stdout-path = &uart1; - }; - -@@ -46,7 +46,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sdmmc0_default>; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - sdmmc1: sdio-host@b0000000 { -@@ -54,7 +54,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sdmmc1_default>; - status = "okay"; /* conflict with qspi0 */ -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - apb { -@@ -64,10 +64,10 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - display-timings { -- u-boot,dm-pre-reloc; -+ bootph-all; - 480x272 { - clock-frequency = <9000000>; - hactive = <480>; -@@ -78,7 +78,7 @@ - vfront-porch = <2>; - vback-porch = <2>; - vsync-len = <11>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -@@ -87,7 +87,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_qspi0_sck_cs_default &pinctrl_qspi0_dat_default>; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - flash@0 { - compatible = "jedec,spi-nor"; -@@ -95,7 +95,7 @@ - spi-max-frequency = <83000000>; - spi-rx-bus-width = <4>; - spi-tx-bus-width = <4>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -104,13 +104,13 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_spi0_default>; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - spi_flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <50000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -129,7 +129,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1_default>; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - i2c1: i2c@fc028000 { -@@ -208,7 +208,7 @@ - pinmux = , - ; - bias-disable; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pinctrl_qspi0_dat_default: qspi0_dat_default { -@@ -217,7 +217,7 @@ - , - ; - bias-pull-up; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pinctrl_sdmmc0_default: sdmmc0_default { -@@ -232,7 +232,7 @@ - , - ; - bias-pull-up; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - ck_cd_default { -@@ -241,7 +241,7 @@ - , - ; - bias-disable; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -253,14 +253,14 @@ - , - ; - bias-pull-up; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - ck_cd { - pinmux = , - ; - bias-disable; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -269,14 +269,14 @@ - , - ; - bias-disable; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pinctrl_uart1_default: uart1_default { - pinmux = , - ; - bias-disable; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pinctrl_usb_default: usb_default { -diff --git a/arch/arm/dts/at91-sama5d3_xplained.dts b/arch/arm/dts/at91-sama5d3_xplained.dts -index fc508002a7..d291deb786 100644 ---- a/arch/arm/dts/at91-sama5d3_xplained.dts -+++ b/arch/arm/dts/at91-sama5d3_xplained.dts -@@ -14,7 +14,7 @@ - compatible = "atmel,sama5d3-xplained", "atmel,sama5d3", "atmel,sama5"; - - chosen { -- u-boot,dm-pre-reloc; -+ bootph-all; - stdout-path = &dbgu; - }; - -@@ -51,7 +51,7 @@ - ahb { - apb { - mmc0: mmc@f0000000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7 &pinctrl_mmc0_cd>; - vmmc-supply = <&vcc_mmc0_reg>; - vqmmc-supply = <&vcc_3v3_reg>; -@@ -64,7 +64,7 @@ - }; - - mmc1: mmc@f8000000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - vmmc-supply = <&vcc_3v3_reg>; - vqmmc-supply = <&vcc_3v3_reg>; - status = "disabled"; -@@ -215,13 +215,13 @@ - }; - - dbgu: serial@ffffee00 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - - pinctrl@fffff200 { - board { -- u-boot,dm-pre-reloc; -+ bootph-all; - pinctrl_i2c0_pu: i2c0_pu { - atmel,pins = - , -@@ -240,13 +240,13 @@ - }; - - pinctrl_mmc0_cd: mmc0_cd { -- u-boot,dm-pre-reloc; -+ bootph-all; - atmel,pins = - ; - }; - - pinctrl_mmc1_cd: mmc1_cd { -- u-boot,dm-pre-reloc; -+ bootph-all; - atmel,pins = - ; - }; -diff --git a/arch/arm/dts/at91-sama5d4_xplained.dts b/arch/arm/dts/at91-sama5d4_xplained.dts -index 74959253dc..95f2091afe 100644 ---- a/arch/arm/dts/at91-sama5d4_xplained.dts -+++ b/arch/arm/dts/at91-sama5d4_xplained.dts -@@ -54,7 +54,7 @@ - }; - - chosen { -- u-boot,dm-pre-reloc; -+ bootph-all; - stdout-path = &usart3; - }; - -@@ -92,10 +92,10 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb888>; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - display-timings { -- u-boot,dm-pre-reloc; -+ bootph-all; - 480x272 { - clock-frequency = <9000000>; - hactive = <480>; -@@ -106,17 +106,17 @@ - vfront-porch = <2>; - vback-porch = <2>; - vsync-len = <11>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; - - spi0: spi@f8010000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - cs-gpios = <&pioC 3 0>, <0>, <0>, <0>; - status = "okay"; - spi_flash@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "jedec,spi-nor"; - spi-max-frequency = <50000000>; - reg = <0>; -@@ -146,7 +146,7 @@ - }; - - mmc1: mmc@fc000000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>; - vmmc-supply = <&vcc_mmc1_reg>; -@@ -160,7 +160,7 @@ - }; - - usart3: serial@fc00c000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -@@ -193,9 +193,9 @@ - - pinctrl@fc06a000 { - board { -- u-boot,dm-pre-reloc; -+ bootph-all; - pinctrl_mmc1_cd: mmc1_cd { -- u-boot,dm-pre-reloc; -+ bootph-all; - atmel,pins = - ; - }; -diff --git a/arch/arm/dts/at91-sama5d4ek.dts b/arch/arm/dts/at91-sama5d4ek.dts -index c1d657814d..687a1d095e 100644 ---- a/arch/arm/dts/at91-sama5d4ek.dts -+++ b/arch/arm/dts/at91-sama5d4ek.dts -@@ -54,7 +54,7 @@ - }; - - chosen { -- u-boot,dm-pre-reloc; -+ bootph-all; - stdout-path = &usart3; - }; - -@@ -82,10 +82,10 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - display-timings { -- u-boot,dm-pre-reloc; -+ bootph-all; - 800x480 { - clock-frequency = <33260000>; - hactive = <800>; -@@ -96,7 +96,7 @@ - vfront-porch = <23>; - vback-porch = <22>; - vsync-len = <5>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -@@ -132,11 +132,11 @@ - }; - - spi0: spi@f8010000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - cs-gpios = <&pioC 3 0>, <0>, <0>, <0>; - status = "okay"; - spi_flash@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "jedec,spi-nor"; - spi-max-frequency = <50000000>; - reg = <0>; -@@ -186,7 +186,7 @@ - }; - - mmc1: mmc@fc000000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>; - status = "okay"; -@@ -202,7 +202,7 @@ - }; - - usart3: serial@fc00c000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -@@ -216,7 +216,7 @@ - - pinctrl@fc06a000 { - board { -- u-boot,dm-pre-reloc; -+ bootph-all; - pinctrl_macb0_phy_irq: macb0_phy_irq { - atmel,pins = - ; -@@ -226,7 +226,7 @@ - ; - }; - pinctrl_mmc1_cd: mmc1_cd { -- u-boot,dm-pre-reloc; -+ bootph-all; - atmel,pins = - ; - }; -diff --git a/arch/arm/dts/at91-sama7g5ek-u-boot.dtsi b/arch/arm/dts/at91-sama7g5ek-u-boot.dtsi -index a54cfaccbf..8b2e990de7 100644 ---- a/arch/arm/dts/at91-sama7g5ek-u-boot.dtsi -+++ b/arch/arm/dts/at91-sama7g5ek-u-boot.dtsi -@@ -16,7 +16,7 @@ - - / { - chosen { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - utmi { -@@ -68,7 +68,7 @@ - }; - - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - - usb2: usb@400000 { - compatible = "microchip,sama7g5-ohci", "usb-ohci"; -@@ -96,23 +96,23 @@ - }; - - &main_rc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &main_xtal { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pioA { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_flx3_default { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pioA { -- u-boot,dm-pre-reloc; -+ bootph-all; - - pinctrl_usb_default: usb_default { - pinmux = ; -@@ -121,23 +121,23 @@ - }; - - &pit64b0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &slow_rc_osc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &slow_xtal { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &usb2 { -diff --git a/arch/arm/dts/at91sam9260-smartweb.dts b/arch/arm/dts/at91sam9260-smartweb.dts -index a22de2d927..1f21762a7a 100644 ---- a/arch/arm/dts/at91sam9260-smartweb.dts -+++ b/arch/arm/dts/at91sam9260-smartweb.dts -@@ -18,7 +18,7 @@ - compatible = "atmel,at91sam9260", "atmel,at91sam9"; - - chosen { -- u-boot,dm-pre-reloc; -+ bootph-all; - stdout-path = &dbgu; - }; - -@@ -49,7 +49,7 @@ - }; - - dbgu: serial@fffff200 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/arm/dts/at91sam9260.dtsi b/arch/arm/dts/at91sam9260.dtsi -index 800d96eb2f..4ea4202737 100644 ---- a/arch/arm/dts/at91sam9260.dtsi -+++ b/arch/arm/dts/at91sam9260.dtsi -@@ -77,14 +77,14 @@ - #address-cells = <1>; - #size-cells = <1>; - ranges; -- u-boot,dm-pre-reloc; -+ bootph-all; - - apb { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; -- u-boot,dm-pre-reloc; -+ bootph-all; - - aic: interrupt-controller@fffff000 { - #interrupt-cells = <3>; -@@ -107,7 +107,7 @@ - #address-cells = <1>; - #size-cells = <0>; - #interrupt-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - main_osc: main_osc { - compatible = "atmel,at91rm9200-clk-main-osc"; -@@ -165,7 +165,7 @@ - clocks = <&clk32k>, <&main>, <&plla>, <&pllb>; - atmel,clk-output-range = <0 105000000>; - atmel,clk-divisors = <1 2 4 0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - usb: usbck { -@@ -230,24 +230,24 @@ - #address-cells = <1>; - #size-cells = <0>; - clocks = <&mck>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - pioA_clk: pioA_clk@2 { - #clock-cells = <0>; - reg = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioB_clk: pioB_clk@3 { - #clock-cells = <0>; - reg = <3>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioC_clk: pioC_clk@4 { - #clock-cells = <0>; - reg = <4>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - adc_clk: adc_clk@5 { -@@ -410,7 +410,7 @@ - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pioA_clk>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioB: gpio@fffff600 { -@@ -422,7 +422,7 @@ - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pioB_clk>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioC: gpio@fffff800 { -@@ -434,7 +434,7 @@ - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pioC_clk>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pinctrl: pinctrl@fffff400 { -@@ -453,11 +453,11 @@ - 0xffffffff 0x7fff3ccf /* pioB */ - 0xffffffff 0x007fffff /* pioC */ - >; -- u-boot,dm-pre-reloc; -+ bootph-all; - - /* shared pinctrl settings */ - dbgu { -- u-boot,dm-pre-reloc; -+ bootph-all; - pinctrl_dbgu: dbgu-0 { - atmel,pins = - ; - #size-cells = <1>; - ranges; -- u-boot,dm-pre-reloc; -+ bootph-all; - - usb0: ohci@00500000 { - compatible = "atmel,at91rm9200-ohci", "usb-ohci"; -@@ -111,7 +111,7 @@ - #address-cells = <1>; - #size-cells = <1>; - ranges; -- u-boot,dm-pre-reloc; -+ bootph-all; - - tcb0: timer@fffa0000 { - compatible = "atmel,at91rm9200-tcb"; -@@ -295,7 +295,7 @@ - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pioA_clk>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioB: gpio@fffff600 { -@@ -307,7 +307,7 @@ - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pioB_clk>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioC: gpio@fffff800 { -@@ -319,7 +319,7 @@ - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pioC_clk>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pinctrl@fffff400 { -@@ -336,11 +336,11 @@ - <0xffffffff 0xfffffff7>, /* pioA */ - <0xffffffff 0xfffffff4>, /* pioB */ - <0xffffffff 0xffffff07>; /* pioC */ -- u-boot,dm-pre-reloc; -+ bootph-all; - - /* shared pinctrl settings */ - dbgu { -- u-boot,dm-pre-reloc; -+ bootph-all; - pinctrl_dbgu: dbgu-0 { - atmel,pins = - , -@@ -583,7 +583,7 @@ - #address-cells = <1>; - #size-cells = <0>; - #interrupt-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - main_osc: main_osc { - compatible = "atmel,at91rm9200-clk-main-osc"; -@@ -628,7 +628,7 @@ - clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; - atmel,clk-output-range = <0 94000000>; - atmel,clk-divisors = <1 2 4 0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - usb: usbck { -@@ -729,24 +729,24 @@ - #address-cells = <1>; - #size-cells = <0>; - clocks = <&mck>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - pioA_clk: pioA_clk@2 { - #clock-cells = <0>; - reg = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioB_clk: pioB_clk@3 { - #clock-cells = <0>; - reg = <3>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioC_clk: pioC_clk@4 { - #clock-cells = <0>; - reg = <4>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - usart0_clk: usart0_clk@6 { -diff --git a/arch/arm/dts/at91sam9263.dtsi b/arch/arm/dts/at91sam9263.dtsi -index 61b056266b..98cdd8ebcc 100644 ---- a/arch/arm/dts/at91sam9263.dtsi -+++ b/arch/arm/dts/at91sam9263.dtsi -@@ -75,14 +75,14 @@ - #address-cells = <1>; - #size-cells = <1>; - ranges; -- u-boot,dm-pre-reloc; -+ bootph-all; - - apb { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; -- u-boot,dm-pre-reloc; -+ bootph-all; - - aic: interrupt-controller@fffff000 { - #interrupt-cells = <3>; -@@ -100,7 +100,7 @@ - #address-cells = <1>; - #size-cells = <0>; - #interrupt-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - main_osc: main_osc { - compatible = "atmel,at91rm9200-clk-main-osc"; -@@ -146,7 +146,7 @@ - clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; - atmel,clk-output-range = <0 120000000>; - atmel,clk-divisors = <1 2 4 0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - usb: usbck { -@@ -235,24 +235,24 @@ - #address-cells = <1>; - #size-cells = <0>; - clocks = <&mck>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - pioA_clk: pioA_clk@2 { - #clock-cells = <0>; - reg = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioB_clk: pioB_clk@3 { - #clock-cells = <0>; - reg = <3>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioCDE_clk: pioCDE_clk@4 { - #clock-cells = <0>; - reg = <4>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - usart0_clk: usart0_clk@7 { -@@ -730,7 +730,7 @@ - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pioA_clk>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioB: gpio@fffff400 { -@@ -742,7 +742,7 @@ - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pioB_clk>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioC: gpio@fffff600 { -@@ -754,7 +754,7 @@ - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pioCDE_clk>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioD: gpio@fffff800 { -@@ -766,7 +766,7 @@ - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pioCDE_clk>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioE: gpio@fffffa00 { -@@ -778,7 +778,7 @@ - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pioCDE_clk>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - dbgu: serial@ffffee00 { -diff --git a/arch/arm/dts/at91sam9263ek.dts b/arch/arm/dts/at91sam9263ek.dts -index 35799b8a5e..fce8d77ddc 100644 ---- a/arch/arm/dts/at91sam9263ek.dts -+++ b/arch/arm/dts/at91sam9263ek.dts -@@ -15,7 +15,7 @@ - chosen { - bootargs = "mem=64M root=/dev/mtdblock5 rw rootfstype=ubifs"; - stdout-path = "serial0:115200n8"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - memory { -@@ -35,7 +35,7 @@ - ahb { - apb { - dbgu: serial@ffffee00 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/arm/dts/at91sam9g15ek.dts b/arch/arm/dts/at91sam9g15ek.dts -index 9fae92554f..33f93fb016 100644 ---- a/arch/arm/dts/at91sam9g15ek.dts -+++ b/arch/arm/dts/at91sam9g15ek.dts -@@ -18,7 +18,7 @@ - ahb { - apb { - hlcdc: hlcdc@f8038000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - }; -diff --git a/arch/arm/dts/at91sam9g20-taurus.dts b/arch/arm/dts/at91sam9g20-taurus.dts -index ca982737a7..c30ad886b1 100644 ---- a/arch/arm/dts/at91sam9g20-taurus.dts -+++ b/arch/arm/dts/at91sam9g20-taurus.dts -@@ -18,7 +18,7 @@ - compatible = "atmel,at91sam9g20", "atmel,at91sam9"; - - chosen { -- u-boot,dm-pre-reloc; -+ bootph-all; - stdout-path = &dbgu; - }; - -@@ -58,7 +58,7 @@ - }; - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - board { - pinctrl_pck0_as_mck: pck0_as_mck { - atmel,pins = -@@ -114,7 +114,7 @@ - }; - - &watchdog { -- u-boot,dm-pre-reloc; -+ bootph-all; - timeout-sec = <15>; - status = "okay"; - }; -diff --git a/arch/arm/dts/at91sam9g20ek_common.dtsi b/arch/arm/dts/at91sam9g20ek_common.dtsi -index 7195454769..249c88ddd0 100644 ---- a/arch/arm/dts/at91sam9g20ek_common.dtsi -+++ b/arch/arm/dts/at91sam9g20ek_common.dtsi -@@ -9,7 +9,7 @@ - - / { - chosen { -- u-boot,dm-pre-reloc; -+ bootph-all; - stdout-path = &dbgu; - }; - -@@ -47,7 +47,7 @@ - }; - - dbgu: serial@fffff200 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/arm/dts/at91sam9g25-gardena-smart-gateway-u-boot.dtsi b/arch/arm/dts/at91sam9g25-gardena-smart-gateway-u-boot.dtsi -index 732dee6c0e..ebb78c5891 100644 ---- a/arch/arm/dts/at91sam9g25-gardena-smart-gateway-u-boot.dtsi -+++ b/arch/arm/dts/at91sam9g25-gardena-smart-gateway-u-boot.dtsi -@@ -1,5 +1,5 @@ - // SPDX-License-Identifier: GPL-2.0+ - - &dbgu { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/at91sam9g35ek.dts b/arch/arm/dts/at91sam9g35ek.dts -index 0cc084eccd..a62ae91e8f 100644 ---- a/arch/arm/dts/at91sam9g35ek.dts -+++ b/arch/arm/dts/at91sam9g35ek.dts -@@ -23,7 +23,7 @@ - }; - - hlcdc: hlcdc@f8038000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - }; -diff --git a/arch/arm/dts/at91sam9g45-corvus.dts b/arch/arm/dts/at91sam9g45-corvus.dts -index 172d185189..67be80bb2b 100644 ---- a/arch/arm/dts/at91sam9g45-corvus.dts -+++ b/arch/arm/dts/at91sam9g45-corvus.dts -@@ -17,7 +17,7 @@ - compatible = "atmel,at91sam9m10g45ek", "atmel,at91sam9g45", "atmel,at91sam9"; - - chosen { -- u-boot,dm-pre-reloc; -+ bootph-all; - stdout-path = &dbgu; - }; - -@@ -38,7 +38,7 @@ - ahb { - apb { - dbgu: serial@ffffee00 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/arm/dts/at91sam9g45-gurnard.dts b/arch/arm/dts/at91sam9g45-gurnard.dts -index 2bc55f01a9..cf0c19c02c 100644 ---- a/arch/arm/dts/at91sam9g45-gurnard.dts -+++ b/arch/arm/dts/at91sam9g45-gurnard.dts -@@ -32,10 +32,10 @@ - }; - - ahb { -- u-boot,dm-pre-reloc; -+ bootph-all; - - fb@0x00500000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - display-timings { - rev1 { -diff --git a/arch/arm/dts/at91sam9g45.dtsi b/arch/arm/dts/at91sam9g45.dtsi -index c9b2e4698b..d0bcd79735 100644 ---- a/arch/arm/dts/at91sam9g45.dtsi -+++ b/arch/arm/dts/at91sam9g45.dtsi -@@ -81,14 +81,14 @@ - #address-cells = <1>; - #size-cells = <1>; - ranges; -- u-boot,dm-pre-reloc; -+ bootph-all; - - apb { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; -- u-boot,dm-pre-reloc; -+ bootph-all; - - aic: interrupt-controller@fffff000 { - #interrupt-cells = <3>; -@@ -120,7 +120,7 @@ - #address-cells = <1>; - #size-cells = <0>; - #interrupt-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - main_osc: main_osc { - compatible = "atmel,at91rm9200-clk-main-osc"; -@@ -173,7 +173,7 @@ - clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>; - atmel,clk-output-range = <0 133333333>; - atmel,clk-divisors = <1 2 4 3>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - usb: usbck { -@@ -441,7 +441,7 @@ - 0xfffff800 0x200 - 0xfffffa00 0x200 - >; -- u-boot,dm-pre-reloc; -+ bootph-all; - - atmel,mux-mask = < - /* A B */ -@@ -484,7 +484,7 @@ - }; - - dbgu { -- u-boot,dm-pre-reloc; -+ bootph-all; - pinctrl_dbgu: dbgu-0 { - atmel,pins = - ; - #size-cells = <1>; - ranges; -- u-boot,dm-pre-reloc; -+ bootph-all; - - apb { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; -- u-boot,dm-pre-reloc; -+ bootph-all; - - aic: interrupt-controller@fffff000 { - #interrupt-cells = <3>; -@@ -104,7 +104,7 @@ - #address-cells = <1>; - #size-cells = <0>; - #interrupt-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - main_rc_osc: main_rc_osc { - compatible = "atmel,at91sam9x5-clk-main-rc-osc"; -@@ -171,7 +171,7 @@ - atmel,clk-output-range = <0 133333333>; - atmel,clk-divisors = <1 2 4 3>; - atmel,master-clk-have-div3-pres; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - usb: usbck { -@@ -247,18 +247,18 @@ - #address-cells = <1>; - #size-cells = <0>; - clocks = <&mck>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - pioAB_clk: pioAB_clk@2 { - #clock-cells = <0>; - reg = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioCD_clk: pioCD_clk@3 { - #clock-cells = <0>; - reg = <3>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - fuse_clk: fuse_clk@4 { -@@ -505,11 +505,11 @@ - 0xfdffffff 0x07c00000 0xb83fffff /* pioC */ - 0x003fffff 0x003f8000 0x00000000 /* pioD */ - >; -- u-boot,dm-pre-reloc; -+ bootph-all; - - /* shared pinctrl settings */ - dbgu { -- u-boot,dm-pre-reloc; -+ bootph-all; - pinctrl_dbgu: dbgu-0 { - atmel,pins = - ; - clocks = <&pioAB_clk>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioB: gpio@fffff600 { -@@ -818,7 +818,7 @@ - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pioAB_clk>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioC: gpio@fffff800 { -@@ -830,7 +830,7 @@ - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pioCD_clk>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioD: gpio@fffffa00 { -@@ -842,7 +842,7 @@ - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pioCD_clk>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - dbgu: serial@fffff200 { -diff --git a/arch/arm/dts/at91sam9n12ek.dts b/arch/arm/dts/at91sam9n12ek.dts -index 64a7abf639..67578b5198 100644 ---- a/arch/arm/dts/at91sam9n12ek.dts -+++ b/arch/arm/dts/at91sam9n12ek.dts -@@ -16,7 +16,7 @@ - chosen { - bootargs = "root=/dev/mtdblock1 rw rootfstype=jffs2"; - stdout-path = "serial0:115200n8"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - memory { -@@ -36,7 +36,7 @@ - ahb { - apb { - dbgu: serial@fffff200 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/arm/dts/at91sam9rl.dtsi b/arch/arm/dts/at91sam9rl.dtsi -index 6d6aee5524..b855c8fe0f 100644 ---- a/arch/arm/dts/at91sam9rl.dtsi -+++ b/arch/arm/dts/at91sam9rl.dtsi -@@ -78,7 +78,7 @@ - #address-cells = <1>; - #size-cells = <1>; - ranges; -- u-boot,dm-pre-reloc; -+ bootph-all; - - fb0: fb@00500000 { - compatible = "atmel,at91sam9rl-lcdc"; -@@ -113,7 +113,7 @@ - #address-cells = <1>; - #size-cells = <1>; - ranges; -- u-boot,dm-pre-reloc; -+ bootph-all; - - tcb0: timer@fffa0000 { - compatible = "atmel,at91rm9200-tcb"; -@@ -398,7 +398,7 @@ - <0xffffffff 0x0000c780>, /* pioB */ - <0xffffffff 0xe3ffff0e>, /* pioC */ - <0x003fffff 0x0001ff3c>; /* pioD */ -- u-boot,dm-pre-reloc; -+ bootph-all; - - /* shared pinctrl settings */ - adc0 { -@@ -440,7 +440,7 @@ - }; - - dbgu { -- u-boot,dm-pre-reloc; -+ bootph-all; - pinctrl_dbgu: dbgu-0 { - atmel,pins = - , -@@ -779,7 +779,7 @@ - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pioA_clk>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioB: gpio@fffff600 { -@@ -791,7 +791,7 @@ - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pioB_clk>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioC: gpio@fffff800 { -@@ -803,7 +803,7 @@ - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pioC_clk>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioD: gpio@fffffa00 { -@@ -815,7 +815,7 @@ - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pioD_clk>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pmc: pmc@fffffc00 { -@@ -826,7 +826,7 @@ - #address-cells = <1>; - #size-cells = <0>; - #interrupt-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - main: mainck { - compatible = "atmel,at91rm9200-clk-main"; -@@ -862,7 +862,7 @@ - clocks = <&clk32k>, <&main>, <&plla>, <&utmi>; - atmel,clk-output-range = <0 94000000>; - atmel,clk-divisors = <1 2 4 0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - prog: progck { -@@ -909,30 +909,30 @@ - #address-cells = <1>; - #size-cells = <0>; - clocks = <&mck>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - pioA_clk: pioA_clk@2 { - #clock-cells = <0>; - reg = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioB_clk: pioB_clk@3 { - #clock-cells = <0>; - reg = <3>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioC_clk: pioC_clk@4 { - #clock-cells = <0>; - reg = <4>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioD_clk: pioD_clk@5 { - #clock-cells = <0>; - reg = <5>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - usart0_clk: usart0_clk@6 { -diff --git a/arch/arm/dts/at91sam9rlek.dts b/arch/arm/dts/at91sam9rlek.dts -index ae42697445..c94cc68026 100644 ---- a/arch/arm/dts/at91sam9rlek.dts -+++ b/arch/arm/dts/at91sam9rlek.dts -@@ -15,7 +15,7 @@ - chosen { - bootargs = "rootfstype=ubifs root=ubi0:rootfs ubi.mtd=5 rw"; - stdout-path = "serial0:115200n8"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - memory { -@@ -162,7 +162,7 @@ - }; - - dbgu: serial@fffff200 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/arm/dts/at91sam9x35ek.dts b/arch/arm/dts/at91sam9x35ek.dts -index 3ca70c0b74..498c4da1f1 100644 ---- a/arch/arm/dts/at91sam9x35ek.dts -+++ b/arch/arm/dts/at91sam9x35ek.dts -@@ -22,7 +22,7 @@ - status = "okay"; - }; - hlcdc: hlcdc@f8038000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - }; -diff --git a/arch/arm/dts/at91sam9x5.dtsi b/arch/arm/dts/at91sam9x5.dtsi -index bd4abe00d6..5fca9b13c2 100644 ---- a/arch/arm/dts/at91sam9x5.dtsi -+++ b/arch/arm/dts/at91sam9x5.dtsi -@@ -81,14 +81,14 @@ - #address-cells = <1>; - #size-cells = <1>; - ranges; -- u-boot,dm-pre-reloc; -+ bootph-all; - - apb { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; -- u-boot,dm-pre-reloc; -+ bootph-all; - - aic: interrupt-controller@fffff000 { - #interrupt-cells = <3>; -@@ -113,7 +113,7 @@ - #address-cells = <1>; - #size-cells = <0>; - #interrupt-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - main_rc_osc: main_rc_osc { - compatible = "atmel,at91sam9x5-clk-main-rc-osc"; -@@ -176,7 +176,7 @@ - atmel,clk-output-range = <0 133333333>; - atmel,clk-divisors = <1 2 4 3>; - atmel,master-clk-have-div3-pres; -- u-boot,dm-pre-reloc; -+ bootph-all; - - }; - -@@ -259,7 +259,7 @@ - #address-cells = <1>; - #size-cells = <0>; - clocks = <&mck>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - - pioAB_clk: pioAB_clk@2 { -@@ -466,12 +466,12 @@ - 0xfffff800 0x200 /* pioC */ - 0xfffffa00 0x200 /* pioD */ - >; -- u-boot,dm-pre-reloc; -+ bootph-all; - - - /* shared pinctrl settings */ - dbgu { -- u-boot,dm-pre-reloc; -+ bootph-all; - pinctrl_dbgu: dbgu-0 { - atmel,pins = - ; - - display-timings { -- u-boot,dm-pre-reloc; -+ bootph-all; - 800x480 { - clock-frequency = <24000000>; - hactive = <800>; -@@ -42,7 +42,7 @@ - vfront-porch = <22>; - vback-porch = <21>; - vsync-len = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -diff --git a/arch/arm/dts/at91sam9x5ek.dtsi b/arch/arm/dts/at91sam9x5ek.dtsi -index 1f7f37b687..9d4e853305 100644 ---- a/arch/arm/dts/at91sam9x5ek.dtsi -+++ b/arch/arm/dts/at91sam9x5ek.dtsi -@@ -15,7 +15,7 @@ - chosen { - bootargs = "root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs"; - stdout-path = "serial0:115200n8"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - ahb { -@@ -47,7 +47,7 @@ - }; - - dbgu: serial@fffff200 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/arm/dts/bcm283x-u-boot.dtsi b/arch/arm/dts/bcm283x-u-boot.dtsi -index 22c67c4218..8c17c6f6a5 100644 ---- a/arch/arm/dts/bcm283x-u-boot.dtsi -+++ b/arch/arm/dts/bcm283x-u-boot.dtsi -@@ -27,22 +27,22 @@ - - &uart0 { - skip-init; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart1 { - skip-init; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0_gpio14 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart1_gpio14 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/bcm63158.dtsi b/arch/arm/dts/bcm63158.dtsi -index 8b179ba0fc..4bed1f914a 100644 ---- a/arch/arm/dts/bcm63158.dtsi -+++ b/arch/arm/dts/bcm63158.dtsi -@@ -74,7 +74,7 @@ - }; - - clocks { -- u-boot,dm-pre-reloc; -+ bootph-all; - periph_clk: periph-clk { - compatible = "fixed-clock"; - #clock-cells = <0>; -@@ -134,7 +134,7 @@ - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x0 0xff800000 0x800000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - uart0: serial@12000 { - compatible = "arm,pl011", "arm,primecell"; -diff --git a/arch/arm/dts/bcm6855.dtsi b/arch/arm/dts/bcm6855.dtsi -index 05e0a4e0da..10c003a57c 100644 ---- a/arch/arm/dts/bcm6855.dtsi -+++ b/arch/arm/dts/bcm6855.dtsi -@@ -65,7 +65,7 @@ - }; - - clocks: clocks { -- u-boot,dm-pre-reloc; -+ bootph-all; - - periph_clk: periph-clk { - compatible = "fixed-clock"; -@@ -126,7 +126,7 @@ - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0xff800000 0x800000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - uart0: serial@12000 { - compatible = "arm,pl011", "arm,primecell"; -diff --git a/arch/arm/dts/bcm6856.dtsi b/arch/arm/dts/bcm6856.dtsi -index 99185ab0bc..38c88f8399 100644 ---- a/arch/arm/dts/bcm6856.dtsi -+++ b/arch/arm/dts/bcm6856.dtsi -@@ -55,7 +55,7 @@ - }; - - clocks: clocks { -- u-boot,dm-pre-reloc; -+ bootph-all; - - periph_clk:periph-clk { - compatible = "fixed-clock"; -@@ -109,7 +109,7 @@ - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x0 0xff800000 0x800000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - uart0: serial@640 { - compatible = "brcm,bcm6345-uart"; -diff --git a/arch/arm/dts/bcm6858.dtsi b/arch/arm/dts/bcm6858.dtsi -index 19c4dd6fa7..dc95047a26 100644 ---- a/arch/arm/dts/bcm6858.dtsi -+++ b/arch/arm/dts/bcm6858.dtsi -@@ -74,7 +74,7 @@ - }; - - clocks { -- u-boot,dm-pre-reloc; -+ bootph-all; - - periph_clk: periph_clk { - compatible = "fixed-clock"; -@@ -128,7 +128,7 @@ - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x0 0xff800000 0x800000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - uart0: serial@640 { - compatible = "brcm,bcm6345-uart"; -diff --git a/arch/arm/dts/bcm96753ref.dts b/arch/arm/dts/bcm96753ref.dts -index f74137f18f..ebc8c8e4ce 100644 ---- a/arch/arm/dts/bcm96753ref.dts -+++ b/arch/arm/dts/bcm96753ref.dts -@@ -28,7 +28,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/arm/dts/bcm968360bg.dts b/arch/arm/dts/bcm968360bg.dts -index 6f1090aa8e..1335f484ee 100644 ---- a/arch/arm/dts/bcm968360bg.dts -+++ b/arch/arm/dts/bcm968360bg.dts -@@ -26,7 +26,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/arm/dts/bcm968580xref.dts b/arch/arm/dts/bcm968580xref.dts -index 6d787bd011..9aa45877b5 100644 ---- a/arch/arm/dts/bcm968580xref.dts -+++ b/arch/arm/dts/bcm968580xref.dts -@@ -26,7 +26,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/arm/dts/bitmain-antminer-s9.dts b/arch/arm/dts/bitmain-antminer-s9.dts -index 408862bef0..6c47396ce7 100644 ---- a/arch/arm/dts/bitmain-antminer-s9.dts -+++ b/arch/arm/dts/bitmain-antminer-s9.dts -@@ -70,13 +70,13 @@ - }; - - &sdhci0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - disable-wp; - }; - - &uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/arm/dts/ca-presidio-engboard.dts b/arch/arm/dts/ca-presidio-engboard.dts -index 8c1e3797d7..cbc9213a86 100644 ---- a/arch/arm/dts/ca-presidio-engboard.dts -+++ b/arch/arm/dts/ca-presidio-engboard.dts -@@ -40,7 +40,7 @@ - }; - - uart0: serial@0xf4329148 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "cortina,ca-uart"; - reg = <0x0 0xf4329148 0x30>; - status = "okay"; -diff --git a/arch/arm/dts/da850-evm-u-boot.dtsi b/arch/arm/dts/da850-evm-u-boot.dtsi -index d588628641..309130479a 100644 ---- a/arch/arm/dts/da850-evm-u-boot.dtsi -+++ b/arch/arm/dts/da850-evm-u-boot.dtsi -@@ -8,7 +8,7 @@ - - / { - soc@1c00000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - nand { -@@ -16,7 +16,7 @@ - }; - - panel { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -29,17 +29,17 @@ - }; - - &mmc0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &serial2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &spi1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/da850-lcdk-u-boot.dtsi b/arch/arm/dts/da850-lcdk-u-boot.dtsi -index d50775c173..bbaebcb67a 100644 ---- a/arch/arm/dts/da850-lcdk-u-boot.dtsi -+++ b/arch/arm/dts/da850-lcdk-u-boot.dtsi -@@ -13,7 +13,7 @@ - }; - - soc@1c00000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - nand { -@@ -22,13 +22,13 @@ - }; - - &mmc0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &serial2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/dm8168-evm-u-boot.dtsi b/arch/arm/dts/dm8168-evm-u-boot.dtsi -index de0bb9bc81..f939df27e4 100644 ---- a/arch/arm/dts/dm8168-evm-u-boot.dtsi -+++ b/arch/arm/dts/dm8168-evm-u-boot.dtsi -@@ -7,6 +7,6 @@ - - / { - ocp { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; -diff --git a/arch/arm/dts/dra7-evm-u-boot.dtsi b/arch/arm/dts/dra7-evm-u-boot.dtsi -index 5622512b24..f1ff5f6733 100644 ---- a/arch/arm/dts/dra7-evm-u-boot.dtsi -+++ b/arch/arm/dts/dra7-evm-u-boot.dtsi -@@ -15,38 +15,38 @@ - }; - - &mmc2_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mmc2_pins_hs { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mmc2_pins_ddr_rev20 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mmc2_pins_hs200 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mmc2_iodelay_hs200_rev20_conf { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &omap_dwc3_1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - dr_mode = "peripheral"; - }; - - &usb2_phy1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb3_phy1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/dra7-ipu-common-early-boot.dtsi b/arch/arm/dts/dra7-ipu-common-early-boot.dtsi -index ec6040ff93..90fc4cb36d 100644 ---- a/arch/arm/dts/dra7-ipu-common-early-boot.dtsi -+++ b/arch/arm/dts/dra7-ipu-common-early-boot.dtsi -@@ -9,7 +9,7 @@ - }; - - fs_loader0: fs_loader@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "u-boot,fs-loader"; - phandlepart = <&mmc1 1>; - }; -@@ -18,14 +18,14 @@ - #address-cells = <2>; - #size-cells = <2>; - ranges; -- u-boot,dm-spl; -+ bootph-pre-ram; - - ipu2_memory_region: ipu2-memory@95800000 { - compatible = "shared-dma-pool"; - reg = <0x0 0x95800000 0x0 0x3800000>; - reusable; - status = "okay"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - ipu1_memory_region: ipu1-memory@9d000000 { -@@ -33,81 +33,81 @@ - reg = <0x0 0x9d000000 0x0 0x2000000>; - reusable; - status = "okay"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - ipu1_pgtbl: ipu1-pgtbl@95700000 { - reg = <0x0 0x95700000 0x0 0x40000>; - no-map; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - ipu2_pgtbl: ipu2-pgtbl@95740000 { - reg = <0x0 0x95740000 0x0 0x40000>; - no-map; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - }; - - &timer3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &timer4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &timer7 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &timer8 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &timer9 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &timer11 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mmu_ipu1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mmu_ipu2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &ipu1 { - status = "okay"; - memory-region = <&ipu1_memory_region>; - pg-tbl = <&ipu1_pgtbl>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &ipu2 { - status = "okay"; - memory-region = <&ipu2_memory_region>; - pg-tbl = <&ipu2_pgtbl>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &l4_wkup { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &prm { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &ipu1_rst { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &ipu2_rst { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/dra71-evm-u-boot.dtsi b/arch/arm/dts/dra71-evm-u-boot.dtsi -index 40443da5c8..f13eadf6b6 100644 ---- a/arch/arm/dts/dra71-evm-u-boot.dtsi -+++ b/arch/arm/dts/dra71-evm-u-boot.dtsi -@@ -23,42 +23,42 @@ - }; - - &mmc2_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mmc2_pins_hs { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mmc2_pins_ddr_rev20 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mmc2_iodelay_ddr_conf { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mmc2_pins_hs200 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mmc2_iodelay_hs200_rev20_conf { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &omap_dwc3_1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - dr_mode = "peripheral"; - }; - - &usb2_phy1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb3_phy1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/dra72-evm-revc-u-boot.dtsi b/arch/arm/dts/dra72-evm-revc-u-boot.dtsi -index 40443da5c8..f13eadf6b6 100644 ---- a/arch/arm/dts/dra72-evm-revc-u-boot.dtsi -+++ b/arch/arm/dts/dra72-evm-revc-u-boot.dtsi -@@ -23,42 +23,42 @@ - }; - - &mmc2_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mmc2_pins_hs { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mmc2_pins_ddr_rev20 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mmc2_iodelay_ddr_conf { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mmc2_pins_hs200 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mmc2_iodelay_hs200_rev20_conf { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &omap_dwc3_1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - dr_mode = "peripheral"; - }; - - &usb2_phy1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb3_phy1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/dra72-evm-u-boot.dtsi b/arch/arm/dts/dra72-evm-u-boot.dtsi -index 6c868f75d1..91a3b6b742 100644 ---- a/arch/arm/dts/dra72-evm-u-boot.dtsi -+++ b/arch/arm/dts/dra72-evm-u-boot.dtsi -@@ -6,18 +6,18 @@ - #include "omap5-u-boot.dtsi" - - &omap_dwc3_1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - dr_mode = "peripheral"; - }; - - &usb2_phy1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb3_phy1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/dra76-evm-u-boot.dtsi b/arch/arm/dts/dra76-evm-u-boot.dtsi -index 5fae6ba919..db5a466d84 100644 ---- a/arch/arm/dts/dra76-evm-u-boot.dtsi -+++ b/arch/arm/dts/dra76-evm-u-boot.dtsi -@@ -15,30 +15,30 @@ - }; - - &mmc2_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mmc2_pins_hs200 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mmc2_iodelay_hs200_conf { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &omap_dwc3_1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - dr_mode = "peripheral"; - }; - - &usb2_phy1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb3_phy1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/dragonboard410c-uboot.dtsi b/arch/arm/dts/dragonboard410c-uboot.dtsi -index e4fecaa19e..3b0bd0ed0a 100644 ---- a/arch/arm/dts/dragonboard410c-uboot.dtsi -+++ b/arch/arm/dts/dragonboard410c-uboot.dtsi -@@ -8,26 +8,26 @@ - / { - - smem { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - - pinctrl@1000000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - uart { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - qcom,gcc@1800000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - serial@78b0000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -diff --git a/arch/arm/dts/dragonboard820c-uboot.dtsi b/arch/arm/dts/dragonboard820c-uboot.dtsi -index 2270ac73bf..457728a43e 100644 ---- a/arch/arm/dts/dragonboard820c-uboot.dtsi -+++ b/arch/arm/dts/dragonboard820c-uboot.dtsi -@@ -7,26 +7,26 @@ - - / { - smem { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - - pinctrl@1010000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - uart { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - clock-controller@300000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - serial@75b0000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -diff --git a/arch/arm/dts/dragonboard845c-uboot.dtsi b/arch/arm/dts/dragonboard845c-uboot.dtsi -index 8b5a7ee573..7106db8a73 100644 ---- a/arch/arm/dts/dragonboard845c-uboot.dtsi -+++ b/arch/arm/dts/dragonboard845c-uboot.dtsi -@@ -9,18 +9,18 @@ - / - { - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - - serial@a84000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - clock-controller@100000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pinctrl_north@3900000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -diff --git a/arch/arm/dts/exynos5.dtsi b/arch/arm/dts/exynos5.dtsi -index cdc965d90d..14251764e6 100644 ---- a/arch/arm/dts/exynos5.dtsi -+++ b/arch/arm/dts/exynos5.dtsi -@@ -137,7 +137,7 @@ - }; - - fimd@14400000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "samsung,exynos-fimd"; - reg = <0x14400000 0x10000>; - #address-cells = <1>; -@@ -218,7 +218,7 @@ - compatible = "samsung,exynos4210-uart"; - reg = <0x12C30000 0x100>; - interrupts = <0 54 0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - id = <3>; - }; - }; -diff --git a/arch/arm/dts/exynos5422-odroidxu3.dts b/arch/arm/dts/exynos5422-odroidxu3.dts -index 256df6d6c2..9d055d066f 100644 ---- a/arch/arm/dts/exynos5422-odroidxu3.dts -+++ b/arch/arm/dts/exynos5422-odroidxu3.dts -@@ -31,7 +31,7 @@ - }; - - adc@12D10000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - vdd-supply = <&ldo4_reg>; - status = "okay"; - }; -diff --git a/arch/arm/dts/exynos7420.dtsi b/arch/arm/dts/exynos7420.dtsi -index b8bf373e4b..373f48cf2e 100644 ---- a/arch/arm/dts/exynos7420.dtsi -+++ b/arch/arm/dts/exynos7420.dtsi -@@ -15,14 +15,14 @@ - fin_pll: xxti { - compatible = "fixed-clock"; - clock-output-names = "fin_pll"; -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <0>; - }; - - clock_topc: clock-controller@10570000 { - compatible = "samsung,exynos7-clock-topc"; - reg = <0x10570000 0x10000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <1>; - clocks = <&fin_pll>; - clock-names = "fin_pll"; -@@ -31,7 +31,7 @@ - clock_top0: clock-controller@105d0000 { - compatible = "samsung,exynos7-clock-top0"; - reg = <0x105d0000 0xb000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <1>; - clocks = <&fin_pll>, <&clock_topc DOUT_SCLK_BUS0_PLL>, - <&clock_topc DOUT_SCLK_BUS1_PLL>, -@@ -45,7 +45,7 @@ - clock_peric1: clock-controller@14c80000 { - compatible = "samsung,exynos7-clock-peric1"; - reg = <0x14c80000 0xd00>; -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <1>; - clocks = <&fin_pll>, <&clock_top0 DOUT_ACLK_PERIC1>, - <&clock_top0 CLK_SCLK_UART1>, -@@ -58,21 +58,21 @@ - pinctrl@13470000 { - compatible = "samsung,exynos7420-pinctrl"; - reg = <0x13470000 0x1000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - serial2_bus: serial2-bus { - samsung,pins = "gpd1-4", "gpd1-5"; - samsung,pin-function = <2>; - samsung,pin-pud = <3>; - samsung,pin-drv = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - serial@14C30000 { - compatible = "samsung,exynos4210-uart"; - reg = <0x14C30000 0x100>; -- u-boot,dm-pre-reloc; -+ bootph-all; - clocks = <&clock_peric1 PCLK_UART2>, - <&clock_peric1 SCLK_UART2>; - clock-names = "uart", "clk_uart_baud0"; -diff --git a/arch/arm/dts/exynos78x0.dtsi b/arch/arm/dts/exynos78x0.dtsi -index fb9c9cbdf9..11d8396f9c 100644 ---- a/arch/arm/dts/exynos78x0.dtsi -+++ b/arch/arm/dts/exynos78x0.dtsi -@@ -15,7 +15,7 @@ - fin_pll: xxti { - compatible = "fixed-clock"; - clock-output-names = "fin_pll"; -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <0>; - }; - -@@ -24,14 +24,14 @@ - compatible = "fixed-clock"; - clock-output-names = "fin_uart"; - clock-frequency = <132710400>; -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <0>; - }; - - uart2: serial@13820000 { - compatible = "samsung,exynos4210-uart"; - reg = <0x13820000 0x100>; -- u-boot,dm-pre-reloc; -+ bootph-all; - clocks = <&fin_uart>, <&fin_uart>; // driver uses 1st clock - clock-names = "uart", "clk_uart_baud0"; - pinctrl-names = "default"; -diff --git a/arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi b/arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi -index 956d724979..f2d6b183ed 100644 ---- a/arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi -+++ b/arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi -@@ -4,133 +4,133 @@ - */ - - &mu { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &clk { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &iomuxc { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_lsio { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_lsio_gpio0 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_lsio_gpio1 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_lsio_gpio2 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_lsio_gpio3 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_lsio_gpio4 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_lsio_gpio5 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_lsio_gpio6 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_lsio_gpio7 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_dma { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_dma_lpuart1 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_conn { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_conn_sdch0 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_conn_sdch1 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_conn_sdch2 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &gpio0 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &gpio1 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &gpio2 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &gpio3 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &gpio4 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &gpio5 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &gpio6 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &gpio7 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &lpuart0 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &lpuart1 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &lpuart2 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &lpuart3 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &usdhc1 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &usdhc2 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &usdhc3 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; -diff --git a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi -index eefdccf992..6e5379e53c 100644 ---- a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi -+++ b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi -@@ -7,156 +7,156 @@ - - &{/imx8qm-pm} { - -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mu { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &clk { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &iomuxc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio6 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio7 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_conn { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_conn_sdch0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_conn_sdch1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_conn_sdch2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_dma { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_dma_lpuart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_caam { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_caam_jr1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_caam_jr2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_caam_jr3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio6 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio7 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &lpuart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - mmc-hs400-1_8v; - }; - - &usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - sd-uhs-sdr104; - sd-uhs-ddr50; - }; - - &crypto { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi b/arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi -index 3ca53bb945..79f08ec138 100644 ---- a/arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi -+++ b/arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi -@@ -5,113 +5,113 @@ - - &{/imx8qx-pm} { - -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mu { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &clk { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &iomuxc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio6 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio7 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_conn { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_conn_sdch0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_conn_sdch1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_conn_sdch2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio6 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio7 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &lpuart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi b/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi -index 91e2944781..a6af4e5e2b 100644 ---- a/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi -+++ b/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi -@@ -3,129 +3,127 @@ - * Copyright 2019 Toradex AG - */ - --#include "imx8qxp-u-boot.dtsi" -- - &{/imx8qx-pm} { - -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &mu { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &clk { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &iomuxc { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_lsio { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_lsio_gpio0 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_lsio_gpio1 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_lsio_gpio2 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_lsio_gpio3 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_lsio_gpio4 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_lsio_gpio5 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_lsio_gpio6 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_lsio_gpio7 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_dma { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_dma_lpuart0 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_dma_lpuart3 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_conn { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_conn_sdch0 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_conn_sdch1 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_conn_sdch2 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &gpio0 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &gpio1 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &gpio2 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &gpio3 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &gpio4 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &gpio5 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &gpio6 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &gpio7 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &lpuart3 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &usdhc1 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &usdhc2 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; -diff --git a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi -index 17f44e1ce7..591eb66604 100644 ---- a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi -+++ b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi -@@ -7,156 +7,156 @@ - - &{/imx8qx-pm} { - -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mu { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &clk { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &iomuxc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio6 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio7 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_conn { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_conn_sdch0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_conn_sdch1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_conn_sdch2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_dma { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_dma_lpuart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_caam { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_caam_jr1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_caam_jr2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_caam_jr3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio6 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio7 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &lpuart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - mmc-hs400-1_8v; - }; - - &usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - sd-uhs-sdr104; - sd-uhs-ddr50; - }; - - &crypto { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/fsl-imx8qxp-mek.dts b/arch/arm/dts/fsl-imx8qxp-mek.dts -index 4f35fbe31d..6a987f0dbb 100644 ---- a/arch/arm/dts/fsl-imx8qxp-mek.dts -+++ b/arch/arm/dts/fsl-imx8qxp-mek.dts -@@ -135,7 +135,7 @@ - }; - - &A35_0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &lpuart0 { -diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi b/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi -index 08e7231793..83750ab001 100644 ---- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi -+++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi -@@ -153,30 +153,30 @@ - #endif - - &fspi { -- u-boot,dm-pre-reloc; -+ bootph-all; - flash@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &dspi2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &esdhc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &esdhc1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &lpuart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &duart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - /* -@@ -197,9 +197,9 @@ - }; - - &soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sysclk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/fsl-ls1088a-qds.dtsi b/arch/arm/dts/fsl-ls1088a-qds.dtsi -index 21c50078c3..85dc7457bf 100644 ---- a/arch/arm/dts/fsl-ls1088a-qds.dtsi -+++ b/arch/arm/dts/fsl-ls1088a-qds.dtsi -@@ -24,7 +24,7 @@ - - &i2c0 { - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - fpga@66 { - #address-cells = <1>; -diff --git a/arch/arm/dts/fsl-ls1088a-rdb.dts b/arch/arm/dts/fsl-ls1088a-rdb.dts -index 5cdd598152..01f8fcb61a 100644 ---- a/arch/arm/dts/fsl-ls1088a-rdb.dts -+++ b/arch/arm/dts/fsl-ls1088a-rdb.dts -@@ -19,13 +19,13 @@ - - &dpmac1 { - status = "okay"; -- phy-connection-type = "xgmii"; -+ phy-connection-type = "10gbase-r"; - }; - - &dpmac2 { - status = "okay"; - phy-handle = <&mdio2_phy1>; -- phy-connection-type = "xgmii"; -+ phy-connection-type = "10gbase-r"; - }; - - &dpmac3 { -@@ -121,7 +121,7 @@ - - &i2c0 { - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - i2c-mux@77 { - compatible = "nxp,pca9547"; -diff --git a/arch/arm/dts/fsl-ls2080a.dtsi b/arch/arm/dts/fsl-ls2080a.dtsi -index a1837454f4..d754eb4d5c 100644 ---- a/arch/arm/dts/fsl-ls2080a.dtsi -+++ b/arch/arm/dts/fsl-ls2080a.dtsi -@@ -6,18 +6,32 @@ - * Copyright 2013-2015 Freescale Semiconductor, Inc. - */ - -+#include -+ - / { - compatible = "fsl,ls2080a"; - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - -+ aliases { -+ serial0 = &serial0; -+ serial1 = &serial1; -+ }; -+ - memory@80000000 { - device_type = "memory"; - reg = <0x00000000 0x80000000 0 0x80000000>; - /* DRAM space - 1, size : 2 GB DRAM */ - }; - -+ sysclk: sysclk { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <100000000>; -+ clock-output-names = "sysclk"; -+ }; -+ - gic: interrupt-controller@6000000 { - compatible = "arm,gic-v3"; - reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */ -@@ -35,20 +49,37 @@ - <1 10 0x8>; /* Hypervisor PPI, active-low */ - }; - -- serial0: serial@21c0500 { -- device_type = "serial"; -- compatible = "fsl,ns16550", "ns16550a"; -- reg = <0x0 0x21c0500 0x0 0x100>; -- clock-frequency = <0>; /* Updated by bootloader */ -- interrupts = <0 32 0x1>; /* edge triggered */ -- }; -+ soc { -+ compatible = "simple-bus"; -+ #address-cells = <2>; -+ #size-cells = <2>; -+ ranges; -+ dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>; -+ -+ clockgen: clocking@1300000 { -+ compatible = "fsl,ls2080a-clockgen"; -+ reg = <0 0x1300000 0 0xa0000>; -+ #clock-cells = <2>; -+ clocks = <&sysclk>; -+ }; - -- serial1: serial@21c0600 { -- device_type = "serial"; -- compatible = "fsl,ns16550", "ns16550a"; -- reg = <0x0 0x21c0600 0x0 0x100>; -- clock-frequency = <0>; /* Updated by bootloader */ -- interrupts = <0 32 0x1>; /* edge triggered */ -+ serial0: serial@21c0500 { -+ compatible = "fsl,ns16550", "ns16550a"; -+ reg = <0x0 0x21c0500 0x0 0x100>; -+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL -+ QORIQ_CLK_PLL_DIV(4)>; -+ interrupts = <0 32 0x4>; /* Level high type */ -+ bootph-all; -+ }; -+ -+ serial1: serial@21c0600 { -+ compatible = "fsl,ns16550", "ns16550a"; -+ reg = <0x0 0x21c0600 0x0 0x100>; -+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL -+ QORIQ_CLK_PLL_DIV(4)>; -+ interrupts = <0 32 0x4>; /* Level high type */ -+ bootph-all; -+ }; - }; - - i2c0: i2c@2000000 { -diff --git a/arch/arm/dts/fsl-ls2088a-rdb-qspi.dts b/arch/arm/dts/fsl-ls2088a-rdb-qspi.dts -index 9e68c147e6..a609290000 100644 ---- a/arch/arm/dts/fsl-ls2088a-rdb-qspi.dts -+++ b/arch/arm/dts/fsl-ls2088a-rdb-qspi.dts -@@ -146,7 +146,7 @@ - - &i2c0 { - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - pca9547@75 { - compatible = "nxp,pca9547"; -diff --git a/arch/arm/dts/fsl-lx2160a-qds.dtsi b/arch/arm/dts/fsl-lx2160a-qds.dtsi -index 69e11cca2d..6635c52585 100644 ---- a/arch/arm/dts/fsl-lx2160a-qds.dtsi -+++ b/arch/arm/dts/fsl-lx2160a-qds.dtsi -@@ -143,7 +143,7 @@ - - &i2c0 { - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - fpga@66 { - #address-cells = <1>; -diff --git a/arch/arm/dts/fsl-lx2160a-rdb.dts b/arch/arm/dts/fsl-lx2160a-rdb.dts -index 8ca4afa7ea..399409776e 100644 ---- a/arch/arm/dts/fsl-lx2160a-rdb.dts -+++ b/arch/arm/dts/fsl-lx2160a-rdb.dts -@@ -110,7 +110,7 @@ - - &i2c0 { - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &i2c4 { -diff --git a/arch/arm/dts/hi3660-hikey960-u-boot.dtsi b/arch/arm/dts/hi3660-hikey960-u-boot.dtsi -index 648c77f8c5..b7ea672739 100644 ---- a/arch/arm/dts/hi3660-hikey960-u-boot.dtsi -+++ b/arch/arm/dts/hi3660-hikey960-u-boot.dtsi -@@ -6,5 +6,5 @@ - */ - - &dwmmc1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/hi6220-hikey-u-boot.dtsi b/arch/arm/dts/hi6220-hikey-u-boot.dtsi -index 3113983240..fcfcb37a10 100644 ---- a/arch/arm/dts/hi6220-hikey-u-boot.dtsi -+++ b/arch/arm/dts/hi6220-hikey-u-boot.dtsi -@@ -6,9 +6,9 @@ - */ - - &mmc0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &mmc1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/hpe-gxp-u-boot.dtsi b/arch/arm/dts/hpe-gxp-u-boot.dtsi -index 7a2b488521..63a1a11fed 100644 ---- a/arch/arm/dts/hpe-gxp-u-boot.dtsi -+++ b/arch/arm/dts/hpe-gxp-u-boot.dtsi -@@ -8,10 +8,10 @@ - / { - - axi { -- u-boot,dm-pre-reloc; -+ bootph-all; - - ahb@c0000000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - spi0: spi@200 { - compatible = "hpe,gxp-spi"; -diff --git a/arch/arm/dts/imx28-xea-u-boot.dtsi b/arch/arm/dts/imx28-xea-u-boot.dtsi -index 8b5d7e10b3..f6488154d8 100644 ---- a/arch/arm/dts/imx28-xea-u-boot.dtsi -+++ b/arch/arm/dts/imx28-xea-u-boot.dtsi -@@ -13,36 +13,36 @@ - #include "imx28-u-boot.dtsi" - / { - apb@80000000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - apbh@80000000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - apbx@80040000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - }; - - &clks { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &ssp0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &ssp3 { - num-cs = <2>; - spi-max-frequency = <40000000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx53-m53menlo-u-boot.dtsi b/arch/arm/dts/imx53-m53menlo-u-boot.dtsi -index 869adb9dad..62453db62e 100644 ---- a/arch/arm/dts/imx53-m53menlo-u-boot.dtsi -+++ b/arch/arm/dts/imx53-m53menlo-u-boot.dtsi -@@ -5,10 +5,10 @@ - - / { - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - - bus@50000000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -19,29 +19,29 @@ - }; - - &gpio1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio5 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio6 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio7 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/imx53-ppd-uboot.dtsi b/arch/arm/dts/imx53-ppd-uboot.dtsi -index b293e27a03..f06cd8a3db 100644 ---- a/arch/arm/dts/imx53-ppd-uboot.dtsi -+++ b/arch/arm/dts/imx53-ppd-uboot.dtsi -@@ -38,21 +38,21 @@ - }; - - &gpio1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio5 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/imx6dl-brppt2.dts b/arch/arm/dts/imx6dl-brppt2.dts -index f515e4cc6a..575bfac7bb 100644 ---- a/arch/arm/dts/imx6dl-brppt2.dts -+++ b/arch/arm/dts/imx6dl-brppt2.dts -@@ -109,7 +109,7 @@ - }; - - vbus1_regulator: regulator@1 { -- u-boot,dm-preloc; -+ bootph-all; - compatible = "regulator-fixed"; - regulator-name = "vbus1_regulator"; - regulator-min-microvolt = <5000000>; -@@ -155,8 +155,8 @@ - }; - - &uart1 { -- u-boot,dm-spl; -- u-boot,dm-preloc; -+ bootph-pre-ram; -+ bootph-all; - status = "okay"; - }; - -@@ -239,22 +239,22 @@ - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - status = "okay"; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - status = "okay"; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - status = "okay"; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - status = "okay"; - }; - -@@ -263,13 +263,13 @@ - }; - - &ecspi1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>, <&gpio3 19 GPIO_ACTIVE_LOW>; - status = "okay"; - spi-max-frequency = <25000000>; - - m25p32@1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - #address-cells = <1>; - #size-cells = <1>; - compatible = "st,m25p", "jedec,spi-nor"; -diff --git a/arch/arm/dts/imx6dl-colibri-eval-v3-u-boot.dtsi b/arch/arm/dts/imx6dl-colibri-eval-v3-u-boot.dtsi -index c4e8d0fb45..31f3a48dd9 100644 ---- a/arch/arm/dts/imx6dl-colibri-eval-v3-u-boot.dtsi -+++ b/arch/arm/dts/imx6dl-colibri-eval-v3-u-boot.dtsi -@@ -16,5 +16,5 @@ - - &wdog1 { - status = "okay"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx6dl-icore-mipi-u-boot.dtsi b/arch/arm/dts/imx6dl-icore-mipi-u-boot.dtsi -index 06dd72527d..7fbeb25dcf 100644 ---- a/arch/arm/dts/imx6dl-icore-mipi-u-boot.dtsi -+++ b/arch/arm/dts/imx6dl-icore-mipi-u-boot.dtsi -@@ -6,5 +6,5 @@ - #include "imx6qdl-icore-u-boot.dtsi" - - &usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi -index 3af57ff8eb..c37aa128fa 100644 ---- a/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi -+++ b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi -@@ -6,9 +6,9 @@ - #include "imx6qdl-u-boot.dtsi" - - &usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx6q-apalis-eval-u-boot.dtsi b/arch/arm/dts/imx6q-apalis-eval-u-boot.dtsi -index df809565c6..3d19796cb6 100644 ---- a/arch/arm/dts/imx6q-apalis-eval-u-boot.dtsi -+++ b/arch/arm/dts/imx6q-apalis-eval-u-boot.dtsi -@@ -21,5 +21,5 @@ - - &wdog1 { - status = "okay"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx6q-bosch-acc-u-boot.dtsi b/arch/arm/dts/imx6q-bosch-acc-u-boot.dtsi -index 37c182d318..c6cb9a5ac7 100644 ---- a/arch/arm/dts/imx6q-bosch-acc-u-boot.dtsi -+++ b/arch/arm/dts/imx6q-bosch-acc-u-boot.dtsi -@@ -10,18 +10,18 @@ - }; - - soc { -- u-boot,dm-spl; -+ bootph-pre-ram; - - bus@2000000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - spba-bus@2000000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - bus@2100000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -@@ -32,49 +32,49 @@ - }; - - &uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio6 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio7 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wdog1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx6q-display5-u-boot.dtsi b/arch/arm/dts/imx6q-display5-u-boot.dtsi -index ced4dacc73..dbe0ef7a0e 100644 ---- a/arch/arm/dts/imx6q-display5-u-boot.dtsi -+++ b/arch/arm/dts/imx6q-display5-u-boot.dtsi -@@ -21,10 +21,10 @@ - }; - - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - - bus@2100000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -45,5 +45,5 @@ - }; - - &uart5 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/imx6q-icore-mipi-u-boot.dtsi b/arch/arm/dts/imx6q-icore-mipi-u-boot.dtsi -index 06dd72527d..7fbeb25dcf 100644 ---- a/arch/arm/dts/imx6q-icore-mipi-u-boot.dtsi -+++ b/arch/arm/dts/imx6q-icore-mipi-u-boot.dtsi -@@ -6,5 +6,5 @@ - #include "imx6qdl-icore-u-boot.dtsi" - - &usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx6q-kp-u-boot.dtsi b/arch/arm/dts/imx6q-kp-u-boot.dtsi -index e6b71b22ae..83d406a062 100644 ---- a/arch/arm/dts/imx6q-kp-u-boot.dtsi -+++ b/arch/arm/dts/imx6q-kp-u-boot.dtsi -@@ -10,9 +10,9 @@ - - / { - clocks { -- u-boot,dm-spl; -+ bootph-pre-ram; - osc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -@@ -23,37 +23,37 @@ - }; - - &clks { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wdog1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx6q-logicpd-u-boot.dtsi b/arch/arm/dts/imx6q-logicpd-u-boot.dtsi -index ee44ed91fe..2b28d36ef1 100644 ---- a/arch/arm/dts/imx6q-logicpd-u-boot.dtsi -+++ b/arch/arm/dts/imx6q-logicpd-u-boot.dtsi -@@ -6,25 +6,25 @@ - #include "imx6qdl-u-boot.dtsi" - - &uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx6q-phytec-mira-rdk-nand-u-boot.dtsi b/arch/arm/dts/imx6q-phytec-mira-rdk-nand-u-boot.dtsi -index 5a64f86b11..08b4ee0ab8 100644 ---- a/arch/arm/dts/imx6q-phytec-mira-rdk-nand-u-boot.dtsi -+++ b/arch/arm/dts/imx6q-phytec-mira-rdk-nand-u-boot.dtsi -@@ -6,39 +6,39 @@ - #include "imx6qdl-u-boot.dtsi" - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio6 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &ecspi1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_ecspi1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &m25p80 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpmi { -diff --git a/arch/arm/dts/imx6q-tbs2910-u-boot.dtsi b/arch/arm/dts/imx6q-tbs2910-u-boot.dtsi -index d48719e7d5..1d9eaffecd 100644 ---- a/arch/arm/dts/imx6q-tbs2910-u-boot.dtsi -+++ b/arch/arm/dts/imx6q-tbs2910-u-boot.dtsi -@@ -1,17 +1,17 @@ - // SPDX-License-Identifier: GPL-2.0+ - - &{/soc/bus@2000000} { /* AIPS1 */ -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &{/soc} { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/imx6qdl-aristainetos2-u-boot.dtsi b/arch/arm/dts/imx6qdl-aristainetos2-u-boot.dtsi -index 3063f01d70..3146dbb256 100644 ---- a/arch/arm/dts/imx6qdl-aristainetos2-u-boot.dtsi -+++ b/arch/arm/dts/imx6qdl-aristainetos2-u-boot.dtsi -@@ -5,7 +5,7 @@ - - / { - chosen { -- u-boot,dm-pre-reloc; -+ bootph-all; - stdout-path = &uart2; - }; - -@@ -16,19 +16,19 @@ - }; - - &uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_gpio { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &aips2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &backlight { -@@ -41,7 +41,7 @@ - * because "pinctrl-assert-gpios" from &ecspi1 isn't handled by u-boot - */ - &gpio2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - wp_spi_nor { - gpio-hog; -@@ -59,21 +59,21 @@ - }; - - &gpio3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio5 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &ecspi4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &flash { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_ecspi4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/imx6qdl-aristainetos2c-u-boot.dtsi b/arch/arm/dts/imx6qdl-aristainetos2c-u-boot.dtsi -index 88826a2634..33c3467b6a 100644 ---- a/arch/arm/dts/imx6qdl-aristainetos2c-u-boot.dtsi -+++ b/arch/arm/dts/imx6qdl-aristainetos2c-u-boot.dtsi -@@ -5,7 +5,7 @@ - - / { - chosen { -- u-boot,dm-pre-reloc; -+ bootph-all; - stdout-path = &uart2; - }; - -@@ -16,23 +16,23 @@ - }; - - &uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_gpio { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &iomuxc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &aips2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &backlight { -@@ -45,7 +45,7 @@ - * because "pinctrl-assert-gpios" from &ecspi1 isn't handled by u-boot - */ - &gpio2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - wp_spi_nor { - gpio-hog; -@@ -61,17 +61,17 @@ - }; - - &gpio4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &ecspi1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &flash { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_ecspi1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/imx6qdl-aristainetos2c_cslb-u-boot.dtsi b/arch/arm/dts/imx6qdl-aristainetos2c_cslb-u-boot.dtsi -index 8c2ed70075..04ed0c1e15 100644 ---- a/arch/arm/dts/imx6qdl-aristainetos2c_cslb-u-boot.dtsi -+++ b/arch/arm/dts/imx6qdl-aristainetos2c_cslb-u-boot.dtsi -@@ -5,7 +5,7 @@ - - / { - chosen { -- u-boot,dm-pre-reloc; -+ bootph-all; - stdout-path = &uart1; - }; - -@@ -16,23 +16,23 @@ - }; - - &uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_gpio { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &iomuxc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &aips1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &backlight { -@@ -45,7 +45,7 @@ - * because "pinctrl-assert-gpios" from &ecspi1 isn't handled by u-boot - */ - &gpio2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - wp_spi_nor { - gpio-hog; -@@ -61,17 +61,17 @@ - }; - - &gpio4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &ecspi1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &flash { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_ecspi1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi b/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi -index e1cb9b3e89..23a05773b5 100644 ---- a/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi -+++ b/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi -@@ -16,35 +16,35 @@ - }; - - &soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &aips1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_microsom_uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio6 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &usdhc1 { -@@ -52,9 +52,9 @@ - }; - - &usdhc2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &usdhc3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/imx6qdl-icore-rqs-u-boot.dtsi b/arch/arm/dts/imx6qdl-icore-rqs-u-boot.dtsi -index 158cadcedd..4476d3cb6f 100644 ---- a/arch/arm/dts/imx6qdl-icore-rqs-u-boot.dtsi -+++ b/arch/arm/dts/imx6qdl-icore-rqs-u-boot.dtsi -@@ -6,17 +6,17 @@ - #include "imx6qdl-u-boot.dtsi" - - &usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx6qdl-icore-u-boot.dtsi b/arch/arm/dts/imx6qdl-icore-u-boot.dtsi -index 12e46e38f6..e02cd58300 100644 ---- a/arch/arm/dts/imx6qdl-icore-u-boot.dtsi -+++ b/arch/arm/dts/imx6qdl-icore-u-boot.dtsi -@@ -6,29 +6,29 @@ - #include "imx6qdl-u-boot.dtsi" - - &soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &aips1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_uart4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx6qdl-sabreauto-u-boot.dtsi b/arch/arm/dts/imx6qdl-sabreauto-u-boot.dtsi -index ea90f40a42..cdc721402e 100644 ---- a/arch/arm/dts/imx6qdl-sabreauto-u-boot.dtsi -+++ b/arch/arm/dts/imx6qdl-sabreauto-u-boot.dtsi -@@ -13,9 +13,9 @@ - - &usdhc3 { - no-1-8-v; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx6qdl-sabresd-u-boot.dtsi b/arch/arm/dts/imx6qdl-sabresd-u-boot.dtsi -index cbb856fba3..5c4101b76d 100644 ---- a/arch/arm/dts/imx6qdl-sabresd-u-boot.dtsi -+++ b/arch/arm/dts/imx6qdl-sabresd-u-boot.dtsi -@@ -12,9 +12,9 @@ - }; - - &usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx6qdl-u-boot.dtsi b/arch/arm/dts/imx6qdl-u-boot.dtsi -index f74af6c423..cab9b6cfc5 100644 ---- a/arch/arm/dts/imx6qdl-u-boot.dtsi -+++ b/arch/arm/dts/imx6qdl-u-boot.dtsi -@@ -10,30 +10,30 @@ - }; - - soc { -- u-boot,dm-spl; -- u-boot,dm-pre-reloc; -+ bootph-pre-ram; -+ bootph-all; - - bus@2000000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - spba-bus@2000000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - bus@2100000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &iomuxc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &ipu1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/imx6sll-evk-u-boot.dtsi b/arch/arm/dts/imx6sll-evk-u-boot.dtsi -index 14d0b58949..0e60906509 100644 ---- a/arch/arm/dts/imx6sll-evk-u-boot.dtsi -+++ b/arch/arm/dts/imx6sll-evk-u-boot.dtsi -@@ -4,5 +4,5 @@ - */ - - &pinctrl_uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/imx6sx-sabreauto-u-boot.dtsi b/arch/arm/dts/imx6sx-sabreauto-u-boot.dtsi -index 7812aa34ee..b619d983aa 100644 ---- a/arch/arm/dts/imx6sx-sabreauto-u-boot.dtsi -+++ b/arch/arm/dts/imx6sx-sabreauto-u-boot.dtsi -@@ -16,5 +16,5 @@ - }; - - &pinctrl_uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/imx6sx-udoo-neo-basic-u-boot.dtsi b/arch/arm/dts/imx6sx-udoo-neo-basic-u-boot.dtsi -index be755e125b..b5e1f2b9a1 100644 ---- a/arch/arm/dts/imx6sx-udoo-neo-basic-u-boot.dtsi -+++ b/arch/arm/dts/imx6sx-udoo-neo-basic-u-boot.dtsi -@@ -1,17 +1,17 @@ - // SPDX-License-Identifier: GPL-2.0+ - - &soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &aips1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/imx6ul-14x14-evk-u-boot.dtsi b/arch/arm/dts/imx6ul-14x14-evk-u-boot.dtsi -index 301838d2d0..eaa2a45fed 100644 ---- a/arch/arm/dts/imx6ul-14x14-evk-u-boot.dtsi -+++ b/arch/arm/dts/imx6ul-14x14-evk-u-boot.dtsi -@@ -4,25 +4,25 @@ - */ - - &{/aliases} { -- u-boot,dm-pre-reloc; -+ bootph-all; - display0 = &lcdif; - }; - - &soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &aips2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &iomuxc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &lcdif { - display = <&display0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - display0: display@0 { - bits-per-pixel = <24>; -diff --git a/arch/arm/dts/imx6ul-geam-u-boot.dtsi b/arch/arm/dts/imx6ul-geam-u-boot.dtsi -index 3141a07f04..014b6bdd13 100644 ---- a/arch/arm/dts/imx6ul-geam-u-boot.dtsi -+++ b/arch/arm/dts/imx6ul-geam-u-boot.dtsi -@@ -6,19 +6,19 @@ - #include "imx6ul-u-boot.dtsi" - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &iomuxc { - pinctrl_usdhc1: usdhc1grp { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - pinctrl_usdhc1_100mhz: usdhc1grp100mhz { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - pinctrl_usdhc1_200mhz: usdhc1grp200mhz { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; -diff --git a/arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi b/arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi -index 6256b793d1..a177acad9a 100644 ---- a/arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi -+++ b/arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi -@@ -6,5 +6,5 @@ - #include "imx6ul-isiot-u-boot.dtsi" - - &usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx6ul-isiot-u-boot.dtsi b/arch/arm/dts/imx6ul-isiot-u-boot.dtsi -index 7213e71989..8f58886478 100644 ---- a/arch/arm/dts/imx6ul-isiot-u-boot.dtsi -+++ b/arch/arm/dts/imx6ul-isiot-u-boot.dtsi -@@ -6,29 +6,29 @@ - #include "imx6ul-u-boot.dtsi" - - &soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &aips1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx6ul-opos6ul-u-boot.dtsi b/arch/arm/dts/imx6ul-opos6ul-u-boot.dtsi -index 4918de388e..ebfb95dcdf 100644 ---- a/arch/arm/dts/imx6ul-opos6ul-u-boot.dtsi -+++ b/arch/arm/dts/imx6ul-opos6ul-u-boot.dtsi -@@ -7,22 +7,22 @@ - - / { - soc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &aips2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &iomuxc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx6ul-opos6uldev-u-boot.dtsi b/arch/arm/dts/imx6ul-opos6uldev-u-boot.dtsi -index 3f351ef0c4..aa88964f21 100644 ---- a/arch/arm/dts/imx6ul-opos6uldev-u-boot.dtsi -+++ b/arch/arm/dts/imx6ul-opos6uldev-u-boot.dtsi -@@ -14,21 +14,21 @@ - }; - - &aips1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - spba-bus@02000000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &lcdif { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pinctrl_uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx6ul-u-boot.dtsi b/arch/arm/dts/imx6ul-u-boot.dtsi -index eb190cf8c8..cad2261922 100644 ---- a/arch/arm/dts/imx6ul-u-boot.dtsi -+++ b/arch/arm/dts/imx6ul-u-boot.dtsi -@@ -5,26 +5,26 @@ - - / { - soc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &aips1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &iomuxc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &aips2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx6ull-14x14-evk-u-boot.dtsi b/arch/arm/dts/imx6ull-14x14-evk-u-boot.dtsi -index d283e815e6..a6c2cc8c1a 100644 ---- a/arch/arm/dts/imx6ull-14x14-evk-u-boot.dtsi -+++ b/arch/arm/dts/imx6ull-14x14-evk-u-boot.dtsi -@@ -4,5 +4,5 @@ - */ - - &pinctrl_uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/imx6ull-colibri-eval-v3-u-boot.dtsi b/arch/arm/dts/imx6ull-colibri-eval-v3-u-boot.dtsi -index 0a732269ba..6823b42d45 100644 ---- a/arch/arm/dts/imx6ull-colibri-eval-v3-u-boot.dtsi -+++ b/arch/arm/dts/imx6ull-colibri-eval-v3-u-boot.dtsi -@@ -5,18 +5,18 @@ - - / { - aliases { -- u-boot,dm-pre-reloc; -+ bootph-all; - usb0 = &usbotg1; /* required for ums */ - display0 = &lcdif; - }; - }; - - &pinctrl_uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_uart1_ctrl1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &lcdif { -@@ -25,7 +25,7 @@ - &pinctrl_lcdif_ctrl>; - status = "okay"; - display = <&display0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - display0: display0 { - bits-per-pixel = <18>; -@@ -35,7 +35,7 @@ - display-timings { - native-mode = <&timing_vga>; - timing_vga: 640x480 { -- u-boot,dm-pre-reloc; -+ bootph-all; - clock-frequency = <25175000>; - hactive = <640>; - vactive = <480>; -diff --git a/arch/arm/dts/imx6ull-dart-6ul.dtsi b/arch/arm/dts/imx6ull-dart-6ul.dtsi -index fab926f5b7..d2a74ddaf0 100644 ---- a/arch/arm/dts/imx6ull-dart-6ul.dtsi -+++ b/arch/arm/dts/imx6ull-dart-6ul.dtsi -@@ -47,7 +47,7 @@ - }; - - &gpio1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpmi { -@@ -94,10 +94,10 @@ - scl-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>; - sda-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - eeprom_som: eeprom@50 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "atmel,24c04"; - reg = <0x50>; - status = "okay"; -@@ -197,7 +197,7 @@ - }; - - pinctrl_i2c2: i2cgrp { -- u-boot,dm-pre-reloc; -+ bootph-all; - fsl,pins = < - MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 - MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0 -@@ -205,7 +205,7 @@ - }; - - pinctrl_i2c2_gpio: i2c2grp_gpio { -- u-boot,dm-pre-reloc; -+ bootph-all; - fsl,pins = < - MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x1b8b0 - MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31 0x1b8b0 -diff --git a/arch/arm/dts/imx6ull-mys-6ulx-u-boot.dtsi b/arch/arm/dts/imx6ull-mys-6ulx-u-boot.dtsi -index cd15d9ba86..05004a74e0 100644 ---- a/arch/arm/dts/imx6ull-mys-6ulx-u-boot.dtsi -+++ b/arch/arm/dts/imx6ull-mys-6ulx-u-boot.dtsi -@@ -5,20 +5,20 @@ - */ - - &pinctrl_uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpmi { -- u-boot,dm-spl; -- u-boot,dm-pre-reloc; -+ bootph-pre-ram; -+ bootph-all; - }; - - &usdhc1 { -- u-boot,dm-spl; -- u-boot,dm-pre-reloc; -+ bootph-pre-ram; -+ bootph-all; - }; - - &usdhc2 { -- u-boot,dm-spl; -- u-boot,dm-pre-reloc; -+ bootph-pre-ram; -+ bootph-all; - }; -diff --git a/arch/arm/dts/imx6ull-seeed-npi-imx6ull-u-boot.dtsi b/arch/arm/dts/imx6ull-seeed-npi-imx6ull-u-boot.dtsi -index 054e1aa94b..ab7dc3939c 100644 ---- a/arch/arm/dts/imx6ull-seeed-npi-imx6ull-u-boot.dtsi -+++ b/arch/arm/dts/imx6ull-seeed-npi-imx6ull-u-boot.dtsi -@@ -5,20 +5,20 @@ - */ - - &pinctrl_uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpmi { -- u-boot,dm-spl; -- u-boot,dm-pre-reloc; -+ bootph-pre-ram; -+ bootph-all; - }; - - &usdhc1 { -- u-boot,dm-spl; -- u-boot,dm-pre-reloc; -+ bootph-pre-ram; -+ bootph-all; - }; - - &usdhc2 { -- u-boot,dm-spl; -- u-boot,dm-pre-reloc; -+ bootph-pre-ram; -+ bootph-all; - }; -diff --git a/arch/arm/dts/imx6ull-u-boot.dtsi b/arch/arm/dts/imx6ull-u-boot.dtsi -index 74ca95fa2c..0d7679634d 100644 ---- a/arch/arm/dts/imx6ull-u-boot.dtsi -+++ b/arch/arm/dts/imx6ull-u-boot.dtsi -@@ -5,30 +5,30 @@ - - / { - soc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &aips1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &aips2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &aips3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &iomuxc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx6ulz-14x14-evk-u-boot.dtsi b/arch/arm/dts/imx6ulz-14x14-evk-u-boot.dtsi -index d283e815e6..a6c2cc8c1a 100644 ---- a/arch/arm/dts/imx6ulz-14x14-evk-u-boot.dtsi -+++ b/arch/arm/dts/imx6ulz-14x14-evk-u-boot.dtsi -@@ -4,5 +4,5 @@ - */ - - &pinctrl_uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/imx6ulz-bsh-smm-m2-u-boot.dtsi b/arch/arm/dts/imx6ulz-bsh-smm-m2-u-boot.dtsi -index 75dbf6ed78..7730bb60dd 100644 ---- a/arch/arm/dts/imx6ulz-bsh-smm-m2-u-boot.dtsi -+++ b/arch/arm/dts/imx6ulz-bsh-smm-m2-u-boot.dtsi -@@ -6,30 +6,30 @@ - */ - - &{/soc} { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &aips2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &iomuxc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &iomuxc_snvs { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_uart4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpmi { -- u-boot,dm-spl; -- u-boot,dm-pre-reloc; -+ bootph-pre-ram; -+ bootph-all; - }; -diff --git a/arch/arm/dts/imx7-cm-u-boot.dtsi b/arch/arm/dts/imx7-cm-u-boot.dtsi -index c6970c51ba..676e119899 100644 ---- a/arch/arm/dts/imx7-cm-u-boot.dtsi -+++ b/arch/arm/dts/imx7-cm-u-boot.dtsi -@@ -5,13 +5,13 @@ - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx7d-colibri-eval-v3-u-boot.dtsi b/arch/arm/dts/imx7d-colibri-eval-v3-u-boot.dtsi -index 1bf3f4a4aa..52aa875870 100644 ---- a/arch/arm/dts/imx7d-colibri-eval-v3-u-boot.dtsi -+++ b/arch/arm/dts/imx7d-colibri-eval-v3-u-boot.dtsi -@@ -15,7 +15,7 @@ - pinctrl-0 = <&pinctrl_lcdif_dat - &pinctrl_lcdif_ctrl>; - display = <&display0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - display0: display0 { - bits-per-pixel = <18>; -diff --git a/arch/arm/dts/imx7d-pico-pi-u-boot.dtsi b/arch/arm/dts/imx7d-pico-pi-u-boot.dtsi -index 7307fbaf68..67b41ae112 100644 ---- a/arch/arm/dts/imx7d-pico-pi-u-boot.dtsi -+++ b/arch/arm/dts/imx7d-pico-pi-u-boot.dtsi -@@ -15,7 +15,7 @@ - pinctrl-0 = <&pinctrl_lcdif>; - status = "okay"; - display = <&display0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - display0: display { - bits-per-pixel = <16>; -diff --git a/arch/arm/dts/imx7s-warp-u-boot.dtsi b/arch/arm/dts/imx7s-warp-u-boot.dtsi -index bc4b5745fc..49b992dccc 100644 ---- a/arch/arm/dts/imx7s-warp-u-boot.dtsi -+++ b/arch/arm/dts/imx7s-warp-u-boot.dtsi -@@ -10,17 +10,17 @@ - }; - - &aips3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/imx7ulp-com-u-boot.dtsi b/arch/arm/dts/imx7ulp-com-u-boot.dtsi -index b766c5ef3f..f6d34e1b63 100644 ---- a/arch/arm/dts/imx7ulp-com-u-boot.dtsi -+++ b/arch/arm/dts/imx7ulp-com-u-boot.dtsi -@@ -4,34 +4,34 @@ - */ - - &iomuxc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &ahbbridge0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &ahbbridge1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &lpuart4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbotg1 { - extcon = <&usbphy1>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbphy1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio_ptc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx7ulp-uboot.dtsi b/arch/arm/dts/imx7ulp-uboot.dtsi -index 712cec4921..60a3cecf52 100644 ---- a/arch/arm/dts/imx7ulp-uboot.dtsi -+++ b/arch/arm/dts/imx7ulp-uboot.dtsi -@@ -7,37 +7,37 @@ - */ - - &soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &ahbbridge0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &ahbbridge1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &iomuxc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &iomuxc1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &lpuart4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &lpuart5 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &lpuart6 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &lpuart7 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi -index 00ac413f36..fd0061f00f 100644 ---- a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi -+++ b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi -@@ -9,12 +9,12 @@ - wdt-reboot { - compatible = "wdt-reboot"; - wdt = <&wdog1>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &aips4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - ®_usdhc2_vmmc { -@@ -26,23 +26,23 @@ - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pca6416_0 { -@@ -54,31 +54,31 @@ - }; - - &pinctrl_i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_pmic { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2_gpio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_wdog { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - ®_usbotg1 { -@@ -86,41 +86,41 @@ - }; - - &uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbmisc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbotg1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbphynop1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b/regulators} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wdog1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mm-cl-iot-gate-optee-u-boot.dtsi b/arch/arm/dts/imx8mm-cl-iot-gate-optee-u-boot.dtsi -index 5cbc70faaa..484e31824b 100644 ---- a/arch/arm/dts/imx8mm-cl-iot-gate-optee-u-boot.dtsi -+++ b/arch/arm/dts/imx8mm-cl-iot-gate-optee-u-boot.dtsi -@@ -15,17 +15,17 @@ - - wdt-reboot { - compatible = "wdt-reboot"; -- u-boot,dm-spl; -+ bootph-pre-ram; - wdt = <&wdog1>; - }; - }; - - &{/soc@0/bus@30800000/i2c@30a30000/pmic@4b} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a30000/pmic@4b/regulators} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &binman_fip { -@@ -50,73 +50,73 @@ - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_pmic { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2_gpio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wdog1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi b/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi -index a7044b6369..1878c4e13f 100644 ---- a/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi -+++ b/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi -@@ -15,17 +15,17 @@ - - wdt-reboot { - compatible = "wdt-reboot"; -- u-boot,dm-spl; -+ bootph-pre-ram; - wdt = <&wdog1>; - }; - }; - - &{/soc@0/bus@30800000/i2c@30a30000/pmic@4b} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a30000/pmic@4b/regulators} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &fec1 { -@@ -33,77 +33,77 @@ - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_pmic { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2_gpio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_wdog { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wdog1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mm-data-modul-edm-sbc-u-boot.dtsi b/arch/arm/dts/imx8mm-data-modul-edm-sbc-u-boot.dtsi -index 184c30ab4a..144c42b210 100644 ---- a/arch/arm/dts/imx8mm-data-modul-edm-sbc-u-boot.dtsi -+++ b/arch/arm/dts/imx8mm-data-modul-edm-sbc-u-boot.dtsi -@@ -19,80 +19,80 @@ - wdt-reboot { - compatible = "wdt-reboot"; - wdt = <&wdog1>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &buck4_reg { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &buck5_reg { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_hog_sbc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c1_gpio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_pmic { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pmic { -- u-boot,dm-spl; -+ bootph-pre-ram; - - regulators { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbotg1 { -@@ -100,17 +100,17 @@ - }; - - &usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - sd-uhs-sdr104; - sd-uhs-ddr50; - }; - - &usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - }; - - &wdog1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi -index d82428f8fe..13688ec0d0 100644 ---- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi -+++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi -@@ -9,7 +9,7 @@ - wdt-reboot { - compatible = "wdt-reboot"; - wdt = <&wdog1>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - firmware { -@@ -21,7 +21,7 @@ - }; - - &aips4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - ®_usdhc2_vmmc { -@@ -29,116 +29,116 @@ - }; - - &pinctrl_reg_usdhc2_vmmc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2_gpio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &crypto { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbmisc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbphynop1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbotg1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - sd-uhs-sdr104; - sd-uhs-ddr50; - fsl,signal-voltage-switch-extra-delay-ms = <8>; - }; - - &usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - }; - - &i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b/regulators} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_pmic { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_wdog { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &fec1 { -@@ -146,5 +146,5 @@ - }; - - &wdog1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mm-icore-mx8mm-ctouch2-u-boot.dtsi b/arch/arm/dts/imx8mm-icore-mx8mm-ctouch2-u-boot.dtsi -index 8b67bcff7d..a009880bdf 100644 ---- a/arch/arm/dts/imx8mm-icore-mx8mm-ctouch2-u-boot.dtsi -+++ b/arch/arm/dts/imx8mm-icore-mx8mm-ctouch2-u-boot.dtsi -@@ -7,25 +7,25 @@ - #include "imx8mm-icore-mx8mm-u-boot.dtsi" - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc1_gpio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mm-icore-mx8mm-edimm2.2-u-boot.dtsi b/arch/arm/dts/imx8mm-icore-mx8mm-edimm2.2-u-boot.dtsi -index 8b67bcff7d..a009880bdf 100644 ---- a/arch/arm/dts/imx8mm-icore-mx8mm-edimm2.2-u-boot.dtsi -+++ b/arch/arm/dts/imx8mm-icore-mx8mm-edimm2.2-u-boot.dtsi -@@ -7,25 +7,25 @@ - #include "imx8mm-icore-mx8mm-u-boot.dtsi" - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc1_gpio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mm-icore-mx8mm-u-boot.dtsi b/arch/arm/dts/imx8mm-icore-mx8mm-u-boot.dtsi -index e7d179d632..bc4e434cc7 100644 ---- a/arch/arm/dts/imx8mm-icore-mx8mm-u-boot.dtsi -+++ b/arch/arm/dts/imx8mm-icore-mx8mm-u-boot.dtsi -@@ -7,21 +7,21 @@ - #include "imx8mm-u-boot.dtsi" - - &iomuxc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3_100mhz { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3_200mhz { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mm-kontron-bl-common-u-boot.dtsi b/arch/arm/dts/imx8mm-kontron-bl-common-u-boot.dtsi -index 5b8b472159..65dfd33725 100644 ---- a/arch/arm/dts/imx8mm-kontron-bl-common-u-boot.dtsi -+++ b/arch/arm/dts/imx8mm-kontron-bl-common-u-boot.dtsi -@@ -14,7 +14,7 @@ - wdt-reboot { - compatible = "wdt-reboot"; - wdt = <&wdog1>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - firmware { -@@ -26,24 +26,24 @@ - }; - - &crypto { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c1 { -- u-boot,dm-spl; -- u-boot,dm-pre-reloc; -+ bootph-pre-ram; -+ bootph-all; - }; - - &i2c2 { -@@ -62,87 +62,87 @@ - }; - - &pinctrl_ecspi1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_pmic { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart3 { -- u-boot,dm-spl; -- u-boot,dm-pre-reloc; -+ bootph-pre-ram; -+ bootph-all; - }; - - &pinctrl_usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc1_100mhz { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc1_200mhz { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pca9450 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &ecspi1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart3 { -- u-boot,dm-spl; -- u-boot,dm-pre-reloc; -+ bootph-pre-ram; -+ bootph-all; - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wdog1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_wdog { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mm-mx8menlo-u-boot.dtsi b/arch/arm/dts/imx8mm-mx8menlo-u-boot.dtsi -index 7f5f8c384e..a16ce54926 100644 ---- a/arch/arm/dts/imx8mm-mx8menlo-u-boot.dtsi -+++ b/arch/arm/dts/imx8mm-mx8menlo-u-boot.dtsi -@@ -18,7 +18,7 @@ - }; - - &aips4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c4 { -@@ -26,17 +26,17 @@ - }; - - ®_usb_otg1_vbus { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbmisc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbphynop1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbotg1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mm-phg-u-boot.dtsi b/arch/arm/dts/imx8mm-phg-u-boot.dtsi -index 3bf45ef4a6..3ced97cfaa 100644 ---- a/arch/arm/dts/imx8mm-phg-u-boot.dtsi -+++ b/arch/arm/dts/imx8mm-phg-u-boot.dtsi -@@ -9,7 +9,7 @@ - wdt-reboot { - compatible = "wdt-reboot"; - wdt = <&wdog1>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - firmware { -@@ -21,7 +21,7 @@ - }; - - &aips4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - ®_usdhc2_vmmc { -@@ -29,67 +29,67 @@ - }; - - &pinctrl_reg_usdhc2_vmmc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2_gpio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbmisc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbphynop1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbotg1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - sd-uhs-sdr104; - sd-uhs-ddr50; - assigned-clocks = <&clk IMX8MM_CLK_USDHC2>; -@@ -98,7 +98,7 @@ - }; - - &usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - /* -@@ -113,25 +113,25 @@ - }; - - &i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a20000/pmic@25} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_pmic { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wdog1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mm-u-boot.dtsi b/arch/arm/dts/imx8mm-u-boot.dtsi -index 25dc8e12dd..7fd5a05fad 100644 ---- a/arch/arm/dts/imx8mm-u-boot.dtsi -+++ b/arch/arm/dts/imx8mm-u-boot.dtsi -@@ -10,21 +10,21 @@ - }; - - &soc { -- u-boot,dm-pre-reloc; -- u-boot,dm-spl; -+ bootph-all; -+ bootph-pre-ram; - }; - - &aips1 { -- u-boot,dm-pre-reloc; -- u-boot,dm-spl; -+ bootph-all; -+ bootph-pre-ram; - }; - - &aips2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &aips3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &binman { -@@ -189,28 +189,28 @@ - }; - - &clk { -- u-boot,dm-pre-reloc; -- u-boot,dm-spl; -+ bootph-all; -+ bootph-pre-ram; - /delete-property/ assigned-clocks; - /delete-property/ assigned-clock-parents; - /delete-property/ assigned-clock-rates; - }; - - &iomuxc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &osc_24m { -- u-boot,dm-pre-reloc; -- u-boot,dm-spl; -+ bootph-all; -+ bootph-pre-ram; - }; - - &spba1 { -- u-boot,dm-pre-reloc; -- u-boot,dm-spl; -+ bootph-all; -+ bootph-pre-ram; - }; - - &spba2 { -- u-boot,dm-pre-reloc; -- u-boot,dm-spl; -+ bootph-all; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mm-venice-gw700x-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw700x-u-boot.dtsi -index e877580c9a..6ab21fd938 100644 ---- a/arch/arm/dts/imx8mm-venice-gw700x-u-boot.dtsi -+++ b/arch/arm/dts/imx8mm-venice-gw700x-u-boot.dtsi -@@ -12,13 +12,13 @@ - }; - - &pinctrl_fec1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a20000/pmic@69} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a20000/pmic@69/regulators} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi -index dc99e7b9ac..e68030e7b2 100644 ---- a/arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi -+++ b/arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi -@@ -181,17 +181,17 @@ - }; - - &pinctrl_fec1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a30000/pmic@4b} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a30000/pmic@4b/regulators} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_pmic { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mm-venice-gw7902-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw7902-u-boot.dtsi -index d58a7d14b6..91b33a9e24 100644 ---- a/arch/arm/dts/imx8mm-venice-gw7902-u-boot.dtsi -+++ b/arch/arm/dts/imx8mm-venice-gw7902-u-boot.dtsi -@@ -176,17 +176,17 @@ - }; - - &pinctrl_fec1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b/regulators} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_pmic { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mm-venice-gw7903-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw7903-u-boot.dtsi -index ff9b12a834..9590d0924b 100644 ---- a/arch/arm/dts/imx8mm-venice-gw7903-u-boot.dtsi -+++ b/arch/arm/dts/imx8mm-venice-gw7903-u-boot.dtsi -@@ -109,17 +109,17 @@ - }; - - &pinctrl_fec1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a30000/pmic@4b} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a30000/pmic@4b/regulators} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_pmic { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mm-venice-gw7904-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw7904-u-boot.dtsi -index aa1153fbf8..4171c6be00 100644 ---- a/arch/arm/dts/imx8mm-venice-gw7904-u-boot.dtsi -+++ b/arch/arm/dts/imx8mm-venice-gw7904-u-boot.dtsi -@@ -30,17 +30,17 @@ - }; - - &pinctrl_fec1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a30000/pmic@4b} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a30000/pmic@4b/regulators} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_pmic { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mm-venice-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-u-boot.dtsi -index 6f786b9467..8337c4aea8 100644 ---- a/arch/arm/dts/imx8mm-venice-u-boot.dtsi -+++ b/arch/arm/dts/imx8mm-venice-u-boot.dtsi -@@ -9,74 +9,74 @@ - wdt-reboot { - compatible = "wdt-reboot"; - wdt = <&wdog1>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c1_gpio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gsc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wdog1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_wdog { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi b/arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi -index 809c39c2b9..494229e4e6 100644 ---- a/arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi -+++ b/arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi -@@ -15,7 +15,7 @@ - - wdt-reboot { - compatible = "wdt-reboot"; -- u-boot,dm-spl; -+ bootph-pre-ram; - wdt = <&wdog1>; - }; - }; -@@ -27,11 +27,11 @@ - }; - - &{/soc@0/bus@30800000/i2c@30a20000/pmic@25} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &binman_uboot { -@@ -39,27 +39,27 @@ - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - eeprom_module: eeprom@50 { - compatible = "i2c-eeprom"; -@@ -89,45 +89,45 @@ - }; - - &pinctrl_i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_pmic { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_wdog { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wdog1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi -index 3180d57239..4be0098b2c 100644 ---- a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi -+++ b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi -@@ -6,23 +6,23 @@ - #include "imx8mn-u-boot.dtsi" - - &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b/regulators} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pca6416_0 { -@@ -34,27 +34,27 @@ - }; - - &pinctrl_i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_pmic { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2_gpio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - ®_usdhc2_vmmc { -@@ -62,27 +62,27 @@ - }; - - &uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - sd-uhs-sdr104; - sd-uhs-ddr50; - }; - - &usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - sd-uhs-sdr104; - sd-uhs-ddr50; - }; - - &usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - }; - - &pinctrl_wdog { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi b/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi -index 3967e0bd15..19b0d89775 100644 ---- a/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi -+++ b/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi -@@ -7,49 +7,49 @@ - #include "imx8mn-u-boot.dtsi" - - &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b/regulators} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_pmic { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_wdog { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wdog1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot.dtsi b/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot.dtsi -index bd4da7d34c..fb86657f0f 100644 ---- a/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot.dtsi -+++ b/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot.dtsi -@@ -7,9 +7,9 @@ - #include "imx8mn-bsh-smm-s2-u-boot-common.dtsi" - - &pinctrl_gpmi_nand { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpmi { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mn-bsh-smm-s2pro-u-boot.dtsi b/arch/arm/dts/imx8mn-bsh-smm-s2pro-u-boot.dtsi -index b8396a46b8..f6f8313c56 100644 ---- a/arch/arm/dts/imx8mn-bsh-smm-s2pro-u-boot.dtsi -+++ b/arch/arm/dts/imx8mn-bsh-smm-s2pro-u-boot.dtsi -@@ -7,9 +7,9 @@ - #include "imx8mn-bsh-smm-s2-u-boot-common.dtsi" - - &pinctrl_usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi -index 54f3ebe88b..315714f398 100644 ---- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi -+++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi -@@ -6,7 +6,7 @@ - #include "imx8mn-u-boot.dtsi" - - &pinctrl_reg_usdhc2_vmmc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - ®_usdhc2_vmmc { -@@ -14,77 +14,77 @@ - }; - - &pinctrl_uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2_gpio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_wdog { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &crypto { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - sd-uhs-sdr104; - sd-uhs-ddr50; - }; - - &usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - }; -diff --git a/arch/arm/dts/imx8mn-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-evk-u-boot.dtsi -index 6c6c949f43..056ab31045 100644 ---- a/arch/arm/dts/imx8mn-evk-u-boot.dtsi -+++ b/arch/arm/dts/imx8mn-evk-u-boot.dtsi -@@ -6,21 +6,21 @@ - #include "imx8mn-ddr4-evk-u-boot.dtsi" - - &i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a20000/pmic@25} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_pmic { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mn-u-boot.dtsi b/arch/arm/dts/imx8mn-u-boot.dtsi -index 98659bb528..cef20dab46 100644 ---- a/arch/arm/dts/imx8mn-u-boot.dtsi -+++ b/arch/arm/dts/imx8mn-u-boot.dtsi -@@ -18,55 +18,55 @@ - wdt-reboot { - compatible = "wdt-reboot"; - wdt = <&wdog1>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &{/soc@0} { -- u-boot,dm-pre-reloc; -- u-boot,dm-spl; -+ bootph-all; -+ bootph-pre-ram; - }; - - &aips1 { -- u-boot,dm-spl; -- u-boot,dm-pre-reloc; -+ bootph-pre-ram; -+ bootph-all; - }; - - &aips2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &aips3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &aips4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &clk { -- u-boot,dm-spl; -- u-boot,dm-pre-reloc; -+ bootph-pre-ram; -+ bootph-all; - /delete-property/ assigned-clocks; - /delete-property/ assigned-clock-parents; - /delete-property/ assigned-clock-rates; - }; - - &iomuxc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &osc_24m { -- u-boot,dm-spl; -- u-boot,dm-pre-reloc; -+ bootph-pre-ram; -+ bootph-all; - }; - - &spba1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wdog1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &binman { -diff --git a/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi b/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi -index a20683155c..af80aaea0b 100644 ---- a/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi -+++ b/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi -@@ -6,65 +6,65 @@ - #include "imx8mn-u-boot.dtsi" - - &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b/regulators} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_pmic { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_reg_usdhc2_vmmc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_wdog { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi b/arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi -index 10656ce903..53a5ac0717 100644 ---- a/arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi -+++ b/arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi -@@ -134,17 +134,17 @@ - }; - - &pinctrl_fec1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b/regulators} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_pmic { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mn-venice-u-boot.dtsi b/arch/arm/dts/imx8mn-venice-u-boot.dtsi -index 4af6b8b4ed..4109d26874 100644 ---- a/arch/arm/dts/imx8mn-venice-u-boot.dtsi -+++ b/arch/arm/dts/imx8mn-venice-u-boot.dtsi -@@ -6,65 +6,65 @@ - #include "imx8mn-u-boot.dtsi" - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c1_gpio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gsc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_wdog { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mp-dhcom-pdk2.dts b/arch/arm/dts/imx8mp-dhcom-pdk2.dts -index 382fbedaf6..8f4eff37c4 100644 ---- a/arch/arm/dts/imx8mp-dhcom-pdk2.dts -+++ b/arch/arm/dts/imx8mp-dhcom-pdk2.dts -@@ -104,20 +104,10 @@ - }; - }; - --/* -- * PDK2 carrier board uses SoM with KSZ9131 populated and connected to -- * SoM EQoS ethernet RGMII interface. Remove the other SoM PHY DT node. -- */ --/delete-node/ ðphy0f; -- --/* -- * PDK2 carrier board has KSZ9021 PHY populated and connected to SoM FEC -- * ethernet RGMII interface. The SoM is not populated with second FEC PHY. -- */ --/delete-node/ ðphy1f; -- - &fec { /* Second ethernet */ -+ pinctrl-0 = <&pinctrl_fec_rgmii>; - phy-handle = <ðphypdk>; -+ phy-mode = "rgmii"; - - mdio { - ethphypdk: ethernet-phy@7 { /* KSZ 9021 */ -diff --git a/arch/arm/dts/imx8mp-dhcom-pdk3-u-boot.dtsi b/arch/arm/dts/imx8mp-dhcom-pdk3-u-boot.dtsi -new file mode 100644 -index 0000000000..040f333c52 ---- /dev/null -+++ b/arch/arm/dts/imx8mp-dhcom-pdk3-u-boot.dtsi -@@ -0,0 +1,6 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (C) 2023 Marek Vasut -+ */ -+ -+#include "imx8mp-dhcom-u-boot.dtsi" -diff --git a/arch/arm/dts/imx8mp-dhcom-pdk3.dts b/arch/arm/dts/imx8mp-dhcom-pdk3.dts -new file mode 100644 -index 0000000000..c5f0607f43 ---- /dev/null -+++ b/arch/arm/dts/imx8mp-dhcom-pdk3.dts -@@ -0,0 +1,321 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (C) 2023 Marek Vasut -+ * -+ * DHCOM iMX8MP variant: -+ * DHCM-iMX8ML8-C160-R409-F1638-SPI16-GE-CAN2-SD-RTC-WBTA-ADC-T-RGB-CSI2-HS-I-01D2 -+ * DHCOM PCB number: 660-100 or newer -+ * PDK3 PCB number: 669-100 or newer -+ */ -+ -+/dts-v1/; -+ -+#include -+#include -+#include "imx8mp-dhcom-som.dtsi" -+ -+/ { -+ model = "DH electronics i.MX8M Plus DHCOM Premium Developer Kit (3)"; -+ compatible = "dh,imx8mp-dhcom-pdk3", "dh,imx8mp-dhcom-som", -+ "fsl,imx8mp"; -+ -+ chosen { -+ stdout-path = &uart1; -+ }; -+ -+ clk_ext_audio_codec: clock-codec { -+ #clock-cells = <0>; -+ clock-frequency = <24000000>; -+ compatible = "fixed-clock"; -+ }; -+ -+ clk_xtal25: clk-xtal25 { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <25000000>; -+ }; -+ -+ connector { -+ compatible = "usb-c-connector"; -+ label = "USB-C"; -+ data-role = "dual"; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port@0 { -+ reg = <0>; -+ -+ usb_c_0_hs_ep: endpoint { -+ remote-endpoint = <&dwc3_0_hs_ep>; -+ }; -+ }; -+ -+ port@1 { -+ reg = <1>; -+ -+ usb_c_0_ss_ep: endpoint { -+ remote-endpoint = <&ptn5150_in_ep>; -+ }; -+ }; -+ }; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ -+ button-0 { -+ gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; /* GPIO A */ -+ label = "TA1-GPIO-A"; -+ linux,code = ; -+ pinctrl-0 = <&pinctrl_dhcom_a>; -+ pinctrl-names = "default"; -+ wakeup-source; -+ }; -+ -+ button-1 { -+ gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; /* GPIO B */ -+ label = "TA2-GPIO-B"; -+ linux,code = ; -+ pinctrl-0 = <&pinctrl_dhcom_b>; -+ pinctrl-names = "default"; -+ wakeup-source; -+ }; -+ -+ button-2 { -+ gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; /* GPIO C */ -+ label = "TA3-GPIO-C"; -+ linux,code = ; -+ pinctrl-0 = <&pinctrl_dhcom_c>; -+ pinctrl-names = "default"; -+ wakeup-source; -+ }; -+ -+ button-3 { -+ gpios = <&gpio5 22 GPIO_ACTIVE_LOW>; /* GPIO E */ -+ label = "TA4-GPIO-E"; -+ linux,code = ; -+ pinctrl-0 = <&pinctrl_dhcom_e>; -+ pinctrl-names = "default"; -+ wakeup-source; -+ }; -+ }; -+ -+ led { -+ compatible = "gpio-leds"; -+ -+ led-0 { -+ color = ; -+ default-state = "off"; -+ function = LED_FUNCTION_INDICATOR; -+ function-enumerator = <0>; -+ gpios = <&gpio4 27 GPIO_ACTIVE_HIGH>; /* GPIO D */ -+ pinctrl-0 = <&pinctrl_dhcom_d>; -+ pinctrl-names = "default"; -+ }; -+ -+ led-1 { -+ color = ; -+ default-state = "off"; -+ function = LED_FUNCTION_INDICATOR; -+ function-enumerator = <1>; -+ gpios = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* GPIO F */ -+ pinctrl-0 = <&pinctrl_dhcom_f>; -+ pinctrl-names = "default"; -+ }; -+ -+ led-2 { -+ color = ; -+ default-state = "off"; -+ function = LED_FUNCTION_INDICATOR; -+ function-enumerator = <2>; -+ gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; /* GPIO G */ -+ pinctrl-0 = <&pinctrl_dhcom_g>; -+ pinctrl-names = "default"; -+ }; -+ -+ led-3 { -+ color = ; -+ default-state = "off"; -+ function = LED_FUNCTION_INDICATOR; -+ function-enumerator = <3>; -+ gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; /* GPIO I */ -+ pinctrl-0 = <&pinctrl_dhcom_i>; -+ pinctrl-names = "default"; -+ }; -+ }; -+ -+ reg_avdd: regulator-avdd { /* AUDIO_VDD */ -+ compatible = "regulator-fixed"; -+ regulator-always-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "AUDIO_VDD"; -+ }; -+}; -+ -+&i2c5 { -+ i2cmux@70 { -+ compatible = "nxp,pca9540"; -+ reg = <0x70>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ i2cmuxed0: i2c@0 { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ reg = <0>; -+ -+ typec@3d { -+ compatible = "nxp,ptn5150"; -+ reg = <0x3d>; -+ interrupt-parent = <&gpio4>; -+ interrupts = <25 IRQ_TYPE_EDGE_FALLING>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_ptn5150>; -+ status = "okay"; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port@0 { -+ reg = <0>; -+ -+ ptn5150_in_ep: endpoint { -+ remote-endpoint = <&usb_c_0_ss_ep>; -+ }; -+ }; -+ -+ port@1 { -+ reg = <1>; -+ -+ ptn5150_out_ep: endpoint { -+ remote-endpoint = <&dwc3_0_ss_ep>; -+ }; -+ }; -+ }; -+ }; -+ -+ power-sensor@40 { -+ compatible = "ti,ina238"; -+ reg = <0x40>; -+ shunt-resistor = <20000>; /* 0.02 R */ -+ ti,shunt-gain = <1>; /* Drop cca. 40mV */ -+ }; -+ -+ eeprom_board: eeprom@54 { -+ compatible = "atmel,24c04"; -+ pagesize = <16>; -+ reg = <0x54>; -+ }; -+ -+ pcieclk: clk@6b { -+ compatible = "skyworks,si52144"; -+ reg = <0x6b>; -+ clocks = <&clk_xtal25>; -+ #clock-cells = <1>; -+ }; -+ }; -+ -+ i2cmuxed1: i2c@1 { /* HDMI DDC I2C */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ reg = <1>; -+ }; -+ }; -+}; -+ -+ðphy0g { -+ reg = <7>; -+}; -+ -+&fec { /* Second ethernet */ -+ pinctrl-0 = <&pinctrl_fec_rgmii>; -+ phy-handle = <ðphypdk>; -+ phy-mode = "rgmii-id"; -+ -+ mdio { -+ ethphypdk: ethernet-phy@7 { /* Micrel KSZ9131RNXI */ -+ compatible = "ethernet-phy-id0022.1642", -+ "ethernet-phy-ieee802.3-c22"; -+ interrupt-parent = <&gpio4>; -+ interrupts = <3 IRQ_TYPE_LEVEL_LOW>; -+ pinctrl-0 = <&pinctrl_ethphy1>; -+ pinctrl-names = "default"; -+ reg = <7>; -+ reset-assert-us = <1000>; -+ /* RESET_N signal rise time ~100ms */ -+ reset-deassert-us = <120000>; -+ reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; -+ status = "okay"; -+ }; -+ }; -+}; -+ -+&flexcan1 { -+ status = "okay"; -+}; -+ -+&pcie_phy { -+ clocks = <&pcieclk 1>; -+ clock-names = "ref"; -+ fsl,refclk-pad-mode = ; -+ status = "okay"; -+}; -+ -+&pcie { -+ fsl,max-link-speed = <3>; -+ reset-gpio = <&gpio1 6 GPIO_ACTIVE_LOW>; -+ status = "okay"; -+}; -+ -+&usb_dwc3_0 { -+ usb-role-switch; -+ -+ port { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ dwc3_0_hs_ep: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&usb_c_0_hs_ep>; -+ }; -+ -+ dwc3_0_ss_ep: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <&ptn5150_out_ep>; -+ }; -+ }; -+}; -+ -+&usb3_1 { -+ fsl,disable-port-power-control; -+ fsl,permanently-attached; -+}; -+ -+&usb_dwc3_1 { -+ /* This port has USB5734 Hub connected to it, PWR/OC pins are unused */ -+ /delete-property/ pinctrl-names; -+ /delete-property/ pinctrl-0; -+}; -+ -+&iomuxc { -+ /* -+ * GPIO_A,B,C,E are connected to buttons. -+ * GPIO_D,F,G,I are connected to LEDs. -+ * GPIO_H is connected to USB Hub RESET_N. -+ * GPIO_M is connected to CLKOUT2. -+ */ -+ pinctrl-0 = <&pinctrl_hog_base -+ &pinctrl_dhcom_h &pinctrl_dhcom_j &pinctrl_dhcom_k -+ &pinctrl_dhcom_l -+ &pinctrl_dhcom_int>; -+ -+ pinctrl_ptn5150: ptn5150grp { -+ fsl,pins = < -+ MX8MP_IOMUXC_SAI2_TXC__GPIO4_IO25 0x40000000 -+ >; -+ }; -+}; -diff --git a/arch/arm/dts/imx8mp-dhcom-som.dtsi b/arch/arm/dts/imx8mp-dhcom-som.dtsi -index 0f13ee3627..9fd8bce806 100644 ---- a/arch/arm/dts/imx8mp-dhcom-som.dtsi -+++ b/arch/arm/dts/imx8mp-dhcom-som.dtsi -@@ -83,7 +83,7 @@ - - &eqos { /* First ethernet */ - pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_eqos>; -+ pinctrl-0 = <&pinctrl_eqos_rgmii>; - phy-handle = <ðphy0g>; - phy-mode = "rgmii-id"; - status = "okay"; -@@ -94,14 +94,14 @@ - #size-cells = <0>; - - /* Up to one of these two PHYs may be populated. */ -- ethphy0f: ethernet-phy@1 { /* SMSC LAN8740Ai */ -+ ethphy0f: ethernet-phy@0 { /* SMSC LAN8740Ai */ - compatible = "ethernet-phy-id0007.c110", - "ethernet-phy-ieee802.3-c22"; - interrupt-parent = <&gpio3>; - interrupts = <19 IRQ_TYPE_LEVEL_LOW>; - pinctrl-0 = <&pinctrl_ethphy0>; - pinctrl-names = "default"; -- reg = <1>; -+ reg = <0>; - reset-assert-us = <1000>; - reset-deassert-us = <1000>; - reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; -@@ -129,9 +129,9 @@ - - &fec { /* Second ethernet */ - pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_fec>; -+ pinctrl-0 = <&pinctrl_fec_rmii>; - phy-handle = <ðphy1f>; -- phy-mode = "rgmii"; -+ phy-mode = "rmii"; - fsl,magic-packet; - status = "okay"; - -@@ -664,7 +664,7 @@ - >; - }; - -- pinctrl_eqos: dhcom-eqos-grp { /* RGMII */ -+ pinctrl_eqos_rgmii: dhcom-eqos-rgmii-grp { /* RGMII */ - fsl,pins = < - MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x3 - MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x3 -@@ -683,6 +683,22 @@ - >; - }; - -+ pinctrl_eqos_rmii: dhcom-eqos-rmii-grp { /* RMII */ -+ fsl,pins = < -+ MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x3 -+ MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x3 -+ MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x1f -+ MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x1f -+ MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x1f -+ MX8MP_IOMUXC_ENET_RXC__ENET_QOS_RX_ER 0x1f -+ MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x91 -+ MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x91 -+ MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x91 -+ /* Clock */ -+ MX8MP_IOMUXC_ENET_TD2__CCM_ENET_QOS_CLOCK_GENERATE_REF_CLK 0x4000001f -+ >; -+ }; -+ - pinctrl_enet_vio: dhcom-enet-vio-grp { - fsl,pins = < - MX8MP_IOMUXC_SD1_RESET_B__GPIO2_IO10 0x22 -@@ -707,7 +723,7 @@ - >; - }; - -- pinctrl_fec: dhcom-fec-grp { -+ pinctrl_fec_rgmii: dhcom-fec-rgmii-grp { /* RGMII */ - fsl,pins = < - MX8MP_IOMUXC_SAI1_MCLK__ENET1_TX_CLK 0x1f - MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x3 -@@ -728,6 +744,22 @@ - >; - }; - -+ pinctrl_fec_rmii: dhcom-fec-rmii-grp { /* RMII */ -+ fsl,pins = < -+ MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x3 -+ MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x3 -+ MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x91 -+ MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x91 -+ MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x91 -+ MX8MP_IOMUXC_SAI1_TXD6__ENET1_RX_ER 0x91 -+ MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x1f -+ MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x1f -+ MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x1f -+ /* Clock */ -+ MX8MP_IOMUXC_SAI1_MCLK__ENET1_TX_CLK 0x4000001f -+ >; -+ }; -+ - pinctrl_flexcan1: dhcom-flexcan1-grp { - fsl,pins = < - MX8MP_IOMUXC_SPDIF_RX__CAN1_RX 0x154 -diff --git a/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi b/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi -index ae838caebc..59d31eebc3 100644 ---- a/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi -+++ b/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi -@@ -21,106 +21,100 @@ - wdt-reboot { - compatible = "wdt-reboot"; - wdt = <&wdog1>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &buck4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &buck5 { -- u-boot,dm-spl; --}; -- --&eqos { -- /delete-property/ assigned-clocks; -- /delete-property/ assigned-clock-parents; -- /delete-property/ assigned-clock-rates; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c3_gpio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_pmic { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2_100mhz { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2_200mhz { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2_vmmc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3_100mhz { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3_100mhz { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pmic { -- u-boot,dm-spl; -+ bootph-pre-ram; - - regulators { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - ®_usdhc2_vmmc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - /* SDIO WiFi */ -@@ -129,13 +123,13 @@ - }; - - &usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wdog1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi -index f43eb6238d..6784ed2e7c 100644 ---- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi -+++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi -@@ -9,7 +9,7 @@ - wdt-reboot { - compatible = "wdt-reboot"; - wdt = <&wdog1>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - firmware { - optee { -@@ -24,117 +24,111 @@ - }; - - ®_usdhc2_vmmc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2_gpio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_wdog { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &crypto { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c6 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - sd-uhs-sdr104; - sd-uhs-ddr50; - }; - - &usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - }; - - &wdog1 { -- u-boot,dm-spl; --}; -- --&eqos { -- /delete-property/ assigned-clocks; -- /delete-property/ assigned-clock-parents; -- /delete-property/ assigned-clock-rates; -+ bootph-pre-ram; - }; - - ðphy0 { -diff --git a/arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2-u-boot.dtsi b/arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2-u-boot.dtsi -index 342c523b0c..d411cf79e8 100644 ---- a/arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2-u-boot.dtsi -+++ b/arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2-u-boot.dtsi -@@ -10,7 +10,7 @@ - wdt-reboot { - compatible = "wdt-reboot"; - wdt = <&wdog1>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - firmware { -@@ -26,114 +26,108 @@ - }; - - ®_usdhc2_vmmc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2_gpio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &crypto { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c6 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - sd-uhs-sdr104; - sd-uhs-ddr50; - no-1-8-v; - }; - - &usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - }; - - &wdog1 { -- u-boot,dm-spl; --}; -- --&eqos { -- /delete-property/ assigned-clocks; -- /delete-property/ assigned-clock-parents; -- /delete-property/ assigned-clock-rates; -+ bootph-pre-ram; - }; - - ðphy0 { -diff --git a/arch/arm/dts/imx8mp-msc-sm2s-u-boot.dtsi b/arch/arm/dts/imx8mp-msc-sm2s-u-boot.dtsi -index cf591adf5a..c398a743f7 100644 ---- a/arch/arm/dts/imx8mp-msc-sm2s-u-boot.dtsi -+++ b/arch/arm/dts/imx8mp-msc-sm2s-u-boot.dtsi -@@ -12,54 +12,54 @@ - wdt-reboot { - compatible = "wdt-reboot"; - wdt = <&wdog1>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - ®_usdhc2_vmmc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c6 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c6 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pmic { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi b/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi -index dbc48dfb48..1c7b250549 100644 ---- a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi -+++ b/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi -@@ -10,74 +10,74 @@ - wdt-reboot { - compatible = "wdt-reboot"; - wdt = <&wdog1>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - ®_usdhc2_vmmc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2_pins { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_wdog { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pmic { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wdog1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi b/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi -index 32d9fbc886..f3fb44046d 100644 ---- a/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi -+++ b/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi -@@ -10,7 +10,7 @@ - wdt-reboot { - compatible = "wdt-reboot"; - wdt = <&wdog1>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - firmware { -@@ -22,110 +22,110 @@ - }; - - &iomuxc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - ®_usdhc2_vmmc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2_gpio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wdog1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_wdog { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c1_gpio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_pmic { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a20000/pca9450@25} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@30800000/i2c@30a20000/pca9450@25/regulators} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - assigned-clocks = <&clk IMX8MP_CLK_USDHC1>; - assigned-clock-rates = <400000000>; - assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_400M>; - }; - - &usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - sd-uhs-sdr104; - sd-uhs-ddr50; - assigned-clocks = <&clk IMX8MP_CLK_USDHC2>; -@@ -134,7 +134,7 @@ - }; - - &usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - assigned-clocks = <&clk IMX8MP_CLK_USDHC3>; -diff --git a/arch/arm/dts/imx8mp-u-boot.dtsi b/arch/arm/dts/imx8mp-u-boot.dtsi -index 07538da621..18d1728e1d 100644 ---- a/arch/arm/dts/imx8mp-u-boot.dtsi -+++ b/arch/arm/dts/imx8mp-u-boot.dtsi -@@ -11,43 +11,43 @@ - }; - - &soc { -- u-boot,dm-pre-reloc; -- u-boot,dm-spl; -+ bootph-all; -+ bootph-pre-ram; - }; - - &clk { -- u-boot,dm-spl; -- u-boot,dm-pre-reloc; -+ bootph-pre-ram; -+ bootph-all; - /delete-property/ assigned-clocks; - /delete-property/ assigned-clock-parents; - /delete-property/ assigned-clock-rates; - }; - - &osc_32k { -- u-boot,dm-spl; -- u-boot,dm-pre-reloc; -+ bootph-pre-ram; -+ bootph-all; - }; - - &osc_24m { -- u-boot,dm-spl; -- u-boot,dm-pre-reloc; -+ bootph-pre-ram; -+ bootph-all; - }; - - &aips1 { -- u-boot,dm-spl; -- u-boot,dm-pre-reloc; -+ bootph-pre-ram; -+ bootph-all; - }; - - &aips2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &aips3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &iomuxc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &binman { -diff --git a/arch/arm/dts/imx8mp-venice-gw74xx-u-boot.dtsi b/arch/arm/dts/imx8mp-venice-gw74xx-u-boot.dtsi -index d872112452..c3fb040080 100644 ---- a/arch/arm/dts/imx8mp-venice-gw74xx-u-boot.dtsi -+++ b/arch/arm/dts/imx8mp-venice-gw74xx-u-boot.dtsi -@@ -15,17 +15,11 @@ - - wdt-reboot { - compatible = "wdt-reboot"; -- u-boot,dm-spl; -+ bootph-pre-ram; - wdt = <&wdog1>; - }; - }; - --&eqos { -- /delete-property/ assigned-clocks; -- /delete-property/ assigned-clock-parents; -- /delete-property/ assigned-clock-rates; --}; -- - ðphy0 { - reset-gpios = <&gpio4 30 GPIO_ACTIVE_LOW>; - reset-delay-us = <1000>; -@@ -39,7 +33,7 @@ - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - dio0_hog { - gpio-hog; -@@ -57,7 +51,7 @@ - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - pcie1_wdis_hog { - gpio-hog; -@@ -82,7 +76,7 @@ - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - m2_dis2_hog { - gpio-hog; -@@ -107,7 +101,7 @@ - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - m2_dis1_hog { - gpio-hog; -@@ -125,7 +119,7 @@ - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - rs485_half { - gpio-hog; -@@ -143,23 +137,23 @@ - }; - - &i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_wdog { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &switch { -@@ -227,7 +221,7 @@ - assigned-clocks = <&clk IMX8MP_CLK_USDHC2>; - sd-uhs-ddr50; - sd-uhs-sdr104; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc3 { -@@ -236,9 +230,9 @@ - assigned-clocks = <&clk IMX8MP_CLK_USDHC3>; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wdog1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mp-venice-u-boot.dtsi b/arch/arm/dts/imx8mp-venice-u-boot.dtsi -index f9068ebfbe..99d76393d3 100644 ---- a/arch/arm/dts/imx8mp-venice-u-boot.dtsi -+++ b/arch/arm/dts/imx8mp-venice-u-boot.dtsi -@@ -9,74 +9,74 @@ - wdt-reboot { - compatible = "wdt-reboot"; - wdt = <&wdog1>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c1_gpio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gsc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wdog1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_wdog { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi b/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi -index 8a4cdc717d..9c6c417f7e 100644 ---- a/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi -+++ b/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi -@@ -15,7 +15,7 @@ - - wdt-reboot { - compatible = "wdt-reboot"; -- u-boot,dm-spl; -+ bootph-pre-ram; - wdt = <&wdog1>; - }; - }; -@@ -27,8 +27,8 @@ - }; - - &clk { -- u-boot,dm-pre-reloc; -- u-boot,dm-spl; -+ bootph-all; -+ bootph-pre-ram; - /delete-property/ assigned-clocks; - /delete-property/ assigned-clock-parents; - /delete-property/ assigned-clock-rates; -@@ -36,21 +36,15 @@ - }; - - &crypto { -- u-boot,dm-spl; --}; -- --&eqos { -- /delete-property/ assigned-clocks; -- /delete-property/ assigned-clock-parents; -- /delete-property/ assigned-clock-rates; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - regulator-ethphy { - gpio-hog; -@@ -63,19 +57,19 @@ - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - eeprom_module: eeprom@50 { - compatible = "i2c-eeprom"; -@@ -85,11 +79,11 @@ - }; - - &i2c2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c4 { -@@ -109,56 +103,56 @@ - }; - - &pca9450 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2_pwr_en { -- u-boot,dm-spl; -+ bootph-pre-ram; - u-boot,off-on-delay-us = <20000>; - }; - - &pinctrl_uart3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2_cd { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_wdog { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - ®_usdhc2_vmmc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc1 { -@@ -171,7 +165,7 @@ - assigned-clocks = <&clk IMX8MP_CLK_USDHC2>; - sd-uhs-ddr50; - sd-uhs-sdr104; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc3 { -@@ -180,9 +174,9 @@ - assigned-clocks = <&clk IMX8MP_CLK_USDHC3>; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wdog1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mq-cm-u-boot.dtsi b/arch/arm/dts/imx8mq-cm-u-boot.dtsi -index 354f911a8a..e23998f5ab 100644 ---- a/arch/arm/dts/imx8mq-cm-u-boot.dtsi -+++ b/arch/arm/dts/imx8mq-cm-u-boot.dtsi -@@ -10,11 +10,11 @@ - }; - - &pinctrl_uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &binman { -diff --git a/arch/arm/dts/imx8mq-evk-u-boot.dtsi b/arch/arm/dts/imx8mq-evk-u-boot.dtsi -index 67da69a2eb..d987f68b6b 100644 ---- a/arch/arm/dts/imx8mq-evk-u-boot.dtsi -+++ b/arch/arm/dts/imx8mq-evk-u-boot.dtsi -@@ -3,7 +3,7 @@ - #include "imx8mq-u-boot.dtsi" - - &pinctrl_uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc1 { -@@ -16,5 +16,5 @@ - }; - - &uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mq-librem5-r4-u-boot.dtsi b/arch/arm/dts/imx8mq-librem5-r4-u-boot.dtsi -index 9d0a54a32f..e3341a46d6 100644 ---- a/arch/arm/dts/imx8mq-librem5-r4-u-boot.dtsi -+++ b/arch/arm/dts/imx8mq-librem5-r4-u-boot.dtsi -@@ -3,11 +3,11 @@ - #include "imx8mq-u-boot.dtsi" - - &pinctrl_uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart1 { /* console */ -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &binman { -diff --git a/arch/arm/dts/imx8mq-phanbell-u-boot.dtsi b/arch/arm/dts/imx8mq-phanbell-u-boot.dtsi -index 8d6f305829..05f809c035 100644 ---- a/arch/arm/dts/imx8mq-phanbell-u-boot.dtsi -+++ b/arch/arm/dts/imx8mq-phanbell-u-boot.dtsi -@@ -7,9 +7,9 @@ - }; - - &uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mq-pico-pi-u-boot.dtsi b/arch/arm/dts/imx8mq-pico-pi-u-boot.dtsi -index 7efd82214d..eee332073c 100644 ---- a/arch/arm/dts/imx8mq-pico-pi-u-boot.dtsi -+++ b/arch/arm/dts/imx8mq-pico-pi-u-boot.dtsi -@@ -3,9 +3,9 @@ - #include "imx8mq-u-boot.dtsi" - - &pinctrl_uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8mq-u-boot.dtsi b/arch/arm/dts/imx8mq-u-boot.dtsi -index 2bc9f413da..b3fef862b4 100644 ---- a/arch/arm/dts/imx8mq-u-boot.dtsi -+++ b/arch/arm/dts/imx8mq-u-boot.dtsi -@@ -11,27 +11,27 @@ - }; - - &soc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &aips1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &aips2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &aips3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &aips4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &iomuxc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &binman { -diff --git a/arch/arm/dts/imx8qxp-capricorn-u-boot.dtsi b/arch/arm/dts/imx8qxp-capricorn-u-boot.dtsi -index f3e6421b2b..cba56188f8 100644 ---- a/arch/arm/dts/imx8qxp-capricorn-u-boot.dtsi -+++ b/arch/arm/dts/imx8qxp-capricorn-u-boot.dtsi -@@ -7,129 +7,129 @@ - - &{/imx8qx-pm} { - -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mu { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &clk { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &iomuxc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio6 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_lsio_gpio7 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_dma { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_dma_lpuart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_dma_lpuart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_conn { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_conn_sdch0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_conn_sdch1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pd_conn_sdch2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio6 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio7 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &lpuart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &lpuart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx8ulp-evk-u-boot.dtsi b/arch/arm/dts/imx8ulp-evk-u-boot.dtsi -index 7acdb4a98a..608bde3a2a 100644 ---- a/arch/arm/dts/imx8ulp-evk-u-boot.dtsi -+++ b/arch/arm/dts/imx8ulp-evk-u-boot.dtsi -@@ -8,39 +8,39 @@ - compatible = "fsl,imx8ulp-mu"; - reg = <0 0x27020000 0 0x10000>; - status = "okay"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &soc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &per_bridge3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &per_bridge4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &iomuxc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - fsl,mux_mask = <0xf00>; - }; - - &pinctrl_lpuart5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &lpuart5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi -index 6f02b38989..89e64344c6 100644 ---- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi -+++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi -@@ -7,7 +7,7 @@ - wdt-reboot { - compatible = "wdt-reboot"; - wdt = <&wdog3>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - aliases { -@@ -38,91 +38,91 @@ - }; - - &{/soc@0} { -- u-boot,dm-pre-reloc; -- u-boot,dm-spl; -+ bootph-all; -+ bootph-pre-ram; - }; - - &aips1 { -- u-boot,dm-spl; -- u-boot,dm-pre-reloc; -+ bootph-pre-ram; -+ bootph-all; - }; - - &aips2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &aips3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &iomuxc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - ®_usdhc2_vmmc { - u-boot,off-on-delay-us = <20000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_reg_usdhc2_vmmc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2_gpio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &lpuart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - fsl,signal-voltage-switch-extra-delay-ms = <8>; - }; - - &lpi2c2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@44000000/i2c@44350000/pmic@25} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &{/soc@0/bus@44000000/i2c@44350000/pmic@25/regulators} { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_lpi2c2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &fec { -@@ -152,6 +152,6 @@ - }; - - &s4muap { -- u-boot,dm-spl; -+ bootph-pre-ram; - status = "okay"; - }; -diff --git a/arch/arm/dts/imxrt1020-evk-u-boot.dtsi b/arch/arm/dts/imxrt1020-evk-u-boot.dtsi -index 7cab486f5f..46928c07e9 100644 ---- a/arch/arm/dts/imxrt1020-evk-u-boot.dtsi -+++ b/arch/arm/dts/imxrt1020-evk-u-boot.dtsi -@@ -6,82 +6,82 @@ - - / { - chosen { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - clocks { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - soc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &osc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &anatop { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &clks { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpt1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &lpuart1 { /* console */ -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &semc { -- u-boot,dm-spl; -+ bootph-pre-ram; - - bank1: bank@0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &iomuxc { -- u-boot,dm-spl; -+ bootph-pre-ram; - - imxrt1020-evk { -- u-boot,dm-spl; -+ bootph-pre-ram; - - pinctrl_semc: semcgrp { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - pinctrl_usdhc0: usdhc0grp { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - }; - - &pinctrl_lpuart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/imxrt1050-evk-u-boot.dtsi b/arch/arm/dts/imxrt1050-evk-u-boot.dtsi -index e217dfd9eb..a9095e736b 100644 ---- a/arch/arm/dts/imxrt1050-evk-u-boot.dtsi -+++ b/arch/arm/dts/imxrt1050-evk-u-boot.dtsi -@@ -14,16 +14,16 @@ - }; - - chosen { -- u-boot,dm-spl; -+ bootph-pre-ram; - tick-timer = &gpt; - }; - - clocks { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - soc { -- u-boot,dm-spl; -+ bootph-pre-ram; - - usbphy1: usbphy@400d9000 { - compatible = "fsl,imxrt-usbphy"; -@@ -75,7 +75,7 @@ - }; - - &semc { -- u-boot,dm-spl; -+ bootph-pre-ram; - /* - * Memory configuration from sdram datasheet IS42S16160J-6BLI - */ -@@ -109,62 +109,62 @@ - bank1: bank@0 { - fsl,base-address = <0x80000000>; - fsl,memory-size = ; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &osc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &anatop { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &clks { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio1 { - compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { - compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { - compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { - compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { - compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpt { - clocks = <&osc>; - compatible = "fsl,imxrt-gpt"; - status = "okay"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &lpuart1 { /* console */ - compatible = "fsl,imxrt-lpuart"; - clock-names = "per"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &iomuxc { -- u-boot,dm-spl; -+ bootph-pre-ram; - compatible = "fsl,imxrt-iomuxc"; - pinctrl-0 = <&pinctrl_lpuart1>; - -@@ -251,7 +251,7 @@ - MXRT1050_IOMUXC_GPIO_EMC_39_SEMC_DQS - (IMX_PAD_SION | 0xf1) /* SEMC_DQS */ - >; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - pinctrl_lcdif: lcdifgrp { -@@ -281,17 +281,17 @@ - }; - - pinctrl_lpuart1: lpuart1grp { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - pinctrl_usdhc0: usdhc0grp { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &usdhc1 { - compatible = "fsl,imxrt-usdhc"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &lcdif { -diff --git a/arch/arm/dts/imxrt1170-evk-u-boot.dtsi b/arch/arm/dts/imxrt1170-evk-u-boot.dtsi -index 88ff986ba0..f923a14301 100644 ---- a/arch/arm/dts/imxrt1170-evk-u-boot.dtsi -+++ b/arch/arm/dts/imxrt1170-evk-u-boot.dtsi -@@ -7,88 +7,88 @@ - - / { - chosen { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - clocks { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - soc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &osc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &rcosc16M { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &osc32k { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &clks { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpt1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &lpuart1 { /* console */ -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &semc { -- u-boot,dm-spl; -+ bootph-pre-ram; - - bank1: bank@0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &iomuxc { -- u-boot,dm-spl; -+ bootph-pre-ram; - - imxrt1170-evk { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl_lpuart1: lpuart1grp { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - pinctrl_usdhc0: usdhc0grp { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - pinctrl_semc: semcgrp { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - }; - - &usdhc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/k3-am625-r5-sk.dts b/arch/arm/dts/k3-am625-r5-sk.dts -index d39b334ed0..dad46704a2 100644 ---- a/arch/arm/dts/k3-am625-r5-sk.dts -+++ b/arch/arm/dts/k3-am625-r5-sk.dts -@@ -28,7 +28,7 @@ - /* 2G RAM */ - reg = <0x00000000 0x80000000 0x00000000 0x80000000>; - -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - reserved-memory { -@@ -56,7 +56,7 @@ - ti,sci = <&dmsc>; - ti,sci-proc-id = <32>; - ti,sci-host-id = <10>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - dm_tifs: dm-tifs { -@@ -66,7 +66,7 @@ - mbox-names = "rx", "tx"; - mboxes= <&secure_proxy_main 22>, - <&secure_proxy_main 23>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -@@ -84,13 +84,13 @@ - compatible = "ti,j721e-esm"; - reg = <0x0 0x4100000 0x0 0x1000>; - ti,esm-pins = <0>, <1>, <2>, <85>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &cbass_main { - sa3_secproxy: secproxy@44880000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - compatible = "ti,am654-secure-proxy"; - #mbox-cells = <1>; - reg-names = "rt", "scfg", "target_data"; -@@ -103,19 +103,19 @@ - compatible = "ti,am654-system-controller"; - mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&sa3_secproxy 0>; - mbox-names = "tx", "rx", "boot_notify"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - main_esm: esm@420000 { - compatible = "ti,j721e-esm"; - reg = <0x0 0x420000 0x0 0x1000>; - ti,esm-pins = <160>, <161>, <162>, <163>, <177>, <178>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &mcu_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - wkup_uart0_pins_default: wkup-uart0-pins-default { - pinctrl-single,pins = < - AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C6) WKUP_UART0_CTSn */ -@@ -123,12 +123,12 @@ - AM62X_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (B4) WKUP_UART0_RXD */ - AM62X_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (C5) WKUP_UART0_TXD */ - >; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &main_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - main_uart1_pins_default: main-uart1-pins-default { - pinctrl-single,pins = < - AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19) MCASP0_AXR3.UART1_CTSn */ -@@ -136,7 +136,7 @@ - AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19) MCASP0_AFSR.UART1_RXD */ - AM62X_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (A20) MCASP0_ACLKR.UART1_TXD */ - >; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -@@ -145,7 +145,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&wkup_uart0_pins_default>; - status = "okay"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - /* Main UART1 is used for TIFS firmware logs */ -@@ -153,7 +153,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&main_uart1_pins_default>; - status = "okay"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &ospi0 { -diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi b/arch/arm/dts/k3-am625-sk-u-boot.dtsi -index f275e3b46c..249155733a 100644 ---- a/arch/arm/dts/k3-am625-sk-u-boot.dtsi -+++ b/arch/arm/dts/k3-am625-sk-u-boot.dtsi -@@ -15,113 +15,113 @@ - }; - - memory@80000000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &cbass_main{ -- u-boot,dm-spl; -+ bootph-pre-ram; - - timer1: timer@2400000 { - compatible = "ti,omap5430-timer"; - reg = <0x00 0x2400000 0x00 0x80>; - ti,timer-alwon; - clock-frequency = <25000000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &dmss { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &secure_proxy_main { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &dmsc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_pds { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_clks { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_reset { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wkup_conf { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &chipid { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_uart0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &cbass_mcu { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &cbass_wakeup { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mcu_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wkup_uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdhci1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_mmc1_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &fss { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &ospi0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &ospi0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - flash@0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - partitions { -- u-boot,dm-spl; -+ bootph-pre-ram; - - partition@3fc0000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - }; -@@ -132,17 +132,17 @@ - <0x0 0x43000200 0x0 0x8>; - reg-names = "cpsw_nuss", "mac_efuse"; - /delete-property/ ranges; -- u-boot,dm-spl; -+ bootph-pre-ram; - - cpsw-phy-sel@04044 { - compatible = "ti,am64-phy-gmii-sel"; - reg = <0x0 0x00104044 0x0 0x8>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &cpsw_port1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &cpsw_port2 { -diff --git a/arch/arm/dts/k3-am62a-ddr.dtsi b/arch/arm/dts/k3-am62a-ddr.dtsi -index 15a0799550..8629ea45b8 100644 ---- a/arch/arm/dts/k3-am62a-ddr.dtsi -+++ b/arch/arm/dts/k3-am62a-ddr.dtsi -@@ -17,7 +17,7 @@ - <&k3_pds 55 TI_SCI_PD_SHARED>; - clocks = <&k3_clks 170 1>, <&k3_clks 16 4>; - -- u-boot,dm-spl; -+ bootph-pre-ram; - - ti,ctl-data = < - DDRSS_CTL_0_DATA -diff --git a/arch/arm/dts/k3-am62a7-r5-sk.dts b/arch/arm/dts/k3-am62a7-r5-sk.dts -index 58b7c8ad05..c953a82c7a 100644 ---- a/arch/arm/dts/k3-am62a7-r5-sk.dts -+++ b/arch/arm/dts/k3-am62a7-r5-sk.dts -@@ -25,8 +25,10 @@ - - memory@80000000 { - device_type = "memory"; -- reg = <0x00000000 0x80000000 0x00000000 0x80000000>; /* 2G RAM */ -- u-boot,dm-spl; -+ /* 4G RAM */ -+ reg = <0x00000000 0x80000000 0x00000000 0x80000000>, -+ <0x00000008 0x80000000 0x00000000 0x80000000>; -+ bootph-pre-ram; - }; - - reserved-memory { -@@ -54,7 +56,7 @@ - ti,sci = <&dmsc>; - ti,sci-proc-id = <32>; - ti,sci-host-id = <10>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - dm_tifs: dm-tifs { -@@ -64,7 +66,7 @@ - mbox-names = "rx", "tx"; - mboxes= <&secure_proxy_main 22>, - <&secure_proxy_main 23>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -@@ -85,7 +87,7 @@ - <0x0 0x44860000 0x0 0x20000>, - <0x0 0x43600000 0x0 0x10000>; - reg-names = "rt", "scfg", "target_data"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - sysctrler: sysctrler { -@@ -94,13 +96,13 @@ - <&secure_proxy_main 0>, - <&sa3_secproxy 0>; - mbox-names = "tx", "rx", "boot_notify"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &mcu_pmx0 { - status = "okay"; -- u-boot,dm-spl; -+ bootph-pre-ram; - - wkup_uart0_pins_default: wkup-uart0-pins-default { - pinctrl-single,pins = < -@@ -109,12 +111,12 @@ - AM62X_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (B4) WKUP_UART0_RXD */ - AM62X_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (C5) WKUP_UART0_TXD */ - >; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &main_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - main_uart1_pins_default: main-uart1-pins-default { - pinctrl-single,pins = < - AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19) MCASP0_AXR3.UART1_CTSn */ -@@ -122,7 +124,7 @@ - AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19) MCASP0_AFSR.UART1_RXD */ - AM62X_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (A20) MCASP0_ACLKR.UART1_TXD */ - >; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -@@ -131,7 +133,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&wkup_uart0_pins_default>; - status = "okay"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - /* Main UART1 is used for TIFS firmware logs */ -@@ -139,5 +141,5 @@ - pinctrl-names = "default"; - pinctrl-0 = <&main_uart1_pins_default>; - status = "okay"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi b/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi -index 7fc749ed70..cf938c43b8 100644 ---- a/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi -+++ b/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi -@@ -11,130 +11,130 @@ - }; - - memory@80000000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &cbass_main{ -- u-boot,dm-spl; -+ bootph-pre-ram; - - timer1: timer@2400000 { - compatible = "ti,omap5430-timer"; - reg = <0x00 0x2400000 0x00 0x80>; - ti,timer-alwon; - clock-frequency = <25000000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &dmss { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &secure_proxy_main { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &dmsc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_pds { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_clks { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_reset { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wkup_conf { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &chipid { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_uart0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &cbass_mcu { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &cbass_wakeup { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mcu_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wkup_uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_gpio0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_i2c0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_i2c0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_i2c1_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &exp1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdhci1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_mmc1_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_reset { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &dmsc { -- u-boot,dm-spl; -+ bootph-pre-ram; - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &vdd_mmc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/k3-am62a7-sk.dts b/arch/arm/dts/k3-am62a7-sk.dts -index 576dbce80a..b08a083d72 100644 ---- a/arch/arm/dts/k3-am62a7-sk.dts -+++ b/arch/arm/dts/k3-am62a7-sk.dts -@@ -26,8 +26,9 @@ - - memory@80000000 { - device_type = "memory"; -- /* 2G RAM */ -- reg = <0x00000000 0x80000000 0x00000000 0x80000000>; -+ /* 4G RAM */ -+ reg = <0x00000000 0x80000000 0x00000000 0x80000000>, -+ <0x00000008 0x80000000 0x00000000 0x80000000>; - }; - - reserved-memory { -diff --git a/arch/arm/dts/k3-am64-ddr.dtsi b/arch/arm/dts/k3-am64-ddr.dtsi -index d651093521..bd95a7866d 100644 ---- a/arch/arm/dts/k3-am64-ddr.dtsi -+++ b/arch/arm/dts/k3-am64-ddr.dtsi -@@ -17,7 +17,7 @@ - ti,ddr-freq2 = ; - ti,ddr-fhs-cnt = ; - -- u-boot,dm-spl; -+ bootph-pre-ram; - - ti,ctl-data = < - DDRSS_CTL_0_DATA -diff --git a/arch/arm/dts/k3-am642-evm-u-boot.dtsi b/arch/arm/dts/k3-am642-evm-u-boot.dtsi -index 9b6c7e85cb..64857b0909 100644 ---- a/arch/arm/dts/k3-am642-evm-u-boot.dtsi -+++ b/arch/arm/dts/k3-am642-evm-u-boot.dtsi -@@ -10,32 +10,32 @@ - }; - - memory@80000000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &cbass_main{ -- u-boot,dm-spl; -+ bootph-pre-ram; - timer1: timer@2400000 { - compatible = "ti,omap5430-timer"; - reg = <0x0 0x2400000 0x0 0x80>; - ti,timer-alwon; - clock-frequency = <200000000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &main_conf { -- u-boot,dm-spl; -+ bootph-pre-ram; - chipid@14 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &main_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - main_i2c0_pins_default: main-i2c0-pins-default { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-single,pins = < - AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */ - AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */ -@@ -45,67 +45,67 @@ - - &main_i2c0 { - status = "okay"; -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-names = "default"; - pinctrl-0 = <&main_i2c0_pins_default>; - clock-frequency = <400000>; - }; - - &main_uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb0 { - dr_mode="peripheral"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbss0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_mmc1_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_usb0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &dmss { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &secure_proxy_main { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &dmsc { -- u-boot,dm-spl; -+ bootph-pre-ram; - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &k3_pds { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_clks { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_reset { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdhci0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdhci1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &cpsw3g { -diff --git a/arch/arm/dts/k3-am642-r5-evm.dts b/arch/arm/dts/k3-am642-r5-evm.dts -index 7493362ac6..ca5ce4a35a 100644 ---- a/arch/arm/dts/k3-am642-r5-evm.dts -+++ b/arch/arm/dts/k3-am642-r5-evm.dts -@@ -25,7 +25,7 @@ - /* 2G RAM */ - reg = <0x00000000 0x80000000 0x00000000 0x80000000>; - -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - a53_0: a53@0 { -@@ -41,7 +41,7 @@ - ti,sci = <&dmsc>; - ti,sci-proc-id = <32>; - ti,sci-host-id = <10>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - reserved-memory { -@@ -60,7 +60,7 @@ - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <200000000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - vtt_supply: vtt-supply { -@@ -70,7 +70,7 @@ - regulator-max-microvolt = <3300000>; - gpios = <&main_gpio0 12 GPIO_ACTIVE_HIGH>; - states = <0 0x0 3300000 0x1>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -@@ -79,7 +79,7 @@ - compatible = "ti,am654-system-controller"; - mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>; - mbox-names = "tx", "rx"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -@@ -88,24 +88,24 @@ - compatible = "ti,j721e-esm"; - reg = <0x0 0x420000 0x0 0x1000>; - ti,esm-pins = <160>, <161>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &cbass_mcu { -- u-boot,dm-spl; -+ bootph-pre-ram; - mcu_esm: esm@4100000 { - compatible = "ti,j721e-esm"; - reg = <0x0 0x4100000 0x0 0x1000>; - ti,esm-pins = <0>, <1>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &main_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - main_uart0_pins_default: main-uart0-pins-default { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-single,pins = < - AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */ - AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */ -@@ -115,7 +115,7 @@ - }; - - main_uart1_pins_default: main-uart1-pins-default { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-single,pins = < - AM64X_IOPAD(0x0248, PIN_INPUT, 0) /* (D16) UART1_CTSn */ - AM64X_IOPAD(0x024c, PIN_OUTPUT, 0) /* (E16) UART1_RTSn */ -@@ -125,7 +125,7 @@ - }; - - main_mmc0_pins_default: main-mmc0-pins-default { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-single,pins = < - AM64X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */ - AM64X_IOPAD(0x01aC, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */ -@@ -142,7 +142,7 @@ - }; - - main_mmc1_pins_default: main-mmc1-pins-default { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-single,pins = < - AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */ - AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /* (L20) MMC1_CLK */ -@@ -156,7 +156,7 @@ - }; - - ddr_vtt_pins_default: ddr-vtt-pins-default { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-single,pins = < - AM64X_IOPAD(0x0030, PIN_OUTPUT_PULLUP, 7) /* (L18) OSPI0_CSN1.GPIO0_12 */ - >; -@@ -229,7 +229,7 @@ - }; - - &main_uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-names = "default"; - pinctrl-0 = <&main_uart1_pins_default>; - }; -@@ -259,7 +259,7 @@ - }; - - &main_gpio0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - /delete-property/ power-domains; - }; - -diff --git a/arch/arm/dts/k3-am642-r5-sk.dts b/arch/arm/dts/k3-am642-r5-sk.dts -index 97f44e220a..9ff4dd3dd3 100644 ---- a/arch/arm/dts/k3-am642-r5-sk.dts -+++ b/arch/arm/dts/k3-am642-r5-sk.dts -@@ -27,7 +27,7 @@ - device_type = "memory"; - /* 2G RAM */ - reg = <0x00000000 0x80000000 0x00000000 0x80000000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - a53_0: a53@0 { -@@ -43,7 +43,7 @@ - ti,sci = <&dmsc>; - ti,sci-proc-id = <32>; - ti,sci-host-id = <10>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - reserved-memory { -@@ -62,7 +62,7 @@ - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <200000000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -@@ -71,7 +71,7 @@ - compatible = "ti,am654-system-controller"; - mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>; - mbox-names = "tx", "rx"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -@@ -80,24 +80,24 @@ - compatible = "ti,j721e-esm"; - reg = <0x0 0x420000 0x0 0x1000>; - ti,esm-pins = <160>, <161>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &cbass_mcu { -- u-boot,dm-spl; -+ bootph-pre-ram; - mcu_esm: esm@4100000 { - compatible = "ti,j721e-esm"; - reg = <0x0 0x4100000 0x0 0x1000>; - ti,esm-pins = <0>, <1>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &main_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - main_uart0_pins_default: main-uart0-pins-default { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-single,pins = < - AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */ - AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */ -@@ -107,7 +107,7 @@ - }; - - main_uart1_pins_default: main-uart1-pins-default { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-single,pins = < - AM64X_IOPAD(0x0248, PIN_INPUT, 0) /* (D16) UART1_CTSn */ - AM64X_IOPAD(0x024c, PIN_OUTPUT, 0) /* (E16) UART1_RTSn */ -@@ -117,7 +117,7 @@ - }; - - main_mmc1_pins_default: main-mmc1-pins-default { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-single,pins = < - AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */ - AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /* (L20) MMC1_CLK */ -@@ -131,7 +131,7 @@ - }; - - main_usb0_pins_default: main-usb0-pins-default { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-single,pins = < - AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */ - >; -@@ -198,7 +198,7 @@ - }; - - &main_uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-names = "default"; - pinctrl-0 = <&main_uart1_pins_default>; - }; -diff --git a/arch/arm/dts/k3-am642-sk-u-boot.dtsi b/arch/arm/dts/k3-am642-sk-u-boot.dtsi -index dda2c5d18a..69dbe943bd 100644 ---- a/arch/arm/dts/k3-am642-sk-u-boot.dtsi -+++ b/arch/arm/dts/k3-am642-sk-u-boot.dtsi -@@ -14,32 +14,32 @@ - }; - - memory@80000000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &cbass_main{ -- u-boot,dm-spl; -+ bootph-pre-ram; - timer1: timer@2400000 { - compatible = "ti,omap5430-timer"; - reg = <0x0 0x2400000 0x0 0x80>; - ti,timer-alwon; - clock-frequency = <200000000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &main_conf { -- u-boot,dm-spl; -+ bootph-pre-ram; - chipid@14 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &main_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - main_i2c0_pins_default: main-i2c0-pins-default { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-single,pins = < - AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */ - AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */ -@@ -48,7 +48,7 @@ - }; - - &main_i2c0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-names = "default"; - pinctrl-0 = <&main_i2c0_pins_default>; - clock-frequency = <400000>; -@@ -116,48 +116,48 @@ - }; - - &main_uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &dmss { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &secure_proxy_main { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &dmsc { -- u-boot,dm-spl; -+ bootph-pre-ram; - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &k3_pds { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_clks { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_reset { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdhci0 { - status = "disabled"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdhci1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_mmc1_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &cpsw3g { -@@ -165,49 +165,49 @@ - <0x0 0x43000200 0x0 0x8>; - reg-names = "cpsw_nuss", "mac_efuse"; - /delete-property/ ranges; -- u-boot,dm-spl; -+ bootph-pre-ram; - - cpsw-phy-sel@04044 { - compatible = "ti,am64-phy-gmii-sel"; - reg = <0x0 0x43004044 0x0 0x8>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - ethernet-ports { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &cpsw_port2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_bcdma { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_pktdma { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &rgmii1_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &rgmii2_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mdio1_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &cpsw3g_phy1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_usb0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &serdes_ln_ctrl { -@@ -215,26 +215,26 @@ - }; - - &usbss0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb0 { - dr_mode = "host"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &serdes_wiz0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &serdes0_usb_link { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &serdes0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &serdes_refclk { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi b/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi -index 27058370cc..03ccc54329 100644 ---- a/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi -+++ b/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi -@@ -1,6 +1,6 @@ - // SPDX-License-Identifier: GPL-2.0 - /* -- * Copyright (c) Siemens AG, 2020-2021 -+ * Copyright (c) Siemens AG, 2020-2022 - * - * Authors: - * Jan Kiszka -@@ -14,21 +14,27 @@ - filename = "flash.bin"; - pad-byte = <0xff>; - size = <0x8c0000>; -+ allow-repack; - - blob-ext@0x000000 { - offset = <0x000000>; -- filename = "tiboot3.bin"; -+#ifdef CONFIG_TARGET_IOT2050_A53_PG1 -+ filename = "seboot_pg1.bin"; -+#else -+ filename = "seboot_pg2.bin"; -+#endif - missing-msg = "iot2050-seboot"; - }; - -- blob@0x080000 { -- offset = <0x080000>; -+ blob@0x180000 { -+ offset = <0x180000>; - filename = "tispl.bin"; - }; - -- fit@0x280000 { -+ fit@0x380000 { - description = "U-Boot for IOT2050"; -- offset = <0x280000>; -+ fit,fdt-list = "of-list"; -+ offset = <0x380000>; - images { - u-boot { - description = "U-Boot"; -@@ -40,47 +46,50 @@ - entry = <0x80800000>; - u-boot-nodtb { - }; -- }; -- -- fdt-iot2050-basic { -- description = "k3-am6528-iot2050-basic.dtb"; -- type = "flat_dt"; -- arch = "arm64"; -- compression = "none"; -- blob { -- filename = "arch/arm/dts/k3-am6528-iot2050-basic.dtb"; -+ hash { -+ algo = "sha256"; - }; - }; - -- fdt-iot2050-basic-pg2 { -- description = "k3-am6528-iot2050-basic-pg2.dtb"; -+ @fdt-SEQ { -+ description = "fdt-NAME"; - type = "flat_dt"; - arch = "arm64"; - compression = "none"; -- blob { -- filename = "arch/arm/dts/k3-am6528-iot2050-basic-pg2.dtb"; -+ hash { -+ algo = "sha256"; - }; - }; - -- fdt-iot2050-advanced { -- description = "k3-am6548-iot2050-advanced.dtb"; -- type = "flat_dt"; -+#ifdef CONFIG_TARGET_IOT2050_A53_PG2 -+ bkey-usb3-overlay { -+ description = "M.2-bkey-usb3-overlay"; -+ type = "blob"; -+ load = <0x82100000>; - arch = "arm64"; - compression = "none"; -- blob { -- filename = "arch/arm/dts/k3-am6548-iot2050-advanced.dtb"; -+ blob-ext { -+ filename = "k3-am6548-iot2050-advanced-m2-bkey-usb3-overlay.dtbo"; -+ }; -+ hash { -+ algo = "sha256"; - }; - }; - -- fdt-iot2050-advanced-pg2 { -- description = "k3-am6548-iot2050-advanced-pg2.dtb"; -- type = "flat_dt"; -+ bkey-ekey-pcie-overlay { -+ description = "M.2-bkey-ekey-pcie-overlay"; -+ type = "blob"; -+ load = <0x82110000>; - arch = "arm64"; - compression = "none"; -- blob { -- filename = "arch/arm/dts/k3-am6548-iot2050-advanced-pg2.dtb"; -+ blob-ext { -+ filename = "k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dtbo"; -+ }; -+ hash { -+ algo = "sha256"; - }; - }; -+#endif - - #ifdef CONFIG_WDT_K3_RTI_FW_FILE - k3-rti-wdt-firmware { -@@ -92,51 +101,38 @@ - filename = CONFIG_WDT_K3_RTI_FW_FILE; - missing-msg = "k3-rti-wdt-firmware"; - }; -+ hash { -+ algo = "sha256"; -+ }; - }; - #endif - }; - - configurations { -- default = "conf-iot2050-basic"; -- -- conf-iot2050-basic { -- description = "iot2050-basic"; -- firmware = "u-boot"; -- fdt = "fdt-iot2050-basic"; --#ifdef CONFIG_WDT_K3_RTI_FW_FILE -- loadables = "k3-rti-wdt-firmware"; --#endif -- }; -- -- conf-iot2050-basic-pg2 { -- description = "iot2050-basic-pg2"; -+ default = "@config-DEFAULT-SEQ"; -+ @config-SEQ { -+ description = "NAME"; - firmware = "u-boot"; -- fdt = "fdt-iot2050-basic-pg2"; --#ifdef CONFIG_WDT_K3_RTI_FW_FILE -- loadables = "k3-rti-wdt-firmware"; -+ fdt = "fdt-SEQ"; -+ loadables = -+#ifdef CONFIG_TARGET_IOT2050_A53_PG2 -+ "bkey-usb3-overlay", -+ "bkey-ekey-pcie-overlay", - #endif -- }; -- -- conf-iot2050-advanced { -- description = "iot2050-advanced"; -- firmware = "u-boot"; -- fdt = "fdt-iot2050-advanced"; --#ifdef CONFIG_WDT_K3_RTI_FW_FILE -- loadables = "k3-rti-wdt-firmware"; --#endif -- }; -- -- conf-iot2050-advanced-pg2 { -- description = "iot2050-advanced-pg2"; -- firmware = "u-boot"; -- fdt = "fdt-iot2050-advanced-pg2"; - #ifdef CONFIG_WDT_K3_RTI_FW_FILE -- loadables = "k3-rti-wdt-firmware"; -+ "k3-rti-wdt-firmware", - #endif -+ <>; -+ signature { -+ sign-images = "firmware", "fdt", "loadables"; -+ }; - }; - }; - }; - -+ fdtmap { -+ }; -+ - /* primary env */ - fill@0x680000 { - offset = <0x680000>; -@@ -150,29 +146,20 @@ - fill-byte = [00]; - }; - -- /* PG1 sysfw, basic variant */ -+ /* OTP update command block */ -+#if CONFIG_IOT2050_EMBED_OTPCMD - blob-ext@0x6c0000 { - offset = <0x6c0000>; -- filename = "sysfw.itb"; -- missing-msg = "iot2050-sysfw"; -+ size = <0x010000>; -+ filename = "otpcmd.bin"; -+ missing-msg = "iot2050-otpcmd"; - }; -- /* PG1 sysfw, advanced variant */ -- blob-ext@0x740000 { -- offset = <0x740000>; -- filename = "sysfw.itb_HS"; -- missing-msg = "iot2050-sysfw"; -- }; -- /* PG2 sysfw, basic variant */ -- blob-ext@0x7c0000 { -- offset = <0x7c0000>; -- filename = "sysfw_sr2.itb"; -- missing-msg = "iot2050-sysfw"; -- }; -- /* PG2 sysfw, advanced variant */ -- blob-ext@0x840000 { -- offset = <0x840000>; -- filename = "sysfw_sr2.itb_HS"; -- missing-msg = "iot2050-sysfw"; -+#else -+ fill@0x6c0000 { -+ offset = <0x6c0000>; -+ size = <0x010000>; -+ fill-byte = [ff]; - }; -+#endif - }; - }; -diff --git a/arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi b/arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi -index d80c5501d2..082a3c89d0 100644 ---- a/arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi -+++ b/arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi -@@ -15,18 +15,18 @@ - }; - - leds { -- u-boot,dm-spl; -+ bootph-pre-ram; - status-led-red { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - status-led-green { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - }; - - &cbass_mcu { -- u-boot,dm-spl; -+ bootph-pre-ram; - - mcu_navss: bus@28380000 { - ringacc@2b800000 { -@@ -53,70 +53,70 @@ - }; - - &cbass_wakeup { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &cbass_main { -- u-boot,dm-spl; -+ bootph-pre-ram; - main_navss: bus@30800000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &wkup_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - mcu-fss0-ospi0-pins-default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &main_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - main-uart1-pins-default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &main_uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - current-speed = <115200>; - }; - - &wkup_gpio0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &ospi0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - flash@0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &secure_proxy_main { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &dmsc { -- u-boot,dm-spl; -+ bootph-pre-ram; - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &k3_pds { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_clks { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_reset { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &fss { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/k3-am654-ddr.dtsi b/arch/arm/dts/k3-am654-ddr.dtsi -index b22879695e..48698cdddc 100644 ---- a/arch/arm/dts/k3-am654-ddr.dtsi -+++ b/arch/arm/dts/k3-am654-ddr.dtsi -@@ -15,7 +15,7 @@ - <&k3_pds 244 TI_SCI_PD_SHARED>; - assigned-clocks = <&k3_clks 20 1>; - assigned-clock-rates = ; -- u-boot,dm-spl; -+ bootph-pre-ram; - - ti,ss-reg = < - DDRSS_V2H_CTL_REG -diff --git a/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi -index 1d0659ea8f..4516ab1437 100644 ---- a/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi -+++ b/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi -@@ -22,17 +22,17 @@ - }; - - &cbass_main{ -- u-boot,dm-spl; -+ bootph-pre-ram; - main_navss: bus@30800000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &cbass_mcu { -- u-boot,dm-spl; -+ bootph-pre-ram; - - mcu_navss: bus@28380000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - ringacc@2b800000 { - reg = <0x0 0x2b800000 0x0 0x400000>, -@@ -41,7 +41,7 @@ - <0x0 0x2a500000 0x0 0x40000>, - <0x0 0x28440000 0x0 0x40000>; - reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; -- u-boot,dm-spl; -+ bootph-pre-ram; - ti,dma-ring-reset-quirk; - }; - -@@ -54,93 +54,93 @@ - <0x0 0x28400000 0x0 0x2000>; - reg-names = "gcfg", "rchan", "rchanrt", "tchan", - "tchanrt", "rflow"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - }; - - &cbass_wakeup { -- u-boot,dm-spl; -+ bootph-pre-ram; - - chipid@43000014 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &secure_proxy_main { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &dmsc { -- u-boot,dm-spl; -+ bootph-pre-ram; - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &k3_pds { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_clks { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_reset { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wkup_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - wkup_i2c0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &main_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - usb0_pins_default: usb0_pins_default { - pinctrl-single,pins = < - AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */ - >; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &main_uart0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_pmx1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wkup_pmx0 { - mcu-fss0-ospi0-pins-default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &main_uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_mmc0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_mmc1_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdhci0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdhci1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &davinci_mdio { -@@ -166,7 +166,7 @@ - }; - - &wkup_i2c0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb1 { -@@ -174,34 +174,34 @@ - }; - - &fss { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &ospi0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - flash@0{ -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &dwc3_0 { - status = "okay"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb0_phy { - status = "okay"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb0 { - pinctrl-names = "default"; - pinctrl-0 = <&usb0_pins_default>; - dr_mode = "peripheral"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &scm_conf { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts b/arch/arm/dts/k3-am654-r5-base-board.dts -index 455698a936..7671875a55 100644 ---- a/arch/arm/dts/k3-am654-r5-base-board.dts -+++ b/arch/arm/dts/k3-am654-r5-base-board.dts -@@ -41,7 +41,7 @@ - ti,sci = <&dmsc>; - ti,sci-proc-id = <32>; - ti,sci-host-id = <10>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - vtt_supply: vtt_supply { -@@ -51,7 +51,7 @@ - regulator-max-microvolt = <3300000>; - gpios = <&wkup_gpio0 28 GPIO_ACTIVE_HIGH>; - states = <0 0x0 3300000 0x1>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -@@ -61,7 +61,7 @@ - reg = <0x0 0x40400000 0x0 0x80>; - ti,timer-alwon; - clock-frequency = <25000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -73,12 +73,12 @@ - <0x0 0x2a480000 0x0 0x80000>; - reg-names = "rt", "scfg", "target_data"; - #mbox-cells = <1>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &wkup_gpio0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &cbass_wakeup { -@@ -86,14 +86,14 @@ - compatible = "ti,am654-system-controller"; - mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>; - mbox-names = "tx", "rx"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - clk_200mhz: dummy_clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <200000000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -@@ -105,14 +105,14 @@ - }; - - &wkup_uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-names = "default"; - pinctrl-0 = <&wkup_uart0_pins_default>; - status = "okay"; - }; - - &mcu_uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-names = "default"; - pinctrl-0 = <&mcu_uart0_pins_default>; - clock-frequency = <48000000>; -@@ -131,11 +131,11 @@ - compatible = "ti,am654-vtm", "ti,am654-avs"; - vdd-supply-3 = <&vdd_mpu>; - vdd-supply-4 = <&vdd_mpu>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wkup_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - wkup_uart0_pins_default: wkup_uart0_pins_default { - pinctrl-single,pins = < - AM65X_WKUP_IOPAD(0x00a0, PIN_INPUT, 0) /* (AB1) WKUP_UART0_RXD */ -@@ -143,14 +143,14 @@ - AM65X_WKUP_IOPAD(0x00c8, PIN_INPUT, 1) /* (AC2) WKUP_GPIO0_6.WKUP_UART0_CTSn */ - AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 1) /* (AC1) WKUP_GPIO0_7.WKUP_UART0_RTSn */ - >; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - wkup_vtt_pins_default: wkup_vtt_pins_default { - pinctrl-single,pins = < - AM65X_WKUP_IOPAD(0x0040, PIN_OUTPUT_PULLUP, 7) /* WKUP_GPIO0_28 */ - >; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - mcu_uart0_pins_default: mcu_uart0_pins_default { -@@ -160,7 +160,7 @@ - AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 4) /* (P1) MCU_OSPI1_D3.MCU_UART0_CTSn */ - AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 4) /* (N3) MCU_OSPI1_CSn1.MCU_UART0_RTSn */ - >; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - wkup_i2c0_pins_default: wkup-i2c0-pins-default { -@@ -188,7 +188,7 @@ - }; - - &main_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - main_uart0_pins_default: main-uart0-pins-default { - pinctrl-single,pins = < - AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */ -@@ -196,7 +196,7 @@ - AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */ - AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */ - >; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - main_mmc0_pins_default: main_mmc0_pins_default { -@@ -213,7 +213,7 @@ - AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */ - AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */ - >; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - main_mmc1_pins_default: main_mmc1_pins_default { -@@ -227,7 +227,7 @@ - AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */ - AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */ - >; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -@@ -257,7 +257,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&wkup_i2c0_pins_default>; - clock-frequency = <400000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - - vdd_mpu: tps62363@60 { - compatible = "ti,tps62363"; -@@ -269,7 +269,7 @@ - regulator-boot-on; - ti,vsel0-state-high; - ti,vsel1-state-high; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -@@ -297,18 +297,18 @@ - }; - - &main_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - usb0_pins_default: usb0_pins_default { - pinctrl-single,pins = < - AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */ - >; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &dwc3_0 { - status = "okay"; -- u-boot,dm-spl; -+ bootph-pre-ram; - /delete-property/ clocks; - /delete-property/ power-domains; - /delete-property/ assigned-clocks; -@@ -317,7 +317,7 @@ - - &usb0_phy { - status = "okay"; -- u-boot,dm-spl; -+ bootph-pre-ram; - /delete-property/ clocks; - }; - -@@ -325,9 +325,9 @@ - pinctrl-names = "default"; - pinctrl-0 = <&usb0_pins_default>; - dr_mode = "peripheral"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &scm_conf { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dts b/arch/arm/dts/k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dts -new file mode 100644 -index 0000000000..c9e736098f ---- /dev/null -+++ b/arch/arm/dts/k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dts -@@ -0,0 +1,27 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * IOT2050 M.2 variant, overlay for B-key PCIE0_LANE0 + E-key PCIE1_LANE0 -+ * Copyright (c) Siemens AG, 2022 -+ * -+ * Authors: -+ * Chao Zeng -+ * Jan Kiszka -+ */ -+ -+/dts-v1/; -+/plugin/; -+ -+#include -+#include -+ -+&pcie0_rc { -+ num-lanes = <1>; -+ phys = <&serdes0 PHY_TYPE_PCIE 1>; -+ phy-names = "pcie-phy0"; -+ reset-gpios = <&main_gpio1 15 GPIO_ACTIVE_HIGH>; -+ status = "okay"; -+}; -+ -+&pcie1_rc { -+ status = "okay"; -+}; -diff --git a/arch/arm/dts/k3-am6548-iot2050-advanced-m2-bkey-usb3-overlay.dts b/arch/arm/dts/k3-am6548-iot2050-advanced-m2-bkey-usb3-overlay.dts -new file mode 100644 -index 0000000000..72fc011bd5 ---- /dev/null -+++ b/arch/arm/dts/k3-am6548-iot2050-advanced-m2-bkey-usb3-overlay.dts -@@ -0,0 +1,47 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * IOT2050 M.2 variant, overlay for B-key USB3.0 + E-key PCIE1_LANE0 -+ * Copyright (c) Siemens AG, 2022 -+ * -+ * Authors: -+ * Chao Zeng -+ * Jan Kiszka -+ */ -+ -+/dts-v1/; -+/plugin/; -+ -+#include -+#include -+ -+&serdes0 { -+ assigned-clock-parents = <&k3_clks 153 7>, <&k3_clks 153 4>; -+}; -+ -+&pcie0_rc { -+ status = "disabled"; -+}; -+ -+&pcie1_rc { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&minipcie_pins_default>; -+ -+ num-lanes = <1>; -+ phys = <&serdes1 PHY_TYPE_PCIE 0>; -+ phy-names = "pcie-phy0"; -+ reset-gpios = <&wkup_gpio0 27 GPIO_ACTIVE_HIGH>; -+ status = "okay"; -+}; -+ -+&dwc3_0 { -+ assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */ -+ <&k3_clks 151 8>; /* set PIPE3_TXB_CLK to WIZ8B2M4VSB */ -+ phys = <&serdes0 PHY_TYPE_USB3 0>; -+ phy-names = "usb3-phy"; -+}; -+ -+&usb0 { -+ maximum-speed = "super-speed"; -+ snps,dis-u1-entry-quirk; -+ snps,dis-u2-entry-quirk; -+}; -diff --git a/arch/arm/dts/k3-am6548-iot2050-advanced-m2.dts b/arch/arm/dts/k3-am6548-iot2050-advanced-m2.dts -new file mode 100644 -index 0000000000..9400e35882 ---- /dev/null -+++ b/arch/arm/dts/k3-am6548-iot2050-advanced-m2.dts -@@ -0,0 +1,121 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (c) Siemens AG, 2018-2023 -+ * -+ * Authors: -+ * Chao Zeng -+ * Jan Kiszka -+ * -+ * AM6548-based (quad-core) IOT2050 M.2 variant (based on Advanced Product -+ * Generation 2), 2 GB RAM, 16 GB eMMC, USB-serial converter on connector X30 -+ * -+ * Product homepage: -+ * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html -+ */ -+ -+#include "k3-am6548-iot2050-advanced-common.dtsi" -+#include "k3-am65-iot2050-common-pg2.dtsi" -+ -+/ { -+ compatible = "siemens,iot2050-advanced-m2", "ti,am654"; -+ model = "SIMATIC IOT2050 Advanced M2"; -+}; -+ -+&mcu_r5fss0 { -+ /* lock-step mode not supported on this board */ -+ ti,cluster-mode = <0>; -+}; -+ -+&main_pmx0 { -+ main_m2_enable_pins_default: main-m2-enable-pins-default { -+ pinctrl-single,pins = < -+ AM65X_IOPAD(0x01c4, PIN_INPUT_PULLUP, 7) /* (AH13) GPIO1_17 */ -+ >; -+ }; -+ -+ main_bkey_pcie_reset: main-bkey-pcie-reset { -+ pinctrl-single,pins = < -+ AM65X_IOPAD(0x01bc, PIN_OUTPUT_PULLUP, 7) /* (AG13) GPIO1_15 */ -+ >; -+ }; -+ -+ main_pmx0_m2_config_pins_default: main-pmx0-m2-config-pins-default { -+ pinctrl-single,pins = < -+ AM65X_IOPAD(0x01c8, PIN_INPUT_PULLUP, 7) /* (AE13) GPIO1_18 */ -+ AM65X_IOPAD(0x01cc, PIN_INPUT_PULLUP, 7) /* (AD13) GPIO1_19 */ -+ >; -+ }; -+ -+ main_m2_pcie_mux_control: main-m2-pcie-mux-control { -+ pinctrl-single,pins = < -+ AM65X_IOPAD(0x0148, PIN_INPUT_PULLUP, 7) /* (AG22) GPIO0_82 */ -+ AM65X_IOPAD(0x0160, PIN_INPUT_PULLUP, 7) /* (AE20) GPIO0_88 */ -+ AM65X_IOPAD(0x0164, PIN_INPUT_PULLUP, 7) /* (AF19) GPIO0_89 */ -+ >; -+ }; -+}; -+ -+&main_pmx1 { -+ main_pmx1_m2_config_pins_default: main-pmx1-m2-config-pins-default { -+ pinctrl-single,pins = < -+ AM65X_IOPAD(0x0018, PIN_INPUT_PULLUP, 7) /* (B22) GPIO1_88 */ -+ AM65X_IOPAD(0x001c, PIN_INPUT_PULLUP, 7) /* (C23) GPIO1_89 */ -+ >; -+ }; -+}; -+ -+&main_gpio0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = < -+ &main_m2_pcie_mux_control -+ &arduino_io_d4_to_d9_pins_default -+ >; -+}; -+ -+&main_gpio1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = < -+ &main_m2_enable_pins_default -+ &main_pmx0_m2_config_pins_default -+ &main_pmx1_m2_config_pins_default -+ &cp2102n_reset_pin_default -+ >; -+}; -+ -+/* -+ * Base configuration for B-key slot with PCIe x2, E-key with USB 2.0 only. -+ * Firmware switches to other modes via device tree overlays. -+ */ -+ -+&serdes0 { -+ assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>; -+ assigned-clock-parents = <&k3_clks 153 8>, <&k3_clks 153 4>; -+}; -+ -+&pcie0_rc { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&main_bkey_pcie_reset>; -+ -+ num-lanes = <2>; -+ phys = <&serdes0 PHY_TYPE_PCIE 1>, <&serdes1 PHY_TYPE_PCIE 1>; -+ phy-names = "pcie-phy0","pcie-phy1"; -+ reset-gpios = <&main_gpio1 15 GPIO_ACTIVE_HIGH>; -+ status = "okay"; -+}; -+ -+&pcie1_rc { -+ status = "disabled"; -+}; -+ -+&dwc3_0 { -+ assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */ -+ <&k3_clks 151 9>; /* set PIPE3_TXB_CLK to CLK_12M_RC/256 (for HS only) */ -+ /delete-property/ phys; -+ /delete-property/ phy-names; -+}; -+ -+&usb0 { -+ maximum-speed = "high-speed"; -+ /delete-property/ snps,dis-u1-entry-quirk; -+ /delete-property/ snps,dis-u2-entry-quirk; -+}; -diff --git a/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi b/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi -index 12faaae59b..ee31b1ebe7 100644 ---- a/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi -+++ b/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi -@@ -23,35 +23,35 @@ - }; - - &wkup_i2c0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &cbass_main { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_navss { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &cbass_mcu_wakeup { -- u-boot,dm-spl; -+ bootph-pre-ram; - - timer1: timer@40400000 { - compatible = "ti,omap5430-timer"; - reg = <0x0 0x40400000 0x0 0x80>; - ti,timer-alwon; - clock-frequency = <250000000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - chipid@43000014 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &mcu_navss { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mcu_ringacc { -@@ -61,7 +61,7 @@ - <0x0 0x2a500000 0x0 0x40000>, - <0x0 0x28440000 0x0 0x40000>; - reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mcu_udmap { -@@ -73,59 +73,59 @@ - <0x0 0x28400000 0x0 0x2000>; - reg-names = "gcfg", "rchan", "rchanrt", "tchan", - "tchanrt", "rflow"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &secure_proxy_main { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sms { -- u-boot,dm-spl; -+ bootph-pre-ram; - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &main_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_uart8_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_mmc1_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wkup_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_pds { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_clks { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_reset { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_uart8 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mcu_uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wkup_uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mcu_cpsw { -@@ -146,5 +146,5 @@ - }; - - &main_sdhci1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/k3-am68-sk-r5-base-board.dts b/arch/arm/dts/k3-am68-sk-r5-base-board.dts -index 46ee6c4422..a64baba149 100644 ---- a/arch/arm/dts/k3-am68-sk-r5-base-board.dts -+++ b/arch/arm/dts/k3-am68-sk-r5-base-board.dts -@@ -23,7 +23,7 @@ - - fs_loader0: fs_loader@0 { - compatible = "u-boot,fs-loader"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - a72_0: a72@0 { -@@ -39,27 +39,27 @@ - ti,sci = <&sms>; - ti,sci-proc-id = <32>; - ti,sci-host-id = <10>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - clk_200mhz: dummy_clock_200mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <200000000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - clk_19_2mhz: dummy_clock_19_2mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <19200000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &cbass_mcu_wakeup { - sa3_secproxy: secproxy@44880000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - compatible = "ti,am654-secure-proxy"; - reg = <0x0 0x44880000 0x0 0x20000>, - <0x0 0x44860000 0x0 0x20000>, -@@ -75,14 +75,14 @@ - <0x0 0x2a480000 0x0 0x80000>; - reg-names = "rt", "scfg", "target_data"; - #mbox-cells = <1>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - sysctrler: sysctrler { - compatible = "ti,am654-system-controller"; - mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>, <&sa3_secproxy 5>; - mbox-names = "tx", "rx", "boot_notify"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - dm_tifs: dm-tifs { -@@ -92,7 +92,7 @@ - mbox-names = "rx", "tx"; - mboxes= <&mcu_secproxy 21>, - <&mcu_secproxy 23>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -@@ -126,7 +126,7 @@ - - &wkup_pmx0 { - mcu_uart0_pins_default: mcu-uart0-pins-default { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-single,pins = < - J721S2_WKUP_IOPAD(0x0f4, PIN_INPUT, 0) /*(C24) WKUP_GPIO0_13.MCU_UART0_RXD*/ - J721S2_WKUP_IOPAD(0x0f0, PIN_OUTPUT, 0) /*(C25) WKUP_GPIO0_12.MCU_UART0_TXD*/ -@@ -134,7 +134,7 @@ - }; - - wkup_uart0_pins_default: wkup-uart0-pins-default { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-single,pins = < - J721S2_WKUP_IOPAD(0x0d8, PIN_INPUT, 0) /*(E25) WKUP_GPIO0_6.WKUP_UART0_CTSn*/ - J721S2_WKUP_IOPAD(0x0dc, PIN_OUTPUT, 0) /*(F28) WKUP_GPIO0_7.WKUP_UART0_RTSn*/ -@@ -150,7 +150,7 @@ - mbox-names = "tx", "rx", "notify"; - ti,host-id = <4>; - ti,secure-host; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wkup_uart0 { -diff --git a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi -index ce52ffcf96..f57c2306ba 100644 ---- a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi -+++ b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi -@@ -19,30 +19,30 @@ - }; - - &cbass_main { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_navss { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &cbass_mcu_wakeup { -- u-boot,dm-spl; -+ bootph-pre-ram; - - timer1: timer@40400000 { - compatible = "ti,omap5430-timer"; - reg = <0x0 0x40400000 0x0 0x80>; - ti,timer-alwon; - clock-frequency = <250000000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - chipid@43000014 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - mcu_navss: bus@28380000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - #address-cells = <2>; - #size-cells = <2>; - -@@ -53,7 +53,7 @@ - <0x0 0x2a500000 0x0 0x40000>, - <0x0 0x28440000 0x0 0x40000>; - reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - dma-controller@285c0000 { -@@ -65,73 +65,73 @@ - <0x0 0x28400000 0x0 0x2000>; - reg-names = "gcfg", "rchan", "rchanrt", "tchan", - "tchanrt", "rflow"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - }; - - &secure_proxy_main { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &dmsc { -- u-boot,dm-spl; -+ bootph-pre-ram; - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &k3_pds { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_clks { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_reset { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wkup_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mcu_uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_sdhci0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_sdhci1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wkup_i2c0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_i2c0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_i2c0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &exp2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mcu_cpsw { -@@ -148,37 +148,37 @@ - }; - - &main_usbss0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbss0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - ti,usb2-only; - }; - - &usb0 { - dr_mode = "peripheral"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mcu_fss0_hpb0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &fss { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &hbmc { -- u-boot,dm-spl; -+ bootph-pre-ram; - - flash@0,0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &hbmc_mux { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &serdes_ln_ctrl { -@@ -190,7 +190,7 @@ - }; - - &serdes0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_r5fss0 { -diff --git a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts -index b1f9e714d9..55ad6153dd 100644 ---- a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts -+++ b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts -@@ -22,7 +22,7 @@ - }; - - fs_loader0: fs_loader@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "u-boot,fs-loader"; - }; - -@@ -38,21 +38,21 @@ - ti,sci = <&dmsc>; - ti,sci-proc-id = <32>; - ti,sci-host-id = <10>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - clk_200mhz: dummy_clock_200mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <200000000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - clk_19_2mhz: dummy_clock_19_2mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <19200000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -@@ -64,7 +64,7 @@ - - &cbass_mcu_wakeup { - mcu_secproxy: secproxy@2a380000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - compatible = "ti,am654-secure-proxy"; - reg = <0x0 0x2a380000 0x0 0x80000>, - <0x0 0x2a400000 0x0 0x80000>, -@@ -74,7 +74,7 @@ - }; - - sysctrler: sysctrler { -- u-boot,dm-spl; -+ bootph-pre-ram; - compatible = "ti,am654-system-controller"; - mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>; - mbox-names = "tx", "rx"; -@@ -87,7 +87,7 @@ - mbox-names = "rx", "tx"; - mboxes= <&mcu_secproxy 21>, - <&mcu_secproxy 23>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - wkup_vtm0: vtm@42040000 { -@@ -106,9 +106,9 @@ - }; - - &wkup_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - wkup_uart0_pins_default: wkup_uart0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-single,pins = < - J721E_WKUP_IOPAD(0xb0, PIN_INPUT, 0) /* (B14) WKUP_UART0_RXD */ - J721E_WKUP_IOPAD(0xb4, PIN_OUTPUT, 0) /* (A14) WKUP_UART0_TXD */ -@@ -116,7 +116,7 @@ - }; - - mcu_uart0_pins_default: mcu_uart0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-single,pins = < - J721E_WKUP_IOPAD(0xf4, PIN_INPUT, 0) /* (D20) WKUP_GPIO0_13.MCU_UART0_RXD */ - J721E_WKUP_IOPAD(0xf0, PIN_OUTPUT, 0) /* (D19) WKUP_GPIO0_12.MCU_UART0_TXD */ -@@ -159,10 +159,10 @@ - }; - - &main_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - main_uart0_pins_default: main_uart0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-single,pins = < - J721E_IOPAD(0xb0, PIN_INPUT, 0) /* (T16) UART0_RXD */ - J721E_IOPAD(0xb4, PIN_OUTPUT, 0) /* (T17) UART0_TXD */ -@@ -172,7 +172,7 @@ - }; - - main_i2c0_pins_default: main-i2c0-pins-default { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-single,pins = < - J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */ - J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */ -@@ -200,7 +200,7 @@ - }; - - &wkup_uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-names = "default"; - pinctrl-0 = <&wkup_uart0_pins_default>; - status = "okay"; -@@ -247,17 +247,17 @@ - }; - - &wkup_i2c0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - lp876441: lp876441@4c { - compatible = "ti,lp876441"; - reg = <0x4c>; -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-names = "default"; - pinctrl-0 = <&wkup_i2c0_pins_default>; - clock-frequency = <400000>; - - regulators: regulators { -- u-boot,dm-spl; -+ bootph-pre-ram; - buck1_reg: buck1 { - /*VDD_CPU_AVS_REG*/ - regulator-name = "buck1"; -@@ -265,7 +265,7 @@ - regulator-max-microvolt = <1250000>; - regulator-always-on; - regulator-boot-on; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - }; -@@ -274,7 +274,7 @@ - - &wkup_vtm0 { - vdd-supply-2 = <&buck1_reg>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_i2c0 { -diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi -index b2b81f804d..867ec2bb1a 100644 ---- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi -+++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi -@@ -32,26 +32,26 @@ - }; - - &cbass_main{ -- u-boot,dm-spl; -+ bootph-pre-ram; - - main_navss: bus@30000000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &cbass_mcu_wakeup { -- u-boot,dm-spl; -+ bootph-pre-ram; - - timer1: timer@40400000 { - compatible = "ti,omap5430-timer"; - reg = <0x0 0x40400000 0x0 0x80>; - ti,timer-alwon; - clock-frequency = <250000000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - mcu_navss: bus@28380000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - ringacc@2b800000 { - reg = <0x0 0x2b800000 0x0 0x400000>, -@@ -60,7 +60,7 @@ - <0x0 0x2a500000 0x0 0x40000>, - <0x0 0x28440000 0x0 0x40000>; - reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - dma-controller@285c0000 { -@@ -72,61 +72,61 @@ - <0x0 0x28400000 0x0 0x2000>; - reg-names = "gcfg", "rchan", "rchanrt", "tchan", - "tchanrt", "rflow"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - chipid@43000014 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &secure_proxy_main { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &dmsc { -- u-boot,dm-spl; -+ bootph-pre-ram; - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &k3_pds { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_clks { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_reset { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wkup_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mcu_uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_sdhci0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_sdhci1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wiz3_pll1_refclk { -@@ -135,16 +135,16 @@ - }; - - &main_usbss0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbss0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb0 { - dr_mode = "peripheral"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mcu_cpsw { -@@ -161,79 +161,79 @@ - }; - - &main_mmc1_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wkup_i2c0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wkup_i2c0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_i2c0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_i2c0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &exp2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mcu_fss0_ospi0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &fss { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &hbmc { -- u-boot,dm-spl; -+ bootph-pre-ram; - - flash@0,0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &hbmc_mux { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wkup_gpio0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &ospi0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - flash@0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &ospi1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - flash@0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &mcu_fss0_hpb0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wkup_gpio_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mcu_fss0_ospi1_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_r5fss0 { -diff --git a/arch/arm/dts/k3-j721e-ddr.dtsi b/arch/arm/dts/k3-j721e-ddr.dtsi -index 21d63802a5..3a9ea42fe5 100644 ---- a/arch/arm/dts/k3-j721e-ddr.dtsi -+++ b/arch/arm/dts/k3-j721e-ddr.dtsi -@@ -16,7 +16,7 @@ - ti,ddr-freq2 = ; - ti,ddr-fhs-cnt = ; - -- u-boot,dm-spl; -+ bootph-pre-ram; - - ti,ctl-data = < - DDRSS_CTL_00_DATA -diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi -index 48c6ddf672..f9746d33ec 100644 ---- a/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi -+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi -@@ -16,7 +16,7 @@ - }; - - fs_loader0: fs_loader@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "u-boot,fs-loader"; - }; - }; -@@ -24,6 +24,6 @@ - &tps659413a { - esm: esm { - compatible = "ti,tps659413-esm"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; -diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts -index ab9d6e65d8..e9e50538cb 100644 ---- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts -+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts -@@ -33,27 +33,27 @@ - ti,sci = <&dmsc>; - ti,sci-proc-id = <32>; - ti,sci-host-id = <10>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - clk_200mhz: dummy_clock_200mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <200000000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - clk_19_2mhz: dummy_clock_19_2mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <19200000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &cbass_mcu_wakeup { - mcu_secproxy: secproxy@28380000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - compatible = "ti,am654-secure-proxy"; - reg = <0x0 0x2a380000 0x0 0x80000>, - <0x0 0x2a400000 0x0 0x80000>, -@@ -63,7 +63,7 @@ - }; - - sysctrler: sysctrler { -- u-boot,dm-spl; -+ bootph-pre-ram; - compatible = "ti,am654-system-controller"; - mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>; - mbox-names = "tx", "rx"; -@@ -83,7 +83,7 @@ - mbox-names = "rx", "tx"; - mboxes= <&mcu_secproxy 21>, - <&mcu_secproxy 23>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -@@ -92,7 +92,7 @@ - compatible = "ti,j721e-esm"; - reg = <0x0 0x700000 0x0 0x1000>; - ti,esm-pins = <344>, <345>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -@@ -105,7 +105,7 @@ - - &wkup_pmx0 { - wkup_uart0_pins_default: wkup_uart0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-single,pins = < - J721E_WKUP_IOPAD(0xa0, PIN_INPUT, 0) /* (J29) WKUP_UART0_RXD */ - J721E_WKUP_IOPAD(0xa4, PIN_OUTPUT, 0) /* (J28) WKUP_UART0_TXD */ -@@ -113,7 +113,7 @@ - }; - - mcu_uart0_pins_default: mcu_uart0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-single,pins = < - J721E_WKUP_IOPAD(0xe8, PIN_INPUT, 0) /* (H29) WKUP_GPIO0_14.MCU_UART0_CTSn */ - J721E_WKUP_IOPAD(0xec, PIN_OUTPUT, 0) /* (J27) WKUP_GPIO0_15.MCU_UART0_RTSn */ -@@ -171,7 +171,7 @@ - }; - - mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-single,pins = < - J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */ - J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */ -@@ -187,7 +187,7 @@ - - &main_pmx0 { - main_uart0_pins_default: main_uart0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-single,pins = < - J721E_IOPAD(0x1d4, PIN_INPUT, 1) /* (Y3) SPI1_CS0.UART0_CTSn */ - J721E_IOPAD(0x1c0, PIN_OUTPUT, 1) /* (AA2) SPI0_CS0.UART0_RTSn */ -@@ -226,7 +226,7 @@ - }; - - &wkup_uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-names = "default"; - pinctrl-0 = <&wkup_uart0_pins_default>; - status = "okay"; -@@ -277,17 +277,17 @@ - }; - - &wkup_i2c0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - tps659413a: tps659413a@48 { - reg = <0x48>; - compatible = "ti,tps659413"; -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-names = "default"; - pinctrl-0 = <&wkup_i2c0_pins_default>; - clock-frequency = <400000>; - - regulators: regulators { -- u-boot,dm-spl; -+ bootph-pre-ram; - buck12_reg: buck12 { - /*VDD_CPU*/ - regulator-name = "buck12"; -@@ -295,7 +295,7 @@ - regulator-max-microvolt = <900000>; - regulator-always-on; - regulator-boot-on; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - }; -@@ -303,7 +303,7 @@ - - &wkup_vtm0 { - vdd-supply-2 = <&buck12_reg>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbss0 { -@@ -378,7 +378,7 @@ - &ospi1 { - pinctrl-names = "default"; - pinctrl-0 = <&mcu_fss0_ospi1_pins_default>; -- u-boot,dm-spl; -+ bootph-pre-ram; - - reg = <0x0 0x47050000 0x0 0x100>, - <0x0 0x58000000 0x0 0x8000000>; -@@ -396,7 +396,7 @@ - cdns,read-delay = <2>; - #address-cells = <1>; - #size-cells = <1>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -diff --git a/arch/arm/dts/k3-j721e-r5-sk-u-boot.dtsi b/arch/arm/dts/k3-j721e-r5-sk-u-boot.dtsi -index 71d16f193f..733d69cd00 100644 ---- a/arch/arm/dts/k3-j721e-r5-sk-u-boot.dtsi -+++ b/arch/arm/dts/k3-j721e-r5-sk-u-boot.dtsi -@@ -18,7 +18,7 @@ - }; - - fs_loader0: fs_loader@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "u-boot,fs-loader"; - }; - }; -@@ -26,6 +26,6 @@ - &tps659412 { - esm: esm { - compatible = "ti,tps659413-esm"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; -diff --git a/arch/arm/dts/k3-j721e-r5-sk.dts b/arch/arm/dts/k3-j721e-r5-sk.dts -index d894dcb991..8d6eaa4fbb 100644 ---- a/arch/arm/dts/k3-j721e-r5-sk.dts -+++ b/arch/arm/dts/k3-j721e-r5-sk.dts -@@ -167,27 +167,27 @@ - ti,sci = <&dmsc>; - ti,sci-proc-id = <32>; - ti,sci-host-id = <10>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - clk_200mhz: dummy_clock_200mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <200000000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - clk_19_2mhz: dummy_clock_19_2mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <19200000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &cbass_mcu_wakeup { - mcu_secproxy: secproxy@28380000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - compatible = "ti,am654-secure-proxy"; - reg = <0x0 0x2a380000 0x0 0x80000>, - <0x0 0x2a400000 0x0 0x80000>, -@@ -197,7 +197,7 @@ - }; - - sysctrler: sysctrler { -- u-boot,dm-spl; -+ bootph-pre-ram; - compatible = "ti,am654-system-controller"; - mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>; - mbox-names = "tx", "rx"; -@@ -217,7 +217,7 @@ - mbox-names = "rx", "tx"; - mboxes= <&mcu_secproxy 21>, - <&mcu_secproxy 23>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -@@ -226,7 +226,7 @@ - compatible = "ti,j721e-esm"; - reg = <0x0 0x700000 0x0 0x1000>; - ti,esm-pins = <344>, <345>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -@@ -239,7 +239,7 @@ - - &wkup_pmx0 { - wkup_uart0_pins_default: wkup_uart0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-single,pins = < - J721E_WKUP_IOPAD(0xa0, PIN_INPUT, 0) /* (J29) WKUP_UART0_RXD */ - J721E_WKUP_IOPAD(0xa4, PIN_OUTPUT, 0) /* (J28) WKUP_UART0_TXD */ -@@ -247,7 +247,7 @@ - }; - - mcu_uart0_pins_default: mcu_uart0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-single,pins = < - J721E_WKUP_IOPAD(0xf0, PIN_INPUT, 2) /* (D26) MCU_I3C0_SCL.MCU_UART0_CTSn */ - J721E_WKUP_IOPAD(0xf4, PIN_OUTPUT, 2)/* (D25) MCU_I3C0_SDA.MCU_UART0_RTSn */ -@@ -289,7 +289,7 @@ - - &main_pmx0 { - main_uart0_pins_default: main_uart0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-single,pins = < - J721E_IOPAD(0x1f0, PIN_INPUT, 0) /* (AC2) UART0_CTSn */ - J721E_IOPAD(0x1f4, PIN_OUTPUT, 0) /* (AB1) UART0_RTSn */ -@@ -361,7 +361,7 @@ - }; - - &wkup_uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-names = "default"; - pinctrl-0 = <&wkup_uart0_pins_default>; - status = "okay"; -@@ -400,17 +400,17 @@ - }; - - &wkup_i2c0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - tps659412: tps659412@48 { - reg = <0x48>; - compatible = "ti,tps659412"; -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-names = "default"; - pinctrl-0 = <&wkup_i2c0_pins_default>; - clock-frequency = <400000>; - - regulators: regulators { -- u-boot,dm-spl; -+ bootph-pre-ram; - /* 3 Phase Buck */ - buck123_reg: buck123 { - /* VDD_CPU */ -@@ -419,7 +419,7 @@ - regulator-max-microvolt = <1250000>; - regulator-always-on; - regulator-boot-on; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - }; -@@ -427,7 +427,7 @@ - - &wkup_vtm0 { - vdd-supply-2 = <&buck123_reg>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbss0 { -diff --git a/arch/arm/dts/k3-j721e-sk-u-boot.dtsi b/arch/arm/dts/k3-j721e-sk-u-boot.dtsi -index f529e7032a..31f979f3bb 100644 ---- a/arch/arm/dts/k3-j721e-sk-u-boot.dtsi -+++ b/arch/arm/dts/k3-j721e-sk-u-boot.dtsi -@@ -31,26 +31,26 @@ - }; - - &cbass_main{ -- u-boot,dm-spl; -+ bootph-pre-ram; - - main_navss: bus@30000000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &cbass_mcu_wakeup { -- u-boot,dm-spl; -+ bootph-pre-ram; - - timer1: timer@40400000 { - compatible = "ti,omap5430-timer"; - reg = <0x0 0x40400000 0x0 0x80>; - ti,timer-alwon; - clock-frequency = <25000000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - mcu_navss: bus@28380000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - ringacc@2b800000 { - reg = <0x0 0x2b800000 0x0 0x400000>, -@@ -59,7 +59,7 @@ - <0x0 0x2a500000 0x0 0x40000>, - <0x0 0x28440000 0x0 0x40000>; - reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - dma-controller@285c0000 { -@@ -71,53 +71,53 @@ - <0x0 0x28400000 0x0 0x2000>; - reg-names = "gcfg", "rchan", "rchanrt", "tchan", - "tchanrt", "rflow"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - chipid@43000014 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &secure_proxy_main { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &dmsc { -- u-boot,dm-spl; -+ bootph-pre-ram; - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &k3_pds { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_clks { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_reset { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wkup_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mcu_uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_sdhci0 { -@@ -125,7 +125,7 @@ - }; - - &main_sdhci1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wiz3_pll1_refclk { -@@ -134,16 +134,16 @@ - }; - - &main_usbss0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbss0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb0 { - dr_mode = "host"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wiz2_pll1_refclk { -@@ -152,16 +152,16 @@ - }; - - &main_usbss1_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbss1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb1 { - dr_mode = "host"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mcu_cpsw { -@@ -178,19 +178,19 @@ - }; - - &main_mmc1_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wkup_i2c0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wkup_i2c0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mcu_i2c0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mcu_i2c1 { -@@ -226,15 +226,15 @@ - }; - - &mcu_i2c0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mcu_fss0_ospi0_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &fss { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &hbmc { -@@ -242,15 +242,15 @@ - }; - - &ospi0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - flash@0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - partition@3fc0000 { - label = "ospi.phypattern"; - reg = <0x3fc0000 0x40000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - }; -diff --git a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi -index a17e61eccf..4fd6d36417 100644 ---- a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi -+++ b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi -@@ -22,35 +22,35 @@ - }; - - &wkup_i2c0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &cbass_main { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_navss { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &cbass_mcu_wakeup { -- u-boot,dm-spl; -+ bootph-pre-ram; - - timer1: timer@40400000 { - compatible = "ti,omap5430-timer"; - reg = <0x0 0x40400000 0x0 0x80>; - ti,timer-alwon; - clock-frequency = <250000000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - chipid@43000014 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &mcu_navss { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mcu_ringacc { -@@ -60,7 +60,7 @@ - <0x0 0x2a500000 0x0 0x40000>, - <0x0 0x28440000 0x0 0x40000>; - reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mcu_udmap { -@@ -72,59 +72,59 @@ - <0x0 0x28400000 0x0 0x2000>; - reg-names = "gcfg", "rchan", "rchanrt", "tchan", - "tchanrt", "rflow"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &secure_proxy_main { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sms { -- u-boot,dm-spl; -+ bootph-pre-ram; - k3_sysreset: sysreset-controller { - compatible = "ti,sci-sysreset"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &main_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_uart8_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_mmc1_pins_default { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wkup_pmx0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_pds { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_clks { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &k3_reset { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_uart8 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mcu_uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wkup_uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mcu_cpsw { -@@ -141,9 +141,9 @@ - }; - - &main_sdhci0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &main_sdhci1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/k3-j721s2-ddr.dtsi b/arch/arm/dts/k3-j721s2-ddr.dtsi -index 6a244fb7ac..345e2b84f9 100644 ---- a/arch/arm/dts/k3-j721s2-ddr.dtsi -+++ b/arch/arm/dts/k3-j721s2-ddr.dtsi -@@ -19,7 +19,7 @@ - #address-cells = <2>; - #size-cells = <2>; - -- u-boot,dm-spl; -+ bootph-pre-ram; - - memorycontroller0: memorycontroller@2990000 { - compatible = "ti,j721s2-ddrss"; -@@ -35,7 +35,7 @@ - ti,ddr-fhs-cnt = ; - instance = <0>; - -- u-boot,dm-spl; -+ bootph-pre-ram; - - ti,ctl-data = < - DDRSS0_CTL_00_DATA -@@ -2243,7 +2243,7 @@ - ti,ddr-fhs-cnt = ; - instance = <1>; - -- u-boot,dm-spl; -+ bootph-pre-ram; - - ti,ctl-data = < - DDRSS1_CTL_00_DATA -diff --git a/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts b/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts -index 9e3bdec2d5..bc617022c1 100644 ---- a/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts -+++ b/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts -@@ -23,7 +23,7 @@ - - fs_loader0: fs_loader@0 { - compatible = "u-boot,fs-loader"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - a72_0: a72@0 { -@@ -39,27 +39,27 @@ - ti,sci = <&sms>; - ti,sci-proc-id = <32>; - ti,sci-host-id = <10>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - clk_200mhz: dummy_clock_200mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <200000000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - clk_19_2mhz: dummy_clock_19_2mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <19200000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &cbass_mcu_wakeup { - sa3_secproxy: secproxy@44880000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - compatible = "ti,am654-secure-proxy"; - reg = <0x0 0x44880000 0x0 0x20000>, - <0x0 0x44860000 0x0 0x20000>, -@@ -75,14 +75,14 @@ - <0x0 0x2a480000 0x0 0x80000>; - reg-names = "rt", "scfg", "target_data"; - #mbox-cells = <1>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - sysctrler: sysctrler { - compatible = "ti,am654-system-controller"; - mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>, <&sa3_secproxy 5>; - mbox-names = "tx", "rx", "boot_notify"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - dm_tifs: dm-tifs { -@@ -92,7 +92,7 @@ - mbox-names = "rx", "tx"; - mboxes= <&mcu_secproxy 21>, - <&mcu_secproxy 23>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -@@ -122,7 +122,7 @@ - - &wkup_pmx0 { - mcu_uart0_pins_default: mcu-uart0-pins-default { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-single,pins = < - J721S2_WKUP_IOPAD(0x0f8, PIN_INPUT, 0) /* (B24) WKUP_GPIO0_14.MCU_UART0_CTSn */ - J721S2_WKUP_IOPAD(0x0fc, PIN_OUTPUT, 0) /* (D25) WKUP_GPIO0_15.MCU_UART0_RTSn */ -@@ -132,7 +132,7 @@ - }; - - wkup_uart0_pins_default: wkup-uart0-pins-default { -- u-boot,dm-spl; -+ bootph-pre-ram; - pinctrl-single,pins = < - J721S2_WKUP_IOPAD(0x0d8, PIN_INPUT, 0) /* (E25) WKUP_GPIO0_6.WKUP_UART0_CTSn */ - J721S2_WKUP_IOPAD(0x0dc, PIN_OUTPUT, 0) /* (F28) WKUP_GPIO0_7.WKUP_UART0_RTSn */ -@@ -147,7 +147,7 @@ - mbox-names = "tx", "rx", "notify"; - ti,host-id = <4>; - ti,secure-host; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wkup_uart0 { -diff --git a/arch/arm/dts/keystone-k2e-evm-u-boot.dtsi b/arch/arm/dts/keystone-k2e-evm-u-boot.dtsi -index c94165ffe7..970d452f08 100644 ---- a/arch/arm/dts/keystone-k2e-evm-u-boot.dtsi -+++ b/arch/arm/dts/keystone-k2e-evm-u-boot.dtsi -@@ -5,7 +5,7 @@ - - /{ - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - aliases { - usb0 = &usb; -@@ -14,7 +14,7 @@ - }; - - &i2c1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &usb_phy { -diff --git a/arch/arm/dts/keystone-k2g-evm-u-boot.dtsi b/arch/arm/dts/keystone-k2g-evm-u-boot.dtsi -index e8e70096ea..05653afc7e 100644 ---- a/arch/arm/dts/keystone-k2g-evm-u-boot.dtsi -+++ b/arch/arm/dts/keystone-k2g-evm-u-boot.dtsi -@@ -5,7 +5,7 @@ - - /{ - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - aliases { - usb0 = &usb0; -@@ -14,11 +14,11 @@ - }; - - &i2c0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &i2c1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &usb0_phy { -diff --git a/arch/arm/dts/keystone-k2g-generic-u-boot.dtsi b/arch/arm/dts/keystone-k2g-generic-u-boot.dtsi -index 80f1f60045..8e4b36c2de 100644 ---- a/arch/arm/dts/keystone-k2g-generic-u-boot.dtsi -+++ b/arch/arm/dts/keystone-k2g-generic-u-boot.dtsi -@@ -5,14 +5,14 @@ - - /{ - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &i2c0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &i2c1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/keystone-k2g-ice-u-boot.dtsi b/arch/arm/dts/keystone-k2g-ice-u-boot.dtsi -index 80f1f60045..8e4b36c2de 100644 ---- a/arch/arm/dts/keystone-k2g-ice-u-boot.dtsi -+++ b/arch/arm/dts/keystone-k2g-ice-u-boot.dtsi -@@ -5,14 +5,14 @@ - - /{ - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &i2c0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &i2c1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/keystone-k2hk-evm-u-boot.dtsi b/arch/arm/dts/keystone-k2hk-evm-u-boot.dtsi -index 1c2f349f5c..22df84ba93 100644 ---- a/arch/arm/dts/keystone-k2hk-evm-u-boot.dtsi -+++ b/arch/arm/dts/keystone-k2hk-evm-u-boot.dtsi -@@ -5,12 +5,12 @@ - - /{ - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &i2c1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &usb_phy { -diff --git a/arch/arm/dts/kirkwood-pogoplug-series-4-u-boot.dtsi b/arch/arm/dts/kirkwood-pogoplug-series-4-u-boot.dtsi -index f9e127234c..26a6e6b38c 100644 ---- a/arch/arm/dts/kirkwood-pogoplug-series-4-u-boot.dtsi -+++ b/arch/arm/dts/kirkwood-pogoplug-series-4-u-boot.dtsi -@@ -3,5 +3,5 @@ - * Copyright (C) 2023 Tony Dinh - */ - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi b/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi -index 7832c9ab53..6f11852a33 100644 ---- a/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi -+++ b/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi -@@ -28,37 +28,37 @@ - }; - - &gpio1 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &gpio2 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &gpio3 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &gpio4 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &gpio5 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &gpio6 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &i2c1 { - clock-frequency = <400000>; -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &i2c2 { - clock-frequency = <400000>; -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - /delete-node/ &bandgap; -diff --git a/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi b/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi -index 7832c9ab53..6f11852a33 100644 ---- a/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi -+++ b/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi -@@ -28,37 +28,37 @@ - }; - - &gpio1 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &gpio2 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &gpio3 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &gpio4 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &gpio5 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &gpio6 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &i2c1 { - clock-frequency = <400000>; -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &i2c2 { - clock-frequency = <400000>; -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - /delete-node/ &bandgap; -diff --git a/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi b/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi -index 89b20be38c..4744872f7c 100644 ---- a/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi -+++ b/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi -@@ -28,37 +28,37 @@ - }; - - &gpio1 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &gpio2 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &gpio3 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &gpio4 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &gpio5 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &gpio6 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &i2c1 { - clock-frequency = <400000>; -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &i2c2 { - clock-frequency = <400000>; -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - /delete-node/ &bandgap; -diff --git a/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi b/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi -index e56666e4bc..2c34344504 100644 ---- a/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi -+++ b/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi -@@ -27,7 +27,7 @@ - - &i2c1 { - clock-frequency = <400000>; -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &i2c2 { -@@ -35,27 +35,27 @@ - }; - - &gpio1 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &gpio2 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &gpio3 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &gpio4 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &gpio5 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - &gpio6 { -- /delete-property/ u-boot,dm-spl; -+ /delete-property/ bootph-pre-ram; - }; - - /delete-node/ &bandgap; -diff --git a/arch/arm/dts/ls1021a-twr-u-boot.dtsi b/arch/arm/dts/ls1021a-twr-u-boot.dtsi -index 3711e42419..71a538cff1 100644 ---- a/arch/arm/dts/ls1021a-twr-u-boot.dtsi -+++ b/arch/arm/dts/ls1021a-twr-u-boot.dtsi -@@ -4,26 +4,26 @@ - */ - - &{/soc} { -- u-boot,dm-spl; -- u-boot,dm-pre-reloc; -+ bootph-pre-ram; -+ bootph-all; - }; - - &crypto { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sec_jr3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/meson-g12-common-u-boot.dtsi b/arch/arm/dts/meson-g12-common-u-boot.dtsi -index b1f60b15c9..efa6a0570b 100644 ---- a/arch/arm/dts/meson-g12-common-u-boot.dtsi -+++ b/arch/arm/dts/meson-g12-common-u-boot.dtsi -@@ -13,7 +13,7 @@ - }; - - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -26,7 +26,7 @@ - <0x0 0xff63c000 0x0 0x1000>, - <0x0 0xff638000 0x0 0x400>; - reg-names = "vpu", "hhi", "dmc"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &hdmi_tx { -diff --git a/arch/arm/dts/meson-gx-u-boot.dtsi b/arch/arm/dts/meson-gx-u-boot.dtsi -index fb6952f1d8..9f123ab042 100644 ---- a/arch/arm/dts/meson-gx-u-boot.dtsi -+++ b/arch/arm/dts/meson-gx-u-boot.dtsi -@@ -13,7 +13,7 @@ - }; - - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -22,7 +22,7 @@ - <0x0 0xc883c000 0x0 0x1000>, - <0x0 0xc8838000 0x0 0x1000>; - reg-names = "vpu", "hhi", "dmc"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &hdmi_tx { -diff --git a/arch/arm/dts/mt7622-bananapi-bpi-r64.dts b/arch/arm/dts/mt7622-bananapi-bpi-r64.dts -index 2ac933a6ac..7c55744ac7 100644 ---- a/arch/arm/dts/mt7622-bananapi-bpi-r64.dts -+++ b/arch/arm/dts/mt7622-bananapi-bpi-r64.dts -@@ -177,7 +177,7 @@ - spi-flash@0{ - compatible = "jedec,spi-nor"; - reg = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -diff --git a/arch/arm/dts/mt7622-rfb.dts b/arch/arm/dts/mt7622-rfb.dts -index b44f19f05a..886a133e05 100644 ---- a/arch/arm/dts/mt7622-rfb.dts -+++ b/arch/arm/dts/mt7622-rfb.dts -@@ -178,7 +178,7 @@ - spi-flash@0{ - compatible = "jedec,spi-nor"; - reg = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -192,7 +192,7 @@ - reg = <0>; - spi-tx-bus-width = <1>; - spi-rx-bus-width = <4>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -diff --git a/arch/arm/dts/mt7622-u-boot.dtsi b/arch/arm/dts/mt7622-u-boot.dtsi -index b14b1d4344..b37049a1f2 100644 ---- a/arch/arm/dts/mt7622-u-boot.dtsi -+++ b/arch/arm/dts/mt7622-u-boot.dtsi -@@ -5,25 +5,25 @@ - */ - - &topckgen { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pericfg { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &apmixedsys { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &timer0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &snfi { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/mt7623-u-boot.dtsi b/arch/arm/dts/mt7623-u-boot.dtsi -index 832c16dca8..b9fd49900c 100644 ---- a/arch/arm/dts/mt7623-u-boot.dtsi -+++ b/arch/arm/dts/mt7623-u-boot.dtsi -@@ -5,25 +5,25 @@ - */ - - &topckgen { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &topckgen { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pericfg { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &timer0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &apmixedsys { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/mt7629-rfb-u-boot.dtsi b/arch/arm/dts/mt7629-rfb-u-boot.dtsi -index c17e82ace7..4117047465 100644 ---- a/arch/arm/dts/mt7629-rfb-u-boot.dtsi -+++ b/arch/arm/dts/mt7629-rfb-u-boot.dtsi -@@ -6,37 +6,37 @@ - */ - - &infracfg { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pericfg { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &timer0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &mcucfg { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &dramc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &apmixedsys { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &topckgen { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &snfi { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/mt7629-rfb.dts b/arch/arm/dts/mt7629-rfb.dts -index f2e4e9548b..82f6a34162 100644 ---- a/arch/arm/dts/mt7629-rfb.dts -+++ b/arch/arm/dts/mt7629-rfb.dts -@@ -37,12 +37,12 @@ - - &pinctrl { - state_default: pinmux_conf { -- u-boot,dm-pre-reloc; -+ bootph-all; - - mux { - function = "jtag"; - groups = "ephy_leds_jtag"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -84,7 +84,7 @@ - spi-flash@0{ - compatible = "jedec,spi-nor"; - reg = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -98,7 +98,7 @@ - reg = <0>; - spi-tx-bus-width = <1>; - spi-rx-bus-width = <4>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -diff --git a/arch/arm/dts/mt7981.dtsi b/arch/arm/dts/mt7981.dtsi -index 3089371805..2c8ef14f98 100644 ---- a/arch/arm/dts/mt7981.dtsi -+++ b/arch/arm/dts/mt7981.dtsi -@@ -36,7 +36,7 @@ - compatible = "fixed-clock"; - clock-frequency = <13000000>; - #clock-cells = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - hwver: hwver { -@@ -61,7 +61,7 @@ - interrupts = ; - clocks = <&gpt_clk>; - clock-names = "gpt-clk"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - watchdog: watchdog@1001c000 { -@@ -87,7 +87,7 @@ - compatible = "mediatek,mt7981-fixed-plls"; - reg = <0x1001e000 0x1000>; - #clock-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - topckgen: topckgen@1001b000 { -@@ -95,7 +95,7 @@ - reg = <0x1001b000 0x1000>; - clock-parent = <&fixed_plls>; - #clock-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - infracfg_ao: infracfg_ao@10001000 { -@@ -103,7 +103,7 @@ - reg = <0x10001000 0x80>; - clock-parent = <&infracfg>; - #clock-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - infracfg: infracfg@10001000 { -@@ -111,7 +111,7 @@ - reg = <0x10001000 0x30>; - clock-parent = <&topckgen>; - #clock-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pinctrl: pinctrl@11d00000 { -@@ -163,7 +163,7 @@ - <&infracfg CK_INFRA_UART>; - mediatek,force-highspeed; - status = "disabled"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - uart1: serial@11003000 { -diff --git a/arch/arm/dts/mt7986-u-boot.dtsi b/arch/arm/dts/mt7986-u-boot.dtsi -index 95671f8afa..096b97371b 100644 ---- a/arch/arm/dts/mt7986-u-boot.dtsi -+++ b/arch/arm/dts/mt7986-u-boot.dtsi -@@ -5,29 +5,29 @@ - */ - - &topckgen { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pericfg { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &apmixedsys { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &timer0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &snand { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/mt7986.dtsi b/arch/arm/dts/mt7986.dtsi -index 794ab1f4bd..30b5a89970 100644 ---- a/arch/arm/dts/mt7986.dtsi -+++ b/arch/arm/dts/mt7986.dtsi -@@ -55,7 +55,7 @@ - clock-frequency = <12000000>; - #clock-cells = <0>; - /* must need this line, or uart uanable to get dummy_clk */ -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - hwver: hwver { -@@ -80,7 +80,7 @@ - interrupts = ; - clocks = <&infracfg CK_INFRA_CK_F26M>; - clock-names = "gpt-clk"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - watchdog: watchdog@1001c000 { -@@ -168,7 +168,7 @@ - <&infracfg CK_INFRA_PWM>; - clock-names = "top", "main", "pwm1", "pwm2"; - status = "disabled"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - uart0: serial@11002000 { -@@ -182,7 +182,7 @@ - <&infracfg CK_INFRA_UART>; - mediatek,force-highspeed; - status = "disabled"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - uart1: serial@11003000 { -diff --git a/arch/arm/dts/mt8516-u-boot.dtsi b/arch/arm/dts/mt8516-u-boot.dtsi -index 3c0d843f35..07312dd5f6 100644 ---- a/arch/arm/dts/mt8516-u-boot.dtsi -+++ b/arch/arm/dts/mt8516-u-boot.dtsi -@@ -5,21 +5,21 @@ - */ - - &infracfg { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &topckgen_ { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &topckgen_cg { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &apmixedsys { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/mvebu-u-boot.dtsi b/arch/arm/dts/mvebu-u-boot.dtsi -index db4bf39920..6d20a44239 100644 ---- a/arch/arm/dts/mvebu-u-boot.dtsi -+++ b/arch/arm/dts/mvebu-u-boot.dtsi -@@ -4,31 +4,31 @@ - - / { - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - internal-regs { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - #ifdef CONFIG_ARMADA_375 - /* Armada 375 has multiple timers, use timer1 here */ - &timer1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - #else - &timer { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - #endif - - #ifdef CONFIG_SPL_SPI - &spi0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - #endif - -diff --git a/arch/arm/dts/omap3-u-boot.dtsi b/arch/arm/dts/omap3-u-boot.dtsi -index 96d8ac5453..7366ff5693 100644 ---- a/arch/arm/dts/omap3-u-boot.dtsi -+++ b/arch/arm/dts/omap3-u-boot.dtsi -@@ -9,74 +9,74 @@ - - /{ - ocp@68000000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - bandgap@48002524 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - }; - - &uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - reg-shift = <2>; - }; - - &uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - reg-shift = <2>; - }; - - &uart3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - reg-shift = <2>; - }; - - &mmc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mmc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &l4_core { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &scm { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &scm_conf { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio6 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - clock-frequency = <100000>; - }; -diff --git a/arch/arm/dts/omap5-u-boot.dtsi b/arch/arm/dts/omap5-u-boot.dtsi -index 5a1c7bc9fe..720e79b3a5 100644 ---- a/arch/arm/dts/omap5-u-boot.dtsi -+++ b/arch/arm/dts/omap5-u-boot.dtsi -@@ -19,11 +19,11 @@ - }; - - ocp { -- u-boot,dm-spl; -+ bootph-pre-ram; - - ocp2scp@4a080000 { - compatible = "ti,omap-ocp2scp", "simple-bus"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - ocp2scp@4a090000 { -@@ -31,80 +31,80 @@ - }; - - bandgap@4a0021e0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - }; - - &uart1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - reg-shift = <2>; - }; - - &uart3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - reg-shift = <2>; - }; - - &mmc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &mmc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &l4_cfg { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &scm { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &scm_conf { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &qspi { -- u-boot,dm-spl; -+ bootph-pre-ram; - - m25p80@0 { - compatible = "jedec,spi-nor"; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio6 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio7 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - #else /* OMAP54XX */ -diff --git a/arch/arm/dts/phycore-imx8mm-u-boot.dtsi b/arch/arm/dts/phycore-imx8mm-u-boot.dtsi -index 7c2dfb4a27..516e52e1f5 100644 ---- a/arch/arm/dts/phycore-imx8mm-u-boot.dtsi -+++ b/arch/arm/dts/phycore-imx8mm-u-boot.dtsi -@@ -10,62 +10,62 @@ - wdt-reboot { - compatible = "wdt-reboot"; - wdt = <&wdog1>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &pinctrl_uart3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2_gpio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl_wdog { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio5 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usdhc3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &wdog1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi b/arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi -index 1325e0cb05..e04766ad09 100644 ---- a/arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi -+++ b/arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi -@@ -24,27 +24,27 @@ - }; - - &emmc_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &emmc_cmd { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &emmc_bus8 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - /* - * The Qseven BIOS_DISABLE signal on the PX30-µQ7 keeps the on-module -@@ -53,39 +53,39 @@ - * the SPL has been booted from SD Card. - */ - bios-disable-override-hog { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pcfg_pull_none_8ma { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pcfg_pull_up_8ma { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc_bus4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc_cmd { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc_det { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0 { - clock-frequency = <24000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi -index 462eaf68f8..046da022ff 100644 ---- a/arch/arm/dts/px30-u-boot.dtsi -+++ b/arch/arm/dts/px30-u-boot.dtsi -@@ -16,7 +16,7 @@ - }; - - dmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "rockchip,px30-dmc", "syscon"; - reg = <0x0 0xff2a0000 0x0 0x1000>; - }; -@@ -30,69 +30,69 @@ - - &uart2 { - clock-frequency = <24000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart5 { - clock-frequency = <24000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - - /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */ - u-boot,spl-fifo-mode; - }; - - &emmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - - /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */ - u-boot,spl-fifo-mode; - }; - - &grf { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pmugrf { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &xin24m { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &cru { -- u-boot,dm-pre-reloc; -+ bootph-all; - /delete-property/ assigned-clocks; - /delete-property/ assigned-clock-rates; - }; - - &pmucru { -- u-boot,dm-pre-reloc; -+ bootph-all; - /delete-property/ assigned-clocks; - /delete-property/ assigned-clock-rates; - }; - - &saradc { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - - &gpio0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/qcom-ipq4019.dtsi b/arch/arm/dts/qcom-ipq4019.dtsi -index 6edc69da67..0850ae56e9 100644 ---- a/arch/arm/dts/qcom-ipq4019.dtsi -+++ b/arch/arm/dts/qcom-ipq4019.dtsi -@@ -56,7 +56,7 @@ - reg = <0x1800000 0x60000>; - #clock-cells = <1>; - #reset-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - rng: rng@22000 { -@@ -71,7 +71,7 @@ - reg = <0x1800000 0x60000>; - #clock-cells = <1>; - #reset-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - soc_gpios: pinctrl@1000000 { -@@ -81,7 +81,7 @@ - gpio-count = <100>; - gpio-bank-name="soc"; - #gpio-cells = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - blsp1_uart1: serial@78af000 { -@@ -90,7 +90,7 @@ - clock = <&gcc GCC_BLSP1_UART1_APPS_CLK>; - bit-rate = <0xFF>; - status = "disabled"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - blsp1_spi1: spi@78b5000 { -@@ -100,7 +100,7 @@ - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - mdio: mdio@90000 { -diff --git a/arch/arm/dts/qcs404-evb-uboot.dtsi b/arch/arm/dts/qcs404-evb-uboot.dtsi -index c73d71e8c7..b4c5f3fa43 100644 ---- a/arch/arm/dts/qcs404-evb-uboot.dtsi -+++ b/arch/arm/dts/qcs404-evb-uboot.dtsi -@@ -7,18 +7,18 @@ - - / { - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - - pinctrl_north@1300000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - clock-controller@1800000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - serial@78b1000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -diff --git a/arch/arm/dts/r7s72100-gr-peach-u-boot.dts b/arch/arm/dts/r7s72100-gr-peach-u-boot.dts -index 5b176a9acd..0ae9f91fbe 100644 ---- a/arch/arm/dts/r7s72100-gr-peach-u-boot.dts -+++ b/arch/arm/dts/r7s72100-gr-peach-u-boot.dts -@@ -13,7 +13,7 @@ - }; - - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - leds { -@@ -70,20 +70,20 @@ - }; - - &ostm0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &scif2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - clock = <66666666>; /* ToDo: Replace by DM clock driver */ - }; - - &scif2_pins { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &usbhs0 { -diff --git a/arch/arm/dts/r8a774a1-u-boot.dtsi b/arch/arm/dts/r8a774a1-u-boot.dtsi -index f826c41c3b..cddffe8764 100644 ---- a/arch/arm/dts/r8a774a1-u-boot.dtsi -+++ b/arch/arm/dts/r8a774a1-u-boot.dtsi -@@ -8,7 +8,7 @@ - #include "r8a779x-u-boot.dtsi" - - &extalr_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - /delete-node/ &audma0; -diff --git a/arch/arm/dts/r8a774b1-u-boot.dtsi b/arch/arm/dts/r8a774b1-u-boot.dtsi -index 6fab78e776..3b34f82160 100644 ---- a/arch/arm/dts/r8a774b1-u-boot.dtsi -+++ b/arch/arm/dts/r8a774b1-u-boot.dtsi -@@ -8,7 +8,7 @@ - #include "r8a779x-u-boot.dtsi" - - &extalr_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - /delete-node/ &audma0; -diff --git a/arch/arm/dts/r8a774e1-u-boot.dtsi b/arch/arm/dts/r8a774e1-u-boot.dtsi -index 74758dfedf..e86287098b 100644 ---- a/arch/arm/dts/r8a774e1-u-boot.dtsi -+++ b/arch/arm/dts/r8a774e1-u-boot.dtsi -@@ -8,7 +8,7 @@ - #include "r8a779x-u-boot.dtsi" - - &extalr_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - /delete-node/ &audma0; -diff --git a/arch/arm/dts/r8a7790-lager-u-boot.dts b/arch/arm/dts/r8a7790-lager-u-boot.dts -index fecf7e77ae..28b8b604c3 100644 ---- a/arch/arm/dts/r8a7790-lager-u-boot.dts -+++ b/arch/arm/dts/r8a7790-lager-u-boot.dts -@@ -9,7 +9,7 @@ - #include "r8a7790-u-boot.dtsi" - - &scif0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &qspi { -diff --git a/arch/arm/dts/r8a7790-stout-u-boot.dts b/arch/arm/dts/r8a7790-stout-u-boot.dts -index 1396764d32..85bcb78761 100644 ---- a/arch/arm/dts/r8a7790-stout-u-boot.dts -+++ b/arch/arm/dts/r8a7790-stout-u-boot.dts -@@ -9,7 +9,7 @@ - #include "r8a7790-u-boot.dtsi" - - &scifa0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &qspi { -diff --git a/arch/arm/dts/r8a7790-u-boot.dtsi b/arch/arm/dts/r8a7790-u-boot.dtsi -index 87dbcafe31..45e2fa6f9f 100644 ---- a/arch/arm/dts/r8a7790-u-boot.dtsi -+++ b/arch/arm/dts/r8a7790-u-boot.dtsi -@@ -8,13 +8,13 @@ - #include "r8a779x-u-boot.dtsi" - - &usb_extal_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pfc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &rst { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/r8a7791-koelsch-u-boot.dts b/arch/arm/dts/r8a7791-koelsch-u-boot.dts -index 4a98528099..c5a1332131 100644 ---- a/arch/arm/dts/r8a7791-koelsch-u-boot.dts -+++ b/arch/arm/dts/r8a7791-koelsch-u-boot.dts -@@ -9,7 +9,7 @@ - #include "r8a7791-u-boot.dtsi" - - &scif0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &qspi { -diff --git a/arch/arm/dts/r8a7791-porter-u-boot.dts b/arch/arm/dts/r8a7791-porter-u-boot.dts -index 82051be824..bfec1fc6d6 100644 ---- a/arch/arm/dts/r8a7791-porter-u-boot.dts -+++ b/arch/arm/dts/r8a7791-porter-u-boot.dts -@@ -9,7 +9,7 @@ - #include "r8a7791-u-boot.dtsi" - - &scif0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &i2c6 { -diff --git a/arch/arm/dts/r8a7791-u-boot.dtsi b/arch/arm/dts/r8a7791-u-boot.dtsi -index 7a9938054a..7143ffc165 100644 ---- a/arch/arm/dts/r8a7791-u-boot.dtsi -+++ b/arch/arm/dts/r8a7791-u-boot.dtsi -@@ -8,13 +8,13 @@ - #include "r8a779x-u-boot.dtsi" - - &usb_extal_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pfc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &rst { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/r8a7792-blanche-u-boot.dts b/arch/arm/dts/r8a7792-blanche-u-boot.dts -index 30b27040f5..1f33df81ce 100644 ---- a/arch/arm/dts/r8a7792-blanche-u-boot.dts -+++ b/arch/arm/dts/r8a7792-blanche-u-boot.dts -@@ -13,5 +13,5 @@ - }; - - &scif0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/r8a7792-u-boot.dtsi b/arch/arm/dts/r8a7792-u-boot.dtsi -index bb72d5edbb..214cfde1f8 100644 ---- a/arch/arm/dts/r8a7792-u-boot.dtsi -+++ b/arch/arm/dts/r8a7792-u-boot.dtsi -@@ -8,9 +8,9 @@ - #include "r8a779x-u-boot.dtsi" - - &pfc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &rst { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/r8a7793-gose-u-boot.dts b/arch/arm/dts/r8a7793-gose-u-boot.dts -index a35d35c335..dd0932ceca 100644 ---- a/arch/arm/dts/r8a7793-gose-u-boot.dts -+++ b/arch/arm/dts/r8a7793-gose-u-boot.dts -@@ -9,7 +9,7 @@ - #include "r8a7793-u-boot.dtsi" - - &scif0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &qspi { -diff --git a/arch/arm/dts/r8a7793-u-boot.dtsi b/arch/arm/dts/r8a7793-u-boot.dtsi -index 4858b171b5..fb947462c5 100644 ---- a/arch/arm/dts/r8a7793-u-boot.dtsi -+++ b/arch/arm/dts/r8a7793-u-boot.dtsi -@@ -8,13 +8,13 @@ - #include "r8a779x-u-boot.dtsi" - - &usb_extal_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pfc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &rst { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/r8a7794-alt-u-boot.dts b/arch/arm/dts/r8a7794-alt-u-boot.dts -index 29b0e32d14..0a39039fc9 100644 ---- a/arch/arm/dts/r8a7794-alt-u-boot.dts -+++ b/arch/arm/dts/r8a7794-alt-u-boot.dts -@@ -38,7 +38,7 @@ - }; - - &scif2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &qspi { -diff --git a/arch/arm/dts/r8a7794-silk-u-boot.dts b/arch/arm/dts/r8a7794-silk-u-boot.dts -index 179753d7cf..3fcb535a3a 100644 ---- a/arch/arm/dts/r8a7794-silk-u-boot.dts -+++ b/arch/arm/dts/r8a7794-silk-u-boot.dts -@@ -9,7 +9,7 @@ - #include "r8a7794-u-boot.dtsi" - - &scif2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &qspi { -diff --git a/arch/arm/dts/r8a7794-u-boot.dtsi b/arch/arm/dts/r8a7794-u-boot.dtsi -index 84c7b31989..53b54c8891 100644 ---- a/arch/arm/dts/r8a7794-u-boot.dtsi -+++ b/arch/arm/dts/r8a7794-u-boot.dtsi -@@ -8,13 +8,13 @@ - #include "r8a779x-u-boot.dtsi" - - &usb_extal_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pfc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &rst { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/r8a77950-salvator-x-u-boot.dts b/arch/arm/dts/r8a77950-salvator-x-u-boot.dts -index d94ad91973..ba7cf521d0 100644 ---- a/arch/arm/dts/r8a77950-salvator-x-u-boot.dts -+++ b/arch/arm/dts/r8a77950-salvator-x-u-boot.dts -@@ -12,15 +12,15 @@ - sysinfo { - compatible = "renesas,rcar-sysinfo"; - i2c-eeprom = <&sysinfo_eeprom>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &i2c_dvfs { -- u-boot,dm-pre-reloc; -+ bootph-all; - - sysinfo_eeprom: eeprom@50 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - }; -diff --git a/arch/arm/dts/r8a77950-u-boot.dtsi b/arch/arm/dts/r8a77950-u-boot.dtsi -index 2306c7bab8..92907ea09b 100644 ---- a/arch/arm/dts/r8a77950-u-boot.dtsi -+++ b/arch/arm/dts/r8a77950-u-boot.dtsi -@@ -8,7 +8,7 @@ - #include "r8a779x-u-boot.dtsi" - - &extalr_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - / { -diff --git a/arch/arm/dts/r8a77950-ulcb-u-boot.dts b/arch/arm/dts/r8a77950-ulcb-u-boot.dts -index ff00ccdb5b..e371cde349 100644 ---- a/arch/arm/dts/r8a77950-ulcb-u-boot.dts -+++ b/arch/arm/dts/r8a77950-ulcb-u-boot.dts -@@ -21,18 +21,18 @@ - sysinfo { - compatible = "renesas,rcar-sysinfo"; - i2c-eeprom = <&sysinfo_eeprom>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &i2c_dvfs { -- u-boot,dm-pre-reloc; -+ bootph-all; - - sysinfo_eeprom: eeprom@50 { - compatible = "rohm,br24t01", "atmel,24c01"; - reg = <0x50>; - pagesize = <8>; -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - }; -diff --git a/arch/arm/dts/r8a77960-salvator-x-u-boot.dts b/arch/arm/dts/r8a77960-salvator-x-u-boot.dts -index 79a54f38c1..2a9f0aa218 100644 ---- a/arch/arm/dts/r8a77960-salvator-x-u-boot.dts -+++ b/arch/arm/dts/r8a77960-salvator-x-u-boot.dts -@@ -12,15 +12,15 @@ - sysinfo { - compatible = "renesas,rcar-sysinfo"; - i2c-eeprom = <&sysinfo_eeprom>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &i2c_dvfs { -- u-boot,dm-pre-reloc; -+ bootph-all; - - sysinfo_eeprom: eeprom@50 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - }; -diff --git a/arch/arm/dts/r8a77960-u-boot.dtsi b/arch/arm/dts/r8a77960-u-boot.dtsi -index f64e5a416b..15a9147432 100644 ---- a/arch/arm/dts/r8a77960-u-boot.dtsi -+++ b/arch/arm/dts/r8a77960-u-boot.dtsi -@@ -8,7 +8,7 @@ - #include "r8a779x-u-boot.dtsi" - - &extalr_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - / { -diff --git a/arch/arm/dts/r8a77960-ulcb-u-boot.dts b/arch/arm/dts/r8a77960-ulcb-u-boot.dts -index 1e9e8b87d5..79042b2085 100644 ---- a/arch/arm/dts/r8a77960-ulcb-u-boot.dts -+++ b/arch/arm/dts/r8a77960-ulcb-u-boot.dts -@@ -21,18 +21,18 @@ - sysinfo { - compatible = "renesas,rcar-sysinfo"; - i2c-eeprom = <&sysinfo_eeprom>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &i2c_dvfs { -- u-boot,dm-pre-reloc; -+ bootph-all; - - sysinfo_eeprom: eeprom@50 { - compatible = "rohm,br24t01", "atmel,24c01"; - reg = <0x50>; - pagesize = <8>; -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - }; -diff --git a/arch/arm/dts/r8a77965-salvator-x-u-boot.dts b/arch/arm/dts/r8a77965-salvator-x-u-boot.dts -index 4272ecc110..e5421f9ca8 100644 ---- a/arch/arm/dts/r8a77965-salvator-x-u-boot.dts -+++ b/arch/arm/dts/r8a77965-salvator-x-u-boot.dts -@@ -12,15 +12,15 @@ - sysinfo { - compatible = "renesas,rcar-sysinfo"; - i2c-eeprom = <&sysinfo_eeprom>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &i2c_dvfs { -- u-boot,dm-pre-reloc; -+ bootph-all; - - sysinfo_eeprom: eeprom@50 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - }; -diff --git a/arch/arm/dts/r8a77965-u-boot.dtsi b/arch/arm/dts/r8a77965-u-boot.dtsi -index c4abcc5a9b..54107d1ae3 100644 ---- a/arch/arm/dts/r8a77965-u-boot.dtsi -+++ b/arch/arm/dts/r8a77965-u-boot.dtsi -@@ -8,7 +8,7 @@ - #include "r8a779x-u-boot.dtsi" - - &extalr_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - / { -diff --git a/arch/arm/dts/r8a77965-ulcb-u-boot.dts b/arch/arm/dts/r8a77965-ulcb-u-boot.dts -index d9c680b171..969911d89c 100644 ---- a/arch/arm/dts/r8a77965-ulcb-u-boot.dts -+++ b/arch/arm/dts/r8a77965-ulcb-u-boot.dts -@@ -21,18 +21,18 @@ - sysinfo { - compatible = "renesas,rcar-sysinfo"; - i2c-eeprom = <&sysinfo_eeprom>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &i2c_dvfs { -- u-boot,dm-pre-reloc; -+ bootph-all; - - sysinfo_eeprom: eeprom@50 { - compatible = "rohm,br24t01", "atmel,24c01"; - reg = <0x50>; - pagesize = <8>; -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - }; -diff --git a/arch/arm/dts/r8a77970-u-boot.dtsi b/arch/arm/dts/r8a77970-u-boot.dtsi -index 614caa9e9c..d252c2e8e6 100644 ---- a/arch/arm/dts/r8a77970-u-boot.dtsi -+++ b/arch/arm/dts/r8a77970-u-boot.dtsi -@@ -8,7 +8,7 @@ - #include "r8a779x-u-boot.dtsi" - - &extalr_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - / { -diff --git a/arch/arm/dts/r8a77980-condor-u-boot.dts b/arch/arm/dts/r8a77980-condor-u-boot.dts -index 530abdb72b..f4a3b43b8f 100644 ---- a/arch/arm/dts/r8a77980-condor-u-boot.dts -+++ b/arch/arm/dts/r8a77980-condor-u-boot.dts -@@ -16,18 +16,18 @@ - sysinfo { - compatible = "renesas,rcar-sysinfo"; - i2c-eeprom = <&sysinfo_eeprom>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &i2c0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - sysinfo_eeprom: eeprom@50 { - compatible = "rohm,br24t01", "atmel,24c01"; - reg = <0x50>; - pagesize = <8>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -diff --git a/arch/arm/dts/r8a77980-u-boot.dtsi b/arch/arm/dts/r8a77980-u-boot.dtsi -index 54f01c926d..9f7bf499bc 100644 ---- a/arch/arm/dts/r8a77980-u-boot.dtsi -+++ b/arch/arm/dts/r8a77980-u-boot.dtsi -@@ -8,7 +8,7 @@ - #include "r8a779x-u-boot.dtsi" - - &extalr_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - / { -diff --git a/arch/arm/dts/r8a77990-ebisu-u-boot.dts b/arch/arm/dts/r8a77990-ebisu-u-boot.dts -index 55699bafc4..fc1c4a7929 100644 ---- a/arch/arm/dts/r8a77990-ebisu-u-boot.dts -+++ b/arch/arm/dts/r8a77990-ebisu-u-boot.dts -@@ -12,7 +12,7 @@ - sysinfo { - compatible = "renesas,rcar-sysinfo"; - i2c-eeprom = <&sysinfo_eeprom>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -20,13 +20,13 @@ - compatible = "renesas,iic-r8a77990", - "renesas,rcar-gen3-iic", - "renesas,rmobile-iic"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - sysinfo_eeprom: eeprom@50 { - compatible = "rohm,br24t01", "atmel,24c01"; - reg = <0x50>; - pagesize = <8>; -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - }; -diff --git a/arch/arm/dts/r8a77995-draak-u-boot.dts b/arch/arm/dts/r8a77995-draak-u-boot.dts -index 260bc5da19..41ceae1da7 100644 ---- a/arch/arm/dts/r8a77995-draak-u-boot.dts -+++ b/arch/arm/dts/r8a77995-draak-u-boot.dts -@@ -12,18 +12,18 @@ - sysinfo { - compatible = "renesas,rcar-sysinfo"; - i2c-eeprom = <&sysinfo_eeprom>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &i2c0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - sysinfo_eeprom: eeprom@50 { - compatible = "rohm,br24t01", "atmel,24c01"; - reg = <0x50>; - pagesize = <8>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -diff --git a/arch/arm/dts/r8a779a0-u-boot.dtsi b/arch/arm/dts/r8a779a0-u-boot.dtsi -index 9f2772a948..2b6d6ef05d 100644 ---- a/arch/arm/dts/r8a779a0-u-boot.dtsi -+++ b/arch/arm/dts/r8a779a0-u-boot.dtsi -@@ -21,5 +21,5 @@ - }; - - &extalr_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/r8a779x-u-boot.dtsi b/arch/arm/dts/r8a779x-u-boot.dtsi -index a6bf75182e..001ac59adb 100644 ---- a/arch/arm/dts/r8a779x-u-boot.dtsi -+++ b/arch/arm/dts/r8a779x-u-boot.dtsi -@@ -7,18 +7,18 @@ - - / { - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &cpg { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &extal_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &prr { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/rk3036-sdk-u-boot.dtsi b/arch/arm/dts/rk3036-sdk-u-boot.dtsi -index 754800c6e6..ef7e0207c3 100644 ---- a/arch/arm/dts/rk3036-sdk-u-boot.dtsi -+++ b/arch/arm/dts/rk3036-sdk-u-boot.dtsi -@@ -1,13 +1,13 @@ - #include "rk3036-u-boot.dtsi" - - &uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &grf { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/rk3066a-mk808-u-boot.dtsi b/arch/arm/dts/rk3066a-mk808-u-boot.dtsi -index e0aa929fce..4474be962d 100644 ---- a/arch/arm/dts/rk3066a-mk808-u-boot.dtsi -+++ b/arch/arm/dts/rk3066a-mk808-u-boot.dtsi -@@ -9,7 +9,7 @@ - }; - - &cru { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &dmc { -@@ -27,7 +27,7 @@ - &mmc0 { - fifo-mode; - max-frequency = <4000000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - u-boot,spl-fifo-mode; - }; - -@@ -41,9 +41,9 @@ - - &timer2 { - clock-frequency = <24000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/rk3128-evb-u-boot.dtsi b/arch/arm/dts/rk3128-evb-u-boot.dtsi -index 8b16bbe41c..2f20cacc7a 100644 ---- a/arch/arm/dts/rk3128-evb-u-boot.dtsi -+++ b/arch/arm/dts/rk3128-evb-u-boot.dtsi -@@ -3,5 +3,5 @@ - #include "rk3128-u-boot.dtsi" - - &emmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/rk3128-u-boot.dtsi b/arch/arm/dts/rk3128-u-boot.dtsi -index 4a98e2496f..6d1965e6b5 100644 ---- a/arch/arm/dts/rk3128-u-boot.dtsi -+++ b/arch/arm/dts/rk3128-u-boot.dtsi -@@ -6,14 +6,14 @@ - dmc: dmc@20004000 { - compatible = "rockchip,rk3128-dmc", "syscon"; - reg = <0x0 0x20004000 0x0 0x1000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &cru { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &grf { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/rk3188-radxarock-u-boot.dtsi b/arch/arm/dts/rk3188-radxarock-u-boot.dtsi -index de29959827..7bcbc2967a 100644 ---- a/arch/arm/dts/rk3188-radxarock-u-boot.dtsi -+++ b/arch/arm/dts/rk3188-radxarock-u-boot.dtsi -@@ -13,12 +13,12 @@ - - config { - u-boot,boot-led = "rock:red:power"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &cru { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &dmc { -@@ -48,14 +48,14 @@ - }; - - &pinctrl { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &timer3 { - clock-frequency = <24000000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/rk3229-evb-u-boot.dtsi b/arch/arm/dts/rk3229-evb-u-boot.dtsi -index b65149c249..4a4e4cc0c9 100644 ---- a/arch/arm/dts/rk3229-evb-u-boot.dtsi -+++ b/arch/arm/dts/rk3229-evb-u-boot.dtsi -@@ -20,9 +20,9 @@ - }; - - &emmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/rk322x-u-boot.dtsi b/arch/arm/dts/rk322x-u-boot.dtsi -index 79c41e481b..aea917544b 100644 ---- a/arch/arm/dts/rk322x-u-boot.dtsi -+++ b/arch/arm/dts/rk322x-u-boot.dtsi -@@ -29,18 +29,18 @@ - rockchip,grf = <&grf>; - rockchip,msch = <&service_msch>; - rockchip,sram = <&ddr_sram>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - service_msch: syscon@31090000 { - compatible = "rockchip,rk3228-msch", "syscon"; - reg = <0x31090000 0x2000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &cru { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &emmc { -@@ -48,7 +48,7 @@ - }; - - &grf { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc { -diff --git a/arch/arm/dts/rk3288-evb-u-boot.dtsi b/arch/arm/dts/rk3288-evb-u-boot.dtsi -index c8f5120711..686ed2cd5d 100644 ---- a/arch/arm/dts/rk3288-evb-u-boot.dtsi -+++ b/arch/arm/dts/rk3288-evb-u-boot.dtsi -@@ -17,41 +17,41 @@ - }; - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &emmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio8 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc_bus4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc_clk { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc_cmd { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc_pwr { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/rk3288-firefly-u-boot.dtsi b/arch/arm/dts/rk3288-firefly-u-boot.dtsi -index cc84d7c4ae..644198a4a2 100644 ---- a/arch/arm/dts/rk3288-firefly-u-boot.dtsi -+++ b/arch/arm/dts/rk3288-firefly-u-boot.dtsi -@@ -7,19 +7,19 @@ - - / { - config { -- u-boot,dm-pre-reloc; -+ bootph-all; - u-boot,boot-led = "firefly:green:power"; - }; - - leds { -- u-boot,dm-pre-reloc; -+ bootph-all; - - work { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - power { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -@@ -37,45 +37,45 @@ - }; - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &emmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio8 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pcfg_pull_up_drv_12ma { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc_bus4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc_clk { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc_cmd { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc_pwr { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/rk3288-miqi-u-boot.dtsi b/arch/arm/dts/rk3288-miqi-u-boot.dtsi -index 2a74fdd15f..43cb48bd03 100644 ---- a/arch/arm/dts/rk3288-miqi-u-boot.dtsi -+++ b/arch/arm/dts/rk3288-miqi-u-boot.dtsi -@@ -6,10 +6,10 @@ - #include "rk3288-u-boot.dtsi" - / { - leds { -- u-boot,dm-pre-reloc; -+ bootph-all; - - work { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -@@ -26,33 +26,33 @@ - }; - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &emmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc_bus4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc_clk { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc_cmd { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc_pwr { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/rk3288-phycore-rdk-u-boot.dtsi b/arch/arm/dts/rk3288-phycore-rdk-u-boot.dtsi -index 30f4cb106e..383b383acc 100644 ---- a/arch/arm/dts/rk3288-phycore-rdk-u-boot.dtsi -+++ b/arch/arm/dts/rk3288-phycore-rdk-u-boot.dtsi -@@ -16,29 +16,29 @@ - }; - - &emmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &i2c0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - rk818: pmic@1c { -- u-boot,dm-pre-reloc; -+ bootph-all; - - regulators { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/rk3288-popmetal-u-boot.dtsi b/arch/arm/dts/rk3288-popmetal-u-boot.dtsi -index 3782253c8a..57d602619d 100644 ---- a/arch/arm/dts/rk3288-popmetal-u-boot.dtsi -+++ b/arch/arm/dts/rk3288-popmetal-u-boot.dtsi -@@ -17,41 +17,41 @@ - }; - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &emmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio8 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc_bus4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc_clk { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc_cmd { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc_pwr { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/rk3288-rock-pi-n8-u-boot.dtsi b/arch/arm/dts/rk3288-rock-pi-n8-u-boot.dtsi -index 538607dd73..86da1f4c06 100644 ---- a/arch/arm/dts/rk3288-rock-pi-n8-u-boot.dtsi -+++ b/arch/arm/dts/rk3288-rock-pi-n8-u-boot.dtsi -@@ -23,17 +23,17 @@ - }; - - &sdmmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &emmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/rk3288-rock2-square-u-boot.dtsi b/arch/arm/dts/rk3288-rock2-square-u-boot.dtsi -index 509f789b98..ea4a6e0046 100644 ---- a/arch/arm/dts/rk3288-rock2-square-u-boot.dtsi -+++ b/arch/arm/dts/rk3288-rock2-square-u-boot.dtsi -@@ -14,17 +14,17 @@ - }; - - &gpio7 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/rk3288-tinker-s-u-boot.dtsi b/arch/arm/dts/rk3288-tinker-s-u-boot.dtsi -index a177fca73a..b4c5483146 100644 ---- a/arch/arm/dts/rk3288-tinker-s-u-boot.dtsi -+++ b/arch/arm/dts/rk3288-tinker-s-u-boot.dtsi -@@ -14,21 +14,21 @@ - }; - - &emmc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &emmc_clk { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &emmc_cmd { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &emmc_pwr { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &emmc_bus8 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/rk3288-tinker-u-boot.dtsi b/arch/arm/dts/rk3288-tinker-u-boot.dtsi -index 56d10c82ec..0cf1b696d1 100644 ---- a/arch/arm/dts/rk3288-tinker-u-boot.dtsi -+++ b/arch/arm/dts/rk3288-tinker-u-boot.dtsi -@@ -6,7 +6,7 @@ - #include "rk3288-u-boot.dtsi" - - &dmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d - 0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6 - 0x4 0x8 0x4 0x76 0x4 0x0 0x30 0x0 -@@ -25,61 +25,61 @@ - }; - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart2_xfer { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio7 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &vcc_sd { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pcfg_pull_none_drv_8ma { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pcfg_pull_up_drv_8ma { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pcfg_pull_none { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pcfg_pull_up { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc_bus4 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc_cd { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc_clk { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc_cmd { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc_pwr { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi -index e411445ed6..1894162153 100644 ---- a/arch/arm/dts/rk3288-u-boot.dtsi -+++ b/arch/arm/dts/rk3288-u-boot.dtsi -@@ -46,13 +46,13 @@ - rockchip,pmu = <&pmu>; - rockchip,sgrf = <&sgrf>; - rockchip,sram = <&ddr_sram>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - noc: syscon@ffac0000 { - compatible = "rockchip,rk3288-noc", "syscon"; - reg = <0xffac0000 0x2000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -88,23 +88,23 @@ - }; - - &cru { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio7 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &grf { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pmu { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sgrf { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0 { -@@ -124,9 +124,9 @@ - }; - - &vopb { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &vopl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi b/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi -index 251fbdee71..90ce9e1395 100644 ---- a/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi -+++ b/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi -@@ -17,17 +17,17 @@ - }; - - &sdmmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &emmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/rk3288-veyron-u-boot.dtsi b/arch/arm/dts/rk3288-veyron-u-boot.dtsi -index 21e1aec291..ab564e73ed 100644 ---- a/arch/arm/dts/rk3288-veyron-u-boot.dtsi -+++ b/arch/arm/dts/rk3288-veyron-u-boot.dtsi -@@ -32,41 +32,41 @@ - }; - - &gpio3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio7 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio8 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &i2c0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &rk808 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &spi2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &spi_flash { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/rk3288-vyasa-u-boot.dtsi b/arch/arm/dts/rk3288-vyasa-u-boot.dtsi -index 7730d17228..8f50bfe898 100644 ---- a/arch/arm/dts/rk3288-vyasa-u-boot.dtsi -+++ b/arch/arm/dts/rk3288-vyasa-u-boot.dtsi -@@ -18,17 +18,17 @@ - }; - - &sdmmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &emmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/rk3308-evb-u-boot.dtsi b/arch/arm/dts/rk3308-evb-u-boot.dtsi -index c6ea746de0..d15ba94d37 100644 ---- a/arch/arm/dts/rk3308-evb-u-boot.dtsi -+++ b/arch/arm/dts/rk3308-evb-u-boot.dtsi -@@ -11,7 +11,7 @@ - }; - - &uart4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - clock-frequency = <24000000>; - status = "okay"; - }; -diff --git a/arch/arm/dts/rk3308-roc-cc-u-boot.dtsi b/arch/arm/dts/rk3308-roc-cc-u-boot.dtsi -index ffbe742053..97d922c435 100644 ---- a/arch/arm/dts/rk3308-roc-cc-u-boot.dtsi -+++ b/arch/arm/dts/rk3308-roc-cc-u-boot.dtsi -@@ -11,7 +11,7 @@ - }; - - &uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - clock-frequency = <24000000>; - status = "okay"; - }; -diff --git a/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi b/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi -index 27735c49dd..a27a3adc08 100644 ---- a/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi -+++ b/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi -@@ -11,7 +11,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - clock-frequency = <24000000>; - status = "okay"; - }; -diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi -index ab5bfc2ce9..c8451b2475 100644 ---- a/arch/arm/dts/rk3308-u-boot.dtsi -+++ b/arch/arm/dts/rk3308-u-boot.dtsi -@@ -13,24 +13,24 @@ - }; - - &cru { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &dmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &emmc { - /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */ - u-boot,spl-fifo-mode; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &grf { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &saradc { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; -diff --git a/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi b/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi -index 16c33735eb..04028bf649 100644 ---- a/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi -+++ b/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi -@@ -20,7 +20,7 @@ - }; - - dmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "rockchip,px30-dmc", "syscon"; - reg = <0x0 0xff2a0000 0x0 0x1000>; - }; -@@ -34,7 +34,7 @@ - - /* U-Boot clk driver for px30 cannot set GPU_CLK */ - &cru { -- u-boot,dm-pre-reloc; -+ bootph-all; - assigned-clocks = <&cru PLL_NPLL>, - <&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>, - <&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>, -@@ -47,63 +47,63 @@ - }; - - &gpio0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &grf { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pmucru { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pmugrf { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &saradc { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - - &sdmmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - - /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */ - u-boot,spl-fifo-mode; - }; - - &sfc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &{/spi@ff3a0000/flash@0} { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart1 { - clock-frequency = <24000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart2 { - clock-frequency = <24000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &xin24m { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi -index 8db5e55af6..78d37ab475 100644 ---- a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi -+++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi -@@ -13,24 +13,24 @@ - }; - - &gpio0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc0m1_pin { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pcfg_pull_up_4ma { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - /* Need this and all the pinctrl/gpio stuff above to set pinmux */ - &vcc_sd { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gmac2io { -diff --git a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi -index 20a62134a0..27a454f017 100644 ---- a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi -+++ b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi -@@ -33,19 +33,19 @@ - }; - - &gpio0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc0m1_pin { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pcfg_pull_up_4ma { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb_host0_xhci { -@@ -64,5 +64,5 @@ - - /* Need this and all the pinctrl/gpio stuff above to set pinmux */ - &vcc_sd { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi -index 9d557eb988..088e21c76a 100644 ---- a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi -+++ b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi -@@ -30,19 +30,19 @@ - }; - - &gpio0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc0m1_pin { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pcfg_pull_up_4ma { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb_host0_xhci { -@@ -52,5 +52,5 @@ - - /* Need this and all the pinctrl/gpio stuff above to set pinmux */ - &vcc_sd { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi -index 3c3b1370e3..c20a99a620 100644 ---- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi -+++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi -@@ -33,19 +33,19 @@ - }; - - &gpio0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pinctrl { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc0m1_pin { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pcfg_pull_up_4ma { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb_host0_xhci { -@@ -65,11 +65,11 @@ - - /* Need this and all the pinctrl/gpio stuff above to set pinmux */ - &vcc_sd { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &spi0 { - spi_flash: spiflash@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; -diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi -index d4a7540a92..668f8ca29d 100644 ---- a/arch/arm/dts/rk3328-u-boot.dtsi -+++ b/arch/arm/dts/rk3328-u-boot.dtsi -@@ -17,7 +17,7 @@ - }; - - dmc: dmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "rockchip,rk3328-dmc"; - reg = <0x0 0xff400000 0x0 0x1000 - 0x0 0xff780000 0x0 0x3000 -@@ -40,27 +40,27 @@ - }; - - &cru { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &grf { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - clock-frequency = <24000000>; - }; - - &emmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - - /* mmc to sram can't do dma, prevent aborts transfering TF-A parts */ - u-boot,spl-fifo-mode; - }; - - &sdmmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - - /* mmc to sram can't do dma, prevent aborts transfering TF-A parts */ - u-boot,spl-fifo-mode; -@@ -71,5 +71,5 @@ - }; - - &spi0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/rk3368-geekbox-u-boot.dtsi b/arch/arm/dts/rk3368-geekbox-u-boot.dtsi -index 0b724fa45f..cfc8b9340a 100644 ---- a/arch/arm/dts/rk3368-geekbox-u-boot.dtsi -+++ b/arch/arm/dts/rk3368-geekbox-u-boot.dtsi -@@ -6,30 +6,30 @@ - #include "rk3368-u-boot.dtsi" - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &service_msch { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &dmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - - &pmugrf { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &cru { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &grf { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/rk3368-lion-haikou-u-boot.dtsi b/arch/arm/dts/rk3368-lion-haikou-u-boot.dtsi -index 7826d1e70b..a3c2b707e9 100644 ---- a/arch/arm/dts/rk3368-lion-haikou-u-boot.dtsi -+++ b/arch/arm/dts/rk3368-lion-haikou-u-boot.dtsi -@@ -39,19 +39,19 @@ - }; - - &gpio2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &service_msch { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &dmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - - /* - * Validation of throughput using SPEC2000 shows the following -@@ -75,43 +75,43 @@ - }; - - &pmugrf { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sgrf { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &cru { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &grf { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &emmc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &spi1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - spiflash: w25q32dw@0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &timer0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - clock-frequency = <24000000>; - status = "okay"; - }; -diff --git a/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi b/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi -index 264fb7adf0..0ddb0d8f25 100644 ---- a/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi -+++ b/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi -@@ -12,7 +12,7 @@ - }; - - &dmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - - /* - * PX5-evb(2GB) need to use CBRD mode, or else the dram is not correct -@@ -28,46 +28,46 @@ - }; - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &service_msch { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &dmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - - &pmugrf { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sgrf { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &cru { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &grf { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &emmc { - /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */ - u-boot,spl-fifo-mode; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &timer0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - clock-frequency = <24000000>; - status = "okay"; - }; -diff --git a/arch/arm/dts/rk3368-sheep-u-boot.dtsi b/arch/arm/dts/rk3368-sheep-u-boot.dtsi -index 0b724fa45f..cfc8b9340a 100644 ---- a/arch/arm/dts/rk3368-sheep-u-boot.dtsi -+++ b/arch/arm/dts/rk3368-sheep-u-boot.dtsi -@@ -6,30 +6,30 @@ - #include "rk3368-u-boot.dtsi" - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &service_msch { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &dmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - - &pmugrf { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &cru { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &grf { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/rk3399-evb-u-boot.dtsi b/arch/arm/dts/rk3399-evb-u-boot.dtsi -index 5e39b1493d..dfce63e4d4 100644 ---- a/arch/arm/dts/rk3399-evb-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-evb-u-boot.dtsi -@@ -14,11 +14,11 @@ - }; - - &i2c0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &rk808 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &tcphy1 { -@@ -39,7 +39,7 @@ - }; - - &sdmmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; -diff --git a/arch/arm/dts/rk3399-gru-u-boot.dtsi b/arch/arm/dts/rk3399-gru-u-boot.dtsi -index 33734e99be..b1604a6872 100644 ---- a/arch/arm/dts/rk3399-gru-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-gru-u-boot.dtsi -@@ -61,5 +61,5 @@ - }; - - &spi_flash { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -index fd87102c0b..ea7a5a17ae 100644 ---- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -@@ -22,16 +22,16 @@ - - &sdhci { - max-frequency = <25000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc { - max-frequency = <20000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &spiflash { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &vdd_log { -diff --git a/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi -index 1dad283ad0..347243fe47 100644 ---- a/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi -@@ -22,10 +22,10 @@ - - &sdhci { - max-frequency = <25000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc { - max-frequency = <20000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi -index 088861dbf6..2b3ea6da88 100644 ---- a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi -@@ -62,11 +62,11 @@ - }; - - &gpio1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpio3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - /* - * The Qseven BIOS_DISABLE signal on the RK3399-Q7 keeps the on-module -@@ -75,7 +75,7 @@ - * eMMC and SPI after the SPL has been booted from SD Card. - */ - bios_disable_override { -- u-boot,dm-pre-reloc; -+ bootph-all; - gpios = ; - output-high; - line-name = "bios_disable_override"; -@@ -84,29 +84,29 @@ - }; - - &gpio4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &norflash { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pcfg_pull_none { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pcfg_pull_up { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc_bus4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc_cmd { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi -index e3c9364e35..f85e7b62d9 100644 ---- a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi -@@ -42,7 +42,7 @@ - - &spi1 { - spi_flash: flash@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi -index 37dff04adf..32a83b2855 100644 ---- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi -@@ -17,7 +17,7 @@ - - &spi1 { - spi_flash: flash@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi -index 8a0b1803f3..e677ae678d 100644 ---- a/arch/arm/dts/rk3399-u-boot.dtsi -+++ b/arch/arm/dts/rk3399-u-boot.dtsi -@@ -15,13 +15,13 @@ - }; - - cic: syscon@ff620000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "rockchip,rk3399-cic", "syscon"; - reg = <0x0 0xff620000 0x0 0x100>; - }; - - dfi: dfi@ff630000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x00 0xff630000 0x00 0x4000>; - compatible = "rockchip,rk3399-dfi"; - rockchip,pmu = <&pmugrf>; -@@ -36,7 +36,7 @@ - }; - - dmc: dmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "rockchip,rk3399-dmc"; - devfreq-events = <&dfi>; - interrupts = ; -@@ -53,7 +53,7 @@ - }; - - pmusgrf: syscon@ff330000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "rockchip,rk3399-pmusgrf", "syscon"; - reg = <0x0 0xff330000 0x0 0xe3d4>; - }; -@@ -86,65 +86,65 @@ - #endif /* CONFIG_ROCKCHIP_SPI_IMAGE && CONFIG_HAS_ROM */ - - &cru { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &emmc_phy { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &grf { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pmu { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pmugrf { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pmu { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pmucru { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdhci { - max-frequency = <200000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - - /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */ - u-boot,spl-fifo-mode; - }; - - &spi1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &vopb { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &vopl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi b/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi -index 589332503e..4e79173833 100644 ---- a/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi -+++ b/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi -@@ -13,6 +13,6 @@ - - &uart2 { - clock-frequency = <24000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; -diff --git a/arch/arm/dts/rk3568-evb-u-boot.dtsi b/arch/arm/dts/rk3568-evb-u-boot.dtsi -index 17503d3d27..382a52a28b 100644 ---- a/arch/arm/dts/rk3568-evb-u-boot.dtsi -+++ b/arch/arm/dts/rk3568-evb-u-boot.dtsi -@@ -18,6 +18,6 @@ - - &uart2 { - clock-frequency = <24000000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - status = "okay"; - }; -diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi -index 04bbb01b5d..9ef1e84770 100644 ---- a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi -+++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi -@@ -23,6 +23,6 @@ - - &uart2 { - clock-frequency = <24000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; -diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi -index 6eef99e6f7..0a764ce511 100644 ---- a/arch/arm/dts/rk356x-u-boot.dtsi -+++ b/arch/arm/dts/rk356x-u-boot.dtsi -@@ -17,7 +17,7 @@ - - dmc: dmc { - compatible = "rockchip,rk3568-dmc"; -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -@@ -35,31 +35,31 @@ - }; - - &cru { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - - &pmucru { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - - &grf { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - - &pmugrf { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - - &sdhci { -- u-boot,dm-spl; -+ bootph-pre-ram; - status = "okay"; - }; - - &sdmmc0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - status = "okay"; - }; -diff --git a/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi -index 612966492b..373f369c65 100644 ---- a/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi -+++ b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi -@@ -18,7 +18,5 @@ - - &sdmmc { - bus-width = <4>; -- u-boot,dm-pre-reloc; -- u-boot,spl-fifo-mode; - status = "okay"; - }; -diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi -index 2386edf90d..8293738407 100644 ---- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi -+++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi -@@ -4,6 +4,9 @@ - */ - - #include "rk3588-u-boot.dtsi" -+#include -+#include -+#include - - / { - aliases { -@@ -11,12 +14,155 @@ - }; - - chosen { -- u-boot,spl-boot-order = &sdmmc; -+ u-boot,spl-boot-order = "same-as-spl", &sdmmc; -+ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &flash0; - }; -+ -+ vcc5v0_host: vcc5v0-host-regulator { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc5v0_host"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ enable-active-high; -+ gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&vcc5v0_host_en>; -+ vin-supply = <&vcc5v0_sys>; -+ }; -+}; -+ -+&combphy0_ps { -+ status = "okay"; -+}; -+ -+&fspim2_pins { -+ bootph-all; -+}; -+ -+&pcie2x1l2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pcie_reset_h>; -+ reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>; -+ status = "okay"; - }; - - &sdmmc { - bus-width = <4>; -- u-boot,dm-spl; -+ bootph-all; -+ u-boot,spl-fifo-mode; -+ status = "okay"; -+}; -+ -+&pinctrl { -+ bootph-all; -+ -+ pcie { -+ pcie_reset_h: pcie-reset-h { -+ rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ usb { -+ vcc5v0_host_en: vcc5v0-host-en { -+ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+}; -+ -+&pcfg_pull_up_drv_level_2 { -+ bootph-all; -+}; -+ -+&pcfg_pull_up { -+ bootph-all; -+}; -+ -+&sdmmc_bus4 { -+ bootph-all; -+}; -+ -+&sdmmc_clk { -+ bootph-all; -+}; -+ -+&sdmmc_cmd { -+ bootph-all; -+}; -+ -+&sdmmc_det { -+ bootph-all; -+}; -+ -+&usb_host0_ehci { -+ companion = <&usb_host0_ohci>; -+ phys = <&u2phy2_host>; -+ phy-names = "usb2-phy"; - status = "okay"; - }; -+ -+&usb_host0_ohci { -+ phys = <&u2phy2_host>; -+ phy-names = "usb2-phy"; -+ status = "okay"; -+}; -+ -+&usb2phy2_grf { -+ status = "okay"; -+}; -+ -+&u2phy2 { -+ resets = <&cru SRST_OTGPHY_U2_0>, <&cru SRST_P_USB2PHY_U2_0_GRF0>; -+ reset-names = "phy", "apb"; -+ clock-output-names = "usb480m_phy2"; -+ status = "okay"; -+}; -+ -+&u2phy2_host { -+ phy-supply = <&vcc5v0_host>; -+ status = "okay"; -+}; -+ -+&usb_host1_ehci { -+ companion = <&usb_host1_ohci>; -+ phys = <&u2phy3_host>; -+ phy-names = "usb2-phy"; -+ status = "okay"; -+}; -+ -+&usb_host1_ohci { -+ phys = <&u2phy3_host>; -+ phy-names = "usb2-phy"; -+ status = "okay"; -+}; -+ -+&usb2phy3_grf { -+ status = "okay"; -+}; -+ -+&u2phy3 { -+ resets = <&cru SRST_OTGPHY_U2_1>, <&cru SRST_P_USB2PHY_U2_1_GRF0>; -+ reset-names = "phy", "apb"; -+ clock-output-names = "usb480m_phy3"; -+ status = "okay"; -+}; -+ -+&u2phy3_host { -+ phy-supply = <&vcc5v0_host>; -+ status = "okay"; -+}; -+ -+&sfc { -+ bootph-all; -+ pinctrl-0 = <&fspim2_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ -+ flash0: flash@0 { -+ bootph-all; -+ compatible = "jedec,spi-nor"; -+ reg = <0>; -+ spi-max-frequency = <10000000>; -+ spi-rx-bus-width = <4>; -+ spi-tx-bus-width = <1>; -+ }; -+}; -diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi -index f880f4a167..17348c8f97 100644 ---- a/arch/arm/dts/rk3588s-u-boot.dtsi -+++ b/arch/arm/dts/rk3588s-u-boot.dtsi -@@ -4,31 +4,174 @@ - */ - - #include "rockchip-u-boot.dtsi" -+#include - - / { - dmc { - compatible = "rockchip,rk3588-dmc"; -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -+ usb_host0_ehci: usb@fc800000 { -+ compatible = "generic-ehci"; -+ reg = <0x0 0xfc800000 0x0 0x40000>; -+ interrupts = ; -+ clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>; -+ clock-names = "usbhost", "arbiter"; -+ power-domains = <&power RK3588_PD_USB>; -+ status = "disabled"; -+ }; -+ -+ usb_host0_ohci: usb@fc840000 { -+ compatible = "generic-ohci"; -+ reg = <0x0 0xfc840000 0x0 0x40000>; -+ interrupts = ; -+ clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>; -+ clock-names = "usbhost", "arbiter"; -+ power-domains = <&power RK3588_PD_USB>; -+ status = "disabled"; -+ }; -+ -+ usb_host1_ehci: usb@fc880000 { -+ compatible = "generic-ehci"; -+ reg = <0x0 0xfc880000 0x0 0x40000>; -+ interrupts = ; -+ clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>; -+ clock-names = "usbhost", "arbiter"; -+ power-domains = <&power RK3588_PD_USB>; -+ status = "disabled"; -+ }; -+ -+ usb_host1_ohci: usb@fc8c0000 { -+ compatible = "generic-ohci"; -+ reg = <0x0 0xfc8c0000 0x0 0x40000>; -+ interrupts = ; -+ clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>; -+ clock-names = "usbhost", "arbiter"; -+ power-domains = <&power RK3588_PD_USB>; -+ status = "disabled"; -+ }; -+ - pmu1_grf: syscon@fd58a000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "rockchip,rk3588-pmu1-grf", "syscon"; - reg = <0x0 0xfd58a000 0x0 0x2000>; - }; - -- sdmmc: mmc@fe2c0000 { -- compatible = "rockchip,rk3588-dw-mshc", "rockchip,rk3288-dw-mshc"; -- reg = <0x0 0xfe2c0000 0x0 0x4000>; -- interrupts = ; -- clocks = <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>, -- <&scmi_clk SCMI_HCLK_SD>, <&scmi_clk SCMI_CCLK_SD>; -- clock-names = "ciu-drive", "ciu-sample", "biu", "ciu"; -- fifo-depth = <0x100>; -- max-frequency = <200000000>; -- pinctrl-names = "default"; -- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>; -+ pipe_phy0_grf: syscon@fd5bc000 { -+ compatible = "rockchip,pipe-phy-grf", "syscon"; -+ reg = <0x0 0xfd5bc000 0x0 0x100>; -+ }; -+ -+ usb2phy2_grf: syscon@fd5d8000 { -+ compatible = "rockchip,rk3588-usb2phy-grf", "syscon", -+ "simple-mfd"; -+ reg = <0x0 0xfd5d8000 0x0 0x4000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ u2phy2: usb2-phy@8000 { -+ compatible = "rockchip,rk3588-usb2phy"; -+ reg = <0x8000 0x10>; -+ interrupts = ; -+ clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>; -+ clock-names = "phyclk"; -+ #clock-cells = <0>; -+ status = "disabled"; -+ -+ u2phy2_host: host-port { -+ #phy-cells = <0>; -+ status = "disabled"; -+ }; -+ }; -+ }; -+ -+ usb2phy3_grf: syscon@fd5dc000 { -+ compatible = "rockchip,rk3588-usb2phy-grf", "syscon", -+ "simple-mfd"; -+ reg = <0x0 0xfd5dc000 0x0 0x4000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ u2phy3: usb2-phy@c000 { -+ compatible = "rockchip,rk3588-usb2phy"; -+ reg = <0xc000 0x10>; -+ interrupts = ; -+ clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>; -+ clock-names = "phyclk"; -+ #clock-cells = <0>; -+ status = "disabled"; -+ -+ u2phy3_host: host-port { -+ #phy-cells = <0>; -+ status = "disabled"; -+ }; -+ }; -+ }; -+ -+ pcie2x1l2: pcie@fe190000 { -+ compatible = "rockchip,rk3588-pcie", "snps,dw-pcie"; -+ #address-cells = <3>; -+ #size-cells = <2>; -+ bus-range = <0x40 0x4f>; -+ clocks = <&cru ACLK_PCIE_1L2_MSTR>, <&cru ACLK_PCIE_1L2_SLV>, -+ <&cru ACLK_PCIE_1L2_DBI>, <&cru PCLK_PCIE_1L2>, -+ <&cru CLK_PCIE_AUX4>; -+ clock-names = "aclk_mst", "aclk_slv", -+ "aclk_dbi", "pclk", "aux"; -+ device_type = "pci"; -+ interrupts = , -+ , -+ , -+ , -+ ; -+ interrupt-names = "sys", "pmc", "msg", "legacy", "err"; -+ #interrupt-cells = <1>; -+ interrupt-map-mask = <0 0 0 7>; -+ interrupt-map = <0 0 0 1 &pcie2x1l2_intc 0>, -+ <0 0 0 2 &pcie2x1l2_intc 1>, -+ <0 0 0 3 &pcie2x1l2_intc 2>, -+ <0 0 0 4 &pcie2x1l2_intc 3>; -+ linux,pci-domain = <4>; -+ num-ib-windows = <8>; -+ num-ob-windows = <8>; -+ max-link-speed = <2>; -+ msi-map = <0x4000 &gic 0x4000 0x1000>; -+ num-lanes = <1>; -+ phys = <&combphy0_ps PHY_TYPE_PCIE>; -+ phy-names = "pcie-phy"; -+ power-domains = <&power RK3588_PD_PHP>; -+ ranges = <0x00000800 0x0 0xf4000000 0x0 0xf4000000 0x0 0x100000 -+ 0x81000000 0x0 0xf4100000 0x0 0xf4100000 0x0 0x100000 -+ 0x82000000 0x0 0xf4200000 0x0 0xf4200000 0x0 0xe00000 -+ 0xc3000000 0xa 0x00000000 0xa 0x00000000 0x0 0x40000000>; -+ reg = <0xa 0x41000000 0x0 0x400000>, -+ <0x0 0xfe190000 0x0 0x10000>; -+ reg-names = "pcie-dbi", "pcie-apb"; -+ resets = <&cru SRST_PCIE4_POWER_UP>; -+ reset-names = "pipe"; -+ status = "disabled"; -+ -+ pcie2x1l2_intc: legacy-interrupt-controller { -+ interrupt-controller; -+ #address-cells = <0>; -+ #interrupt-cells = <1>; -+ interrupt-parent = <&gic>; -+ interrupts = ; -+ }; -+ }; -+ -+ sfc: spi@fe2b0000 { -+ compatible = "rockchip,sfc"; -+ reg = <0x0 0xfe2b0000 0x0 0x4000>; -+ interrupts = ; -+ clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>; -+ clock-names = "clk_sfc", "hclk_sfc"; -+ assigned-clocks = <&cru SCLK_SFC>; -+ assigned-clock-rates = <100000000>; -+ #address-cells = <1>; -+ #size-cells = <0>; - status = "disabled"; - }; - -@@ -43,29 +186,57 @@ - reg = <0x07 0x10>; - }; - }; -+ -+ combphy0_ps: phy@fee00000 { -+ compatible = "rockchip,rk3588-naneng-combphy"; -+ reg = <0x0 0xfee00000 0x0 0x100>; -+ #phy-cells = <1>; -+ clocks = <&cru CLK_REF_PIPE_PHY0>, <&cru PCLK_PCIE_COMBO_PIPE_PHY0>; -+ clock-names = "refclk", "apbclk"; -+ assigned-clocks = <&cru CLK_REF_PIPE_PHY0>; -+ assigned-clock-rates = <100000000>; -+ resets = <&cru SRST_P_PCIE2_PHY0>, <&cru SRST_REF_PIPE_PHY0>; -+ reset-names = "combphy-apb", "combphy"; -+ rockchip,pipe-grf = <&php_grf>; -+ rockchip,pipe-phy-grf = <&pipe_phy0_grf>; -+ status = "disabled"; -+ }; - }; - - &xin24m { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - - &cru { -- u-boot,dm-spl; -+ bootph-pre-ram; - status = "okay"; - }; - - &sys_grf { -- u-boot,dm-spl; -+ bootph-pre-ram; - status = "okay"; - }; - -+&scmi { -+ bootph-all; -+}; -+ -+&scmi_clk { -+ bootph-all; -+}; -+ -+&sdmmc { -+ bootph-all; -+ u-boot,spl-fifo-mode; -+}; -+ - &uart2 { - clock-frequency = <24000000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - status = "okay"; - }; - - &ioc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/rk3588s.dtsi b/arch/arm/dts/rk3588s.dtsi -index 005cde61b4..fca8503aed 100644 ---- a/arch/arm/dts/rk3588s.dtsi -+++ b/arch/arm/dts/rk3588s.dtsi -@@ -1099,6 +1099,21 @@ - }; - }; - -+ sdmmc: mmc@fe2c0000 { -+ compatible = "rockchip,rk3588-dw-mshc", "rockchip,rk3288-dw-mshc"; -+ reg = <0x0 0xfe2c0000 0x0 0x4000>; -+ interrupts = ; -+ clocks = <&scmi_clk SCMI_HCLK_SD>, <&scmi_clk SCMI_CCLK_SD>, -+ <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; -+ clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; -+ fifo-depth = <0x100>; -+ max-frequency = <200000000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>; -+ power-domains = <&power RK3588_PD_SDMMC>; -+ status = "disabled"; -+ }; -+ - sdhci: mmc@fe2e0000 { - compatible = "rockchip,rk3588-dwcmshc"; - reg = <0x0 0xfe2e0000 0x0 0x10000>; -diff --git a/arch/arm/dts/rk3xxx-u-boot.dtsi b/arch/arm/dts/rk3xxx-u-boot.dtsi -index e67432fb39..f50bacdb84 100644 ---- a/arch/arm/dts/rk3xxx-u-boot.dtsi -+++ b/arch/arm/dts/rk3xxx-u-boot.dtsi -@@ -4,7 +4,7 @@ - noc: syscon@10128000 { - compatible = "rockchip,rk3188-noc", "syscon"; - reg = <0x10128000 0x2000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - dmc: dmc@20020000 { -@@ -18,16 +18,16 @@ - rockchip,grf = <&grf>; - rockchip,pmu = <&pmu>; - rockchip,noc = <&noc>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &grf { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pmu { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart2 { -diff --git a/arch/arm/dts/rv1108-u-boot.dtsi b/arch/arm/dts/rv1108-u-boot.dtsi -index 6a2098b8d4..ccf2d8bd83 100644 ---- a/arch/arm/dts/rv1108-u-boot.dtsi -+++ b/arch/arm/dts/rv1108-u-boot.dtsi -@@ -6,5 +6,5 @@ - #include "rockchip-u-boot.dtsi" - - &grf { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi -index bc77037760..5e348278f2 100644 ---- a/arch/arm/dts/rv1126-u-boot.dtsi -+++ b/arch/arm/dts/rv1126-u-boot.dtsi -@@ -13,50 +13,50 @@ - - dmc { - compatible = "rockchip,rv1126-dmc"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &gpio0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &gpio1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &grf { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pmu { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pmugrf { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &xin24m { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &cru { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &pmucru { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &emmc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/rz-g2-beacon-u-boot.dtsi b/arch/arm/dts/rz-g2-beacon-u-boot.dtsi -index da1c3b0939..84416fceaf 100644 ---- a/arch/arm/dts/rz-g2-beacon-u-boot.dtsi -+++ b/arch/arm/dts/rz-g2-beacon-u-boot.dtsi -@@ -9,12 +9,12 @@ - }; - - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &cpg { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &ehci0 { -@@ -26,11 +26,11 @@ - }; - - &extal_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &extalr_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pfc { -@@ -41,7 +41,7 @@ - }; - - &prr { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &rpc { -diff --git a/arch/arm/dts/s5p4418.dtsi b/arch/arm/dts/s5p4418.dtsi -index 3027cd4bb9..d83eb52109 100644 ---- a/arch/arm/dts/s5p4418.dtsi -+++ b/arch/arm/dts/s5p4418.dtsi -@@ -95,7 +95,7 @@ - compatible = "nexell,nexell-display"; - reg = <0xc0102800 0x100>; - index = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "disabled"; - }; - -@@ -165,7 +165,7 @@ - pinctrl@C0010000 { - compatible = "nexell,s5pxx18-pinctrl"; - reg = <0xc0010000 0xf000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - uart0:uart@c00a1000 { -diff --git a/arch/arm/dts/s700-u-boot.dtsi b/arch/arm/dts/s700-u-boot.dtsi -index 3c3396bccf..d21baf1053 100644 ---- a/arch/arm/dts/s700-u-boot.dtsi -+++ b/arch/arm/dts/s700-u-boot.dtsi -@@ -5,7 +5,7 @@ - - /{ - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - - gmac: ethernet@e0220000 { - compatible = "actions,s700-ethernet"; -@@ -33,9 +33,9 @@ - }; - - &uart3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &cmu { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/s900-u-boot.dtsi b/arch/arm/dts/s900-u-boot.dtsi -index a95f2cc628..4f47486aac 100644 ---- a/arch/arm/dts/s900-u-boot.dtsi -+++ b/arch/arm/dts/s900-u-boot.dtsi -@@ -4,14 +4,14 @@ - - /{ - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &uart5 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &cmu { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/sam9x60ek-u-boot.dtsi b/arch/arm/dts/sam9x60ek-u-boot.dtsi -index 8c63ed869c..fd2afa8a2f 100644 ---- a/arch/arm/dts/sam9x60ek-u-boot.dtsi -+++ b/arch/arm/dts/sam9x60ek-u-boot.dtsi -@@ -7,74 +7,74 @@ - - / { - chosen { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - ahb { -- u-boot,dm-pre-reloc; -+ bootph-all; - - apb { -- u-boot,dm-pre-reloc; -+ bootph-all; - - pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; - }; - - &clk32 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &dbgu { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &main_rc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &main_xtal { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_dbgu { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_sdhci0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_qspi { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pioA { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pioB { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &qspi { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdhci0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &slow_xtal { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &slow_rc_osc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi -index 187c2ff2fb..dd6468ed96 100644 ---- a/arch/arm/dts/sama5d2.dtsi -+++ b/arch/arm/dts/sama5d2.dtsi -@@ -32,7 +32,7 @@ - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - usb1: ohci@400000 { - compatible = "atmel,at91rm9200-ohci", "usb-ohci"; -@@ -70,7 +70,7 @@ - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - hlcdc: hlcdc@f0000000 { - compatible = "atmel,at91sam9x5-hlcdc"; -@@ -84,12 +84,12 @@ - reg = <0xf0014000 0x160>; - #address-cells = <1>; - #size-cells = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - main: mainck { - compatible = "atmel,at91sam9x5-clk-main"; - #clock-cells = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - plla: pllack@0 { -@@ -100,7 +100,7 @@ - atmel,clk-input-range = <12000000 12000000>; - #atmel,pll-clk-output-range-cells = <4>; - atmel,pll-clk-output-ranges = <600000000 1200000000 0 0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - plladiv: plladivck { -@@ -132,7 +132,7 @@ - #clock-cells = <0>; - clocks = <&main>; - regmap-sfr = <&sfr>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - mck: masterck { -@@ -141,14 +141,14 @@ - clocks = <&main>, <&plladiv>, <&utmi>; - atmel,clk-output-range = <124000000 166000000>; - atmel,clk-divisors = <1 2 4 3>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - h32ck: h32mxck { - #clock-cells = <0>; - compatible = "atmel,sama5d4-clk-h32mx"; - clocks = <&mck>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - usb: usbck { -@@ -239,7 +239,7 @@ - #address-cells = <1>; - #size-cells = <0>; - clocks = <&h32ck>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - macb0_clk: macb0_clk@5 { - #clock-cells = <0>; -@@ -267,7 +267,7 @@ - #clock-cells = <0>; - reg = <18>; - atmel,clk-output-range = <0 83000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - flx0_clk: flx0_clk@19 { -@@ -304,21 +304,21 @@ - #clock-cells = <0>; - reg = <24>; - atmel,clk-output-range = <0 83000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - uart1_clk: uart1_clk@25 { - #clock-cells = <0>; - reg = <25>; - atmel,clk-output-range = <0 83000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - uart2_clk: uart2_clk@26 { - #clock-cells = <0>; - reg = <26>; - atmel,clk-output-range = <0 83000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - uart3_clk: uart3_clk@27 { -@@ -349,7 +349,7 @@ - #clock-cells = <0>; - reg = <33>; - atmel,clk-output-range = <0 83000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - spi1_clk: spi1_clk@34 { -@@ -362,7 +362,7 @@ - #clock-cells = <0>; - reg = <35>; - atmel,clk-output-range = <0 83000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - tcb1_clk: tcb1_clk@36 { -@@ -455,7 +455,7 @@ - #address-cells = <1>; - #size-cells = <0>; - clocks = <&mck>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - dma0_clk: dma0_clk@6 { - #clock-cells = <0>; -@@ -495,13 +495,13 @@ - sdmmc0_hclk: sdmmc0_hclk@31 { - #clock-cells = <0>; - reg = <31>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - sdmmc1_hclk: sdmmc1_hclk@32 { - #clock-cells = <0>; - reg = <32>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - lcdc_clk: lcdc_clk@45 { -@@ -517,13 +517,13 @@ - qspi0_clk: qspi0_clk@52 { - #clock-cells = <0>; - reg = <52>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - qspi1_clk: qspi1_clk@53 { - #clock-cells = <0>; - reg = <53>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -533,18 +533,18 @@ - #size-cells = <0>; - interrupt-parent = <&pmc>; - clocks = <&main>, <&plla>, <&utmi>, <&mck>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - sdmmc0_gclk: sdmmc0_gclk@31 { - #clock-cells = <0>; - reg = <31>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - sdmmc1_gclk: sdmmc1_gclk@32 { - #clock-cells = <0>; - reg = <32>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - tcb0_gclk: tcb0_gclk@35 { -@@ -648,12 +648,12 @@ - clock-names = "t0_clk", "gclk", "slow_clk"; - #address-cells = <1>; - #size-cells = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - timer0: timer@0 { - compatible = "atmel,tcb-timer"; - reg = <0>, <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -804,7 +804,7 @@ - clocks = <&pioA_clk>; - gpio-controller; - #gpio-cells = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -diff --git a/arch/arm/dts/sama5d27_som1.dtsi b/arch/arm/dts/sama5d27_som1.dtsi -index f920077449..d0c3b758e2 100644 ---- a/arch/arm/dts/sama5d27_som1.dtsi -+++ b/arch/arm/dts/sama5d27_som1.dtsi -@@ -63,7 +63,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_qspi1_sck_cs_default &pinctrl_qspi1_dat_default>; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - spi_flash@0 { - compatible = "jedec,spi-nor"; -@@ -71,7 +71,7 @@ - spi-max-frequency = <50000000>; - spi-rx-bus-width = <4>; - spi-tx-bus-width = <4>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -139,7 +139,7 @@ - pinmux = , - ; - bias-disable; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pinctrl_qspi1_dat_default: qspi1_dat_default { -@@ -148,7 +148,7 @@ - , - ; - bias-pull-up; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -diff --git a/arch/arm/dts/sama5d3.dtsi b/arch/arm/dts/sama5d3.dtsi -index 42c30e9f30..4c03a302ec 100644 ---- a/arch/arm/dts/sama5d3.dtsi -+++ b/arch/arm/dts/sama5d3.dtsi -@@ -89,14 +89,14 @@ - #address-cells = <1>; - #size-cells = <1>; - ranges; -- u-boot,dm-pre-reloc; -+ bootph-all; - - apb { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; -- u-boot,dm-pre-reloc; -+ bootph-all; - - mmc0: mmc@f0000000 { - compatible = "atmel,hsmci"; -@@ -479,7 +479,7 @@ - }; - - pinctrl@fffff200 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #address-cells = <1>; - #size-cells = <1>; - compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus"; -@@ -556,9 +556,9 @@ - }; - - dbgu { -- u-boot,dm-pre-reloc; -+ bootph-all; - pinctrl_dbgu: dbgu-0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - atmel,pins = - ; /* PB31 periph A with pullup */ -@@ -619,23 +619,23 @@ - }; - - mmc0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - atmel,pins = - ; /* PD1 periph A MCI0_DA0 with pullup */ - }; - pinctrl_mmc0_dat1_3: mmc0_dat1_3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - atmel,pins = - ; /* PD4 periph A MCI0_DA3 with pullup */ - }; - pinctrl_mmc0_dat4_7: mmc0_dat4_7 { -- u-boot,dm-pre-reloc; -+ bootph-all; - atmel,pins = - ; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */ - }; - pinctrl_mmc1_dat1_3: mmc1_dat1_3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - atmel,pins = - ; - clocks = <&pioA_clk>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioB: gpio@fffff400 { -@@ -896,7 +896,7 @@ - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pioB_clk>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioC: gpio@fffff600 { -@@ -908,7 +908,7 @@ - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pioC_clk>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioD: gpio@fffff800 { -@@ -920,7 +920,7 @@ - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pioD_clk>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioE: gpio@fffffa00 { -@@ -932,7 +932,7 @@ - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pioE_clk>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pmc: pmc@fffffc00 { -@@ -943,7 +943,7 @@ - #address-cells = <1>; - #size-cells = <0>; - #interrupt-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - main_rc_osc: main_rc_osc { - compatible = "atmel,at91sam9x5-clk-main-rc-osc"; -@@ -995,7 +995,7 @@ - interrupts = ; - clocks = <&main>; - regmap-sfr = <&sfr>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - mck: masterck { -@@ -1006,7 +1006,7 @@ - clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>; - atmel,clk-output-range = <0 166000000>; - atmel,clk-divisors = <1 2 4 3>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - usb: usbck { -@@ -1100,10 +1100,10 @@ - #address-cells = <1>; - #size-cells = <0>; - clocks = <&mck>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - dbgu_clk: dbgu_clk@2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <0>; - reg = <2>; - }; -@@ -1114,31 +1114,31 @@ - }; - - pioA_clk: pioA_clk@6 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <0>; - reg = <6>; - }; - - pioB_clk: pioB_clk@7 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <0>; - reg = <7>; - }; - - pioC_clk: pioC_clk@8 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <0>; - reg = <8>; - }; - - pioD_clk: pioD_clk@9 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <0>; - reg = <9>; - }; - - pioE_clk: pioE_clk@10 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <0>; - reg = <10>; - }; -@@ -1192,26 +1192,26 @@ - }; - - mci0_clk: mci0_clk@21 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <0>; - reg = <21>; - }; - - mci1_clk: mci1_clk@22 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <0>; - reg = <22>; - }; - - spi0_clk: spi0_clk@24 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <0>; - reg = <24>; - atmel,clk-output-range = <0 133000000>; - }; - - spi1_clk: spi1_clk@25 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <0>; - reg = <25>; - atmel,clk-output-range = <0 133000000>; -@@ -1320,7 +1320,7 @@ - reg = <0xfffffe30 0xf>; - interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>; - clocks = <&mck>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - watchdog@fffffe40 { -diff --git a/arch/arm/dts/sama5d3xdm.dtsi b/arch/arm/dts/sama5d3xdm.dtsi -index b3df9af2b4..865e3fa203 100644 ---- a/arch/arm/dts/sama5d3xdm.dtsi -+++ b/arch/arm/dts/sama5d3xdm.dtsi -@@ -17,10 +17,10 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb888_alt>; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - display-timings { -- u-boot,dm-pre-reloc; -+ bootph-all; - 800x480 { - clock-frequency = <24000000>; - hactive = <800>; -@@ -31,7 +31,7 @@ - vfront-porch = <22>; - vback-porch = <21>; - vsync-len = <5>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -diff --git a/arch/arm/dts/sama5d3xmb.dtsi b/arch/arm/dts/sama5d3xmb.dtsi -index 906f3ce8c9..3dd9bf8658 100644 ---- a/arch/arm/dts/sama5d3xmb.dtsi -+++ b/arch/arm/dts/sama5d3xmb.dtsi -@@ -12,7 +12,7 @@ - compatible = "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5"; - - chosen { -- u-boot,dm-pre-reloc; -+ bootph-all; - stdout-path = &dbgu; - }; - -@@ -22,7 +22,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - slot@0 { - reg = <0>; - bus-width = <4>; -@@ -32,13 +32,13 @@ - - spi0: spi@f0004000 { - dmas = <0>, <0>; /* Do not use DMA for spi0 */ -- u-boot,dm-pre-reloc; -+ bootph-all; - - spi_flash@0 { - compatible = "jedec,spi-nor"; - spi-max-frequency = <50000000>; - reg = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -105,7 +105,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - slot@0 { - reg = <0>; - bus-width = <4>; -@@ -140,15 +140,15 @@ - - pinctrl@fffff200 { - board { -- u-boot,dm-pre-reloc; -+ bootph-all; - pinctrl_mmc0_cd: mmc0_cd { -- u-boot,dm-pre-reloc; -+ bootph-all; - atmel,pins = - ; /* PD17 GPIO with pullup deglitch */ - }; - - pinctrl_mmc1_cd: mmc1_cd { -- u-boot,dm-pre-reloc; -+ bootph-all; - atmel,pins = - ; /* PD18 GPIO with pullup deglitch */ - }; -@@ -183,7 +183,7 @@ - dbgu: serial@ffffee00 { - dmas = <0>, <0>; /* Do not use DMA for dbgu */ - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - watchdog@fffffe40 { -diff --git a/arch/arm/dts/sama5d3xmb_cmp.dtsi b/arch/arm/dts/sama5d3xmb_cmp.dtsi -index c6bf0f50fd..098209c5ca 100644 ---- a/arch/arm/dts/sama5d3xmb_cmp.dtsi -+++ b/arch/arm/dts/sama5d3xmb_cmp.dtsi -@@ -11,7 +11,7 @@ - compatible = "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5"; - - chosen { -- u-boot,dm-pre-reloc; -+ bootph-all; - stdout-path = &dbgu; - }; - -@@ -180,7 +180,7 @@ - dbgu: serial@ffffee00 { - dmas = <0>, <0>; /* Do not use DMA for dbgu */ - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - watchdog@fffffe40 { -diff --git a/arch/arm/dts/sama5d4.dtsi b/arch/arm/dts/sama5d4.dtsi -index e1df24cdbe..5e2c9a1db2 100644 ---- a/arch/arm/dts/sama5d4.dtsi -+++ b/arch/arm/dts/sama5d4.dtsi -@@ -123,7 +123,7 @@ - #address-cells = <1>; - #size-cells = <1>; - ranges; -- u-boot,dm-pre-reloc; -+ bootph-all; - - usb0: gadget@00400000 { - #address-cells = <1>; -@@ -317,7 +317,7 @@ - #address-cells = <1>; - #size-cells = <1>; - ranges; -- u-boot,dm-pre-reloc; -+ bootph-all; - - hlcdc: hlcdc@f0000000 { - compatible = "atmel,at91sam9x5-hlcdc"; -@@ -376,7 +376,7 @@ - #address-cells = <1>; - #size-cells = <0>; - #interrupt-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - main_rc_osc: main_rc_osc { - compatible = "atmel,at91sam9x5-clk-main-rc-osc"; -@@ -401,7 +401,7 @@ - interrupt-parent = <&pmc>; - interrupts = ; - clocks = <&main_rc_osc &main_osc>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - plla: pllack@0 { -@@ -428,7 +428,7 @@ - interrupt-parent = <&pmc>; - interrupts = ; - clocks = <&main>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - mck: masterck { -@@ -445,7 +445,7 @@ - #clock-cells = <0>; - compatible = "atmel,sama5d4-clk-h32mx"; - clocks = <&mck>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - usb: usbck { -@@ -490,7 +490,7 @@ - compatible = "atmel,at91rm9200-clk-system"; - #address-cells = <1>; - #size-cells = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - ddrck: ddrck@2 { - #clock-cells = <0>; -@@ -546,10 +546,10 @@ - #address-cells = <1>; - #size-cells = <0>; - clocks = <&h32ck>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - pioD_clk: pioD_clk@5 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <0>; - reg = <5>; - }; -@@ -595,25 +595,25 @@ - }; - - pioA_clk: pioA_clk@23 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <0>; - reg = <23>; - }; - - pioB_clk: pioB_clk@24 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <0>; - reg = <24>; - }; - - pioC_clk: pioC_clk@25 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <0>; - reg = <25>; - }; - - pioE_clk: pioE_clk@26 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <0>; - reg = <26>; - }; -@@ -634,7 +634,7 @@ - }; - - usart3_clk: usart3_clk@30 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <0>; - reg = <30>; - }; -@@ -665,13 +665,13 @@ - }; - - mci1_clk: mci1_clk@36 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <0>; - reg = <36>; - }; - - spi0_clk: spi0_clk@37 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <0>; - reg = <37>; - }; -@@ -1392,7 +1392,7 @@ - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pioC_clk>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pioD: gpio@fc068000 { -@@ -1418,7 +1418,7 @@ - }; - - pinctrl@fc06a000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #address-cells = <1>; - #size-cells = <1>; - compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus"; -@@ -1709,9 +1709,9 @@ - }; - - mmc1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - atmel,pins = - ; - }; - pinctrl_mmc1_dat1_3: mmc1_dat1_3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - atmel,pins = - ; - #size-cells = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - - ccu: cache-controller@f7000000 { - compatible = "arteris,ncore-ccu"; - reg = <0xf7000000 0x100900>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; - - &clkmgr { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gmac1 { -@@ -66,13 +66,13 @@ - }; - - &qspi { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &rst { - compatible = "altr,rst-mgr"; - altr,modrst-offset = <0x20>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdr { -@@ -81,18 +81,18 @@ - <0xf8010000 0x190>, - <0xf8011000 0x500>; - resets = <&rst DDRSCH_RESET>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sysmgr { - compatible = "altr,sys-mgr", "syscon"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &watchdog0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi -index 2400fad18a..63df28e836 100644 ---- a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi -+++ b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi -@@ -33,7 +33,7 @@ - compatible = "jedec,spi-nor"; - spi-tx-bus-width = <4>; - spi-rx-bus-width = <4>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &i2c1 { -@@ -43,7 +43,7 @@ - &mmc { - drvsel = <3>; - smplsel = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &qspi { -@@ -51,5 +51,5 @@ - }; - - &watchdog0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/socfpga_arria10-handoff.dtsi b/arch/arm/dts/socfpga_arria10-handoff.dtsi -index c08371625e..a3afb4d9df 100644 ---- a/arch/arm/dts/socfpga_arria10-handoff.dtsi -+++ b/arch/arm/dts/socfpga_arria10-handoff.dtsi -@@ -4,14 +4,14 @@ - clocks { - #address-cells = <1>; - #size-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - altera_arria10_hps_eosc1: altera_arria10_hps_eosc1 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = ; - clock-output-names = "altera_arria10_hps_eosc1-clk"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - altera_arria10_hps_cb_intosc_ls: altera_arria10_hps_cb_intosc_ls { -@@ -19,7 +19,7 @@ - #clock-cells = <0>; - clock-frequency = ; - clock-output-names = "altera_arria10_hps_cb_intosc_ls-clk"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - /* Clock source: altera_arria10_hps_f2h_free */ -@@ -28,7 +28,7 @@ - #clock-cells = <0>; - clock-frequency = ; - clock-output-names = "altera_arria10_hps_f2h_free-clk"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -36,7 +36,7 @@ - compatible = "altr,socfpga-a10-clk-init"; - reg = <0xffd04000 0x00000200>; - reg-names = "soc_clock_manager_OCP_SLV"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - mainpll { - vco0-psrc = ; -@@ -63,7 +63,7 @@ - nocdiv-csatclk = ; - nocdiv-cstraceclk = ; - nocdiv-cspdbgclk = ; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - perpll { -@@ -88,13 +88,13 @@ - emacctl-emac1sel = ; - emacctl-emac2sel = ; - gpiodiv-gpiodbclk = ; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - alteragrp { - nocclk = ; - mpuclk = ; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -104,7 +104,7 @@ - compatible = "pinctrl-single"; - reg = <0xffd07000 0x00000800>; - reg-names = "soc_3v_io48_pin_mux_OCP_SLV"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - shared { - reg = <0xffd07000 0x00000200>; -@@ -159,7 +159,7 @@ - <0x000000b4 PINMUX_SHARED_IO_Q4_10_SEL>, - <0x000000b8 PINMUX_SHARED_IO_Q4_11_SEL>, - <0x000000bc PINMUX_SHARED_IO_Q4_12_SEL>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - dedicated { -@@ -181,7 +181,7 @@ - <0x00000038 PINMUX_DEDICATED_IO_15_SEL>, - <0x0000003c PINMUX_DEDICATED_IO_16_SEL>, - <0x00000040 PINMUX_DEDICATED_IO_17_SEL>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - dedicated_cfg { -@@ -207,7 +207,7 @@ - <0x0000013c CONFIG_IO_MACRO (CONFIG_IO_15)>, - <0x00000140 CONFIG_IO_MACRO (CONFIG_IO_16)>, - <0x00000144 CONFIG_IO_MACRO (CONFIG_IO_17)>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - fpga { -@@ -232,7 +232,7 @@ - <0x00000038 PINMUX_SPIS1_USEFPGA_SEL>, - <0x0000003c PINMUX_UART0_USEFPGA_SEL>, - <0x00000040 PINMUX_UART1_USEFPGA_SEL>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -240,7 +240,7 @@ - compatible = "altr,socfpga-a10-noc"; - reg = <0xffd10000 0x00008000>; - reg-names = "mpu_m0"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - firewall { - mpu0 = <0x00000000 0x0000ffff>; -@@ -248,43 +248,43 @@ - fpga2sdram0-0 = <0x00000000 0x0000ffff>; - fpga2sdram1-0 = <0x00000000 0x0000ffff>; - fpga2sdram2-0 = <0x00000000 0x0000ffff>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - hps_fpgabridge0: fpgabridge@0 { - compatible = "altr,socfpga-hps2fpga-bridge"; - init-val = ; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - hps_fpgabridge1: fpgabridge@1 { - compatible = "altr,socfpga-lwhps2fpga-bridge"; - init-val = ; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - hps_fpgabridge2: fpgabridge@2 { - compatible = "altr,socfpga-fpga2hps-bridge"; - init-val = ; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - hps_fpgabridge3: fpgabridge@3 { - compatible = "altr,socfpga-fpga2sdram0-bridge"; - init-val = ; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - hps_fpgabridge4: fpgabridge@4 { - compatible = "altr,socfpga-fpga2sdram1-bridge"; - init-val = ; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - hps_fpgabridge5: fpgabridge@5 { - compatible = "altr,socfpga-fpga2sdram2-bridge"; - init-val = ; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; -diff --git a/arch/arm/dts/socfpga_arria10-u-boot.dtsi b/arch/arm/dts/socfpga_arria10-u-boot.dtsi -index 6ff1ea6e5e..2ed532ffb5 100644 ---- a/arch/arm/dts/socfpga_arria10-u-boot.dtsi -+++ b/arch/arm/dts/socfpga_arria10-u-boot.dtsi -@@ -6,36 +6,36 @@ - / { - chosen { - tick-timer = &timer2; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - memory@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &clkmgr { -- u-boot,dm-pre-reloc; -+ bootph-all; - - clocks { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &cb_intosc_hs_div2_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &cb_intosc_ls_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &f2s_free_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gmac0 { -@@ -74,47 +74,47 @@ - }; - - &L2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &l4_mp_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &l4_sp_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &l4_sys_free_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &main_periph_ref_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &main_pll { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &main_noc_base_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &noc_free_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &osc1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &peri_noc_base_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &periph_pll { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &porta { -@@ -130,13 +130,13 @@ - }; - - &rst { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sysmgr { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &timer2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi b/arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi -index ef215230c2..3396fb8003 100644 ---- a/arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi -+++ b/arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi -@@ -2,90 +2,90 @@ - - / { - chosen { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - clocks { -- u-boot,dm-pre-reloc; -+ bootph-all; - - altera_arria10_hps_eosc1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - altera_arria10_hps_cb_intosc_ls { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - altera_arria10_hps_f2h_free { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - clock_manager@0xffd04000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - mainpll { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - perpll { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - alteragrp { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - pinmux@0xffd07000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - shared { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - dedicated { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - dedicated_cfg { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - fpga { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - noc@0xffd10000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - firewall { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - fpgabridge@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - fpgabridge@1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - fpgabridge@2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - fpgabridge@3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - fpgabridge@4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - fpgabridge@5 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; -diff --git a/arch/arm/dts/socfpga_arria10_mercury_aa1-u-boot.dtsi b/arch/arm/dts/socfpga_arria10_mercury_aa1-u-boot.dtsi -index 365e05100a..8866df3ddd 100644 ---- a/arch/arm/dts/socfpga_arria10_mercury_aa1-u-boot.dtsi -+++ b/arch/arm/dts/socfpga_arria10_mercury_aa1-u-boot.dtsi -@@ -10,45 +10,45 @@ - }; - - fs_loader0: fs-loader { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "u-boot,fs-loader"; - phandlepart = <&mmc 1>; - }; - }; - - &atsha204a { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &fpga_mgr { -- u-boot,dm-pre-reloc; -+ bootph-all; - altr,bitstream = "fpga.itb"; - }; - - &i2c1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &main_sdmmc_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &mmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &peri_sdmmc_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc_free_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/socfpga_arria10_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_arria10_socdk-u-boot.dtsi -index 22e614d04c..56d50ecee3 100644 ---- a/arch/arm/dts/socfpga_arria10_socdk-u-boot.dtsi -+++ b/arch/arm/dts/socfpga_arria10_socdk-u-boot.dtsi -@@ -13,9 +13,9 @@ - }; - - &uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &watchdog1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/socfpga_arria10_socdk_sdmmc-u-boot.dtsi b/arch/arm/dts/socfpga_arria10_socdk_sdmmc-u-boot.dtsi -index 298c337ed7..10f8a959a0 100644 ---- a/arch/arm/dts/socfpga_arria10_socdk_sdmmc-u-boot.dtsi -+++ b/arch/arm/dts/socfpga_arria10_socdk_sdmmc-u-boot.dtsi -@@ -14,34 +14,34 @@ - }; - - fs_loader0: fs-loader { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "u-boot,fs-loader"; - phandlepart = <&mmc 1>; - }; - }; - - &fpga_mgr { -- u-boot,dm-pre-reloc; -+ bootph-all; - altr,bitstream = "fit_spl_fpga.itb"; - }; - - &mmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - /* Clock available early */ - &main_sdmmc_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &peri_sdmmc_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc_free_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/socfpga_arria5_secu1.dts b/arch/arm/dts/socfpga_arria5_secu1.dts -index cfe3e67df4..8e9c3bbdf9 100644 ---- a/arch/arm/dts/socfpga_arria5_secu1.dts -+++ b/arch/arm/dts/socfpga_arria5_secu1.dts -@@ -97,7 +97,7 @@ - vmmc-supply = <®ulator_3_3v>; - vqmmc-supply = <®ulator_3_3v>; - bus-width = <4>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &nand0 { -@@ -122,7 +122,7 @@ - - &uart0 { - clock-frequency = <100000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -@@ -131,6 +131,6 @@ - }; - - &watchdog0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; -diff --git a/arch/arm/dts/socfpga_arria5_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_arria5_socdk-u-boot.dtsi -index dfaff4c0f7..62116faafa 100644 ---- a/arch/arm/dts/socfpga_arria5_socdk-u-boot.dtsi -+++ b/arch/arm/dts/socfpga_arria5_socdk-u-boot.dtsi -@@ -20,21 +20,21 @@ - }; - - &mmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &qspi { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &flash { - compatible = "n25q00", "jedec,spi-nor"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0 { - clock-frequency = <100000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart1 { -diff --git a/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts b/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts -index 6439daa525..ca030c8c41 100644 ---- a/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts -+++ b/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts -@@ -58,7 +58,7 @@ - - &mmc0 { - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &usb1 { -@@ -67,7 +67,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &watchdog0 { -diff --git a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc-u-boot.dtsi b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc-u-boot.dtsi -index 0219c6948d..8d2caf69dd 100644 ---- a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc-u-boot.dtsi -+++ b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc-u-boot.dtsi -@@ -19,12 +19,12 @@ - }; - - &mmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0 { - clock-frequency = <100000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart1 { -diff --git a/arch/arm/dts/socfpga_cyclone5_de10_nano.dts b/arch/arm/dts/socfpga_cyclone5_de10_nano.dts -index 4be4083941..34886ec1ad 100644 ---- a/arch/arm/dts/socfpga_cyclone5_de10_nano.dts -+++ b/arch/arm/dts/socfpga_cyclone5_de10_nano.dts -@@ -69,7 +69,7 @@ - - &mmc0 { - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &usb1 { -@@ -78,7 +78,7 @@ - - &uart0 { - clock-frequency = <100000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &watchdog0 { -diff --git a/arch/arm/dts/socfpga_cyclone5_de10_standard.dts b/arch/arm/dts/socfpga_cyclone5_de10_standard.dts -index 39bce3b2ac..b38f072382 100644 ---- a/arch/arm/dts/socfpga_cyclone5_de10_standard.dts -+++ b/arch/arm/dts/socfpga_cyclone5_de10_standard.dts -@@ -69,7 +69,7 @@ - - &mmc0 { - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &usb1 { -@@ -78,7 +78,7 @@ - - &uart0 { - clock-frequency = <100000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &watchdog0 { -diff --git a/arch/arm/dts/socfpga_cyclone5_de1_soc.dts b/arch/arm/dts/socfpga_cyclone5_de1_soc.dts -index b71496bfb5..e9de72429f 100644 ---- a/arch/arm/dts/socfpga_cyclone5_de1_soc.dts -+++ b/arch/arm/dts/socfpga_cyclone5_de1_soc.dts -@@ -67,7 +67,7 @@ - - &mmc0 { - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &usb1 { -@@ -76,7 +76,7 @@ - - &uart0 { - clock-frequency = <100000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &watchdog0 { -diff --git a/arch/arm/dts/socfpga_cyclone5_is1.dts b/arch/arm/dts/socfpga_cyclone5_is1.dts -index a769498791..58a5faf6ea 100644 ---- a/arch/arm/dts/socfpga_cyclone5_is1.dts -+++ b/arch/arm/dts/socfpga_cyclone5_is1.dts -@@ -73,7 +73,7 @@ - - &mmc0 { - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - cd-gpios = <&portb 18 0>; - vmmc-supply = <®ulator_3_3v>; -@@ -82,10 +82,10 @@ - - &qspi { - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - flash0: n25q00@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #address-cells = <1>; - #size-cells = <1>; - compatible = "n25q00", "jedec,spi-nor"; -@@ -106,7 +106,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &watchdog0 { -diff --git a/arch/arm/dts/socfpga_cyclone5_mcvevk-u-boot.dtsi b/arch/arm/dts/socfpga_cyclone5_mcvevk-u-boot.dtsi -index eea453b8ad..4cadfcd4f1 100644 ---- a/arch/arm/dts/socfpga_cyclone5_mcvevk-u-boot.dtsi -+++ b/arch/arm/dts/socfpga_cyclone5_mcvevk-u-boot.dtsi -@@ -13,12 +13,12 @@ - }; - - &mmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0 { - clock-frequency = <100000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &porta { -diff --git a/arch/arm/dts/socfpga_cyclone5_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_cyclone5_socdk-u-boot.dtsi -index d24f621cd6..bca4b0887b 100644 ---- a/arch/arm/dts/socfpga_cyclone5_socdk-u-boot.dtsi -+++ b/arch/arm/dts/socfpga_cyclone5_socdk-u-boot.dtsi -@@ -24,16 +24,16 @@ - }; - - &mmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &qspi { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &flash0 { - compatible = "n25q00", "jedec,spi-nor"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - partition@qspi-boot { - /* 8MB for raw data. */ -@@ -50,7 +50,7 @@ - - &uart0 { - clock-frequency = <100000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart1 { -diff --git a/arch/arm/dts/socfpga_cyclone5_sockit-u-boot.dtsi b/arch/arm/dts/socfpga_cyclone5_sockit-u-boot.dtsi -index 85cc396a70..4b99a24701 100644 ---- a/arch/arm/dts/socfpga_cyclone5_sockit-u-boot.dtsi -+++ b/arch/arm/dts/socfpga_cyclone5_sockit-u-boot.dtsi -@@ -20,21 +20,21 @@ - }; - - &mmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &qspi { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &flash { - compatible = "n25q00", "jedec,spi-nor"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0 { - clock-frequency = <100000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart1 { -diff --git a/arch/arm/dts/socfpga_cyclone5_socrates-u-boot.dtsi b/arch/arm/dts/socfpga_cyclone5_socrates-u-boot.dtsi -index 0a4d54e304..12c70c1537 100644 ---- a/arch/arm/dts/socfpga_cyclone5_socrates-u-boot.dtsi -+++ b/arch/arm/dts/socfpga_cyclone5_socrates-u-boot.dtsi -@@ -20,21 +20,21 @@ - }; - - &mmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &qspi { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &flash { - compatible = "n25q256a", "jedec,spi-nor"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0 { - clock-frequency = <100000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart1 { -diff --git a/arch/arm/dts/socfpga_cyclone5_sr1500.dts b/arch/arm/dts/socfpga_cyclone5_sr1500.dts -index bb29da6d6c..56031e576f 100644 ---- a/arch/arm/dts/socfpga_cyclone5_sr1500.dts -+++ b/arch/arm/dts/socfpga_cyclone5_sr1500.dts -@@ -72,12 +72,12 @@ - &mmc0 { - status = "okay"; - bus-width = <8>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0 { - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &usb1 { -@@ -90,10 +90,10 @@ - - &qspi { - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - flash0: n25q00@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #address-cells = <1>; - #size-cells = <1>; - compatible = "n25q00", "jedec,spi-nor"; -diff --git a/arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi b/arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi -index fb05c31d87..330949c018 100644 ---- a/arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi -+++ b/arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi -@@ -20,21 +20,21 @@ - }; - - &qspi { -- u-boot,dm-pre-reloc; -+ bootph-all; - - n25q128@0 { - compatible = "n25q128", "jedec,spi-nor"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - n25q00@1 { - compatible = "n25q00", "jedec,spi-nor"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &uart0 { - clock-frequency = <100000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart1 { -@@ -54,5 +54,5 @@ - }; - - &watchdog0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/socfpga_n5x-u-boot.dtsi b/arch/arm/dts/socfpga_n5x-u-boot.dtsi -index d377ae5f69..e27a64651e 100644 ---- a/arch/arm/dts/socfpga_n5x-u-boot.dtsi -+++ b/arch/arm/dts/socfpga_n5x-u-boot.dtsi -@@ -12,16 +12,16 @@ - memory { - #address-cells = <2>; - #size-cells = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - - ccu: cache-controller@f7000000 { - compatible = "arteris,ncore-ccu"; - reg = <0xf7000000 0x100900>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - clocks { -@@ -42,7 +42,7 @@ - - &clkmgr { - compatible = "intel,n5x-clkmgr"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gmac0 { -@@ -85,7 +85,7 @@ - }; - - &memclkmgr { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &mmc { -@@ -107,13 +107,13 @@ - }; - - &qspi { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &rst { - compatible = "altr,rst-mgr"; - altr,modrst-offset = <0x20>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdr { -@@ -121,7 +121,7 @@ - resets = <&rst DDRSCH_RESET>; - clocks = <&memclkmgr>; - clock-names = "mem_clk"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &spi0 { -@@ -134,7 +134,7 @@ - - &sysmgr { - compatible = "altr,sys-mgr", "syscon"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &timer0 { -@@ -155,7 +155,7 @@ - - &uart0 { - clocks = <&clkmgr N5X_L4_SP_CLK>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart1 { -@@ -165,17 +165,17 @@ - &usb0 { - clocks = <&clkmgr N5X_USB_CLK>; - disable-over-current; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &usb1 { - clocks = <&clkmgr N5X_USB_CLK>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &watchdog0 { - clocks = <&clkmgr N5X_L4_SYS_FREE_CLK>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &watchdog1 { -diff --git a/arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi -index 502da36bd8..840537c9d0 100644 ---- a/arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi -+++ b/arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi -@@ -41,7 +41,7 @@ - compatible = "jedec,spi-nor"; - spi-tx-bus-width = <4>; - spi-rx-bus-width = <4>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &i2c1 { -@@ -51,7 +51,7 @@ - &mmc { - drvsel = <3>; - smplsel = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &qspi { -@@ -59,5 +59,5 @@ - }; - - &watchdog0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/socfpga_stratix10.dtsi b/arch/arm/dts/socfpga_stratix10.dtsi -index 7a7777202c..eb82d66320 100755 ---- a/arch/arm/dts/socfpga_stratix10.dtsi -+++ b/arch/arm/dts/socfpga_stratix10.dtsi -@@ -80,7 +80,7 @@ - device_type = "soc"; - interrupt-parent = <&intc>; - ranges = <0 0 0 0xffffffff>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - clkmgr: clkmgr@ffd10000 { - compatible = "altr,clk-mgr"; -@@ -228,7 +228,7 @@ - interrupts = <0 96 4>; - fifo-depth = <0x400>; - resets = <&rst SDMMC_RESET>, <&rst SDMMC_OCP_RESET>; -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "disabled"; - }; - -@@ -255,7 +255,7 @@ - compatible = "altr,rst-mgr"; - reg = <0xffd11000 0x1000>; - altr,modrst-offset = <0x20>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - sdr: sdr@f8000400 { -@@ -264,7 +264,7 @@ - <0xf8010000 0x190>, - <0xf8011000 0x500>; - resets = <&rst DDRSCH_RESET>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - spi0: spi@ffda4000 { -@@ -341,7 +341,7 @@ - reg-io-width = <4>; - resets = <&rst UART0_RESET>; - clock-frequency = <100000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "disabled"; - }; - -diff --git a/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi -index 75a29045da..ef0df76976 100755 ---- a/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi -+++ b/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi -@@ -23,12 +23,12 @@ - }; - - &clkmgr { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &qspi { - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &flash0 { -@@ -36,14 +36,14 @@ - spi-max-frequency = <100000000>; - spi-tx-bus-width = <4>; - spi-rx-bus-width = <4>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sysmgr { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &watchdog0 { - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/socfpga_stratix10_socdk.dts b/arch/arm/dts/socfpga_stratix10_socdk.dts -index 8aa55a60ab..e6d8fe6a90 100755 ---- a/arch/arm/dts/socfpga_stratix10_socdk.dts -+++ b/arch/arm/dts/socfpga_stratix10_socdk.dts -@@ -43,7 +43,7 @@ - /* 4GB */ - reg = <0 0x00000000 0 0x80000000>, - <1 0x80000000 0 0x80000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -diff --git a/arch/arm/dts/starqltechn-uboot.dtsi b/arch/arm/dts/starqltechn-uboot.dtsi -index 8d5d09c3a5..d81a22ffe4 100644 ---- a/arch/arm/dts/starqltechn-uboot.dtsi -+++ b/arch/arm/dts/starqltechn-uboot.dtsi -@@ -9,21 +9,21 @@ - / - { - framebuffer@9D400000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - serial@a84000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - clock-controller@100000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - gpio_north@3900000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - pinctrl_north@3900000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -diff --git a/arch/arm/dts/stm32429i-eval-u-boot.dtsi b/arch/arm/dts/stm32429i-eval-u-boot.dtsi -index 030da47b7a..e909653137 100644 ---- a/arch/arm/dts/stm32429i-eval-u-boot.dtsi -+++ b/arch/arm/dts/stm32429i-eval-u-boot.dtsi -@@ -7,7 +7,7 @@ - #include - /{ - clocks { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - aliases { -@@ -26,9 +26,9 @@ - }; - - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - pin-controller { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - fmc: fmc@A0000000 { -@@ -39,7 +39,7 @@ - pinctrl-0 = <&fmc_pins_d32>; - pinctrl-names = "default"; - st,mem_remap = <4>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - /* - * Memory configuration from sdram -@@ -68,86 +68,86 @@ - }; - - &clk_hse { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &clk_lse { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &clk_i2s_ckin { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pwrcfg { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &syscfg { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &rcc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioa { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpiob { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpiod { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioe { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpiof { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpiog { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioh { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioi { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioj { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpiok { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl { - usart1_pins_a: usart1-0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - pins1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - pins2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - fmc_pins_d32: fmc_d32@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - pins - { - pinmux = , /* D31 */ -@@ -213,11 +213,11 @@ - , /* SDCKE0 */ - ; /* SDCLK> */ - slew-rate = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; - - &timers5 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/stm32746g-eval-u-boot.dtsi b/arch/arm/dts/stm32746g-eval-u-boot.dtsi -index 8550ef7863..1c288acec9 100644 ---- a/arch/arm/dts/stm32746g-eval-u-boot.dtsi -+++ b/arch/arm/dts/stm32746g-eval-u-boot.dtsi -@@ -39,7 +39,7 @@ - * Memory configuration from sdram datasheet IS42S32800G-6BLI - */ - bank1: bank@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - st,sdram-control = /bits/ 8 - /{ - clocks { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - aliases { -@@ -26,7 +26,7 @@ - }; - - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - fmc: fmc@A0000000 { - compatible = "st,stm32-fmc"; - reg = <0xa0000000 0x1000>; -@@ -35,7 +35,7 @@ - pinctrl-names = "default"; - st,syscfg = <&syscfg>; - st,swp_fmc = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - /* - * Memory configuration from sdram datasheet -@@ -63,76 +63,76 @@ - }; - - &clk_hse { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &clk_i2s_ckin { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &clk_lse { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioa { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpiob { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpiod { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioe { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpiof { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpiog { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioh { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioi { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioj { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpiok { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - - usart1_pins_a: usart1-0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - pins1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - pins2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - fmc_pins: fmc@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - pins - { - pinmux = , /* D15 */ -@@ -178,19 +178,19 @@ - , /* SDCKE1 */ - ; /* SDCLK */ - slew-rate = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; - - &pwrcfg { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &rcc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &timers5 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi b/arch/arm/dts/stm32f469-disco-u-boot.dtsi -index ee0c82b53e..c07e2022e4 100644 ---- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi -+++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi -@@ -7,7 +7,7 @@ - #include - /{ - clocks { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - aliases { -@@ -27,7 +27,7 @@ - }; - - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - - fmc: fmc@A0000000 { - compatible = "st,stm32-fmc"; -@@ -37,7 +37,7 @@ - pinctrl-0 = <&fmc_pins_d32>; - pinctrl-names = "default"; - st,mem_remap = <4>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - /* - * Memory configuration from sdram -@@ -79,66 +79,66 @@ - }; - - &clk_hse { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &clk_i2s_ckin { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &clk_lse { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioa { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpiob { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpiod { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioe { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpiof { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpiog { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioh { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioi { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioj { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpiok { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - - fmc_pins_d32: fmc_d32@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - pins - { - pinmux = , /* D31 */ -@@ -203,7 +203,7 @@ - , /* SDCKE0 */ - ; /* SDCLK> */ - slew-rate = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -220,18 +220,18 @@ - }; - - usart3_pins_a: usart3-0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - pins1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - pins2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; - - &pwrcfg { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &qspi { -@@ -248,13 +248,13 @@ - }; - - &rcc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &syscfg { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &timers5 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/stm32f7-u-boot.dtsi b/arch/arm/dts/stm32f7-u-boot.dtsi -index 0ba8031c33..efc4e2afe1 100644 ---- a/arch/arm/dts/stm32f7-u-boot.dtsi -+++ b/arch/arm/dts/stm32f7-u-boot.dtsi -@@ -3,7 +3,7 @@ - #include - /{ - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - - fmc: fmc@A0000000 { - compatible = "st,stm32-fmc"; -@@ -12,7 +12,7 @@ - pinctrl-0 = <&fmc_pins>; - pinctrl-names = "default"; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - mac: ethernet@40028000 { -@@ -60,70 +60,70 @@ - }; - - &clk_hse { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioa { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpiob { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpiod { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioe { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpiof { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpiog { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioh { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioi { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - - fmc_pins: fmc@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - pins - { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; - - &pwrcfg { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &rcc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &timers5 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &usart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - clocks = <&rcc 0 STM32F7_APB2_CLOCK(USART1)>; - }; -diff --git a/arch/arm/dts/stm32f746-disco-u-boot.dtsi b/arch/arm/dts/stm32f746-disco-u-boot.dtsi -index a4ce936d7d..19b5451db4 100644 ---- a/arch/arm/dts/stm32f746-disco-u-boot.dtsi -+++ b/arch/arm/dts/stm32f746-disco-u-boot.dtsi -@@ -73,7 +73,7 @@ - pinctrl-0 = <<dc_pins>; - - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -@@ -81,7 +81,7 @@ - &fmc { - /* Memory configuration from sdram datasheet MT48LC_4M32_B2B5-6A */ - bank1: bank@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - st,sdram-control = /bits/ 8 , - <&clk_hse>; - clock-names = "pclk", "px_clk", "ref"; -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - - ports { -@@ -83,7 +83,7 @@ - clocks = <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>; - - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - ports { - port@0 { -@@ -99,7 +99,7 @@ - &fmc { - /* Memory configuration from sdram datasheet MT48LC_4M32_B2B5-6A */ - bank1: bank@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - st,sdram-control = /bits/ 8 ; - offset = <0x404>; -@@ -43,10 +43,10 @@ - }; - - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - - ddr: ddr@5a003000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - compatible = "st,stm32mp1-ddr"; - -@@ -59,94 +59,94 @@ - }; - - &bsec { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &clk_csi { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &clk_hsi { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &clk_hse { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &clk_lsi { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &clk_lse { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &cpu0_opp_table { -- u-boot,dm-spl; -+ bootph-pre-ram; - opp-650000000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - opp-800000000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &gpioa { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpiob { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpiod { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioe { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpiof { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpiog { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioh { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioi { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioj { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpiok { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gpioz { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &iwdg2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - /* pre-reloc probe = reserve video frame buffer in video_reserve() */ - <dc { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - /* temp = waiting kernel update */ -@@ -157,19 +157,19 @@ - }; - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_z { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pwr_regulators { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &rcc { -- u-boot,dm-pre-reloc; -+ bootph-all; - #address-cells = <1>; - #size-cells = <0>; - }; -diff --git a/arch/arm/dts/stm32mp157a-dk1-scmi-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dk1-scmi-u-boot.dtsi -index 92fdf09872..20728f27ee 100644 ---- a/arch/arm/dts/stm32mp157a-dk1-scmi-u-boot.dtsi -+++ b/arch/arm/dts/stm32mp157a-dk1-scmi-u-boot.dtsi -@@ -35,16 +35,16 @@ - }; - - &uart4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart4_pins_a { -- u-boot,dm-pre-reloc; -+ bootph-all; - pins1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - pins2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - /* pull-up on rx to avoid floating level */ - bias-pull-up; - }; -diff --git a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi -index 15a04ae927..cff3f49948 100644 ---- a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi -+++ b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi -@@ -37,12 +37,12 @@ - }; - - reserved-memory { -- u-boot,dm-spl; -+ bootph-pre-ram; - - optee@de000000 { - reg = <0xde000000 0x02000000>; - no-map; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - #endif -@@ -66,18 +66,18 @@ - }; - - &i2c4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &i2c4_pins_a { -- u-boot,dm-pre-reloc; -+ bootph-all; - pins { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &pmic { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &rcc { -@@ -151,7 +151,7 @@ - reg = <1>; - cfg = < 2 65 1 0 0 PQR(1,1,1) >; - frac = < 0x1400 >; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */ -@@ -160,7 +160,7 @@ - reg = <2>; - cfg = < 1 33 1 16 36 PQR(1,1,1) >; - frac = < 0x1a04 >; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */ -@@ -168,35 +168,35 @@ - compatible = "st,stm32mp1-pll"; - reg = <3>; - cfg = < 3 98 5 7 7 PQR(1,1,1) >; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &sdmmc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc1_b4_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - pins2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &uart4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart4_pins_a { -- u-boot,dm-pre-reloc; -+ bootph-all; - pins1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - pins2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - /* pull-up on rx to avoid floating level */ - bias-pull-up; - }; -diff --git a/arch/arm/dts/stm32mp157a-icore-stm32mp1-ctouch2-u-boot.dtsi b/arch/arm/dts/stm32mp157a-icore-stm32mp1-ctouch2-u-boot.dtsi -index 96fe461235..5547535975 100644 ---- a/arch/arm/dts/stm32mp157a-icore-stm32mp1-ctouch2-u-boot.dtsi -+++ b/arch/arm/dts/stm32mp157a-icore-stm32mp1-ctouch2-u-boot.dtsi -@@ -18,34 +18,34 @@ - }; - - &sdmmc1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc1_b4_pins_a { -- u-boot,dm-pre-reloc; -+ bootph-all; - - pins1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pins2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &uart4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart4_pins_a { -- u-boot,dm-pre-reloc; -+ bootph-all; - - pins1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pins2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - bias-pull-up; - }; - }; -diff --git a/arch/arm/dts/stm32mp157a-icore-stm32mp1-edimm2.2-u-boot.dtsi b/arch/arm/dts/stm32mp157a-icore-stm32mp1-edimm2.2-u-boot.dtsi -index 96fe461235..5547535975 100644 ---- a/arch/arm/dts/stm32mp157a-icore-stm32mp1-edimm2.2-u-boot.dtsi -+++ b/arch/arm/dts/stm32mp157a-icore-stm32mp1-edimm2.2-u-boot.dtsi -@@ -18,34 +18,34 @@ - }; - - &sdmmc1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc1_b4_pins_a { -- u-boot,dm-pre-reloc; -+ bootph-all; - - pins1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pins2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &uart4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart4_pins_a { -- u-boot,dm-pre-reloc; -+ bootph-all; - - pins1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pins2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - bias-pull-up; - }; - }; -diff --git a/arch/arm/dts/stm32mp157a-icore-stm32mp1-u-boot.dtsi b/arch/arm/dts/stm32mp157a-icore-stm32mp1-u-boot.dtsi -index d62c24d4ce..630c96efd0 100644 ---- a/arch/arm/dts/stm32mp157a-icore-stm32mp1-u-boot.dtsi -+++ b/arch/arm/dts/stm32mp157a-icore-stm32mp1-u-boot.dtsi -@@ -10,47 +10,47 @@ - #include "stm32mp15-ddr3-icore-1x4Gb-1066-binG.dtsi" - - &vddcore { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &vdd { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &vdd_usb { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &vdda { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &vdd_ddr { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &vtt_ddr { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &vref_ddr { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &vdd_sd { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &v3v3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &v2v8 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &v1v8 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &rcc { -@@ -124,7 +124,7 @@ - reg = <1>; - cfg = < 2 65 1 0 0 PQR(1,1,1) >; - frac = < 0x1400 >; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */ -@@ -133,7 +133,7 @@ - reg = <2>; - cfg = < 1 33 1 16 36 PQR(1,1,1) >; - frac = < 0x1a04 >; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */ -@@ -141,6 +141,6 @@ - compatible = "st,stm32mp1-pll"; - reg = <3>; - cfg = < 3 98 5 7 7 PQR(1,1,1) >; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; -diff --git a/arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7-u-boot.dtsi b/arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7-u-boot.dtsi -index e4bd215812..a5e7060922 100644 ---- a/arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7-u-boot.dtsi -+++ b/arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7-u-boot.dtsi -@@ -18,34 +18,34 @@ - }; - - &sdmmc1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc1_b4_pins_a { -- u-boot,dm-pre-reloc; -+ bootph-all; - - pins1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pins2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &uart4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart4_pins_a { -- u-boot,dm-pre-reloc; -+ bootph-all; - - pins1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pins2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - bias-pull-up; - }; - }; -diff --git a/arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-u-boot.dtsi b/arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-u-boot.dtsi -index e4bd215812..a5e7060922 100644 ---- a/arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-u-boot.dtsi -+++ b/arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-u-boot.dtsi -@@ -18,34 +18,34 @@ - }; - - &sdmmc1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdmmc1_b4_pins_a { -- u-boot,dm-pre-reloc; -+ bootph-all; - - pins1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pins2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &uart4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart4_pins_a { -- u-boot,dm-pre-reloc; -+ bootph-all; - - pins1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pins2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - bias-pull-up; - }; - }; -diff --git a/arch/arm/dts/stm32mp157a-microgea-stm32mp1-u-boot.dtsi b/arch/arm/dts/stm32mp157a-microgea-stm32mp1-u-boot.dtsi -index 836df6f746..7bba28af5b 100644 ---- a/arch/arm/dts/stm32mp157a-microgea-stm32mp1-u-boot.dtsi -+++ b/arch/arm/dts/stm32mp157a-microgea-stm32mp1-u-boot.dtsi -@@ -10,19 +10,19 @@ - #include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi" - - &vin { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &vddcore { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &vdd { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &vddq_ddr { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &rcc { -@@ -96,7 +96,7 @@ - reg = <1>; - cfg = < 2 65 1 0 0 PQR(1,1,1) >; - frac = < 0x1400 >; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */ -@@ -105,7 +105,7 @@ - reg = <2>; - cfg = < 1 33 1 16 36 PQR(1,1,1) >; - frac = < 0x1a04 >; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */ -@@ -113,6 +113,6 @@ - compatible = "st,stm32mp1-pll"; - reg = <3>; - cfg = < 3 98 5 7 7 PQR(1,1,1) >; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; -diff --git a/arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi -index 63948ef493..4d763bd3a2 100644 ---- a/arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi -+++ b/arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi -@@ -29,16 +29,16 @@ - }; - - &uart4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart4_pins_a { -- u-boot,dm-pre-reloc; -+ bootph-all; - pins1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - pins2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - /* pull-up on rx to avoid floating level */ - bias-pull-up; - }; -diff --git a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi -index 408abaf52f..b8288273dd 100644 ---- a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi -+++ b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi -@@ -58,18 +58,18 @@ - }; - - &i2c4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &i2c4_pins_a { -- u-boot,dm-pre-reloc; -+ bootph-all; - pins { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &pmic { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &rcc { -@@ -143,7 +143,7 @@ - reg = <1>; - cfg = < 2 65 1 0 0 PQR(1,1,1) >; - frac = < 0x1400 >; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */ -@@ -152,7 +152,7 @@ - reg = <2>; - cfg = < 1 33 1 16 36 PQR(1,1,1) >; - frac = < 0x1a04 >; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */ -@@ -160,66 +160,66 @@ - compatible = "st,stm32mp1-pll"; - reg = <3>; - cfg = < 3 98 5 7 7 PQR(1,1,1) >; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &sdmmc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc1_b4_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - pins2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &sdmmc1_dir_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - pins2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &sdmmc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc2_b4_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - pins2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &sdmmc2_d47_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &uart4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart4_pins_a { -- u-boot,dm-pre-reloc; -+ bootph-all; - pins1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - pins2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - /* pull-up on rx to avoid floating level */ - bias-pull-up; - }; -diff --git a/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi -index 7bf08bec6d..cb32c30431 100644 ---- a/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi -+++ b/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi -@@ -22,37 +22,37 @@ - }; - - &flash0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &qspi { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &qspi_clk_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &qspi_bk1_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - pins2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &qspi_bk2_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - pins2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -diff --git a/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi -index 4ff848350d..b780dbd95e 100644 ---- a/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi -+++ b/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi -@@ -18,18 +18,18 @@ - }; - - &i2c2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &i2c2_pins_a { -- u-boot,dm-pre-reloc; -+ bootph-all; - pins { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &pmic { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &rcc { -@@ -103,7 +103,7 @@ - reg = <1>; - cfg = < 2 65 1 0 0 PQR(1,1,1) >; - frac = < 0x1400 >; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */ -@@ -112,7 +112,7 @@ - reg = <2>; - cfg = < 1 33 1 16 36 PQR(1,1,1) >; - frac = < 0x1a04 >; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */ -@@ -120,27 +120,27 @@ - compatible = "st,stm32mp1-pll"; - reg = <3>; - cfg = < 3 98 5 7 7 PQR(1,1,1) >; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &sdmmc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc2_b4_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - pins2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &sdmmc2_d47_pins_d { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; -diff --git a/arch/arm/dts/stm32mp157c-odyssey-u-boot.dtsi b/arch/arm/dts/stm32mp157c-odyssey-u-boot.dtsi -index abceba5cbd..c1e35f2049 100644 ---- a/arch/arm/dts/stm32mp157c-odyssey-u-boot.dtsi -+++ b/arch/arm/dts/stm32mp157c-odyssey-u-boot.dtsi -@@ -29,30 +29,30 @@ - }; - - &sdmmc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc1_b4_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - pins2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &uart4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart4_pins_a { -- u-boot,dm-pre-reloc; -+ bootph-all; - pins1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - pins2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi -index b72a2f63f1..bc0730cf2b 100644 ---- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi -+++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi -@@ -46,17 +46,17 @@ - }; - - &i2c4 { -- u-boot,dm-pre-reloc; -- u-boot,dm-spl; -+ bootph-all; -+ bootph-pre-ram; - - eeprom0: eeprom@50 { - }; - }; - - &i2c4_pins_a { -- u-boot,dm-pre-reloc; -+ bootph-all; - pins { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -82,46 +82,46 @@ - }; - - &pmic { -- u-boot,dm-pre-reloc; -- u-boot,dm-spl; -+ bootph-all; -+ bootph-pre-ram; - - regulators { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &flash0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &qspi { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &qspi_clk_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &qspi_bk1_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - pins2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &qspi_bk2_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - pins2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -@@ -211,7 +211,7 @@ - reg = <1>; - cfg = < 2 65 1 0 0 PQR(1,1,1) >; - frac = < 0x1400 >; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */ -@@ -220,7 +220,7 @@ - reg = <2>; - cfg = < 1 33 1 16 36 PQR(1,1,1) >; - frac = < 0x1a04 >; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - /* VCO = 600.0 MHz => P = 100, Q = 50, R = 50 */ -@@ -228,12 +228,12 @@ - compatible = "st,stm32mp1-pll"; - reg = <3>; - cfg = < 1 49 5 11 11 PQR(1,1,1) >; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &sdmmc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - st,use-ckin; - st,cmd-gpios = <&gpiod 2 0>; - st,ck-gpios = <&gpioc 12 0>; -@@ -241,91 +241,91 @@ - }; - - &sdmmc1_b4_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - pins2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &sdmmc1_dir_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - pins2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &sdmmc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc2_b4_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &sdmmc2_d47_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &uart4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart4_pins_a { -- u-boot,dm-pre-reloc; -+ bootph-all; - pins1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - pins2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - /* pull-up on rx to avoid floating level */ - bias-pull-up; - }; - }; - - ®11 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - ®18 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb33 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbotg_hs_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbotg_hs { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbphyc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbphyc_port0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbphyc_port1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &vdd_usb { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi -index 6dee51dc1c..ab4d66c961 100644 ---- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi -+++ b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi -@@ -32,7 +32,7 @@ - }; - - &sdmmc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - st,use-ckin; - st,cmd-gpios = <&gpiod 2 0>; - st,ck-gpios = <&gpioc 12 0>; -@@ -40,57 +40,57 @@ - }; - - &sdmmc1_b4_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - pins2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &sdmmc1_dir_pins_b { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - pins2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &sdmmc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc2_b4_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - pins2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &sdmmc2_d47_pins_c { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &uart4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart4_pins_b { -- u-boot,dm-pre-reloc; -+ bootph-all; - pins1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - pins2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - /delete-property/ bias-disable; - bias-pull-up; - }; -@@ -106,5 +106,5 @@ - }; - - &vdd_io { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/stm32mp15xx-dhcor-drc-compact-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact-u-boot.dtsi -index b6a6a78647..038c3a92eb 100644 ---- a/arch/arm/dts/stm32mp15xx-dhcor-drc-compact-u-boot.dtsi -+++ b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact-u-boot.dtsi -@@ -30,7 +30,7 @@ - }; - - &sdmmc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - st,use-ckin; - st,cmd-gpios = <&gpiod 2 0>; - st,ck-gpios = <&gpioc 12 0>; -@@ -38,43 +38,43 @@ - }; - - &sdmmc1_b4_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - pins2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &sdmmc1_dir_pins_b { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - pins2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &sdmmc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc2_b4_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - pins2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &sdmmc2_d47_pins_c { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -@@ -83,16 +83,16 @@ - }; - - &uart4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart4_pins_d { -- u-boot,dm-pre-reloc; -+ bootph-all; - pins1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - pins2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - /delete-property/ bias-disable; - bias-pull-up; - }; -diff --git a/arch/arm/dts/stm32mp15xx-dhcor-testbench-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-testbench-u-boot.dtsi -index 5b051b8ac4..31995c058e 100644 ---- a/arch/arm/dts/stm32mp15xx-dhcor-testbench-u-boot.dtsi -+++ b/arch/arm/dts/stm32mp15xx-dhcor-testbench-u-boot.dtsi -@@ -30,7 +30,7 @@ - }; - - &sdmmc1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - st,use-ckin; - st,cmd-gpios = <&gpiod 2 0>; - st,ck-gpios = <&gpioc 12 0>; -@@ -38,57 +38,57 @@ - }; - - &sdmmc1_b4_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - pins2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &sdmmc1_dir_pins_b { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - pins2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &sdmmc2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &sdmmc2_b4_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - pins2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &sdmmc2_d47_pins_c { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &uart4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart4_pins_b { -- u-boot,dm-pre-reloc; -+ bootph-all; - pins1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - pins2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - /delete-property/ bias-disable; - bias-pull-up; - }; -diff --git a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi -index 25a288b047..804c66283e 100644 ---- a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi -+++ b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi -@@ -14,7 +14,7 @@ - #include "stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi" - - / { -- u-boot,dm-pre-reloc; -+ bootph-all; - - aliases { - eeprom0 = &eeprom0; -@@ -27,55 +27,55 @@ - }; - - &flash0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c4 { -- u-boot,dm-pre-reloc; -- u-boot,dm-spl; -+ bootph-all; -+ bootph-pre-ram; - - eeprom0: eeprom@53 { - }; - }; - - &i2c4_pins_a { -- u-boot,dm-pre-reloc; -+ bootph-all; - pins { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &pmic { -- u-boot,dm-pre-reloc; -- u-boot,dm-spl; -+ bootph-all; -+ bootph-pre-ram; - - regulators { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &pwr_regulators { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &qspi { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &qspi_clk_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &qspi_bk1_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - pins1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - pins2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - -@@ -165,7 +165,7 @@ - reg = <1>; - cfg = < 2 65 1 0 0 PQR(1,1,1) >; - frac = < 0x1400 >; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */ -@@ -174,7 +174,7 @@ - reg = <2>; - cfg = < 1 33 1 16 36 PQR(1,1,1) >; - frac = < 0x1a04 >; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - /* VCO = 594.0 MHz => P = 99, Q = 74, R = 99 */ -@@ -182,42 +182,42 @@ - compatible = "st,stm32mp1-pll"; - reg = <3>; - cfg = < 3 98 5 7 5 PQR(1,1,1) >; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - ®11 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - ®18 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usb33 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbotg_hs_pins_a { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbotg_hs { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbphyc { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbphyc_port0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &usbphyc_port1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &vdd_usb { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/arm/dts/t8103-u-boot.dtsi b/arch/arm/dts/t8103-u-boot.dtsi -index 43f552979d..e9e593a00c 100644 ---- a/arch/arm/dts/t8103-u-boot.dtsi -+++ b/arch/arm/dts/t8103-u-boot.dtsi -@@ -1,25 +1,25 @@ - // SPDX-License-Identifier: GPL-2.0+ OR MIT - - &serial0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pmgr { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &ps_sio_busif { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &ps_sio { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &ps_uart_p { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &ps_uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/tegra124-nyan-big-u-boot.dtsi b/arch/arm/dts/tegra124-nyan-big-u-boot.dtsi -index ddfeba806c..376dcdf68f 100644 ---- a/arch/arm/dts/tegra124-nyan-big-u-boot.dtsi -+++ b/arch/arm/dts/tegra124-nyan-big-u-boot.dtsi -@@ -8,9 +8,9 @@ - - / { - host1x@50000000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - dc@54200000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -diff --git a/arch/arm/dts/tegra20-u-boot.dtsi b/arch/arm/dts/tegra20-u-boot.dtsi -index f64667e549..fa582bcb9f 100644 ---- a/arch/arm/dts/tegra20-u-boot.dtsi -+++ b/arch/arm/dts/tegra20-u-boot.dtsi -@@ -5,9 +5,9 @@ - - / { - host1x@50000000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - dc@54200000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -diff --git a/arch/arm/dts/uniphier-ld11-global.dts b/arch/arm/dts/uniphier-ld11-global.dts -index 644ffb9707..da44a15a8a 100644 ---- a/arch/arm/dts/uniphier-ld11-global.dts -+++ b/arch/arm/dts/uniphier-ld11-global.dts -@@ -164,4 +164,8 @@ - - &nand { - status = "okay"; -+ -+ nand@0 { -+ reg = <0>; -+ }; - }; -diff --git a/arch/arm/dts/uniphier-ld11-ref.dts b/arch/arm/dts/uniphier-ld11-ref.dts -index 617d2b1e9b..414aeb99e6 100644 ---- a/arch/arm/dts/uniphier-ld11-ref.dts -+++ b/arch/arm/dts/uniphier-ld11-ref.dts -@@ -39,11 +39,11 @@ - }; - - ðsc { -- interrupts = <0 8>; -+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - }; - - &serialsc { -- interrupts = <0 8>; -+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - }; - - &serial0 { -@@ -51,7 +51,7 @@ - }; - - &gpio { -- xirq0 { -+ xirq0-hog { - gpio-hog; - gpios = ; - input; -diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi -index 104d56d625..7bb36b0714 100644 ---- a/arch/arm/dts/uniphier-ld11.dtsi -+++ b/arch/arm/dts/uniphier-ld11.dtsi -@@ -7,6 +7,7 @@ - - #include - #include -+#include - - / { - compatible = "socionext,uniphier-ld11"; -@@ -35,6 +36,7 @@ - reg = <0 0x000>; - clocks = <&sys_clk 33>; - enable-method = "psci"; -+ next-level-cache = <&l2>; - operating-points-v2 = <&cluster0_opp>; - }; - -@@ -44,8 +46,13 @@ - reg = <0 0x001>; - clocks = <&sys_clk 33>; - enable-method = "psci"; -+ next-level-cache = <&l2>; - operating-points-v2 = <&cluster0_opp>; - }; -+ -+ l2: l2-cache { -+ compatible = "cache"; -+ }; - }; - - cluster0_opp: opp-table { -@@ -102,10 +109,10 @@ - - timer { - compatible = "arm,armv8-timer"; -- interrupts = <1 13 4>, -- <1 14 4>, -- <1 11 4>, -- <1 10 4>; -+ interrupts = , -+ , -+ , -+ ; - }; - - reserved-memory { -@@ -131,7 +138,7 @@ - reg = <0x54006000 0x100>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 39 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_spi0>; - clocks = <&peri_clk 11>; -@@ -144,7 +151,7 @@ - reg = <0x54006100 0x100>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 216 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_spi1>; - clocks = <&peri_clk 12>; -@@ -155,7 +162,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006800 0x40>; -- interrupts = <0 33 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart0>; - clocks = <&peri_clk 0>; -@@ -166,7 +173,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006900 0x40>; -- interrupts = <0 35 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - clocks = <&peri_clk 1>; -@@ -177,7 +184,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006a00 0x40>; -- interrupts = <0 37 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - clocks = <&peri_clk 2>; -@@ -188,7 +195,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006b00 0x40>; -- interrupts = <0 177 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3>; - clocks = <&peri_clk 3>; -@@ -223,7 +230,7 @@ - audio@56000000 { - compatible = "socionext,uniphier-ld11-aio"; - reg = <0x56000000 0x80000>; -- interrupts = <0 144 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_aout1>, - <&pinctrl_aoutiec1>; -@@ -306,12 +313,12 @@ - }; - }; - -- adamv@57920000 { -+ syscon@57920000 { - compatible = "socionext,uniphier-ld11-adamv", - "simple-mfd", "syscon"; - reg = <0x57920000 0x1000>; - -- adamv_rst: reset { -+ adamv_rst: reset-controller { - compatible = "socionext,uniphier-ld11-adamv-reset"; - #reset-cells = <1>; - }; -@@ -323,7 +330,7 @@ - reg = <0x58780000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 41 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c0>; - clocks = <&peri_clk 4>; -@@ -337,7 +344,7 @@ - reg = <0x58781000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 42 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - clocks = <&peri_clk 5>; -@@ -350,7 +357,7 @@ - reg = <0x58782000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 43 4>; -+ interrupts = ; - clocks = <&peri_clk 6>; - resets = <&peri_rst 6>; - clock-frequency = <400000>; -@@ -362,7 +369,7 @@ - reg = <0x58783000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 44 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c3>; - clocks = <&peri_clk 7>; -@@ -376,7 +383,7 @@ - reg = <0x58784000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 45 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c4>; - clocks = <&peri_clk 8>; -@@ -389,7 +396,7 @@ - reg = <0x58785000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 25 4>; -+ interrupts = ; - clocks = <&peri_clk 9>; - resets = <&peri_rst 9>; - clock-frequency = <400000>; -@@ -410,28 +417,28 @@ - reg = <0x59801000 0x400>; - }; - -- sdctrl@59810000 { -+ syscon@59810000 { - compatible = "socionext,uniphier-ld11-sdctrl", - "simple-mfd", "syscon"; - reg = <0x59810000 0x400>; - -- sd_rst: reset { -+ sd_rst: reset-controller { - compatible = "socionext,uniphier-ld11-sd-reset"; - #reset-cells = <1>; - }; - }; - -- perictrl@59820000 { -+ syscon@59820000 { - compatible = "socionext,uniphier-ld11-perictrl", - "simple-mfd", "syscon"; - reg = <0x59820000 0x200>; - -- peri_clk: clock { -+ peri_clk: clock-controller { - compatible = "socionext,uniphier-ld11-peri-clock"; - #clock-cells = <1>; - }; - -- peri_rst: reset { -+ peri_rst: reset-controller { - compatible = "socionext,uniphier-ld11-peri-reset"; - #reset-cells = <1>; - }; -@@ -440,7 +447,7 @@ - emmc: mmc@5a000000 { - compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; - reg = <0x5a000000 0x400>; -- interrupts = <0 78 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_emmc>; - clocks = <&sys_clk 4>; -@@ -460,7 +467,7 @@ - compatible = "socionext,uniphier-ehci", "generic-ehci"; - status = "disabled"; - reg = <0x5a800100 0x100>; -- interrupts = <0 243 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb0>; - clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>, -@@ -476,7 +483,7 @@ - compatible = "socionext,uniphier-ehci", "generic-ehci"; - status = "disabled"; - reg = <0x5a810100 0x100>; -- interrupts = <0 244 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb1>; - clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>, -@@ -492,7 +499,7 @@ - compatible = "socionext,uniphier-ehci", "generic-ehci"; - status = "disabled"; - reg = <0x5a820100 0x100>; -- interrupts = <0 245 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb2>; - clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 10>, -@@ -504,24 +511,24 @@ - has-transaction-translator; - }; - -- mioctrl@5b3e0000 { -+ syscon@5b3e0000 { - compatible = "socionext,uniphier-ld11-mioctrl", - "simple-mfd", "syscon"; - reg = <0x5b3e0000 0x800>; - -- mio_clk: clock { -+ mio_clk: clock-controller { - compatible = "socionext,uniphier-ld11-mio-clock"; - #clock-cells = <1>; - }; - -- mio_rst: reset { -+ mio_rst: reset-controller { - compatible = "socionext,uniphier-ld11-mio-reset"; - #reset-cells = <1>; - resets = <&sys_rst 7>; - }; - }; - -- soc_glue: soc-glue@5f800000 { -+ soc_glue: syscon@5f800000 { - compatible = "socionext,uniphier-ld11-soc-glue", - "simple-mfd", "syscon"; - reg = <0x5f800000 0x2000>; -@@ -530,7 +537,7 @@ - compatible = "socionext,uniphier-ld11-pinctrl"; - }; - -- usb-phy { -+ usb-hub { - compatible = "socionext,uniphier-ld11-usb2-phy"; - #address-cells = <1>; - #size-cells = <0>; -@@ -552,9 +559,10 @@ - }; - }; - -- soc-glue@5f900000 { -+ syscon@5f900000 { - compatible = "socionext,uniphier-ld11-soc-glue-debug", -- "simple-mfd"; -+ "simple-mfd", "syscon"; -+ reg = <0x5f900000 0x2000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x5f900000 0x2000>; -@@ -573,7 +581,7 @@ - xdmac: dma-controller@5fc10000 { - compatible = "socionext,uniphier-xdmac"; - reg = <0x5fc10000 0x5300>; -- interrupts = <0 188 4>; -+ interrupts = ; - dma-channels = <16>; - #dma-cells = <2>; - }; -@@ -591,20 +599,20 @@ - <0x5fe40000 0x80000>; /* GICR */ - interrupt-controller; - #interrupt-cells = <3>; -- interrupts = <1 9 4>; -+ interrupts = ; - }; - -- sysctrl@61840000 { -+ syscon@61840000 { - compatible = "socionext,uniphier-ld11-sysctrl", - "simple-mfd", "syscon"; - reg = <0x61840000 0x10000>; - -- sys_clk: clock { -+ sys_clk: clock-controller { - compatible = "socionext,uniphier-ld11-clock"; - #clock-cells = <1>; - }; - -- sys_rst: reset { -+ sys_rst: reset-controller { - compatible = "socionext,uniphier-ld11-reset"; - #reset-cells = <1>; - }; -@@ -618,7 +626,7 @@ - compatible = "socionext,uniphier-ld11-ave4"; - status = "disabled"; - reg = <0x65000000 0x8500>; -- interrupts = <0 66 4>; -+ interrupts = ; - clock-names = "ether"; - clocks = <&sys_clk 6>; - reset-names = "ether"; -@@ -638,7 +646,9 @@ - status = "disabled"; - reg-names = "nand_data", "denali_reg"; - reg = <0x68000000 0x20>, <0x68100000 0x1000>; -- interrupts = <0 65 4>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_nand>; - clock-names = "nand", "nand_x", "ecc"; -diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi -index 4549935c42..4e21716302 100644 ---- a/arch/arm/dts/uniphier-ld20.dtsi -+++ b/arch/arm/dts/uniphier-ld20.dtsi -@@ -7,6 +7,7 @@ - - #include - #include -+#include - #include - - / { -@@ -45,6 +46,7 @@ - reg = <0 0x000>; - clocks = <&sys_clk 32>; - enable-method = "psci"; -+ next-level-cache = <&a72_l2>; - operating-points-v2 = <&cluster0_opp>; - #cooling-cells = <2>; - }; -@@ -55,6 +57,7 @@ - reg = <0 0x001>; - clocks = <&sys_clk 32>; - enable-method = "psci"; -+ next-level-cache = <&a72_l2>; - operating-points-v2 = <&cluster0_opp>; - #cooling-cells = <2>; - }; -@@ -65,6 +68,7 @@ - reg = <0 0x100>; - clocks = <&sys_clk 33>; - enable-method = "psci"; -+ next-level-cache = <&a53_l2>; - operating-points-v2 = <&cluster1_opp>; - #cooling-cells = <2>; - }; -@@ -75,12 +79,21 @@ - reg = <0 0x101>; - clocks = <&sys_clk 33>; - enable-method = "psci"; -+ next-level-cache = <&a53_l2>; - operating-points-v2 = <&cluster1_opp>; - #cooling-cells = <2>; - }; -+ -+ a72_l2: l2-cache0 { -+ compatible = "cache"; -+ }; -+ -+ a53_l2: l2-cache1 { -+ compatible = "cache"; -+ }; - }; - -- cluster0_opp: opp-table0 { -+ cluster0_opp: opp-table-0 { - compatible = "operating-points-v2"; - opp-shared; - -@@ -118,7 +131,7 @@ - }; - }; - -- cluster1_opp: opp-table1 { -+ cluster1_opp: opp-table-1 { - compatible = "operating-points-v2"; - opp-shared; - -@@ -176,10 +189,10 @@ - - timer { - compatible = "arm,armv8-timer"; -- interrupts = <1 13 4>, -- <1 14 4>, -- <1 11 4>, -- <1 10 4>; -+ interrupts = , -+ , -+ , -+ ; - }; - - thermal-zones { -@@ -236,7 +249,7 @@ - reg = <0x54006000 0x100>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 39 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_spi0>; - clocks = <&peri_clk 11>; -@@ -249,7 +262,7 @@ - reg = <0x54006100 0x100>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 216 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_spi1>; - clocks = <&peri_clk 12>; -@@ -262,7 +275,7 @@ - reg = <0x54006200 0x100>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 229 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_spi2>; - clocks = <&peri_clk 13>; -@@ -275,7 +288,7 @@ - reg = <0x54006300 0x100>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 230 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_spi3>; - clocks = <&peri_clk 14>; -@@ -286,7 +299,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006800 0x40>; -- interrupts = <0 33 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart0>; - clocks = <&peri_clk 0>; -@@ -297,7 +310,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006900 0x40>; -- interrupts = <0 35 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - clocks = <&peri_clk 1>; -@@ -308,7 +321,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006a00 0x40>; -- interrupts = <0 37 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - clocks = <&peri_clk 2>; -@@ -319,7 +332,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006b00 0x40>; -- interrupts = <0 177 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3>; - clocks = <&peri_clk 3>; -@@ -348,7 +361,7 @@ - audio@56000000 { - compatible = "socionext,uniphier-ld20-aio"; - reg = <0x56000000 0x80000>; -- interrupts = <0 144 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_aout1>, - <&pinctrl_aoutiec1>; -@@ -431,12 +444,12 @@ - }; - }; - -- adamv@57920000 { -+ syscon@57920000 { - compatible = "socionext,uniphier-ld20-adamv", - "simple-mfd", "syscon"; - reg = <0x57920000 0x1000>; - -- adamv_rst: reset { -+ adamv_rst: reset-controller { - compatible = "socionext,uniphier-ld20-adamv-reset"; - #reset-cells = <1>; - }; -@@ -448,7 +461,7 @@ - reg = <0x58780000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 41 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c0>; - clocks = <&peri_clk 4>; -@@ -462,7 +475,7 @@ - reg = <0x58781000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 42 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - clocks = <&peri_clk 5>; -@@ -475,7 +488,7 @@ - reg = <0x58782000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 43 4>; -+ interrupts = ; - clocks = <&peri_clk 6>; - resets = <&peri_rst 6>; - clock-frequency = <400000>; -@@ -487,7 +500,7 @@ - reg = <0x58783000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 44 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c3>; - clocks = <&peri_clk 7>; -@@ -501,7 +514,7 @@ - reg = <0x58784000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 45 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c4>; - clocks = <&peri_clk 8>; -@@ -514,7 +527,7 @@ - reg = <0x58785000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 25 4>; -+ interrupts = ; - clocks = <&peri_clk 9>; - resets = <&peri_rst 9>; - clock-frequency = <400000>; -@@ -535,33 +548,33 @@ - reg = <0x59801000 0x400>; - }; - -- sdctrl@59810000 { -+ sdctrl: syscon@59810000 { - compatible = "socionext,uniphier-ld20-sdctrl", - "simple-mfd", "syscon"; - reg = <0x59810000 0x400>; - -- sd_clk: clock { -+ sd_clk: clock-controller { - compatible = "socionext,uniphier-ld20-sd-clock"; - #clock-cells = <1>; - }; - -- sd_rst: reset { -+ sd_rst: reset-controller { - compatible = "socionext,uniphier-ld20-sd-reset"; - #reset-cells = <1>; - }; - }; - -- perictrl@59820000 { -+ syscon@59820000 { - compatible = "socionext,uniphier-ld20-perictrl", - "simple-mfd", "syscon"; - reg = <0x59820000 0x200>; - -- peri_clk: clock { -+ peri_clk: clock-controller { - compatible = "socionext,uniphier-ld20-peri-clock"; - #clock-cells = <1>; - }; - -- peri_rst: reset { -+ peri_rst: reset-controller { - compatible = "socionext,uniphier-ld20-peri-reset"; - #reset-cells = <1>; - }; -@@ -570,7 +583,7 @@ - emmc: mmc@5a000000 { - compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; - reg = <0x5a000000 0x400>; -- interrupts = <0 78 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_emmc>; - clocks = <&sys_clk 4>; -@@ -590,7 +603,7 @@ - compatible = "socionext,uniphier-sd-v3.1.1"; - status = "disabled"; - reg = <0x5a400000 0x800>; -- interrupts = <0 76 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sd>; - clocks = <&sd_clk 0>; -@@ -598,9 +611,10 @@ - resets = <&sd_rst 0>; - bus-width = <4>; - cap-sd-highspeed; -+ socionext,syscon-uhs-mode = <&sdctrl 0>; - }; - -- soc_glue: soc-glue@5f800000 { -+ soc_glue: syscon@5f800000 { - compatible = "socionext,uniphier-ld20-soc-glue", - "simple-mfd", "syscon"; - reg = <0x5f800000 0x2000>; -@@ -610,9 +624,10 @@ - }; - }; - -- soc-glue@5f900000 { -+ syscon@5f900000 { - compatible = "socionext,uniphier-ld20-soc-glue-debug", -- "simple-mfd"; -+ "simple-mfd", "syscon"; -+ reg = <0x5f900000 0x2000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x5f900000 0x2000>; -@@ -675,7 +690,7 @@ - xdmac: dma-controller@5fc10000 { - compatible = "socionext,uniphier-xdmac"; - reg = <0x5fc10000 0x5300>; -- interrupts = <0 188 4>; -+ interrupts = ; - dma-channels = <16>; - #dma-cells = <2>; - }; -@@ -693,20 +708,20 @@ - <0x5fe80000 0x80000>; /* GICR */ - interrupt-controller; - #interrupt-cells = <3>; -- interrupts = <1 9 4>; -+ interrupts = ; - }; - -- sysctrl@61840000 { -+ syscon@61840000 { - compatible = "socionext,uniphier-ld20-sysctrl", - "simple-mfd", "syscon"; - reg = <0x61840000 0x10000>; - -- sys_clk: clock { -+ sys_clk: clock-controller { - compatible = "socionext,uniphier-ld20-clock"; - #clock-cells = <1>; - }; - -- sys_rst: reset { -+ sys_rst: reset-controller { - compatible = "socionext,uniphier-ld20-reset"; - #reset-cells = <1>; - }; -@@ -715,9 +730,9 @@ - compatible = "socionext,uniphier-wdt"; - }; - -- pvtctl: pvtctl { -+ pvtctl: thermal-sensor { - compatible = "socionext,uniphier-ld20-thermal"; -- interrupts = <0 3 4>; -+ interrupts = ; - #thermal-sensor-cells = <0>; - socionext,tmod-calibration = <0x0f22 0x68ee>; - }; -@@ -727,7 +742,7 @@ - compatible = "socionext,uniphier-ld20-ave4"; - status = "disabled"; - reg = <0x65000000 0x8500>; -- interrupts = <0 66 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ether_rgmii>; - clock-names = "ether"; -@@ -744,12 +759,12 @@ - }; - }; - -- _usb: usb@65a00000 { -+ usb: usb@65a00000 { - compatible = "socionext,uniphier-dwc3", "snps,dwc3"; - status = "disabled"; - reg = <0x65a00000 0xcd00>; - interrupt-names = "host"; -- interrupts = <0 134 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb1>, - <&pinctrl_usb2>, <&pinctrl_usb3>; -@@ -762,14 +777,15 @@ - dr_mode = "host"; - }; - -- usb-glue@65b00000 { -+ usb-controller@65b00000 { - compatible = "socionext,uniphier-ld20-dwc3-glue", - "simple-mfd"; -+ reg = <0x65b00000 0x400>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x65b00000 0x400>; - -- usb_rst: reset@0 { -+ usb_rst: reset-controller@0 { - compatible = "socionext,uniphier-ld20-usb3-reset"; - reg = <0x0 0x4>; - #reset-cells = <1>; -@@ -815,7 +831,7 @@ - resets = <&sys_rst 14>; - }; - -- usb_hsphy0: hs-phy@200 { -+ usb_hsphy0: phy@200 { - compatible = "socionext,uniphier-ld20-usb3-hsphy"; - reg = <0x200 0x10>; - #phy-cells = <0>; -@@ -829,7 +845,7 @@ - <&usb_hs_i0>; - }; - -- usb_hsphy1: hs-phy@210 { -+ usb_hsphy1: phy@210 { - compatible = "socionext,uniphier-ld20-usb3-hsphy"; - reg = <0x210 0x10>; - #phy-cells = <0>; -@@ -843,7 +859,7 @@ - <&usb_hs_i0>; - }; - -- usb_hsphy2: hs-phy@220 { -+ usb_hsphy2: phy@220 { - compatible = "socionext,uniphier-ld20-usb3-hsphy"; - reg = <0x220 0x10>; - #phy-cells = <0>; -@@ -857,7 +873,7 @@ - <&usb_hs_i2>; - }; - -- usb_hsphy3: hs-phy@230 { -+ usb_hsphy3: phy@230 { - compatible = "socionext,uniphier-ld20-usb3-hsphy"; - reg = <0x230 0x10>; - #phy-cells = <0>; -@@ -871,7 +887,7 @@ - <&usb_hs_i2>; - }; - -- usb_ssphy0: ss-phy@300 { -+ usb_ssphy0: phy@300 { - compatible = "socionext,uniphier-ld20-usb3-ssphy"; - reg = <0x300 0x10>; - #phy-cells = <0>; -@@ -882,7 +898,7 @@ - vbus-supply = <&usb_vbus0>; - }; - -- usb_ssphy1: ss-phy@310 { -+ usb_ssphy1: phy@310 { - compatible = "socionext,uniphier-ld20-usb3-ssphy"; - reg = <0x310 0x10>; - #phy-cells = <0>; -@@ -894,27 +910,8 @@ - }; - }; - -- /* FIXME: U-Boot own node */ -- usb: usb@65b00000 { -- compatible = "socionext,uniphier-ld20-dwc3"; -- reg = <0x65b00000 0x1000>; -- #address-cells = <1>; -- #size-cells = <1>; -- ranges; -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb1>, -- <&pinctrl_usb2>, <&pinctrl_usb3>; -- dwc3@65a00000 { -- compatible = "snps,dwc3"; -- reg = <0x65a00000 0x10000>; -- interrupts = <0 134 4>; -- dr_mode = "host"; -- tx-fifo-resize; -- }; -- }; -- - pcie: pcie@66000000 { -- compatible = "socionext,uniphier-pcie", "snps,dw-pcie"; -+ compatible = "socionext,uniphier-pcie"; - status = "disabled"; - reg-names = "dbi", "link", "config"; - reg = <0x66000000 0x1000>, <0x66010000 0x10000>, -@@ -934,7 +931,8 @@ - <0x82000000 0 0x20000000 0x20000000 0 0x0ffe0000>; - #interrupt-cells = <1>; - interrupt-names = "dma", "msi"; -- interrupts = <0 224 4>, <0 225 4>; -+ interrupts = , -+ ; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0 0 0 1 &pcie_intc 0>, /* INTA */ - <0 0 0 2 &pcie_intc 1>, /* INTB */ -@@ -947,7 +945,7 @@ - interrupt-controller; - #interrupt-cells = <1>; - interrupt-parent = <&gic>; -- interrupts = <0 226 4>; -+ interrupts = ; - }; - }; - -@@ -967,7 +965,9 @@ - status = "disabled"; - reg-names = "nand_data", "denali_reg"; - reg = <0x68000000 0x20>, <0x68100000 0x1000>; -- interrupts = <0 65 4>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_nand>; - clock-names = "nand", "nand_x", "ecc"; -diff --git a/arch/arm/dts/uniphier-ld4-ref.dts b/arch/arm/dts/uniphier-ld4-ref.dts -index 03fe696668..e007db0847 100644 ---- a/arch/arm/dts/uniphier-ld4-ref.dts -+++ b/arch/arm/dts/uniphier-ld4-ref.dts -@@ -36,11 +36,11 @@ - }; - - ðsc { -- interrupts = <1 8>; -+ interrupts = <1 IRQ_TYPE_LEVEL_LOW>; - }; - - &serialsc { -- interrupts = <1 8>; -+ interrupts = <1 IRQ_TYPE_LEVEL_LOW>; - }; - - &serial0 { -@@ -56,7 +56,7 @@ - }; - - &gpio { -- xirq1 { -+ xirq1-hog { - gpio-hog; - gpios = ; - input; -@@ -81,4 +81,8 @@ - - &nand { - status = "okay"; -+ -+ nand@0 { -+ reg = <0>; -+ }; - }; -diff --git a/arch/arm/dts/uniphier-ld4.dtsi b/arch/arm/dts/uniphier-ld4.dtsi -index 897162d5f5..1baf590a71 100644 ---- a/arch/arm/dts/uniphier-ld4.dtsi -+++ b/arch/arm/dts/uniphier-ld4.dtsi -@@ -6,6 +6,7 @@ - // Author: Masahiro Yamada - - #include -+#include - - / { - compatible = "socionext,uniphier-ld4"; -@@ -55,7 +56,8 @@ - compatible = "socionext,uniphier-system-cache"; - reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, - <0x506c0000 0x400>; -- interrupts = <0 174 4>, <0 175 4>; -+ interrupts = , -+ ; - cache-unified; - cache-size = <(512 * 1024)>; - cache-sets = <256>; -@@ -69,7 +71,7 @@ - reg = <0x54006000 0x100>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 39 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_spi0>; - clocks = <&peri_clk 11>; -@@ -80,7 +82,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006800 0x40>; -- interrupts = <0 33 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart0>; - clocks = <&peri_clk 0>; -@@ -91,7 +93,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006900 0x40>; -- interrupts = <0 35 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - clocks = <&peri_clk 1>; -@@ -102,7 +104,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006a00 0x40>; -- interrupts = <0 37 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - clocks = <&peri_clk 2>; -@@ -113,7 +115,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006b00 0x40>; -- interrupts = <0 29 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3>; - clocks = <&peri_clk 3>; -@@ -140,7 +142,7 @@ - reg = <0x58400000 0x40>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 41 1>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c0>; - clocks = <&peri_clk 4>; -@@ -154,7 +156,7 @@ - reg = <0x58480000 0x40>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 42 1>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - clocks = <&peri_clk 5>; -@@ -168,7 +170,7 @@ - reg = <0x58500000 0x40>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 43 1>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2>; - clocks = <&peri_clk 6>; -@@ -182,7 +184,7 @@ - reg = <0x58580000 0x40>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 44 1>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c3>; - clocks = <&peri_clk 7>; -@@ -205,33 +207,33 @@ - reg = <0x59801000 0x400>; - }; - -- mioctrl@59810000 { -+ syscon@59810000 { - compatible = "socionext,uniphier-ld4-mioctrl", - "simple-mfd", "syscon"; - reg = <0x59810000 0x800>; - -- mio_clk: clock { -+ mio_clk: clock-controller { - compatible = "socionext,uniphier-ld4-mio-clock"; - #clock-cells = <1>; - }; - -- mio_rst: reset { -+ mio_rst: reset-controller { - compatible = "socionext,uniphier-ld4-mio-reset"; - #reset-cells = <1>; - }; - }; - -- perictrl@59820000 { -+ syscon@59820000 { - compatible = "socionext,uniphier-ld4-perictrl", - "simple-mfd", "syscon"; - reg = <0x59820000 0x200>; - -- peri_clk: clock { -+ peri_clk: clock-controller { - compatible = "socionext,uniphier-ld4-peri-clock"; - #clock-cells = <1>; - }; - -- peri_rst: reset { -+ peri_rst: reset-controller { - compatible = "socionext,uniphier-ld4-peri-reset"; - #reset-cells = <1>; - }; -@@ -240,8 +242,13 @@ - dmac: dma-controller@5a000000 { - compatible = "socionext,uniphier-mio-dmac"; - reg = <0x5a000000 0x1000>; -- interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>, -- <0 71 4>, <0 72 4>, <0 73 4>; -+ interrupts = , -+ , -+ , -+ , -+ , -+ , -+ ; - clocks = <&mio_clk 7>; - resets = <&mio_rst 7>; - #dma-cells = <1>; -@@ -251,7 +258,7 @@ - compatible = "socionext,uniphier-sd-v2.91"; - status = "disabled"; - reg = <0x5a400000 0x200>; -- interrupts = <0 76 4>; -+ interrupts = ; - pinctrl-names = "default", "uhs"; - pinctrl-0 = <&pinctrl_sd>; - pinctrl-1 = <&pinctrl_sd_uhs>; -@@ -271,7 +278,7 @@ - compatible = "socionext,uniphier-sd-v2.91"; - status = "disabled"; - reg = <0x5a500000 0x200>; -- interrupts = <0 78 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_emmc>; - clocks = <&mio_clk 1>; -@@ -289,7 +296,7 @@ - compatible = "socionext,uniphier-ehci", "generic-ehci"; - status = "disabled"; - reg = <0x5a800100 0x100>; -- interrupts = <0 80 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb0>; - clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>, -@@ -303,7 +310,7 @@ - compatible = "socionext,uniphier-ehci", "generic-ehci"; - status = "disabled"; - reg = <0x5a810100 0x100>; -- interrupts = <0 81 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb1>; - clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>, -@@ -317,7 +324,7 @@ - compatible = "socionext,uniphier-ehci", "generic-ehci"; - status = "disabled"; - reg = <0x5a820100 0x100>; -- interrupts = <0 82 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb2>; - clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 10>, -@@ -327,7 +334,7 @@ - has-transaction-translator; - }; - -- soc-glue@5f800000 { -+ syscon@5f800000 { - compatible = "socionext,uniphier-ld4-soc-glue", - "simple-mfd", "syscon"; - reg = <0x5f800000 0x2000>; -@@ -337,9 +344,10 @@ - }; - }; - -- soc-glue@5f900000 { -+ syscon@5f900000 { - compatible = "socionext,uniphier-ld4-soc-glue-debug", -- "simple-mfd"; -+ "simple-mfd", "syscon"; -+ reg = <0x5f900000 0x2000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x5f900000 0x2000>; -@@ -358,14 +366,16 @@ - timer@60000200 { - compatible = "arm,cortex-a9-global-timer"; - reg = <0x60000200 0x20>; -- interrupts = <1 11 0x104>; -+ interrupts = ; - clocks = <&arm_timer_clk>; - }; - - timer@60000600 { - compatible = "arm,cortex-a9-twd-timer"; - reg = <0x60000600 0x20>; -- interrupts = <1 13 0x104>; -+ interrupts = ; - clocks = <&arm_timer_clk>; - }; - -@@ -384,17 +394,17 @@ - #interrupt-cells = <2>; - }; - -- sysctrl@61840000 { -+ syscon@61840000 { - compatible = "socionext,uniphier-ld4-sysctrl", - "simple-mfd", "syscon"; - reg = <0x61840000 0x10000>; - -- sys_clk: clock { -+ sys_clk: clock-controller { - compatible = "socionext,uniphier-ld4-clock"; - #clock-cells = <1>; - }; - -- sys_rst: reset { -+ sys_rst: reset-controller { - compatible = "socionext,uniphier-ld4-reset"; - #reset-cells = <1>; - }; -@@ -405,7 +415,9 @@ - status = "disabled"; - reg-names = "nand_data", "denali_reg"; - reg = <0x68000000 0x20>, <0x68100000 0x1000>; -- interrupts = <0 65 4>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_nand2cs>; - clock-names = "nand", "nand_x", "ecc"; -diff --git a/arch/arm/dts/uniphier-pro4-ace.dts b/arch/arm/dts/uniphier-pro4-ace.dts -index 27ff2b7b9d..6baee4410d 100644 ---- a/arch/arm/dts/uniphier-pro4-ace.dts -+++ b/arch/arm/dts/uniphier-pro4-ace.dts -@@ -99,3 +99,11 @@ - &usb1 { - status = "okay"; - }; -+ -+&ahci0 { -+ status = "okay"; -+}; -+ -+&ahci1 { -+ status = "okay"; -+}; -diff --git a/arch/arm/dts/uniphier-pro4-ref.dts b/arch/arm/dts/uniphier-pro4-ref.dts -index 3e1bc1275a..202ca84faa 100644 ---- a/arch/arm/dts/uniphier-pro4-ref.dts -+++ b/arch/arm/dts/uniphier-pro4-ref.dts -@@ -40,11 +40,11 @@ - }; - - ðsc { -- interrupts = <2 8>; -+ interrupts = <2 IRQ_TYPE_LEVEL_LOW>; - }; - - &serialsc { -- interrupts = <2 8>; -+ interrupts = <2 IRQ_TYPE_LEVEL_LOW>; - }; - - &serial0 { -@@ -60,7 +60,7 @@ - }; - - &gpio { -- xirq2 { -+ xirq2-hog { - gpio-hog; - gpios = ; - input; -@@ -104,4 +104,16 @@ - - &nand { - status = "okay"; -+ -+ nand@0 { -+ reg = <0>; -+ }; -+}; -+ -+&ahci0 { -+ status = "okay"; -+}; -+ -+&ahci1 { -+ status = "okay"; - }; -diff --git a/arch/arm/dts/uniphier-pro4-sanji.dts b/arch/arm/dts/uniphier-pro4-sanji.dts -index e7c122de29..7b6faf2e79 100644 ---- a/arch/arm/dts/uniphier-pro4-sanji.dts -+++ b/arch/arm/dts/uniphier-pro4-sanji.dts -@@ -64,15 +64,15 @@ - status = "okay"; - }; - --&emmc { -+&usb2 { - status = "okay"; - }; - --&usb2 { -+&usb3 { - status = "okay"; - }; - --&usb3 { -+&emmc { - status = "okay"; - }; - -diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi -index 9dae4e9b23..ba55af30e9 100644 ---- a/arch/arm/dts/uniphier-pro4.dtsi -+++ b/arch/arm/dts/uniphier-pro4.dtsi -@@ -6,6 +6,7 @@ - // Author: Masahiro Yamada - - #include -+#include - - / { - compatible = "socionext,uniphier-pro4"; -@@ -63,7 +64,8 @@ - compatible = "socionext,uniphier-system-cache"; - reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, - <0x506c0000 0x400>; -- interrupts = <0 174 4>, <0 175 4>; -+ interrupts = , -+ ; - cache-unified; - cache-size = <(768 * 1024)>; - cache-sets = <256>; -@@ -77,7 +79,7 @@ - reg = <0x54006000 0x100>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 39 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_spi0>; - clocks = <&peri_clk 11>; -@@ -88,7 +90,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006800 0x40>; -- interrupts = <0 33 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart0>; - clocks = <&peri_clk 0>; -@@ -99,7 +101,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006900 0x40>; -- interrupts = <0 35 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - clocks = <&peri_clk 1>; -@@ -110,7 +112,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006a00 0x40>; -- interrupts = <0 37 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - clocks = <&peri_clk 2>; -@@ -121,7 +123,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006b00 0x40>; -- interrupts = <0 177 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3>; - clocks = <&peri_clk 3>; -@@ -148,7 +150,7 @@ - reg = <0x58780000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 41 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c0>; - clocks = <&peri_clk 4>; -@@ -162,7 +164,7 @@ - reg = <0x58781000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 42 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - clocks = <&peri_clk 5>; -@@ -176,7 +178,7 @@ - reg = <0x58782000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 43 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2>; - clocks = <&peri_clk 6>; -@@ -190,7 +192,7 @@ - reg = <0x58783000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 44 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c3>; - clocks = <&peri_clk 7>; -@@ -206,7 +208,7 @@ - reg = <0x58785000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 25 4>; -+ interrupts = ; - clocks = <&peri_clk 9>; - resets = <&peri_rst 9>; - clock-frequency = <400000>; -@@ -218,7 +220,7 @@ - reg = <0x58786000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 26 4>; -+ interrupts = ; - clocks = <&peri_clk 10>; - resets = <&peri_rst 10>; - clock-frequency = <400000>; -@@ -239,33 +241,33 @@ - reg = <0x59801000 0x400>; - }; - -- mioctrl@59810000 { -+ mioctrl: syscon@59810000 { - compatible = "socionext,uniphier-pro4-mioctrl", - "simple-mfd", "syscon"; - reg = <0x59810000 0x800>; - -- mio_clk: clock { -+ mio_clk: clock-controller { - compatible = "socionext,uniphier-pro4-mio-clock"; - #clock-cells = <1>; - }; - -- mio_rst: reset { -+ mio_rst: reset-controller { - compatible = "socionext,uniphier-pro4-mio-reset"; - #reset-cells = <1>; - }; - }; - -- perictrl@59820000 { -+ syscon@59820000 { - compatible = "socionext,uniphier-pro4-perictrl", - "simple-mfd", "syscon"; - reg = <0x59820000 0x200>; - -- peri_clk: clock { -+ peri_clk: clock-controller { - compatible = "socionext,uniphier-pro4-peri-clock"; - #clock-cells = <1>; - }; - -- peri_rst: reset { -+ peri_rst: reset-controller { - compatible = "socionext,uniphier-pro4-peri-reset"; - #reset-cells = <1>; - }; -@@ -274,8 +276,14 @@ - dmac: dma-controller@5a000000 { - compatible = "socionext,uniphier-mio-dmac"; - reg = <0x5a000000 0x1000>; -- interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>, -- <0 71 4>, <0 72 4>, <0 73 4>, <0 74 4>; -+ interrupts = , -+ , -+ , -+ , -+ , -+ , -+ , -+ ; - clocks = <&mio_clk 7>; - resets = <&mio_rst 7>; - #dma-cells = <1>; -@@ -285,7 +293,7 @@ - compatible = "socionext,uniphier-sd-v2.91"; - status = "disabled"; - reg = <0x5a400000 0x200>; -- interrupts = <0 76 4>; -+ interrupts = ; - pinctrl-names = "default", "uhs"; - pinctrl-0 = <&pinctrl_sd>; - pinctrl-1 = <&pinctrl_sd_uhs>; -@@ -299,13 +307,14 @@ - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; -+ socionext,syscon-uhs-mode = <&mioctrl 0>; - }; - - emmc: mmc@5a500000 { - compatible = "socionext,uniphier-sd-v2.91"; - status = "disabled"; - reg = <0x5a500000 0x200>; -- interrupts = <0 78 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_emmc>; - clocks = <&mio_clk 1>; -@@ -323,7 +332,7 @@ - compatible = "socionext,uniphier-sd-v2.91"; - status = "disabled"; - reg = <0x5a600000 0x200>; -- interrupts = <0 85 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sd1>; - clocks = <&mio_clk 2>; -@@ -339,7 +348,7 @@ - compatible = "socionext,uniphier-ehci", "generic-ehci"; - status = "disabled"; - reg = <0x5a800100 0x100>; -- interrupts = <0 80 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb2>; - clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>, -@@ -355,7 +364,7 @@ - compatible = "socionext,uniphier-ehci", "generic-ehci"; - status = "disabled"; - reg = <0x5a810100 0x100>; -- interrupts = <0 81 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb3>; - clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>, -@@ -367,7 +376,7 @@ - has-transaction-translator; - }; - -- soc_glue: soc-glue@5f800000 { -+ soc_glue: syscon@5f800000 { - compatible = "socionext,uniphier-pro4-soc-glue", - "simple-mfd", "syscon"; - reg = <0x5f800000 0x2000>; -@@ -376,7 +385,7 @@ - compatible = "socionext,uniphier-pro4-pinctrl"; - }; - -- usb-phy { -+ usb-hub { - compatible = "socionext,uniphier-pro4-usb2-phy"; - #address-cells = <1>; - #size-cells = <0>; -@@ -403,11 +412,17 @@ - vbus-supply = <&usb1_vbus>; - }; - }; -+ -+ sg_clk: clock-controller { -+ compatible = "socionext,uniphier-pro4-sg-clock"; -+ #clock-cells = <1>; -+ }; - }; - -- soc-glue@5f900000 { -+ syscon@5f900000 { - compatible = "socionext,uniphier-pro4-soc-glue-debug", -- "simple-mfd"; -+ "simple-mfd", "syscon"; -+ reg = <0x5f900000 0x2000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x5f900000 0x2000>; -@@ -431,7 +446,7 @@ - xdmac: dma-controller@5fc10000 { - compatible = "socionext,uniphier-xdmac"; - reg = <0x5fc10000 0x5300>; -- interrupts = <0 188 4>; -+ interrupts = ; - dma-channels = <16>; - #dma-cells = <2>; - }; -@@ -446,14 +461,16 @@ - timer@60000200 { - compatible = "arm,cortex-a9-global-timer"; - reg = <0x60000200 0x20>; -- interrupts = <1 11 0x304>; -+ interrupts = ; - clocks = <&arm_timer_clk>; - }; - - timer@60000600 { - compatible = "arm,cortex-a9-twd-timer"; - reg = <0x60000600 0x20>; -- interrupts = <1 13 0x304>; -+ interrupts = ; - clocks = <&arm_timer_clk>; - }; - -@@ -465,17 +482,17 @@ - interrupt-controller; - }; - -- sysctrl@61840000 { -+ syscon@61840000 { - compatible = "socionext,uniphier-pro4-sysctrl", - "simple-mfd", "syscon"; - reg = <0x61840000 0x10000>; - -- sys_clk: clock { -+ sys_clk: clock-controller { - compatible = "socionext,uniphier-pro4-clock"; - #clock-cells = <1>; - }; - -- sys_rst: reset { -+ sys_rst: reset-controller { - compatible = "socionext,uniphier-pro4-reset"; - #reset-cells = <1>; - }; -@@ -485,7 +502,7 @@ - compatible = "socionext,uniphier-pro4-ave4"; - status = "disabled"; - reg = <0x65000000 0x8500>; -- interrupts = <0 66 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ether_rgmii>; - clock-names = "gio", "ether", "ether-gb", "ether-phy"; -@@ -503,12 +520,107 @@ - }; - }; - -- _usb0: usb@65a00000 { -+ ahci0: sata@65600000 { -+ compatible = "socionext,uniphier-pro4-ahci", -+ "generic-ahci"; -+ status = "disabled"; -+ reg = <0x65600000 0x10000>; -+ interrupts = ; -+ clocks = <&sys_clk 12>, <&sys_clk 28>; -+ resets = <&sys_rst 12>, <&sys_rst 28>, <&ahci0_rst 3>; -+ ports-implemented = <1>; -+ phys = <&ahci0_phy>; -+ assigned-clocks = <&sg_clk 0>; -+ assigned-clock-rates = <25000000>; -+ }; -+ -+ sata-controller@65700000 { -+ compatible = "socionext,uniphier-pxs2-ahci-glue", -+ "simple-mfd"; -+ reg = <0x65700000 0x100>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0 0x65700000 0x100>; -+ -+ ahci0_rst: reset-controller@0 { -+ compatible = "socionext,uniphier-pro4-ahci-reset"; -+ reg = <0x0 0x4>; -+ clock-names = "gio", "link"; -+ clocks = <&sys_clk 12>, <&sys_clk 28>; -+ reset-names = "gio", "link"; -+ resets = <&sys_rst 12>, <&sys_rst 28>; -+ #reset-cells = <1>; -+ }; -+ -+ ahci0_phy: phy@10 { -+ compatible = "socionext,uniphier-pro4-ahci-phy"; -+ reg = <0x10 0x40>; -+ clock-names = "link", "gio"; -+ clocks = <&sys_clk 28>, <&sys_clk 12>; -+ reset-names = "link", "gio", "phy", -+ "pm", "tx", "rx"; -+ resets = <&sys_rst 28>, <&sys_rst 12>, -+ <&sys_rst 30>, -+ <&ahci0_rst 0>, <&ahci0_rst 1>, -+ <&ahci0_rst 2>; -+ #phy-cells = <0>; -+ }; -+ }; -+ -+ ahci1: sata@65800000 { -+ compatible = "socionext,uniphier-pro4-ahci", -+ "generic-ahci"; -+ status = "disabled"; -+ reg = <0x65800000 0x10000>; -+ interrupts = ; -+ clocks = <&sys_clk 12>, <&sys_clk 29>; -+ resets = <&sys_rst 12>, <&sys_rst 29>, <&ahci1_rst 3>; -+ ports-implemented = <1>; -+ phys = <&ahci1_phy>; -+ assigned-clocks = <&sg_clk 0>; -+ assigned-clock-rates = <25000000>; -+ }; -+ -+ sata-controller@65900000 { -+ compatible = "socionext,uniphier-pro4-ahci-glue", -+ "simple-mfd"; -+ reg = <0x65900000 0x100>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0 0x65900000 0x100>; -+ -+ ahci1_rst: reset-controller@0 { -+ compatible = "socionext,uniphier-pro4-ahci-reset"; -+ reg = <0x0 0x4>; -+ clock-names = "gio", "link"; -+ clocks = <&sys_clk 12>, <&sys_clk 29>; -+ reset-names = "gio", "link"; -+ resets = <&sys_rst 12>, <&sys_rst 29>; -+ #reset-cells = <1>; -+ }; -+ -+ ahci1_phy: phy@10 { -+ compatible = "socionext,uniphier-pro4-ahci-phy"; -+ reg = <0x10 0x40>; -+ clock-names = "link", "gio"; -+ clocks = <&sys_clk 29>, <&sys_clk 12>; -+ reset-names = "link", "gio", "phy", -+ "pm", "tx", "rx"; -+ resets = <&sys_rst 29>, <&sys_rst 12>, -+ <&sys_rst 30>, -+ <&ahci1_rst 0>, <&ahci1_rst 1>, -+ <&ahci1_rst 2>; -+ #phy-cells = <0>; -+ }; -+ }; -+ -+ usb0: usb@65a00000 { - compatible = "socionext,uniphier-dwc3", "snps,dwc3"; - status = "disabled"; - reg = <0x65a00000 0xcd00>; - interrupt-names = "host", "peripheral"; -- interrupts = <0 134 4>, <0 135 4>; -+ interrupts = , -+ ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb0>; - clock-names = "ref", "bus_early", "suspend"; -@@ -518,9 +630,10 @@ - dr_mode = "host"; - }; - -- usb-glue@65b00000 { -+ usb-controller@65b00000 { - compatible = "socionext,uniphier-pro4-dwc3-glue", - "simple-mfd"; -+ reg = <0x65b00000 0x100>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x65b00000 0x100>; -@@ -534,7 +647,7 @@ - resets = <&sys_rst 12>, <&sys_rst 14>; - }; - -- usb0_ssphy: ss-phy@10 { -+ usb0_ssphy: phy@10 { - compatible = "socionext,uniphier-pro4-usb3-ssphy"; - reg = <0x10 0x10>; - #phy-cells = <0>; -@@ -545,7 +658,7 @@ - vbus-supply = <&usb0_vbus>; - }; - -- usb0_rst: reset@40 { -+ usb0_rst: reset-controller@40 { - compatible = "socionext,uniphier-pro4-usb3-reset"; - reg = <0x40 0x4>; - #reset-cells = <1>; -@@ -556,31 +669,13 @@ - }; - }; - -- /* FIXME: U-Boot own node */ -- usb0: usb@65b00000 { -- compatible = "socionext,uniphier-pro4-dwc3"; -- status = "disabled"; -- reg = <0x65b00000 0x1000>; -- #address-cells = <1>; -- #size-cells = <1>; -- ranges; -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_usb0>; -- dwc3@65a00000 { -- compatible = "snps,dwc3"; -- reg = <0x65a00000 0x10000>; -- interrupts = <0 134 4>; -- dr_mode = "host"; -- tx-fifo-resize; -- }; -- }; -- -- _usb1: usb@65c00000 { -+ usb1: usb@65c00000 { - compatible = "socionext,uniphier-dwc3", "snps,dwc3"; - status = "disabled"; - reg = <0x65c00000 0xcd00>; - interrupt-names = "host", "peripheral"; -- interrupts = <0 137 4>, <0 138 4>; -+ interrupts = , -+ ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb1>; - clock-names = "ref", "bus_early", "suspend"; -@@ -590,9 +685,10 @@ - dr_mode = "host"; - }; - -- usb-glue@65d00000 { -+ usb-controller@65d00000 { - compatible = "socionext,uniphier-pro4-dwc3-glue", - "simple-mfd"; -+ reg = <0x65d00000 0x100>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x65d00000 0x100>; -@@ -606,7 +702,7 @@ - resets = <&sys_rst 12>, <&sys_rst 15>; - }; - -- usb1_rst: reset@40 { -+ usb1_rst: reset-controller@40 { - compatible = "socionext,uniphier-pro4-usb3-reset"; - reg = <0x40 0x4>; - #reset-cells = <1>; -@@ -617,31 +713,14 @@ - }; - }; - -- /* FIXME: U-Boot own node */ -- usb1: usb@65d00000 { -- compatible = "socionext,uniphier-pro4-dwc3"; -- status = "disabled"; -- reg = <0x65d00000 0x1000>; -- #address-cells = <1>; -- #size-cells = <1>; -- ranges; -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_usb1>; -- dwc3@65c00000 { -- compatible = "snps,dwc3"; -- reg = <0x65c00000 0x10000>; -- interrupts = <0 137 4>; -- dr_mode = "host"; -- tx-fifo-resize; -- }; -- }; -- - nand: nand-controller@68000000 { - compatible = "socionext,uniphier-denali-nand-v5a"; - status = "disabled"; - reg-names = "nand_data", "denali_reg"; - reg = <0x68000000 0x20>, <0x68100000 0x1000>; -- interrupts = <0 65 4>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_nand>; - clock-names = "nand", "nand_x", "ecc"; -diff --git a/arch/arm/dts/uniphier-pro5.dtsi b/arch/arm/dts/uniphier-pro5.dtsi -index 19848e36fa..c039378942 100644 ---- a/arch/arm/dts/uniphier-pro5.dtsi -+++ b/arch/arm/dts/uniphier-pro5.dtsi -@@ -5,6 +5,8 @@ - // Copyright (C) 2015-2016 Socionext Inc. - // Author: Masahiro Yamada - -+#include -+ - / { - compatible = "socionext,uniphier-pro5"; - #address-cells = <1>; -@@ -135,7 +137,8 @@ - compatible = "socionext,uniphier-system-cache"; - reg = <0x500c0000 0x2000>, <0x503c0100 0x8>, - <0x506c0000 0x400>; -- interrupts = <0 190 4>, <0 191 4>; -+ interrupts = , -+ ; - cache-unified; - cache-size = <(2 * 1024 * 1024)>; - cache-sets = <512>; -@@ -148,7 +151,8 @@ - compatible = "socionext,uniphier-system-cache"; - reg = <0x500c8000 0x2000>, <0x503c8100 0x8>, - <0x506c8000 0x400>; -- interrupts = <0 174 4>, <0 175 4>; -+ interrupts = , -+ ; - cache-unified; - cache-size = <(2 * 1024 * 1024)>; - cache-sets = <512>; -@@ -162,7 +166,7 @@ - reg = <0x54006000 0x100>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 39 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_spi0>; - clocks = <&peri_clk 11>; -@@ -175,7 +179,7 @@ - reg = <0x54006100 0x100>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 216 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_spi1>; - clocks = <&peri_clk 11>; /* common with spi0 */ -@@ -186,7 +190,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006800 0x40>; -- interrupts = <0 33 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart0>; - clocks = <&peri_clk 0>; -@@ -197,7 +201,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006900 0x40>; -- interrupts = <0 35 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - clocks = <&peri_clk 1>; -@@ -208,7 +212,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006a00 0x40>; -- interrupts = <0 37 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - clocks = <&peri_clk 2>; -@@ -219,7 +223,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006b00 0x40>; -- interrupts = <0 177 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3>; - clocks = <&peri_clk 3>; -@@ -246,7 +250,7 @@ - reg = <0x58780000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 41 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c0>; - clocks = <&peri_clk 4>; -@@ -260,7 +264,7 @@ - reg = <0x58781000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 42 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - clocks = <&peri_clk 5>; -@@ -274,7 +278,7 @@ - reg = <0x58782000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 43 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2>; - clocks = <&peri_clk 6>; -@@ -288,7 +292,7 @@ - reg = <0x58783000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 44 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c3>; - clocks = <&peri_clk 7>; -@@ -304,7 +308,7 @@ - reg = <0x58785000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 25 4>; -+ interrupts = ; - clocks = <&peri_clk 9>; - resets = <&peri_rst 9>; - clock-frequency = <400000>; -@@ -316,7 +320,7 @@ - reg = <0x58786000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 26 4>; -+ interrupts = ; - clocks = <&peri_clk 10>; - resets = <&peri_rst 10>; - clock-frequency = <400000>; -@@ -337,39 +341,39 @@ - reg = <0x59801000 0x400>; - }; - -- sdctrl@59810000 { -+ sdctrl: syscon@59810000 { - compatible = "socionext,uniphier-pro5-sdctrl", - "simple-mfd", "syscon"; - reg = <0x59810000 0x400>; - -- sd_clk: clock { -+ sd_clk: clock-controller { - compatible = "socionext,uniphier-pro5-sd-clock"; - #clock-cells = <1>; - }; - -- sd_rst: reset { -+ sd_rst: reset-controller { - compatible = "socionext,uniphier-pro5-sd-reset"; - #reset-cells = <1>; - }; - }; - -- perictrl@59820000 { -+ syscon@59820000 { - compatible = "socionext,uniphier-pro5-perictrl", - "simple-mfd", "syscon"; - reg = <0x59820000 0x200>; - -- peri_clk: clock { -+ peri_clk: clock-controller { - compatible = "socionext,uniphier-pro5-peri-clock"; - #clock-cells = <1>; - }; - -- peri_rst: reset { -+ peri_rst: reset-controller { - compatible = "socionext,uniphier-pro5-peri-reset"; - #reset-cells = <1>; - }; - }; - -- soc-glue@5f800000 { -+ syscon@5f800000 { - compatible = "socionext,uniphier-pro5-soc-glue", - "simple-mfd", "syscon"; - reg = <0x5f800000 0x2000>; -@@ -379,9 +383,10 @@ - }; - }; - -- soc-glue@5f900000 { -+ syscon@5f900000 { - compatible = "socionext,uniphier-pro5-soc-glue-debug", -- "simple-mfd"; -+ "simple-mfd", "syscon"; -+ reg = <0x5f900000 0x2000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x5f900000 0x2000>; -@@ -415,7 +420,7 @@ - xdmac: dma-controller@5fc10000 { - compatible = "socionext,uniphier-xdmac"; - reg = <0x5fc10000 0x5300>; -- interrupts = <0 188 4>; -+ interrupts = ; - dma-channels = <16>; - #dma-cells = <2>; - }; -@@ -430,14 +435,16 @@ - timer@60000200 { - compatible = "arm,cortex-a9-global-timer"; - reg = <0x60000200 0x20>; -- interrupts = <1 11 0x304>; -+ interrupts = ; - clocks = <&arm_timer_clk>; - }; - - timer@60000600 { - compatible = "arm,cortex-a9-twd-timer"; - reg = <0x60000600 0x20>; -- interrupts = <1 13 0x304>; -+ interrupts = ; - clocks = <&arm_timer_clk>; - }; - -@@ -449,17 +456,17 @@ - interrupt-controller; - }; - -- sysctrl@61840000 { -+ syscon@61840000 { - compatible = "socionext,uniphier-pro5-sysctrl", - "simple-mfd", "syscon"; - reg = <0x61840000 0x10000>; - -- sys_clk: clock { -+ sys_clk: clock-controller { - compatible = "socionext,uniphier-pro5-clock"; - #clock-cells = <1>; - }; - -- sys_rst: reset { -+ sys_rst: reset-controller { - compatible = "socionext,uniphier-pro5-reset"; - #reset-cells = <1>; - }; -@@ -470,7 +477,7 @@ - status = "disabled"; - reg = <0x65a00000 0xcd00>; - interrupt-names = "host"; -- interrupts = <0 134 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb0>; - clock-names = "ref", "bus_early", "suspend"; -@@ -480,14 +487,15 @@ - dr_mode = "host"; - }; - -- usb-glue@65b00000 { -+ usb-controller@65b00000 { - compatible = "socionext,uniphier-pro5-dwc3-glue", - "simple-mfd"; -+ reg = <0x65b00000 0x400>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x65b00000 0x400>; - -- usb0_rst: reset@0 { -+ usb0_rst: reset-controller@0 { - compatible = "socionext,uniphier-pro5-usb3-reset"; - reg = <0x0 0x4>; - #reset-cells = <1>; -@@ -506,7 +514,7 @@ - resets = <&sys_rst 12>, <&sys_rst 14>; - }; - -- usb0_hsphy0: hs-phy@280 { -+ usb0_hsphy0: phy@280 { - compatible = "socionext,uniphier-pro5-usb3-hsphy"; - reg = <0x280 0x10>; - #phy-cells = <0>; -@@ -517,7 +525,7 @@ - vbus-supply = <&usb0_vbus0>; - }; - -- usb0_ssphy0: ss-phy@380 { -+ usb0_ssphy0: phy@380 { - compatible = "socionext,uniphier-pro5-usb3-ssphy"; - reg = <0x380 0x10>; - #phy-cells = <0>; -@@ -534,7 +542,7 @@ - status = "disabled"; - reg = <0x65c00000 0xcd00>; - interrupt-names = "host"; -- interrupts = <0 137 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb2>; - clock-names = "ref", "bus_early", "suspend"; -@@ -544,14 +552,15 @@ - dr_mode = "host"; - }; - -- usb-glue@65d00000 { -+ usb-controller@65d00000 { - compatible = "socionext,uniphier-pro5-dwc3-glue", - "simple-mfd"; -+ reg = <0x65d00000 0x400>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x65d00000 0x400>; - -- usb1_rst: reset@0 { -+ usb1_rst: reset-controller@0 { - compatible = "socionext,uniphier-pro5-usb3-reset"; - reg = <0x0 0x4>; - #reset-cells = <1>; -@@ -579,7 +588,7 @@ - resets = <&sys_rst 12>, <&sys_rst 15>; - }; - -- usb1_hsphy0: hs-phy@280 { -+ usb1_hsphy0: phy@280 { - compatible = "socionext,uniphier-pro5-usb3-hsphy"; - reg = <0x280 0x10>; - #phy-cells = <0>; -@@ -590,7 +599,7 @@ - vbus-supply = <&usb1_vbus0>; - }; - -- usb1_hsphy1: hs-phy@290 { -+ usb1_hsphy1: phy@290 { - compatible = "socionext,uniphier-pro5-usb3-hsphy"; - reg = <0x290 0x10>; - #phy-cells = <0>; -@@ -601,7 +610,7 @@ - vbus-supply = <&usb1_vbus1>; - }; - -- usb1_ssphy0: ss-phy@380 { -+ usb1_ssphy0: phy@380 { - compatible = "socionext,uniphier-pro5-usb3-ssphy"; - reg = <0x380 0x10>; - #phy-cells = <0>; -@@ -614,8 +623,7 @@ - }; - - pcie_ep: pcie-ep@66000000 { -- compatible = "socionext,uniphier-pro5-pcie-ep", -- "snps,dw-pcie-ep"; -+ compatible = "socionext,uniphier-pro5-pcie-ep"; - status = "disabled"; - reg-names = "dbi", "dbi2", "link", "addr_space"; - reg = <0x66000000 0x1000>, <0x66001000 0x1000>, -@@ -648,7 +656,9 @@ - status = "disabled"; - reg-names = "nand_data", "denali_reg"; - reg = <0x68000000 0x20>, <0x68100000 0x1000>; -- interrupts = <0 65 4>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_nand2cs>; - clock-names = "nand", "nand_x", "ecc"; -@@ -661,7 +671,7 @@ - compatible = "socionext,uniphier-sd-v3.1"; - status = "disabled"; - reg = <0x68400000 0x800>; -- interrupts = <0 78 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_emmc>; - clocks = <&sd_clk 1>; -@@ -677,7 +687,7 @@ - compatible = "socionext,uniphier-sd-v3.1"; - status = "disabled"; - reg = <0x68800000 0x800>; -- interrupts = <0 76 4>; -+ interrupts = ; - pinctrl-names = "default", "uhs"; - pinctrl-0 = <&pinctrl_sd>; - pinctrl-1 = <&pinctrl_sd_uhs>; -@@ -689,6 +699,7 @@ - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; -+ socionext,syscon-uhs-mode = <&sdctrl 0>; - }; - }; - }; -diff --git a/arch/arm/dts/uniphier-pxs2-gentil.dts b/arch/arm/dts/uniphier-pxs2-gentil.dts -index 759384b606..5f18b926c5 100644 ---- a/arch/arm/dts/uniphier-pxs2-gentil.dts -+++ b/arch/arm/dts/uniphier-pxs2-gentil.dts -@@ -99,3 +99,7 @@ - &usb1 { - status = "okay"; - }; -+ -+&ahci { -+ status = "okay"; -+}; -diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi -index 7a8b6c10f4..e3a4b6ad1f 100644 ---- a/arch/arm/dts/uniphier-pxs2.dtsi -+++ b/arch/arm/dts/uniphier-pxs2.dtsi -@@ -6,6 +6,7 @@ - // Author: Masahiro Yamada - - #include -+#include - #include - - / { -@@ -161,7 +162,10 @@ - compatible = "socionext,uniphier-system-cache"; - reg = <0x500c0000 0x2000>, <0x503c0100 0x8>, - <0x506c0000 0x400>; -- interrupts = <0 174 4>, <0 175 4>, <0 190 4>, <0 191 4>; -+ interrupts = , -+ , -+ , -+ ; - cache-unified; - cache-size = <(1280 * 1024)>; - cache-sets = <512>; -@@ -175,7 +179,7 @@ - reg = <0x54006000 0x100>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 39 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_spi0>; - clocks = <&peri_clk 11>; -@@ -188,7 +192,7 @@ - reg = <0x54006100 0x100>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 216 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_spi1>; - clocks = <&peri_clk 12>; -@@ -199,7 +203,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006800 0x40>; -- interrupts = <0 33 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart0>; - clocks = <&peri_clk 0>; -@@ -210,7 +214,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006900 0x40>; -- interrupts = <0 35 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - clocks = <&peri_clk 1>; -@@ -221,7 +225,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006a00 0x40>; -- interrupts = <0 37 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - clocks = <&peri_clk 2>; -@@ -232,7 +236,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006b00 0x40>; -- interrupts = <0 177 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3>; - clocks = <&peri_clk 3>; -@@ -259,7 +263,7 @@ - audio@56000000 { - compatible = "socionext,uniphier-pxs2-aio"; - reg = <0x56000000 0x80000>; -- interrupts = <0 144 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ain1>, - <&pinctrl_ain2>, -@@ -317,7 +321,7 @@ - reg = <0x58780000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 41 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c0>; - clocks = <&peri_clk 4>; -@@ -331,7 +335,7 @@ - reg = <0x58781000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 42 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - clocks = <&peri_clk 5>; -@@ -345,7 +349,7 @@ - reg = <0x58782000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 43 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2>; - clocks = <&peri_clk 6>; -@@ -359,7 +363,7 @@ - reg = <0x58783000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 44 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c3>; - clocks = <&peri_clk 7>; -@@ -373,7 +377,7 @@ - reg = <0x58784000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 45 4>; -+ interrupts = ; - clocks = <&peri_clk 8>; - resets = <&peri_rst 8>; - clock-frequency = <400000>; -@@ -385,7 +389,7 @@ - reg = <0x58785000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 25 4>; -+ interrupts = ; - clocks = <&peri_clk 9>; - resets = <&peri_rst 9>; - clock-frequency = <400000>; -@@ -397,7 +401,7 @@ - reg = <0x58786000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 26 4>; -+ interrupts = ; - clocks = <&peri_clk 10>; - resets = <&peri_rst 10>; - clock-frequency = <400000>; -@@ -418,33 +422,33 @@ - reg = <0x59801000 0x400>; - }; - -- sdctrl@59810000 { -+ sdctrl: syscon@59810000 { - compatible = "socionext,uniphier-pxs2-sdctrl", - "simple-mfd", "syscon"; - reg = <0x59810000 0x400>; - -- sd_clk: clock { -+ sd_clk: clock-controller { - compatible = "socionext,uniphier-pxs2-sd-clock"; - #clock-cells = <1>; - }; - -- sd_rst: reset { -+ sd_rst: reset-controller { - compatible = "socionext,uniphier-pxs2-sd-reset"; - #reset-cells = <1>; - }; - }; - -- perictrl@59820000 { -+ syscon@59820000 { - compatible = "socionext,uniphier-pxs2-perictrl", - "simple-mfd", "syscon"; - reg = <0x59820000 0x200>; - -- peri_clk: clock { -+ peri_clk: clock-controller { - compatible = "socionext,uniphier-pxs2-peri-clock"; - #clock-cells = <1>; - }; - -- peri_rst: reset { -+ peri_rst: reset-controller { - compatible = "socionext,uniphier-pxs2-peri-reset"; - #reset-cells = <1>; - }; -@@ -454,7 +458,7 @@ - compatible = "socionext,uniphier-sd-v3.1.1"; - status = "disabled"; - reg = <0x5a000000 0x800>; -- interrupts = <0 78 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_emmc>; - clocks = <&sd_clk 1>; -@@ -470,7 +474,7 @@ - compatible = "socionext,uniphier-sd-v3.1.1"; - status = "disabled"; - reg = <0x5a400000 0x800>; -- interrupts = <0 76 4>; -+ interrupts = ; - pinctrl-names = "default", "uhs"; - pinctrl-0 = <&pinctrl_sd>; - pinctrl-1 = <&pinctrl_sd_uhs>; -@@ -482,9 +486,10 @@ - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; -+ socionext,syscon-uhs-mode = <&sdctrl 0>; - }; - -- soc_glue: soc-glue@5f800000 { -+ soc_glue: syscon@5f800000 { - compatible = "socionext,uniphier-pxs2-soc-glue", - "simple-mfd", "syscon"; - reg = <0x5f800000 0x2000>; -@@ -494,9 +499,10 @@ - }; - }; - -- soc-glue@5f900000 { -+ syscon@5f900000 { - compatible = "socionext,uniphier-pxs2-soc-glue-debug", -- "simple-mfd"; -+ "simple-mfd", "syscon"; -+ reg = <0x5f900000 0x2000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x5f900000 0x2000>; -@@ -515,7 +521,7 @@ - xdmac: dma-controller@5fc10000 { - compatible = "socionext,uniphier-xdmac"; - reg = <0x5fc10000 0x5300>; -- interrupts = <0 188 4>; -+ interrupts = ; - dma-channels = <16>; - #dma-cells = <2>; - }; -@@ -530,14 +536,16 @@ - timer@60000200 { - compatible = "arm,cortex-a9-global-timer"; - reg = <0x60000200 0x20>; -- interrupts = <1 11 0xf04>; -+ interrupts = ; - clocks = <&arm_timer_clk>; - }; - - timer@60000600 { - compatible = "arm,cortex-a9-twd-timer"; - reg = <0x60000600 0x20>; -- interrupts = <1 13 0xf04>; -+ interrupts = ; - clocks = <&arm_timer_clk>; - }; - -@@ -549,24 +557,24 @@ - interrupt-controller; - }; - -- sysctrl@61840000 { -+ syscon@61840000 { - compatible = "socionext,uniphier-pxs2-sysctrl", - "simple-mfd", "syscon"; - reg = <0x61840000 0x10000>; - -- sys_clk: clock { -+ sys_clk: clock-controller { - compatible = "socionext,uniphier-pxs2-clock"; - #clock-cells = <1>; - }; - -- sys_rst: reset { -+ sys_rst: reset-controller { - compatible = "socionext,uniphier-pxs2-reset"; - #reset-cells = <1>; - }; - -- pvtctl: pvtctl { -+ pvtctl: thermal-sensor { - compatible = "socionext,uniphier-pxs2-thermal"; -- interrupts = <0 3 4>; -+ interrupts = ; - #thermal-sensor-cells = <0>; - socionext,tmod-calibration = <0x0f86 0x6844>; - }; -@@ -576,7 +584,7 @@ - compatible = "socionext,uniphier-pxs2-ave4"; - status = "disabled"; - reg = <0x65000000 0x8500>; -- interrupts = <0 66 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ether_rgmii>; - clock-names = "ether"; -@@ -593,12 +601,53 @@ - }; - }; - -- _usb0: usb@65a00000 { -+ ahci: sata@65600000 { -+ compatible = "socionext,uniphier-pxs2-ahci", -+ "generic-ahci"; -+ status = "disabled"; -+ reg = <0x65600000 0x10000>; -+ interrupts = ; -+ clocks = <&sys_clk 28>; -+ resets = <&sys_rst 28>, <&ahci_rst 0>; -+ ports-implemented = <1>; -+ phys = <&ahci_phy>; -+ }; -+ -+ sata-controller@65700000 { -+ compatible = "socionext,uniphier-pxs2-ahci-glue", -+ "simple-mfd"; -+ reg = <0x65700000 0x100>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0 0x65700000 0x100>; -+ -+ ahci_rst: reset-controller@0 { -+ compatible = "socionext,uniphier-pxs2-ahci-reset"; -+ reg = <0x0 0x4>; -+ clock-names = "link"; -+ clocks = <&sys_clk 28>; -+ reset-names = "link"; -+ resets = <&sys_rst 28>; -+ #reset-cells = <1>; -+ }; -+ -+ ahci_phy: phy@10 { -+ compatible = "socionext,uniphier-pxs2-ahci-phy"; -+ reg = <0x10 0x10>; -+ clock-names = "link"; -+ clocks = <&sys_clk 28>; -+ reset-names = "link", "phy"; -+ resets = <&sys_rst 28>, <&sys_rst 30>; -+ #phy-cells = <0>; -+ }; -+ }; -+ -+ usb0: usb@65a00000 { - compatible = "socionext,uniphier-dwc3", "snps,dwc3"; - status = "disabled"; - reg = <0x65a00000 0xcd00>; -- interrupt-names = "host", "peripheral"; -- interrupts = <0 134 4>, <0 135 4>; -+ interrupt-names = "dwc_usb3"; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>; - clock-names = "ref", "bus_early", "suspend"; -@@ -609,14 +658,15 @@ - dr_mode = "host"; - }; - -- usb-glue@65b00000 { -+ usb-controller@65b00000 { - compatible = "socionext,uniphier-pxs2-dwc3-glue", - "simple-mfd"; -+ reg = <0x65b00000 0x400>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x65b00000 0x400>; - -- usb0_rst: reset@0 { -+ usb0_rst: reset-controller@0 { - compatible = "socionext,uniphier-pxs2-usb3-reset"; - reg = <0x0 0x4>; - #reset-cells = <1>; -@@ -644,7 +694,7 @@ - resets = <&sys_rst 14>; - }; - -- usb0_hsphy0: hs-phy@200 { -+ usb0_hsphy0: phy@200 { - compatible = "socionext,uniphier-pxs2-usb3-hsphy"; - reg = <0x200 0x10>; - #phy-cells = <0>; -@@ -655,7 +705,7 @@ - vbus-supply = <&usb0_vbus0>; - }; - -- usb0_hsphy1: hs-phy@210 { -+ usb0_hsphy1: phy@210 { - compatible = "socionext,uniphier-pxs2-usb3-hsphy"; - reg = <0x210 0x10>; - #phy-cells = <0>; -@@ -666,7 +716,7 @@ - vbus-supply = <&usb0_vbus1>; - }; - -- usb0_ssphy0: ss-phy@300 { -+ usb0_ssphy0: phy@300 { - compatible = "socionext,uniphier-pxs2-usb3-ssphy"; - reg = <0x300 0x10>; - #phy-cells = <0>; -@@ -677,7 +727,7 @@ - vbus-supply = <&usb0_vbus0>; - }; - -- usb0_ssphy1: ss-phy@310 { -+ usb0_ssphy1: phy@310 { - compatible = "socionext,uniphier-pxs2-usb3-ssphy"; - reg = <0x310 0x10>; - #phy-cells = <0>; -@@ -689,31 +739,12 @@ - }; - }; - -- /* FIXME: U-Boot own node */ -- usb0: usb@65b00000 { -- compatible = "socionext,uniphier-pxs2-dwc3"; -- status = "disabled"; -- reg = <0x65b00000 0x1000>; -- #address-cells = <1>; -- #size-cells = <1>; -- ranges; -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>; -- dwc3@65a00000 { -- compatible = "snps,dwc3"; -- reg = <0x65a00000 0x10000>; -- interrupts = <0 134 4>; -- dr_mode = "host"; -- tx-fifo-resize; -- }; -- }; -- -- _usb1: usb@65c00000 { -+ usb1: usb@65c00000 { - compatible = "socionext,uniphier-dwc3", "snps,dwc3"; - status = "disabled"; - reg = <0x65c00000 0xcd00>; -- interrupt-names = "host", "peripheral"; -- interrupts = <0 137 4>, <0 138 4>; -+ interrupt-names = "dwc_usb3"; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>; - clock-names = "ref", "bus_early", "suspend"; -@@ -723,14 +754,15 @@ - dr_mode = "host"; - }; - -- usb-glue@65d00000 { -+ usb-controller@65d00000 { - compatible = "socionext,uniphier-pxs2-dwc3-glue", - "simple-mfd"; -+ reg = <0x65d00000 0x400>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x65d00000 0x400>; - -- usb1_rst: reset@0 { -+ usb1_rst: reset-controller@0 { - compatible = "socionext,uniphier-pxs2-usb3-reset"; - reg = <0x0 0x4>; - #reset-cells = <1>; -@@ -758,7 +790,7 @@ - resets = <&sys_rst 15>; - }; - -- usb1_hsphy0: hs-phy@200 { -+ usb1_hsphy0: phy@200 { - compatible = "socionext,uniphier-pxs2-usb3-hsphy"; - reg = <0x200 0x10>; - #phy-cells = <0>; -@@ -769,7 +801,7 @@ - vbus-supply = <&usb1_vbus0>; - }; - -- usb1_hsphy1: hs-phy@210 { -+ usb1_hsphy1: phy@210 { - compatible = "socionext,uniphier-pxs2-usb3-hsphy"; - reg = <0x210 0x10>; - #phy-cells = <0>; -@@ -780,7 +812,7 @@ - vbus-supply = <&usb1_vbus1>; - }; - -- usb1_ssphy0: ss-phy@300 { -+ usb1_ssphy0: phy@300 { - compatible = "socionext,uniphier-pxs2-usb3-ssphy"; - reg = <0x300 0x10>; - #phy-cells = <0>; -@@ -792,31 +824,14 @@ - }; - }; - -- /* FIXME: U-Boot own node */ -- usb1: usb@65d00000 { -- compatible = "socionext,uniphier-pxs2-dwc3"; -- status = "disabled"; -- reg = <0x65d00000 0x1000>; -- #address-cells = <1>; -- #size-cells = <1>; -- ranges; -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>; -- dwc3@65c00000 { -- compatible = "snps,dwc3"; -- reg = <0x65c00000 0x10000>; -- interrupts = <0 137 4>; -- dr_mode = "host"; -- tx-fifo-resize; -- }; -- }; -- - nand: nand-controller@68000000 { - compatible = "socionext,uniphier-denali-nand-v5b"; - status = "disabled"; - reg-names = "nand_data", "denali_reg"; - reg = <0x68000000 0x20>, <0x68100000 0x1000>; -- interrupts = <0 65 4>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_nand2cs>; - clock-names = "nand", "nand_x", "ecc"; -diff --git a/arch/arm/dts/uniphier-pxs3-ref.dts b/arch/arm/dts/uniphier-pxs3-ref.dts -index 1a80cd91d2..1ced6190ab 100644 ---- a/arch/arm/dts/uniphier-pxs3-ref.dts -+++ b/arch/arm/dts/uniphier-pxs3-ref.dts -@@ -40,11 +40,11 @@ - }; - - ðsc { -- interrupts = <4 8>; -+ interrupts = <4 IRQ_TYPE_LEVEL_LOW>; - }; - - &serialsc { -- interrupts = <4 8>; -+ interrupts = <4 IRQ_TYPE_LEVEL_LOW>; - }; - - &spi0 { -@@ -68,7 +68,7 @@ - }; - - &gpio { -- xirq4 { -+ xirq4-hog { - gpio-hog; - gpios = ; - input; -@@ -131,6 +131,18 @@ - - &nand { - status = "okay"; -+ -+ nand@0 { -+ reg = <0>; -+ }; -+}; -+ -+&ahci0 { -+ status = "okay"; -+}; -+ -+&ahci1 { -+ status = "okay"; - }; - - &pinctrl_ether_rgmii { -diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi -index 004656c992..91d6dde030 100644 ---- a/arch/arm/dts/uniphier-pxs3.dtsi -+++ b/arch/arm/dts/uniphier-pxs3.dtsi -@@ -7,6 +7,7 @@ - - #include - #include -+#include - #include - - / { -@@ -42,6 +43,7 @@ - reg = <0 0x000>; - clocks = <&sys_clk 33>; - enable-method = "psci"; -+ next-level-cache = <&l2>; - operating-points-v2 = <&cluster0_opp>; - #cooling-cells = <2>; - }; -@@ -52,6 +54,7 @@ - reg = <0 0x001>; - clocks = <&sys_clk 33>; - enable-method = "psci"; -+ next-level-cache = <&l2>; - operating-points-v2 = <&cluster0_opp>; - #cooling-cells = <2>; - }; -@@ -62,6 +65,7 @@ - reg = <0 0x002>; - clocks = <&sys_clk 33>; - enable-method = "psci"; -+ next-level-cache = <&l2>; - operating-points-v2 = <&cluster0_opp>; - #cooling-cells = <2>; - }; -@@ -72,9 +76,14 @@ - reg = <0 0x003>; - clocks = <&sys_clk 33>; - enable-method = "psci"; -+ next-level-cache = <&l2>; - operating-points-v2 = <&cluster0_opp>; - #cooling-cells = <2>; - }; -+ -+ l2: l2-cache { -+ compatible = "cache"; -+ }; - }; - - cluster0_opp: opp-table { -@@ -135,10 +144,10 @@ - - timer { - compatible = "arm,armv8-timer"; -- interrupts = <1 13 4>, -- <1 14 4>, -- <1 11 4>, -- <1 10 4>; -+ interrupts = , -+ , -+ , -+ ; - }; - - thermal-zones { -@@ -195,7 +204,7 @@ - reg = <0x54006000 0x100>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 39 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_spi0>; - clocks = <&peri_clk 11>; -@@ -208,7 +217,7 @@ - reg = <0x54006100 0x100>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 216 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_spi1>; - clocks = <&peri_clk 12>; -@@ -219,7 +228,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006800 0x40>; -- interrupts = <0 33 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart0>; - clocks = <&peri_clk 0>; -@@ -230,7 +239,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006900 0x40>; -- interrupts = <0 35 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - clocks = <&peri_clk 1>; -@@ -241,7 +250,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006a00 0x40>; -- interrupts = <0 37 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - clocks = <&peri_clk 2>; -@@ -252,7 +261,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006b00 0x40>; -- interrupts = <0 177 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3>; - clocks = <&peri_clk 3>; -@@ -284,7 +293,7 @@ - reg = <0x58780000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 41 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c0>; - clocks = <&peri_clk 4>; -@@ -298,7 +307,7 @@ - reg = <0x58781000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 42 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - clocks = <&peri_clk 5>; -@@ -312,7 +321,7 @@ - reg = <0x58782000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 43 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2>; - clocks = <&peri_clk 6>; -@@ -326,7 +335,7 @@ - reg = <0x58783000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 44 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c3>; - clocks = <&peri_clk 7>; -@@ -340,7 +349,7 @@ - reg = <0x58786000 0x80>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 26 4>; -+ interrupts = ; - clocks = <&peri_clk 10>; - resets = <&peri_rst 10>; - clock-frequency = <400000>; -@@ -361,33 +370,33 @@ - reg = <0x59801000 0x400>; - }; - -- sdctrl@59810000 { -+ sdctrl: syscon@59810000 { - compatible = "socionext,uniphier-pxs3-sdctrl", - "simple-mfd", "syscon"; - reg = <0x59810000 0x400>; - -- sd_clk: clock { -+ sd_clk: clock-controller { - compatible = "socionext,uniphier-pxs3-sd-clock"; - #clock-cells = <1>; - }; - -- sd_rst: reset { -+ sd_rst: reset-controller { - compatible = "socionext,uniphier-pxs3-sd-reset"; - #reset-cells = <1>; - }; - }; - -- perictrl@59820000 { -+ syscon@59820000 { - compatible = "socionext,uniphier-pxs3-perictrl", - "simple-mfd", "syscon"; - reg = <0x59820000 0x200>; - -- peri_clk: clock { -+ peri_clk: clock-controller { - compatible = "socionext,uniphier-pxs3-peri-clock"; - #clock-cells = <1>; - }; - -- peri_rst: reset { -+ peri_rst: reset-controller { - compatible = "socionext,uniphier-pxs3-peri-reset"; - #reset-cells = <1>; - }; -@@ -396,7 +405,7 @@ - emmc: mmc@5a000000 { - compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; - reg = <0x5a000000 0x400>; -- interrupts = <0 78 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_emmc>; - clocks = <&sys_clk 4>; -@@ -416,7 +425,7 @@ - compatible = "socionext,uniphier-sd-v3.1.1"; - status = "disabled"; - reg = <0x5a400000 0x800>; -- interrupts = <0 76 4>; -+ interrupts = ; - pinctrl-names = "default", "uhs"; - pinctrl-0 = <&pinctrl_sd>; - pinctrl-1 = <&pinctrl_sd_uhs>; -@@ -428,9 +437,10 @@ - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; -+ socionext,syscon-uhs-mode = <&sdctrl 0>; - }; - -- soc_glue: soc-glue@5f800000 { -+ soc_glue: syscon@5f800000 { - compatible = "socionext,uniphier-pxs3-soc-glue", - "simple-mfd", "syscon"; - reg = <0x5f800000 0x2000>; -@@ -440,9 +450,10 @@ - }; - }; - -- soc-glue@5f900000 { -+ syscon@5f900000 { - compatible = "socionext,uniphier-pxs3-soc-glue-debug", -- "simple-mfd"; -+ "simple-mfd", "syscon"; -+ reg = <0x5f900000 0x2000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x5f900000 0x2000>; -@@ -505,7 +516,7 @@ - xdmac: dma-controller@5fc10000 { - compatible = "socionext,uniphier-xdmac"; - reg = <0x5fc10000 0x5300>; -- interrupts = <0 188 4>; -+ interrupts = ; - dma-channels = <16>; - #dma-cells = <2>; - }; -@@ -523,20 +534,20 @@ - <0x5fe80000 0x80000>; /* GICR */ - interrupt-controller; - #interrupt-cells = <3>; -- interrupts = <1 9 4>; -+ interrupts = ; - }; - -- sysctrl@61840000 { -+ syscon@61840000 { - compatible = "socionext,uniphier-pxs3-sysctrl", - "simple-mfd", "syscon"; - reg = <0x61840000 0x10000>; - -- sys_clk: clock { -+ sys_clk: clock-controller { - compatible = "socionext,uniphier-pxs3-clock"; - #clock-cells = <1>; - }; - -- sys_rst: reset { -+ sys_rst: reset-controller { - compatible = "socionext,uniphier-pxs3-reset"; - #reset-cells = <1>; - }; -@@ -545,9 +556,9 @@ - compatible = "socionext,uniphier-wdt"; - }; - -- pvtctl: pvtctl { -+ pvtctl: thermal-sensor { - compatible = "socionext,uniphier-pxs3-thermal"; -- interrupts = <0 3 4>; -+ interrupts = ; - #thermal-sensor-cells = <0>; - socionext,tmod-calibration = <0x0f22 0x68ee>; - }; -@@ -557,7 +568,7 @@ - compatible = "socionext,uniphier-pxs3-ave4"; - status = "disabled"; - reg = <0x65000000 0x8500>; -- interrupts = <0 66 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ether_rgmii>; - clock-names = "ether"; -@@ -578,7 +589,7 @@ - compatible = "socionext,uniphier-pxs3-ave4"; - status = "disabled"; - reg = <0x65200000 0x8500>; -- interrupts = <0 67 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ether1_rgmii>; - clock-names = "ether"; -@@ -595,12 +606,94 @@ - }; - }; - -- _usb0: usb@65a00000 { -+ ahci0: sata@65600000 { -+ compatible = "socionext,uniphier-pxs3-ahci", -+ "generic-ahci"; -+ status = "disabled"; -+ reg = <0x65600000 0x10000>; -+ interrupts = ; -+ clocks = <&sys_clk 28>; -+ resets = <&sys_rst 28>, <&ahci0_rst 0>; -+ ports-implemented = <1>; -+ phys = <&ahci0_phy>; -+ }; -+ -+ sata-controller@65700000 { -+ compatible = "socionext,uniphier-pxs3-ahci-glue", -+ "simple-mfd"; -+ reg = <0x65700000 0x100>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0 0x65700000 0x100>; -+ -+ ahci0_rst: reset-controller@0 { -+ compatible = "socionext,uniphier-pxs3-ahci-reset"; -+ reg = <0x0 0x4>; -+ clock-names = "link"; -+ clocks = <&sys_clk 28>; -+ reset-names = "link"; -+ resets = <&sys_rst 28>; -+ #reset-cells = <1>; -+ }; -+ -+ ahci0_phy: phy@10 { -+ compatible = "socionext,uniphier-pxs3-ahci-phy"; -+ reg = <0x10 0x10>; -+ clock-names = "link", "phy"; -+ clocks = <&sys_clk 28>, <&sys_clk 30>; -+ reset-names = "link", "phy"; -+ resets = <&sys_rst 28>, <&sys_rst 30>; -+ #phy-cells = <0>; -+ }; -+ }; -+ -+ ahci1: sata@65800000 { -+ compatible = "socionext,uniphier-pxs3-ahci", -+ "generic-ahci"; -+ status = "disabled"; -+ reg = <0x65800000 0x10000>; -+ interrupts = ; -+ clocks = <&sys_clk 29>; -+ resets = <&sys_rst 29>, <&ahci1_rst 0>; -+ ports-implemented = <1>; -+ phys = <&ahci1_phy>; -+ }; -+ -+ sata-controller@65900000 { -+ compatible = "socionext,uniphier-pxs3-ahci-glue", -+ "simple-mfd"; -+ reg = <0x65900000 0x100>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0 0x65900000 0x100>; -+ -+ ahci1_rst: reset-controller@0 { -+ compatible = "socionext,uniphier-pxs3-ahci-reset"; -+ reg = <0x0 0x4>; -+ clock-names = "link"; -+ clocks = <&sys_clk 29>; -+ reset-names = "link"; -+ resets = <&sys_rst 29>; -+ #reset-cells = <1>; -+ }; -+ -+ ahci1_phy: phy@10 { -+ compatible = "socionext,uniphier-pxs3-ahci-phy"; -+ reg = <0x10 0x10>; -+ clock-names = "link", "phy"; -+ clocks = <&sys_clk 29>, <&sys_clk 30>; -+ reset-names = "link", "phy"; -+ resets = <&sys_rst 29>, <&sys_rst 30>; -+ #phy-cells = <0>; -+ }; -+ }; -+ -+ usb0: usb@65a00000 { - compatible = "socionext,uniphier-dwc3", "snps,dwc3"; - status = "disabled"; - reg = <0x65a00000 0xcd00>; -- interrupt-names = "host", "peripheral"; -- interrupts = <0 134 4>, <0 135 4>; -+ interrupt-names = "dwc_usb3"; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>; - clock-names = "ref", "bus_early", "suspend"; -@@ -611,14 +704,15 @@ - dr_mode = "host"; - }; - -- usb-glue@65b00000 { -+ usb-controller@65b00000 { - compatible = "socionext,uniphier-pxs3-dwc3-glue", - "simple-mfd"; -+ reg = <0x65b00000 0x400>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x65b00000 0x400>; - -- usb0_rst: reset@0 { -+ usb0_rst: reset-controller@0 { - compatible = "socionext,uniphier-pxs3-usb3-reset"; - reg = <0x0 0x4>; - #reset-cells = <1>; -@@ -646,7 +740,7 @@ - resets = <&sys_rst 12>; - }; - -- usb0_hsphy0: hs-phy@200 { -+ usb0_hsphy0: phy@200 { - compatible = "socionext,uniphier-pxs3-usb3-hsphy"; - reg = <0x200 0x10>; - #phy-cells = <0>; -@@ -660,7 +754,7 @@ - <&usb_hs_i0>; - }; - -- usb0_hsphy1: hs-phy@210 { -+ usb0_hsphy1: phy@210 { - compatible = "socionext,uniphier-pxs3-usb3-hsphy"; - reg = <0x210 0x10>; - #phy-cells = <0>; -@@ -674,7 +768,7 @@ - <&usb_hs_i0>; - }; - -- usb0_ssphy0: ss-phy@300 { -+ usb0_ssphy0: phy@300 { - compatible = "socionext,uniphier-pxs3-usb3-ssphy"; - reg = <0x300 0x10>; - #phy-cells = <0>; -@@ -685,7 +779,7 @@ - vbus-supply = <&usb0_vbus0>; - }; - -- usb0_ssphy1: ss-phy@310 { -+ usb0_ssphy1: phy@310 { - compatible = "socionext,uniphier-pxs3-usb3-ssphy"; - reg = <0x310 0x10>; - #phy-cells = <0>; -@@ -697,31 +791,12 @@ - }; - }; - -- /* FIXME: U-Boot own node */ -- usb0: usb@65b00000 { -- compatible = "socionext,uniphier-pxs3-dwc3"; -- status = "disabled"; -- reg = <0x65b00000 0x1000>; -- #address-cells = <1>; -- #size-cells = <1>; -- ranges; -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>; -- dwc3@65a00000 { -- compatible = "snps,dwc3"; -- reg = <0x65a00000 0x10000>; -- interrupts = <0 134 4>; -- dr_mode = "host"; -- tx-fifo-resize; -- }; -- }; -- -- _usb1: usb@65c00000 { -+ usb1: usb@65c00000 { - compatible = "socionext,uniphier-dwc3", "snps,dwc3"; - status = "disabled"; - reg = <0x65c00000 0xcd00>; -- interrupt-names = "host", "peripheral"; -- interrupts = <0 137 4>, <0 138 4>; -+ interrupt-names = "dwc_usb3"; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>; - clock-names = "ref", "bus_early", "suspend"; -@@ -732,14 +807,15 @@ - dr_mode = "host"; - }; - -- usb-glue@65d00000 { -+ usb-controller@65d00000 { - compatible = "socionext,uniphier-pxs3-dwc3-glue", - "simple-mfd"; -+ reg = <0x65d00000 0x400>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x65d00000 0x400>; - -- usb1_rst: reset@0 { -+ usb1_rst: reset-controller@0 { - compatible = "socionext,uniphier-pxs3-usb3-reset"; - reg = <0x0 0x4>; - #reset-cells = <1>; -@@ -767,7 +843,7 @@ - resets = <&sys_rst 13>; - }; - -- usb1_hsphy0: hs-phy@200 { -+ usb1_hsphy0: phy@200 { - compatible = "socionext,uniphier-pxs3-usb3-hsphy"; - reg = <0x200 0x10>; - #phy-cells = <0>; -@@ -782,7 +858,7 @@ - <&usb_hs_i2>; - }; - -- usb1_hsphy1: hs-phy@210 { -+ usb1_hsphy1: phy@210 { - compatible = "socionext,uniphier-pxs3-usb3-hsphy"; - reg = <0x210 0x10>; - #phy-cells = <0>; -@@ -797,7 +873,7 @@ - <&usb_hs_i2>; - }; - -- usb1_ssphy0: ss-phy@300 { -+ usb1_ssphy0: phy@300 { - compatible = "socionext,uniphier-pxs3-usb3-ssphy"; - reg = <0x300 0x10>; - #phy-cells = <0>; -@@ -810,27 +886,8 @@ - }; - }; - -- /* FIXME: U-Boot own node */ -- usb1: usb@65d00000 { -- compatible = "socionext,uniphier-pxs3-dwc3"; -- status = "disabled"; -- reg = <0x65d00000 0x1000>; -- #address-cells = <1>; -- #size-cells = <1>; -- ranges; -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>; -- dwc3@65c00000 { -- compatible = "snps,dwc3"; -- reg = <0x65c00000 0x10000>; -- interrupts = <0 137 4>; -- dr_mode = "host"; -- tx-fifo-resize; -- }; -- }; -- - pcie: pcie@66000000 { -- compatible = "socionext,uniphier-pcie", "snps,dw-pcie"; -+ compatible = "socionext,uniphier-pcie"; - status = "disabled"; - reg-names = "dbi", "link", "config"; - reg = <0x66000000 0x1000>, <0x66010000 0x10000>, -@@ -850,7 +907,8 @@ - <0x82000000 0 0x20000000 0x20000000 0 0x0ffe0000>; - #interrupt-cells = <1>; - interrupt-names = "dma", "msi"; -- interrupts = <0 224 4>, <0 225 4>; -+ interrupts = , -+ ; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0 0 0 1 &pcie_intc 0>, /* INTA */ - <0 0 0 2 &pcie_intc 1>, /* INTB */ -@@ -863,7 +921,7 @@ - interrupt-controller; - #interrupt-cells = <1>; - interrupt-parent = <&gic>; -- interrupts = <0 226 4>; -+ interrupts = ; - }; - }; - -@@ -883,7 +941,9 @@ - status = "disabled"; - reg-names = "nand_data", "denali_reg"; - reg = <0x68000000 0x20>, <0x68100000 0x1000>; -- interrupts = <0 65 4>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_nand>; - clock-names = "nand", "nand_x", "ecc"; -diff --git a/arch/arm/dts/uniphier-sld8-ref.dts b/arch/arm/dts/uniphier-sld8-ref.dts -index 22898df39c..2446f9e153 100644 ---- a/arch/arm/dts/uniphier-sld8-ref.dts -+++ b/arch/arm/dts/uniphier-sld8-ref.dts -@@ -36,11 +36,11 @@ - }; - - ðsc { -- interrupts = <0 8>; -+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - }; - - &serialsc { -- interrupts = <0 8>; -+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - }; - - &serial0 { -@@ -56,7 +56,7 @@ - }; - - &gpio { -- xirq0 { -+ xirq0-hog { - gpio-hog; - gpios = ; - input; -@@ -85,4 +85,8 @@ - - &nand { - status = "okay"; -+ -+ nand@0 { -+ reg = <0>; -+ }; - }; -diff --git a/arch/arm/dts/uniphier-sld8.dtsi b/arch/arm/dts/uniphier-sld8.dtsi -index 93ddebbae4..4708b2d7a1 100644 ---- a/arch/arm/dts/uniphier-sld8.dtsi -+++ b/arch/arm/dts/uniphier-sld8.dtsi -@@ -6,6 +6,7 @@ - // Author: Masahiro Yamada - - #include -+#include - - / { - compatible = "socionext,uniphier-sld8"; -@@ -55,7 +56,8 @@ - compatible = "socionext,uniphier-system-cache"; - reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, - <0x506c0000 0x400>; -- interrupts = <0 174 4>, <0 175 4>; -+ interrupts = , -+ ; - cache-unified; - cache-size = <(256 * 1024)>; - cache-sets = <256>; -@@ -69,7 +71,7 @@ - reg = <0x54006000 0x100>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 39 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_spi0>; - clocks = <&peri_clk 11>; -@@ -80,7 +82,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006800 0x40>; -- interrupts = <0 33 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart0>; - clocks = <&peri_clk 0>; -@@ -91,7 +93,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006900 0x40>; -- interrupts = <0 35 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - clocks = <&peri_clk 1>; -@@ -102,7 +104,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006a00 0x40>; -- interrupts = <0 37 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - clocks = <&peri_clk 2>; -@@ -113,7 +115,7 @@ - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006b00 0x40>; -- interrupts = <0 29 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3>; - clocks = <&peri_clk 3>; -@@ -144,7 +146,7 @@ - reg = <0x58400000 0x40>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 41 1>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c0>; - clocks = <&peri_clk 4>; -@@ -158,7 +160,7 @@ - reg = <0x58480000 0x40>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 42 1>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - clocks = <&peri_clk 5>; -@@ -172,7 +174,7 @@ - reg = <0x58500000 0x40>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 43 1>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2>; - clocks = <&peri_clk 6>; -@@ -186,7 +188,7 @@ - reg = <0x58580000 0x40>; - #address-cells = <1>; - #size-cells = <0>; -- interrupts = <0 44 1>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c3>; - clocks = <&peri_clk 7>; -@@ -209,33 +211,33 @@ - reg = <0x59801000 0x400>; - }; - -- mioctrl@59810000 { -+ mioctrl: syscon@59810000 { - compatible = "socionext,uniphier-sld8-mioctrl", - "simple-mfd", "syscon"; - reg = <0x59810000 0x800>; - -- mio_clk: clock { -+ mio_clk: clock-controller { - compatible = "socionext,uniphier-sld8-mio-clock"; - #clock-cells = <1>; - }; - -- mio_rst: reset { -+ mio_rst: reset-controller { - compatible = "socionext,uniphier-sld8-mio-reset"; - #reset-cells = <1>; - }; - }; - -- perictrl@59820000 { -+ syscon@59820000 { - compatible = "socionext,uniphier-sld8-perictrl", - "simple-mfd", "syscon"; - reg = <0x59820000 0x200>; - -- peri_clk: clock { -+ peri_clk: clock-controller { - compatible = "socionext,uniphier-sld8-peri-clock"; - #clock-cells = <1>; - }; - -- peri_rst: reset { -+ peri_rst: reset-controller { - compatible = "socionext,uniphier-sld8-peri-reset"; - #reset-cells = <1>; - }; -@@ -244,8 +246,13 @@ - dmac: dma-controller@5a000000 { - compatible = "socionext,uniphier-mio-dmac"; - reg = <0x5a000000 0x1000>; -- interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>, -- <0 71 4>, <0 72 4>, <0 73 4>; -+ interrupts = , -+ , -+ , -+ , -+ , -+ , -+ ; - clocks = <&mio_clk 7>; - resets = <&mio_rst 7>; - #dma-cells = <1>; -@@ -255,7 +262,7 @@ - compatible = "socionext,uniphier-sd-v2.91"; - status = "disabled"; - reg = <0x5a400000 0x200>; -- interrupts = <0 76 4>; -+ interrupts = ; - pinctrl-names = "default", "uhs"; - pinctrl-0 = <&pinctrl_sd>; - pinctrl-1 = <&pinctrl_sd_uhs>; -@@ -269,13 +276,14 @@ - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; -+ socionext,syscon-uhs-mode = <&mioctrl 0>; - }; - - emmc: mmc@5a500000 { - compatible = "socionext,uniphier-sd-v2.91"; - status = "disabled"; - reg = <0x5a500000 0x200>; -- interrupts = <0 78 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_emmc>; - clocks = <&mio_clk 1>; -@@ -293,7 +301,7 @@ - compatible = "socionext,uniphier-ehci", "generic-ehci"; - status = "disabled"; - reg = <0x5a800100 0x100>; -- interrupts = <0 80 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb0>; - clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>, -@@ -307,7 +315,7 @@ - compatible = "socionext,uniphier-ehci", "generic-ehci"; - status = "disabled"; - reg = <0x5a810100 0x100>; -- interrupts = <0 81 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb1>; - clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>, -@@ -321,7 +329,7 @@ - compatible = "socionext,uniphier-ehci", "generic-ehci"; - status = "disabled"; - reg = <0x5a820100 0x100>; -- interrupts = <0 82 4>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb2>; - clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 10>, -@@ -331,7 +339,7 @@ - has-transaction-translator; - }; - -- soc-glue@5f800000 { -+ syscon@5f800000 { - compatible = "socionext,uniphier-sld8-soc-glue", - "simple-mfd", "syscon"; - reg = <0x5f800000 0x2000>; -@@ -341,9 +349,10 @@ - }; - }; - -- soc-glue@5f900000 { -+ syscon@5f900000 { - compatible = "socionext,uniphier-sld8-soc-glue-debug", -- "simple-mfd"; -+ "simple-mfd", "syscon"; -+ reg = <0x5f900000 0x2000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x5f900000 0x2000>; -@@ -362,14 +371,16 @@ - timer@60000200 { - compatible = "arm,cortex-a9-global-timer"; - reg = <0x60000200 0x20>; -- interrupts = <1 11 0x104>; -+ interrupts = ; - clocks = <&arm_timer_clk>; - }; - - timer@60000600 { - compatible = "arm,cortex-a9-twd-timer"; - reg = <0x60000600 0x20>; -- interrupts = <1 13 0x104>; -+ interrupts = ; - clocks = <&arm_timer_clk>; - }; - -@@ -388,17 +399,17 @@ - #interrupt-cells = <2>; - }; - -- sysctrl@61840000 { -+ syscon@61840000 { - compatible = "socionext,uniphier-sld8-sysctrl", - "simple-mfd", "syscon"; - reg = <0x61840000 0x10000>; - -- sys_clk: clock { -+ sys_clk: clock-controller { - compatible = "socionext,uniphier-sld8-clock"; - #clock-cells = <1>; - }; - -- sys_rst: reset { -+ sys_rst: reset-controller { - compatible = "socionext,uniphier-sld8-reset"; - #reset-cells = <1>; - }; -@@ -409,7 +420,9 @@ - status = "disabled"; - reg-names = "nand_data", "denali_reg"; - reg = <0x68000000 0x20>, <0x68100000 0x1000>; -- interrupts = <0 65 4>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_nand2cs>; - clock-names = "nand", "nand_x", "ecc"; -diff --git a/arch/arm/dts/uniphier-v7-u-boot.dtsi b/arch/arm/dts/uniphier-v7-u-boot.dtsi -index 603b33dd2b..eadcc21fc0 100644 ---- a/arch/arm/dts/uniphier-v7-u-boot.dtsi -+++ b/arch/arm/dts/uniphier-v7-u-boot.dtsi -@@ -1,43 +1,43 @@ - / { - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - - timer@60000200 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - serial@54006800 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - serial@54006900 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - serial@54006a00 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - soc-glue@5f800000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - - emmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -@@ -45,5 +45,5 @@ - }; - - &emmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/versal-mini-emmc0.dts b/arch/arm/dts/versal-mini-emmc0.dts -index d098c2d01b..1863d29d3d 100644 ---- a/arch/arm/dts/versal-mini-emmc0.dts -+++ b/arch/arm/dts/versal-mini-emmc0.dts -@@ -25,11 +25,11 @@ - dcc: dcc { - compatible = "arm,dcc"; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - amba: amba { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "simple-bus"; - #address-cells = <0x2>; - #size-cells = <0x2>; -diff --git a/arch/arm/dts/versal-mini-emmc1.dts b/arch/arm/dts/versal-mini-emmc1.dts -index 9d4ac28359..8701c3bb27 100644 ---- a/arch/arm/dts/versal-mini-emmc1.dts -+++ b/arch/arm/dts/versal-mini-emmc1.dts -@@ -25,11 +25,11 @@ - dcc: dcc { - compatible = "arm,dcc"; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - amba: amba { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "simple-bus"; - #address-cells = <0x2>; - #size-cells = <0x2>; -diff --git a/arch/arm/dts/versal-mini-ospi.dtsi b/arch/arm/dts/versal-mini-ospi.dtsi -index a4b76e2b99..2d04521dd6 100644 ---- a/arch/arm/dts/versal-mini-ospi.dtsi -+++ b/arch/arm/dts/versal-mini-ospi.dtsi -@@ -25,11 +25,11 @@ - dcc: dcc { - compatible = "arm,dcc"; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - amba: amba { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "simple-bus"; - #address-cells = <0x2>; - #size-cells = <0x2>; -diff --git a/arch/arm/dts/versal-mini-qspi.dtsi b/arch/arm/dts/versal-mini-qspi.dtsi -index 71d0ba5e00..bb8819dd25 100644 ---- a/arch/arm/dts/versal-mini-qspi.dtsi -+++ b/arch/arm/dts/versal-mini-qspi.dtsi -@@ -25,11 +25,11 @@ - dcc: dcc { - compatible = "arm,dcc"; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - amba: amba { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "simple-bus"; - #address-cells = <0x2>; - #size-cells = <0x2>; -diff --git a/arch/arm/dts/versal-mini.dts b/arch/arm/dts/versal-mini.dts -index 6a83981cc2..769eb9e7b2 100644 ---- a/arch/arm/dts/versal-mini.dts -+++ b/arch/arm/dts/versal-mini.dts -@@ -31,6 +31,6 @@ - dcc: dcc { - compatible = "arm,dcc"; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; -diff --git a/arch/arm/dts/versal-net-mini.dts b/arch/arm/dts/versal-net-mini.dts -index 8c29a6ed6b..9365efbe9f 100644 ---- a/arch/arm/dts/versal-net-mini.dts -+++ b/arch/arm/dts/versal-net-mini.dts -@@ -33,7 +33,7 @@ - }; - - clk1: clk1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <1000000>; -@@ -42,18 +42,18 @@ - dcc: dcc { - compatible = "arm,dcc"; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - amba: axi { - compatible = "simple-bus"; -- u-boot,dm-pre-reloc; -+ bootph-all; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - serial0: serial@f1920000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "arm,pl011", "arm,primecell"; - reg = <0 0xf1920000 0 0x1000>; - reg-io-width = <4>; -diff --git a/arch/arm/dts/vf610-bk4r1-u-boot.dtsi b/arch/arm/dts/vf610-bk4r1-u-boot.dtsi -index 088926bde2..1336006e03 100644 ---- a/arch/arm/dts/vf610-bk4r1-u-boot.dtsi -+++ b/arch/arm/dts/vf610-bk4r1-u-boot.dtsi -@@ -6,22 +6,22 @@ - - / { - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &aips0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_ddr { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/vf610-colibri-eval-v3-u-boot.dtsi b/arch/arm/dts/vf610-colibri-eval-v3-u-boot.dtsi -index f67c11b3da..572d40877e 100644 ---- a/arch/arm/dts/vf610-colibri-eval-v3-u-boot.dtsi -+++ b/arch/arm/dts/vf610-colibri-eval-v3-u-boot.dtsi -@@ -5,16 +5,16 @@ - - / { - soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - &aips0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &dcu0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &iomuxc { -@@ -78,13 +78,13 @@ - }; - - &pinctrl_ddr { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl_uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi -index f72ef526f0..97a9e49a19 100644 ---- a/arch/arm/dts/zynq-7000.dtsi -+++ b/arch/arm/dts/zynq-7000.dtsi -@@ -96,7 +96,7 @@ - }; - - amba: axi { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -@@ -258,7 +258,7 @@ - }; - - gem0: ethernet@e000b000 { -- compatible = "xlnx,zynq-gem", "cdns,zynq-gem", "cdns,gem"; -+ compatible = "xlnx,zynq-gem", "cdns,gem"; - reg = <0xe000b000 0x1000>; - status = "disabled"; - interrupts = <0 22 4>; -@@ -269,7 +269,7 @@ - }; - - gem1: ethernet@e000c000 { -- compatible = "xlnx,zynq-gem", "cdns,zynq-gem", "cdns,gem"; -+ compatible = "xlnx,zynq-gem", "cdns,gem"; - reg = <0xe000c000 0x1000>; - status = "disabled"; - interrupts = <0 45 4>; -@@ -330,14 +330,14 @@ - }; - - slcr: slcr@f8000000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #address-cells = <1>; - #size-cells = <1>; - compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd"; - reg = <0xF8000000 0x1000>; - ranges; - clkc: clkc@100 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <1>; - compatible = "xlnx,ps7-clkc"; - fclk-enable = <0xf>; -@@ -369,20 +369,20 @@ - }; - }; - -- dmac_s: dmac@f8003000 { -+ dmac_s: dma-controller@f8003000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0xf8003000 0x1000>; - interrupt-parent = <&intc>; -- interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3", -- "dma4", "dma5", "dma6", "dma7"; -+ /* -+ * interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3", -+ * "dma4", "dma5", "dma6", "dma7"; -+ */ - interrupts = <0 13 4>, - <0 14 4>, <0 15 4>, - <0 16 4>, <0 17 4>, - <0 40 4>, <0 41 4>, - <0 42 4>, <0 43 4>; - #dma-cells = <1>; -- #dma-channels = <8>; -- #dma-requests = <4>; - clocks = <&clkc 27>; - clock-names = "apb_pclk"; - }; -@@ -427,7 +427,7 @@ - }; - - scutimer: timer@f8f00600 { -- u-boot,dm-pre-reloc; -+ bootph-all; - interrupt-parent = <&intc>; - interrupts = <1 13 0x301>; - compatible = "arm,cortex-a9-twd-timer"; -diff --git a/arch/arm/dts/zynq-cc108.dts b/arch/arm/dts/zynq-cc108.dts -index 036106e221..dc942b0f59 100644 ---- a/arch/arm/dts/zynq-cc108.dts -+++ b/arch/arm/dts/zynq-cc108.dts -@@ -99,7 +99,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/arm/dts/zynq-cse-nand.dts b/arch/arm/dts/zynq-cse-nand.dts -index 27adfb9216..18f627f3d7 100644 ---- a/arch/arm/dts/zynq-cse-nand.dts -+++ b/arch/arm/dts/zynq-cse-nand.dts -@@ -28,11 +28,11 @@ - dcc: dcc { - compatible = "arm,dcc"; - status = "disabled"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - amba: amba { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -@@ -54,14 +54,14 @@ - }; - - slcr: slcr@f8000000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #address-cells = <1>; - #size-cells = <1>; - compatible = "xlnx,zynq-slcr", "syscon", "simple-bus"; - reg = <0xF8000000 0x1000>; - ranges; - clkc: clkc@100 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <1>; - compatible = "xlnx,ps7-clkc"; - clock-output-names = "armpll", "ddrpll", -@@ -88,7 +88,7 @@ - }; - - scutimer: timer@f8f00600 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "arm,cortex-a9-twd-timer"; - reg = <0xf8f00600 0x20>; - clock-frequency = <333333333>; -diff --git a/arch/arm/dts/zynq-cse-nor.dts b/arch/arm/dts/zynq-cse-nor.dts -index f22a149f79..a5c8a0813f 100644 ---- a/arch/arm/dts/zynq-cse-nor.dts -+++ b/arch/arm/dts/zynq-cse-nor.dts -@@ -28,25 +28,25 @@ - dcc: dcc { - compatible = "arm,dcc"; - status = "disabled"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - amba: amba { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - slcr: slcr@f8000000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #address-cells = <1>; - #size-cells = <1>; - compatible = "xlnx,zynq-slcr", "syscon", "simple-bus"; - reg = <0xF8000000 0x1000>; - ranges; - clkc: clkc@100 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <1>; - compatible = "xlnx,ps7-clkc"; - clock-output-names = "armpll", "ddrpll", -@@ -79,7 +79,7 @@ - * why place cfi-flash directly here. - */ - flash@e2000000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "cfi-flash"; - reg = <0xe2000000 0x2000000>; - #address-cells = <1>; -@@ -87,7 +87,7 @@ - }; - - scutimer: timer@f8f00600 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "arm,cortex-a9-twd-timer"; - reg = <0xf8f00600 0x20>; - clock-frequency = <333333333>; -diff --git a/arch/arm/dts/zynq-cse-qspi.dtsi b/arch/arm/dts/zynq-cse-qspi.dtsi -index f7ac92b802..2e4afafebf 100644 ---- a/arch/arm/dts/zynq-cse-qspi.dtsi -+++ b/arch/arm/dts/zynq-cse-qspi.dtsi -@@ -29,11 +29,11 @@ - dcc: dcc { - compatible = "arm,dcc"; - status = "disabled"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - amba: amba { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -@@ -91,7 +91,7 @@ - }; - - slcr: slcr@f8000000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #address-cells = <1>; - #size-cells = <1>; - compatible = "xlnx,zynq-slcr", "syscon", "simple-bus"; -@@ -101,7 +101,7 @@ - #clock-cells = <1>; - compatible = "xlnx,ps7-clkc"; - fclk-enable = <0xf>; -- u-boot,dm-pre-reloc; -+ bootph-all; - clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", - "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", - "dci", "lqspi", "smc", "pcap", "gem0", "gem1", -@@ -118,7 +118,7 @@ - }; - - scutimer: timer@f8f00600 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "arm,cortex-a9-twd-timer"; - reg = <0xf8f00600 0x20>; - clock-frequency = <333333333>; -diff --git a/arch/arm/dts/zynq-dlc20-rev1.0.dts b/arch/arm/dts/zynq-dlc20-rev1.0.dts -index 39ebcee9f7..cbf52c88b9 100644 ---- a/arch/arm/dts/zynq-dlc20-rev1.0.dts -+++ b/arch/arm/dts/zynq-dlc20-rev1.0.dts -@@ -64,7 +64,7 @@ - }; - - &qspi { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - is-dual = <0>; - num-cs = <1>; -@@ -81,14 +81,14 @@ - }; - - &sdhci0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; /* EMMC MTFC4GACAJCN - MIO40-MIO45 */ - non-removable; - bus-width = <4>; - }; - - &uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; /* MIO8/9 */ - }; - -diff --git a/arch/arm/dts/zynq-microzed.dts b/arch/arm/dts/zynq-microzed.dts -index 0766398605..875ee080df 100644 ---- a/arch/arm/dts/zynq-microzed.dts -+++ b/arch/arm/dts/zynq-microzed.dts -@@ -38,12 +38,12 @@ - }; - - &qspi { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - - &uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -@@ -58,7 +58,7 @@ - }; - - &sdhci0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/arm/dts/zynq-minized.dts b/arch/arm/dts/zynq-minized.dts -index 525921ee7b..38365d1c0e 100644 ---- a/arch/arm/dts/zynq-minized.dts -+++ b/arch/arm/dts/zynq-minized.dts -@@ -79,7 +79,7 @@ - }; - - &uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/arm/dts/zynq-picozed.dts b/arch/arm/dts/zynq-picozed.dts -index dea6a422c3..640537eeba 100644 ---- a/arch/arm/dts/zynq-picozed.dts -+++ b/arch/arm/dts/zynq-picozed.dts -@@ -24,16 +24,16 @@ - }; - - &uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - - &qspi { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - - &sdhci1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; -diff --git a/arch/arm/dts/zynq-syzygy-hub.dts b/arch/arm/dts/zynq-syzygy-hub.dts -index cb878b0d0d..99f248d4e5 100644 ---- a/arch/arm/dts/zynq-syzygy-hub.dts -+++ b/arch/arm/dts/zynq-syzygy-hub.dts -@@ -61,12 +61,12 @@ - }; - - &sdhci0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/arm/dts/zynq-topic-miami.dts b/arch/arm/dts/zynq-topic-miami.dts -index c4ec56138e..57cb86aafd 100644 ---- a/arch/arm/dts/zynq-topic-miami.dts -+++ b/arch/arm/dts/zynq-topic-miami.dts -@@ -31,7 +31,7 @@ - }; - - &qspi { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - is-dual = <0>; - num-cs = <1>; -@@ -82,12 +82,12 @@ - }; - - &sdhci0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/arm/dts/zynq-zc702.dts b/arch/arm/dts/zynq-zc702.dts -index f04129fd04..27fb194fc9 100644 ---- a/arch/arm/dts/zynq-zc702.dts -+++ b/arch/arm/dts/zynq-zc702.dts -@@ -34,14 +34,14 @@ - gpio-keys { - compatible = "gpio-keys"; - autorepeat; -- sw14 { -+ switch-14 { - label = "sw14"; - gpios = <&gpio0 12 0>; - linux,code = <108>; /* down */ - wakeup-source; - autorepeat; - }; -- sw13 { -+ switch-13 { - label = "sw13"; - gpios = <&gpio0 14 0>; - linux,code = <103>; /* up */ -@@ -396,7 +396,7 @@ - }; - - &qspi { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - num-cs = <1>; - flash@0 { -@@ -409,14 +409,14 @@ - }; - - &sdhci0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sdhci0_default>; - }; - - &uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1_default>; -diff --git a/arch/arm/dts/zynq-zc706.dts b/arch/arm/dts/zynq-zc706.dts -index dd3ae83c82..03eb016ed6 100644 ---- a/arch/arm/dts/zynq-zc706.dts -+++ b/arch/arm/dts/zynq-zc706.dts -@@ -307,7 +307,7 @@ - }; - - &qspi { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - num-cs = <1>; - flash@0 { -@@ -320,14 +320,14 @@ - }; - - &sdhci0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sdhci0_default>; - }; - - &uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1_default>; -diff --git a/arch/arm/dts/zynq-zc770-xm010.dts b/arch/arm/dts/zynq-zc770-xm010.dts -index 002ff9f7f4..17680d7f8e 100644 ---- a/arch/arm/dts/zynq-zc770-xm010.dts -+++ b/arch/arm/dts/zynq-zc770-xm010.dts -@@ -97,7 +97,7 @@ - }; - - &uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/arm/dts/zynq-zc770-xm011.dts b/arch/arm/dts/zynq-zc770-xm011.dts -index 0ef2ae1744..02214349fe 100644 ---- a/arch/arm/dts/zynq-zc770-xm011.dts -+++ b/arch/arm/dts/zynq-zc770-xm011.dts -@@ -62,7 +62,7 @@ - }; - - &uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/arm/dts/zynq-zc770-xm012.dts b/arch/arm/dts/zynq-zc770-xm012.dts -index ccf76e7984..6e36634e3d 100644 ---- a/arch/arm/dts/zynq-zc770-xm012.dts -+++ b/arch/arm/dts/zynq-zc770-xm012.dts -@@ -69,6 +69,6 @@ - }; - - &uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; -diff --git a/arch/arm/dts/zynq-zc770-xm013.dts b/arch/arm/dts/zynq-zc770-xm013.dts -index 455c8a9610..21902fbb0c 100644 ---- a/arch/arm/dts/zynq-zc770-xm013.dts -+++ b/arch/arm/dts/zynq-zc770-xm013.dts -@@ -86,6 +86,6 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; -diff --git a/arch/arm/dts/zynq-zed.dts b/arch/arm/dts/zynq-zed.dts -index cf28167a7f..5320b4b233 100644 ---- a/arch/arm/dts/zynq-zed.dts -+++ b/arch/arm/dts/zynq-zed.dts -@@ -49,7 +49,7 @@ - }; - - &qspi { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - num-cs = <1>; - flash@0 { -@@ -61,12 +61,12 @@ - }; - - &sdhci0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - - &uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/arm/dts/zynq-zturn-common.dtsi b/arch/arm/dts/zynq-zturn-common.dtsi -index 486b6fa2e1..c849c24ed1 100644 ---- a/arch/arm/dts/zynq-zturn-common.dtsi -+++ b/arch/arm/dts/zynq-zturn-common.dtsi -@@ -49,7 +49,7 @@ - gpio-keys { - compatible = "gpio-keys"; - autorepeat; -- K1 { -+ key { - label = "K1"; - gpios = <&gpio0 0x32 0x1>; - linux,code = <0x66>; -@@ -64,7 +64,7 @@ - }; - - &qspi { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -@@ -78,17 +78,17 @@ - }; - - &sdhci0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - - &uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/arm/dts/zynq-zybo-z7.dts b/arch/arm/dts/zynq-zybo-z7.dts -index 116958ec97..83b8413097 100644 ---- a/arch/arm/dts/zynq-zybo-z7.dts -+++ b/arch/arm/dts/zynq-zybo-z7.dts -@@ -60,17 +60,17 @@ - }; - - &qspi { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - - &sdhci0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - - &uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/arm/dts/zynq-zybo.dts b/arch/arm/dts/zynq-zybo.dts -index 0ac54ebbdc..0ce5238c9a 100644 ---- a/arch/arm/dts/zynq-zybo.dts -+++ b/arch/arm/dts/zynq-zybo.dts -@@ -50,17 +50,17 @@ - }; - - &qspi { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - - &sdhci0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - - &uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/arm/dts/zynqmp-a2197-revA.dts b/arch/arm/dts/zynqmp-a2197-revA.dts -index 89c3a281d0..04f9f025e5 100644 ---- a/arch/arm/dts/zynqmp-a2197-revA.dts -+++ b/arch/arm/dts/zynqmp-a2197-revA.dts -@@ -40,14 +40,14 @@ - - &i2c0 { - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - clock-frequency = <400000>; - i2c-mux@74 { /* this cover MGT board */ - compatible = "nxp,pca9548"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x74>; -- u-boot,dm-pre-reloc; -+ bootph-all; - /* FIXME reset connected to SYSCTRL_IIC_MUX0_RESET */ - i2c@0 { - #address-cells = <1>; -@@ -56,7 +56,7 @@ - /* Use for storing information about SC board */ - eeprom0: eeprom@50 { /* u96 - 24LC32A - 256B */ - compatible = "atmel,24c32"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x50>; - }; - }; -@@ -65,14 +65,14 @@ - - &i2c1 { - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - clock-frequency = <400000>; - i2c-mux@74 { /* This cover processor board */ - compatible = "nxp,pca9548"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x74>; -- u-boot,dm-pre-reloc; -+ bootph-all; - /* FIXME reset connected to SYSCTRL_IIC_MUX0_RESET */ - i2c@0 { - #address-cells = <1>; -@@ -81,7 +81,7 @@ - /* Use for storing information about SC board */ - eeprom1: eeprom@50 { /* u96 - 24LC32A - 256B */ - compatible = "atmel,24c32"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x50>; - }; - }; -diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi -index b99eb07b00..38dc9cd8fc 100644 ---- a/arch/arm/dts/zynqmp-clk-ccf.dtsi -+++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi -@@ -34,35 +34,35 @@ - }; - - pss_ref_clk: pss_ref_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <33333333>; - }; - - video_clk: video_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <27000000>; - }; - - pss_alt_ref_clk: pss_alt_ref_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - gt_crx_ref_clk: gt_crx_ref_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <108000000>; - }; - - aux_ref_clk: aux_ref_clk { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <27000000>; -@@ -71,7 +71,7 @@ - - &zynqmp_firmware { - zynqmp_clk: clock-controller { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <1>; - compatible = "xlnx,zynqmp-clk"; - clocks = <&pss_ref_clk>, <&video_clk>, <&pss_alt_ref_clk>, -diff --git a/arch/arm/dts/zynqmp-dlc21-revA.dts b/arch/arm/dts/zynqmp-dlc21-revA.dts -index bf0d89a5fc..7460e4a4fd 100644 ---- a/arch/arm/dts/zynqmp-dlc21-revA.dts -+++ b/arch/arm/dts/zynqmp-dlc21-revA.dts -@@ -80,7 +80,7 @@ - - &uart0 { /* uart0 MIO38-39 */ - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &gem0 { -@@ -196,10 +196,10 @@ - status = "okay"; - is-decoded-cs = <0>; - num-cs = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - displayspi@0 { - compatible = "syncoam,seps525"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0>; - status = "okay"; - spi-max-frequency = <10000000>; -diff --git a/arch/arm/dts/zynqmp-mini-emmc0.dts b/arch/arm/dts/zynqmp-mini-emmc0.dts -index 1cc4ade5e8..d1e58eb6d1 100644 ---- a/arch/arm/dts/zynqmp-mini-emmc0.dts -+++ b/arch/arm/dts/zynqmp-mini-emmc0.dts -@@ -32,7 +32,7 @@ - dcc: dcc { - compatible = "arm,dcc"; - status = "disabled"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - clk_xin: clk_xin { -@@ -48,7 +48,7 @@ - ranges; - - sdhci0: sdhci@ff160000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; - status = "disabled"; - non-removable; -diff --git a/arch/arm/dts/zynqmp-mini-emmc1.dts b/arch/arm/dts/zynqmp-mini-emmc1.dts -index 96b5dc2932..0c139f82aa 100644 ---- a/arch/arm/dts/zynqmp-mini-emmc1.dts -+++ b/arch/arm/dts/zynqmp-mini-emmc1.dts -@@ -32,7 +32,7 @@ - dcc: dcc { - compatible = "arm,dcc"; - status = "disabled"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - clk_xin: clk_xin { -@@ -48,7 +48,7 @@ - ranges; - - sdhci1: sdhci@ff170000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; - status = "disabled"; - non-removable; -diff --git a/arch/arm/dts/zynqmp-mini-nand.dts b/arch/arm/dts/zynqmp-mini-nand.dts -index d376ade834..8fae01b250 100644 ---- a/arch/arm/dts/zynqmp-mini-nand.dts -+++ b/arch/arm/dts/zynqmp-mini-nand.dts -@@ -32,7 +32,7 @@ - dcc: dcc { - compatible = "arm,dcc"; - status = "disabled"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - amba: amba { -diff --git a/arch/arm/dts/zynqmp-mini-qspi.dts b/arch/arm/dts/zynqmp-mini-qspi.dts -index 20c21deb66..a7cf4eff6c 100644 ---- a/arch/arm/dts/zynqmp-mini-qspi.dts -+++ b/arch/arm/dts/zynqmp-mini-qspi.dts -@@ -33,7 +33,7 @@ - dcc: dcc { - compatible = "arm,dcc"; - status = "disabled"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - amba: amba { -diff --git a/arch/arm/dts/zynqmp-mini.dts b/arch/arm/dts/zynqmp-mini.dts -index 1faee9ec75..15bee169a9 100644 ---- a/arch/arm/dts/zynqmp-mini.dts -+++ b/arch/arm/dts/zynqmp-mini.dts -@@ -31,7 +31,7 @@ - dcc: dcc { - compatible = "arm,dcc"; - status = "disabled"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -diff --git a/arch/arm/dts/zynqmp-r5.dts b/arch/arm/dts/zynqmp-r5.dts -index a72172ef2e..9789d7144e 100644 ---- a/arch/arm/dts/zynqmp-r5.dts -+++ b/arch/arm/dts/zynqmp-r5.dts -@@ -44,11 +44,11 @@ - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <100000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - amba { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -@@ -63,7 +63,7 @@ - }; - - uart1: serial@ff010000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "cdns,uart-r1p12", "xlnx,xuartps"; - reg = <0xff010000 0x1000>; - clock-names = "uart_clk", "pclk"; -diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts -index 83c65029c7..c82e1dfac9 100644 ---- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts -+++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts -@@ -229,7 +229,7 @@ - - /* gem2/gem3 via PL with phys u79@2 and u80@3 */ - --&pinctrl0 { /* required by spec */ -+&pinctrl0 { - status = "okay"; - - pinctrl_uart1_default: uart1-default { -diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts -index f41a2f830c..9dd160c7a7 100644 ---- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts -+++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts -@@ -229,7 +229,7 @@ - - /* gem2/gem3 via PL with phys u79@2 and u80@3 */ - --&pinctrl0 { /* required by spec */ -+&pinctrl0 { - status = "okay"; - - pinctrl_uart1_default: uart1-default { -diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts -index 0be5b29c05..6f5a426065 100644 ---- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts -+++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts -@@ -159,7 +159,7 @@ - bus-width = <8>; - }; - --&gem3 { /* required by spec */ -+&gem3 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gem3_default>; -@@ -185,7 +185,7 @@ - }; - }; - --&pinctrl0 { /* required by spec */ -+&pinctrl0 { - status = "okay"; - - pinctrl_uart1_default: uart1-default { -diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts -index fca57a6d91..7764adf129 100644 ---- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts -+++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts -@@ -146,7 +146,7 @@ - bus-width = <8>; - }; - --&gem3 { /* required by spec */ -+&gem3 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gem3_default>; -@@ -172,7 +172,7 @@ - }; - }; - --&pinctrl0 { /* required by spec */ -+&pinctrl0 { - status = "okay"; - - pinctrl_uart1_default: uart1-default { -diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts b/arch/arm/dts/zynqmp-sm-k26-revA.dts -index aafaaec3f1..ed75049741 100644 ---- a/arch/arm/dts/zynqmp-sm-k26-revA.dts -+++ b/arch/arm/dts/zynqmp-sm-k26-revA.dts -@@ -254,20 +254,20 @@ - - &i2c1 { - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - clock-frequency = <400000>; - scl-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>; - sda-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>; - - eeprom: eeprom@50 { /* u46 - also at address 0x58 */ -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "st,24c64", "atmel,24c64"; /* st m24c64 */ - reg = <0x50>; - /* WP pin EE_WP_EN connected to slg7x644092@68 */ - }; - - eeprom_cc: eeprom@51 { /* required by spec - also at address 0x59 */ -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "st,24c64", "atmel,24c64"; /* st m24c64 */ - reg = <0x51>; - }; -diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts -index 4e6160bcd8..b6bc2f5be0 100644 ---- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts -+++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts -@@ -142,6 +142,7 @@ - label = "main-storage-0"; - nand-ecc-step-size = <1024>; - nand-ecc-strength = <24>; -+ nand-on-flash-bbt; - - partition@0 { /* for testing purpose */ - label = "nand-fsbl-uboot"; -@@ -178,6 +179,7 @@ - label = "main-storage-1"; - nand-ecc-step-size = <1024>; - nand-ecc-strength = <24>; -+ nand-on-flash-bbt; - - partition@0 { /* for testing purpose */ - label = "nand1-fsbl-uboot"; -diff --git a/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts b/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts -index 13812470ae..6021f8b4e1 100644 ---- a/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts -+++ b/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts -@@ -128,54 +128,79 @@ - arasan,has-mdma; - num-cs = <2>; - -- partition@0 { /* for testing purpose */ -- label = "nand-fsbl-uboot"; -- reg = <0x0 0x0 0x400000>; -+ nand@0 { -+ reg = <0x0>; -+ #address-cells = <0x2>; -+ #size-cells = <0x1>; -+ nand-ecc-mode = "soft"; -+ nand-ecc-algo = "bch"; -+ nand-rb = <0>; -+ label = "main-storage-0"; -+ nand-ecc-step-size = <1024>; -+ nand-ecc-strength = <24>; -+ nand-on-flash-bbt; -+ -+ partition@0 { /* for testing purpose */ -+ label = "nand-fsbl-uboot"; -+ reg = <0x0 0x0 0x400000>; -+ }; -+ partition@1 { /* for testing purpose */ -+ label = "nand-linux"; -+ reg = <0x0 0x400000 0x1400000>; -+ }; -+ partition@2 { /* for testing purpose */ -+ label = "nand-device-tree"; -+ reg = <0x0 0x1800000 0x400000>; -+ }; -+ partition@3 { /* for testing purpose */ -+ label = "nand-rootfs"; -+ reg = <0x0 0x1C00000 0x1400000>; -+ }; -+ partition@4 { /* for testing purpose */ -+ label = "nand-bitstream"; -+ reg = <0x0 0x3000000 0x400000>; -+ }; -+ partition@5 { /* for testing purpose */ -+ label = "nand-misc"; -+ reg = <0x0 0x3400000 0xFCC00000>; -+ }; - }; -- partition@1 { /* for testing purpose */ -- label = "nand-linux"; -- reg = <0x0 0x400000 0x1400000>; -- }; -- partition@2 { /* for testing purpose */ -- label = "nand-device-tree"; -- reg = <0x0 0x1800000 0x400000>; -- }; -- partition@3 { /* for testing purpose */ -- label = "nand-rootfs"; -- reg = <0x0 0x1C00000 0x1400000>; -- }; -- partition@4 { /* for testing purpose */ -- label = "nand-bitstream"; -- reg = <0x0 0x3000000 0x400000>; -- }; -- partition@5 { /* for testing purpose */ -- label = "nand-misc"; -- reg = <0x0 0x3400000 0xFCC00000>; -- }; -- -- partition@6 { /* for testing purpose */ -- label = "nand1-fsbl-uboot"; -- reg = <0x1 0x0 0x400000>; -- }; -- partition@7 { /* for testing purpose */ -- label = "nand1-linux"; -- reg = <0x1 0x400000 0x1400000>; -- }; -- partition@8 { /* for testing purpose */ -- label = "nand1-device-tree"; -- reg = <0x1 0x1800000 0x400000>; -- }; -- partition@9 { /* for testing purpose */ -- label = "nand1-rootfs"; -- reg = <0x1 0x1C00000 0x1400000>; -- }; -- partition@10 { /* for testing purpose */ -- label = "nand1-bitstream"; -- reg = <0x1 0x3000000 0x400000>; -- }; -- partition@11 { /* for testing purpose */ -- label = "nand1-misc"; -- reg = <0x1 0x3400000 0xFCC00000>; -+ nand@1 { -+ reg = <0x1>; -+ #address-cells = <0x2>; -+ #size-cells = <0x1>; -+ nand-ecc-mode = "soft"; -+ nand-ecc-algo = "bch"; -+ nand-rb = <0>; -+ label = "main-storage-1"; -+ nand-ecc-step-size = <1024>; -+ nand-ecc-strength = <24>; -+ nand-on-flash-bbt; -+ -+ partition@0 { /* for testing purpose */ -+ label = "nand1-fsbl-uboot"; -+ reg = <0x0 0x0 0x400000>; -+ }; -+ partition@1 { /* for testing purpose */ -+ label = "nand1-linux"; -+ reg = <0x0 0x400000 0x1400000>; -+ }; -+ partition@2 { /* for testing purpose */ -+ label = "nand1-device-tree"; -+ reg = <0x0 0x1800000 0x400000>; -+ }; -+ partition@3 { /* for testing purpose */ -+ label = "nand1-rootfs"; -+ reg = <0x0 0x1C00000 0x1400000>; -+ }; -+ partition@4 { /* for testing purpose */ -+ label = "nand1-bitstream"; -+ reg = <0x0 0x3000000 0x400000>; -+ }; -+ partition@5 { /* for testing purpose */ -+ label = "nand1-misc"; -+ reg = <0x0 0x3400000 0xFCC00000>; -+ }; - }; - }; - -diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts -index eea703ab67..742a539864 100644 ---- a/arch/arm/dts/zynqmp-zcu100-revC.dts -+++ b/arch/arm/dts/zynqmp-zcu100-revC.dts -@@ -95,7 +95,7 @@ - linux,default-trigger = "bluetooth-power"; - }; - -- vbus-det { /* U5 USB5744 VBUS detection via MIO25 */ -+ led-vbus-det { /* U5 USB5744 VBUS detection via MIO25 */ - label = "vbus_det"; - gpios = <&gpio 25 GPIO_ACTIVE_HIGH>; - default-state = "on"; -diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi -index 0a06c73390..6a166381fa 100644 ---- a/arch/arm/dts/zynqmp.dtsi -+++ b/arch/arm/dts/zynqmp.dtsi -@@ -102,7 +102,7 @@ - }; - - zynqmp_ipi: zynqmp_ipi { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "xlnx,zynqmp-ipi-mailbox"; - interrupt-parent = <&gic>; - interrupts = <0 35 4>; -@@ -112,7 +112,7 @@ - ranges; - - ipi_mailbox_pmu1: mailbox@ff990400 { -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x0 0xff9905c0 0x0 0x20>, - <0x0 0xff9905e0 0x0 0x20>, - <0x0 0xff990e80 0x0 0x20>, -@@ -129,7 +129,7 @@ - dcc: dcc { - compatible = "arm,dcc"; - status = "disabled"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pmu { -@@ -147,14 +147,19 @@ - }; - - firmware { -+ optee: optee { -+ compatible = "linaro,optee-tz"; -+ method = "smc"; -+ }; -+ - zynqmp_firmware: zynqmp-firmware { - compatible = "xlnx,zynqmp-firmware"; - #power-domain-cells = <1>; - method = "smc"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - zynqmp_power: zynqmp-power { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "xlnx,zynqmp-power"; - interrupt-parent = <&gic>; - interrupts = <0 35 4>; -@@ -223,7 +228,7 @@ - - amba: axi { - compatible = "simple-bus"; -- u-boot,dm-pre-reloc; -+ bootph-all; - #address-cells = <2>; - #size-cells = <2>; - ranges; -@@ -529,7 +534,7 @@ - }; - - gem0: ethernet@ff0b0000 { -- compatible = "xlnx,zynqmp-gem", "cdns,zynqmp-gem", "cdns,gem"; -+ compatible = "xlnx,zynqmp-gem", "cdns,gem"; - status = "disabled"; - interrupt-parent = <&gic>; - interrupts = <0 57 4>, <0 57 4>; -@@ -544,7 +549,7 @@ - }; - - gem1: ethernet@ff0c0000 { -- compatible = "xlnx,zynqmp-gem", "cdns,zynqmp-gem", "cdns,gem"; -+ compatible = "xlnx,zynqmp-gem", "cdns,gem"; - status = "disabled"; - interrupt-parent = <&gic>; - interrupts = <0 59 4>, <0 59 4>; -@@ -559,7 +564,7 @@ - }; - - gem2: ethernet@ff0d0000 { -- compatible = "xlnx,zynqmp-gem", "cdns,zynqmp-gem", "cdns,gem"; -+ compatible = "xlnx,zynqmp-gem", "cdns,gem"; - status = "disabled"; - interrupt-parent = <&gic>; - interrupts = <0 61 4>, <0 61 4>; -@@ -574,7 +579,7 @@ - }; - - gem3: ethernet@ff0e0000 { -- compatible = "xlnx,zynqmp-gem", "cdns,zynqmp-gem", "cdns,gem"; -+ compatible = "xlnx,zynqmp-gem", "cdns,gem"; - status = "disabled"; - interrupt-parent = <&gic>; - interrupts = <0 63 4>, <0 63 4>; -@@ -669,7 +674,7 @@ - }; - - qspi: spi@ff0f0000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "xlnx,zynqmp-qspi-1.0"; - status = "disabled"; - clock-names = "ref_clk", "pclk"; -@@ -717,7 +722,7 @@ - }; - - sdhci0: mmc@ff160000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; - status = "disabled"; - interrupt-parent = <&gic>; -@@ -732,7 +737,7 @@ - }; - - sdhci1: mmc@ff170000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; - status = "disabled"; - interrupt-parent = <&gic>; -@@ -825,7 +830,7 @@ - }; - - uart0: serial@ff000000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "xlnx,zynqmp-uart", "cdns,uart-r1p12"; - status = "disabled"; - interrupt-parent = <&gic>; -@@ -836,7 +841,7 @@ - }; - - uart1: serial@ff010000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "xlnx,zynqmp-uart", "cdns,uart-r1p12"; - status = "disabled"; - interrupt-parent = <&gic>; -@@ -874,6 +879,7 @@ - snps,enable_guctl1_resume_quirk; - snps,enable_guctl1_ipd_quirk; - snps,xhci-stream-quirk; -+ snps,resume-hs-terminations; - /* dma-coherent; */ - }; - }; -@@ -905,6 +911,7 @@ - snps,enable_guctl1_resume_quirk; - snps,enable_guctl1_ipd_quirk; - snps,xhci-stream-quirk; -+ snps,resume-hs-terminations; - /* dma-coherent; */ - }; - }; -@@ -968,7 +975,7 @@ - }; - - zynqmp_dpsub: display@fd4a0000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "xlnx,zynqmp-dpsub-1.7"; - status = "disabled"; - reg = <0x0 0xfd4a0000 0x0 0x1000>, -diff --git a/arch/arm/include/asm/arch-imx8m/clock.h b/arch/arm/include/asm/arch-imx8m/clock.h -index e4433763bc..a861cd6db3 100644 ---- a/arch/arm/include/asm/arch-imx8m/clock.h -+++ b/arch/arm/include/asm/arch-imx8m/clock.h -@@ -276,5 +276,4 @@ int set_clk_qspi(void); - void enable_ocotp_clk(unsigned char enable); - int enable_i2c_clk(unsigned char enable, unsigned int i2c_num); - int set_clk_enet(enum enet_freq type); --int set_clk_eqos(enum enet_freq type); - void hab_caam_clock_enable(unsigned char enable); -diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h -index 1559bf6d21..6e2fc82a0e 100644 ---- a/arch/arm/include/asm/arch-imx8m/imx-regs.h -+++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h -@@ -89,7 +89,15 @@ - #define DDRC_IPS_BASE_ADDR(X) (0x3d400000 + ((X) * 0x2000000)) - #define DDR_CSD1_BASE_ADDR 0x40000000 - --#define IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MASK 0x70000 -+#define IOMUXC_GPR_GPR1_GPR_ENET1_RGMII_EN BIT(22) -+#define IOMUXC_GPR_GPR1_GPR_ENET_QOS_RGMII_EN BIT(21) -+#define IOMUXC_GPR_GPR1_GPR_ENET_QOS_CLK_TX_CLK_SEL BIT(20) -+#define IOMUXC_GPR_GPR1_GPR_ENET_QOS_CLK_GEN_EN BIT(19) -+#define IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MASK GENMASK(18, 16) -+#define IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MII (0 << 16) -+#define IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_RGMII (1 << 16) -+#define IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_RMII (4 << 16) -+#define IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL BIT(13) - #define FEC_QUIRK_ENET_MAC - - #ifdef CONFIG_ARMV8_PSCI /* Final jump location */ -diff --git a/arch/arm/include/asm/arch-imx8ulp/imx-regs.h b/arch/arm/include/asm/arch-imx8ulp/imx-regs.h -index 723bab584c..a038cc1df3 100644 ---- a/arch/arm/include/asm/arch-imx8ulp/imx-regs.h -+++ b/arch/arm/include/asm/arch-imx8ulp/imx-regs.h -@@ -10,6 +10,7 @@ - #include - #include - -+#define SRAM0_BASE 0x22010000 - #define PBRIDGE0_BASE 0x28000000 - - #define CMC0_RBASE 0x28025000 -@@ -62,6 +63,8 @@ - - #define FEC_QUIRK_ENET_MAC - -+#define IMG_CONTAINER_BASE (0x22010000UL) -+ - #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) - #include - -diff --git a/arch/arm/include/asm/arch-imx8ulp/rdc.h b/arch/arm/include/asm/arch-imx8ulp/rdc.h -index 97463756b0..5d555c498d 100644 ---- a/arch/arm/include/asm/arch-imx8ulp/rdc.h -+++ b/arch/arm/include/asm/arch-imx8ulp/rdc.h -@@ -23,5 +23,6 @@ int trdc_mrc_region_set_access(u32 mrc_x, u32 dom_x, u32 addr_start, u32 addr_en - - void xrdc_init_mda(void); - void xrdc_init_mrc(void); -+void xrdc_init_pdac_msc(void); - - #endif -diff --git a/arch/arm/include/asm/arch-imx8ulp/sys_proto.h b/arch/arm/include/asm/arch-imx8ulp/sys_proto.h -index a7869fbb57..5bbae21e37 100644 ---- a/arch/arm/include/asm/arch-imx8ulp/sys_proto.h -+++ b/arch/arm/include/asm/arch-imx8ulp/sys_proto.h -@@ -14,5 +14,7 @@ int xrdc_config_pdac_openacc(u32 bridge, u32 index); - void set_lpav_qos(void); - void load_lposc_fuse(void); - bool m33_image_booted(void); -+bool is_m33_handshake_necessary(void); - int m33_image_handshake(ulong timeout_ms); -+int imx8ulp_dm_post_init(void); - #endif -diff --git a/arch/arm/include/asm/arch-imx9/imx-regs.h b/arch/arm/include/asm/arch-imx9/imx-regs.h -index f575805c7d..065fd1f96d 100644 ---- a/arch/arm/include/asm/arch-imx9/imx-regs.h -+++ b/arch/arm/include/asm/arch-imx9/imx-regs.h -@@ -40,6 +40,8 @@ - #define SRC_MIX_SLICE_FUNC_STAT_ISO_STAT BIT(4) - #define SRC_MIX_SLICE_FUNC_STAT_MEM_STAT BIT(12) - -+#define IMG_CONTAINER_BASE (0x80000000UL) -+ - #define BCTRL_GPR_ENET_QOS_INTF_MODE_MASK GENMASK(3, 1) - #define BCTRL_GPR_ENET_QOS_INTF_SEL_MII (0x0 << 1) - #define BCTRL_GPR_ENET_QOS_INTF_SEL_RMII (0x4 << 1) -diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h -index 90e66c7da0..f01c5aeb71 100644 ---- a/arch/arm/include/asm/arch-rockchip/clock.h -+++ b/arch/arm/include/asm/arch-rockchip/clock.h -@@ -194,6 +194,26 @@ int rockchip_get_clk(struct udevice **devp); - * Return: 0 success, or error value - */ - int rockchip_reset_bind(struct udevice *pdev, u32 reg_offset, u32 reg_number); --int rockchip_get_scmi_clk(struct udevice **devp); -+/* -+ * rockchip_reset_bind_lut() - Bind soft reset device as child of clock device -+ * using a dedicated SoC lookup table -+ * @pdev: clock udevice -+ * @lookup_table: register lookup_table dedicated to SoC -+ * @reg_offset: the first offset in cru for softreset registers -+ * @reg_number: the reg numbers of softreset registers -+ * Return: 0 success, or error value -+ */ -+int rockchip_reset_bind_lut(struct udevice *pdev, const int *lookup_table, -+ u32 reg_offset, u32 reg_number); -+/* -+ * rk3588_reset_bind_lut() - Bind soft reset device as child of clock device -+ * using dedicated RK3588 lookup table -+ * -+ * @pdev: clock udevice -+ * @reg_offset: the first offset in cru for softreset registers -+ * @reg_number: the reg numbers of softreset registers -+ * Return: 0 success, or error value -+ */ -+int rk3588_reset_bind_lut(struct udevice *pdev, u32 reg_offset, u32 reg_number); - - #endif -diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3588.h b/arch/arm/include/asm/arch-rockchip/cru_rk3588.h -index 3ea59e9008..7f4a908539 100644 ---- a/arch/arm/include/asm/arch-rockchip/cru_rk3588.h -+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3588.h -@@ -11,12 +11,12 @@ - #define KHz 1000 - #define OSC_HZ (24 * MHz) - --#define CPU_PVTPLL_HZ (1008 * MHz) - #define LPLL_HZ (816 * MHz) - #define GPLL_HZ (1188 * MHz) - #define CPLL_HZ (1500 * MHz) - #define NPLL_HZ (850 * MHz) - #define PPLL_HZ (1100 * MHz) -+#define SPLL_HZ (702 * MHz) - - /* RK3588 pll id */ - enum rk3588_pll_id { -@@ -447,5 +447,22 @@ enum { - CLK_I2C0_SEL_MASK = 1 << CLK_I2C0_SEL_SHIFT, - CLK_I2C_SEL_200M = 0, - CLK_I2C_SEL_100M, -+ -+ /* SECURECRU_CLKSEL_CON01 */ -+ SCMI_HCLK_SD_SEL_SHIFT = 2, -+ SCMI_HCLK_SD_SEL_MASK = 3 << SCMI_HCLK_SD_SEL_SHIFT, -+ SCMI_HCLK_SD_SEL_150M = 0, -+ SCMI_HCLK_SD_SEL_100M, -+ SCMI_HCLK_SD_SEL_50M, -+ SCMI_HCLK_SD_SEL_24M, -+ -+ /* SECURECRU_CLKSEL_CON03 */ -+ SCMI_CCLK_SD_SEL_SHIFT = 12, -+ SCMI_CCLK_SD_SEL_MASK = 3 << SCMI_CCLK_SD_SEL_SHIFT, -+ SCMI_CCLK_SD_SEL_GPLL = 0, -+ SCMI_CCLK_SD_SEL_SPLL, -+ SCMI_CCLK_SD_SEL_24M, -+ SCMI_CCLK_SD_DIV_SHIFT = 6, -+ SCMI_CCLK_SD_DIV_MASK = 0x3f << SCMI_CCLK_SD_DIV_SHIFT, - }; - #endif -diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h -index 9e746e380a..86987838f4 100644 ---- a/arch/arm/include/asm/global_data.h -+++ b/arch/arm/include/asm/global_data.h -@@ -97,6 +97,9 @@ struct arch_global_data { - u32 uid[4]; - #endif - -+#ifdef CONFIG_ARCH_IMX8ULP -+ bool m33_handshake_done; -+#endif - }; - - #include -diff --git a/arch/arm/include/asm/mach-imx/s400_api.h b/arch/arm/include/asm/mach-imx/s400_api.h -index 89fa373d06..5582ff1a25 100644 ---- a/arch/arm/include/asm/mach-imx/s400_api.h -+++ b/arch/arm/include/asm/mach-imx/s400_api.h -@@ -10,19 +10,104 @@ - #define AHAB_CMD_TAG 0x17 - #define AHAB_RESP_TAG 0xe1 - --#define AHAB_LOG_CID 0x21 --#define AHAB_AUTH_OEM_CTNR_CID 0x87 --#define AHAB_VERIFY_IMG_CID 0x88 --#define AHAB_RELEASE_CTNR_CID 0x89 --#define AHAB_WRITE_SECURE_FUSE_REQ_CID 0x91 --#define AHAB_FWD_LIFECYCLE_UP_REQ_CID 0x95 --#define AHAB_READ_FUSE_REQ_CID 0x97 --#define AHAB_GET_FW_VERSION_CID 0x9D --#define AHAB_RELEASE_RDC_REQ_CID 0xC4 --#define AHAB_GET_FW_STATUS_CID 0xC5 --#define AHAB_WRITE_FUSE_REQ_CID 0xD6 --#define AHAB_CAAM_RELEASE_CID 0xD7 --#define AHAB_GET_INFO_CID 0xDA -+/* ELE commands */ -+#define ELE_PING_REQ (0x01) -+#define ELE_FW_AUTH_REQ (0x02) -+#define ELE_RESTART_RST_TIMER_REQ (0x04) -+#define ELE_DUMP_DEBUG_BUFFER_REQ (0x21) -+#define ELE_OEM_CNTN_AUTH_REQ (0x87) -+#define ELE_VERIFY_IMAGE_REQ (0x88) -+#define ELE_RELEASE_CONTAINER_REQ (0x89) -+#define ELE_WRITE_SECURE_FUSE_REQ (0x91) -+#define ELE_FWD_LIFECYCLE_UP_REQ (0x95) -+#define ELE_READ_FUSE_REQ (0x97) -+#define ELE_GET_FW_VERSION_REQ (0x9D) -+#define ELE_RET_LIFECYCLE_UP_REQ (0xA0) -+#define ELE_GET_EVENTS_REQ (0xA2) -+#define ELE_ENABLE_PATCH_REQ (0xC3) -+#define ELE_RELEASE_RDC_REQ (0xC4) -+#define ELE_GET_FW_STATUS_REQ (0xC5) -+#define ELE_ENABLE_OTFAD_REQ (0xC6) -+#define ELE_RESET_REQ (0xC7) -+#define ELE_UPDATE_OTP_CLKDIV_REQ (0xD0) -+#define ELE_POWER_DOWN_REQ (0xD1) -+#define ELE_ENABLE_APC_REQ (0xD2) -+#define ELE_ENABLE_RTC_REQ (0xD3) -+#define ELE_DEEP_POWER_DOWN_REQ (0xD4) -+#define ELE_STOP_RST_TIMER_REQ (0xD5) -+#define ELE_WRITE_FUSE_REQ (0xD6) -+#define ELE_RELEASE_CAAM_REQ (0xD7) -+#define ELE_RESET_A35_CTX_REQ (0xD8) -+#define ELE_MOVE_TO_UNSECURED_REQ (0xD9) -+#define ELE_GET_INFO_REQ (0xDA) -+#define ELE_ATTEST_REQ (0xDB) -+#define ELE_RELEASE_PATCH_REQ (0xDC) -+#define ELE_OTP_SEQ_SWITH_REQ (0xDD) -+ -+/* ELE failure indications */ -+#define ELE_ROM_PING_FAILURE_IND (0x0A) -+#define ELE_FW_PING_FAILURE_IND (0x1A) -+#define ELE_BAD_SIGNATURE_FAILURE_IND (0xF0) -+#define ELE_BAD_HASH_FAILURE_IND (0xF1) -+#define ELE_INVALID_LIFECYCLE_IND (0xF2) -+#define ELE_PERMISSION_DENIED_FAILURE_IND (0xF3) -+#define ELE_INVALID_MESSAGE_FAILURE_IND (0xF4) -+#define ELE_BAD_VALUE_FAILURE_IND (0xF5) -+#define ELE_BAD_FUSE_ID_FAILURE_IND (0xF6) -+#define ELE_BAD_CONTAINER_FAILURE_IND (0xF7) -+#define ELE_BAD_VERSION_FAILURE_IND (0xF8) -+#define ELE_INVALID_KEY_FAILURE_IND (0xF9) -+#define ELE_BAD_KEY_HASH_FAILURE_IND (0xFA) -+#define ELE_NO_VALID_CONTAINER_FAILURE_IND (0xFB) -+#define ELE_BAD_CERTIFICATE_FAILURE_IND (0xFC) -+#define ELE_BAD_UID_FAILURE_IND (0xFD) -+#define ELE_BAD_MONOTONIC_COUNTER_FAILURE_IND (0xFE) -+#define ELE_MUST_SIGNED_FAILURE_IND (0xE0) -+#define ELE_NO_AUTHENTICATION_FAILURE_IND (0xEE) -+#define ELE_BAD_SRK_SET_FAILURE_IND (0xEF) -+#define ELE_UNALIGNED_PAYLOAD_FAILURE_IND (0xA6) -+#define ELE_WRONG_SIZE_FAILURE_IND (0xA7) -+#define ELE_ENCRYPTION_FAILURE_IND (0xA8) -+#define ELE_DECRYPTION_FAILURE_IND (0xA9) -+#define ELE_OTP_PROGFAIL_FAILURE_IND (0xAA) -+#define ELE_OTP_LOCKED_FAILURE_IND (0xAB) -+#define ELE_OTP_INVALID_IDX_FAILURE_IND (0xAD) -+#define ELE_TIME_OUT_FAILURE_IND (0xB0) -+#define ELE_BAD_PAYLOAD_FAILURE_IND (0xB1) -+#define ELE_WRONG_ADDRESS_FAILURE_IND (0xB4) -+#define ELE_DMA_FAILURE_IND (0xB5) -+#define ELE_DISABLED_FEATURE_FAILURE_IND (0xB6) -+#define ELE_MUST_ATTEST_FAILURE_IND (0xB7) -+#define ELE_RNG_NOT_STARTED_FAILURE_IND (0xB8) -+#define ELE_CRC_ERROR_IND (0xB9) -+#define ELE_AUTH_SKIPPED_OR_FAILED_FAILURE_IND (0xBB) -+#define ELE_INCONSISTENT_PAR_FAILURE_IND (0xBC) -+#define ELE_RNG_INST_FAILURE_FAILURE_IND (0xBD) -+#define ELE_LOCKED_REG_FAILURE_IND (0xBE) -+#define ELE_BAD_ID_FAILURE_IND (0xBF) -+#define ELE_INVALID_OPERATION_FAILURE_IND (0xC0) -+#define ELE_NON_SECURE_STATE_FAILURE_IND (0xC1) -+#define ELE_MSG_TRUNCATED_IND (0xC2) -+#define ELE_BAD_IMAGE_NUM_FAILURE_IND (0xC3) -+#define ELE_BAD_IMAGE_ADDR_FAILURE_IND (0xC4) -+#define ELE_BAD_IMAGE_PARAM_FAILURE_IND (0xC5) -+#define ELE_BAD_IMAGE_TYPE_FAILURE_IND (0xC6) -+#define ELE_CORRUPTED_SRK_FAILURE_IND (0xD0) -+#define ELE_OUT_OF_MEMORY_IND (0xD1) -+#define ELE_CSTM_FAILURE_IND (0xCF) -+#define ELE_OLD_VERSION_FAILURE_IND (0xCE) -+#define ELE_WRONG_BOOT_MODE_FAILURE_IND (0xCD) -+#define ELE_APC_ALREADY_ENABLED_FAILURE_IND (0xCB) -+#define ELE_RTC_ALREADY_ENABLED_FAILURE_IND (0xCC) -+#define ELE_ABORT_IND (0xFF) -+ -+/* ELE IPC identifier */ -+#define ELE_IPC_MU_RTD (0x1) -+#define ELE_IPC_MU_APD (0x2) -+ -+/* ELE Status*/ -+#define ELE_SUCCESS_IND (0xD6) -+#define ELE_FAILURE_IND (0x29) - - #define S400_MAX_MSG 255U - -@@ -41,6 +126,8 @@ struct sentinel_get_info_data { - u32 uid[4]; - u32 sha256_rom_patch[8]; - u32 sha_fw[8]; -+ u32 oem_srkh[16]; -+ u32 state; - }; - - int ahab_release_rdc(u8 core_id, u8 xrdc, u32 *response); -@@ -56,5 +143,6 @@ int ahab_dump_buffer(u32 *buffer, u32 buffer_length); - int ahab_get_info(struct sentinel_get_info_data *info, u32 *response); - int ahab_get_fw_status(u32 *status, u32 *response); - int ahab_release_m33_trout(void); -+int ahab_get_events(u32 *events, u32 *events_cnt, u32 *response); - - #endif -diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h -index 27fdc16cd5..2eacddb51f 100644 ---- a/arch/arm/include/asm/mach-imx/sys_proto.h -+++ b/arch/arm/include/asm/mach-imx/sys_proto.h -@@ -172,6 +172,13 @@ enum boot_dev_type_e { - BT_DEV_TYPE_INVALID = 0xFF - }; - -+enum boot_stage_type { -+ BT_STAGE_PRIMARY = 0x6, -+ BT_STAGE_SECONDARY = 0x9, -+ BT_STAGE_RECOVERY = 0xa, -+ BT_STAGE_USB = 0x5, -+}; -+ - #define QUERY_ROM_VER 1 - #define QUERY_BT_DEV 2 - #define QUERY_PAGE_SZ 3 -diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c -index 1a589c7e2a..7a16015867 100644 ---- a/arch/arm/lib/cache.c -+++ b/arch/arm/lib/cache.c -@@ -159,6 +159,15 @@ __weak int arm_reserve_mmu(void) - */ - gd->arch.tlb_allocated = gd->arch.tlb_addr; - #endif -+ -+ if (IS_ENABLED(CONFIG_CMO_BY_VA_ONLY)) { -+ /* -+ * As invalidate_dcache_all() will be called before -+ * mmu_setup(), we should make sure that the PTs are -+ * already in a valid state. -+ */ -+ memset((void *)gd->arch.tlb_addr, 0, gd->arch.tlb_size); -+ } - #endif - - return 0; -diff --git a/arch/arm/lib/semihosting.S b/arch/arm/lib/semihosting.S -new file mode 100644 -index 0000000000..393aade94a ---- /dev/null -+++ b/arch/arm/lib/semihosting.S -@@ -0,0 +1,31 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * (C) 2022 Arm Ltd. -+ */ -+ -+#include -+#include -+#include -+ -+.pushsection .text.smh_trap, "ax" -+/* long smh_trap(unsigned int sysnum, void *addr); */ -+ENTRY(smh_trap) -+ -+#if defined(CONFIG_ARM64) -+ hlt #0xf000 -+#elif defined(CONFIG_CPU_V7M) -+ bkpt #0xab -+#elif defined(CONFIG_SYS_THUMB_BUILD) -+ svc #0xab -+#else -+ svc #0x123456 -+#endif -+ -+#if defined(CONFIG_ARM64) -+ ret -+#else -+ bx lr -+#endif -+ -+ENDPROC(smh_trap) -+.popsection -diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c -deleted file mode 100644 -index 7b7669bed0..0000000000 ---- a/arch/arm/lib/semihosting.c -+++ /dev/null -@@ -1,47 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0+ --/* -- * Copyright (C) 2022 Sean Anderson -- * Copyright 2014 Broadcom Corporation -- */ -- --#include -- --/* -- * Macro to force the compiler to *populate* memory (for an array or struct) -- * before passing the pointer to an inline assembly call. -- */ --#define USE_PTR(ptr) *(const char (*)[]) (ptr) -- --#if defined(CONFIG_ARM64) -- #define SMH_TRAP "hlt #0xf000" --#elif defined(CONFIG_CPU_V7M) -- #define SMH_TRAP "bkpt #0xAB" --#elif defined(CONFIG_SYS_THUMB_BUILD) -- #define SMH_TRAP "svc #0xab" --#else -- #define SMH_TRAP "svc #0x123456" --#endif -- --/* -- * Call the handler -- */ --long smh_trap(unsigned int sysnum, void *addr) --{ -- register long result asm("r0"); -- register void *_addr asm("r1") = addr; -- -- /* -- * We need a memory clobber (aka compiler barrier) for two reasons: -- * - The compiler needs to populate any data structures pointed to -- * by "addr" *before* the trap instruction is called. -- * - At least the SYSREAD function puts the result into memory pointed -- * to by "addr", so the compiler must not use a cached version of -- * the previous content, after the call has finished. -- */ -- asm volatile (SMH_TRAP -- : "=r" (result) -- : "0"(sysnum), "r"(USE_PTR(_addr)) -- : "memory"); -- -- return result; --} -diff --git a/arch/arm/mach-hpe/gxp/reset.c b/arch/arm/mach-hpe/gxp/reset.c -index ce018a35d9..a147bcac18 100644 ---- a/arch/arm/mach-hpe/gxp/reset.c -+++ b/arch/arm/mach-hpe/gxp/reset.c -@@ -7,6 +7,7 @@ - * Author: Jean-Marie Verdun - */ - -+#include - #include - - #define GXP_CCR 0xc0000000 -@@ -16,7 +17,7 @@ void lowlevel_init(void) - { - } - --void reset_cpu(ulong ignored) -+void reset_cpu(void) - { - writel(1, GXP_CCR); - -diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile -index 4dfc60eedc..9bcb23c4da 100644 ---- a/arch/arm/mach-imx/Makefile -+++ b/arch/arm/mach-imx/Makefile -@@ -77,6 +77,10 @@ ifeq ($(CONFIG_SPL_BUILD),y) - obj-$(CONFIG_SPL_LOAD_IMX_CONTAINER) += image-container.o parse-container.o - endif - -+ifeq ($(SOC),$(filter $(SOC),imx8ulp imx9)) -+obj-$(CONFIG_AHAB_BOOT) += ele_ahab.o -+endif -+ - PLUGIN = board/$(BOARDDIR)/plugin - - ifeq ($(CONFIG_USE_IMXIMG_PLUGIN),y) -diff --git a/arch/arm/mach-imx/ele_ahab.c b/arch/arm/mach-imx/ele_ahab.c -new file mode 100644 -index 0000000000..99fc540271 ---- /dev/null -+++ b/arch/arm/mach-imx/ele_ahab.c -@@ -0,0 +1,586 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright 2022 NXP -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+#define IMG_CONTAINER_END_BASE (IMG_CONTAINER_BASE + 0xFFFFUL) -+ -+#define AHAB_MAX_EVENTS 8 -+ -+static char *ele_ipc_str[] = { -+ "IPC = MU RTD (0x1)\n", -+ "IPC = MU APD (0x2)\n", -+ "IPC = INVALID\n", -+ NULL -+}; -+ -+static char *ele_status_str[] = { -+ "STA = ELE_SUCCESS_IND (0xD6)\n", -+ "STA = ELE_FAILURE_IND (0x29)\n", -+ "STA = INVALID\n", -+ NULL -+}; -+ -+static char *ele_cmd_str[] = { -+ "CMD = ELE_PING_REQ (0x01)\n", -+ "CMD = ELE_FW_AUTH_REQ (0x02)\n", -+ "CMD = ELE_RESTART_RST_TIMER_REQ (0x04)\n", -+ "CMD = ELE_DUMP_DEBUG_BUFFER_REQ (0x21)\n", -+ "CMD = ELE_OEM_CNTN_AUTH_REQ (0x87)\n", -+ "CMD = ELE_VERIFY_IMAGE_REQ (0x88)\n", -+ "CMD = ELE_RELEASE_CONTAINER_REQ (0x89)\n", -+ "CMD = ELE_WRITE_SECURE_FUSE_REQ (0x91)\n", -+ "CMD = ELE_FWD_LIFECYCLE_UP_REQ (0x95)\n", -+ "CMD = ELE_READ_FUSE_REQ (0x97)\n", -+ "CMD = ELE_GET_FW_VERSION_REQ (0x9D)\n", -+ "CMD = ELE_RET_LIFECYCLE_UP_REQ (0xA0)\n", -+ "CMD = ELE_GET_EVENTS_REQ (0xA2)\n", -+ "CMD = ELE_ENABLE_PATCH_REQ (0xC3)\n", -+ "CMD = ELE_RELEASE_RDC_REQ (0xC4)\n", -+ "CMD = ELE_GET_FW_STATUS_REQ (0xC5)\n", -+ "CMD = ELE_ENABLE_OTFAD_REQ (0xC6)\n", -+ "CMD = ELE_RESET_REQ (0xC7)\n", -+ "CMD = ELE_UPDATE_OTP_CLKDIV_REQ (0xD0)\n", -+ "CMD = ELE_POWER_DOWN_REQ (0xD1)\n", -+ "CMD = ELE_ENABLE_APC_REQ (0xD2)\n", -+ "CMD = ELE_ENABLE_RTC_REQ (0xD3)\n", -+ "CMD = ELE_DEEP_POWER_DOWN_REQ (0xD4)\n", -+ "CMD = ELE_STOP_RST_TIMER_REQ (0xD5)\n", -+ "CMD = ELE_WRITE_FUSE_REQ (0xD6)\n", -+ "CMD = ELE_RELEASE_CAAM_REQ (0xD7)\n", -+ "CMD = ELE_RESET_A35_CTX_REQ (0xD8)\n", -+ "CMD = ELE_MOVE_TO_UNSECURED_REQ (0xD9)\n", -+ "CMD = ELE_GET_INFO_REQ (0xDA)\n", -+ "CMD = ELE_ATTEST_REQ (0xDB)\n", -+ "CMD = ELE_RELEASE_PATCH_REQ (0xDC)\n", -+ "CMD = ELE_OTP_SEQ_SWITH_REQ (0xDD)\n", -+ "CMD = INVALID\n", -+ NULL -+}; -+ -+static char *ele_ind_str[] = { -+ "IND = ELE_ROM_PING_FAILURE_IND (0x0A)\n", -+ "IND = ELE_FW_PING_FAILURE_IND (0x1A)\n", -+ "IND = ELE_BAD_SIGNATURE_FAILURE_IND (0xF0)\n", -+ "IND = ELE_BAD_HASH_FAILURE_IND (0xF1)\n", -+ "IND = ELE_INVALID_LIFECYCLE_IND (0xF2)\n", -+ "IND = ELE_PERMISSION_DENIED_FAILURE_IND (0xF3)\n", -+ "IND = ELE_INVALID_MESSAGE_FAILURE_IND (0xF4)\n", -+ "IND = ELE_BAD_VALUE_FAILURE_IND (0xF5)\n", -+ "IND = ELE_BAD_FUSE_ID_FAILURE_IND (0xF6)\n", -+ "IND = ELE_BAD_CONTAINER_FAILURE_IND (0xF7)\n", -+ "IND = ELE_BAD_VERSION_FAILURE_IND (0xF8)\n", -+ "IND = ELE_INVALID_KEY_FAILURE_IND (0xF9)\n", -+ "IND = ELE_BAD_KEY_HASH_FAILURE_IND (0xFA)\n", -+ "IND = ELE_NO_VALID_CONTAINER_FAILURE_IND (0xFB)\n", -+ "IND = ELE_BAD_CERTIFICATE_FAILURE_IND (0xFC)\n", -+ "IND = ELE_BAD_UID_FAILURE_IND (0xFD)\n", -+ "IND = ELE_BAD_MONOTONIC_COUNTER_FAILURE_IND (0xFE)\n", -+ "IND = ELE_MUST_SIGNED_FAILURE_IND (0xE0)\n", -+ "IND = ELE_NO_AUTHENTICATION_FAILURE_IND (0xEE)\n", -+ "IND = ELE_BAD_SRK_SET_FAILURE_IND (0xEF)\n", -+ "IND = ELE_UNALIGNED_PAYLOAD_FAILURE_IND (0xA6)\n", -+ "IND = ELE_WRONG_SIZE_FAILURE_IND (0xA7)\n", -+ "IND = ELE_ENCRYPTION_FAILURE_IND (0xA8)\n", -+ "IND = ELE_DECRYPTION_FAILURE_IND (0xA9)\n", -+ "IND = ELE_OTP_PROGFAIL_FAILURE_IND (0xAA)\n", -+ "IND = ELE_OTP_LOCKED_FAILURE_IND (0xAB)\n", -+ "IND = ELE_OTP_INVALID_IDX_FAILURE_IND (0xAD)\n", -+ "IND = ELE_TIME_OUT_FAILURE_IND (0xB0)\n", -+ "IND = ELE_BAD_PAYLOAD_FAILURE_IND (0xB1)\n", -+ "IND = ELE_WRONG_ADDRESS_FAILURE_IND (0xB4)\n", -+ "IND = ELE_DMA_FAILURE_IND (0xB5)\n", -+ "IND = ELE_DISABLED_FEATURE_FAILURE_IND (0xB6)\n", -+ "IND = ELE_MUST_ATTEST_FAILURE_IND (0xB7)\n", -+ "IND = ELE_RNG_NOT_STARTED_FAILURE_IND (0xB8)\n", -+ "IND = ELE_CRC_ERROR_IND (0xB9)\n", -+ "IND = ELE_AUTH_SKIPPED_OR_FAILED_FAILURE_IND (0xBB)\n", -+ "IND = ELE_INCONSISTENT_PAR_FAILURE_IND (0xBC)\n", -+ "IND = ELE_RNG_INST_FAILURE_FAILURE_IND (0xBD)\n", -+ "IND = ELE_LOCKED_REG_FAILURE_IND (0xBE)\n", -+ "IND = ELE_BAD_ID_FAILURE_IND (0xBF)\n", -+ "IND = ELE_INVALID_OPERATION_FAILURE_IND (0xC0)\n", -+ "IND = ELE_NON_SECURE_STATE_FAILURE_IND (0xC1)\n", -+ "IND = ELE_MSG_TRUNCATED_IND (0xC2)\n", -+ "IND = ELE_BAD_IMAGE_NUM_FAILURE_IND (0xC3)\n", -+ "IND = ELE_BAD_IMAGE_ADDR_FAILURE_IND (0xC4)\n", -+ "IND = ELE_BAD_IMAGE_PARAM_FAILURE_IND (0xC5)\n", -+ "IND = ELE_BAD_IMAGE_TYPE_FAILURE_IND (0xC6)\n", -+ "IND = ELE_CORRUPTED_SRK_FAILURE_IND (0xD0)\n", -+ "IND = ELE_OUT_OF_MEMORY_IND (0xD1)\n", -+ "IND = ELE_CSTM_FAILURE_IND (0xCF)\n", -+ "IND = ELE_OLD_VERSION_FAILURE_IND (0xCE)\n", -+ "IND = ELE_WRONG_BOOT_MODE_FAILURE_IND (0xCD)\n", -+ "IND = ELE_APC_ALREADY_ENABLED_FAILURE_IND (0xCB)\n", -+ "IND = ELE_RTC_ALREADY_ENABLED_FAILURE_IND (0xCC)\n", -+ "IND = ELE_ABORT_IND (0xFF)\n", -+ "IND = INVALID\n", -+ NULL -+}; -+ -+static u8 ele_cmd[] = { -+ ELE_PING_REQ, -+ ELE_FW_AUTH_REQ, -+ ELE_RESTART_RST_TIMER_REQ, -+ ELE_DUMP_DEBUG_BUFFER_REQ, -+ ELE_OEM_CNTN_AUTH_REQ, -+ ELE_VERIFY_IMAGE_REQ, -+ ELE_RELEASE_CONTAINER_REQ, -+ ELE_WRITE_SECURE_FUSE_REQ, -+ ELE_FWD_LIFECYCLE_UP_REQ, -+ ELE_READ_FUSE_REQ, -+ ELE_GET_FW_VERSION_REQ, -+ ELE_RET_LIFECYCLE_UP_REQ, -+ ELE_GET_EVENTS_REQ, -+ ELE_ENABLE_PATCH_REQ, -+ ELE_RELEASE_RDC_REQ, -+ ELE_GET_FW_STATUS_REQ, -+ ELE_ENABLE_OTFAD_REQ, -+ ELE_RESET_REQ, -+ ELE_UPDATE_OTP_CLKDIV_REQ, -+ ELE_POWER_DOWN_REQ, -+ ELE_ENABLE_APC_REQ, -+ ELE_ENABLE_RTC_REQ, -+ ELE_DEEP_POWER_DOWN_REQ, -+ ELE_STOP_RST_TIMER_REQ, -+ ELE_WRITE_FUSE_REQ, -+ ELE_RELEASE_CAAM_REQ, -+ ELE_RESET_A35_CTX_REQ, -+ ELE_MOVE_TO_UNSECURED_REQ, -+ ELE_GET_INFO_REQ, -+ ELE_ATTEST_REQ, -+ ELE_RELEASE_PATCH_REQ, -+ ELE_OTP_SEQ_SWITH_REQ -+}; -+ -+static u8 ele_ind[] = { -+ ELE_ROM_PING_FAILURE_IND, -+ ELE_FW_PING_FAILURE_IND, -+ ELE_BAD_SIGNATURE_FAILURE_IND, -+ ELE_BAD_HASH_FAILURE_IND, -+ ELE_INVALID_LIFECYCLE_IND, -+ ELE_PERMISSION_DENIED_FAILURE_IND, -+ ELE_INVALID_MESSAGE_FAILURE_IND, -+ ELE_BAD_VALUE_FAILURE_IND, -+ ELE_BAD_FUSE_ID_FAILURE_IND, -+ ELE_BAD_CONTAINER_FAILURE_IND, -+ ELE_BAD_VERSION_FAILURE_IND, -+ ELE_INVALID_KEY_FAILURE_IND, -+ ELE_BAD_KEY_HASH_FAILURE_IND, -+ ELE_NO_VALID_CONTAINER_FAILURE_IND, -+ ELE_BAD_CERTIFICATE_FAILURE_IND, -+ ELE_BAD_UID_FAILURE_IND, -+ ELE_BAD_MONOTONIC_COUNTER_FAILURE_IND, -+ ELE_MUST_SIGNED_FAILURE_IND, -+ ELE_NO_AUTHENTICATION_FAILURE_IND, -+ ELE_BAD_SRK_SET_FAILURE_IND, -+ ELE_UNALIGNED_PAYLOAD_FAILURE_IND, -+ ELE_WRONG_SIZE_FAILURE_IND, -+ ELE_ENCRYPTION_FAILURE_IND, -+ ELE_DECRYPTION_FAILURE_IND, -+ ELE_OTP_PROGFAIL_FAILURE_IND, -+ ELE_OTP_LOCKED_FAILURE_IND, -+ ELE_OTP_INVALID_IDX_FAILURE_IND, -+ ELE_TIME_OUT_FAILURE_IND, -+ ELE_BAD_PAYLOAD_FAILURE_IND, -+ ELE_WRONG_ADDRESS_FAILURE_IND, -+ ELE_DMA_FAILURE_IND, -+ ELE_DISABLED_FEATURE_FAILURE_IND, -+ ELE_MUST_ATTEST_FAILURE_IND, -+ ELE_RNG_NOT_STARTED_FAILURE_IND, -+ ELE_CRC_ERROR_IND, -+ ELE_AUTH_SKIPPED_OR_FAILED_FAILURE_IND, -+ ELE_INCONSISTENT_PAR_FAILURE_IND, -+ ELE_RNG_INST_FAILURE_FAILURE_IND, -+ ELE_LOCKED_REG_FAILURE_IND, -+ ELE_BAD_ID_FAILURE_IND, -+ ELE_INVALID_OPERATION_FAILURE_IND, -+ ELE_NON_SECURE_STATE_FAILURE_IND, -+ ELE_MSG_TRUNCATED_IND, -+ ELE_BAD_IMAGE_NUM_FAILURE_IND, -+ ELE_BAD_IMAGE_ADDR_FAILURE_IND, -+ ELE_BAD_IMAGE_PARAM_FAILURE_IND, -+ ELE_BAD_IMAGE_TYPE_FAILURE_IND, -+ ELE_CORRUPTED_SRK_FAILURE_IND, -+ ELE_OUT_OF_MEMORY_IND, -+ ELE_CSTM_FAILURE_IND, -+ ELE_OLD_VERSION_FAILURE_IND, -+ ELE_WRONG_BOOT_MODE_FAILURE_IND, -+ ELE_APC_ALREADY_ENABLED_FAILURE_IND, -+ ELE_RTC_ALREADY_ENABLED_FAILURE_IND, -+ ELE_ABORT_IND -+}; -+ -+static u8 ele_ipc[] = { -+ ELE_IPC_MU_RTD, -+ ELE_IPC_MU_APD -+}; -+ -+static u8 ele_status[] = { -+ ELE_SUCCESS_IND, -+ ELE_FAILURE_IND -+}; -+ -+static inline u32 get_idx(u8 *list, u8 tgt, u32 size) -+{ -+ u32 i; -+ -+ for (i = 0; i < size; i++) { -+ if (list[i] == tgt) -+ return i; -+ } -+ -+ return i; /* last str is invalid */ -+} -+ -+static void display_ahab_auth_ind(u32 event) -+{ -+ u8 resp_ind = (event >> 8) & 0xff; -+ -+ printf("%s\n", ele_ind_str[get_idx(ele_ind, resp_ind, ARRAY_SIZE(ele_ind))]); -+} -+ -+int ahab_auth_cntr_hdr(struct container_hdr *container, u16 length) -+{ -+ int err; -+ u32 resp; -+ -+ memcpy((void *)IMG_CONTAINER_BASE, (const void *)container, -+ ALIGN(length, CONFIG_SYS_CACHELINE_SIZE)); -+ -+ flush_dcache_range(IMG_CONTAINER_BASE, -+ IMG_CONTAINER_BASE + ALIGN(length, CONFIG_SYS_CACHELINE_SIZE) - 1); -+ -+ err = ahab_auth_oem_ctnr(IMG_CONTAINER_BASE, &resp); -+ if (err) { -+ printf("Authenticate container hdr failed, return %d, resp 0x%x\n", -+ err, resp); -+ display_ahab_auth_ind(resp); -+ } -+ -+ return err; -+} -+ -+int ahab_auth_release(void) -+{ -+ int err; -+ u32 resp; -+ -+ err = ahab_release_container(&resp); -+ if (err) { -+ printf("Error: release container failed, resp 0x%x!\n", resp); -+ display_ahab_auth_ind(resp); -+ } -+ -+ return err; -+} -+ -+int ahab_verify_cntr_image(struct boot_img_t *img, int image_index) -+{ -+ int err; -+ u32 resp; -+ -+ err = ahab_verify_image(image_index, &resp); -+ if (err) { -+ printf("Authenticate img %d failed, return %d, resp 0x%x\n", -+ image_index, err, resp); -+ display_ahab_auth_ind(resp); -+ -+ return -EIO; -+ } -+ -+ return 0; -+} -+ -+static inline bool check_in_dram(ulong addr) -+{ -+ int i; -+ struct bd_info *bd = gd->bd; -+ -+ for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { -+ if (bd->bi_dram[i].size) { -+ if (addr >= bd->bi_dram[i].start && -+ addr < (bd->bi_dram[i].start + bd->bi_dram[i].size)) -+ return true; -+ } -+ } -+ -+ return false; -+} -+ -+int authenticate_os_container(ulong addr) -+{ -+ struct container_hdr *phdr; -+ int i, ret = 0; -+ int err; -+ u16 length; -+ struct boot_img_t *img; -+ unsigned long s, e; -+ -+ if (addr % 4) { -+ puts("Error: Image's address is not 4 byte aligned\n"); -+ return -EINVAL; -+ } -+ -+ if (!check_in_dram(addr)) { -+ puts("Error: Image's address is invalid\n"); -+ return -EINVAL; -+ } -+ -+ phdr = (struct container_hdr *)addr; -+ if (phdr->tag != 0x87 || phdr->version != 0x0) { -+ printf("Error: Wrong container header\n"); -+ return -EFAULT; -+ } -+ -+ if (!phdr->num_images) { -+ printf("Error: Wrong container, no image found\n"); -+ return -EFAULT; -+ } -+ -+ length = phdr->length_lsb + (phdr->length_msb << 8); -+ -+ debug("container length %u\n", length); -+ -+ err = ahab_auth_cntr_hdr(phdr, length); -+ if (err) { -+ ret = -EIO; -+ goto exit; -+ } -+ -+ debug("Verify images\n"); -+ -+ /* Copy images to dest address */ -+ for (i = 0; i < phdr->num_images; i++) { -+ img = (struct boot_img_t *)(addr + -+ sizeof(struct container_hdr) + -+ i * sizeof(struct boot_img_t)); -+ -+ debug("img %d, dst 0x%x, src 0x%lx, size 0x%x\n", -+ i, (uint32_t)img->dst, img->offset + addr, img->size); -+ -+ memcpy((void *)img->dst, (const void *)(img->offset + addr), -+ img->size); -+ -+ s = img->dst & ~(CONFIG_SYS_CACHELINE_SIZE - 1); -+ e = ALIGN(img->dst + img->size, CONFIG_SYS_CACHELINE_SIZE) - 1; -+ -+ flush_dcache_range(s, e); -+ -+ ret = ahab_verify_cntr_image(img, i); -+ if (ret) -+ goto exit; -+ } -+ -+exit: -+ debug("ahab_auth_release, 0x%x\n", ret); -+ ahab_auth_release(); -+ -+ return ret; -+} -+ -+static int do_authenticate(struct cmd_tbl *cmdtp, int flag, int argc, -+ char *const argv[]) -+{ -+ ulong addr; -+ -+ if (argc < 2) -+ return CMD_RET_USAGE; -+ -+ addr = simple_strtoul(argv[1], NULL, 16); -+ -+ printf("Authenticate OS container at 0x%lx\n", addr); -+ -+ if (authenticate_os_container(addr)) -+ return CMD_RET_FAILURE; -+ -+ return CMD_RET_SUCCESS; -+} -+ -+static void display_life_cycle(u32 lc) -+{ -+ printf("Lifecycle: 0x%08X, ", lc); -+ switch (lc) { -+ case 0x1: -+ printf("BLANK\n\n"); -+ break; -+ case 0x2: -+ printf("FAB\n\n"); -+ break; -+ case 0x4: -+ printf("NXP Provisioned\n\n"); -+ break; -+ case 0x8: -+ printf("OEM Open\n\n"); -+ break; -+ case 0x20: -+ printf("OEM closed\n\n"); -+ break; -+ case 0x40: -+ printf("Field Return OEM\n\n"); -+ break; -+ case 0x80: -+ printf("Field Return NXP\n\n"); -+ break; -+ case 0x100: -+ printf("OEM Locked\n\n"); -+ break; -+ case 0x200: -+ printf("BRICKED\n\n"); -+ break; -+ default: -+ printf("Unknown\n\n"); -+ break; -+ } -+} -+ -+static int confirm_close(void) -+{ -+ puts("Warning: Please ensure your sample is in NXP closed state, " -+ "OEM SRK hash has been fused, \n" -+ " and you are able to boot a signed image successfully " -+ "without any SECO events reported.\n" -+ " If not, your sample will be unrecoverable.\n" -+ "\nReally perform this operation? \n"); -+ -+ if (confirm_yesno()) -+ return 1; -+ -+ puts("Ahab close aborted\n"); -+ return 0; -+} -+ -+static int do_ahab_close(struct cmd_tbl *cmdtp, int flag, int argc, -+ char *const argv[]) -+{ -+ int err; -+ u32 resp; -+ u32 lc; -+ -+ if (!confirm_close()) -+ return -EACCES; -+ -+ lc = readl(FSB_BASE_ADDR + 0x41c); -+ lc &= 0x3ff; -+ -+ if (lc != 0x8) { -+ puts("Current lifecycle is NOT OEM open, can't move to OEM closed\n"); -+ display_life_cycle(lc); -+ return -EPERM; -+ } -+ -+ err = ahab_forward_lifecycle(8, &resp); -+ if (err != 0) { -+ printf("Error in forward lifecycle to OEM closed\n"); -+ return -EIO; -+ } -+ -+ printf("Change to OEM closed successfully\n"); -+ -+ return 0; -+} -+ -+int ahab_dump(void) -+{ -+ u32 buffer[32]; -+ int ret, i = 0; -+ -+ do { -+ ret = ahab_dump_buffer(buffer, 32); -+ if (ret < 0) { -+ printf("Error in dump AHAB log\n"); -+ return -EIO; -+ } -+ -+ if (ret == 1) -+ break; -+ for (i = 0; i < ret; i++) -+ printf("0x%x\n", buffer[i]); -+ } while (ret >= 21); -+ -+ return 0; -+} -+ -+static int do_ahab_dump(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -+{ -+ return ahab_dump(); -+} -+ -+static void display_event(u32 event) -+{ -+ printf("\n\t0x%08x\n", event); -+ printf("\t%s", ele_ipc_str[get_idx(ele_ipc, -+ (event >> 24) & 0xFF, ARRAY_SIZE(ele_ipc))]); -+ printf("\t%s", ele_cmd_str[get_idx(ele_cmd, -+ (event >> 16) & 0xFF, ARRAY_SIZE(ele_cmd))]); -+ printf("\t%s", ele_ind_str[get_idx(ele_ind, -+ (event >> 8) & 0xFF, ARRAY_SIZE(ele_ind))]); -+ printf("\t%s", ele_status_str[get_idx(ele_status, -+ event & 0xFF, ARRAY_SIZE(ele_status))]); -+} -+ -+static int do_ahab_status(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -+{ -+ u32 lc, i; -+ u32 events[AHAB_MAX_EVENTS]; -+ u32 cnt = AHAB_MAX_EVENTS; -+ int ret; -+ -+ lc = readl(FSB_BASE_ADDR + 0x41c); -+ lc &= 0x3ff; -+ -+ display_life_cycle(lc); -+ -+ ret = ahab_get_events(events, &cnt, NULL); -+ if (ret) { -+ printf("Get ELE EVENTS error %d\n", ret); -+ return CMD_RET_FAILURE; -+ } -+ -+ if (!cnt) { -+ puts("\n\tNo Events Found!\n"); -+ return 0; -+ } -+ -+ for (i = 0; i < cnt; i++) -+ display_event(events[i]); -+ -+ return 0; -+} -+ -+U_BOOT_CMD(auth_cntr, CONFIG_SYS_MAXARGS, 1, do_authenticate, -+ "autenticate OS container via AHAB", -+ "addr\n" -+ "addr - OS container hex address\n" -+); -+ -+U_BOOT_CMD(ahab_close, CONFIG_SYS_MAXARGS, 1, do_ahab_close, -+ "Change AHAB lifecycle to OEM closed", -+ "" -+); -+ -+U_BOOT_CMD(ahab_dump, CONFIG_SYS_MAXARGS, 1, do_ahab_dump, -+ "Dump AHAB log for debug", -+ "" -+); -+ -+U_BOOT_CMD(ahab_status, CONFIG_SYS_MAXARGS, 1, do_ahab_status, -+ "display AHAB lifecycle only", -+ "" -+); -diff --git a/arch/arm/mach-imx/image-container.c b/arch/arm/mach-imx/image-container.c -index 06ee608c4a..5b059a6429 100644 ---- a/arch/arm/mach-imx/image-container.c -+++ b/arch/arm/mach-imx/image-container.c -@@ -10,6 +10,7 @@ - #include - #include - #include -+#include - #include - #include - #include -diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig -index 37d12d1895..018b87b85b 100644 ---- a/arch/arm/mach-imx/imx8/Kconfig -+++ b/arch/arm/mach-imx/imx8/Kconfig -@@ -51,7 +51,6 @@ config TARGET_APALIS_IMX8 - - config TARGET_COLIBRI_IMX8X - bool "Support Colibri iMX8X module" -- select BINMAN - select BOARD_LATE_INIT - select IMX8QXP - -diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c -index 64ad57e9b3..31c34b6031 100644 ---- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c -+++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c -@@ -15,6 +15,7 @@ - #include - #include - #include -+#include - - DECLARE_GLOBAL_DATA_PTR; - -@@ -36,14 +37,14 @@ void enable_ocotp_clk(unsigned char enable) - - int enable_i2c_clk(unsigned char enable, unsigned i2c_num) - { -- u8 i2c_ccgr[6] = { -+ u8 i2c_ccgr[] = { - CCGR_I2C1, CCGR_I2C2, CCGR_I2C3, CCGR_I2C4, - #if (IS_ENABLED(CONFIG_IMX8MP)) - CCGR_I2C5_8MP, CCGR_I2C6_8MP - #endif - }; - -- if (i2c_num > ARRAY_SIZE(i2c_ccgr)) -+ if (i2c_num >= ARRAY_SIZE(i2c_ccgr)) - return -EINVAL; - - clock_enable(i2c_ccgr[i2c_num], !!enable); -@@ -825,141 +826,108 @@ u32 mxc_get_clock(enum mxc_clock clk) - return 0; - } - --#ifdef CONFIG_DWC_ETH_QOS --int set_clk_eqos(enum enet_freq type) -+#if defined(CONFIG_IMX8MP) && defined(CONFIG_DWC_ETH_QOS) -+static int imx8mp_eqos_interface_init(struct udevice *dev, -+ phy_interface_t interface_type) - { -- u32 target; -- u32 enet1_ref; -- -- switch (type) { -- case ENET_125MHZ: -- enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK; -- break; -- case ENET_50MHZ: -- enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK; -- break; -- case ENET_25MHZ: -- enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_25M_CLK; -+ struct iomuxc_gpr_base_regs *gpr = -+ (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; -+ -+ clrbits_le32(&gpr->gpr[1], -+ IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MASK | -+ IOMUXC_GPR_GPR1_GPR_ENET_QOS_RGMII_EN | -+ IOMUXC_GPR_GPR1_GPR_ENET_QOS_CLK_TX_CLK_SEL | -+ IOMUXC_GPR_GPR1_GPR_ENET_QOS_CLK_GEN_EN); -+ -+ switch (interface_type) { -+ case PHY_INTERFACE_MODE_MII: -+ setbits_le32(&gpr->gpr[1], -+ IOMUXC_GPR_GPR1_GPR_ENET_QOS_CLK_GEN_EN | -+ IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MII); -+ break; -+ case PHY_INTERFACE_MODE_RMII: -+ setbits_le32(&gpr->gpr[1], -+ IOMUXC_GPR_GPR1_GPR_ENET_QOS_CLK_TX_CLK_SEL | -+ IOMUXC_GPR_GPR1_GPR_ENET_QOS_CLK_GEN_EN | -+ IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_RMII); -+ break; -+ case PHY_INTERFACE_MODE_RGMII: -+ case PHY_INTERFACE_MODE_RGMII_ID: -+ case PHY_INTERFACE_MODE_RGMII_RXID: -+ case PHY_INTERFACE_MODE_RGMII_TXID: -+ setbits_le32(&gpr->gpr[1], -+ IOMUXC_GPR_GPR1_GPR_ENET_QOS_RGMII_EN | -+ IOMUXC_GPR_GPR1_GPR_ENET_QOS_CLK_GEN_EN | -+ IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_RGMII); - break; - default: - return -EINVAL; - } - -- /* disable the clock first */ -- clock_enable(CCGR_QOS_ETHENET, 0); -- clock_enable(CCGR_SDMA2, 0); -- -- /* set enet axi clock 266Mhz */ -- target = CLK_ROOT_ON | ENET_AXI_CLK_ROOT_FROM_SYS1_PLL_266M | -- CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV1) | -- CLK_ROOT_POST_DIV(CLK_ROOT_POST_DIV1); -- clock_set_target_val(ENET_AXI_CLK_ROOT, target); -- -- target = CLK_ROOT_ON | enet1_ref | -- CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV1) | -- CLK_ROOT_POST_DIV(CLK_ROOT_POST_DIV1); -- clock_set_target_val(ENET_QOS_CLK_ROOT, target); -- -- target = CLK_ROOT_ON | -- ENET1_TIME_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK | -- CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV1) | -- CLK_ROOT_POST_DIV(CLK_ROOT_POST_DIV4); -- clock_set_target_val(ENET_QOS_TIMER_CLK_ROOT, target); -- -- /* enable clock */ -- clock_enable(CCGR_QOS_ETHENET, 1); -- clock_enable(CCGR_SDMA2, 1); -- - return 0; - } -- --int imx_eqos_txclk_set_rate(ulong rate) -+#else -+static int imx8mp_eqos_interface_init(struct udevice *dev, -+ phy_interface_t interface_type) - { -- u32 val; -- u32 eqos_post_div; -- -- /* disable the clock first */ -- clock_enable(CCGR_QOS_ETHENET, 0); -- clock_enable(CCGR_SDMA2, 0); -- -- switch (rate) { -- case 125000000: -- eqos_post_div = 1; -- break; -- case 25000000: -- eqos_post_div = 125000000 / 25000000; -- break; -- case 2500000: -- eqos_post_div = 125000000 / 2500000; -- break; -- default: -- return -EINVAL; -- } -- -- clock_get_target_val(ENET_QOS_CLK_ROOT, &val); -- val &= ~(CLK_ROOT_PRE_DIV_MASK | CLK_ROOT_POST_DIV_MASK); -- val |= CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV1) | -- CLK_ROOT_POST_DIV(eqos_post_div - 1); -- clock_set_target_val(ENET_QOS_CLK_ROOT, val); -- -- /* enable clock */ -- clock_enable(CCGR_QOS_ETHENET, 1); -- clock_enable(CCGR_SDMA2, 1); -- - return 0; - } -- --u32 imx_get_eqos_csr_clk(void) --{ -- return get_root_clk(ENET_AXI_CLK_ROOT); --} - #endif - - #ifdef CONFIG_FEC_MXC --int set_clk_enet(enum enet_freq type) -+static int imx8mp_fec_interface_init(struct udevice *dev, -+ phy_interface_t interface_type, -+ bool mx8mp) - { -- u32 target; -- u32 enet1_ref; -- -- switch (type) { -- case ENET_125MHZ: -- enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK; -- break; -- case ENET_50MHZ: -- enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK; -- break; -- case ENET_25MHZ: -- enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_25M_CLK; -+ /* i.MX8MP has extra RGMII_EN bit in IOMUXC GPR1 register */ -+ const u32 rgmii_en = mx8mp ? IOMUXC_GPR_GPR1_GPR_ENET1_RGMII_EN : 0; -+ struct iomuxc_gpr_base_regs *gpr = -+ (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; -+ -+ clrbits_le32(&gpr->gpr[1], -+ rgmii_en | -+ IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL); -+ -+ switch (interface_type) { -+ case PHY_INTERFACE_MODE_MII: -+ case PHY_INTERFACE_MODE_RMII: -+ setbits_le32(&gpr->gpr[1], IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL); -+ break; -+ case PHY_INTERFACE_MODE_RGMII: -+ case PHY_INTERFACE_MODE_RGMII_ID: -+ case PHY_INTERFACE_MODE_RGMII_RXID: -+ case PHY_INTERFACE_MODE_RGMII_TXID: -+ setbits_le32(&gpr->gpr[1], rgmii_en); - break; - default: - return -EINVAL; - } - -- /* disable the clock first */ -- clock_enable(CCGR_ENET1, 0); -- clock_enable(CCGR_SIM_ENET, 0); -- -- /* set enet axi clock 266Mhz */ -- target = CLK_ROOT_ON | ENET_AXI_CLK_ROOT_FROM_SYS1_PLL_266M | -- CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV1) | -- CLK_ROOT_POST_DIV(CLK_ROOT_POST_DIV1); -- clock_set_target_val(ENET_AXI_CLK_ROOT, target); -- -- target = CLK_ROOT_ON | enet1_ref | -- CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV1) | -- CLK_ROOT_POST_DIV(CLK_ROOT_POST_DIV1); -- clock_set_target_val(ENET_REF_CLK_ROOT, target); -- -- target = CLK_ROOT_ON | -- ENET1_TIME_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK | -- CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV1) | -- CLK_ROOT_POST_DIV(CLK_ROOT_POST_DIV4); -- clock_set_target_val(ENET_TIMER_CLK_ROOT, target); -- -- /* enable clock */ -- clock_enable(CCGR_SIM_ENET, 1); -- clock_enable(CCGR_ENET1, 1); -- - return 0; - } - #endif -+ -+int board_interface_eth_init(struct udevice *dev, phy_interface_t interface_type) -+{ -+ if (IS_ENABLED(CONFIG_IMX8MM) && -+ IS_ENABLED(CONFIG_FEC_MXC) && -+ device_is_compatible(dev, "fsl,imx8mm-fec")) -+ return imx8mp_fec_interface_init(dev, interface_type, false); -+ -+ if (IS_ENABLED(CONFIG_IMX8MN) && -+ IS_ENABLED(CONFIG_FEC_MXC) && -+ device_is_compatible(dev, "fsl,imx8mn-fec")) -+ return imx8mp_fec_interface_init(dev, interface_type, false); -+ -+ if (IS_ENABLED(CONFIG_IMX8MP) && -+ IS_ENABLED(CONFIG_FEC_MXC) && -+ device_is_compatible(dev, "fsl,imx8mp-fec")) -+ return imx8mp_fec_interface_init(dev, interface_type, true); -+ -+ if (IS_ENABLED(CONFIG_IMX8MP) && -+ IS_ENABLED(CONFIG_DWC_ETH_QOS) && -+ device_is_compatible(dev, "nxp,imx8mp-dwmac-eqos")) -+ return imx8mp_eqos_interface_init(dev, interface_type); -+ -+ return -EINVAL; -+} -diff --git a/arch/arm/mach-imx/imx8ulp/Kconfig b/arch/arm/mach-imx/imx8ulp/Kconfig -index bbdeaac07b..c1c1aa08c5 100644 ---- a/arch/arm/mach-imx/imx8ulp/Kconfig -+++ b/arch/arm/mach-imx/imx8ulp/Kconfig -@@ -20,6 +20,7 @@ config TARGET_IMX8ULP_EVK - bool "imx8ulp_evk" - select IMX8ULP - select SUPPORT_SPL -+ select IMX8ULP_DRAM - - endchoice - -diff --git a/arch/arm/mach-imx/imx8ulp/ahab.c b/arch/arm/mach-imx/imx8ulp/ahab.c -deleted file mode 100644 -index 87c4c66a08..0000000000 ---- a/arch/arm/mach-imx/imx8ulp/ahab.c -+++ /dev/null -@@ -1,345 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0+ --/* -- * Copyright 2020 NXP -- */ -- --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include -- --DECLARE_GLOBAL_DATA_PTR; -- --#define IMG_CONTAINER_BASE (0x22010000UL) --#define IMG_CONTAINER_END_BASE (IMG_CONTAINER_BASE + 0xFFFFUL) -- --#define AHAB_NO_AUTHENTICATION_IND 0xee --#define AHAB_BAD_KEY_HASH_IND 0xfa --#define AHAB_INVALID_KEY_IND 0xf9 --#define AHAB_BAD_SIGNATURE_IND 0xf0 --#define AHAB_BAD_HASH_IND 0xf1 -- --static void display_ahab_auth_ind(u32 event) --{ -- u8 resp_ind = (event >> 8) & 0xff; -- -- switch (resp_ind) { -- case AHAB_NO_AUTHENTICATION_IND: -- printf("AHAB_NO_AUTHENTICATION_IND (0x%02X)\n\n", resp_ind); -- break; -- case AHAB_BAD_KEY_HASH_IND: -- printf("AHAB_BAD_KEY_HASH_IND (0x%02X)\n\n", resp_ind); -- break; -- case AHAB_INVALID_KEY_IND: -- printf("AHAB_INVALID_KEY_IND (0x%02X)\n\n", resp_ind); -- break; -- case AHAB_BAD_SIGNATURE_IND: -- printf("AHAB_BAD_SIGNATURE_IND (0x%02X)\n\n", resp_ind); -- break; -- case AHAB_BAD_HASH_IND: -- printf("AHAB_BAD_HASH_IND (0x%02X)\n\n", resp_ind); -- break; -- default: -- printf("Unknown Indicator (0x%02X)\n\n", resp_ind); -- break; -- } --} -- --int ahab_auth_cntr_hdr(struct container_hdr *container, u16 length) --{ -- int err; -- u32 resp; -- -- memcpy((void *)IMG_CONTAINER_BASE, (const void *)container, -- ALIGN(length, CONFIG_SYS_CACHELINE_SIZE)); -- -- flush_dcache_range(IMG_CONTAINER_BASE, -- IMG_CONTAINER_BASE + ALIGN(length, CONFIG_SYS_CACHELINE_SIZE) - 1); -- -- err = ahab_auth_oem_ctnr(IMG_CONTAINER_BASE, &resp); -- if (err) { -- printf("Authenticate container hdr failed, return %d, resp 0x%x\n", -- err, resp); -- display_ahab_auth_ind(resp); -- } -- -- return err; --} -- --int ahab_auth_release(void) --{ -- int err; -- u32 resp; -- -- err = ahab_release_container(&resp); -- if (err) { -- printf("Error: release container failed, resp 0x%x!\n", resp); -- display_ahab_auth_ind(resp); -- } -- -- return err; --} -- --int ahab_verify_cntr_image(struct boot_img_t *img, int image_index) --{ -- int err; -- u32 resp; -- -- err = ahab_verify_image(image_index, &resp); -- if (err) { -- printf("Authenticate img %d failed, return %d, resp 0x%x\n", -- image_index, err, resp); -- display_ahab_auth_ind(resp); -- return -EIO; -- } -- -- return 0; --} -- --static inline bool check_in_dram(ulong addr) --{ -- int i; -- struct bd_info *bd = gd->bd; -- -- for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { -- if (bd->bi_dram[i].size) { -- if (addr >= bd->bi_dram[i].start && -- addr < (bd->bi_dram[i].start + bd->bi_dram[i].size)) -- return true; -- } -- } -- -- return false; --} -- --int authenticate_os_container(ulong addr) --{ -- struct container_hdr *phdr; -- int i, ret = 0; -- int err; -- u16 length; -- struct boot_img_t *img; -- unsigned long s, e; -- -- if (addr % 4) { -- puts("Error: Image's address is not 4 byte aligned\n"); -- return -EINVAL; -- } -- -- if (!check_in_dram(addr)) { -- puts("Error: Image's address is invalid\n"); -- return -EINVAL; -- } -- -- phdr = (struct container_hdr *)addr; -- if (phdr->tag != 0x87 || phdr->version != 0x0) { -- printf("Error: Wrong container header\n"); -- return -EFAULT; -- } -- -- if (!phdr->num_images) { -- printf("Error: Wrong container, no image found\n"); -- return -EFAULT; -- } -- -- length = phdr->length_lsb + (phdr->length_msb << 8); -- -- debug("container length %u\n", length); -- -- err = ahab_auth_cntr_hdr(phdr, length); -- if (err) { -- ret = -EIO; -- goto exit; -- } -- -- debug("Verify images\n"); -- -- /* Copy images to dest address */ -- for (i = 0; i < phdr->num_images; i++) { -- img = (struct boot_img_t *)(addr + -- sizeof(struct container_hdr) + -- i * sizeof(struct boot_img_t)); -- -- debug("img %d, dst 0x%x, src 0x%lx, size 0x%x\n", -- i, (uint32_t)img->dst, img->offset + addr, img->size); -- -- memcpy((void *)img->dst, (const void *)(img->offset + addr), img->size); -- -- s = img->dst & ~(CONFIG_SYS_CACHELINE_SIZE - 1); -- e = ALIGN(img->dst + img->size, CONFIG_SYS_CACHELINE_SIZE) - 1; -- -- flush_dcache_range(s, e); -- -- ret = ahab_verify_cntr_image(img, i); -- if (ret) -- goto exit; -- } -- --exit: -- debug("ahab_auth_release, 0x%x\n", ret); -- ahab_auth_release(); -- -- return ret; --} -- --static int do_authenticate(struct cmd_tbl *cmdtp, int flag, int argc, -- char *const argv[]) --{ -- ulong addr; -- -- if (argc < 2) -- return CMD_RET_USAGE; -- -- addr = simple_strtoul(argv[1], NULL, 16); -- -- printf("Authenticate OS container at 0x%lx\n", addr); -- -- if (authenticate_os_container(addr)) -- return CMD_RET_FAILURE; -- -- return CMD_RET_SUCCESS; --} -- --static void display_life_cycle(u32 lc) --{ -- printf("Lifecycle: 0x%08X, ", lc); -- switch (lc) { -- case 0x1: -- printf("BLANK\n\n"); -- break; -- case 0x2: -- printf("FAB\n\n"); -- break; -- case 0x4: -- printf("NXP Provisioned\n\n"); -- break; -- case 0x8: -- printf("OEM Open\n\n"); -- break; -- case 0x10: -- printf("OEM Secure World Closed\n\n"); -- break; -- case 0x20: -- printf("OEM closed\n\n"); -- break; -- case 0x40: -- printf("Field Return OEM\n\n"); -- break; -- case 0x80: -- printf("Field Return NXP\n\n"); -- break; -- case 0x100: -- printf("OEM Locked\n\n"); -- break; -- case 0x200: -- printf("BRICKED\n\n"); -- break; -- default: -- printf("Unknown\n\n"); -- break; -- } --} -- --static int confirm_close(void) --{ -- puts("Warning: Please ensure your sample is in NXP closed state, " -- "OEM SRK hash has been fused, \n" -- " and you are able to boot a signed image successfully " -- "without any SECO events reported.\n" -- " If not, your sample will be unrecoverable.\n" -- "\nReally perform this operation? \n"); -- -- if (confirm_yesno()) -- return 1; -- -- puts("Ahab close aborted\n"); -- return 0; --} -- --static int do_ahab_close(struct cmd_tbl *cmdtp, int flag, int argc, -- char *const argv[]) --{ -- int err; -- u32 resp; -- -- if (!confirm_close()) -- return -EACCES; -- -- err = ahab_forward_lifecycle(8, &resp); -- if (err != 0) { -- printf("Error in forward lifecycle to OEM closed\n"); -- return -EIO; -- } -- -- printf("Change to OEM closed successfully\n"); -- -- return 0; --} -- --int ahab_dump(void) --{ -- u32 buffer[32]; -- int ret, i = 0; -- -- do { -- ret = ahab_dump_buffer(buffer, 32); -- if (ret < 0) { -- printf("Error in dump AHAB log\n"); -- return -EIO; -- } -- -- if (ret == 1) -- break; -- -- for (i = 0; i < ret; i++) -- printf("0x%x\n", buffer[i]); -- } while (ret >= 21); -- -- return 0; --} -- --static int do_ahab_dump(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) --{ -- return ahab_dump(); --} -- --static int do_ahab_status(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) --{ -- u32 lc; -- -- lc = readl(FSB_BASE_ADDR + 0x41c); -- lc &= 0x3f; -- -- display_life_cycle(lc); -- return 0; --} -- --U_BOOT_CMD(auth_cntr, CONFIG_SYS_MAXARGS, 1, do_authenticate, -- "autenticate OS container via AHAB", -- "addr\n" -- "addr - OS container hex address\n" --); -- --U_BOOT_CMD(ahab_close, CONFIG_SYS_MAXARGS, 1, do_ahab_close, -- "Change AHAB lifecycle to OEM closed", -- "" --); -- --U_BOOT_CMD(ahab_dump, CONFIG_SYS_MAXARGS, 1, do_ahab_dump, -- "Dump AHAB log for debug", -- "" --); -- --U_BOOT_CMD(ahab_status, CONFIG_SYS_MAXARGS, 1, do_ahab_status, -- "display AHAB lifecycle only", -- "" --); -diff --git a/arch/arm/mach-imx/imx8ulp/cgc.c b/arch/arm/mach-imx/imx8ulp/cgc.c -index d240abaee4..d2fadb4877 100644 ---- a/arch/arm/mach-imx/imx8ulp/cgc.c -+++ b/arch/arm/mach-imx/imx8ulp/cgc.c -@@ -136,39 +136,34 @@ void cgc1_pll3_init(ulong freq) - clrbits_le32(&cgc1_regs->pll3div_vco, BIT(7)); - - clrbits_le32(&cgc1_regs->pll3pfdcfg, 0x3F); -- -- if (IS_ENABLED(CONFIG_IMX8ULP_LD_MODE)) { -- setbits_le32(&cgc1_regs->pll3pfdcfg, 25 << 0); -- clrsetbits_le32(&cgc1_regs->nicclk, GENMASK(26, 21), 3 << 21); /* 195M */ -- } else if (IS_ENABLED(CONFIG_IMX8ULP_ND_MODE)) { -- setbits_le32(&cgc1_regs->pll3pfdcfg, 21 << 0); -- clrsetbits_le32(&cgc1_regs->nicclk, GENMASK(26, 21), 1 << 21); /* 231M */ -- } else { -- setbits_le32(&cgc1_regs->pll3pfdcfg, 30 << 0); /* 324M */ -- } -- -+ setbits_le32(&cgc1_regs->pll3pfdcfg, 30 << 0); /* PFD0 324M */ - clrbits_le32(&cgc1_regs->pll3pfdcfg, BIT(7)); - while (!(readl(&cgc1_regs->pll3pfdcfg) & BIT(6))) - ; - - clrbits_le32(&cgc1_regs->pll3pfdcfg, 0x3F << 8); -- setbits_le32(&cgc1_regs->pll3pfdcfg, 25 << 8); -+ setbits_le32(&cgc1_regs->pll3pfdcfg, 25 << 8); /* PFD1 389M */ - clrbits_le32(&cgc1_regs->pll3pfdcfg, BIT(15)); - while (!(readl(&cgc1_regs->pll3pfdcfg) & BIT(14))) - ; - - clrbits_le32(&cgc1_regs->pll3pfdcfg, 0x3F << 16); -- setbits_le32(&cgc1_regs->pll3pfdcfg, 25 << 16); -+ setbits_le32(&cgc1_regs->pll3pfdcfg, 30 << 16); /* PFD2 324M */ - clrbits_le32(&cgc1_regs->pll3pfdcfg, BIT(23)); - while (!(readl(&cgc1_regs->pll3pfdcfg) & BIT(22))) - ; - - clrbits_le32(&cgc1_regs->pll3pfdcfg, 0x3F << 24); -- setbits_le32(&cgc1_regs->pll3pfdcfg, 29 << 24); -+ setbits_le32(&cgc1_regs->pll3pfdcfg, 25 << 24); /* PFD3 389M */ - clrbits_le32(&cgc1_regs->pll3pfdcfg, BIT(31)); - while (!(readl(&cgc1_regs->pll3pfdcfg) & BIT(30))) - ; - -+ clrbits_le32(&cgc1_regs->pll3div_pfd0, 0x3f3f3f3f); -+ if (IS_ENABLED(CONFIG_IMX8ULP_LD_MODE) || IS_ENABLED(CONFIG_IMX8ULP_ND_MODE)) -+ clrsetbits_le32(&cgc1_regs->pll3div_pfd1, 0x3f3f3f3f, 0x03010000); /* Set PFD3 DIV1 to 194M, PFD3 DIV2 to 97M */ -+ else -+ clrsetbits_le32(&cgc1_regs->pll3div_pfd1, 0x3f3f3f3f, 0x01000000); /* Set PFD3 DIV1 to 389M, PFD3 DIV2 to 194M */ - clrbits_le32(&cgc1_regs->pll3div_pfd0, BIT(7)); - clrbits_le32(&cgc1_regs->pll3div_pfd0, BIT(15)); - clrbits_le32(&cgc1_regs->pll3div_pfd0, BIT(23)); -@@ -179,6 +174,17 @@ void cgc1_pll3_init(ulong freq) - clrbits_le32(&cgc1_regs->pll3div_pfd1, BIT(23)); - clrbits_le32(&cgc1_regs->pll3div_pfd1, BIT(31)); - -+ /* NIC_AP: -+ * OD source PLL3 PFD0, 324M -+ * ND source FRO192, 192M -+ * LD source FRO192, 96M -+ */ -+ if (IS_ENABLED(CONFIG_IMX8ULP_LD_MODE)) { -+ clrsetbits_le32(&cgc1_regs->nicclk, GENMASK(26, 21), 1 << 21); -+ } else { -+ clrbits_le32(&cgc1_regs->nicclk, GENMASK(26, 21)); -+ } -+ - if (!IS_ENABLED(CONFIG_IMX8ULP_LD_MODE) && !IS_ENABLED(CONFIG_IMX8ULP_ND_MODE)) { - /* nicclk select pll3 pfd0 */ - clrsetbits_le32(&cgc1_regs->nicclk, GENMASK(29, 28), BIT(28)); -@@ -219,20 +225,9 @@ void cgc2_pll4_init(bool pll4_reset) - - /* Enable all 4 PFDs */ - setbits_le32(&cgc2_regs->pll4pfdcfg, 18 << 0); /* 528 */ -- if (IS_ENABLED(CONFIG_IMX8ULP_LD_MODE)) { -- setbits_le32(&cgc2_regs->pll4pfdcfg, 24 << 8); -- /* 99Mhz for NIC_LPAV */ -- clrsetbits_le32(&cgc2_regs->niclpavclk, GENMASK(26, 21), 3 << 21); -- } else if (IS_ENABLED(CONFIG_IMX8ULP_ND_MODE)) { -- setbits_le32(&cgc2_regs->pll4pfdcfg, 24 << 8); -- /* 198Mhz for NIC_LPAV */ -- clrsetbits_le32(&cgc2_regs->niclpavclk, GENMASK(26, 21), 1 << 21); -- } else { -- setbits_le32(&cgc2_regs->pll4pfdcfg, 30 << 8); /* 316.8Mhz for NIC_LPAV */ -- clrbits_le32(&cgc2_regs->niclpavclk, GENMASK(26, 21)); -- } -- setbits_le32(&cgc2_regs->pll4pfdcfg, 12 << 16); /* 792 */ -- setbits_le32(&cgc2_regs->pll4pfdcfg, 24 << 24); /* 396 */ -+ setbits_le32(&cgc2_regs->pll4pfdcfg, 30 << 8); /* 316.8Mhz for NIC_LPAV */ -+ setbits_le32(&cgc2_regs->pll4pfdcfg, 30 << 16); /* 316.8Mhz */ -+ setbits_le32(&cgc2_regs->pll4pfdcfg, 24 << 24); /* 396Mhz */ - - clrbits_le32(&cgc2_regs->pll4pfdcfg, BIT(7) | BIT(15) | BIT(23) | BIT(31)); - -@@ -244,9 +239,22 @@ void cgc2_pll4_init(bool pll4_reset) - clrbits_le32(&cgc2_regs->pll4div_pfd0, BIT(7) | BIT(15) | BIT(23) | BIT(31)); - clrbits_le32(&cgc2_regs->pll4div_pfd1, BIT(7) | BIT(15) | BIT(23) | BIT(31)); - -- clrsetbits_le32(&cgc2_regs->niclpavclk, GENMASK(29, 28), BIT(28)); -- while (!(readl(&cgc2_regs->niclpavclk) & BIT(27))) -- ; -+ /* NIC_LPAV: -+ * OD source PLL4 PFD1, 316.8M -+ * ND source FRO192, 192M -+ * LD source FRO192, 96M -+ */ -+ if (IS_ENABLED(CONFIG_IMX8ULP_LD_MODE)) { -+ clrsetbits_le32(&cgc2_regs->niclpavclk, GENMASK(26, 21), 1 << 21); -+ } else { -+ clrbits_le32(&cgc2_regs->niclpavclk, GENMASK(26, 21)); -+ } -+ -+ if (!IS_ENABLED(CONFIG_IMX8ULP_LD_MODE) && !IS_ENABLED(CONFIG_IMX8ULP_ND_MODE)) { -+ clrsetbits_le32(&cgc2_regs->niclpavclk, GENMASK(29, 28), BIT(28)); -+ while (!(readl(&cgc2_regs->niclpavclk) & BIT(27))) -+ ; -+ } - } - - void cgc2_pll4_pfd_config(enum cgc_clk pllpfd, u32 pfd) -diff --git a/arch/arm/mach-imx/imx8ulp/clock.c b/arch/arm/mach-imx/imx8ulp/clock.c -index 3e88f4633c..36d12943a0 100644 ---- a/arch/arm/mach-imx/imx8ulp/clock.c -+++ b/arch/arm/mach-imx/imx8ulp/clock.c -@@ -182,37 +182,20 @@ void clock_init_late(void) - */ - cgc1_pll3_init(540672000); - -- if (IS_ENABLED(CONFIG_IMX8ULP_LD_MODE) || IS_ENABLED(CONFIG_IMX8ULP_ND_MODE)) { -- pcc_clock_enable(4, SDHC0_PCC4_SLOT, false); -- pcc_clock_sel(4, SDHC0_PCC4_SLOT, PLL3_PFD2_DIV2); -- pcc_clock_enable(4, SDHC0_PCC4_SLOT, true); -- pcc_reset_peripheral(4, SDHC0_PCC4_SLOT, false); -- -- pcc_clock_enable(4, SDHC1_PCC4_SLOT, false); -- pcc_clock_sel(4, SDHC1_PCC4_SLOT, PLL3_PFD2_DIV2); -- pcc_clock_enable(4, SDHC1_PCC4_SLOT, true); -- pcc_reset_peripheral(4, SDHC1_PCC4_SLOT, false); -- -- pcc_clock_enable(4, SDHC2_PCC4_SLOT, false); -- pcc_clock_sel(4, SDHC2_PCC4_SLOT, PLL3_PFD2_DIV2); -- pcc_clock_enable(4, SDHC2_PCC4_SLOT, true); -- pcc_reset_peripheral(4, SDHC2_PCC4_SLOT, false); -- } else { -- pcc_clock_enable(4, SDHC0_PCC4_SLOT, false); -- pcc_clock_sel(4, SDHC0_PCC4_SLOT, PLL3_PFD1_DIV2); -- pcc_clock_enable(4, SDHC0_PCC4_SLOT, true); -- pcc_reset_peripheral(4, SDHC0_PCC4_SLOT, false); -- -- pcc_clock_enable(4, SDHC1_PCC4_SLOT, false); -- pcc_clock_sel(4, SDHC1_PCC4_SLOT, PLL3_PFD2_DIV1); -- pcc_clock_enable(4, SDHC1_PCC4_SLOT, true); -- pcc_reset_peripheral(4, SDHC1_PCC4_SLOT, false); -- -- pcc_clock_enable(4, SDHC2_PCC4_SLOT, false); -- pcc_clock_sel(4, SDHC2_PCC4_SLOT, PLL3_PFD2_DIV1); -- pcc_clock_enable(4, SDHC2_PCC4_SLOT, true); -- pcc_reset_peripheral(4, SDHC2_PCC4_SLOT, false); -- } -+ pcc_clock_enable(4, SDHC0_PCC4_SLOT, false); -+ pcc_clock_sel(4, SDHC0_PCC4_SLOT, PLL3_PFD3_DIV1); /* 389M for OD, 194M for LD/ND*/ -+ pcc_clock_enable(4, SDHC0_PCC4_SLOT, true); -+ pcc_reset_peripheral(4, SDHC0_PCC4_SLOT, false); -+ -+ pcc_clock_enable(4, SDHC1_PCC4_SLOT, false); -+ pcc_clock_sel(4, SDHC1_PCC4_SLOT, PLL3_PFD3_DIV2); /* 194M for OD, 97M for LD/ND */ -+ pcc_clock_enable(4, SDHC1_PCC4_SLOT, true); -+ pcc_reset_peripheral(4, SDHC1_PCC4_SLOT, false); -+ -+ pcc_clock_enable(4, SDHC2_PCC4_SLOT, false); -+ pcc_clock_sel(4, SDHC2_PCC4_SLOT, PLL3_PFD3_DIV2); /* 194M for OD, 97M for LD/ND*/ -+ pcc_clock_enable(4, SDHC2_PCC4_SLOT, true); -+ pcc_reset_peripheral(4, SDHC2_PCC4_SLOT, false); - - /* enable MU0_MUB clock before access the register of MU0_MUB */ - pcc_clock_enable(3, MU0_B_PCC3_SLOT, true); -@@ -425,6 +408,8 @@ void reset_lcdclk(void) - pcc_reset_peripheral(5, DCNANO_PCC5_SLOT, true); - } - -+/* PLL4 PFD0 max frequency */ -+#define PLL4_PFD0_MAX_RATE 600000 /*khz*/ - void mxs_set_lcdclk(u32 base_addr, u32 freq_in_khz) - { - u8 pcd, best_pcd = 0; -@@ -443,6 +428,9 @@ void mxs_set_lcdclk(u32 base_addr, u32 freq_in_khz) - for (div = 1; div <= 64; div++) { - parent_rate = pll4_rate; - parent_rate = parent_rate * 18 / pfd; -+ if (parent_rate > PLL4_PFD0_MAX_RATE) -+ continue; -+ - parent_rate = parent_rate / div; - - for (pcd = 0; pcd < 8; pcd++) { -diff --git a/arch/arm/mach-imx/imx8ulp/rdc.c b/arch/arm/mach-imx/imx8ulp/rdc.c -index e24eeff8a2..50b097b035 100644 ---- a/arch/arm/mach-imx/imx8ulp/rdc.c -+++ b/arch/arm/mach-imx/imx8ulp/rdc.c -@@ -181,6 +181,25 @@ int xrdc_config_pdac(u32 bridge, u32 index, u32 dom, u32 perm) - return 0; - } - -+int xrdc_config_msc(u32 msc, u32 index, u32 dom, u32 perm) -+{ -+ ulong w0_addr; -+ u32 val; -+ -+ if (msc > 2) -+ return -EINVAL; -+ -+ w0_addr = XRDC_ADDR + 0x4000 + 0x400 * msc + 0x8 * index; -+ -+ val = readl(w0_addr); -+ writel((val & ~(0x7 << (dom * 3))) | (perm << (dom * 3)), w0_addr); -+ -+ val = readl(w0_addr + 4); -+ writel(val | BIT(31), w0_addr + 4); -+ -+ return 0; -+} -+ - int release_rdc(enum rdc_type type) - { - ulong s_mu_base = 0x27020000UL; -@@ -191,7 +210,7 @@ int release_rdc(enum rdc_type type) - msg.version = AHAB_VERSION; - msg.tag = AHAB_CMD_TAG; - msg.size = 2; -- msg.command = AHAB_RELEASE_RDC_REQ_CID; -+ msg.command = ELE_RELEASE_RDC_REQ; - msg.data[0] = (rdc_id << 8) | 0x2; /* A35 XRDC */ - - mu_hal_init(s_mu_base); -@@ -276,6 +295,36 @@ void xrdc_init_mda(void) - - void xrdc_init_mrc(void) - { -+ /* Re-config MRC3 for SRAM0 in case protected by S400 */ -+ xrdc_config_mrc_w0_w1(3, 0, 0x22010000, 0x10000); -+ xrdc_config_mrc_dx_perm(3, 0, 0, 1); -+ xrdc_config_mrc_dx_perm(3, 0, 1, 1); -+ xrdc_config_mrc_dx_perm(3, 0, 4, 1); -+ xrdc_config_mrc_dx_perm(3, 0, 5, 1); -+ xrdc_config_mrc_dx_perm(3, 0, 6, 1); -+ xrdc_config_mrc_dx_perm(3, 0, 7, 1); -+ xrdc_config_mrc_w3_w4(3, 0, 0x0, 0x80000FFF); -+ -+ /* Clear other 3 regions of MRC3 to invalid */ -+ xrdc_config_mrc_w3_w4(3, 1, 0x0, 0x0); -+ xrdc_config_mrc_w3_w4(3, 2, 0x0, 0x0); -+ xrdc_config_mrc_w3_w4(3, 3, 0x0, 0x0); -+ -+ /* Set MRC4 and MRC5 for DDR access from A35 and AP NIC PER masters */ -+ xrdc_config_mrc_w0_w1(4, 0, CFG_SYS_SDRAM_BASE, PHYS_SDRAM_SIZE); -+ xrdc_config_mrc_dx_perm(4, 0, 1, 1); -+ xrdc_config_mrc_dx_perm(4, 0, 7, 1); -+ xrdc_config_mrc_w3_w4(4, 0, 0x0, 0x80000FFF); -+ -+ xrdc_config_mrc_w0_w1(5, 0, CFG_SYS_SDRAM_BASE, PHYS_SDRAM_SIZE); -+ xrdc_config_mrc_dx_perm(5, 0, 1, 1); -+ xrdc_config_mrc_w3_w4(5, 0, 0x0, 0x80000FFF); -+ -+ /* Set MRC6 for DDR access from Sentinel */ -+ xrdc_config_mrc_w0_w1(6, 0, CFG_SYS_SDRAM_BASE, PHYS_SDRAM_SIZE); -+ xrdc_config_mrc_dx_perm(6, 0, 4, 1); -+ xrdc_config_mrc_w3_w4(6, 0, 0x0, 0x80000FFF); -+ - /* The MRC8 is for SRAM1 */ - xrdc_config_mrc_w0_w1(8, 0, 0x21000000, 0x10000); - /* Allow for all domains: So domain 2/3 (HIFI DSP/LPAV) is ok to access */ -@@ -295,6 +344,28 @@ void xrdc_init_mrc(void) - xrdc_config_mrc_w3_w4(6, 0, 0x0, 0x80000FFF); - } - -+void xrdc_init_pdac_msc(void) -+{ -+ /* Init LPAV PDAC and MSC for DDR init */ -+ xrdc_config_pdac(5, 36, 6, 0x7); /* CMC2*/ -+ xrdc_config_pdac(5, 36, 7, 0x7); -+ xrdc_config_pdac(5, 37, 6, 0x7); /* SIM2 */ -+ xrdc_config_pdac(5, 37, 7, 0x7); -+ xrdc_config_pdac(5, 38, 6, 0x7); /* CGC2 */ -+ xrdc_config_pdac(5, 38, 7, 0x7); -+ xrdc_config_pdac(5, 39, 6, 0x7); /* PCC5 */ -+ xrdc_config_pdac(5, 39, 7, 0x7); -+ -+ xrdc_config_msc(0, 0, 6, 0x7); /* GPIOE */ -+ xrdc_config_msc(0, 0, 7, 0x7); -+ xrdc_config_msc(0, 1, 6, 0x7); /* GPIOF */ -+ xrdc_config_msc(0, 1, 7, 0x7); -+ xrdc_config_msc(1, 0, 6, 0x7); /* GPIOD */ -+ xrdc_config_msc(1, 0, 7, 0x7); -+ xrdc_config_msc(2, 6, 6, 0x7); /* DDR controller */ -+ xrdc_config_msc(2, 6, 7, 0x7); -+} -+ - int trdc_mbc_set_access(u32 mbc_x, u32 dom_x, u32 mem_x, u32 blk_x, bool sec_access) - { - struct trdc *trdc_base = (struct trdc *)0x28031000U; -diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c -index 5d95fb89a6..8424332f42 100644 ---- a/arch/arm/mach-imx/imx8ulp/soc.c -+++ b/arch/arm/mach-imx/imx8ulp/soc.c -@@ -70,9 +70,18 @@ int mmc_get_env_dev(void) - } - #endif - -+static void set_cpu_info(struct sentinel_get_info_data *info) -+{ -+ gd->arch.soc_rev = info->soc; -+ gd->arch.lifecycle = info->lc; -+ memcpy((void *)&gd->arch.uid, &info->uid, 4 * sizeof(u32)); -+} -+ - u32 get_cpu_rev(void) - { -- return (MXC_CPU_IMX8ULP << 12) | CHIP_REV_1_0; -+ u32 rev = (gd->arch.soc_rev >> 24) - 0xa0; -+ -+ return (MXC_CPU_IMX8ULP << 12) | (CHIP_REV_1_0 + rev); - } - - enum bt_mode get_boot_mode(void) -@@ -95,14 +104,70 @@ enum bt_mode get_boot_mode(void) - - bool m33_image_booted(void) - { -- u32 gp6; -+ if (IS_ENABLED(CONFIG_SPL_BUILD)) { -+ u32 gp6 = 0; -+ -+ /* DGO_GP6 */ -+ gp6 = readl(SIM_SEC_BASE_ADDR + 0x28); -+ if (gp6 & BIT(5)) -+ return true; -+ -+ return false; -+ } else { -+ u32 gpr0 = readl(SIM1_BASE_ADDR); -+ if (gpr0 & BIT(0)) -+ return true; -+ -+ return false; -+ } -+} -+ -+bool rdc_enabled_in_boot(void) -+{ -+ if (IS_ENABLED(CONFIG_SPL_BUILD)) { -+ u32 val = 0; -+ int ret; -+ bool rdc_en = true; /* Default assume DBD_EN is set */ -+ -+ /* Read DBD_EN fuse */ -+ ret = fuse_read(8, 1, &val); -+ if (!ret) -+ rdc_en = !!(val & 0x200); /* only A1 part uses DBD_EN, so check DBD_EN new place*/ -+ -+ return rdc_en; -+ } else { -+ u32 gpr0 = readl(SIM1_BASE_ADDR); -+ if (gpr0 & 0x2) -+ return true; -+ -+ return false; -+ } -+} -+ -+static void spl_pass_boot_info(void) -+{ -+ if (IS_ENABLED(CONFIG_SPL_BUILD)) { -+ bool m33_booted = m33_image_booted(); -+ bool rdc_en = rdc_enabled_in_boot(); -+ u32 val = 0; -+ -+ if (m33_booted) -+ val |= 0x1; - -- /* DGO_GP6 */ -- gp6 = readl(SIM_SEC_BASE_ADDR + 0x28); -- if (gp6 & BIT(5)) -- return true; -+ if (rdc_en) -+ val |= 0x2; - -- return false; -+ writel(val, SIM1_BASE_ADDR); -+ } -+} -+ -+bool is_m33_handshake_necessary(void) -+{ -+ /* Only need handshake in u-boot */ -+ if (!IS_ENABLED(CONFIG_SPL_BUILD)) -+ return (m33_image_booted() || rdc_enabled_in_boot()); -+ else -+ return false; - } - - int m33_image_handshake(ulong timeout_ms) -@@ -547,33 +612,65 @@ static void set_core0_reset_vector(u32 entry) - setbits_le32(SIM1_BASE_ADDR + 0x8, (0x1 << 26)); - } - --static int trdc_set_access(void) -+/* Not used now */ -+int trdc_set_access(void) - { - /* - * TRDC mgr + 4 MBC + 2 MRC. -- * S400 should already configure when release RDC -- * A35 only map non-secure region for pbridge0 and 1, set sec_access to false - */ -- trdc_mbc_set_access(2, 7, 0, 49, false); -- trdc_mbc_set_access(2, 7, 0, 50, false); -- trdc_mbc_set_access(2, 7, 0, 51, false); -- trdc_mbc_set_access(2, 7, 0, 52, false); -- trdc_mbc_set_access(2, 7, 0, 53, false); -- trdc_mbc_set_access(2, 7, 0, 54, false); -- -- /* CGC0: PBridge0 slot 47 */ -+ trdc_mbc_set_access(2, 7, 0, 49, true); -+ trdc_mbc_set_access(2, 7, 0, 50, true); -+ trdc_mbc_set_access(2, 7, 0, 51, true); -+ trdc_mbc_set_access(2, 7, 0, 52, true); -+ trdc_mbc_set_access(2, 7, 0, 53, true); -+ trdc_mbc_set_access(2, 7, 0, 54, true); -+ -+ /* 0x1fff8000 used for resource table by remoteproc */ -+ trdc_mbc_set_access(0, 7, 2, 31, false); -+ -+ /* CGC0: PBridge0 slot 47 and PCC0 slot 48 */ - trdc_mbc_set_access(2, 7, 0, 47, false); -+ trdc_mbc_set_access(2, 7, 0, 48, false); -+ -+ /* PCC1 */ -+ trdc_mbc_set_access(2, 7, 1, 17, false); -+ trdc_mbc_set_access(2, 7, 1, 34, false); - - /* Iomuxc0: : PBridge1 slot 33 */ - trdc_mbc_set_access(2, 7, 1, 33, false); - - /* flexspi0 */ -+ trdc_mbc_set_access(2, 7, 0, 57, false); - trdc_mrc_region_set_access(0, 7, 0x04000000, 0x0c000000, false); - - /* tpm0: PBridge1 slot 21 */ - trdc_mbc_set_access(2, 7, 1, 21, false); - /* lpi2c0: PBridge1 slot 24 */ - trdc_mbc_set_access(2, 7, 1, 24, false); -+ -+ /* Allow M33 to access TRDC MGR */ -+ trdc_mbc_set_access(2, 6, 0, 49, true); -+ trdc_mbc_set_access(2, 6, 0, 50, true); -+ trdc_mbc_set_access(2, 6, 0, 51, true); -+ trdc_mbc_set_access(2, 6, 0, 52, true); -+ trdc_mbc_set_access(2, 6, 0, 53, true); -+ trdc_mbc_set_access(2, 6, 0, 54, true); -+ -+ /* Set SAI0 for eDMA 0, NS */ -+ trdc_mbc_set_access(2, 0, 1, 28, false); -+ -+ /* Set SSRAM for eDMA0 access */ -+ trdc_mbc_set_access(0, 0, 2, 0, false); -+ trdc_mbc_set_access(0, 0, 2, 1, false); -+ trdc_mbc_set_access(0, 0, 2, 2, false); -+ trdc_mbc_set_access(0, 0, 2, 3, false); -+ trdc_mbc_set_access(0, 0, 2, 4, false); -+ trdc_mbc_set_access(0, 0, 2, 5, false); -+ trdc_mbc_set_access(0, 0, 2, 6, false); -+ trdc_mbc_set_access(0, 0, 2, 7, false); -+ -+ writel(0x800000a0, 0x28031840); -+ - return 0; - } - -@@ -620,10 +717,6 @@ void set_lpav_qos(void) - int arch_cpu_init(void) - { - if (IS_ENABLED(CONFIG_SPL_BUILD)) { -- u32 val = 0; -- int ret; -- bool rdc_en = true; /* Default assume DBD_EN is set */ -- - /* Enable System Reset Interrupt using WDOG_AD */ - setbits_le32(CMC1_BASE_ADDR + 0x8C, BIT(13)); - /* Clear AD_PERIPH Power switch domain out of reset interrupt flag */ -@@ -640,52 +733,82 @@ int arch_cpu_init(void) - /* Disable wdog */ - init_wdog(); - -- /* Read DBD_EN fuse */ -- ret = fuse_read(8, 1, &val); -- if (!ret) -- rdc_en = !!(val & 0x4000); -- -- if (get_boot_mode() == SINGLE_BOOT) { -- if (rdc_en) -- release_rdc(RDC_TRDC); -- -- trdc_set_access(); -+ if (get_boot_mode() == SINGLE_BOOT) - lpav_configure(false); -- } else { -+ else - lpav_configure(true); -- } - - /* Release xrdc, then allow A35 to write SRAM2 */ -- if (rdc_en) -+ if (rdc_enabled_in_boot()) - release_rdc(RDC_XRDC); - - xrdc_mrc_region_set_access(2, CONFIG_SPL_TEXT_BASE, 0xE00); - - clock_init_early(); -+ -+ spl_pass_boot_info(); - } else { -+ int ret; - /* reconfigure core0 reset vector to ROM */ - set_core0_reset_vector(0x1000); -+ -+ if (is_m33_handshake_necessary()) { -+ /* Start handshake with M33 to ensure TRDC configuration completed */ -+ ret = m33_image_handshake(1000); -+ if (!ret) -+ gd->arch.m33_handshake_done = true; -+ else /* Skip and go through to panic in checkcpu as console is ready then */ -+ gd->arch.m33_handshake_done = false; -+ } - } - - return 0; - } - --static int imx8ulp_check_mu(void *ctx, struct event *event) -+int checkcpu(void) - { -- struct udevice *devp; -- int node, ret; -+ if (is_m33_handshake_necessary()) { -+ if (!gd->arch.m33_handshake_done) { -+ puts("M33 Sync: Timeout, Boot Stop!\n"); -+ hang(); -+ } else { -+ puts("M33 Sync: OK\n"); -+ } -+ } -+ return 0; -+} - -- node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "fsl,imx8ulp-mu"); -+int imx8ulp_dm_post_init(void) -+{ -+ struct udevice *devp; -+ int ret; -+ u32 res; -+ struct sentinel_get_info_data *info = (struct sentinel_get_info_data *)SRAM0_BASE; - -- ret = uclass_get_device_by_of_offset(UCLASS_MISC, node, &devp); -+ ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(imx8ulp_mu), &devp); - if (ret) { - printf("could not get S400 mu %d\n", ret); - return ret; - } - -+ ret = ahab_get_info(info, &res); -+ if (ret) { -+ printf("ahab_get_info failed %d\n", ret); -+ /* fallback to A0.1 revision */ -+ memset((void *)info, 0, sizeof(struct sentinel_get_info_data)); -+ info->soc = 0xa000084d; -+ } -+ -+ set_cpu_info(info); -+ - return 0; - } --EVENT_SPY(EVT_DM_POST_INIT, imx8ulp_check_mu); -+ -+static int imx8ulp_evt_dm_post_init(void *ctx, struct event *event) -+{ -+ return imx8ulp_dm_post_init(); -+} -+EVENT_SPY(EVT_DM_POST_INIT, imx8ulp_evt_dm_post_init); - - #if defined(CONFIG_SPL_BUILD) - __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) -@@ -737,7 +860,8 @@ int (*card_emmc_is_boot_part_en)(void) = (void *)0x67cc; - u32 spl_arch_boot_image_offset(u32 image_offset, u32 rom_bt_dev) - { - /* Hard code for eMMC image_offset on 8ULP ROM, need fix by ROM, temp workaround */ -- if (((rom_bt_dev >> 16) & 0xff) == BT_DEV_TYPE_MMC && card_emmc_is_boot_part_en()) -+ if (is_soc_rev(CHIP_REV_1_0) && ((rom_bt_dev >> 16) & 0xff) == BT_DEV_TYPE_MMC && -+ card_emmc_is_boot_part_en()) - image_offset = 0; - - return image_offset; -diff --git a/arch/arm/mach-imx/imx8ulp/upower/upower_hal.c b/arch/arm/mach-imx/imx8ulp/upower/upower_hal.c -index b6811d56c9..fcb02ed3af 100644 ---- a/arch/arm/mach-imx/imx8ulp/upower/upower_hal.c -+++ b/arch/arm/mach-imx/imx8ulp/upower/upower_hal.c -@@ -11,6 +11,25 @@ - #include "upower_api.h" - - #define UPOWER_AP_MU1_ADDR 0x29280000 -+ -+#define PS_RTD BIT(0) -+#define PS_DSP BIT(1) -+#define PS_A35_0 BIT(2) -+#define PS_A35_1 BIT(3) -+#define PS_L2 BIT(4) -+#define PS_FAST_NIC BIT(5) -+#define PS_APD_PERIPH BIT(6) -+#define PS_GPU3D BIT(7) -+#define PS_HIFI4 BIT(8) -+#define PS_DDR GENMASK(12, 9) -+#define PS_PXP_EPDC BIT(13) -+#define PS_MIPI_DSI BIT(14) -+#define PS_MIPI_CSI BIT(15) -+#define PS_NIC_LPAV BIT(16) -+#define PS_FUSION_AO BIT(17) -+#define PS_FUSE BIT(18) -+#define PS_UPOWER BIT(19) -+ - static struct mu_type *muptr = (struct mu_type *)UPOWER_AP_MU1_ADDR; - - void upower_wait_resp(void) -@@ -110,6 +129,7 @@ int upower_init(void) - u32 fw_major, fw_minor, fw_vfixes; - u32 soc_id; - int status; -+ enum upwr_resp err_code; - - u32 swton; - u64 memon; -@@ -140,27 +160,92 @@ int upower_init(void) - } - } while (0); - -- swton = 0xfff80; -+ swton = PS_UPOWER | PS_FUSE | PS_FUSION_AO | PS_NIC_LPAV | PS_PXP_EPDC | PS_DDR | -+ PS_HIFI4 | PS_GPU3D | PS_MIPI_DSI; - ret = upwr_pwm_power_on(&swton, NULL, NULL); - if (ret) - printf("Turn on switches fail %d\n", ret); - else -- printf("Turn on switches ok\n"); -+ printf("Turning on switches...\n"); -+ - upower_wait_resp(); -- ret = upwr_poll_req_status(UPWR_SG_PWRMGMT, NULL, NULL, &ret_val, 1000); -+ ret = upwr_poll_req_status(UPWR_SG_PWRMGMT, NULL, &err_code, &ret_val, 1000); - if (ret != UPWR_REQ_OK) -- printf("Failure %d\n", ret); -+ printf("Turn on switches faliure %d, err_code %d, ret_val 0x%x\n", ret, err_code, ret_val); -+ else -+ printf("Turn on switches ok\n"); - -- memon = 0x3FFFFFFFFFFFFCUL; -- ret = upwr_pwm_power_on(NULL, (const u32 *)&memon, NULL); -+ /* -+ * Ascending Order -> bit [0:54) -+ * CA35 Core 0 L1 cache -+ * CA35 Core 1 L1 cache -+ * L2 Cache 0 -+ * L2 Cache 1 -+ * L2 Cache victim/tag -+ * CAAM Secure RAM -+ * DMA1 RAM -+ * FlexSPI2 FIFO, Buffer -+ * SRAM0 -+ * AD ROM -+ * USB0 TX/RX RAM -+ * uSDHC0 FIFO RAM -+ * uSDHC1 FIFO RAM -+ * uSDHC2 FIFO and USB1 TX/RX RAM -+ * GIC RAM -+ * ENET TX FIXO -+ * Reserved(Brainshift) -+ * DCNano Tile2Linear and RGB Correction -+ * DCNano Cursor and FIFO -+ * EPDC LUT -+ * EPDC FIFO -+ * DMA2 RAM -+ * GPU2D RAM Group 1 -+ * GPU2D RAM Group 2 -+ * GPU3D RAM Group 1 -+ * GPU3D RAM Group 2 -+ * HIFI4 Caches, IRAM, DRAM -+ * ISI Buffers -+ * MIPI-CSI FIFO -+ * MIPI-DSI FIFO -+ * PXP Caches, Buffers -+ * SRAM1 -+ * Casper RAM -+ * DMA0 RAM -+ * FlexCAN RAM -+ * FlexSPI0 FIFO, Buffer -+ * FlexSPI1 FIFO, Buffer -+ * CM33 Cache -+ * PowerQuad RAM -+ * ETF RAM -+ * Sentinel PKC, Data RAM1, Inst RAM0/1 -+ * Sentinel ROM -+ * uPower IRAM/DRAM -+ * uPower ROM -+ * CM33 ROM -+ * SSRAM Partition 0 -+ * SSRAM Partition 1 -+ * SSRAM Partition 2,3,4 -+ * SSRAM Partition 5 -+ * SSRAM Partition 6 -+ * SSRAM Partition 7_a(128KB) -+ * SSRAM Partition 7_b(64KB) -+ * SSRAM Partition 7_c(64KB) -+ * Sentinel Data RAM0, Inst RAM2 -+ */ -+ /* MIPI-CSI FIFO BIT28 not set */ -+ memon = 0x3FFFFFEFFFFFFCUL; -+ ret = upwr_pwm_power_on(NULL, (const uint32_t *)&memon, NULL); - if (ret) - printf("Turn on memories fail %d\n", ret); - else -- printf("Turn on memories ok\n"); -+ printf("Turning on memories...\n"); -+ - upower_wait_resp(); -- ret = upwr_poll_req_status(UPWR_SG_PWRMGMT, NULL, NULL, &ret_val, 1000); -+ ret = upwr_poll_req_status(UPWR_SG_PWRMGMT, NULL, &err_code, &ret_val, 1000); - if (ret != UPWR_REQ_OK) -- printf("Failure %d\n", ret); -+ printf("Turn on memories faliure %d, err_code %d, ret_val 0x%x\n", ret, err_code, ret_val); -+ else -+ printf("Turn on memories ok\n"); - - mdelay(1); - -@@ -168,13 +253,14 @@ int upower_init(void) - if (ret) - printf("Clear DDR retention fail %d\n", ret); - else -- printf("Clear DDR retention ok\n"); -+ printf("Clearing DDR retention...\n"); - - upower_wait_resp(); -- -- ret = upwr_poll_req_status(UPWR_SG_EXCEPT, NULL, NULL, &ret_val, 1000); -+ ret = upwr_poll_req_status(UPWR_SG_EXCEPT, NULL, &err_code, &ret_val, 1000); - if (ret != UPWR_REQ_OK) -- printf("Failure %d\n", ret); -+ printf("Clear DDR retention fail %d, err_code %d, ret_val 0x%x\n", ret, err_code, ret_val); -+ else -+ printf("Clear DDR retention ok\n"); - - return 0; - } -diff --git a/arch/arm/mach-imx/imx9/Makefile b/arch/arm/mach-imx/imx9/Makefile -index 6d038a60c6..e1b09ab534 100644 ---- a/arch/arm/mach-imx/imx9/Makefile -+++ b/arch/arm/mach-imx/imx9/Makefile -@@ -4,7 +4,6 @@ - - obj-y += lowlevel_init.o - obj-y += soc.o clock.o clock_root.o trdc.o --obj-$(CONFIG_AHAB_BOOT) += ahab.o - - #ifndef CONFIG_SPL_BUILD - obj-y += imx_bootaux.o -diff --git a/arch/arm/mach-imx/imx9/ahab.c b/arch/arm/mach-imx/imx9/ahab.c -deleted file mode 100644 -index 6aa949619b..0000000000 ---- a/arch/arm/mach-imx/imx9/ahab.c -+++ /dev/null -@@ -1,346 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0+ --/* -- * Copyright 2022 NXP -- */ -- --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include -- --DECLARE_GLOBAL_DATA_PTR; -- --#define IMG_CONTAINER_BASE (0x80000000UL) --#define IMG_CONTAINER_END_BASE (IMG_CONTAINER_BASE + 0xFFFFUL) -- --#define AHAB_NO_AUTHENTICATION_IND 0xee --#define AHAB_BAD_KEY_HASH_IND 0xfa --#define AHAB_INVALID_KEY_IND 0xf9 --#define AHAB_BAD_SIGNATURE_IND 0xf0 --#define AHAB_BAD_HASH_IND 0xf1 -- --static void display_ahab_auth_ind(u32 event) --{ -- u8 resp_ind = (event >> 8) & 0xff; -- -- switch (resp_ind) { -- case AHAB_NO_AUTHENTICATION_IND: -- printf("AHAB_NO_AUTHENTICATION_IND (0x%02X)\n\n", resp_ind); -- break; -- case AHAB_BAD_KEY_HASH_IND: -- printf("AHAB_BAD_KEY_HASH_IND (0x%02X)\n\n", resp_ind); -- break; -- case AHAB_INVALID_KEY_IND: -- printf("AHAB_INVALID_KEY_IND (0x%02X)\n\n", resp_ind); -- break; -- case AHAB_BAD_SIGNATURE_IND: -- printf("AHAB_BAD_SIGNATURE_IND (0x%02X)\n\n", resp_ind); -- break; -- case AHAB_BAD_HASH_IND: -- printf("AHAB_BAD_HASH_IND (0x%02X)\n\n", resp_ind); -- break; -- default: -- printf("Unknown Indicator (0x%02X)\n\n", resp_ind); -- break; -- } --} -- --int ahab_auth_cntr_hdr(struct container_hdr *container, u16 length) --{ -- int err; -- u32 resp; -- -- memcpy((void *)IMG_CONTAINER_BASE, (const void *)container, -- ALIGN(length, CONFIG_SYS_CACHELINE_SIZE)); -- -- flush_dcache_range(IMG_CONTAINER_BASE, -- IMG_CONTAINER_BASE + ALIGN(length, CONFIG_SYS_CACHELINE_SIZE) - 1); -- -- err = ahab_auth_oem_ctnr(IMG_CONTAINER_BASE, &resp); -- if (err) { -- printf("Authenticate container hdr failed, return %d, resp 0x%x\n", -- err, resp); -- display_ahab_auth_ind(resp); -- } -- -- return err; --} -- --int ahab_auth_release(void) --{ -- int err; -- u32 resp; -- -- err = ahab_release_container(&resp); -- if (err) { -- printf("Error: release container failed, resp 0x%x!\n", resp); -- display_ahab_auth_ind(resp); -- } -- -- return err; --} -- --int ahab_verify_cntr_image(struct boot_img_t *img, int image_index) --{ -- int err; -- u32 resp; -- -- err = ahab_verify_image(image_index, &resp); -- if (err) { -- printf("Authenticate img %d failed, return %d, resp 0x%x\n", -- image_index, err, resp); -- display_ahab_auth_ind(resp); -- -- return -EIO; -- } -- -- return 0; --} -- --static inline bool check_in_dram(ulong addr) --{ -- int i; -- struct bd_info *bd = gd->bd; -- -- for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { -- if (bd->bi_dram[i].size) { -- if (addr >= bd->bi_dram[i].start && -- addr < (bd->bi_dram[i].start + bd->bi_dram[i].size)) -- return true; -- } -- } -- -- return false; --} -- --int authenticate_os_container(ulong addr) --{ -- struct container_hdr *phdr; -- int i, ret = 0; -- int err; -- u16 length; -- struct boot_img_t *img; -- unsigned long s, e; -- -- if (addr % 4) { -- puts("Error: Image's address is not 4 byte aligned\n"); -- return -EINVAL; -- } -- -- if (!check_in_dram(addr)) { -- puts("Error: Image's address is invalid\n"); -- return -EINVAL; -- } -- -- phdr = (struct container_hdr *)addr; -- if (phdr->tag != 0x87 || phdr->version != 0x0) { -- printf("Error: Wrong container header\n"); -- return -EFAULT; -- } -- -- if (!phdr->num_images) { -- printf("Error: Wrong container, no image found\n"); -- return -EFAULT; -- } -- -- length = phdr->length_lsb + (phdr->length_msb << 8); -- -- debug("container length %u\n", length); -- -- err = ahab_auth_cntr_hdr(phdr, length); -- if (err) { -- ret = -EIO; -- goto exit; -- } -- -- debug("Verify images\n"); -- -- /* Copy images to dest address */ -- for (i = 0; i < phdr->num_images; i++) { -- img = (struct boot_img_t *)(addr + -- sizeof(struct container_hdr) + -- i * sizeof(struct boot_img_t)); -- -- debug("img %d, dst 0x%x, src 0x%lx, size 0x%x\n", -- i, (uint32_t)img->dst, img->offset + addr, img->size); -- -- memcpy((void *)img->dst, (const void *)(img->offset + addr), -- img->size); -- -- s = img->dst & ~(CONFIG_SYS_CACHELINE_SIZE - 1); -- e = ALIGN(img->dst + img->size, CONFIG_SYS_CACHELINE_SIZE) - 1; -- -- flush_dcache_range(s, e); -- -- ret = ahab_verify_cntr_image(img, i); -- if (ret) -- goto exit; -- } -- --exit: -- debug("ahab_auth_release, 0x%x\n", ret); -- ahab_auth_release(); -- -- return ret; --} -- --static int do_authenticate(struct cmd_tbl *cmdtp, int flag, int argc, -- char *const argv[]) --{ -- ulong addr; -- -- if (argc < 2) -- return CMD_RET_USAGE; -- -- addr = simple_strtoul(argv[1], NULL, 16); -- -- printf("Authenticate OS container at 0x%lx\n", addr); -- -- if (authenticate_os_container(addr)) -- return CMD_RET_FAILURE; -- -- return CMD_RET_SUCCESS; --} -- --static void display_life_cycle(u32 lc) --{ -- printf("Lifecycle: 0x%08X, ", lc); -- switch (lc) { -- case 0x1: -- printf("BLANK\n\n"); -- break; -- case 0x2: -- printf("FAB\n\n"); -- break; -- case 0x4: -- printf("NXP Provisioned\n\n"); -- break; -- case 0x8: -- printf("OEM Open\n\n"); -- break; -- case 0x10: -- printf("OEM Secure World Closed\n\n"); -- break; -- case 0x20: -- printf("OEM closed\n\n"); -- break; -- case 0x40: -- printf("Field Return OEM\n\n"); -- break; -- case 0x80: -- printf("Field Return NXP\n\n"); -- break; -- case 0x100: -- printf("OEM Locked\n\n"); -- break; -- case 0x200: -- printf("BRICKED\n\n"); -- break; -- default: -- printf("Unknown\n\n"); -- break; -- } --} -- --static int confirm_close(void) --{ -- puts("Warning: Please ensure your sample is in NXP closed state, " -- "OEM SRK hash has been fused, \n" -- " and you are able to boot a signed image successfully " -- "without any SECO events reported.\n" -- " If not, your sample will be unrecoverable.\n" -- "\nReally perform this operation? \n"); -- -- if (confirm_yesno()) -- return 1; -- -- puts("Ahab close aborted\n"); -- return 0; --} -- --static int do_ahab_close(struct cmd_tbl *cmdtp, int flag, int argc, -- char *const argv[]) --{ -- int err; -- u32 resp; -- -- if (!confirm_close()) -- return -EACCES; -- -- err = ahab_forward_lifecycle(8, &resp); -- if (err != 0) { -- printf("Error in forward lifecycle to OEM closed\n"); -- return -EIO; -- } -- -- printf("Change to OEM closed successfully\n"); -- -- return 0; --} -- --int ahab_dump(void) --{ -- u32 buffer[32]; -- int ret, i = 0; -- -- do { -- ret = ahab_dump_buffer(buffer, 32); -- if (ret < 0) { -- printf("Error in dump AHAB log\n"); -- return -EIO; -- } -- -- if (ret == 1) -- break; -- for (i = 0; i < ret; i++) -- printf("0x%x\n", buffer[i]); -- } while (ret >= 21); -- -- return 0; --} -- --static int do_ahab_dump(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) --{ -- return ahab_dump(); --} -- --static int do_ahab_status(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) --{ -- u32 lc; -- -- lc = readl(FSB_BASE_ADDR + 0x41c); -- lc &= 0x3ff; -- -- display_life_cycle(lc); -- return 0; --} -- --U_BOOT_CMD(auth_cntr, CONFIG_SYS_MAXARGS, 1, do_authenticate, -- "autenticate OS container via AHAB", -- "addr\n" -- "addr - OS container hex address\n" --); -- --U_BOOT_CMD(ahab_close, CONFIG_SYS_MAXARGS, 1, do_ahab_close, -- "Change AHAB lifecycle to OEM closed", -- "" --); -- --U_BOOT_CMD(ahab_dump, CONFIG_SYS_MAXARGS, 1, do_ahab_dump, -- "Dump AHAB log for debug", -- "" --); -- --U_BOOT_CMD(ahab_status, CONFIG_SYS_MAXARGS, 1, do_ahab_status, -- "display AHAB lifecycle only", -- "" --); -diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c -index 797d7a802b..a16e22ea6b 100644 ---- a/arch/arm/mach-imx/imx9/soc.c -+++ b/arch/arm/mach-imx/imx9/soc.c -@@ -208,11 +208,6 @@ int print_cpuinfo(void) - return 0; - } - --int arch_misc_init(void) --{ -- return 0; --} -- - int ft_system_setup(void *blob, struct bd_info *bd) - { - return 0; -diff --git a/arch/arm/mach-imx/imx9/trdc.c b/arch/arm/mach-imx/imx9/trdc.c -index 3f37ce712c..e05c704810 100644 ---- a/arch/arm/mach-imx/imx9/trdc.c -+++ b/arch/arm/mach-imx/imx9/trdc.c -@@ -339,7 +339,7 @@ int release_rdc(u8 xrdc) - msg.version = AHAB_VERSION; - msg.tag = AHAB_CMD_TAG; - msg.size = 2; -- msg.command = AHAB_RELEASE_RDC_REQ_CID; -+ msg.command = ELE_RELEASE_RDC_REQ; - msg.data[0] = (rdc_id << 8) | 0x2; /* A55 */ - - mu_hal_init(s_mu_base); -diff --git a/arch/arm/mach-imx/spl_imx_romapi.c b/arch/arm/mach-imx/spl_imx_romapi.c -index aa5d23a6fb..830d5d12c2 100644 ---- a/arch/arm/mach-imx/spl_imx_romapi.c -+++ b/arch/arm/mach-imx/spl_imx_romapi.c -@@ -341,15 +341,35 @@ int board_return_to_bootrom(struct spl_image_info *spl_image, - struct spl_boot_device *bootdev) - { - int ret; -- u32 boot; -+ u32 boot, bstage; - - ret = rom_api_query_boot_infor(QUERY_BT_DEV, &boot); -+ ret |= rom_api_query_boot_infor(QUERY_BT_STAGE, &bstage); - - if (ret != ROM_API_OKAY) { - puts("ROMAPI: failure at query_boot_info\n"); - return -1; - } - -+ printf("Boot Stage: "); -+ -+ switch (bstage) { -+ case BT_STAGE_PRIMARY: -+ printf("Primary boot\n"); -+ break; -+ case BT_STAGE_SECONDARY: -+ printf("Secondary boot\n"); -+ break; -+ case BT_STAGE_RECOVERY: -+ printf("Recovery boot\n"); -+ break; -+ case BT_STAGE_USB: -+ printf("USB boot\n"); -+ break; -+ default: -+ printf("Unknow (0x%x)\n", bstage); -+ } -+ - if (is_boot_from_stream_device(boot)) - return spl_romapi_load_image_stream(spl_image, bootdev); - -diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig -index a8c3a593d5..7edbac26cc 100644 ---- a/arch/arm/mach-k3/Kconfig -+++ b/arch/arm/mach-k3/Kconfig -@@ -187,6 +187,11 @@ config K3_X509_SWRV - help - SWRV for X509 certificate used for boot images - -+config K3_BOARD_DETECT -+ bool "Support for Board detection" -+ help -+ Support for board detection. -+ - source "board/ti/am65x/Kconfig" - source "board/ti/am64x/Kconfig" - source "board/ti/am62x/Kconfig" -diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c -index 96f292ea75..1bf7e163cc 100644 ---- a/arch/arm/mach-k3/am642_init.c -+++ b/arch/arm/mach-k3/am642_init.c -@@ -100,7 +100,7 @@ void do_dt_magic(void) - { - int ret, rescan; - -- if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT)) -+ if (IS_ENABLED(CONFIG_K3_BOARD_DETECT)) - do_board_detect(); - - /* -diff --git a/arch/arm/mach-k3/am654_init.c b/arch/arm/mach-k3/am654_init.c -index 768fdd6960..70059edb03 100644 ---- a/arch/arm/mach-k3/am654_init.c -+++ b/arch/arm/mach-k3/am654_init.c -@@ -245,8 +245,7 @@ void board_init_f(ulong dummy) - /* Output System Firmware version info */ - k3_sysfw_print_ver(); - -- /* Perform EEPROM-based board detection */ -- if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT)) -+ if (IS_ENABLED(CONFIG_K3_BOARD_DETECT)) - do_board_detect(); - - #if defined(CONFIG_CPU_V7R) && defined(CONFIG_K3_AVS0) -diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c -index 276cbb5dae..9cae3ac67e 100644 ---- a/arch/arm/mach-k3/j721e_init.c -+++ b/arch/arm/mach-k3/j721e_init.c -@@ -140,7 +140,7 @@ void do_dt_magic(void) - int ret, rescan, mmc_dev = -1; - static struct mmc *mmc; - -- if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT)) -+ if (IS_ENABLED(CONFIG_K3_BOARD_DETECT)) - do_board_detect(); - - /* -@@ -267,8 +267,7 @@ void board_init_f(ulong dummy) - /* Output System Firmware version info */ - k3_sysfw_print_ver(); - -- /* Perform EEPROM-based board detection */ -- if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT)) -+ if (IS_ENABLED(CONFIG_K3_BOARD_DETECT)) - do_board_detect(); - - #if defined(CONFIG_CPU_V7R) && defined(CONFIG_K3_AVS0) -diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig -index b19ed2c6b3..54027ccb0e 100644 ---- a/arch/arm/mach-kirkwood/Kconfig -+++ b/arch/arm/mach-kirkwood/Kconfig -@@ -5,9 +5,11 @@ config FEROCEON_88FR131 - - config KW88F6192 - bool -+ select ARCH_VERY_EARLY_INIT - - config KW88F6281 - bool -+ select ARCH_VERY_EARLY_INIT - - config SHEEVA_88SV131 - bool -diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile -index 3b2eef8d54..0fb5a2326f 100644 ---- a/arch/arm/mach-kirkwood/Makefile -+++ b/arch/arm/mach-kirkwood/Makefile -@@ -6,6 +6,7 @@ - - obj-y = cpu.o - obj-y += cache.o -+obj-y += lowlevel.o - obj-y += mpp.o - - # cpu.o and cache.o contain CP15 instructions which cannot be run in -diff --git a/arch/arm/mach-kirkwood/cpu.c b/arch/arm/mach-kirkwood/cpu.c -index df3e8f1178..2b493b36c2 100644 ---- a/arch/arm/mach-kirkwood/cpu.c -+++ b/arch/arm/mach-kirkwood/cpu.c -@@ -189,9 +189,6 @@ int arch_cpu_init(void) - struct kwcpu_registers *cpureg = - (struct kwcpu_registers *)KW_CPU_REG_BASE; - -- /* Linux expects the internal registers to be at 0xf1000000 */ -- writel(KW_REGS_PHY_BASE, KW_OFFSET_REG); -- - /* Enable and invalidate L2 cache in write through mode */ - writel(readl(&cpureg->l2_cfg) | 0x18, &cpureg->l2_cfg); - invalidate_l2_cache(); -diff --git a/arch/arm/mach-kirkwood/lowlevel.S b/arch/arm/mach-kirkwood/lowlevel.S -new file mode 100644 -index 0000000000..6810384954 ---- /dev/null -+++ b/arch/arm/mach-kirkwood/lowlevel.S -@@ -0,0 +1,12 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+ -+#include -+#include -+ -+ENTRY(arch_very_early_init) -+ /* Move internal registers from KW_OFFSET_REG to KW_REGS_PHY_BASE */ -+ ldr r0, =KW_REGS_PHY_BASE -+ ldr r1, =KW_OFFSET_REG -+ str r0, [r1] -+ bx lr -+ENDPROC(arch_very_early_init) -diff --git a/arch/arm/mach-mediatek/mt7981/init.c b/arch/arm/mach-mediatek/mt7981/init.c -index d8b10f0358..3c921d6ad5 100644 ---- a/arch/arm/mach-mediatek/mt7981/init.c -+++ b/arch/arm/mach-mediatek/mt7981/init.c -@@ -4,6 +4,7 @@ - * Author: Sam Shih - */ - -+#include - #include - #include - #include -@@ -19,7 +20,7 @@ int dram_init(void) - return 0; - } - --void reset_cpu(ulong addr) -+void reset_cpu(void) - { - psci_system_reset(); - } -diff --git a/arch/arm/mach-mediatek/mt7986/init.c b/arch/arm/mach-mediatek/mt7986/init.c -index fb74b2f34d..9d0c0cdcd0 100644 ---- a/arch/arm/mach-mediatek/mt7986/init.c -+++ b/arch/arm/mach-mediatek/mt7986/init.c -@@ -4,6 +4,7 @@ - * Author: Sam Shih - */ - -+#include - #include - #include - #include -@@ -19,7 +20,7 @@ int dram_init(void) - return 0; - } - --void reset_cpu(ulong addr) -+void reset_cpu(void) - { - psci_system_reset(); - } -diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig -index 16c5e72295..b1f2e97ae7 100644 ---- a/arch/arm/mach-mvebu/Kconfig -+++ b/arch/arm/mach-mvebu/Kconfig -@@ -5,7 +5,6 @@ config HAVE_MVEBU_EFUSE - - config ARMADA_32BIT - bool -- select ARCH_MISC_INIT - select BOARD_EARLY_INIT_F - select CPU_V7A - select SPL_DM if SPL -@@ -108,6 +107,7 @@ config TARGET_CLEARFOG - bool "Support ClearFog" - select 88F6820 - select BOARD_LATE_INIT -+ select OF_BOARD_SETUP - - config TARGET_HELIOS4 - bool "Support Helios4" -@@ -331,7 +331,7 @@ choice - depends on SPL - - config MVEBU_SPL_BOOT_DEVICE_SPI -- bool "SPI NOR flash" -+ bool "NOR flash (SPI or parallel)" - imply ENV_IS_IN_SPI_FLASH - imply SPL_DM_SPI - imply SPL_SPI_FLASH_SUPPORT -@@ -339,8 +339,13 @@ config MVEBU_SPL_BOOT_DEVICE_SPI - imply SPL_SPI - select SPL_BOOTROM_SUPPORT - -+config MVEBU_SPL_BOOT_DEVICE_NAND -+ bool "NAND flash (SPI or parallel)" -+ select MTD_RAW_NAND -+ select SPL_BOOTROM_SUPPORT -+ - config MVEBU_SPL_BOOT_DEVICE_MMC -- bool "SDIO/MMC card" -+ bool "eMMC or SD card" - imply ENV_IS_IN_MMC - # GPIO needed for eMMC/SD card presence detection - imply SPL_DM_GPIO -@@ -348,6 +353,8 @@ config MVEBU_SPL_BOOT_DEVICE_MMC - imply SPL_GPIO - imply SPL_LIBDISK_SUPPORT - imply SPL_MMC -+ select SUPPORT_EMMC_BOOT if SPL_MMC -+ select SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR if SPL_MMC - select SPL_BOOTROM_SUPPORT - - config MVEBU_SPL_BOOT_DEVICE_SATA -@@ -356,12 +363,24 @@ config MVEBU_SPL_BOOT_DEVICE_SATA - imply SPL_LIBDISK_SUPPORT - select SPL_BOOTROM_SUPPORT - -+config MVEBU_SPL_BOOT_DEVICE_PEX -+ bool "PCI Express" -+ select SPL_BOOTROM_SUPPORT -+ - config MVEBU_SPL_BOOT_DEVICE_UART - bool "UART" - select SPL_BOOTROM_SUPPORT - - endchoice - -+config MVEBU_SPL_NAND_BADBLK_LOCATION -+ hex "NAND Bad block indicator location" -+ depends on MVEBU_SPL_BOOT_DEVICE_NAND -+ range 0x0 0x1 -+ help -+ Value 0x0 = SLC flash = BBI at page 0 or page 1 -+ Value 0x1 = MLC flash = BBI at last page in the block -+ - config MVEBU_EFUSE - bool "Enable eFuse support" - depends on HAVE_MVEBU_EFUSE -@@ -405,6 +424,16 @@ config SECURED_MODE_CSK_INDEX - default 0 - depends on SECURED_MODE_IMAGE - -+config SF_DEFAULT_SPEED -+ int "Default speed for SPI flash in Hz" -+ default 10000000 -+ depends on MVEBU_SPL_BOOT_DEVICE_SPI -+ -+config SF_DEFAULT_MODE -+ hex "Default mode for SPI flash" -+ default 0x0 -+ depends on MVEBU_SPL_BOOT_DEVICE_SPI -+ - source "board/solidrun/clearfog/Kconfig" - source "board/kobol/helios4/Kconfig" - -diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile -index a9f506cf2f..90f88337bc 100644 ---- a/arch/arm/mach-mvebu/Makefile -+++ b/arch/arm/mach-mvebu/Makefile -@@ -50,16 +50,29 @@ KWB_REPLACE += BOOT_FROM - ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI),) - KWB_CFG_BOOT_FROM=spi - endif -+ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_NAND),) -+ KWB_CFG_BOOT_FROM=nand -+endif - ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC),) - KWB_CFG_BOOT_FROM=sdio - endif - ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA),) - KWB_CFG_BOOT_FROM=sata - endif -+ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_PEX),) -+ KWB_CFG_BOOT_FROM=pex -+endif - ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_UART),) - KWB_CFG_BOOT_FROM=uart - endif - -+ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_NAND),) -+KWB_REPLACE += NAND_PAGE_SIZE NAND_BLKSZ NAND_BADBLK_LOCATION -+KWB_CFG_NAND_PAGE_SIZE = $(CONFIG_SYS_NAND_PAGE_SIZE) -+KWB_CFG_NAND_BLKSZ = $(CONFIG_SYS_NAND_BLOCK_SIZE) -+KWB_CFG_NAND_BADBLK_LOCATION = $(CONFIG_MVEBU_SPL_NAND_BADBLK_LOCATION) -+endif -+ - ifneq ($(CONFIG_SECURED_MODE_IMAGE),) - KWB_REPLACE += CSK_INDEX - KWB_CFG_CSK_INDEX = $(CONFIG_SECURED_MODE_CSK_INDEX) -diff --git a/arch/arm/mach-mvebu/alleycat5/soc.c b/arch/arm/mach-mvebu/alleycat5/soc.c -index efbef233a1..dc69f46eed 100644 ---- a/arch/arm/mach-mvebu/alleycat5/soc.c -+++ b/arch/arm/mach-mvebu/alleycat5/soc.c -@@ -287,12 +287,3 @@ int mach_cpu_init(void) - - return 0; - } -- --int arch_misc_init(void) --{ -- u32 type, rev; -- -- get_soc_type_rev(&type, &rev); -- -- return 0; --} -diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c -index 329d13691f..1676032682 100644 ---- a/arch/arm/mach-mvebu/cpu.c -+++ b/arch/arm/mach-mvebu/cpu.c -@@ -25,7 +25,7 @@ static const struct mbus_win windows[] = { - { MBUS_SPI_BASE, MBUS_SPI_SIZE, - CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_SPIFLASH }, - -- /* NOR */ -+ /* BootROM */ - { MBUS_BOOTROM_BASE, MBUS_BOOTROM_SIZE, - CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_BOOTROM }, - -@@ -35,6 +35,15 @@ static const struct mbus_win windows[] = { - #endif - }; - -+/* SPI0 CS0 Flash of size MBUS_SPI_SIZE is mapped to address MBUS_SPI_BASE */ -+#if CONFIG_ENV_SPI_BUS == 0 && CONFIG_ENV_SPI_CS == 0 && \ -+ CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE <= MBUS_SPI_SIZE -+void *env_sf_get_env_addr(void) -+{ -+ return (void *)MBUS_SPI_BASE + CONFIG_ENV_OFFSET; -+} -+#endif -+ - void lowlevel_init(void) - { - /* -@@ -58,6 +67,10 @@ u32 get_boot_device(void) - { - u32 val; - u32 boot_device; -+ u32 boot_err_mode; -+#ifdef CONFIG_ARMADA_38X -+ u32 boot_err_code; -+#endif - - /* - * First check, if UART boot-mode is active. This can only -@@ -65,9 +78,9 @@ u32 get_boot_device(void) - * MSB marks if the UART mode is active. - */ - val = readl(BOOTROM_ERR_REG); -- boot_device = (val & BOOTROM_ERR_MODE_MASK) >> BOOTROM_ERR_MODE_OFFS; -- debug("BOOTROM_REG=0x%08x boot_device=0x%x\n", val, boot_device); -- if (boot_device == BOOTROM_ERR_MODE_UART) -+ boot_err_mode = (val & BOOTROM_ERR_MODE_MASK) >> BOOTROM_ERR_MODE_OFFS; -+ debug("BOOTROM_ERR_REG=0x%08x boot_err_mode=0x%x\n", val, boot_err_mode); -+ if (boot_err_mode == BOOTROM_ERR_MODE_UART) - return BOOT_DEVICE_UART; - - #ifdef CONFIG_ARMADA_38X -@@ -75,8 +88,9 @@ u32 get_boot_device(void) - * If the bootrom error code contains any other than zeros it's an - * error condition and the bootROM has fallen back to UART boot - */ -- boot_device = (val & BOOTROM_ERR_CODE_MASK) >> BOOTROM_ERR_CODE_OFFS; -- if (boot_device) -+ boot_err_code = (val & BOOTROM_ERR_CODE_MASK) >> BOOTROM_ERR_CODE_OFFS; -+ debug("boot_err_code=0x%x\n", boot_err_code); -+ if (boot_err_code) - return BOOT_DEVICE_UART; - #endif - -@@ -86,31 +100,27 @@ u32 get_boot_device(void) - val = readl(CFG_SAR_REG); /* SAR - Sample At Reset */ - boot_device = (val & BOOT_DEV_SEL_MASK) >> BOOT_DEV_SEL_OFFS; - debug("SAR_REG=0x%08x boot_device=0x%x\n", val, boot_device); -- switch (boot_device) { - #ifdef BOOT_FROM_NAND -- case BOOT_FROM_NAND: -+ if (BOOT_FROM_NAND(boot_device)) - return BOOT_DEVICE_NAND; - #endif - #ifdef BOOT_FROM_MMC -- case BOOT_FROM_MMC: -- case BOOT_FROM_MMC_ALT: -+ if (BOOT_FROM_MMC(boot_device)) - return BOOT_DEVICE_MMC1; - #endif -- case BOOT_FROM_UART: --#ifdef BOOT_FROM_UART_ALT -- case BOOT_FROM_UART_ALT: --#endif -+#ifdef BOOT_FROM_UART -+ if (BOOT_FROM_UART(boot_device)) - return BOOT_DEVICE_UART; -+#endif - #ifdef BOOT_FROM_SATA -- case BOOT_FROM_SATA: -- case BOOT_FROM_SATA_ALT: -+ if (BOOT_FROM_SATA(boot_device)) - return BOOT_DEVICE_SATA; - #endif -- case BOOT_FROM_SPI: -+#ifdef BOOT_FROM_SPI -+ if (BOOT_FROM_SPI(boot_device)) - return BOOT_DEVICE_SPI; -- default: -- return BOOT_DEVICE_BOOTROM; -- }; -+#endif -+ return BOOT_DEVICE_BOOTROM; - } - - #if defined(CONFIG_DISPLAY_CPUINFO) -@@ -514,17 +524,6 @@ u32 mvebu_get_nand_clock(void) - NAND_ECC_DIVCKL_RATIO_MASK) >> NAND_ECC_DIVCKL_RATIO_OFFS); - } - --/* -- * SOC specific misc init -- */ --#if defined(CONFIG_ARCH_MISC_INIT) --int arch_misc_init(void) --{ -- /* Nothing yet, perhaps we need something here later */ -- return 0; --} --#endif /* CONFIG_ARCH_MISC_INIT */ -- - #if defined(CONFIG_MMC_SDHCI_MV) && !defined(CONFIG_DM_MMC) - int board_mmc_init(struct bd_info *bis) - { -diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h -index c17c2440f1..904e7157ba 100644 ---- a/arch/arm/mach-mvebu/include/mach/cpu.h -+++ b/arch/arm/mach-mvebu/include/mach/cpu.h -@@ -66,17 +66,38 @@ enum cpu_attrib { - /* - * Default Device Address MAP BAR values - */ -+#ifdef CONFIG_SPL_BUILD -+#ifdef CONFIG_ARMADA_38X -+#define MBUS_PCI_MEM_BASE 0x88000000 -+#define MBUS_PCI_MEM_SIZE ((3 * 128) << 20) -+#else -+#define MBUS_PCI_MEM_BASE 0x80000000 -+#define MBUS_PCI_MEM_SIZE ((4 * 128) << 20) -+#endif -+#else - #define MBUS_PCI_MAX_PORTS 6 - #define MBUS_PCI_MEM_BASE MVEBU_SDRAM_SIZE_MAX - #define MBUS_PCI_MEM_SIZE ((MBUS_PCI_MAX_PORTS * 128) << 20) - #define MBUS_PCI_IO_BASE 0xF1100000 - #define MBUS_PCI_IO_SIZE ((MBUS_PCI_MAX_PORTS * 64) << 10) -+#endif -+#ifdef CONFIG_SPL_BUILD -+#define MBUS_SPI_BASE 0xD4000000 -+#define MBUS_SPI_SIZE (64 << 20) -+#else - #define MBUS_SPI_BASE 0xF4000000 - #define MBUS_SPI_SIZE (8 << 20) -+#endif -+#ifndef CONFIG_SPL_BUILD - #define MBUS_DFX_BASE 0xF6000000 - #define MBUS_DFX_SIZE (1 << 20) -+#endif - #define MBUS_BOOTROM_BASE 0xF8000000 -+#ifdef CONFIG_SPL_BUILD -+#define MBUS_BOOTROM_SIZE (128 << 20) -+#else - #define MBUS_BOOTROM_SIZE (8 << 20) -+#endif - - struct mbus_win { - u32 base; -diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h -index 6edd2e2d79..dc68d406f9 100644 ---- a/arch/arm/mach-mvebu/include/mach/soc.h -+++ b/arch/arm/mach-mvebu/include/mach/soc.h -@@ -128,7 +128,14 @@ - #define BOOTROM_ERR_REG (MVEBU_REGISTER(0x182d0)) - #define BOOTROM_ERR_MODE_OFFS 28 - #define BOOTROM_ERR_MODE_MASK (0xf << BOOTROM_ERR_MODE_OFFS) -+#define BOOTROM_ERR_MODE_MAIN 0x2 -+#define BOOTROM_ERR_MODE_EXEC 0x3 - #define BOOTROM_ERR_MODE_UART 0x6 -+#define BOOTROM_ERR_MODE_PEX 0x8 -+#define BOOTROM_ERR_MODE_NOR 0x9 -+#define BOOTROM_ERR_MODE_NAND 0xA -+#define BOOTROM_ERR_MODE_SATA 0xB -+#define BOOTROM_ERR_MODE_MMC 0xE - #define BOOTROM_ERR_CODE_OFFS 0 - #define BOOTROM_ERR_CODE_MASK (0xf << BOOTROM_ERR_CODE_OFFS) - -@@ -143,8 +150,8 @@ - #define BOOT_DEV_SEL_OFFS 3 - #define BOOT_DEV_SEL_MASK (0x3f << BOOT_DEV_SEL_OFFS) - --#define BOOT_FROM_UART 0x30 --#define BOOT_FROM_SPI 0x38 -+#define BOOT_FROM_UART(x) (x == 0x30) -+#define BOOT_FROM_SPI(x) (x == 0x38) - - #define CFG_SYS_TCLK ((readl(CFG_SAR_REG) & BIT(20)) ? \ - 200000000 : 166000000) -@@ -160,14 +167,14 @@ - #define BOOT_DEV_SEL_OFFS 4 - #define BOOT_DEV_SEL_MASK (0x3f << BOOT_DEV_SEL_OFFS) - --#define BOOT_FROM_NAND 0x0A --#define BOOT_FROM_SATA 0x22 --#define BOOT_FROM_UART 0x28 --#define BOOT_FROM_SATA_ALT 0x2A --#define BOOT_FROM_UART_ALT 0x3f --#define BOOT_FROM_SPI 0x32 --#define BOOT_FROM_MMC 0x30 --#define BOOT_FROM_MMC_ALT 0x31 -+#define BOOT_FROM_NOR(x) ((x >= 0x00 && x <= 0x07) || x == 0x16 || x == 0x17 || x == 0x2E || x == 0x2F || (x >= 0x3A && x <= 0x3C)) -+#define BOOT_FROM_NAND(x) ((x >= 0x08 && x <= 0x15) || (x >= 0x18 && x <= 0x25)) -+#define BOOT_FROM_SPINAND(x) (x == 0x26 || x == 0x27) -+#define BOOT_FROM_UART(x) (x == 0x28 || x == 0x29) -+#define BOOT_FROM_SATA(x) (x == 0x2A || x == 0x2B) -+#define BOOT_FROM_PEX(x) (x == 0x2C || x == 0x2D) -+#define BOOT_FROM_MMC(x) (x == 0x30 || x == 0x31) -+#define BOOT_FROM_SPI(x) (x >= 0x32 && x <= 0x39) - - #define CFG_SYS_TCLK ((readl(CFG_SAR_REG) & BIT(15)) ? \ - 200000000 : 250000000) -@@ -184,9 +191,9 @@ - #define BOOT_DEV_SEL_OFFS 11 - #define BOOT_DEV_SEL_MASK (0x7 << BOOT_DEV_SEL_OFFS) - --#define BOOT_FROM_NAND 0x1 --#define BOOT_FROM_UART 0x2 --#define BOOT_FROM_SPI 0x3 -+#define BOOT_FROM_NAND(x) (x == 0x1) -+#define BOOT_FROM_UART(x) (x == 0x2) -+#define BOOT_FROM_SPI(x) (x == 0x3) - - #define CFG_SYS_TCLK 200000000 /* 200MHz */ - #elif defined(CONFIG_ARMADA_XP) -@@ -206,8 +213,12 @@ - #define BOOT_DEV_SEL_OFFS 5 - #define BOOT_DEV_SEL_MASK (0xf << BOOT_DEV_SEL_OFFS) - --#define BOOT_FROM_UART 0x2 --#define BOOT_FROM_SPI 0x3 -+#define BOOT_FROM_NOR(x) (x == 0x0) -+#define BOOT_FROM_NAND(x) (x == 0x1) -+#define BOOT_FROM_UART(x) (x == 0x2) -+#define BOOT_FROM_SPI(x) (x == 0x3) -+#define BOOT_FROM_PEX(x) (x == 0x4) -+#define BOOT_FROM_SATA(x) (x == 0x5) - - #define CFG_SYS_TCLK 250000000 /* 250MHz */ - #endif -diff --git a/arch/arm/mach-mvebu/kwbimage.cfg.in b/arch/arm/mach-mvebu/kwbimage.cfg.in -index ccb0997581..90cf00c5b9 100644 ---- a/arch/arm/mach-mvebu/kwbimage.cfg.in -+++ b/arch/arm/mach-mvebu/kwbimage.cfg.in -@@ -11,6 +11,11 @@ VERSION 1 - # Boot Media configurations - #@BOOT_FROM - -+# NAND configuration -+#@NAND_PAGE_SIZE -+#@NAND_BLKSZ -+#@NAND_BADBLK_LOCATION -+ - # Enable BootROM output via DEBUG flag on SoCs which require it - #@DEBUG - -diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c -index 943ae01942..3349f4eb54 100644 ---- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c -+++ b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c -@@ -53,7 +53,7 @@ u8 serdes_lane_in_use_count[MAX_UNITS_ID][MAX_UNIT_NUMB] = { - */ - u8 serdes_unit_count[MAX_UNITS_ID] = { 0 }; - --/* Selector mapping for A380-A0 and A390-Z1 */ -+/* Selector mapping for A380-A0 */ - u8 selectors_serdes_rev2_map[LAST_SERDES_TYPE][MAX_SERDES_LANES] = { - /* 0 1 2 3 4 5 6 */ - { 0x1, 0x1, NA, NA, NA, NA, NA }, /* PEX0 */ -@@ -812,7 +812,7 @@ u8 hws_ctrl_serdes_rev_get(void) - if (sys_env_device_rev_get() == MV_88F68XX_Z1_ID) - return MV_SERDES_REV_1_2; - -- /* for A39x-Z1, A38x-A0 */ -+ /* for A38x-A0 */ - return MV_SERDES_REV_2_1; - } - -diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h -index dd229e1a47..6925a9d236 100644 ---- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h -+++ b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h -@@ -15,12 +15,12 @@ - #define SET_BIT(data, bit) ((data) | (0x1 << (bit))) - #define CLEAR_BIT(data, bit) ((data) & (~(0x1 << (bit)))) - --#define MAX_SERDES_LANES 7 /* as in a39x */ -+#define MAX_SERDES_LANES 7 - - /* Serdes revision */ - /* Serdes revision 1.2 (for A38x-Z1) */ - #define MV_SERDES_REV_1_2 0x0 --/* Serdes revision 2.1 (for A39x-Z1, A38x-A0) */ -+/* Serdes revision 2.1 (for A38x-A0) */ - #define MV_SERDES_REV_2_1 0x1 - #define MV_SERDES_REV_NA 0xff - -diff --git a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c -index 950680a581..fb8ec11dfb 100644 ---- a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c -+++ b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c -@@ -145,10 +145,6 @@ u32 sys_env_id_index_get(u32 ctrl_model) - return MV_6811_INDEX; - case MV_6828_DEV_ID: - return MV_6828_INDEX; -- case MV_6920_DEV_ID: -- return MV_6920_INDEX; -- case MV_6928_DEV_ID: -- return MV_6928_INDEX; - default: - return MV_6820_INDEX; - } -@@ -183,11 +179,9 @@ u16 sys_env_model_get(void) - case MV_6810_DEV_ID: - case MV_6811_DEV_ID: - case MV_6828_DEV_ID: -- case MV_6920_DEV_ID: -- case MV_6928_DEV_ID: - return ctrl_id; - default: -- /* Device ID Default for A38x: 6820 , for A39x: 6920 */ -+ /* Device ID Default for A38x: 6820 */ - default_ctrl_id = MV_6820_DEV_ID; - printf("%s: Error retrieving device ID (%x), using default ID = %x\n", - __func__, ctrl_id, default_ctrl_id); -@@ -201,8 +195,8 @@ u16 sys_env_model_get(void) - */ - u32 sys_env_device_id_get(void) - { -- char *device_id_str[7] = { -- "6810", "6820", "6811", "6828", "NONE", "6920", "6928" -+ char *device_id_str[4] = { -+ "6810", "6820", "6811", "6828", - }; - - if (g_dev_id != -1) -@@ -210,7 +204,7 @@ u32 sys_env_device_id_get(void) - - g_dev_id = reg_read(DEVICE_SAMPLE_AT_RESET1_REG); - g_dev_id = g_dev_id >> SAR_DEV_ID_OFFS & SAR_DEV_ID_MASK; -- printf("Detected Device ID %s\n", device_id_str[g_dev_id]); -+ printf("Detected Device ID %s\n", g_dev_id < 4 ? device_id_str[g_dev_id] : "NONE"); - - return g_dev_id; - } -diff --git a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h -index 94c43b4daf..20039f72d8 100644 ---- a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h -+++ b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h -@@ -198,22 +198,6 @@ - #define A38X_MV_MARVELL_BOARD_NUM (A38X_MV_MAX_MARVELL_BOARD_ID - \ - A38X_MARVELL_BOARD_ID_BASE) - --/* Customer boards for A39x */ --#define A39X_CUSTOMER_BOARD_ID_BASE 0x20 --#define A39X_CUSTOMER_BOARD_ID0 (A39X_CUSTOMER_BOARD_ID_BASE + 0) --#define A39X_CUSTOMER_BOARD_ID1 (A39X_CUSTOMER_BOARD_ID_BASE + 1) --#define A39X_MV_MAX_CUSTOMER_BOARD_ID (A39X_CUSTOMER_BOARD_ID_BASE + 2) --#define A39X_MV_CUSTOMER_BOARD_NUM (A39X_MV_MAX_CUSTOMER_BOARD_ID - \ -- A39X_CUSTOMER_BOARD_ID_BASE) -- --/* Marvell boards for A39x */ --#define A39X_MARVELL_BOARD_ID_BASE 0x30 --#define A39X_DB_69XX_ID (A39X_MARVELL_BOARD_ID_BASE + 0) --#define A39X_RD_69XX_ID (A39X_MARVELL_BOARD_ID_BASE + 1) --#define A39X_MV_MAX_MARVELL_BOARD_ID (A39X_MARVELL_BOARD_ID_BASE + 2) --#define A39X_MV_MARVELL_BOARD_NUM (A39X_MV_MAX_MARVELL_BOARD_ID - \ -- A39X_MARVELL_BOARD_ID_BASE) -- - #define CUTOMER_BOARD_ID_BASE A38X_CUSTOMER_BOARD_ID_BASE - #define CUSTOMER_BOARD_ID0 A38X_CUSTOMER_BOARD_ID0 - #define CUSTOMER_BOARD_ID1 A38X_CUSTOMER_BOARD_ID1 -@@ -236,8 +220,6 @@ - #define MV_88F68XX_Z1_ID 0x0 - #define MV_88F68XX_A0_ID 0x4 - #define MV_88F68XX_B0_ID 0xa --/* A39x revisions */ --#define MV_88F69XX_Z1_ID 0x2 - - #define MPP_CONTROL_REG(id) (0x18000 + (id * 4)) - #define GPP_DATA_OUT_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x00) -@@ -257,19 +239,12 @@ - #define MV_6811_DEV_ID 0x6811 - #define MV_6820_DEV_ID 0x6820 - #define MV_6828_DEV_ID 0x6828 --/* Armada 39x Family */ --#define MV_6920_DEV_ID 0x6920 --#define MV_6928_DEV_ID 0x6928 - - enum { - MV_6810, - MV_6820, - MV_6811, - MV_6828, -- MV_NONE, -- MV_6920, -- MV_6928, -- MV_MAX_DEV_ID, - }; - - #define MV_6820_INDEX 0 -@@ -277,17 +252,12 @@ enum { - #define MV_6811_INDEX 2 - #define MV_6828_INDEX 3 - --#define MV_6920_INDEX 0 --#define MV_6928_INDEX 1 -- - #define MAX_DEV_ID_NUM 4 - - #define MV_6820_INDEX 0 - #define MV_6810_INDEX 1 - #define MV_6811_INDEX 2 - #define MV_6828_INDEX 3 --#define MV_6920_INDEX 0 --#define MV_6928_INDEX 1 - - enum unit_id { - PEX_UNIT_ID, -diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c -index 424599286e..6b8c72a71d 100644 ---- a/arch/arm/mach-mvebu/spl.c -+++ b/arch/arm/mach-mvebu/spl.c -@@ -33,21 +33,44 @@ - #endif - - /* -- * When loading U-Boot via SPL from eMMC (in Marvell terminology SDIO), the -- * kwbimage main header is stored at sector 0. U-Boot SPL needs to parse this -- * header and figure out at which sector the U-Boot proper binary is stored. -- * Partition booting is therefore not supported and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR -- * and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET need to point to the -- * kwbimage main header. -+ * When loading U-Boot via SPL from eMMC, the kwbimage main header is stored at -+ * sector 0 and either on HW boot partition or on data partition. Choice of HW -+ * partition depends on what is configured in eMMC EXT_CSC register. -+ * When loading U-Boot via SPL from SD card, the kwbimage main header is stored -+ * at sector 1. -+ * Therefore MBR/GPT partition booting, fixed sector number and fixed eMMC HW -+ * partition number are unsupported due to limitation of Marvell BootROM. -+ * Correct sector number must be determined as runtime in mvebu SPL code based -+ * on the detected boot source. Otherwise U-Boot SPL would not be able to load -+ * U-Boot proper. -+ * Runtime mvebu SPL sector calculation code expects: -+ * - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0 -+ * - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0 - */ - #ifdef CONFIG_SPL_MMC -+#ifdef CONFIG_SYS_MMCSD_FS_BOOT -+#error CONFIG_SYS_MMCSD_FS_BOOT is unsupported -+#endif -+#ifdef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION -+#error CONFIG_SYS_MMCSD_FS_BOOT_PARTITION is unsupported -+#endif -+#ifdef CONFIG_SUPPORT_EMMC_BOOT_OVERRIDE_PART_CONFIG -+#error CONFIG_SUPPORT_EMMC_BOOT_OVERRIDE_PART_CONFIG is unsupported -+#endif -+#ifdef CONFIG_SYS_MMCSD_RAW_MODE_EMMC_BOOT_PARTITION -+#error CONFIG_SYS_MMCSD_RAW_MODE_EMMC_BOOT_PARTITION is unsupported -+#endif - #ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION - #error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is unsupported - #endif --#if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR) && CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR != 0 -+#ifndef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -+#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR must be enabled for SD/eMMC boot support -+#endif -+#if !defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR) || \ -+ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR != 0 - #error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR must be set to 0 - #endif --#if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET) && \ -+#if !defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET) || \ - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET != 0 - #error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET must be set to 0 - #endif -@@ -98,7 +121,12 @@ struct kwbimage_main_hdr_v1 { - #ifdef CONFIG_SPL_MMC - u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device) - { -- return MMCSD_MODE_RAW; -+ return IS_SD(mmc) ? MMCSD_MODE_RAW : MMCSD_MODE_EMMCBOOT; -+} -+unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc, -+ unsigned long raw_sect) -+{ -+ return IS_SD(mmc) ? 1 : 0; - } - #endif - -@@ -169,9 +197,7 @@ int spl_parse_board_header(struct spl_image_info *spl_image, - } - - if (IS_ENABLED(CONFIG_SPL_MMC) && -- (bootdev->boot_device == BOOT_DEVICE_MMC1 || -- bootdev->boot_device == BOOT_DEVICE_MMC2 || -- bootdev->boot_device == BOOT_DEVICE_MMC2_2) && -+ (bootdev->boot_device == BOOT_DEVICE_MMC1) && - mhdr->blockid != IBR_HDR_SDIO_ID) { - printf("ERROR: Wrong blockid (0x%x) in SDIO kwbimage\n", - mhdr->blockid); -@@ -182,26 +208,9 @@ int spl_parse_board_header(struct spl_image_info *spl_image, - - /* - * For SATA srcaddr is specified in number of sectors. -- * The main header is must be stored at sector number 1. -- * This expects that sector size is 512 bytes and recalculates -- * data offset to bytes relative to the main header. -- */ -- if (IS_ENABLED(CONFIG_SPL_SATA) && mhdr->blockid == IBR_HDR_SATA_ID) { -- if (spl_image->offset < 1) { -- printf("ERROR: Wrong srcaddr (0x%08x) in SATA kwbimage\n", -- spl_image->offset); -- return -EINVAL; -- } -- spl_image->offset -= 1; -- spl_image->offset *= 512; -- } -- -- /* -- * For SDIO (eMMC) srcaddr is specified in number of sectors. -- * This expects that sector size is 512 bytes and recalculates -- * data offset to bytes. -+ * This expects that sector size is 512 bytes. - */ -- if (IS_ENABLED(CONFIG_SPL_MMC) && mhdr->blockid == IBR_HDR_SDIO_ID) -+ if (IS_ENABLED(CONFIG_SPL_SATA) && mhdr->blockid == IBR_HDR_SATA_ID) - spl_image->offset *= 512; - - if (spl_image->offset % 4 != 0) { -@@ -299,19 +308,6 @@ int board_return_to_bootrom(struct spl_image_info *spl_image, - hang(); - } - --/* -- * SPI0 CS0 Flash is mapped to address range 0xD4000000 - 0xD7FFFFFF by BootROM. -- * Proper U-Boot removes this direct mapping. So it is available only in SPL. -- */ --#if defined(CONFIG_SPL_ENV_IS_IN_SPI_FLASH) && \ -- CONFIG_ENV_SPI_BUS == 0 && CONFIG_ENV_SPI_CS == 0 && \ -- CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE <= 64*1024*1024 --void *env_sf_get_env_addr(void) --{ -- return (void *)0xD4000000 + CONFIG_ENV_OFFSET; --} --#endif -- - void board_init_f(ulong dummy) - { - int ret; -diff --git a/arch/arm/mach-rmobile/Kconfig b/arch/arm/mach-rmobile/Kconfig -index 0e9c0fa996..921153a8d9 100644 ---- a/arch/arm/mach-rmobile/Kconfig -+++ b/arch/arm/mach-rmobile/Kconfig -@@ -1,5 +1,22 @@ - if ARCH_RMOBILE - -+# Renesas ARM SoCs R-Car Gen3/Gen4 (64bit) -+config RCAR_64 -+ bool -+ select ARM64 -+ select CMD_CACHE -+ select OF_BOARD_SETUP -+ select PHY -+ select PINCONF -+ select PINCTRL -+ select PINCTRL_PFC -+ select POSITION_INDEPENDENT -+ imply CMD_FS_UUID -+ imply CMD_GPT -+ imply CMD_MMC_SWRITE if MMC -+ imply CMD_UUID -+ imply SUPPORT_EMMC_RPMB if MMC -+ - choice - prompt "Target Renesas SoC select" - default RCAR_32 -@@ -10,20 +27,8 @@ config RCAR_32 - - config RCAR_GEN3 - bool "Renesas ARM SoCs R-Car Gen3 (64bit)" -- select ARM64 -- select PHY -- select CMD_CACHE -- select OF_BOARD_SETUP -- select PINCTRL -- select PINCONF -- select PINCTRL_PFC -- select POSITION_INDEPENDENT -+ select RCAR_64 - select SUPPORT_SPL -- imply CMD_FS_UUID -- imply CMD_GPT -- imply CMD_UUID -- imply CMD_MMC_SWRITE if MMC -- imply SUPPORT_EMMC_RPMB if MMC - imply SPL - imply SPL_BOARD_INIT - imply SPL_GZIP -@@ -32,8 +37,8 @@ config RCAR_GEN3 - imply SPL_SERIAL - imply SPL_SYS_MALLOC_SIMPLE - imply SPL_TINY_MEMSET -- imply SPL_YMODEM_SUPPORT - imply SPL_USE_TINY_PRINTF -+ imply SPL_YMODEM_SUPPORT - - config RZA1 - prompt "Renesas ARM SoCs RZ/A1 (32bit)" -@@ -41,6 +46,9 @@ config RZA1 - - endchoice - -+config SYS_SOC -+ default "rmobile" if ARCH_RMOBILE -+ - source "arch/arm/mach-rmobile/Kconfig.32" - source "arch/arm/mach-rmobile/Kconfig.64" - source "arch/arm/mach-rmobile/Kconfig.rza1" -diff --git a/arch/arm/mach-rmobile/Kconfig.32 b/arch/arm/mach-rmobile/Kconfig.32 -index 31badc5a47..1ac31c29d8 100644 ---- a/arch/arm/mach-rmobile/Kconfig.32 -+++ b/arch/arm/mach-rmobile/Kconfig.32 -@@ -125,9 +125,6 @@ endchoice - config TMU_TIMER - bool - --config SYS_SOC -- default "rmobile" -- - config RMOBILE_EXTRAM_BOOT - bool "Enable boot from RAM" - depends on TARGET_ALT || TARGET_BLANCHE || TARGET_KOELSCH || TARGET_LAGER || TARGET_PORTER || TARGET_SILK || TARGET_STOUT -diff --git a/arch/arm/mach-rmobile/Kconfig.64 b/arch/arm/mach-rmobile/Kconfig.64 -index 8e617e5824..3b14721dab 100644 ---- a/arch/arm/mach-rmobile/Kconfig.64 -+++ b/arch/arm/mach-rmobile/Kconfig.64 -@@ -1,207 +1,11 @@ --if RCAR_GEN3 -- --menu "Select Target SoC" -- --config R8A774A1 -- bool "Renesas SoC R8A774A1" -- select GICV2 -- imply CLK_R8A774A1 -- imply PINCTRL_PFC_R8A774A1 -- --config R8A774B1 -- bool "Renesas SoC R8A774B1" -- select GICV2 -- imply CLK_R8A774B1 -- imply PINCTRL_PFC_R8A774B1 -- --config R8A774C0 -- bool "Renesas SoC R8A774C0" -- select GICV2 -- imply CLK_R8A774C0 -- imply PINCTRL_PFC_R8A774C0 -- --config R8A774E1 -- bool "Renesas SoC R8A774E1" -- select GICV2 -- imply CLK_R8A774E1 -- imply PINCTRL_PFC_R8A774E1 -- --config R8A7795 -- bool "Renesas SoC R8A7795" -- select GICV2 -- imply CLK_R8A7795 -- imply PINCTRL_PFC_R8A77951 -- --config R8A7796 -- bool "Renesas SoC R8A7796" -- select GICV2 -- imply CLK_R8A77960 -- imply CLK_R8A77961 -- imply PINCTRL_PFC_R8A77960 -- imply PINCTRL_PFC_R8A77961 -- --config R8A77965 -- bool "Renesas SoC R8A77965" -- select GICV2 -- imply CLK_R8A77965 -- imply PINCTRL_PFC_R8A77965 -- --config R8A77970 -- bool "Renesas SoC R8A77970" -- select GICV2 -- imply CLK_R8A77970 -- imply PINCTRL_PFC_R8A77970 -- --config R8A77980 -- bool "Renesas SoC R8A77980" -- select GICV2 -- imply CLK_R8A77980 -- imply PINCTRL_PFC_R8A77980 -- --config R8A77990 -- bool "Renesas SoC R8A77990" -- select GICV2 -- imply CLK_R8A77990 -- imply PINCTRL_PFC_R8A77990 -- --config R8A77995 -- bool "Renesas SoC R8A77995" -- select GICV2 -- imply CLK_R8A77995 -- imply PINCTRL_PFC_R8A77995 -- --config R8A779A0 -- bool "Renesas SoC R8A779A0" -- select GICV3 -- imply CLK_R8A779A0 -- imply PINCTRL_PFC_R8A779A0 -- --config RZ_G2 -- bool "Renesas ARM SoCs RZ/G2 (64bit)" -- --endmenu -- --choice -- prompt "Renesas ARM64 SoCs board select" -- optional -- --config TARGET_BEACON_RZG2M -- bool "Beacon EmbeddedWorks RZ/G2 Dev Kit" -- select R8A774A1 -- select R8A774B1 -- select R8A774E1 -- select RZ_G2 -- select PINCTRL_PFC_R8A774A1 -- select PINCTRL_PFC_R8A774B1 -- select PINCTRL_PFC_R8A774E1 -- imply MULTI_DTB_FIT -- imply MULTI_DTB_FIT_USER_DEFINED_AREA -- imply CLK_VERSACLOCK -- imply CLK_CCF -- --config TARGET_CONDOR -- bool "Condor board" -- imply R8A77980 -- help -- Support for Renesas R-Car Gen3 Condor platform -- --config TARGET_DRAAK -- bool "Draak board" -- imply R8A77995 -- help -- Support for Renesas R-Car Gen3 Draak platform -- --config TARGET_EAGLE -- bool "Eagle board" -- imply R8A77970 -- help -- Support for Renesas R-Car Gen3 Eagle platform -- --config TARGET_EBISU -- bool "Ebisu board" -- imply R8A77990 -- help -- Support for Renesas R-Car Gen3 Ebisu platform -- --config TARGET_FALCON -- bool "Falcon board" -- imply R8A779A0 -- help -- Support for Renesas R-Car Gen3 Falcon platform -- --config TARGET_HIHOPE_RZG2 -- bool "HiHope RZ/G2 board" -- imply R8A774A1 -- imply R8A774B1 -- imply R8A774E1 -- imply RZ_G2 -- imply SYS_MALLOC_F -- imply MULTI_DTB_FIT -- imply MULTI_DTB_FIT_USER_DEFINED_AREA -- help -- Support for RZG2 HiHope platform -- --config TARGET_SILINUX_EK874 -- bool "Silicon Linux EK874 board" -- imply R8A774C0 -- imply RZ_G2 -- help -- Support for Silicon Linux EK874 platform -- --config TARGET_SALVATOR_X -- bool "Salvator-X board" -- imply R8A7795 -- imply R8A7796 -- imply R8A77965 -- imply SYS_MALLOC_F -- imply MULTI_DTB_FIT -- imply MULTI_DTB_FIT_USER_DEFINED_AREA -- help -- Support for Renesas R-Car Gen3 platform -- --config TARGET_ULCB -- bool "ULCB board" -- imply R8A7795 -- imply R8A7796 -- imply R8A77965 -- imply SYS_MALLOC_F -- imply MULTI_DTB_FIT -- imply MULTI_DTB_FIT_USER_DEFINED_AREA -- help -- Support for Renesas R-Car Gen3 ULCB platform -- --endchoice -- --config SYS_SOC -- default "rmobile" -- --source "board/renesas/condor/Kconfig" --source "board/renesas/draak/Kconfig" --source "board/renesas/eagle/Kconfig" --source "board/renesas/ebisu/Kconfig" --source "board/renesas/falcon/Kconfig" --source "board/renesas/salvator-x/Kconfig" --source "board/renesas/ulcb/Kconfig" --source "board/beacon/beacon-rzg2m/Kconfig" --source "board/hoperun/hihope-rzg2/Kconfig" --source "board/silinux/ek874/Kconfig" -- --config MULTI_DTB_FIT_UNCOMPRESS_SZ -- default 0x80000 if TARGET_BEACON_RZG2M -- default 0x80000 if TARGET_HIHOPE_RZG2 -- default 0x80000 if TARGET_SALVATOR_X -- default 0x80000 if TARGET_ULCB -- --config MULTI_DTB_FIT_USER_DEF_ADDR -- default 0x49000000 if TARGET_BEACON_RZG2M -- default 0x49000000 if TARGET_HIHOPE_RZG2 -- default 0x49000000 if TARGET_SALVATOR_X -- default 0x49000000 if TARGET_ULCB -+if RCAR_64 - - config SYS_MALLOC_F_LEN -- default 0x8000 if RCAR_GEN3 -+ default 0x8000 if RCAR_64 -+ -+config OF_LIBFDT_OVERLAY -+ default y if RCAR_64 - --config DM_RESET -- default y if RCAR_GEN3 -+source "arch/arm/mach-rmobile/Kconfig.rcar3" - - endif -diff --git a/arch/arm/mach-rmobile/Kconfig.rcar3 b/arch/arm/mach-rmobile/Kconfig.rcar3 -new file mode 100644 -index 0000000000..680aa45516 ---- /dev/null -+++ b/arch/arm/mach-rmobile/Kconfig.rcar3 -@@ -0,0 +1,201 @@ -+if RCAR_GEN3 -+ -+menu "Select Target SoC" -+ -+config R8A774A1 -+ bool "Renesas SoC R8A774A1" -+ select GICV2 -+ imply CLK_R8A774A1 -+ imply PINCTRL_PFC_R8A774A1 -+ -+config R8A774B1 -+ bool "Renesas SoC R8A774B1" -+ select GICV2 -+ imply CLK_R8A774B1 -+ imply PINCTRL_PFC_R8A774B1 -+ -+config R8A774C0 -+ bool "Renesas SoC R8A774C0" -+ select GICV2 -+ imply CLK_R8A774C0 -+ imply PINCTRL_PFC_R8A774C0 -+ -+config R8A774E1 -+ bool "Renesas SoC R8A774E1" -+ select GICV2 -+ imply CLK_R8A774E1 -+ imply PINCTRL_PFC_R8A774E1 -+ -+config R8A7795 -+ bool "Renesas SoC R8A7795" -+ select GICV2 -+ imply CLK_R8A7795 -+ imply PINCTRL_PFC_R8A77951 -+ -+config R8A7796 -+ bool "Renesas SoC R8A7796" -+ select GICV2 -+ imply CLK_R8A77960 -+ imply CLK_R8A77961 -+ imply PINCTRL_PFC_R8A77960 -+ imply PINCTRL_PFC_R8A77961 -+ -+config R8A77965 -+ bool "Renesas SoC R8A77965" -+ select GICV2 -+ imply CLK_R8A77965 -+ imply PINCTRL_PFC_R8A77965 -+ -+config R8A77970 -+ bool "Renesas SoC R8A77970" -+ select GICV2 -+ imply CLK_R8A77970 -+ imply PINCTRL_PFC_R8A77970 -+ -+config R8A77980 -+ bool "Renesas SoC R8A77980" -+ select GICV2 -+ imply CLK_R8A77980 -+ imply PINCTRL_PFC_R8A77980 -+ -+config R8A77990 -+ bool "Renesas SoC R8A77990" -+ select GICV2 -+ imply CLK_R8A77990 -+ imply PINCTRL_PFC_R8A77990 -+ -+config R8A77995 -+ bool "Renesas SoC R8A77995" -+ select GICV2 -+ imply CLK_R8A77995 -+ imply PINCTRL_PFC_R8A77995 -+ -+config R8A779A0 -+ bool "Renesas SoC R8A779A0" -+ select GICV3 -+ imply CLK_R8A779A0 -+ imply PINCTRL_PFC_R8A779A0 -+ -+config RZ_G2 -+ bool "Renesas ARM SoCs RZ/G2 (64bit)" -+ -+endmenu -+ -+choice -+ prompt "Renesas ARM64 SoCs board select" -+ optional -+ -+config TARGET_BEACON_RZG2M -+ bool "Beacon EmbeddedWorks RZ/G2 Dev Kit" -+ select PINCTRL_PFC_R8A774A1 -+ select PINCTRL_PFC_R8A774B1 -+ select PINCTRL_PFC_R8A774E1 -+ select R8A774A1 -+ select R8A774B1 -+ select R8A774E1 -+ select RZ_G2 -+ imply CLK_CCF -+ imply CLK_VERSACLOCK -+ imply MULTI_DTB_FIT -+ imply MULTI_DTB_FIT_USER_DEFINED_AREA -+ -+config TARGET_CONDOR -+ bool "Condor board" -+ imply R8A77980 -+ help -+ Support for Renesas R-Car Gen3 Condor platform -+ -+config TARGET_DRAAK -+ bool "Draak board" -+ imply R8A77995 -+ help -+ Support for Renesas R-Car Gen3 Draak platform -+ -+config TARGET_EAGLE -+ bool "Eagle board" -+ imply R8A77970 -+ help -+ Support for Renesas R-Car Gen3 Eagle platform -+ -+config TARGET_EBISU -+ bool "Ebisu board" -+ imply R8A77990 -+ help -+ Support for Renesas R-Car Gen3 Ebisu platform -+ -+config TARGET_FALCON -+ bool "Falcon board" -+ imply R8A779A0 -+ help -+ Support for Renesas R-Car Gen3 Falcon platform -+ -+config TARGET_HIHOPE_RZG2 -+ bool "HiHope RZ/G2 board" -+ imply MULTI_DTB_FIT -+ imply MULTI_DTB_FIT_USER_DEFINED_AREA -+ imply R8A774A1 -+ imply R8A774B1 -+ imply R8A774E1 -+ imply RZ_G2 -+ imply SYS_MALLOC_F -+ help -+ Support for RZG2 HiHope platform -+ -+config TARGET_SILINUX_EK874 -+ bool "Silicon Linux EK874 board" -+ imply R8A774C0 -+ imply RZ_G2 -+ help -+ Support for Silicon Linux EK874 platform -+ -+config TARGET_SALVATOR_X -+ bool "Salvator-X board" -+ imply MULTI_DTB_FIT -+ imply MULTI_DTB_FIT_USER_DEFINED_AREA -+ imply R8A7795 -+ imply R8A7796 -+ imply R8A77965 -+ imply SYS_MALLOC_F -+ help -+ Support for Renesas R-Car Gen3 platform -+ -+config TARGET_ULCB -+ bool "ULCB board" -+ imply MULTI_DTB_FIT -+ imply MULTI_DTB_FIT_USER_DEFINED_AREA -+ imply R8A7795 -+ imply R8A7796 -+ imply R8A77965 -+ imply SYS_MALLOC_F -+ help -+ Support for Renesas R-Car Gen3 ULCB platform -+ -+endchoice -+ -+source "board/renesas/condor/Kconfig" -+source "board/renesas/draak/Kconfig" -+source "board/renesas/eagle/Kconfig" -+source "board/renesas/ebisu/Kconfig" -+source "board/renesas/falcon/Kconfig" -+source "board/renesas/salvator-x/Kconfig" -+source "board/renesas/ulcb/Kconfig" -+source "board/beacon/beacon-rzg2m/Kconfig" -+source "board/hoperun/hihope-rzg2/Kconfig" -+source "board/silinux/ek874/Kconfig" -+ -+config MULTI_DTB_FIT_UNCOMPRESS_SZ -+ default 0x80000 if TARGET_BEACON_RZG2M -+ default 0x80000 if TARGET_HIHOPE_RZG2 -+ default 0x80000 if TARGET_SALVATOR_X -+ default 0x80000 if TARGET_ULCB -+ -+config MULTI_DTB_FIT_USER_DEF_ADDR -+ default 0x49000000 if TARGET_BEACON_RZG2M -+ default 0x49000000 if TARGET_HIHOPE_RZG2 -+ default 0x49000000 if TARGET_SALVATOR_X -+ default 0x49000000 if TARGET_ULCB -+ -+config DM_RESET -+ default y if RCAR_GEN3 -+ -+endif -diff --git a/arch/arm/mach-rmobile/Kconfig.rza1 b/arch/arm/mach-rmobile/Kconfig.rza1 -index 8cf033fb13..e88f9a2eed 100644 ---- a/arch/arm/mach-rmobile/Kconfig.rza1 -+++ b/arch/arm/mach-rmobile/Kconfig.rza1 -@@ -19,9 +19,6 @@ config TARGET_GRPEACH - - endchoice - --config SYS_SOC -- default "rmobile" -- - # Renesas Supported Boards - source "board/renesas/grpeach/Kconfig" - -diff --git a/arch/arm/mach-rmobile/cpu_info-rcar.c b/arch/arm/mach-rmobile/cpu_info-rcar.c -index 5bde24ae0e..ac9c623eda 100644 ---- a/arch/arm/mach-rmobile/cpu_info-rcar.c -+++ b/arch/arm/mach-rmobile/cpu_info-rcar.c -@@ -14,11 +14,10 @@ - - static u32 rmobile_get_prr(void) - { --#ifdef CONFIG_RCAR_GEN3 -- return readl(0xFFF00044); --#else -+ if (IS_ENABLED(CONFIG_RCAR_GEN3)) -+ return readl(0xFFF00044); -+ - return readl(0xFF000044); --#endif - } - - u32 rmobile_get_cpu_type(void) -diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig -index 0390431601..59dd8ba5c6 100644 ---- a/arch/arm/mach-rockchip/Kconfig -+++ b/arch/arm/mach-rockchip/Kconfig -@@ -288,7 +288,9 @@ config ROCKCHIP_RK3568 - select BOARD_LATE_INIT - select DM_REGULATOR_FIXED - select DM_RESET -+ imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF - imply ROCKCHIP_COMMON_BOARD -+ imply OF_LIBFDT_OVERLAY - imply ROCKCHIP_OTP - imply MISC_INIT_R - help -@@ -309,9 +311,13 @@ config ROCKCHIP_RK3588 - select REGMAP - select SYSCON - select BOARD_LATE_INIT -+ imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF - imply ROCKCHIP_COMMON_BOARD -+ imply OF_LIBFDT_OVERLAY - imply ROCKCHIP_OTP - imply MISC_INIT_R -+ imply CLK_SCMI -+ imply SCMI_FIRMWARE - help - The Rockchip RK3588 is a ARM-based SoC with quad-core Cortex-A76 and - quad-core Cortex-A55 including NEON and GPU, 6TOPS NPU, Mali-G610 MP4, -@@ -428,7 +434,7 @@ config TPL_ROCKCHIP_COMMON_BOARD - - config ROCKCHIP_EXTERNAL_TPL - bool "Use external TPL binary" -- default y if ROCKCHIP_RK3568 -+ default y if ROCKCHIP_RK3568 || ROCKCHIP_RK3588 - help - Some Rockchip SoCs require an external TPL to initialize DRAM. - Enable this option and build with ROCKCHIP_TPL=/path/to/ddr.bin to -diff --git a/arch/arm/mach-rockchip/rk3368/Kconfig b/arch/arm/mach-rockchip/rk3368/Kconfig -index c3249a7be4..3de695186e 100644 ---- a/arch/arm/mach-rockchip/rk3368/Kconfig -+++ b/arch/arm/mach-rockchip/rk3368/Kconfig -@@ -5,6 +5,7 @@ choice - - config TARGET_LION_RK3368 - bool "Theobroma Systems RK3368-uQ7 (Lion) module" -+ select ARCH_EARLY_INIT_R - help - The RK3368-uQ7 is a micro-Qseven form-factor (40mm x 70mm, - MXM-230 connector) system-on-module designed by Theobroma -@@ -34,6 +35,7 @@ config TARGET_GEEKBOX - - config TARGET_EVB_PX5 - bool "Evb-PX5" -+ select ARCH_EARLY_INIT_R - help - PX5 EVB is designed by Rockchip for automotive field - with integrated CVBS (TP2825) / MIPI DSI / CSI / LVDS -diff --git a/arch/arm/mach-versal-net/include/mach/sys_proto.h b/arch/arm/mach-versal-net/include/mach/sys_proto.h -index 5bba9030f2..a20cf02712 100644 ---- a/arch/arm/mach-versal-net/include/mach/sys_proto.h -+++ b/arch/arm/mach-versal-net/include/mach/sys_proto.h -@@ -8,9 +8,4 @@ - - void mem_map_fill(void); - --static inline int zynqmp_mmio_write(const u32 address, const u32 mask, -- const u32 value) --{ -- BUILD_BUG(); -- return -EINVAL; --} -+int zynqmp_mmio_write(const u32 address, const u32 mask, const u32 value); -diff --git a/arch/arm/mach-versal/include/mach/sys_proto.h b/arch/arm/mach-versal/include/mach/sys_proto.h -index 8e5712e0c9..3f01508ecb 100644 ---- a/arch/arm/mach-versal/include/mach/sys_proto.h -+++ b/arch/arm/mach-versal/include/mach/sys_proto.h -@@ -13,8 +13,4 @@ enum { - void tcm_init(u8 mode); - void mem_map_fill(void); - --static inline int zynqmp_mmio_write(const u32 address, const u32 mask, const u32 value) --{ -- BUILD_BUG(); -- return -EINVAL; --} -+int zynqmp_mmio_write(const u32 address, const u32 mask, const u32 value); -diff --git a/arch/m68k/dts/M5208EVBE.dts b/arch/m68k/dts/M5208EVBE.dts -index 3e5a698861..78973fca57 100644 ---- a/arch/m68k/dts/M5208EVBE.dts -+++ b/arch/m68k/dts/M5208EVBE.dts -@@ -16,7 +16,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/m68k/dts/M5235EVB.dts b/arch/m68k/dts/M5235EVB.dts -index b170b7bd03..e8b22c9216 100644 ---- a/arch/m68k/dts/M5235EVB.dts -+++ b/arch/m68k/dts/M5235EVB.dts -@@ -16,7 +16,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/m68k/dts/M5235EVB_Flash32.dts b/arch/m68k/dts/M5235EVB_Flash32.dts -index 497d824541..60b28c07f7 100644 ---- a/arch/m68k/dts/M5235EVB_Flash32.dts -+++ b/arch/m68k/dts/M5235EVB_Flash32.dts -@@ -16,7 +16,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/m68k/dts/M5249EVB.dts b/arch/m68k/dts/M5249EVB.dts -index b2a1be9090..84ba4f188b 100644 ---- a/arch/m68k/dts/M5249EVB.dts -+++ b/arch/m68k/dts/M5249EVB.dts -@@ -16,7 +16,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/m68k/dts/M5253DEMO.dts b/arch/m68k/dts/M5253DEMO.dts -index 7ebaa9a2e0..515484ae93 100644 ---- a/arch/m68k/dts/M5253DEMO.dts -+++ b/arch/m68k/dts/M5253DEMO.dts -@@ -16,7 +16,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/m68k/dts/M5272C3.dts b/arch/m68k/dts/M5272C3.dts -index 0ecf1e7429..a228937907 100644 ---- a/arch/m68k/dts/M5272C3.dts -+++ b/arch/m68k/dts/M5272C3.dts -@@ -16,7 +16,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/m68k/dts/M5275EVB.dts b/arch/m68k/dts/M5275EVB.dts -index f0f573c08c..4737f927db 100644 ---- a/arch/m68k/dts/M5275EVB.dts -+++ b/arch/m68k/dts/M5275EVB.dts -@@ -16,7 +16,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/m68k/dts/M5282EVB.dts b/arch/m68k/dts/M5282EVB.dts -index 9b506635b9..51788f9654 100644 ---- a/arch/m68k/dts/M5282EVB.dts -+++ b/arch/m68k/dts/M5282EVB.dts -@@ -16,7 +16,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/m68k/dts/M53017EVB.dts b/arch/m68k/dts/M53017EVB.dts -index 401318ddf9..31c50b65c2 100644 ---- a/arch/m68k/dts/M53017EVB.dts -+++ b/arch/m68k/dts/M53017EVB.dts -@@ -16,7 +16,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/m68k/dts/M5329AFEE.dts b/arch/m68k/dts/M5329AFEE.dts -index ab009c5605..de4af4743d 100644 ---- a/arch/m68k/dts/M5329AFEE.dts -+++ b/arch/m68k/dts/M5329AFEE.dts -@@ -16,7 +16,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/m68k/dts/M5329BFEE.dts b/arch/m68k/dts/M5329BFEE.dts -index 7e73ab9c66..2b2aae2cf9 100644 ---- a/arch/m68k/dts/M5329BFEE.dts -+++ b/arch/m68k/dts/M5329BFEE.dts -@@ -16,7 +16,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/m68k/dts/M5373EVB.dts b/arch/m68k/dts/M5373EVB.dts -index 4e1b7aeb77..7df8206d63 100644 ---- a/arch/m68k/dts/M5373EVB.dts -+++ b/arch/m68k/dts/M5373EVB.dts -@@ -16,7 +16,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/m68k/dts/amcore.dts b/arch/m68k/dts/amcore.dts -index c21fb8ff79..d43202a3ab 100644 ---- a/arch/m68k/dts/amcore.dts -+++ b/arch/m68k/dts/amcore.dts -@@ -16,7 +16,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/m68k/dts/astro_mcf5373l.dts b/arch/m68k/dts/astro_mcf5373l.dts -index 1b1a46ac2d..d3caf12db1 100644 ---- a/arch/m68k/dts/astro_mcf5373l.dts -+++ b/arch/m68k/dts/astro_mcf5373l.dts -@@ -16,7 +16,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/m68k/dts/cobra5272.dts b/arch/m68k/dts/cobra5272.dts -index 6085eee5b3..2b5767d96d 100644 ---- a/arch/m68k/dts/cobra5272.dts -+++ b/arch/m68k/dts/cobra5272.dts -@@ -16,7 +16,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/m68k/dts/eb_cpu5282.dts b/arch/m68k/dts/eb_cpu5282.dts -index 655c4ecf5a..925f9af3a8 100644 ---- a/arch/m68k/dts/eb_cpu5282.dts -+++ b/arch/m68k/dts/eb_cpu5282.dts -@@ -16,7 +16,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/m68k/dts/eb_cpu5282_internal.dts b/arch/m68k/dts/eb_cpu5282_internal.dts -index f5a044d7cc..ae6a8157cf 100644 ---- a/arch/m68k/dts/eb_cpu5282_internal.dts -+++ b/arch/m68k/dts/eb_cpu5282_internal.dts -@@ -16,7 +16,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/m68k/dts/stmark2.dts b/arch/m68k/dts/stmark2.dts -index 3688651e59..ebe8580a0a 100644 ---- a/arch/m68k/dts/stmark2.dts -+++ b/arch/m68k/dts/stmark2.dts -@@ -16,7 +16,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig -index ce157a79cc..e38c9f6d71 100644 ---- a/arch/microblaze/Kconfig -+++ b/arch/microblaze/Kconfig -@@ -4,19 +4,8 @@ menu "MicroBlaze architecture" - config SYS_ARCH - default "microblaze" - --config NEEDS_MANUAL_RELOC -- bool "Disable position-independent pre-relocation code" -- default y -- help -- U-Boot expects to be linked to a specific hard-coded address, and to -- be loaded to and run from that address. This option lifts that -- restriction, thus allowing the code to be loaded to and executed from -- almost any 4K aligned address. This logic relies on the relocation -- information that is embedded in the binary to support U-Boot -- relocating itself to the top-of-RAM later during execution. -- - config STATIC_RELA -- def_bool y if !NEEDS_MANUAL_RELOC -+ def_bool y - - choice - prompt "Target select" -diff --git a/arch/microblaze/config.mk b/arch/microblaze/config.mk -index 467c5ca1b1..64c3f31319 100644 ---- a/arch/microblaze/config.mk -+++ b/arch/microblaze/config.mk -@@ -13,10 +13,6 @@ LDFLAGS_FINAL += --gc-sections - - ifeq ($(CONFIG_SPL_BUILD),) - PLATFORM_CPPFLAGS += -fPIC --endif -- --ifeq ($(CONFIG_STATIC_RELA),y) --PLATFORM_CPPFLAGS += -fPIC - LDFLAGS_u-boot += -pic - endif - -diff --git a/arch/microblaze/cpu/Makefile b/arch/microblaze/cpu/Makefile -index 1c586a7de0..b8c1dcbe14 100644 ---- a/arch/microblaze/cpu/Makefile -+++ b/arch/microblaze/cpu/Makefile -@@ -5,7 +5,6 @@ - - extra-y = start.o - obj-y = irq.o --obj-y += interrupts.o cache.o exception.o cpuinfo.o --obj-$(CONFIG_STATIC_RELA) += relocate.o -+obj-y += interrupts.o cache.o exception.o cpuinfo.o relocate.o - obj-$(CONFIG_XILINX_MICROBLAZE0_PVR) += pvr.o - obj-$(CONFIG_SPL_BUILD) += spl.o -diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S -index 7079d9e170..c1e0fcda0a 100644 ---- a/arch/microblaze/cpu/start.S -+++ b/arch/microblaze/cpu/start.S -@@ -10,16 +10,11 @@ - #include - #include - --#if defined(CONFIG_STATIC_RELA) - #define SYM_ADDR(reg, reg_add, symbol) \ - mfs r20, rpc; \ - addik r20, r20, _GLOBAL_OFFSET_TABLE_ + 8; \ - lwi reg, r20, symbol@GOT; \ - addk reg, reg reg_add; --#else --#define SYM_ADDR(reg, reg_add, symbol) \ -- addi reg, reg_add, symbol --#endif - - .text - .global _start -@@ -35,7 +30,6 @@ _start: - addi r1, r0, CONFIG_SPL_STACK - #else - add r1, r0, r20 --#if defined(CONFIG_STATIC_RELA) - bri 1f - - /* Force alignment for easier ASM code below */ -@@ -67,7 +61,6 @@ uboot_sym_start: - - brlid r15, mb_fix_rela - nop --#endif - #endif - - addi r1, r1, -4 /* Decrement SP to top of memory */ -@@ -310,7 +303,6 @@ relocate_code: - brlid r15, __setup_exceptions - nop - --#if defined(CONFIG_STATIC_RELA) - /* reloc_offset is current location */ - SYM_ADDR(r10, r0, _start) - -@@ -331,27 +323,7 @@ relocate_code: - add r9, r9, r5 - brlid r15, mb_fix_rela - nop -- - /* end of code which does relocation */ --#else -- /* Check if GOT exist */ -- addik r21, r23, _got_start -- addik r22, r23, _got_end -- cmpu r12, r21, r22 -- beqi r12, 2f /* No GOT table - jump over */ -- -- /* Skip last 3 entries plus 1 because of loop boundary below */ -- addik r22, r22, -0x10 -- -- /* Relocate the GOT. */ --3: lw r12, r21, r0 /* Load entry */ -- addk r12, r12, r23 /* Add reloc offset */ -- sw r12, r21, r0 /* Save entry back */ -- -- cmpu r12, r21, r22 /* Check if this cross boundary */ -- bneid r12, 3b -- addik r21. r21, 4 --#endif - - /* Flush caches to ensure consistency */ - brlid r15, flush_cache_all -diff --git a/arch/mips/dts/ar933x.dtsi b/arch/mips/dts/ar933x.dtsi -index 37354324fe..c4f29324ef 100644 ---- a/arch/mips/dts/ar933x.dtsi -+++ b/arch/mips/dts/ar933x.dtsi -@@ -35,7 +35,7 @@ - }; - - pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "qca,ar933x-pinctrl"; - ranges; - #address-cells = <1>; -diff --git a/arch/mips/dts/brcm,bcm3380.dtsi b/arch/mips/dts/brcm,bcm3380.dtsi -index 7cccec5da5..c79a6db42f 100644 ---- a/arch/mips/dts/brcm,bcm3380.dtsi -+++ b/arch/mips/dts/brcm,bcm3380.dtsi -@@ -19,20 +19,20 @@ - reg = <0x14e00000 0x4>; - #address-cells = <1>; - #size-cells = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - cpu@0 { - compatible = "brcm,bcm3380-cpu", "mips,mips4Kc"; - device_type = "cpu"; - reg = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - cpu@1 { - compatible = "brcm,bcm3380-cpu", "mips,mips4Kc"; - device_type = "cpu"; - reg = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -40,13 +40,13 @@ - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - periph_osc: periph-osc { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <48000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - periph_clk0: periph-clk@14e00004 { -@@ -66,12 +66,12 @@ - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - memory-controller@12000000 { - compatible = "brcm,bcm6328-mc"; - reg = <0x12000000 0x1000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - periph_rst0: reset-controller@14e0008c { -diff --git a/arch/mips/dts/brcm,bcm6318.dtsi b/arch/mips/dts/brcm,bcm6318.dtsi -index d678dab242..5813de7bf6 100644 ---- a/arch/mips/dts/brcm,bcm6318.dtsi -+++ b/arch/mips/dts/brcm,bcm6318.dtsi -@@ -21,13 +21,13 @@ - reg = <0x10000000 0x4>; - #address-cells = <1>; - #size-cells = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - cpu@0 { - compatible = "brcm,bcm6318-cpu", "mips,mips4Kc"; - device_type = "cpu"; - reg = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -35,7 +35,7 @@ - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - hsspi_pll: hsspi-pll { - compatible = "fixed-clock"; -@@ -47,7 +47,7 @@ - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <50000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - periph_clk: periph-clk { -@@ -67,7 +67,7 @@ - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - periph_rst: reset-controller@10000010 { - compatible = "brcm,bcm6345-reset"; -@@ -157,7 +157,7 @@ - memory-controller@10004000 { - compatible = "brcm,bcm6318-mc"; - reg = <0x10004000 0x38>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - ehci: usb-controller@10005000 { -diff --git a/arch/mips/dts/brcm,bcm63268.dtsi b/arch/mips/dts/brcm,bcm63268.dtsi -index 5294242529..587a6e8042 100644 ---- a/arch/mips/dts/brcm,bcm63268.dtsi -+++ b/arch/mips/dts/brcm,bcm63268.dtsi -@@ -22,20 +22,20 @@ - reg = <0x10000000 0x4>; - #address-cells = <1>; - #size-cells = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - cpu@0 { - compatible = "brcm,bcm63268-cpu", "mips,mips4Kc"; - device_type = "cpu"; - reg = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - cpu@1 { - compatible = "brcm,bcm63268-cpu", "mips,mips4Kc"; - device_type = "cpu"; - reg = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -43,7 +43,7 @@ - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - hsspi_pll: hsspi-pll { - compatible = "fixed-clock"; -@@ -55,7 +55,7 @@ - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <50000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - periph_clk: periph-clk { -@@ -75,7 +75,7 @@ - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - pll_cntl: syscon@10000008 { - compatible = "syscon"; -@@ -234,7 +234,7 @@ - memory-controller@10003000 { - compatible = "brcm,bcm6328-mc"; - reg = <0x10003000 0x894>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - iudma: dma-controller@1000d800 { -diff --git a/arch/mips/dts/brcm,bcm6328.dtsi b/arch/mips/dts/brcm,bcm6328.dtsi -index 350c0e903b..7b9c09c68a 100644 ---- a/arch/mips/dts/brcm,bcm6328.dtsi -+++ b/arch/mips/dts/brcm,bcm6328.dtsi -@@ -21,20 +21,20 @@ - reg = <0x10000000 0x4>; - #address-cells = <1>; - #size-cells = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - cpu@0 { - compatible = "brcm,bcm6328-cpu", "mips,mips4Kc"; - device_type = "cpu"; - reg = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - cpu@1 { - compatible = "brcm,bcm6328-cpu", "mips,mips4Kc"; - device_type = "cpu"; - reg = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -42,7 +42,7 @@ - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - hsspi_pll: hsspi-pll { - compatible = "fixed-clock"; -@@ -54,7 +54,7 @@ - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <50000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - periph_clk: periph-clk { -@@ -68,7 +68,7 @@ - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - periph_rst: reset-controller@10000010 { - compatible = "brcm,bcm6345-reset"; -@@ -202,7 +202,7 @@ - memory-controller@10003000 { - compatible = "brcm,bcm6328-mc"; - reg = <0x10003000 0x864>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - iudma: dma-controller@1000d800 { -diff --git a/arch/mips/dts/brcm,bcm6338.dtsi b/arch/mips/dts/brcm,bcm6338.dtsi -index c547e949dd..92e4d62941 100644 ---- a/arch/mips/dts/brcm,bcm6338.dtsi -+++ b/arch/mips/dts/brcm,bcm6338.dtsi -@@ -20,13 +20,13 @@ - reg = <0xfffe0000 0x4>; - #address-cells = <1>; - #size-cells = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - cpu@0 { - compatible = "brcm,bcm6338-cpu", "mips,mips4Kc"; - device_type = "cpu"; - reg = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -34,13 +34,13 @@ - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - periph_osc: periph-osc { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <50000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - periph_clk: periph-clk { -@@ -64,7 +64,7 @@ - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - pll_cntl: syscon@fffe0008 { - compatible = "syscon"; -@@ -129,7 +129,7 @@ - memory-controller@fffe3100 { - compatible = "brcm,bcm6338-mc"; - reg = <0xfffe3100 0x38>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - iudma: dma-controller@fffe2400 { -diff --git a/arch/mips/dts/brcm,bcm6348.dtsi b/arch/mips/dts/brcm,bcm6348.dtsi -index 79e7bd892b..3f1471b67c 100644 ---- a/arch/mips/dts/brcm,bcm6348.dtsi -+++ b/arch/mips/dts/brcm,bcm6348.dtsi -@@ -20,13 +20,13 @@ - reg = <0xfffe0000 0x4>; - #address-cells = <1>; - #size-cells = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - cpu@0 { - compatible = "brcm,bcm6348-cpu", "mips,mips4Kc"; - device_type = "cpu"; - reg = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -34,13 +34,13 @@ - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - periph_osc: periph-osc { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <50000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - periph_clk: periph-clk { -@@ -64,7 +64,7 @@ - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - pll_cntl: syscon@fffe0008 { - compatible = "syscon"; -@@ -158,7 +158,7 @@ - memory-controller@fffe2300 { - compatible = "brcm,bcm6338-mc"; - reg = <0xfffe2300 0x38>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - enet0: ethernet@fffe6000 { -diff --git a/arch/mips/dts/brcm,bcm6358.dtsi b/arch/mips/dts/brcm,bcm6358.dtsi -index 5e9c9ad769..d53e4f7ac0 100644 ---- a/arch/mips/dts/brcm,bcm6358.dtsi -+++ b/arch/mips/dts/brcm,bcm6358.dtsi -@@ -20,20 +20,20 @@ - reg = <0xfffe0000 0x4>; - #address-cells = <1>; - #size-cells = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - cpu@0 { - compatible = "brcm,bcm6358-cpu", "mips,mips4Kc"; - device_type = "cpu"; - reg = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - cpu@1 { - compatible = "brcm,bcm6358-cpu", "mips,mips4Kc"; - device_type = "cpu"; - reg = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -41,13 +41,13 @@ - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - periph_osc: periph-osc { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <50000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - periph_clk: periph-clk { -@@ -71,7 +71,7 @@ - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - pll_cntl: syscon@fffe0008 { - compatible = "syscon"; -@@ -162,7 +162,7 @@ - memory-controller@fffe1200 { - compatible = "brcm,bcm6358-mc"; - reg = <0xfffe1200 0x4c>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - ehci: usb-controller@fffe1300 { -diff --git a/arch/mips/dts/brcm,bcm6362.dtsi b/arch/mips/dts/brcm,bcm6362.dtsi -index 71598f97b3..b1f0085c96 100644 ---- a/arch/mips/dts/brcm,bcm6362.dtsi -+++ b/arch/mips/dts/brcm,bcm6362.dtsi -@@ -22,20 +22,20 @@ - reg = <0x10000000 0x4>; - #address-cells = <1>; - #size-cells = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - cpu@0 { - compatible = "brcm,bcm6362-cpu", "mips,mips4Kc"; - device_type = "cpu"; - reg = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - cpu@1 { - compatible = "brcm,bcm6362-cpu", "mips,mips4Kc"; - device_type = "cpu"; - reg = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -43,7 +43,7 @@ - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - hsspi_pll: hsspi-pll { - compatible = "fixed-clock"; -@@ -55,7 +55,7 @@ - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <50000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - periph_clk: periph-clk { -@@ -69,7 +69,7 @@ - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - pll_cntl: syscon@10000008 { - compatible = "syscon"; -@@ -228,7 +228,7 @@ - memory-controller@10003000 { - compatible = "brcm,bcm6328-mc"; - reg = <0x10003000 0x864>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - iudma: dma-controller@1000d800 { -diff --git a/arch/mips/dts/brcm,bcm6368.dtsi b/arch/mips/dts/brcm,bcm6368.dtsi -index 69be65056e..ea50ff9200 100644 ---- a/arch/mips/dts/brcm,bcm6368.dtsi -+++ b/arch/mips/dts/brcm,bcm6368.dtsi -@@ -20,20 +20,20 @@ - reg = <0x10000000 0x4>; - #address-cells = <1>; - #size-cells = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - cpu@0 { - compatible = "brcm,bcm6368-cpu", "mips,mips4Kc"; - device_type = "cpu"; - reg = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - cpu@1 { - compatible = "brcm,bcm6368-cpu", "mips,mips4Kc"; - device_type = "cpu"; - reg = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -41,13 +41,13 @@ - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - periph_osc: periph-osc { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <50000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - periph_clk: periph-clk { -@@ -71,7 +71,7 @@ - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - pll_cntl: syscon@10000008 { - compatible = "syscon"; -@@ -180,7 +180,7 @@ - memory-controller@10001200 { - compatible = "brcm,bcm6358-mc"; - reg = <0x10001200 0x4c>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - ehci: usb-controller@10001500 { -diff --git a/arch/mips/dts/brcm,bcm6838.dtsi b/arch/mips/dts/brcm,bcm6838.dtsi -index 6676f83b2a..4032e24528 100644 ---- a/arch/mips/dts/brcm,bcm6838.dtsi -+++ b/arch/mips/dts/brcm,bcm6838.dtsi -@@ -12,32 +12,32 @@ - reg = <0x14e00000 0x4>; - #address-cells = <1>; - #size-cells = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - cpu@0 { - compatible = "brcm,bcm6838-cpu", "mips,mips4Kc"; - device_type = "cpu"; - reg = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - cpu@1 { - compatible = "brcm,bcm6838-cpu", "mips,mips4Kc"; - device_type = "cpu"; - reg = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - clocks { - compatible = "simple-bus"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - periph_osc: periph-osc { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <50000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -45,12 +45,12 @@ - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - memory: memory-controller@12000000 { - compatible = "brcm,bcm6328-mc"; - reg = <0x12000000 0x1000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - gpio_test_port: syscon@14e00294 { -diff --git a/arch/mips/dts/brcm,bcm968380gerg.dts b/arch/mips/dts/brcm,bcm968380gerg.dts -index 5a5ac0ea7d..c7835a7c0a 100644 ---- a/arch/mips/dts/brcm,bcm968380gerg.dts -+++ b/arch/mips/dts/brcm,bcm968380gerg.dts -@@ -25,7 +25,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/mips/dts/comtrend,ar-5315u.dts b/arch/mips/dts/comtrend,ar-5315u.dts -index 28443b3b0f..65f5184c09 100644 ---- a/arch/mips/dts/comtrend,ar-5315u.dts -+++ b/arch/mips/dts/comtrend,ar-5315u.dts -@@ -119,7 +119,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/mips/dts/comtrend,ar-5387un.dts b/arch/mips/dts/comtrend,ar-5387un.dts -index 12ace64621..e5163d6147 100644 ---- a/arch/mips/dts/comtrend,ar-5387un.dts -+++ b/arch/mips/dts/comtrend,ar-5387un.dts -@@ -103,7 +103,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/mips/dts/comtrend,ct-5361.dts b/arch/mips/dts/comtrend,ct-5361.dts -index f6b8a94e25..8170095abd 100644 ---- a/arch/mips/dts/comtrend,ct-5361.dts -+++ b/arch/mips/dts/comtrend,ct-5361.dts -@@ -59,7 +59,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/mips/dts/comtrend,vr-3032u.dts b/arch/mips/dts/comtrend,vr-3032u.dts -index 110119b507..55a70d215e 100644 ---- a/arch/mips/dts/comtrend,vr-3032u.dts -+++ b/arch/mips/dts/comtrend,vr-3032u.dts -@@ -117,7 +117,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/mips/dts/comtrend,wap-5813n.dts b/arch/mips/dts/comtrend,wap-5813n.dts -index 7e835b28d2..2625d4e03a 100644 ---- a/arch/mips/dts/comtrend,wap-5813n.dts -+++ b/arch/mips/dts/comtrend,wap-5813n.dts -@@ -81,7 +81,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/mips/dts/huawei,hg556a.dts b/arch/mips/dts/huawei,hg556a.dts -index 6a7fc1df4b..ce28a25d29 100644 ---- a/arch/mips/dts/huawei,hg556a.dts -+++ b/arch/mips/dts/huawei,hg556a.dts -@@ -118,7 +118,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/mips/dts/img,boston.dts b/arch/mips/dts/img,boston.dts -index 1d4eeda4e8..c1a7396303 100644 ---- a/arch/mips/dts/img,boston.dts -+++ b/arch/mips/dts/img,boston.dts -@@ -178,14 +178,14 @@ - plat_regs: system-controller@17ffd000 { - compatible = "img,boston-platform-regs", "syscon"; - reg = <0x17ffd000 0x1000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - clk_boston: clock { - compatible = "img,boston-clock"; - #clock-cells = <1>; - regmap = <&plat_regs>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - reboot: syscon-reboot { -@@ -206,7 +206,7 @@ - - clocks = <&clk_boston BOSTON_CLK_SYS>; - -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - lcd: lcd@17fff000 { -diff --git a/arch/mips/dts/mrvl,cn73xx.dtsi b/arch/mips/dts/mrvl,cn73xx.dtsi -index 77f3548a32..23aac65406 100644 ---- a/arch/mips/dts/mrvl,cn73xx.dtsi -+++ b/arch/mips/dts/mrvl,cn73xx.dtsi -@@ -43,7 +43,7 @@ - clk: clock { - compatible = "mrvl,octeon-clk"; - #clock-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - gpio: gpio-controller@1070000000800 { -@@ -77,7 +77,7 @@ - #size-cells = <0>; - compatible = "cavium,octeon-7xxx-l2c"; - reg = <0x11800 0x80000000 0x0 0x01000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - lmc: lmc@1180088000000 { -@@ -85,7 +85,7 @@ - #size-cells = <0>; - compatible = "cavium,octeon-7xxx-ddr4"; - reg = <0x11800 0x88000000 0x0 0x02000000>; // 2 IFs -- u-boot,dm-pre-reloc; -+ bootph-all; - l2c-handle = <&l2c>; - }; - -diff --git a/arch/mips/dts/mrvl,octeon-ebb7304.dts b/arch/mips/dts/mrvl,octeon-ebb7304.dts -index 08247eb4e0..59e43b9c77 100644 ---- a/arch/mips/dts/mrvl,octeon-ebb7304.dts -+++ b/arch/mips/dts/mrvl,octeon-ebb7304.dts -@@ -113,7 +113,7 @@ - }; - - &i2c0 { -- u-boot,dm-pre-reloc; /* Needed early for DDR SPD EEPROM */ -+ bootph-all; /* Needed early for DDR SPD EEPROM */ - clock-frequency = <100000>; - - rtc@68 { -@@ -129,7 +129,7 @@ - }; - - &i2c1 { -- u-boot,dm-pre-reloc; /* Needed early for DDR SPD EEPROM */ -+ bootph-all; /* Needed early for DDR SPD EEPROM */ - clock-frequency = <100000>; - }; - -diff --git a/arch/mips/dts/mrvl,octeon-nic23.dts b/arch/mips/dts/mrvl,octeon-nic23.dts -index dfbd51c924..e58a66431a 100644 ---- a/arch/mips/dts/mrvl,octeon-nic23.dts -+++ b/arch/mips/dts/mrvl,octeon-nic23.dts -@@ -116,7 +116,7 @@ - }; - - &i2c0 { -- u-boot,dm-pre-reloc; /* Needed early for DDR SPD EEPROM */ -+ bootph-all; /* Needed early for DDR SPD EEPROM */ - clock-frequency = <100000>; - - sfp0eeprom: eeprom@50 { -@@ -131,7 +131,7 @@ - }; - - &i2c1 { -- u-boot,dm-pre-reloc; /* Needed early for DDR SPD EEPROM */ -+ bootph-all; /* Needed early for DDR SPD EEPROM */ - clock-frequency = <100000>; - - vitesse@10 { -diff --git a/arch/mips/dts/mt7620-u-boot.dtsi b/arch/mips/dts/mt7620-u-boot.dtsi -index ed8425719b..5038408471 100644 ---- a/arch/mips/dts/mt7620-u-boot.dtsi -+++ b/arch/mips/dts/mt7620-u-boot.dtsi -@@ -6,9 +6,9 @@ - */ - - &uartlite { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uartfull { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/mips/dts/mt7621-u-boot.dtsi b/arch/mips/dts/mt7621-u-boot.dtsi -index c5a8aa357f..fbac2ade25 100644 ---- a/arch/mips/dts/mt7621-u-boot.dtsi -+++ b/arch/mips/dts/mt7621-u-boot.dtsi -@@ -14,35 +14,35 @@ - }; - - &sysc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &reboot { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &clkctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &rstctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &binman { -diff --git a/arch/mips/dts/mt7628-u-boot.dtsi b/arch/mips/dts/mt7628-u-boot.dtsi -index eea5dc64bf..83026fd885 100644 ---- a/arch/mips/dts/mt7628-u-boot.dtsi -+++ b/arch/mips/dts/mt7628-u-boot.dtsi -@@ -6,33 +6,33 @@ - */ - - &palmbus { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &reboot { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &clkctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &rstctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/dts/mt7628a.dtsi -index 6baa63add3..8ac206280c 100644 ---- a/arch/mips/dts/mt7628a.dtsi -+++ b/arch/mips/dts/mt7628a.dtsi -@@ -58,7 +58,7 @@ - reg-names = "syscfg0", "clkcfg"; - compatible = "mediatek,mt7628-clk"; - #clock-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - rstctrl: rstctrl@0x34 { -diff --git a/arch/mips/dts/mti,malta.dts b/arch/mips/dts/mti,malta.dts -index ef47a340bb..b6af1ffd76 100644 ---- a/arch/mips/dts/mti,malta.dts -+++ b/arch/mips/dts/mti,malta.dts -@@ -26,7 +26,7 @@ - - clock-frequency = <1843200>; - -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -diff --git a/arch/mips/dts/netgear,cg3100d.dts b/arch/mips/dts/netgear,cg3100d.dts -index a42a0da2dd..1c5b8ebec8 100644 ---- a/arch/mips/dts/netgear,cg3100d.dts -+++ b/arch/mips/dts/netgear,cg3100d.dts -@@ -102,6 +102,6 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; -diff --git a/arch/mips/dts/netgear,dgnd3700v2.dts b/arch/mips/dts/netgear,dgnd3700v2.dts -index 88fca647cd..72314558da 100644 ---- a/arch/mips/dts/netgear,dgnd3700v2.dts -+++ b/arch/mips/dts/netgear,dgnd3700v2.dts -@@ -137,7 +137,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/mips/dts/pic32mzda_sk.dts b/arch/mips/dts/pic32mzda_sk.dts -index fc86154e0a..b9b78b507e 100644 ---- a/arch/mips/dts/pic32mzda_sk.dts -+++ b/arch/mips/dts/pic32mzda_sk.dts -@@ -26,17 +26,17 @@ - microchip,refo4-frequency = <25000000>; - microchip,refo5-frequency = <40000000>; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pinctrl { - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart2 { - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &sdhci { -diff --git a/arch/mips/dts/qca953x.dtsi b/arch/mips/dts/qca953x.dtsi -index 90d34ddbbf..148de76863 100644 ---- a/arch/mips/dts/qca953x.dtsi -+++ b/arch/mips/dts/qca953x.dtsi -@@ -35,7 +35,7 @@ - }; - - pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "qca,qca953x-pinctrl"; - ranges; - #address-cells = <1>; -diff --git a/arch/mips/dts/sagem,f@st1704.dts b/arch/mips/dts/sagem,f@st1704.dts -index 98ed353f20..4e1340bfd5 100644 ---- a/arch/mips/dts/sagem,f@st1704.dts -+++ b/arch/mips/dts/sagem,f@st1704.dts -@@ -68,6 +68,6 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; -diff --git a/arch/mips/dts/sfr,nb4-ser.dts b/arch/mips/dts/sfr,nb4-ser.dts -index dfbc4148dc..ad3a4ce8a8 100644 ---- a/arch/mips/dts/sfr,nb4-ser.dts -+++ b/arch/mips/dts/sfr,nb4-ser.dts -@@ -119,7 +119,7 @@ - }; - - &uart0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - status = "okay"; - }; - -diff --git a/arch/nios2/dts/10m50_devboard.dts b/arch/nios2/dts/10m50_devboard.dts -index 9cd40165ab..df645962da 100644 ---- a/arch/nios2/dts/10m50_devboard.dts -+++ b/arch/nios2/dts/10m50_devboard.dts -@@ -18,7 +18,7 @@ - #size-cells = <0>; - - cpu: cpu@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - device_type = "cpu"; - compatible = "altr,nios2-1.1"; - reg = <0x00000000>; -diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c -index 2af5c89ae5..f5cb000de6 100644 ---- a/arch/powerpc/cpu/mpc83xx/cpu_init.c -+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c -@@ -227,30 +227,6 @@ void cpu_init_f (volatile immap_t * im) - im->sysconf.lblaw[3].bar = CFG_SYS_LBLAWBAR3_PRELIM; - im->sysconf.lblaw[3].ar = CFG_SYS_LBLAWAR3_PRELIM; - #endif --#if defined(CONFIG_SYS_LBLAWBAR4_PRELIM) && defined(CONFIG_SYS_LBLAWAR4_PRELIM) -- im->sysconf.lblaw[4].bar = CONFIG_SYS_LBLAWBAR4_PRELIM; -- im->sysconf.lblaw[4].ar = CONFIG_SYS_LBLAWAR4_PRELIM; --#endif --#if defined(CONFIG_SYS_LBLAWBAR5_PRELIM) && defined(CONFIG_SYS_LBLAWAR5_PRELIM) -- im->sysconf.lblaw[5].bar = CONFIG_SYS_LBLAWBAR5_PRELIM; -- im->sysconf.lblaw[5].ar = CONFIG_SYS_LBLAWAR5_PRELIM; --#endif --#if defined(CONFIG_SYS_LBLAWBAR6_PRELIM) && defined(CONFIG_SYS_LBLAWAR6_PRELIM) -- im->sysconf.lblaw[6].bar = CONFIG_SYS_LBLAWBAR6_PRELIM; -- im->sysconf.lblaw[6].ar = CONFIG_SYS_LBLAWAR6_PRELIM; --#endif --#if defined(CONFIG_SYS_LBLAWBAR7_PRELIM) && defined(CONFIG_SYS_LBLAWAR7_PRELIM) -- im->sysconf.lblaw[7].bar = CONFIG_SYS_LBLAWBAR7_PRELIM; -- im->sysconf.lblaw[7].ar = CONFIG_SYS_LBLAWAR7_PRELIM; --#endif --#ifdef CONFIG_SYS_GPIO1_PRELIM -- im->gpio[0].dat = CONFIG_SYS_GPIO1_DAT; -- im->gpio[0].dir = CONFIG_SYS_GPIO1_DIR; --#endif --#ifdef CONFIG_SYS_GPIO2_PRELIM -- im->gpio[1].dat = CONFIG_SYS_GPIO2_DAT; -- im->gpio[1].dir = CONFIG_SYS_GPIO2_DIR; --#endif - } - - int cpu_init_r (void) -diff --git a/arch/powerpc/cpu/mpc83xx/elbc/Kconfig b/arch/powerpc/cpu/mpc83xx/elbc/Kconfig -index 74c4ff3ed4..06841523ef 100644 ---- a/arch/powerpc/cpu/mpc83xx/elbc/Kconfig -+++ b/arch/powerpc/cpu/mpc83xx/elbc/Kconfig -@@ -23,10 +23,4 @@ config ELBC_BR_OR_NAND_PRELIM_4 - - endchoice - --source "arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc0" --source "arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc1" --source "arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc2" --source "arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc3" --source "arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc4" -- - endmenu -diff --git a/arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc0 b/arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc0 -deleted file mode 100644 -index 208eed0495..0000000000 ---- a/arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc0 -+++ /dev/null -@@ -1,733 +0,0 @@ --menuconfig ELBC_BR0_OR0 -- bool "ELBC BR0/OR0" -- --if ELBC_BR0_OR0 -- --config BR0_OR0_NAME -- string "Identifier" -- --config BR0_OR0_BASE -- hex "Port base" -- --choice -- prompt "Port size" -- --config BR0_PORTSIZE_8BIT -- bool "8-bit" -- --config BR0_PORTSIZE_16BIT -- depends on !BR0_MACHINE_FCM -- bool "16-bit" -- -- --config BR0_PORTSIZE_32BIT -- depends on !BR0_MACHINE_FCM -- depends on ARCH_MPC8360 || ARCH_MPC8379 -- bool "32-bit" -- --endchoice -- --if BR0_MACHINE_FCM -- --choice -- prompt "Data Error Checking" -- --config BR0_ERRORCHECKING_DISABLED -- bool "Disabled" -- --config BR0_ERRORCHECKING_ECC_CHECKING -- bool "ECC checking / No ECC generation" -- --config BR0_ERRORCHECKING_BOTH -- bool "ECC checking and generation" -- --endchoice -- --endif -- --config BR0_WRITE_PROTECT -- bool "Write-protect" -- --config BR0_MACHINE_UPM -- bool -- --choice -- prompt "Machine select" -- --config BR0_MACHINE_GPCM -- bool "GPCM" -- --config BR0_MACHINE_FCM -- depends on !ARCH_MPC832X && !ARCH_MPC8360 -- bool "FCM" -- --config BR0_MACHINE_SDRAM -- depends on ARCH_MPC8360 -- bool "SDRAM" -- --config BR0_MACHINE_UPMA -- select BR0_MACHINE_UPM -- bool "UPM (A)" -- --config BR0_MACHINE_UPMB -- select BR0_MACHINE_UPM -- bool "UPM (B)" -- --config BR0_MACHINE_UPMC -- select BR0_MACHINE_UPM -- bool "UPM (C)" -- --endchoice -- --if ARCH_MPC8313 || ARCH_MPC8323 || ARCH_MPC8360 -- --choice -- prompt "Atomic operations" -- --config BR0_ATOMIC_NONE -- bool "No atomic operations" -- --config BR0_ATOMIC_RAWA -- bool "Read-after-write-atomic" -- --config BR0_ATOMIC_WARA -- bool "Write-after-read-atomic" -- --endchoice -- --endif -- --if BR0_MACHINE_GPCM || BR0_MACHINE_FCM || BR0_MACHINE_UPM || BR0_MACHINE_SDRAM -- --choice -- prompt "Address mask" -- --config OR0_AM_32_KBYTES -- depends on !BR0_MACHINE_SDRAM -- bool "32 kb" -- --config OR0_AM_64_KBYTES -- bool "64 kb" -- --config OR0_AM_128_KBYTES -- bool "128 kb" -- --config OR0_AM_256_KBYTES -- bool "256 kb" -- --config OR0_AM_512_KBYTES -- bool "512 kb" -- --config OR0_AM_1_MBYTES -- bool "1 mb" -- --config OR0_AM_2_MBYTES -- bool "2 mb" -- --config OR0_AM_4_MBYTES -- bool "4 mb" -- --config OR0_AM_8_MBYTES -- bool "8 mb" -- --config OR0_AM_16_MBYTES -- bool "16 mb" -- --config OR0_AM_32_MBYTES -- bool "32 mb" -- --config OR0_AM_64_MBYTES -- bool "64 mb" -- --# XXX: Some boards define 128MB AM with GPCM, even though it should not be --# possible according to the manuals --config OR0_AM_128_MBYTES -- bool "128 mb" -- --# XXX: Some boards define 256MB AM with GPCM, even though it should not be --# possible according to the manuals --config OR0_AM_256_MBYTES -- bool "256 mb" -- --config OR0_AM_512_MBYTES -- depends on BR0_MACHINE_FCM -- bool "512 mb" -- --# XXX: Some boards define 1GB AM with GPCM, even though it should not be --# possible according to the manuals --config OR0_AM_1_GBYTES -- bool "1 gb" -- --config OR0_AM_2_GBYTES -- depends on BR0_MACHINE_FCM -- bool "2 gb" -- --config OR0_AM_4_GBYTES -- depends on BR0_MACHINE_FCM -- bool "4 gb" -- --endchoice -- --config OR0_XAM_SET -- bool "Set unused bytes after address mask" --choice -- prompt "Buffer control disable" -- --config OR0_BCTLD_ASSERTED -- bool "Asserted" -- --config OR0_BCTLD_NOT_ASSERTED -- bool "Not asserted" -- --endchoice -- --endif -- --if BR0_MACHINE_GPCM || BR0_MACHINE_FCM -- --choice -- prompt "Cycle length in bus clocks" -- --config OR0_SCY_0 -- bool "No wait states" -- --config OR0_SCY_1 -- bool "1 wait state" -- --config OR0_SCY_2 -- bool "2 wait states" -- --config OR0_SCY_3 -- bool "3 wait states" -- --config OR0_SCY_4 -- bool "4 wait states" -- --config OR0_SCY_5 -- bool "5 wait states" -- --config OR0_SCY_6 -- bool "6 wait states" -- --config OR0_SCY_7 -- bool "7 wait states" -- --config OR0_SCY_8 -- depends on BR0_MACHINE_GPCM -- bool "8 wait states" -- --config OR0_SCY_9 -- depends on BR0_MACHINE_GPCM -- bool "9 wait states" -- --config OR0_SCY_10 -- depends on BR0_MACHINE_GPCM -- bool "10 wait states" -- --config OR0_SCY_11 -- depends on BR0_MACHINE_GPCM -- bool "11 wait states" -- --config OR0_SCY_12 -- depends on BR0_MACHINE_GPCM -- bool "12 wait states" -- --config OR0_SCY_13 -- depends on BR0_MACHINE_GPCM -- bool "13 wait states" -- --config OR0_SCY_14 -- depends on BR0_MACHINE_GPCM -- bool "14 wait states" -- --config OR0_SCY_15 -- depends on BR0_MACHINE_GPCM -- bool "15 wait states" -- --endchoice -- --endif # BR0_MACHINE_GPCM || BR0_MACHINE_FCM -- --if BR0_MACHINE_GPCM -- --choice -- prompt "Chip select negotiation time" -- --config OR0_CSNT_NORMAL -- bool "Normal" -- --config OR0_CSNT_EARLIER -- bool "Earlier" -- --endchoice -- --choice -- prompt "Address to chip-select setup" -- --config OR0_ACS_SAME_TIME -- bool "At the same time" -- --config OR0_ACS_HALF_CYCLE_EARLIER -- bool "Half of a bus clock cycle earlier" -- --config OR0_ACS_QUARTER_CYCLE_EARLIER -- bool "Half/Quarter of a bus clock cycle earlier" -- --endchoice -- --choice -- prompt "Extra address to check-select setup" -- --config OR0_XACS_NORMAL -- bool "Normal" -- --config OR0_XACS_EXTENDED -- bool "Extended" -- --endchoice -- --choice -- prompt "External address termination" -- --config OR0_SETA_INTERNAL -- bool "Access is terminated internally" -- --config OR0_SETA_EXTERNAL -- bool "Access is terminated externally" -- --endchoice -- --endif # BR0_MACHINE_GPCM -- --if BR0_MACHINE_FCM -- --choice -- prompt "NAND Flash EEPROM page size" -- --config OR0_PGS_SMALL -- bool "Small page device" -- --config OR0_PGS_LARGE -- bool "Large page device" -- --endchoice -- --choice -- prompt "Chip select to command time" -- --config OR0_CSCT_1_CYCLE -- depends on OR0_TRLX_NORMAL -- bool "1 cycle" -- --config OR0_CSCT_2_CYCLE -- depends on OR0_TRLX_RELAXED -- bool "2 cycles" -- --config OR0_CSCT_4_CYCLE -- depends on OR0_TRLX_NORMAL -- bool "4 cycles" -- --config OR0_CSCT_8_CYCLE -- depends on OR0_TRLX_RELAXED -- bool "8 cycles" -- --endchoice -- --choice -- prompt "Command setup time" -- --config OR0_CST_COINCIDENT -- depends on OR0_TRLX_NORMAL -- bool "Coincident with any command" -- --config OR0_CST_QUARTER_CLOCK -- depends on OR0_TRLX_NORMAL -- bool "0.25 clocks after" -- --config OR0_CST_HALF_CLOCK -- depends on OR0_TRLX_RELAXED -- bool "0.5 clocks after" -- --config OR0_CST_ONE_CLOCK -- depends on OR0_TRLX_RELAXED -- bool "1 clock after" -- --endchoice -- --choice -- prompt "Command hold time" -- --config OR0_CHT_HALF_CLOCK -- depends on OR0_TRLX_NORMAL -- bool "0.5 clocks before" -- --config OR0_CHT_ONE_CLOCK -- depends on OR0_TRLX_NORMAL -- bool "1 clock before" -- --config OR0_CHT_ONE_HALF_CLOCK -- depends on OR0_TRLX_RELAXED -- bool "1.5 clocks before" -- --config OR0_CHT_TWO_CLOCK -- depends on OR0_TRLX_RELAXED -- bool "2 clocks before" -- --endchoice -- --choice -- prompt "Reset setup time" -- --config OR0_RST_THREE_QUARTER_CLOCK -- depends on OR0_TRLX_NORMAL -- bool "0.75 clocks prior" -- --config OR0_RST_ONE_HALF_CLOCK -- depends on OR0_TRLX_RELAXED -- bool "0.5 clocks prior" -- --config OR0_RST_ONE_CLOCK -- bool "1 clock prior" -- --endchoice -- --endif # BR0_MACHINE_FCM -- --if BR0_MACHINE_UPM -- --choice -- prompt "Burst inhibit" -- --config OR0_BI_BURSTSUPPORT -- bool "Support burst access" -- --config OR0_BI_BURSTINHIBIT -- bool "Inhibit burst access" -- --endchoice -- --endif # BR0_MACHINE_UPM -- --if BR0_MACHINE_SDRAM -- --choice -- prompt "Number of column address lines" -- --config OR0_COLS_7 -- bool "7" -- --config OR0_COLS_8 -- bool "8" -- --config OR0_COLS_9 -- bool "9" -- --config OR0_COLS_10 -- bool "10" -- --config OR0_COLS_11 -- bool "11" -- --config OR0_COLS_12 -- bool "12" -- --config OR0_COLS_13 -- bool "13" -- --config OR0_COLS_14 -- bool "14" -- --endchoice -- --choice -- prompt "Number of rows address lines" -- --config OR0_ROWS_9 -- bool "9" -- --config OR0_ROWS_10 -- bool "10" -- --config OR0_ROWS_11 -- bool "11" -- --config OR0_ROWS_12 -- bool "12" -- --config OR0_ROWS_13 -- bool "13" -- --config OR0_ROWS_14 -- bool "14" -- --config OR0_ROWS_15 -- bool "15" -- --endchoice -- --choice -- prompt "Page mode select" -- --config OR0_PMSEL_BTB -- bool "Back-to-back" -- --config OR0_PMSEL_KEPT_OPEN -- bool "Page kept open until page miss or refresh" -- --endchoice -- --endif # BR0_MACHINE_SDRAM -- --choice -- prompt "Relaxed timing" -- --config OR0_TRLX_NORMAL -- bool "Normal" -- --config OR0_TRLX_RELAXED -- bool "Relaxed" -- --endchoice -- --choice -- prompt "Extended hold time" -- --config OR0_EHTR_NORMAL -- depends on OR0_TRLX_NORMAL -- bool "Normal" -- --config OR0_EHTR_1_CYCLE -- depends on OR0_TRLX_NORMAL -- bool "1 idle clock cycle inserted" -- --config OR0_EHTR_4_CYCLE -- depends on OR0_TRLX_RELAXED -- bool "4 idle clock cycles inserted" -- --config OR0_EHTR_8_CYCLE -- depends on OR0_TRLX_RELAXED -- bool "8 idle clock cycles inserted" -- --endchoice -- --if !ARCH_MPC8308 -- --choice -- prompt "External address latch delay" -- --config OR0_EAD_NONE -- bool "None" -- --config OR0_EAD_EXTRA -- bool "Extra" -- --endchoice -- --endif # !ARCH_MPC8308 -- --endif # ELBC_BR0_OR0 -- --config BR0_PORTSIZE -- hex -- default 0x800 if BR0_PORTSIZE_8BIT -- default 0x1000 if BR0_PORTSIZE_16BIT -- default 0x1800 if BR0_PORTSIZE_32BIT -- --config BR0_ERRORCHECKING -- hex -- default 0x0 if !BR0_MACHINE_FCM -- default 0x0 if BR0_ERRORCHECKING_DISABLED -- default 0x200 if BR0_ERRORCHECKING_ECC_CHECKING -- default 0x400 if BR0_ERRORCHECKING_BOTH -- --config BR0_WRITE_PROTECT_BIT -- hex -- default 0x0 if !BR0_WRITE_PROTECT -- default 0x100 if BR0_WRITE_PROTECT -- --config BR0_MACHINE -- hex -- default 0x0 if BR0_MACHINE_GPCM -- default 0x20 if BR0_MACHINE_FCM -- default 0x60 if BR0_MACHINE_SDRAM -- default 0x80 if BR0_MACHINE_UPMA -- default 0xa0 if BR0_MACHINE_UPMB -- default 0xc0 if BR0_MACHINE_UPMC -- --config BR0_ATOMIC -- hex -- default 0x0 if !ARCH_MPC8313 && !ARCH_MPC8323 && !ARCH_MPC8360 -- default 0x0 if BR0_ATOMIC_NONE -- default 0x4 if BR0_ATOMIC_RAWA -- default 0x8 if BR0_ATOMIC_WARA -- --config BR0_VALID_BIT -- hex -- default 0x0 if !ELBC_BR0_OR0 -- default 0x1 if ELBC_BR0_OR0 -- --config OR0_AM -- hex -- default 0xffff8000 if OR0_AM_32_KBYTES && !BR0_MACHINE_SDRAM -- default 0xffff0000 if OR0_AM_64_KBYTES -- default 0xfffe0000 if OR0_AM_128_KBYTES -- default 0xfffc0000 if OR0_AM_256_KBYTES -- default 0xfff80000 if OR0_AM_512_KBYTES -- default 0xfff00000 if OR0_AM_1_MBYTES -- default 0xffe00000 if OR0_AM_2_MBYTES -- default 0xffc00000 if OR0_AM_4_MBYTES -- default 0xff800000 if OR0_AM_8_MBYTES -- default 0xff000000 if OR0_AM_16_MBYTES -- default 0xfe000000 if OR0_AM_32_MBYTES -- default 0xfc000000 if OR0_AM_64_MBYTES -- default 0xf8000000 if OR0_AM_128_MBYTES -- default 0xf0000000 if OR0_AM_256_MBYTES -- default 0xe0000000 if OR0_AM_512_MBYTES -- default 0xc0000000 if OR0_AM_1_GBYTES -- default 0x80000000 if OR0_AM_2_GBYTES -- default 0x00000000 if OR0_AM_4_GBYTES -- --config OR0_XAM -- hex -- default 0x0 if !OR0_XAM_SET -- default 0x6000 if OR0_XAM_SET -- --config OR0_BCTLD -- hex -- default 0x0 if OR0_BCTLD_ASSERTED -- default 0x1000 if OR0_BCTLD_NOT_ASSERTED -- --config OR0_BI -- hex -- default 0x0 if !BR0_MACHINE_UPM -- default 0x0 if OR0_BI_BURSTSUPPORT -- default 0x100 if OR0_BI_BURSTINHIBIT -- --config OR0_COLS -- hex -- default 0x0 if !BR0_MACHINE_SDRAM -- default 0x0 if OR0_COLS_7 -- default 0x400 if OR0_COLS_8 -- default 0x800 if OR0_COLS_9 -- default 0xc00 if OR0_COLS_10 -- default 0x1000 if OR0_COLS_11 -- default 0x1400 if OR0_COLS_12 -- default 0x1800 if OR0_COLS_13 -- default 0x1c00 if OR0_COLS_14 -- --config OR0_ROWS -- hex -- default 0x0 if !BR0_MACHINE_SDRAM -- default 0x0 if OR0_ROWS_9 -- default 0x40 if OR0_ROWS_10 -- default 0x80 if OR0_ROWS_11 -- default 0xc0 if OR0_ROWS_12 -- default 0x100 if OR0_ROWS_13 -- default 0x140 if OR0_ROWS_14 -- default 0x180 if OR0_ROWS_15 -- --config OR0_PMSEL -- hex -- default 0x0 if !BR0_MACHINE_SDRAM -- default 0x0 if OR0_PMSEL_BTB -- default 0x20 if OR0_PMSEL_KEPT_OPEN -- --config OR0_SCY -- hex -- default 0x0 if !BR0_MACHINE_GPCM && !BR0_MACHINE_FCM -- default 0x0 if OR0_SCY_0 -- default 0x10 if OR0_SCY_1 -- default 0x20 if OR0_SCY_2 -- default 0x30 if OR0_SCY_3 -- default 0x40 if OR0_SCY_4 -- default 0x50 if OR0_SCY_5 -- default 0x60 if OR0_SCY_6 -- default 0x70 if OR0_SCY_7 -- default 0x80 if OR0_SCY_8 -- default 0x90 if OR0_SCY_9 -- default 0xa0 if OR0_SCY_10 -- default 0xb0 if OR0_SCY_11 -- default 0xc0 if OR0_SCY_12 -- default 0xd0 if OR0_SCY_13 -- default 0xe0 if OR0_SCY_14 -- default 0xf0 if OR0_SCY_15 -- --config OR0_PGS -- hex -- default 0x0 if !BR0_MACHINE_FCM -- default 0x0 if OR0_PGS_SMALL -- default 0x400 if OR0_PGS_LARGE -- --config OR0_CSCT -- hex -- default 0x0 if !BR0_MACHINE_FCM -- default 0x0 if OR0_CSCT_1_CYCLE -- default 0x0 if OR0_CSCT_2_CYCLE -- default 0x200 if OR0_CSCT_4_CYCLE -- default 0x200 if OR0_CSCT_8_CYCLE -- --config OR0_CST -- hex -- default 0x0 if !BR0_MACHINE_FCM -- default 0x0 if OR0_CST_COINCIDENT -- default 0x100 if OR0_CST_QUARTER_CLOCK -- default 0x0 if OR0_CST_HALF_CLOCK -- default 0x100 if OR0_CST_ONE_CLOCK -- --config OR0_CHT -- hex -- default 0x0 if !BR0_MACHINE_FCM -- default 0x0 if OR0_CHT_HALF_CLOCK -- default 0x80 if OR0_CHT_ONE_CLOCK -- default 0x0 if OR0_CHT_ONE_HALF_CLOCK -- default 0x80 if OR0_CHT_TWO_CLOCK -- --config OR0_RST -- hex -- default 0x0 if !BR0_MACHINE_FCM -- default 0x0 if OR0_RST_THREE_QUARTER_CLOCK -- default 0x8 if OR0_RST_ONE_CLOCK -- default 0x0 if OR0_RST_ONE_HALF_CLOCK -- --config OR0_CSNT -- hex -- default 0x0 if !BR0_MACHINE_GPCM -- default 0x0 if OR0_CSNT_NORMAL -- default 0x800 if OR0_CSNT_EARLIER -- --config OR0_ACS -- hex -- default 0x0 if !BR0_MACHINE_GPCM -- default 0x0 if OR0_ACS_SAME_TIME -- default 0x400 if OR0_ACS_QUARTER_CYCLE_EARLIER -- default 0x600 if OR0_ACS_HALF_CYCLE_EARLIER -- --config OR0_XACS -- hex -- default 0x0 if !BR0_MACHINE_GPCM -- default 0x0 if OR0_XACS_NORMAL -- default 0x100 if OR0_XACS_EXTENDED -- --config OR0_SETA -- hex -- default 0x0 if !BR0_MACHINE_GPCM -- default 0x0 if OR0_SETA_INTERNAL -- default 0x8 if OR0_SETA_EXTERNAL -- --config OR0_TRLX -- hex -- default 0x0 if OR0_TRLX_NORMAL -- default 0x4 if OR0_TRLX_RELAXED -- --config OR0_EHTR -- hex -- default 0x0 if OR0_EHTR_NORMAL -- default 0x2 if OR0_EHTR_1_CYCLE -- default 0x0 if OR0_EHTR_4_CYCLE -- default 0x2 if OR0_EHTR_8_CYCLE -- --config OR0_EAD -- hex -- default 0x0 if ARCH_MPC8308 -- default 0x0 if OR0_EAD_NONE -- default 0x1 if OR0_EAD_EXTRA -diff --git a/arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc1 b/arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc1 -deleted file mode 100644 -index 1dc3e75076..0000000000 ---- a/arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc1 -+++ /dev/null -@@ -1,733 +0,0 @@ --menuconfig ELBC_BR1_OR1 -- bool "ELBC BR1/OR1" -- --if ELBC_BR1_OR1 -- --config BR1_OR1_NAME -- string "Identifier" -- --config BR1_OR1_BASE -- hex "Port base" -- --choice -- prompt "Port size" -- --config BR1_PORTSIZE_8BIT -- bool "8-bit" -- --config BR1_PORTSIZE_16BIT -- depends on !BR1_MACHINE_FCM -- bool "16-bit" -- -- --config BR1_PORTSIZE_32BIT -- depends on !BR1_MACHINE_FCM -- depends on ARCH_MPC8360 || ARCH_MPC8379 -- bool "32-bit" -- --endchoice -- --if BR1_MACHINE_FCM -- --choice -- prompt "Data Error Checking" -- --config BR1_ERRORCHECKING_DISABLED -- bool "Disabled" -- --config BR1_ERRORCHECKING_ECC_CHECKING -- bool "ECC checking / No ECC generation" -- --config BR1_ERRORCHECKING_BOTH -- bool "ECC checking and generation" -- --endchoice -- --endif -- --config BR1_WRITE_PROTECT -- bool "Write-protect" -- --config BR1_MACHINE_UPM -- bool -- --choice -- prompt "Machine select" -- --config BR1_MACHINE_GPCM -- bool "GPCM" -- --config BR1_MACHINE_FCM -- depends on !ARCH_MPC832X && !ARCH_MPC8360 -- bool "FCM" -- --config BR1_MACHINE_SDRAM -- depends on ARCH_MPC8360 -- bool "SDRAM" -- --config BR1_MACHINE_UPMA -- select BR1_MACHINE_UPM -- bool "UPM (A)" -- --config BR1_MACHINE_UPMB -- select BR1_MACHINE_UPM -- bool "UPM (B)" -- --config BR1_MACHINE_UPMC -- select BR1_MACHINE_UPM -- bool "UPM (C)" -- --endchoice -- --if ARCH_MPC8313 || ARCH_MPC8323 || ARCH_MPC8360 -- --choice -- prompt "Atomic operations" -- --config BR1_ATOMIC_NONE -- bool "No atomic operations" -- --config BR1_ATOMIC_RAWA -- bool "Read-after-write-atomic" -- --config BR1_ATOMIC_WARA -- bool "Write-after-read-atomic" -- --endchoice -- --endif -- --if BR1_MACHINE_GPCM || BR1_MACHINE_FCM || BR1_MACHINE_UPM || BR1_MACHINE_SDRAM -- --choice -- prompt "Address mask" -- --config OR1_AM_32_KBYTES -- depends on !BR1_MACHINE_SDRAM -- bool "32 kb" -- --config OR1_AM_64_KBYTES -- bool "64 kb" -- --config OR1_AM_128_KBYTES -- bool "128 kb" -- --config OR1_AM_256_KBYTES -- bool "256 kb" -- --config OR1_AM_512_KBYTES -- bool "512 kb" -- --config OR1_AM_1_MBYTES -- bool "1 mb" -- --config OR1_AM_2_MBYTES -- bool "2 mb" -- --config OR1_AM_4_MBYTES -- bool "4 mb" -- --config OR1_AM_8_MBYTES -- bool "8 mb" -- --config OR1_AM_16_MBYTES -- bool "16 mb" -- --config OR1_AM_32_MBYTES -- bool "32 mb" -- --config OR1_AM_64_MBYTES -- bool "64 mb" -- --# XXX: Some boards define 128MB AM with GPCM, even though it should not be --# possible according to the manuals --config OR1_AM_128_MBYTES -- bool "128 mb" -- --# XXX: Some boards define 256MB AM with GPCM, even though it should not be --# possible according to the manuals --config OR1_AM_256_MBYTES -- bool "256 mb" -- --config OR1_AM_512_MBYTES -- depends on BR1_MACHINE_FCM -- bool "512 mb" -- --# XXX: Some boards define 1GB AM with GPCM, even though it should not be --# possible according to the manuals --config OR1_AM_1_GBYTES -- bool "1 gb" -- --config OR1_AM_2_GBYTES -- depends on BR1_MACHINE_FCM -- bool "2 gb" -- --config OR1_AM_4_GBYTES -- depends on BR1_MACHINE_FCM -- bool "4 gb" -- --endchoice -- --config OR1_XAM_SET -- bool "Set unused bytes after address mask" --choice -- prompt "Buffer control disable" -- --config OR1_BCTLD_ASSERTED -- bool "Asserted" -- --config OR1_BCTLD_NOT_ASSERTED -- bool "Not asserted" -- --endchoice -- --endif -- --if BR1_MACHINE_GPCM || BR1_MACHINE_FCM -- --choice -- prompt "Cycle length in bus clocks" -- --config OR1_SCY_0 -- bool "No wait states" -- --config OR1_SCY_1 -- bool "1 wait state" -- --config OR1_SCY_2 -- bool "2 wait states" -- --config OR1_SCY_3 -- bool "3 wait states" -- --config OR1_SCY_4 -- bool "4 wait states" -- --config OR1_SCY_5 -- bool "5 wait states" -- --config OR1_SCY_6 -- bool "6 wait states" -- --config OR1_SCY_7 -- bool "7 wait states" -- --config OR1_SCY_8 -- depends on BR1_MACHINE_GPCM -- bool "8 wait states" -- --config OR1_SCY_9 -- depends on BR1_MACHINE_GPCM -- bool "9 wait states" -- --config OR1_SCY_10 -- depends on BR1_MACHINE_GPCM -- bool "10 wait states" -- --config OR1_SCY_11 -- depends on BR1_MACHINE_GPCM -- bool "11 wait states" -- --config OR1_SCY_12 -- depends on BR1_MACHINE_GPCM -- bool "12 wait states" -- --config OR1_SCY_13 -- depends on BR1_MACHINE_GPCM -- bool "13 wait states" -- --config OR1_SCY_14 -- depends on BR1_MACHINE_GPCM -- bool "14 wait states" -- --config OR1_SCY_15 -- depends on BR1_MACHINE_GPCM -- bool "15 wait states" -- --endchoice -- --endif # BR1_MACHINE_GPCM || BR1_MACHINE_FCM -- --if BR1_MACHINE_GPCM -- --choice -- prompt "Chip select negotiation time" -- --config OR1_CSNT_NORMAL -- bool "Normal" -- --config OR1_CSNT_EARLIER -- bool "Earlier" -- --endchoice -- --choice -- prompt "Address to chip-select setup" -- --config OR1_ACS_SAME_TIME -- bool "At the same time" -- --config OR1_ACS_HALF_CYCLE_EARLIER -- bool "Half of a bus clock cycle earlier" -- --config OR1_ACS_QUARTER_CYCLE_EARLIER -- bool "Half/Quarter of a bus clock cycle earlier" -- --endchoice -- --choice -- prompt "Extra address to check-select setup" -- --config OR1_XACS_NORMAL -- bool "Normal" -- --config OR1_XACS_EXTENDED -- bool "Extended" -- --endchoice -- --choice -- prompt "External address termination" -- --config OR1_SETA_INTERNAL -- bool "Access is terminated internally" -- --config OR1_SETA_EXTERNAL -- bool "Access is terminated externally" -- --endchoice -- --endif # BR1_MACHINE_GPCM -- --if BR1_MACHINE_FCM -- --choice -- prompt "NAND Flash EEPROM page size" -- --config OR1_PGS_SMALL -- bool "Small page device" -- --config OR1_PGS_LARGE -- bool "Large page device" -- --endchoice -- --choice -- prompt "Chip select to command time" -- --config OR1_CSCT_1_CYCLE -- depends on OR1_TRLX_NORMAL -- bool "1 cycle" -- --config OR1_CSCT_2_CYCLE -- depends on OR1_TRLX_RELAXED -- bool "2 cycles" -- --config OR1_CSCT_4_CYCLE -- depends on OR1_TRLX_NORMAL -- bool "4 cycles" -- --config OR1_CSCT_8_CYCLE -- depends on OR1_TRLX_RELAXED -- bool "8 cycles" -- --endchoice -- --choice -- prompt "Command setup time" -- --config OR1_CST_COINCIDENT -- depends on OR1_TRLX_NORMAL -- bool "Coincident with any command" -- --config OR1_CST_QUARTER_CLOCK -- depends on OR1_TRLX_NORMAL -- bool "0.25 clocks after" -- --config OR1_CST_HALF_CLOCK -- depends on OR1_TRLX_RELAXED -- bool "0.5 clocks after" -- --config OR1_CST_ONE_CLOCK -- depends on OR1_TRLX_RELAXED -- bool "1 clock after" -- --endchoice -- --choice -- prompt "Command hold time" -- --config OR1_CHT_HALF_CLOCK -- depends on OR1_TRLX_NORMAL -- bool "0.5 clocks before" -- --config OR1_CHT_ONE_CLOCK -- depends on OR1_TRLX_NORMAL -- bool "1 clock before" -- --config OR1_CHT_ONE_HALF_CLOCK -- depends on OR1_TRLX_RELAXED -- bool "1.5 clocks before" -- --config OR1_CHT_TWO_CLOCK -- depends on OR1_TRLX_RELAXED -- bool "2 clocks before" -- --endchoice -- --choice -- prompt "Reset setup time" -- --config OR1_RST_THREE_QUARTER_CLOCK -- depends on OR1_TRLX_NORMAL -- bool "0.75 clocks prior" -- --config OR1_RST_ONE_HALF_CLOCK -- depends on OR1_TRLX_RELAXED -- bool "0.5 clocks prior" -- --config OR1_RST_ONE_CLOCK -- bool "1 clock prior" -- --endchoice -- --endif # BR1_MACHINE_FCM -- --if BR1_MACHINE_UPM -- --choice -- prompt "Burst inhibit" -- --config OR1_BI_BURSTSUPPORT -- bool "Support burst access" -- --config OR1_BI_BURSTINHIBIT -- bool "Inhibit burst access" -- --endchoice -- --endif # BR1_MACHINE_UPM -- --if BR1_MACHINE_SDRAM -- --choice -- prompt "Number of column address lines" -- --config OR1_COLS_7 -- bool "7" -- --config OR1_COLS_8 -- bool "8" -- --config OR1_COLS_9 -- bool "9" -- --config OR1_COLS_10 -- bool "10" -- --config OR1_COLS_11 -- bool "11" -- --config OR1_COLS_12 -- bool "12" -- --config OR1_COLS_13 -- bool "13" -- --config OR1_COLS_14 -- bool "14" -- --endchoice -- --choice -- prompt "Number of rows address lines" -- --config OR1_ROWS_9 -- bool "9" -- --config OR1_ROWS_10 -- bool "10" -- --config OR1_ROWS_11 -- bool "11" -- --config OR1_ROWS_12 -- bool "12" -- --config OR1_ROWS_13 -- bool "13" -- --config OR1_ROWS_14 -- bool "14" -- --config OR1_ROWS_15 -- bool "15" -- --endchoice -- --choice -- prompt "Page mode select" -- --config OR1_PMSEL_BTB -- bool "Back-to-back" -- --config OR1_PMSEL_KEPT_OPEN -- bool "Page kept open until page miss or refresh" -- --endchoice -- --endif # BR1_MACHINE_SDRAM -- --choice -- prompt "Relaxed timing" -- --config OR1_TRLX_NORMAL -- bool "Normal" -- --config OR1_TRLX_RELAXED -- bool "Relaxed" -- --endchoice -- --choice -- prompt "Extended hold time" -- --config OR1_EHTR_NORMAL -- depends on OR1_TRLX_NORMAL -- bool "Normal" -- --config OR1_EHTR_1_CYCLE -- depends on OR1_TRLX_NORMAL -- bool "1 idle clock cycle inserted" -- --config OR1_EHTR_4_CYCLE -- depends on OR1_TRLX_RELAXED -- bool "4 idle clock cycles inserted" -- --config OR1_EHTR_8_CYCLE -- depends on OR1_TRLX_RELAXED -- bool "8 idle clock cycles inserted" -- --endchoice -- --if !ARCH_MPC8308 -- --choice -- prompt "External address latch delay" -- --config OR1_EAD_NONE -- bool "None" -- --config OR1_EAD_EXTRA -- bool "Extra" -- --endchoice -- --endif # !ARCH_MPC8308 -- --endif # ELBC_BR1_OR1 -- --config BR1_PORTSIZE -- hex -- default 0x800 if BR1_PORTSIZE_8BIT -- default 0x1000 if BR1_PORTSIZE_16BIT -- default 0x1800 if BR1_PORTSIZE_32BIT -- --config BR1_ERRORCHECKING -- hex -- default 0x0 if !BR1_MACHINE_FCM -- default 0x0 if BR1_ERRORCHECKING_DISABLED -- default 0x200 if BR1_ERRORCHECKING_ECC_CHECKING -- default 0x400 if BR1_ERRORCHECKING_BOTH -- --config BR1_WRITE_PROTECT_BIT -- hex -- default 0x0 if !BR1_WRITE_PROTECT -- default 0x100 if BR1_WRITE_PROTECT -- --config BR1_MACHINE -- hex -- default 0x0 if BR1_MACHINE_GPCM -- default 0x20 if BR1_MACHINE_FCM -- default 0x60 if BR1_MACHINE_SDRAM -- default 0x80 if BR1_MACHINE_UPMA -- default 0xa0 if BR1_MACHINE_UPMB -- default 0xc0 if BR1_MACHINE_UPMC -- --config BR1_ATOMIC -- hex -- default 0x0 if !ARCH_MPC8313 && !ARCH_MPC8323 && !ARCH_MPC8360 -- default 0x0 if BR1_ATOMIC_NONE -- default 0x4 if BR1_ATOMIC_RAWA -- default 0x8 if BR1_ATOMIC_WARA -- --config BR1_VALID_BIT -- hex -- default 0x0 if !ELBC_BR1_OR1 -- default 0x1 if ELBC_BR1_OR1 -- --config OR1_AM -- hex -- default 0xffff8000 if OR1_AM_32_KBYTES && !BR1_MACHINE_SDRAM -- default 0xffff0000 if OR1_AM_64_KBYTES -- default 0xfffe0000 if OR1_AM_128_KBYTES -- default 0xfffc0000 if OR1_AM_256_KBYTES -- default 0xfff80000 if OR1_AM_512_KBYTES -- default 0xfff00000 if OR1_AM_1_MBYTES -- default 0xffe00000 if OR1_AM_2_MBYTES -- default 0xffc00000 if OR1_AM_4_MBYTES -- default 0xff800000 if OR1_AM_8_MBYTES -- default 0xff000000 if OR1_AM_16_MBYTES -- default 0xfe000000 if OR1_AM_32_MBYTES -- default 0xfc000000 if OR1_AM_64_MBYTES -- default 0xf8000000 if OR1_AM_128_MBYTES -- default 0xf0000000 if OR1_AM_256_MBYTES -- default 0xe0000000 if OR1_AM_512_MBYTES -- default 0xc0000000 if OR1_AM_1_GBYTES -- default 0x80000000 if OR1_AM_2_GBYTES -- default 0x00000000 if OR1_AM_4_GBYTES -- --config OR1_XAM -- hex -- default 0x0 if !OR1_XAM_SET -- default 0x6000 if OR1_XAM_SET -- --config OR1_BCTLD -- hex -- default 0x0 if OR1_BCTLD_ASSERTED -- default 0x1000 if OR1_BCTLD_NOT_ASSERTED -- --config OR1_BI -- hex -- default 0x0 if !BR1_MACHINE_UPM -- default 0x0 if OR1_BI_BURSTSUPPORT -- default 0x100 if OR1_BI_BURSTINHIBIT -- --config OR1_COLS -- hex -- default 0x0 if !BR1_MACHINE_SDRAM -- default 0x0 if OR1_COLS_7 -- default 0x400 if OR1_COLS_8 -- default 0x800 if OR1_COLS_9 -- default 0xc00 if OR1_COLS_10 -- default 0x1000 if OR1_COLS_11 -- default 0x1400 if OR1_COLS_12 -- default 0x1800 if OR1_COLS_13 -- default 0x1c00 if OR1_COLS_14 -- --config OR1_ROWS -- hex -- default 0x0 if !BR1_MACHINE_SDRAM -- default 0x0 if OR1_ROWS_9 -- default 0x40 if OR1_ROWS_10 -- default 0x80 if OR1_ROWS_11 -- default 0xc0 if OR1_ROWS_12 -- default 0x100 if OR1_ROWS_13 -- default 0x140 if OR1_ROWS_14 -- default 0x180 if OR1_ROWS_15 -- --config OR1_PMSEL -- hex -- default 0x0 if !BR1_MACHINE_SDRAM -- default 0x0 if OR1_PMSEL_BTB -- default 0x20 if OR1_PMSEL_KEPT_OPEN -- --config OR1_SCY -- hex -- default 0x0 if !BR1_MACHINE_GPCM && !BR1_MACHINE_FCM -- default 0x0 if OR1_SCY_0 -- default 0x10 if OR1_SCY_1 -- default 0x20 if OR1_SCY_2 -- default 0x30 if OR1_SCY_3 -- default 0x40 if OR1_SCY_4 -- default 0x50 if OR1_SCY_5 -- default 0x60 if OR1_SCY_6 -- default 0x70 if OR1_SCY_7 -- default 0x80 if OR1_SCY_8 -- default 0x90 if OR1_SCY_9 -- default 0xa0 if OR1_SCY_10 -- default 0xb0 if OR1_SCY_11 -- default 0xc0 if OR1_SCY_12 -- default 0xd0 if OR1_SCY_13 -- default 0xe0 if OR1_SCY_14 -- default 0xf0 if OR1_SCY_15 -- --config OR1_PGS -- hex -- default 0x0 if !BR1_MACHINE_FCM -- default 0x0 if OR1_PGS_SMALL -- default 0x400 if OR1_PGS_LARGE -- --config OR1_CSCT -- hex -- default 0x0 if !BR1_MACHINE_FCM -- default 0x0 if OR1_CSCT_1_CYCLE -- default 0x0 if OR1_CSCT_2_CYCLE -- default 0x200 if OR1_CSCT_4_CYCLE -- default 0x200 if OR1_CSCT_8_CYCLE -- --config OR1_CST -- hex -- default 0x0 if !BR1_MACHINE_FCM -- default 0x0 if OR1_CST_COINCIDENT -- default 0x100 if OR1_CST_QUARTER_CLOCK -- default 0x0 if OR1_CST_HALF_CLOCK -- default 0x100 if OR1_CST_ONE_CLOCK -- --config OR1_CHT -- hex -- default 0x0 if !BR1_MACHINE_FCM -- default 0x0 if OR1_CHT_HALF_CLOCK -- default 0x80 if OR1_CHT_ONE_CLOCK -- default 0x0 if OR1_CHT_ONE_HALF_CLOCK -- default 0x80 if OR1_CHT_TWO_CLOCK -- --config OR1_RST -- hex -- default 0x0 if !BR1_MACHINE_FCM -- default 0x0 if OR1_RST_THREE_QUARTER_CLOCK -- default 0x8 if OR1_RST_ONE_CLOCK -- default 0x0 if OR1_RST_ONE_HALF_CLOCK -- --config OR1_CSNT -- hex -- default 0x0 if !BR1_MACHINE_GPCM -- default 0x0 if OR1_CSNT_NORMAL -- default 0x800 if OR1_CSNT_EARLIER -- --config OR1_ACS -- hex -- default 0x0 if !BR1_MACHINE_GPCM -- default 0x0 if OR1_ACS_SAME_TIME -- default 0x400 if OR1_ACS_QUARTER_CYCLE_EARLIER -- default 0x600 if OR1_ACS_HALF_CYCLE_EARLIER -- --config OR1_XACS -- hex -- default 0x0 if !BR1_MACHINE_GPCM -- default 0x0 if OR1_XACS_NORMAL -- default 0x100 if OR1_XACS_EXTENDED -- --config OR1_SETA -- hex -- default 0x0 if !BR1_MACHINE_GPCM -- default 0x0 if OR1_SETA_INTERNAL -- default 0x8 if OR1_SETA_EXTERNAL -- --config OR1_TRLX -- hex -- default 0x0 if OR1_TRLX_NORMAL -- default 0x4 if OR1_TRLX_RELAXED -- --config OR1_EHTR -- hex -- default 0x0 if OR1_EHTR_NORMAL -- default 0x2 if OR1_EHTR_1_CYCLE -- default 0x0 if OR1_EHTR_4_CYCLE -- default 0x2 if OR1_EHTR_8_CYCLE -- --config OR1_EAD -- hex -- default 0x0 if ARCH_MPC8308 -- default 0x0 if OR1_EAD_NONE -- default 0x1 if OR1_EAD_EXTRA -diff --git a/arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc2 b/arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc2 -deleted file mode 100644 -index a9b2546cd8..0000000000 ---- a/arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc2 -+++ /dev/null -@@ -1,733 +0,0 @@ --menuconfig ELBC_BR2_OR2 -- bool "ELBC BR2/OR2" -- --if ELBC_BR2_OR2 -- --config BR2_OR2_NAME -- string "Identifier" -- --config BR2_OR2_BASE -- hex "Port base" -- --choice -- prompt "Port size" -- --config BR2_PORTSIZE_8BIT -- bool "8-bit" -- --config BR2_PORTSIZE_16BIT -- depends on !BR2_MACHINE_FCM -- bool "16-bit" -- -- --config BR2_PORTSIZE_32BIT -- depends on !BR2_MACHINE_FCM -- depends on ARCH_MPC8360 || ARCH_MPC8379 -- bool "32-bit" -- --endchoice -- --if BR2_MACHINE_FCM -- --choice -- prompt "Data Error Checking" -- --config BR2_ERRORCHECKING_DISABLED -- bool "Disabled" -- --config BR2_ERRORCHECKING_ECC_CHECKING -- bool "ECC checking / No ECC generation" -- --config BR2_ERRORCHECKING_BOTH -- bool "ECC checking and generation" -- --endchoice -- --endif -- --config BR2_WRITE_PROTECT -- bool "Write-protect" -- --config BR2_MACHINE_UPM -- bool -- --choice -- prompt "Machine select" -- --config BR2_MACHINE_GPCM -- bool "GPCM" -- --config BR2_MACHINE_FCM -- depends on !ARCH_MPC832X && !ARCH_MPC8360 -- bool "FCM" -- --config BR2_MACHINE_SDRAM -- depends on ARCH_MPC8360 -- bool "SDRAM" -- --config BR2_MACHINE_UPMA -- select BR2_MACHINE_UPM -- bool "UPM (A)" -- --config BR2_MACHINE_UPMB -- select BR2_MACHINE_UPM -- bool "UPM (B)" -- --config BR2_MACHINE_UPMC -- select BR2_MACHINE_UPM -- bool "UPM (C)" -- --endchoice -- --if ARCH_MPC8313 || ARCH_MPC8323 || ARCH_MPC8360 -- --choice -- prompt "Atomic operations" -- --config BR2_ATOMIC_NONE -- bool "No atomic operations" -- --config BR2_ATOMIC_RAWA -- bool "Read-after-write-atomic" -- --config BR2_ATOMIC_WARA -- bool "Write-after-read-atomic" -- --endchoice -- --endif -- --if BR2_MACHINE_GPCM || BR2_MACHINE_FCM || BR2_MACHINE_UPM || BR2_MACHINE_SDRAM -- --choice -- prompt "Address mask" -- --config OR2_AM_32_KBYTES -- depends on !BR2_MACHINE_SDRAM -- bool "32 kb" -- --config OR2_AM_64_KBYTES -- bool "64 kb" -- --config OR2_AM_128_KBYTES -- bool "128 kb" -- --config OR2_AM_256_KBYTES -- bool "256 kb" -- --config OR2_AM_512_KBYTES -- bool "512 kb" -- --config OR2_AM_1_MBYTES -- bool "1 mb" -- --config OR2_AM_2_MBYTES -- bool "2 mb" -- --config OR2_AM_4_MBYTES -- bool "4 mb" -- --config OR2_AM_8_MBYTES -- bool "8 mb" -- --config OR2_AM_16_MBYTES -- bool "16 mb" -- --config OR2_AM_32_MBYTES -- bool "32 mb" -- --config OR2_AM_64_MBYTES -- bool "64 mb" -- --# XXX: Some boards define 128MB AM with GPCM, even though it should not be --# possible according to the manuals --config OR2_AM_128_MBYTES -- bool "128 mb" -- --# XXX: Some boards define 256MB AM with GPCM, even though it should not be --# possible according to the manuals --config OR2_AM_256_MBYTES -- bool "256 mb" -- --config OR2_AM_512_MBYTES -- depends on BR2_MACHINE_FCM -- bool "512 mb" -- --# XXX: Some boards define 1GB AM with GPCM, even though it should not be --# possible according to the manuals --config OR2_AM_1_GBYTES -- bool "1 gb" -- --config OR2_AM_2_GBYTES -- depends on BR2_MACHINE_FCM -- bool "2 gb" -- --config OR2_AM_4_GBYTES -- depends on BR2_MACHINE_FCM -- bool "4 gb" -- --endchoice -- --config OR2_XAM_SET -- bool "Set unused bytes after address mask" --choice -- prompt "Buffer control disable" -- --config OR2_BCTLD_ASSERTED -- bool "Asserted" -- --config OR2_BCTLD_NOT_ASSERTED -- bool "Not asserted" -- --endchoice -- --endif -- --if BR2_MACHINE_GPCM || BR2_MACHINE_FCM -- --choice -- prompt "Cycle length in bus clocks" -- --config OR2_SCY_0 -- bool "No wait states" -- --config OR2_SCY_1 -- bool "1 wait state" -- --config OR2_SCY_2 -- bool "2 wait states" -- --config OR2_SCY_3 -- bool "3 wait states" -- --config OR2_SCY_4 -- bool "4 wait states" -- --config OR2_SCY_5 -- bool "5 wait states" -- --config OR2_SCY_6 -- bool "6 wait states" -- --config OR2_SCY_7 -- bool "7 wait states" -- --config OR2_SCY_8 -- depends on BR2_MACHINE_GPCM -- bool "8 wait states" -- --config OR2_SCY_9 -- depends on BR2_MACHINE_GPCM -- bool "9 wait states" -- --config OR2_SCY_10 -- depends on BR2_MACHINE_GPCM -- bool "10 wait states" -- --config OR2_SCY_11 -- depends on BR2_MACHINE_GPCM -- bool "11 wait states" -- --config OR2_SCY_12 -- depends on BR2_MACHINE_GPCM -- bool "12 wait states" -- --config OR2_SCY_13 -- depends on BR2_MACHINE_GPCM -- bool "13 wait states" -- --config OR2_SCY_14 -- depends on BR2_MACHINE_GPCM -- bool "14 wait states" -- --config OR2_SCY_15 -- depends on BR2_MACHINE_GPCM -- bool "15 wait states" -- --endchoice -- --endif # BR2_MACHINE_GPCM || BR2_MACHINE_FCM -- --if BR2_MACHINE_GPCM -- --choice -- prompt "Chip select negotiation time" -- --config OR2_CSNT_NORMAL -- bool "Normal" -- --config OR2_CSNT_EARLIER -- bool "Earlier" -- --endchoice -- --choice -- prompt "Address to chip-select setup" -- --config OR2_ACS_SAME_TIME -- bool "At the same time" -- --config OR2_ACS_HALF_CYCLE_EARLIER -- bool "Half of a bus clock cycle earlier" -- --config OR2_ACS_QUARTER_CYCLE_EARLIER -- bool "Half/Quarter of a bus clock cycle earlier" -- --endchoice -- --choice -- prompt "Extra address to check-select setup" -- --config OR2_XACS_NORMAL -- bool "Normal" -- --config OR2_XACS_EXTENDED -- bool "Extended" -- --endchoice -- --choice -- prompt "External address termination" -- --config OR2_SETA_INTERNAL -- bool "Access is terminated internally" -- --config OR2_SETA_EXTERNAL -- bool "Access is terminated externally" -- --endchoice -- --endif # BR2_MACHINE_GPCM -- --if BR2_MACHINE_FCM -- --choice -- prompt "NAND Flash EEPROM page size" -- --config OR2_PGS_SMALL -- bool "Small page device" -- --config OR2_PGS_LARGE -- bool "Large page device" -- --endchoice -- --choice -- prompt "Chip select to command time" -- --config OR2_CSCT_1_CYCLE -- depends on OR2_TRLX_NORMAL -- bool "1 cycle" -- --config OR2_CSCT_2_CYCLE -- depends on OR2_TRLX_RELAXED -- bool "2 cycles" -- --config OR2_CSCT_4_CYCLE -- depends on OR2_TRLX_NORMAL -- bool "4 cycles" -- --config OR2_CSCT_8_CYCLE -- depends on OR2_TRLX_RELAXED -- bool "8 cycles" -- --endchoice -- --choice -- prompt "Command setup time" -- --config OR2_CST_COINCIDENT -- depends on OR2_TRLX_NORMAL -- bool "Coincident with any command" -- --config OR2_CST_QUARTER_CLOCK -- depends on OR2_TRLX_NORMAL -- bool "0.25 clocks after" -- --config OR2_CST_HALF_CLOCK -- depends on OR2_TRLX_RELAXED -- bool "0.5 clocks after" -- --config OR2_CST_ONE_CLOCK -- depends on OR2_TRLX_RELAXED -- bool "1 clock after" -- --endchoice -- --choice -- prompt "Command hold time" -- --config OR2_CHT_HALF_CLOCK -- depends on OR2_TRLX_NORMAL -- bool "0.5 clocks before" -- --config OR2_CHT_ONE_CLOCK -- depends on OR2_TRLX_NORMAL -- bool "1 clock before" -- --config OR2_CHT_ONE_HALF_CLOCK -- depends on OR2_TRLX_RELAXED -- bool "1.5 clocks before" -- --config OR2_CHT_TWO_CLOCK -- depends on OR2_TRLX_RELAXED -- bool "2 clocks before" -- --endchoice -- --choice -- prompt "Reset setup time" -- --config OR2_RST_THREE_QUARTER_CLOCK -- depends on OR2_TRLX_NORMAL -- bool "0.75 clocks prior" -- --config OR2_RST_ONE_HALF_CLOCK -- depends on OR2_TRLX_RELAXED -- bool "0.5 clocks prior" -- --config OR2_RST_ONE_CLOCK -- bool "1 clock prior" -- --endchoice -- --endif # BR2_MACHINE_FCM -- --if BR2_MACHINE_UPM -- --choice -- prompt "Burst inhibit" -- --config OR2_BI_BURSTSUPPORT -- bool "Support burst access" -- --config OR2_BI_BURSTINHIBIT -- bool "Inhibit burst access" -- --endchoice -- --endif # BR2_MACHINE_UPM -- --if BR2_MACHINE_SDRAM -- --choice -- prompt "Number of column address lines" -- --config OR2_COLS_7 -- bool "7" -- --config OR2_COLS_8 -- bool "8" -- --config OR2_COLS_9 -- bool "9" -- --config OR2_COLS_10 -- bool "10" -- --config OR2_COLS_11 -- bool "11" -- --config OR2_COLS_12 -- bool "12" -- --config OR2_COLS_13 -- bool "13" -- --config OR2_COLS_14 -- bool "14" -- --endchoice -- --choice -- prompt "Number of rows address lines" -- --config OR2_ROWS_9 -- bool "9" -- --config OR2_ROWS_10 -- bool "10" -- --config OR2_ROWS_11 -- bool "11" -- --config OR2_ROWS_12 -- bool "12" -- --config OR2_ROWS_13 -- bool "13" -- --config OR2_ROWS_14 -- bool "14" -- --config OR2_ROWS_15 -- bool "15" -- --endchoice -- --choice -- prompt "Page mode select" -- --config OR2_PMSEL_BTB -- bool "Back-to-back" -- --config OR2_PMSEL_KEPT_OPEN -- bool "Page kept open until page miss or refresh" -- --endchoice -- --endif # BR2_MACHINE_SDRAM -- --choice -- prompt "Relaxed timing" -- --config OR2_TRLX_NORMAL -- bool "Normal" -- --config OR2_TRLX_RELAXED -- bool "Relaxed" -- --endchoice -- --choice -- prompt "Extended hold time" -- --config OR2_EHTR_NORMAL -- depends on OR2_TRLX_NORMAL -- bool "Normal" -- --config OR2_EHTR_1_CYCLE -- depends on OR2_TRLX_NORMAL -- bool "1 idle clock cycle inserted" -- --config OR2_EHTR_4_CYCLE -- depends on OR2_TRLX_RELAXED -- bool "4 idle clock cycles inserted" -- --config OR2_EHTR_8_CYCLE -- depends on OR2_TRLX_RELAXED -- bool "8 idle clock cycles inserted" -- --endchoice -- --if !ARCH_MPC8308 -- --choice -- prompt "External address latch delay" -- --config OR2_EAD_NONE -- bool "None" -- --config OR2_EAD_EXTRA -- bool "Extra" -- --endchoice -- --endif # !ARCH_MPC8308 -- --endif # ELBC_BR2_OR2 -- --config BR2_PORTSIZE -- hex -- default 0x800 if BR2_PORTSIZE_8BIT -- default 0x1000 if BR2_PORTSIZE_16BIT -- default 0x1800 if BR2_PORTSIZE_32BIT -- --config BR2_ERRORCHECKING -- hex -- default 0x0 if !BR2_MACHINE_FCM -- default 0x0 if BR2_ERRORCHECKING_DISABLED -- default 0x200 if BR2_ERRORCHECKING_ECC_CHECKING -- default 0x400 if BR2_ERRORCHECKING_BOTH -- --config BR2_WRITE_PROTECT_BIT -- hex -- default 0x0 if !BR2_WRITE_PROTECT -- default 0x100 if BR2_WRITE_PROTECT -- --config BR2_MACHINE -- hex -- default 0x0 if BR2_MACHINE_GPCM -- default 0x20 if BR2_MACHINE_FCM -- default 0x60 if BR2_MACHINE_SDRAM -- default 0x80 if BR2_MACHINE_UPMA -- default 0xa0 if BR2_MACHINE_UPMB -- default 0xc0 if BR2_MACHINE_UPMC -- --config BR2_ATOMIC -- hex -- default 0x0 if !ARCH_MPC8313 && !ARCH_MPC8323 && !ARCH_MPC8360 -- default 0x0 if BR2_ATOMIC_NONE -- default 0x4 if BR2_ATOMIC_RAWA -- default 0x8 if BR2_ATOMIC_WARA -- --config BR2_VALID_BIT -- hex -- default 0x0 if !ELBC_BR2_OR2 -- default 0x1 if ELBC_BR2_OR2 -- --config OR2_AM -- hex -- default 0xffff8000 if OR2_AM_32_KBYTES && !BR2_MACHINE_SDRAM -- default 0xffff0000 if OR2_AM_64_KBYTES -- default 0xfffe0000 if OR2_AM_128_KBYTES -- default 0xfffc0000 if OR2_AM_256_KBYTES -- default 0xfff80000 if OR2_AM_512_KBYTES -- default 0xfff00000 if OR2_AM_1_MBYTES -- default 0xffe00000 if OR2_AM_2_MBYTES -- default 0xffc00000 if OR2_AM_4_MBYTES -- default 0xff800000 if OR2_AM_8_MBYTES -- default 0xff000000 if OR2_AM_16_MBYTES -- default 0xfe000000 if OR2_AM_32_MBYTES -- default 0xfc000000 if OR2_AM_64_MBYTES -- default 0xf8000000 if OR2_AM_128_MBYTES -- default 0xf0000000 if OR2_AM_256_MBYTES -- default 0xe0000000 if OR2_AM_512_MBYTES -- default 0xc0000000 if OR2_AM_1_GBYTES -- default 0x80000000 if OR2_AM_2_GBYTES -- default 0x00000000 if OR2_AM_4_GBYTES -- --config OR2_XAM -- hex -- default 0x0 if !OR2_XAM_SET -- default 0x6000 if OR2_XAM_SET -- --config OR2_BCTLD -- hex -- default 0x0 if OR2_BCTLD_ASSERTED -- default 0x1000 if OR2_BCTLD_NOT_ASSERTED -- --config OR2_BI -- hex -- default 0x0 if !BR2_MACHINE_UPM -- default 0x0 if OR2_BI_BURSTSUPPORT -- default 0x100 if OR2_BI_BURSTINHIBIT -- --config OR2_COLS -- hex -- default 0x0 if !BR2_MACHINE_SDRAM -- default 0x0 if OR2_COLS_7 -- default 0x400 if OR2_COLS_8 -- default 0x800 if OR2_COLS_9 -- default 0xc00 if OR2_COLS_10 -- default 0x1000 if OR2_COLS_11 -- default 0x1400 if OR2_COLS_12 -- default 0x1800 if OR2_COLS_13 -- default 0x1c00 if OR2_COLS_14 -- --config OR2_ROWS -- hex -- default 0x0 if !BR2_MACHINE_SDRAM -- default 0x0 if OR2_ROWS_9 -- default 0x40 if OR2_ROWS_10 -- default 0x80 if OR2_ROWS_11 -- default 0xc0 if OR2_ROWS_12 -- default 0x100 if OR2_ROWS_13 -- default 0x140 if OR2_ROWS_14 -- default 0x180 if OR2_ROWS_15 -- --config OR2_PMSEL -- hex -- default 0x0 if !BR2_MACHINE_SDRAM -- default 0x0 if OR2_PMSEL_BTB -- default 0x20 if OR2_PMSEL_KEPT_OPEN -- --config OR2_SCY -- hex -- default 0x0 if !BR2_MACHINE_GPCM && !BR2_MACHINE_FCM -- default 0x0 if OR2_SCY_0 -- default 0x10 if OR2_SCY_1 -- default 0x20 if OR2_SCY_2 -- default 0x30 if OR2_SCY_3 -- default 0x40 if OR2_SCY_4 -- default 0x50 if OR2_SCY_5 -- default 0x60 if OR2_SCY_6 -- default 0x70 if OR2_SCY_7 -- default 0x80 if OR2_SCY_8 -- default 0x90 if OR2_SCY_9 -- default 0xa0 if OR2_SCY_10 -- default 0xb0 if OR2_SCY_11 -- default 0xc0 if OR2_SCY_12 -- default 0xd0 if OR2_SCY_13 -- default 0xe0 if OR2_SCY_14 -- default 0xf0 if OR2_SCY_15 -- --config OR2_PGS -- hex -- default 0x0 if !BR2_MACHINE_FCM -- default 0x0 if OR2_PGS_SMALL -- default 0x400 if OR2_PGS_LARGE -- --config OR2_CSCT -- hex -- default 0x0 if !BR2_MACHINE_FCM -- default 0x0 if OR2_CSCT_1_CYCLE -- default 0x0 if OR2_CSCT_2_CYCLE -- default 0x200 if OR2_CSCT_4_CYCLE -- default 0x200 if OR2_CSCT_8_CYCLE -- --config OR2_CST -- hex -- default 0x0 if !BR2_MACHINE_FCM -- default 0x0 if OR2_CST_COINCIDENT -- default 0x100 if OR2_CST_QUARTER_CLOCK -- default 0x0 if OR2_CST_HALF_CLOCK -- default 0x100 if OR2_CST_ONE_CLOCK -- --config OR2_CHT -- hex -- default 0x0 if !BR2_MACHINE_FCM -- default 0x0 if OR2_CHT_HALF_CLOCK -- default 0x80 if OR2_CHT_ONE_CLOCK -- default 0x0 if OR2_CHT_ONE_HALF_CLOCK -- default 0x80 if OR2_CHT_TWO_CLOCK -- --config OR2_RST -- hex -- default 0x0 if !BR2_MACHINE_FCM -- default 0x0 if OR2_RST_THREE_QUARTER_CLOCK -- default 0x8 if OR2_RST_ONE_CLOCK -- default 0x0 if OR2_RST_ONE_HALF_CLOCK -- --config OR2_CSNT -- hex -- default 0x0 if !BR2_MACHINE_GPCM -- default 0x0 if OR2_CSNT_NORMAL -- default 0x800 if OR2_CSNT_EARLIER -- --config OR2_ACS -- hex -- default 0x0 if !BR2_MACHINE_GPCM -- default 0x0 if OR2_ACS_SAME_TIME -- default 0x400 if OR2_ACS_QUARTER_CYCLE_EARLIER -- default 0x600 if OR2_ACS_HALF_CYCLE_EARLIER -- --config OR2_XACS -- hex -- default 0x0 if !BR2_MACHINE_GPCM -- default 0x0 if OR2_XACS_NORMAL -- default 0x100 if OR2_XACS_EXTENDED -- --config OR2_SETA -- hex -- default 0x0 if !BR2_MACHINE_GPCM -- default 0x0 if OR2_SETA_INTERNAL -- default 0x8 if OR2_SETA_EXTERNAL -- --config OR2_TRLX -- hex -- default 0x0 if OR2_TRLX_NORMAL -- default 0x4 if OR2_TRLX_RELAXED -- --config OR2_EHTR -- hex -- default 0x0 if OR2_EHTR_NORMAL -- default 0x2 if OR2_EHTR_1_CYCLE -- default 0x0 if OR2_EHTR_4_CYCLE -- default 0x2 if OR2_EHTR_8_CYCLE -- --config OR2_EAD -- hex -- default 0x0 if ARCH_MPC8308 -- default 0x0 if OR2_EAD_NONE -- default 0x1 if OR2_EAD_EXTRA -diff --git a/arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc3 b/arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc3 -deleted file mode 100644 -index 94442cdc97..0000000000 ---- a/arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc3 -+++ /dev/null -@@ -1,733 +0,0 @@ --menuconfig ELBC_BR3_OR3 -- bool "ELBC BR3/OR3" -- --if ELBC_BR3_OR3 -- --config BR3_OR3_NAME -- string "Identifier" -- --config BR3_OR3_BASE -- hex "Port base" -- --choice -- prompt "Port size" -- --config BR3_PORTSIZE_8BIT -- bool "8-bit" -- --config BR3_PORTSIZE_16BIT -- depends on !BR3_MACHINE_FCM -- bool "16-bit" -- -- --config BR3_PORTSIZE_32BIT -- depends on !BR3_MACHINE_FCM -- depends on ARCH_MPC8360 || ARCH_MPC8379 -- bool "32-bit" -- --endchoice -- --if BR3_MACHINE_FCM -- --choice -- prompt "Data Error Checking" -- --config BR3_ERRORCHECKING_DISABLED -- bool "Disabled" -- --config BR3_ERRORCHECKING_ECC_CHECKING -- bool "ECC checking / No ECC generation" -- --config BR3_ERRORCHECKING_BOTH -- bool "ECC checking and generation" -- --endchoice -- --endif -- --config BR3_WRITE_PROTECT -- bool "Write-protect" -- --config BR3_MACHINE_UPM -- bool -- --choice -- prompt "Machine select" -- --config BR3_MACHINE_GPCM -- bool "GPCM" -- --config BR3_MACHINE_FCM -- depends on !ARCH_MPC832X && !ARCH_MPC8360 -- bool "FCM" -- --config BR3_MACHINE_SDRAM -- depends on ARCH_MPC8360 -- bool "SDRAM" -- --config BR3_MACHINE_UPMA -- select BR3_MACHINE_UPM -- bool "UPM (A)" -- --config BR3_MACHINE_UPMB -- select BR3_MACHINE_UPM -- bool "UPM (B)" -- --config BR3_MACHINE_UPMC -- select BR3_MACHINE_UPM -- bool "UPM (C)" -- --endchoice -- --if ARCH_MPC8313 || ARCH_MPC8323 || ARCH_MPC8360 -- --choice -- prompt "Atomic operations" -- --config BR3_ATOMIC_NONE -- bool "No atomic operations" -- --config BR3_ATOMIC_RAWA -- bool "Read-after-write-atomic" -- --config BR3_ATOMIC_WARA -- bool "Write-after-read-atomic" -- --endchoice -- --endif -- --if BR3_MACHINE_GPCM || BR3_MACHINE_FCM || BR3_MACHINE_UPM || BR3_MACHINE_SDRAM -- --choice -- prompt "Address mask" -- --config OR3_AM_32_KBYTES -- depends on !BR3_MACHINE_SDRAM -- bool "32 kb" -- --config OR3_AM_64_KBYTES -- bool "64 kb" -- --config OR3_AM_128_KBYTES -- bool "128 kb" -- --config OR3_AM_256_KBYTES -- bool "256 kb" -- --config OR3_AM_512_KBYTES -- bool "512 kb" -- --config OR3_AM_1_MBYTES -- bool "1 mb" -- --config OR3_AM_2_MBYTES -- bool "2 mb" -- --config OR3_AM_4_MBYTES -- bool "4 mb" -- --config OR3_AM_8_MBYTES -- bool "8 mb" -- --config OR3_AM_16_MBYTES -- bool "16 mb" -- --config OR3_AM_32_MBYTES -- bool "32 mb" -- --config OR3_AM_64_MBYTES -- bool "64 mb" -- --# XXX: Some boards define 128MB AM with GPCM, even though it should not be --# possible according to the manuals --config OR3_AM_128_MBYTES -- bool "128 mb" -- --# XXX: Some boards define 256MB AM with GPCM, even though it should not be --# possible according to the manuals --config OR3_AM_256_MBYTES -- bool "256 mb" -- --config OR3_AM_512_MBYTES -- depends on BR3_MACHINE_FCM -- bool "512 mb" -- --# XXX: Some boards define 1GB AM with GPCM, even though it should not be --# possible according to the manuals --config OR3_AM_1_GBYTES -- bool "1 gb" -- --config OR3_AM_2_GBYTES -- depends on BR3_MACHINE_FCM -- bool "2 gb" -- --config OR3_AM_4_GBYTES -- depends on BR3_MACHINE_FCM -- bool "4 gb" -- --endchoice -- --config OR3_XAM_SET -- bool "Set unused bytes after address mask" --choice -- prompt "Buffer control disable" -- --config OR3_BCTLD_ASSERTED -- bool "Asserted" -- --config OR3_BCTLD_NOT_ASSERTED -- bool "Not asserted" -- --endchoice -- --endif -- --if BR3_MACHINE_GPCM || BR3_MACHINE_FCM -- --choice -- prompt "Cycle length in bus clocks" -- --config OR3_SCY_0 -- bool "No wait states" -- --config OR3_SCY_1 -- bool "1 wait state" -- --config OR3_SCY_2 -- bool "2 wait states" -- --config OR3_SCY_3 -- bool "3 wait states" -- --config OR3_SCY_4 -- bool "4 wait states" -- --config OR3_SCY_5 -- bool "5 wait states" -- --config OR3_SCY_6 -- bool "6 wait states" -- --config OR3_SCY_7 -- bool "7 wait states" -- --config OR3_SCY_8 -- depends on BR3_MACHINE_GPCM -- bool "8 wait states" -- --config OR3_SCY_9 -- depends on BR3_MACHINE_GPCM -- bool "9 wait states" -- --config OR3_SCY_10 -- depends on BR3_MACHINE_GPCM -- bool "10 wait states" -- --config OR3_SCY_11 -- depends on BR3_MACHINE_GPCM -- bool "11 wait states" -- --config OR3_SCY_12 -- depends on BR3_MACHINE_GPCM -- bool "12 wait states" -- --config OR3_SCY_13 -- depends on BR3_MACHINE_GPCM -- bool "13 wait states" -- --config OR3_SCY_14 -- depends on BR3_MACHINE_GPCM -- bool "14 wait states" -- --config OR3_SCY_15 -- depends on BR3_MACHINE_GPCM -- bool "15 wait states" -- --endchoice -- --endif # BR3_MACHINE_GPCM || BR3_MACHINE_FCM -- --if BR3_MACHINE_GPCM -- --choice -- prompt "Chip select negotiation time" -- --config OR3_CSNT_NORMAL -- bool "Normal" -- --config OR3_CSNT_EARLIER -- bool "Earlier" -- --endchoice -- --choice -- prompt "Address to chip-select setup" -- --config OR3_ACS_SAME_TIME -- bool "At the same time" -- --config OR3_ACS_HALF_CYCLE_EARLIER -- bool "Half of a bus clock cycle earlier" -- --config OR3_ACS_QUARTER_CYCLE_EARLIER -- bool "Half/Quarter of a bus clock cycle earlier" -- --endchoice -- --choice -- prompt "Extra address to check-select setup" -- --config OR3_XACS_NORMAL -- bool "Normal" -- --config OR3_XACS_EXTENDED -- bool "Extended" -- --endchoice -- --choice -- prompt "External address termination" -- --config OR3_SETA_INTERNAL -- bool "Access is terminated internally" -- --config OR3_SETA_EXTERNAL -- bool "Access is terminated externally" -- --endchoice -- --endif # BR3_MACHINE_GPCM -- --if BR3_MACHINE_FCM -- --choice -- prompt "NAND Flash EEPROM page size" -- --config OR3_PGS_SMALL -- bool "Small page device" -- --config OR3_PGS_LARGE -- bool "Large page device" -- --endchoice -- --choice -- prompt "Chip select to command time" -- --config OR3_CSCT_1_CYCLE -- depends on OR3_TRLX_NORMAL -- bool "1 cycle" -- --config OR3_CSCT_2_CYCLE -- depends on OR3_TRLX_RELAXED -- bool "2 cycles" -- --config OR3_CSCT_4_CYCLE -- depends on OR3_TRLX_NORMAL -- bool "4 cycles" -- --config OR3_CSCT_8_CYCLE -- depends on OR3_TRLX_RELAXED -- bool "8 cycles" -- --endchoice -- --choice -- prompt "Command setup time" -- --config OR3_CST_COINCIDENT -- depends on OR3_TRLX_NORMAL -- bool "Coincident with any command" -- --config OR3_CST_QUARTER_CLOCK -- depends on OR3_TRLX_NORMAL -- bool "0.25 clocks after" -- --config OR3_CST_HALF_CLOCK -- depends on OR3_TRLX_RELAXED -- bool "0.5 clocks after" -- --config OR3_CST_ONE_CLOCK -- depends on OR3_TRLX_RELAXED -- bool "1 clock after" -- --endchoice -- --choice -- prompt "Command hold time" -- --config OR3_CHT_HALF_CLOCK -- depends on OR3_TRLX_NORMAL -- bool "0.5 clocks before" -- --config OR3_CHT_ONE_CLOCK -- depends on OR3_TRLX_NORMAL -- bool "1 clock before" -- --config OR3_CHT_ONE_HALF_CLOCK -- depends on OR3_TRLX_RELAXED -- bool "1.5 clocks before" -- --config OR3_CHT_TWO_CLOCK -- depends on OR3_TRLX_RELAXED -- bool "2 clocks before" -- --endchoice -- --choice -- prompt "Reset setup time" -- --config OR3_RST_THREE_QUARTER_CLOCK -- depends on OR3_TRLX_NORMAL -- bool "0.75 clocks prior" -- --config OR3_RST_ONE_HALF_CLOCK -- depends on OR3_TRLX_RELAXED -- bool "0.5 clocks prior" -- --config OR3_RST_ONE_CLOCK -- bool "1 clock prior" -- --endchoice -- --endif # BR3_MACHINE_FCM -- --if BR3_MACHINE_UPM -- --choice -- prompt "Burst inhibit" -- --config OR3_BI_BURSTSUPPORT -- bool "Support burst access" -- --config OR3_BI_BURSTINHIBIT -- bool "Inhibit burst access" -- --endchoice -- --endif # BR3_MACHINE_UPM -- --if BR3_MACHINE_SDRAM -- --choice -- prompt "Number of column address lines" -- --config OR3_COLS_7 -- bool "7" -- --config OR3_COLS_8 -- bool "8" -- --config OR3_COLS_9 -- bool "9" -- --config OR3_COLS_10 -- bool "10" -- --config OR3_COLS_11 -- bool "11" -- --config OR3_COLS_12 -- bool "12" -- --config OR3_COLS_13 -- bool "13" -- --config OR3_COLS_14 -- bool "14" -- --endchoice -- --choice -- prompt "Number of rows address lines" -- --config OR3_ROWS_9 -- bool "9" -- --config OR3_ROWS_10 -- bool "10" -- --config OR3_ROWS_11 -- bool "11" -- --config OR3_ROWS_12 -- bool "12" -- --config OR3_ROWS_13 -- bool "13" -- --config OR3_ROWS_14 -- bool "14" -- --config OR3_ROWS_15 -- bool "15" -- --endchoice -- --choice -- prompt "Page mode select" -- --config OR3_PMSEL_BTB -- bool "Back-to-back" -- --config OR3_PMSEL_KEPT_OPEN -- bool "Page kept open until page miss or refresh" -- --endchoice -- --endif # BR3_MACHINE_SDRAM -- --choice -- prompt "Relaxed timing" -- --config OR3_TRLX_NORMAL -- bool "Normal" -- --config OR3_TRLX_RELAXED -- bool "Relaxed" -- --endchoice -- --choice -- prompt "Extended hold time" -- --config OR3_EHTR_NORMAL -- depends on OR3_TRLX_NORMAL -- bool "Normal" -- --config OR3_EHTR_1_CYCLE -- depends on OR3_TRLX_NORMAL -- bool "1 idle clock cycle inserted" -- --config OR3_EHTR_4_CYCLE -- depends on OR3_TRLX_RELAXED -- bool "4 idle clock cycles inserted" -- --config OR3_EHTR_8_CYCLE -- depends on OR3_TRLX_RELAXED -- bool "8 idle clock cycles inserted" -- --endchoice -- --if !ARCH_MPC8308 -- --choice -- prompt "External address latch delay" -- --config OR3_EAD_NONE -- bool "None" -- --config OR3_EAD_EXTRA -- bool "Extra" -- --endchoice -- --endif # !ARCH_MPC8308 -- --endif # ELBC_BR3_OR3 -- --config BR3_PORTSIZE -- hex -- default 0x800 if BR3_PORTSIZE_8BIT -- default 0x1000 if BR3_PORTSIZE_16BIT -- default 0x1800 if BR3_PORTSIZE_32BIT -- --config BR3_ERRORCHECKING -- hex -- default 0x0 if !BR3_MACHINE_FCM -- default 0x0 if BR3_ERRORCHECKING_DISABLED -- default 0x200 if BR3_ERRORCHECKING_ECC_CHECKING -- default 0x400 if BR3_ERRORCHECKING_BOTH -- --config BR3_WRITE_PROTECT_BIT -- hex -- default 0x0 if !BR3_WRITE_PROTECT -- default 0x100 if BR3_WRITE_PROTECT -- --config BR3_MACHINE -- hex -- default 0x0 if BR3_MACHINE_GPCM -- default 0x20 if BR3_MACHINE_FCM -- default 0x60 if BR3_MACHINE_SDRAM -- default 0x80 if BR3_MACHINE_UPMA -- default 0xa0 if BR3_MACHINE_UPMB -- default 0xc0 if BR3_MACHINE_UPMC -- --config BR3_ATOMIC -- hex -- default 0x0 if !ARCH_MPC8313 && !ARCH_MPC8323 && !ARCH_MPC8360 -- default 0x0 if BR3_ATOMIC_NONE -- default 0x4 if BR3_ATOMIC_RAWA -- default 0x8 if BR3_ATOMIC_WARA -- --config BR3_VALID_BIT -- hex -- default 0x0 if !ELBC_BR3_OR3 -- default 0x1 if ELBC_BR3_OR3 -- --config OR3_AM -- hex -- default 0xffff8000 if OR3_AM_32_KBYTES && !BR3_MACHINE_SDRAM -- default 0xffff0000 if OR3_AM_64_KBYTES -- default 0xfffe0000 if OR3_AM_128_KBYTES -- default 0xfffc0000 if OR3_AM_256_KBYTES -- default 0xfff80000 if OR3_AM_512_KBYTES -- default 0xfff00000 if OR3_AM_1_MBYTES -- default 0xffe00000 if OR3_AM_2_MBYTES -- default 0xffc00000 if OR3_AM_4_MBYTES -- default 0xff800000 if OR3_AM_8_MBYTES -- default 0xff000000 if OR3_AM_16_MBYTES -- default 0xfe000000 if OR3_AM_32_MBYTES -- default 0xfc000000 if OR3_AM_64_MBYTES -- default 0xf8000000 if OR3_AM_128_MBYTES -- default 0xf0000000 if OR3_AM_256_MBYTES -- default 0xe0000000 if OR3_AM_512_MBYTES -- default 0xc0000000 if OR3_AM_1_GBYTES -- default 0x80000000 if OR3_AM_2_GBYTES -- default 0x00000000 if OR3_AM_4_GBYTES -- --config OR3_XAM -- hex -- default 0x0 if !OR3_XAM_SET -- default 0x6000 if OR3_XAM_SET -- --config OR3_BCTLD -- hex -- default 0x0 if OR3_BCTLD_ASSERTED -- default 0x1000 if OR3_BCTLD_NOT_ASSERTED -- --config OR3_BI -- hex -- default 0x0 if !BR3_MACHINE_UPM -- default 0x0 if OR3_BI_BURSTSUPPORT -- default 0x100 if OR3_BI_BURSTINHIBIT -- --config OR3_COLS -- hex -- default 0x0 if !BR3_MACHINE_SDRAM -- default 0x0 if OR3_COLS_7 -- default 0x400 if OR3_COLS_8 -- default 0x800 if OR3_COLS_9 -- default 0xc00 if OR3_COLS_10 -- default 0x1000 if OR3_COLS_11 -- default 0x1400 if OR3_COLS_12 -- default 0x1800 if OR3_COLS_13 -- default 0x1c00 if OR3_COLS_14 -- --config OR3_ROWS -- hex -- default 0x0 if !BR3_MACHINE_SDRAM -- default 0x0 if OR3_ROWS_9 -- default 0x40 if OR3_ROWS_10 -- default 0x80 if OR3_ROWS_11 -- default 0xc0 if OR3_ROWS_12 -- default 0x100 if OR3_ROWS_13 -- default 0x140 if OR3_ROWS_14 -- default 0x180 if OR3_ROWS_15 -- --config OR3_PMSEL -- hex -- default 0x0 if !BR3_MACHINE_SDRAM -- default 0x0 if OR3_PMSEL_BTB -- default 0x20 if OR3_PMSEL_KEPT_OPEN -- --config OR3_SCY -- hex -- default 0x0 if !BR3_MACHINE_GPCM && !BR3_MACHINE_FCM -- default 0x0 if OR3_SCY_0 -- default 0x10 if OR3_SCY_1 -- default 0x20 if OR3_SCY_2 -- default 0x30 if OR3_SCY_3 -- default 0x40 if OR3_SCY_4 -- default 0x50 if OR3_SCY_5 -- default 0x60 if OR3_SCY_6 -- default 0x70 if OR3_SCY_7 -- default 0x80 if OR3_SCY_8 -- default 0x90 if OR3_SCY_9 -- default 0xa0 if OR3_SCY_10 -- default 0xb0 if OR3_SCY_11 -- default 0xc0 if OR3_SCY_12 -- default 0xd0 if OR3_SCY_13 -- default 0xe0 if OR3_SCY_14 -- default 0xf0 if OR3_SCY_15 -- --config OR3_PGS -- hex -- default 0x0 if !BR3_MACHINE_FCM -- default 0x0 if OR3_PGS_SMALL -- default 0x400 if OR3_PGS_LARGE -- --config OR3_CSCT -- hex -- default 0x0 if !BR3_MACHINE_FCM -- default 0x0 if OR3_CSCT_1_CYCLE -- default 0x0 if OR3_CSCT_2_CYCLE -- default 0x200 if OR3_CSCT_4_CYCLE -- default 0x200 if OR3_CSCT_8_CYCLE -- --config OR3_CST -- hex -- default 0x0 if !BR3_MACHINE_FCM -- default 0x0 if OR3_CST_COINCIDENT -- default 0x100 if OR3_CST_QUARTER_CLOCK -- default 0x0 if OR3_CST_HALF_CLOCK -- default 0x100 if OR3_CST_ONE_CLOCK -- --config OR3_CHT -- hex -- default 0x0 if !BR3_MACHINE_FCM -- default 0x0 if OR3_CHT_HALF_CLOCK -- default 0x80 if OR3_CHT_ONE_CLOCK -- default 0x0 if OR3_CHT_ONE_HALF_CLOCK -- default 0x80 if OR3_CHT_TWO_CLOCK -- --config OR3_RST -- hex -- default 0x0 if !BR3_MACHINE_FCM -- default 0x0 if OR3_RST_THREE_QUARTER_CLOCK -- default 0x8 if OR3_RST_ONE_CLOCK -- default 0x0 if OR3_RST_ONE_HALF_CLOCK -- --config OR3_CSNT -- hex -- default 0x0 if !BR3_MACHINE_GPCM -- default 0x0 if OR3_CSNT_NORMAL -- default 0x800 if OR3_CSNT_EARLIER -- --config OR3_ACS -- hex -- default 0x0 if !BR3_MACHINE_GPCM -- default 0x0 if OR3_ACS_SAME_TIME -- default 0x400 if OR3_ACS_QUARTER_CYCLE_EARLIER -- default 0x600 if OR3_ACS_HALF_CYCLE_EARLIER -- --config OR3_XACS -- hex -- default 0x0 if !BR3_MACHINE_GPCM -- default 0x0 if OR3_XACS_NORMAL -- default 0x100 if OR3_XACS_EXTENDED -- --config OR3_SETA -- hex -- default 0x0 if !BR3_MACHINE_GPCM -- default 0x0 if OR3_SETA_INTERNAL -- default 0x8 if OR3_SETA_EXTERNAL -- --config OR3_TRLX -- hex -- default 0x0 if OR3_TRLX_NORMAL -- default 0x4 if OR3_TRLX_RELAXED -- --config OR3_EHTR -- hex -- default 0x0 if OR3_EHTR_NORMAL -- default 0x2 if OR3_EHTR_1_CYCLE -- default 0x0 if OR3_EHTR_4_CYCLE -- default 0x2 if OR3_EHTR_8_CYCLE -- --config OR3_EAD -- hex -- default 0x0 if ARCH_MPC8308 -- default 0x0 if OR3_EAD_NONE -- default 0x1 if OR3_EAD_EXTRA -diff --git a/arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc4 b/arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc4 -deleted file mode 100644 -index 5d69385a23..0000000000 ---- a/arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc4 -+++ /dev/null -@@ -1,733 +0,0 @@ --menuconfig ELBC_BR4_OR4 -- bool "ELBC BR4/OR4" -- --if ELBC_BR4_OR4 -- --config BR4_OR4_NAME -- string "Identifier" -- --config BR4_OR4_BASE -- hex "Port base" -- --choice -- prompt "Port size" -- --config BR4_PORTSIZE_8BIT -- bool "8-bit" -- --config BR4_PORTSIZE_16BIT -- depends on !BR4_MACHINE_FCM -- bool "16-bit" -- -- --config BR4_PORTSIZE_32BIT -- depends on !BR4_MACHINE_FCM -- depends on ARCH_MPC8360 || ARCH_MPC8379 -- bool "32-bit" -- --endchoice -- --if BR4_MACHINE_FCM -- --choice -- prompt "Data Error Checking" -- --config BR4_ERRORCHECKING_DISABLED -- bool "Disabled" -- --config BR4_ERRORCHECKING_ECC_CHECKING -- bool "ECC checking / No ECC generation" -- --config BR4_ERRORCHECKING_BOTH -- bool "ECC checking and generation" -- --endchoice -- --endif -- --config BR4_WRITE_PROTECT -- bool "Write-protect" -- --config BR4_MACHINE_UPM -- bool -- --choice -- prompt "Machine select" -- --config BR4_MACHINE_GPCM -- bool "GPCM" -- --config BR4_MACHINE_FCM -- depends on !ARCH_MPC832X && !ARCH_MPC8360 -- bool "FCM" -- --config BR4_MACHINE_SDRAM -- depends on ARCH_MPC8360 -- bool "SDRAM" -- --config BR4_MACHINE_UPMA -- select BR4_MACHINE_UPM -- bool "UPM (A)" -- --config BR4_MACHINE_UPMB -- select BR4_MACHINE_UPM -- bool "UPM (B)" -- --config BR4_MACHINE_UPMC -- select BR4_MACHINE_UPM -- bool "UPM (C)" -- --endchoice -- --if ARCH_MPC8313 || ARCH_MPC8323 || ARCH_MPC8360 -- --choice -- prompt "Atomic operations" -- --config BR4_ATOMIC_NONE -- bool "No atomic operations" -- --config BR4_ATOMIC_RAWA -- bool "Read-after-write-atomic" -- --config BR4_ATOMIC_WARA -- bool "Write-after-read-atomic" -- --endchoice -- --endif -- --if BR4_MACHINE_GPCM || BR4_MACHINE_FCM || BR4_MACHINE_UPM || BR4_MACHINE_SDRAM -- --choice -- prompt "Address mask" -- --config OR4_AM_32_KBYTES -- depends on !BR4_MACHINE_SDRAM -- bool "32 kb" -- --config OR4_AM_64_KBYTES -- bool "64 kb" -- --config OR4_AM_128_KBYTES -- bool "128 kb" -- --config OR4_AM_256_KBYTES -- bool "256 kb" -- --config OR4_AM_512_KBYTES -- bool "512 kb" -- --config OR4_AM_1_MBYTES -- bool "1 mb" -- --config OR4_AM_2_MBYTES -- bool "2 mb" -- --config OR4_AM_4_MBYTES -- bool "4 mb" -- --config OR4_AM_8_MBYTES -- bool "8 mb" -- --config OR4_AM_16_MBYTES -- bool "16 mb" -- --config OR4_AM_32_MBYTES -- bool "32 mb" -- --config OR4_AM_64_MBYTES -- bool "64 mb" -- --# XXX: Some boards define 128MB AM with GPCM, even though it should not be --# possible according to the manuals --config OR4_AM_128_MBYTES -- bool "128 mb" -- --# XXX: Some boards define 256MB AM with GPCM, even though it should not be --# possible according to the manuals --config OR4_AM_256_MBYTES -- bool "256 mb" -- --config OR4_AM_512_MBYTES -- depends on BR4_MACHINE_FCM -- bool "512 mb" -- --# XXX: Some boards define 1GB AM with GPCM, even though it should not be --# possible according to the manuals --config OR4_AM_1_GBYTES -- bool "1 gb" -- --config OR4_AM_2_GBYTES -- depends on BR4_MACHINE_FCM -- bool "2 gb" -- --config OR4_AM_4_GBYTES -- depends on BR4_MACHINE_FCM -- bool "4 gb" -- --endchoice -- --config OR4_XAM_SET -- bool "Set unused bytes after address mask" --choice -- prompt "Buffer control disable" -- --config OR4_BCTLD_ASSERTED -- bool "Asserted" -- --config OR4_BCTLD_NOT_ASSERTED -- bool "Not asserted" -- --endchoice -- --endif -- --if BR4_MACHINE_GPCM || BR4_MACHINE_FCM -- --choice -- prompt "Cycle length in bus clocks" -- --config OR4_SCY_0 -- bool "No wait states" -- --config OR4_SCY_1 -- bool "1 wait state" -- --config OR4_SCY_2 -- bool "2 wait states" -- --config OR4_SCY_3 -- bool "3 wait states" -- --config OR4_SCY_4 -- bool "4 wait states" -- --config OR4_SCY_5 -- bool "5 wait states" -- --config OR4_SCY_6 -- bool "6 wait states" -- --config OR4_SCY_7 -- bool "7 wait states" -- --config OR4_SCY_8 -- depends on BR4_MACHINE_GPCM -- bool "8 wait states" -- --config OR4_SCY_9 -- depends on BR4_MACHINE_GPCM -- bool "9 wait states" -- --config OR4_SCY_10 -- depends on BR4_MACHINE_GPCM -- bool "10 wait states" -- --config OR4_SCY_11 -- depends on BR4_MACHINE_GPCM -- bool "11 wait states" -- --config OR4_SCY_12 -- depends on BR4_MACHINE_GPCM -- bool "12 wait states" -- --config OR4_SCY_13 -- depends on BR4_MACHINE_GPCM -- bool "13 wait states" -- --config OR4_SCY_14 -- depends on BR4_MACHINE_GPCM -- bool "14 wait states" -- --config OR4_SCY_15 -- depends on BR4_MACHINE_GPCM -- bool "15 wait states" -- --endchoice -- --endif # BR4_MACHINE_GPCM || BR4_MACHINE_FCM -- --if BR4_MACHINE_GPCM -- --choice -- prompt "Chip select negotiation time" -- --config OR4_CSNT_NORMAL -- bool "Normal" -- --config OR4_CSNT_EARLIER -- bool "Earlier" -- --endchoice -- --choice -- prompt "Address to chip-select setup" -- --config OR4_ACS_SAME_TIME -- bool "At the same time" -- --config OR4_ACS_HALF_CYCLE_EARLIER -- bool "Half of a bus clock cycle earlier" -- --config OR4_ACS_QUARTER_CYCLE_EARLIER -- bool "Half/Quarter of a bus clock cycle earlier" -- --endchoice -- --choice -- prompt "Extra address to check-select setup" -- --config OR4_XACS_NORMAL -- bool "Normal" -- --config OR4_XACS_EXTENDED -- bool "Extended" -- --endchoice -- --choice -- prompt "External address termination" -- --config OR4_SETA_INTERNAL -- bool "Access is terminated internally" -- --config OR4_SETA_EXTERNAL -- bool "Access is terminated externally" -- --endchoice -- --endif # BR4_MACHINE_GPCM -- --if BR4_MACHINE_FCM -- --choice -- prompt "NAND Flash EEPROM page size" -- --config OR4_PGS_SMALL -- bool "Small page device" -- --config OR4_PGS_LARGE -- bool "Large page device" -- --endchoice -- --choice -- prompt "Chip select to command time" -- --config OR4_CSCT_1_CYCLE -- depends on OR4_TRLX_NORMAL -- bool "1 cycle" -- --config OR4_CSCT_2_CYCLE -- depends on OR4_TRLX_RELAXED -- bool "2 cycles" -- --config OR4_CSCT_4_CYCLE -- depends on OR4_TRLX_NORMAL -- bool "4 cycles" -- --config OR4_CSCT_8_CYCLE -- depends on OR4_TRLX_RELAXED -- bool "8 cycles" -- --endchoice -- --choice -- prompt "Command setup time" -- --config OR4_CST_COINCIDENT -- depends on OR4_TRLX_NORMAL -- bool "Coincident with any command" -- --config OR4_CST_QUARTER_CLOCK -- depends on OR4_TRLX_NORMAL -- bool "0.25 clocks after" -- --config OR4_CST_HALF_CLOCK -- depends on OR4_TRLX_RELAXED -- bool "0.5 clocks after" -- --config OR4_CST_ONE_CLOCK -- depends on OR4_TRLX_RELAXED -- bool "1 clock after" -- --endchoice -- --choice -- prompt "Command hold time" -- --config OR4_CHT_HALF_CLOCK -- depends on OR4_TRLX_NORMAL -- bool "0.5 clocks before" -- --config OR4_CHT_ONE_CLOCK -- depends on OR4_TRLX_NORMAL -- bool "1 clock before" -- --config OR4_CHT_ONE_HALF_CLOCK -- depends on OR4_TRLX_RELAXED -- bool "1.5 clocks before" -- --config OR4_CHT_TWO_CLOCK -- depends on OR4_TRLX_RELAXED -- bool "2 clocks before" -- --endchoice -- --choice -- prompt "Reset setup time" -- --config OR4_RST_THREE_QUARTER_CLOCK -- depends on OR4_TRLX_NORMAL -- bool "0.75 clocks prior" -- --config OR4_RST_ONE_HALF_CLOCK -- depends on OR4_TRLX_RELAXED -- bool "0.5 clocks prior" -- --config OR4_RST_ONE_CLOCK -- bool "1 clock prior" -- --endchoice -- --endif # BR4_MACHINE_FCM -- --if BR4_MACHINE_UPM -- --choice -- prompt "Burst inhibit" -- --config OR4_BI_BURSTSUPPORT -- bool "Support burst access" -- --config OR4_BI_BURSTINHIBIT -- bool "Inhibit burst access" -- --endchoice -- --endif # BR4_MACHINE_UPM -- --if BR4_MACHINE_SDRAM -- --choice -- prompt "Number of column address lines" -- --config OR4_COLS_7 -- bool "7" -- --config OR4_COLS_8 -- bool "8" -- --config OR4_COLS_9 -- bool "9" -- --config OR4_COLS_10 -- bool "10" -- --config OR4_COLS_11 -- bool "11" -- --config OR4_COLS_12 -- bool "12" -- --config OR4_COLS_13 -- bool "13" -- --config OR4_COLS_14 -- bool "14" -- --endchoice -- --choice -- prompt "Number of rows address lines" -- --config OR4_ROWS_9 -- bool "9" -- --config OR4_ROWS_10 -- bool "10" -- --config OR4_ROWS_11 -- bool "11" -- --config OR4_ROWS_12 -- bool "12" -- --config OR4_ROWS_13 -- bool "13" -- --config OR4_ROWS_14 -- bool "14" -- --config OR4_ROWS_15 -- bool "15" -- --endchoice -- --choice -- prompt "Page mode select" -- --config OR4_PMSEL_BTB -- bool "Back-to-back" -- --config OR4_PMSEL_KEPT_OPEN -- bool "Page kept open until page miss or refresh" -- --endchoice -- --endif # BR4_MACHINE_SDRAM -- --choice -- prompt "Relaxed timing" -- --config OR4_TRLX_NORMAL -- bool "Normal" -- --config OR4_TRLX_RELAXED -- bool "Relaxed" -- --endchoice -- --choice -- prompt "Extended hold time" -- --config OR4_EHTR_NORMAL -- depends on OR4_TRLX_NORMAL -- bool "Normal" -- --config OR4_EHTR_1_CYCLE -- depends on OR4_TRLX_NORMAL -- bool "1 idle clock cycle inserted" -- --config OR4_EHTR_4_CYCLE -- depends on OR4_TRLX_RELAXED -- bool "4 idle clock cycles inserted" -- --config OR4_EHTR_8_CYCLE -- depends on OR4_TRLX_RELAXED -- bool "8 idle clock cycles inserted" -- --endchoice -- --if !ARCH_MPC8308 -- --choice -- prompt "External address latch delay" -- --config OR4_EAD_NONE -- bool "None" -- --config OR4_EAD_EXTRA -- bool "Extra" -- --endchoice -- --endif # !ARCH_MPC8308 -- --endif # ELBC_BR4_OR4 -- --config BR4_PORTSIZE -- hex -- default 0x800 if BR4_PORTSIZE_8BIT -- default 0x1000 if BR4_PORTSIZE_16BIT -- default 0x1800 if BR4_PORTSIZE_32BIT -- --config BR4_ERRORCHECKING -- hex -- default 0x0 if !BR4_MACHINE_FCM -- default 0x0 if BR4_ERRORCHECKING_DISABLED -- default 0x200 if BR4_ERRORCHECKING_ECC_CHECKING -- default 0x400 if BR4_ERRORCHECKING_BOTH -- --config BR4_WRITE_PROTECT_BIT -- hex -- default 0x0 if !BR4_WRITE_PROTECT -- default 0x100 if BR4_WRITE_PROTECT -- --config BR4_MACHINE -- hex -- default 0x0 if BR4_MACHINE_GPCM -- default 0x20 if BR4_MACHINE_FCM -- default 0x60 if BR4_MACHINE_SDRAM -- default 0x80 if BR4_MACHINE_UPMA -- default 0xa0 if BR4_MACHINE_UPMB -- default 0xc0 if BR4_MACHINE_UPMC -- --config BR4_ATOMIC -- hex -- default 0x0 if !ARCH_MPC8313 && !ARCH_MPC8323 && !ARCH_MPC8360 -- default 0x0 if BR4_ATOMIC_NONE -- default 0x4 if BR4_ATOMIC_RAWA -- default 0x8 if BR4_ATOMIC_WARA -- --config BR4_VALID_BIT -- hex -- default 0x0 if !ELBC_BR4_OR4 -- default 0x1 if ELBC_BR4_OR4 -- --config OR4_AM -- hex -- default 0xffff8000 if OR4_AM_32_KBYTES && !BR4_MACHINE_SDRAM -- default 0xffff0000 if OR4_AM_64_KBYTES -- default 0xfffe0000 if OR4_AM_128_KBYTES -- default 0xfffc0000 if OR4_AM_256_KBYTES -- default 0xfff80000 if OR4_AM_512_KBYTES -- default 0xfff00000 if OR4_AM_1_MBYTES -- default 0xffe00000 if OR4_AM_2_MBYTES -- default 0xffc00000 if OR4_AM_4_MBYTES -- default 0xff800000 if OR4_AM_8_MBYTES -- default 0xff000000 if OR4_AM_16_MBYTES -- default 0xfe000000 if OR4_AM_32_MBYTES -- default 0xfc000000 if OR4_AM_64_MBYTES -- default 0xf8000000 if OR4_AM_128_MBYTES -- default 0xf0000000 if OR4_AM_256_MBYTES -- default 0xe0000000 if OR4_AM_512_MBYTES -- default 0xc0000000 if OR4_AM_1_GBYTES -- default 0x80000000 if OR4_AM_2_GBYTES -- default 0x00000000 if OR4_AM_4_GBYTES -- --config OR4_XAM -- hex -- default 0x0 if !OR4_XAM_SET -- default 0x6000 if OR4_XAM_SET -- --config OR4_BCTLD -- hex -- default 0x0 if OR4_BCTLD_ASSERTED -- default 0x1000 if OR4_BCTLD_NOT_ASSERTED -- --config OR4_BI -- hex -- default 0x0 if !BR4_MACHINE_UPM -- default 0x0 if OR4_BI_BURSTSUPPORT -- default 0x100 if OR4_BI_BURSTINHIBIT -- --config OR4_COLS -- hex -- default 0x0 if !BR4_MACHINE_SDRAM -- default 0x0 if OR4_COLS_7 -- default 0x400 if OR4_COLS_8 -- default 0x800 if OR4_COLS_9 -- default 0xc00 if OR4_COLS_10 -- default 0x1000 if OR4_COLS_11 -- default 0x1400 if OR4_COLS_12 -- default 0x1800 if OR4_COLS_13 -- default 0x1c00 if OR4_COLS_14 -- --config OR4_ROWS -- hex -- default 0x0 if !BR4_MACHINE_SDRAM -- default 0x0 if OR4_ROWS_9 -- default 0x40 if OR4_ROWS_10 -- default 0x80 if OR4_ROWS_11 -- default 0xc0 if OR4_ROWS_12 -- default 0x100 if OR4_ROWS_13 -- default 0x140 if OR4_ROWS_14 -- default 0x180 if OR4_ROWS_15 -- --config OR4_PMSEL -- hex -- default 0x0 if !BR4_MACHINE_SDRAM -- default 0x0 if OR4_PMSEL_BTB -- default 0x20 if OR4_PMSEL_KEPT_OPEN -- --config OR4_SCY -- hex -- default 0x0 if !BR4_MACHINE_GPCM && !BR4_MACHINE_FCM -- default 0x0 if OR4_SCY_0 -- default 0x10 if OR4_SCY_1 -- default 0x20 if OR4_SCY_2 -- default 0x30 if OR4_SCY_3 -- default 0x40 if OR4_SCY_4 -- default 0x50 if OR4_SCY_5 -- default 0x60 if OR4_SCY_6 -- default 0x70 if OR4_SCY_7 -- default 0x80 if OR4_SCY_8 -- default 0x90 if OR4_SCY_9 -- default 0xa0 if OR4_SCY_10 -- default 0xb0 if OR4_SCY_11 -- default 0xc0 if OR4_SCY_12 -- default 0xd0 if OR4_SCY_13 -- default 0xe0 if OR4_SCY_14 -- default 0xf0 if OR4_SCY_15 -- --config OR4_PGS -- hex -- default 0x0 if !BR4_MACHINE_FCM -- default 0x0 if OR4_PGS_SMALL -- default 0x400 if OR4_PGS_LARGE -- --config OR4_CSCT -- hex -- default 0x0 if !BR4_MACHINE_FCM -- default 0x0 if OR4_CSCT_1_CYCLE -- default 0x0 if OR4_CSCT_2_CYCLE -- default 0x200 if OR4_CSCT_4_CYCLE -- default 0x200 if OR4_CSCT_8_CYCLE -- --config OR4_CST -- hex -- default 0x0 if !BR4_MACHINE_FCM -- default 0x0 if OR4_CST_COINCIDENT -- default 0x100 if OR4_CST_QUARTER_CLOCK -- default 0x0 if OR4_CST_HALF_CLOCK -- default 0x100 if OR4_CST_ONE_CLOCK -- --config OR4_CHT -- hex -- default 0x0 if !BR4_MACHINE_FCM -- default 0x0 if OR4_CHT_HALF_CLOCK -- default 0x80 if OR4_CHT_ONE_CLOCK -- default 0x0 if OR4_CHT_ONE_HALF_CLOCK -- default 0x80 if OR4_CHT_TWO_CLOCK -- --config OR4_RST -- hex -- default 0x0 if !BR4_MACHINE_FCM -- default 0x0 if OR4_RST_THREE_QUARTER_CLOCK -- default 0x8 if OR4_RST_ONE_CLOCK -- default 0x0 if OR4_RST_ONE_HALF_CLOCK -- --config OR4_CSNT -- hex -- default 0x0 if !BR4_MACHINE_GPCM -- default 0x0 if OR4_CSNT_NORMAL -- default 0x800 if OR4_CSNT_EARLIER -- --config OR4_ACS -- hex -- default 0x0 if !BR4_MACHINE_GPCM -- default 0x0 if OR4_ACS_SAME_TIME -- default 0x400 if OR4_ACS_QUARTER_CYCLE_EARLIER -- default 0x600 if OR4_ACS_HALF_CYCLE_EARLIER -- --config OR4_XACS -- hex -- default 0x0 if !BR4_MACHINE_GPCM -- default 0x0 if OR4_XACS_NORMAL -- default 0x100 if OR4_XACS_EXTENDED -- --config OR4_SETA -- hex -- default 0x0 if !BR4_MACHINE_GPCM -- default 0x0 if OR4_SETA_INTERNAL -- default 0x8 if OR4_SETA_EXTERNAL -- --config OR4_TRLX -- hex -- default 0x0 if OR4_TRLX_NORMAL -- default 0x4 if OR4_TRLX_RELAXED -- --config OR4_EHTR -- hex -- default 0x0 if OR4_EHTR_NORMAL -- default 0x2 if OR4_EHTR_1_CYCLE -- default 0x0 if OR4_EHTR_4_CYCLE -- default 0x2 if OR4_EHTR_8_CYCLE -- --config OR4_EAD -- hex -- default 0x0 if ARCH_MPC8308 -- default 0x0 if OR4_EAD_NONE -- default 0x1 if OR4_EAD_EXTRA -diff --git a/arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi b/arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi -index 3439737fa3..edbee7d0c9 100644 ---- a/arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi -+++ b/arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi -@@ -21,13 +21,13 @@ - - cpus { - compatible = "cpu_bus"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - PowerPC,8308@0 { - compatible = "fsl,mpc8308"; - clocks = <&socclocks MPC83XX_CLK_CORE - &socclocks MPC83XX_CLK_CSB>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -66,7 +66,7 @@ - socclocks: clocks { - compatible = "fsl,mpc8308-clk"; - #clock-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - timer { -@@ -178,11 +178,11 @@ - }; - - &board_soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - clocks = <&socclocks MPC83XX_CLK_CSB>; - - memory@2000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - sdhc@2e000 { -@@ -228,21 +228,21 @@ - }; - - &board_soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &GPIO_VB0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &serial0 { - clocks = <&socclocks MPC83XX_CLK_CSB>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &serial1 { - clocks = <&socclocks MPC83XX_CLK_CSB>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &pci0 { -diff --git a/arch/powerpc/dts/km8321-uboot.dtsi b/arch/powerpc/dts/km8321-uboot.dtsi -index fd11fe63e0..7e776f8872 100644 ---- a/arch/powerpc/dts/km8321-uboot.dtsi -+++ b/arch/powerpc/dts/km8321-uboot.dtsi -@@ -8,9 +8,9 @@ - - / { - cpus { -- u-boot,dm-pre-reloc; -+ bootph-all; - PowerPC,8321@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -29,39 +29,39 @@ - - &serial0 { - clock-frequency = <132000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - - par_io@1400 { - compatible = "fsl,mpc8360-par_io"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - serial_pin@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - ucc_pin@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - ucc_pin@1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - ucc_pin@3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - ucc_pin@4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - ucc_pin@5 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - ucc_pin@6 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - ucc_pin@7 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -diff --git a/arch/powerpc/dts/km836x-uboot.dtsi b/arch/powerpc/dts/km836x-uboot.dtsi -index 5c78529c44..50c886bc18 100644 ---- a/arch/powerpc/dts/km836x-uboot.dtsi -+++ b/arch/powerpc/dts/km836x-uboot.dtsi -@@ -8,9 +8,9 @@ - - / { - cpus { -- u-boot,dm-pre-reloc; -+ bootph-all; - PowerPC,8360@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -24,38 +24,38 @@ - }; - - &soc { -- u-boot,dm-pre-reloc; -+ bootph-all; - - par_io@1400 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - serial_pin@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - ucc_pin@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - ucc_pin@1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - ucc_pin@3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - ucc_pin@4 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - ucc_pin@5 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - ucc_pin@6 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - ucc_pin@7 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; - - &serial0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; -diff --git a/arch/powerpc/dts/kmcent2-u-boot.dtsi b/arch/powerpc/dts/kmcent2-u-boot.dtsi -index d027762764..b26e240bc4 100644 ---- a/arch/powerpc/dts/kmcent2-u-boot.dtsi -+++ b/arch/powerpc/dts/kmcent2-u-boot.dtsi -@@ -24,7 +24,7 @@ - }; - - soc@ffe000000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - spi@110000 { - /* This documents where km_fpgacfg should be appear */ - fpga@0 { -@@ -39,7 +39,7 @@ - }; - - i2c@118000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - mux@70 { - i2c@1 { /* IVM bus */ - reg = <1>; -@@ -50,7 +50,7 @@ - }; - - serial@11c500 { -- u-boot,dm-pre-reloc; -+ bootph-all; - clock-frequency = <200000000>; - }; - -diff --git a/arch/powerpc/dts/pq3-i2c-0.dtsi b/arch/powerpc/dts/pq3-i2c-0.dtsi -index 0ed519c2e5..a838bd9e7a 100644 ---- a/arch/powerpc/dts/pq3-i2c-0.dtsi -+++ b/arch/powerpc/dts/pq3-i2c-0.dtsi -@@ -9,7 +9,7 @@ i2c@3000 { - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x3000 0x100>; - interrupts = <43 2 0 0>; - dfsrr; -diff --git a/arch/powerpc/dts/pq3-i2c-1.dtsi b/arch/powerpc/dts/pq3-i2c-1.dtsi -index 78b0fcf81d..96cd009ac7 100644 ---- a/arch/powerpc/dts/pq3-i2c-1.dtsi -+++ b/arch/powerpc/dts/pq3-i2c-1.dtsi -@@ -9,7 +9,7 @@ i2c@3100 { - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x3100 0x100>; - interrupts = <43 2 0 0>; - dfsrr; -diff --git a/arch/powerpc/dts/qoriq-i2c-0.dtsi b/arch/powerpc/dts/qoriq-i2c-0.dtsi -index 9d0ab886e7..7fb09e0125 100644 ---- a/arch/powerpc/dts/qoriq-i2c-0.dtsi -+++ b/arch/powerpc/dts/qoriq-i2c-0.dtsi -@@ -9,7 +9,7 @@ i2c0: i2c@118000 { - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x118000 0x100>; - interrupts = <38 2 0 0>; - }; -@@ -19,7 +19,7 @@ i2c1: i2c@118100 { - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x118100 0x100>; - interrupts = <38 2 0 0>; - }; -diff --git a/arch/powerpc/dts/qoriq-i2c-1.dtsi b/arch/powerpc/dts/qoriq-i2c-1.dtsi -index de0a22e3e0..f469abc1f5 100644 ---- a/arch/powerpc/dts/qoriq-i2c-1.dtsi -+++ b/arch/powerpc/dts/qoriq-i2c-1.dtsi -@@ -9,7 +9,7 @@ i2c2: i2c@119000 { - #size-cells = <0>; - cell-index = <2>; - compatible = "fsl-i2c"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x119000 0x100>; - interrupts = <39 2 0 0>; - }; -@@ -19,7 +19,7 @@ i2c3: i2c@119100 { - #size-cells = <0>; - cell-index = <3>; - compatible = "fsl-i2c"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x119100 0x100>; - interrupts = <39 2 0 0>; - }; -diff --git a/arch/powerpc/dts/socrates-u-boot.dtsi b/arch/powerpc/dts/socrates-u-boot.dtsi -index 88df031732..c2a28eaebf 100644 ---- a/arch/powerpc/dts/socrates-u-boot.dtsi -+++ b/arch/powerpc/dts/socrates-u-boot.dtsi -@@ -16,7 +16,7 @@ - - soc8544@e0000000 { - i2c@3000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - - i2c_eeprom0: eeprom@51{ - compatible = "atmel,24c64"; -@@ -34,7 +34,7 @@ - }; - - &serial0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - clock-frequency = <333333330>; - }; - -diff --git a/arch/riscv/dts/ae350-u-boot.dtsi b/arch/riscv/dts/ae350-u-boot.dtsi -index 7011f59831..aef9159b7a 100644 ---- a/arch/riscv/dts/ae350-u-boot.dtsi -+++ b/arch/riscv/dts/ae350-u-boot.dtsi -@@ -2,51 +2,51 @@ - - / { - cpus { -- u-boot,dm-spl; -+ bootph-pre-ram; - CPU0: cpu@0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - CPU0_intc: interrupt-controller { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - CPU1: cpu@1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - CPU1_intc: interrupt-controller { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - CPU2: cpu@2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - CPU2_intc: interrupt-controller { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - CPU3: cpu@3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - CPU3_intc: interrupt-controller { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - }; - - memory@0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - soc { -- u-boot,dm-spl; -+ bootph-pre-ram; - - plicsw: interrupt-controller@e6400000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - plmt0@e6000000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - serial0: serial@f0300000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - }; -diff --git a/arch/riscv/dts/fu540-c000-u-boot.dtsi b/arch/riscv/dts/fu540-c000-u-boot.dtsi -index b7cd600b8c..360679a178 100644 ---- a/arch/riscv/dts/fu540-c000-u-boot.dtsi -+++ b/arch/riscv/dts/fu540-c000-u-boot.dtsi -@@ -9,47 +9,47 @@ - cpus { - assigned-clocks = <&prci PRCI_CLK_COREPLL>; - assigned-clock-rates = <1000000000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - cpu0: cpu@0 { - clocks = <&prci PRCI_CLK_COREPLL>; -- u-boot,dm-spl; -+ bootph-pre-ram; - status = "okay"; - cpu0_intc: interrupt-controller { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - cpu1: cpu@1 { - clocks = <&prci PRCI_CLK_COREPLL>; -- u-boot,dm-spl; -+ bootph-pre-ram; - cpu1_intc: interrupt-controller { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - cpu2: cpu@2 { - clocks = <&prci PRCI_CLK_COREPLL>; -- u-boot,dm-spl; -+ bootph-pre-ram; - cpu2_intc: interrupt-controller { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - cpu3: cpu@3 { - clocks = <&prci PRCI_CLK_COREPLL>; -- u-boot,dm-spl; -+ bootph-pre-ram; - cpu3_intc: interrupt-controller { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - cpu4: cpu@4 { - clocks = <&prci PRCI_CLK_COREPLL>; -- u-boot,dm-spl; -+ bootph-pre-ram; - cpu4_intc: interrupt-controller { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - }; - - soc { -- u-boot,dm-spl; -+ bootph-pre-ram; - otp: otp@10070000 { - compatible = "sifive,fu540-c000-otp"; - reg = <0x0 0x10070000 0x0 0x1000>; -@@ -63,7 +63,7 @@ - &cpu3_intc 3 &cpu3_intc 7 - &cpu4_intc 3 &cpu4_intc 7>; - reg = <0x0 0x2000000 0x0 0x10000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - prci: clock-controller@10000000 { - #reset-cells = <1>; -@@ -82,21 +82,21 @@ - 0x0 0x100b8000 0x0 0x1000>; - clocks = <&prci PRCI_CLK_DDRPLL>; - clock-frequency = <933333324>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - }; - - &prci { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &qspi2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - ð0 { -diff --git a/arch/riscv/dts/fu740-c000-u-boot.dtsi b/arch/riscv/dts/fu740-c000-u-boot.dtsi -index 917e9bf163..706224b384 100644 ---- a/arch/riscv/dts/fu740-c000-u-boot.dtsi -+++ b/arch/riscv/dts/fu740-c000-u-boot.dtsi -@@ -9,47 +9,47 @@ - cpus { - assigned-clocks = <&prci FU740_PRCI_CLK_COREPLL>; - assigned-clock-rates = <1200000000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - cpu0: cpu@0 { - clocks = <&prci FU740_PRCI_CLK_COREPLL>; -- u-boot,dm-spl; -+ bootph-pre-ram; - status = "okay"; - cpu0_intc: interrupt-controller { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - cpu1: cpu@1 { - clocks = <&prci FU740_PRCI_CLK_COREPLL>; -- u-boot,dm-spl; -+ bootph-pre-ram; - cpu1_intc: interrupt-controller { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - cpu2: cpu@2 { - clocks = <&prci FU740_PRCI_CLK_COREPLL>; -- u-boot,dm-spl; -+ bootph-pre-ram; - cpu2_intc: interrupt-controller { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - cpu3: cpu@3 { - clocks = <&prci FU740_PRCI_CLK_COREPLL>; -- u-boot,dm-spl; -+ bootph-pre-ram; - cpu3_intc: interrupt-controller { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - cpu4: cpu@4 { - clocks = <&prci FU740_PRCI_CLK_COREPLL>; -- u-boot,dm-spl; -+ bootph-pre-ram; - cpu4_intc: interrupt-controller { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - }; - - soc { -- u-boot,dm-spl; -+ bootph-pre-ram; - clint: clint@2000000 { - compatible = "riscv,clint0"; - interrupts-extended = <&cpu0_intc 3 &cpu0_intc 7 -@@ -58,7 +58,7 @@ - &cpu3_intc 3 &cpu3_intc 7 - &cpu4_intc 3 &cpu4_intc 7>; - reg = <0x0 0x2000000 0x0 0x10000>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - prci: clock-controller@10000000 { - #reset-cells = <1>; -@@ -78,25 +78,25 @@ - 0x0 0x100b8000 0x0 0x1000>; - clocks = <&prci FU740_PRCI_CLK_DDRPLL>; - clock-frequency = <933333324>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - }; - - &prci { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &uart0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &spi0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - &i2c0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - ð0 { -diff --git a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi -index 51b566116d..e89b7d01d0 100644 ---- a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi -+++ b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi -@@ -22,15 +22,15 @@ - }; - - memory@80000000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - hfclk { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - rtcclk { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - }; -@@ -40,19 +40,19 @@ - }; - - &qspi0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - - flash@0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &qspi2 { - mmc@0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &gpio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/riscv/dts/hifive-unmatched-a00-u-boot.dtsi b/arch/riscv/dts/hifive-unmatched-a00-u-boot.dtsi -index 1ee8ab1868..39d62776c7 100644 ---- a/arch/riscv/dts/hifive-unmatched-a00-u-boot.dtsi -+++ b/arch/riscv/dts/hifive-unmatched-a00-u-boot.dtsi -@@ -13,7 +13,7 @@ - }; - - memory@80000000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - config { -@@ -21,11 +21,11 @@ - }; - - hfclk { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - rtcclk { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - }; -@@ -35,18 +35,18 @@ - }; - - &qspi0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - flash@0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &spi0 { - mmc@0 { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - }; - - &gpio { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi -index 3cc8379133..6b8586066f 100644 ---- a/arch/riscv/dts/k210.dtsi -+++ b/arch/riscv/dts/k210.dtsi -@@ -91,7 +91,7 @@ - <&sysclk K210_CLK_SRAM1>, - <&sysclk K210_CLK_AI>; - clock-names = "sram0", "sram1", "aisram"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - clocks { -@@ -99,7 +99,7 @@ - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <26000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -521,7 +521,7 @@ - clocks = <&sysclk K210_CLK_APB1>; - clock-names = "pclk"; - reg-io-width = <4>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - sysclk: clock-controller { - #clock-cells = <1>; -@@ -529,7 +529,7 @@ - clocks = <&in0>; - assigned-clocks = <&sysclk K210_CLK_PLL1>; - assigned-clock-rates = <390000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - sysrst: reset-controller { -diff --git a/arch/riscv/dts/openpiton-riscv64.dts b/arch/riscv/dts/openpiton-riscv64.dts -index abc6016a0b..e0553d520f 100644 ---- a/arch/riscv/dts/openpiton-riscv64.dts -+++ b/arch/riscv/dts/openpiton-riscv64.dts -@@ -32,7 +32,7 @@ - - CPU0: cpu@0 { - clocks = <&clk0>; -- u-boot,dm-spl; -+ bootph-pre-ram; - device_type = "cpu"; - reg = <0>; - compatible = "openhwgroup,cva6", "riscv"; -@@ -74,7 +74,7 @@ - }; - - memory@80000000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - device_type = "memory"; - reg = < 0x00000000 0x80000000 0x00000000 0x40000000 >; - }; -@@ -121,7 +121,7 @@ - }; - - sdhci_0: sdhci@f000000000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - compatible = "openpiton,piton-mmc", "openpiton,mmc"; - reg = < 0x000000f0 0x00000000 0x00000000 0x00300000 >; - }; -@@ -137,7 +137,7 @@ - }; - - PLIC0: plic@fff1100000 { -- u-boot,dm-spl; -+ bootph-pre-ram; - #interrupt-cells = <1>; - compatible = "sifive,plic-1.0.0", "openpiton,plic"; - interrupt-controller; -diff --git a/arch/riscv/lib/semihosting.S b/arch/riscv/lib/semihosting.S -new file mode 100644 -index 0000000000..c0c571bce9 ---- /dev/null -+++ b/arch/riscv/lib/semihosting.S -@@ -0,0 +1,22 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * Copyright (C) 2022 Ventana Micro Systems Inc. -+ */ -+ -+#include -+#include -+ -+.pushsection .text.smh_trap, "ax" -+ENTRY(smh_trap) -+ .align 2 -+ .option push -+ .option norvc /* semihosting sequence must be 32-bit wide */ -+ -+ slli zero, zero, 0x1f /* Entry NOP to identify semihosting */ -+ ebreak -+ srai zero, zero, 7 /* NOP encoding of semihosting call number */ -+ .option pop -+ -+ ret -+ENDPROC(smh_trap) -+.popsection -diff --git a/arch/riscv/lib/semihosting.c b/arch/riscv/lib/semihosting.c -deleted file mode 100644 -index d6593b02a6..0000000000 ---- a/arch/riscv/lib/semihosting.c -+++ /dev/null -@@ -1,24 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0+ --/* -- * Copyright (C) 2022 Ventana Micro Systems Inc. -- */ -- --#include -- --long smh_trap(int sysnum, void *addr) --{ -- register int ret asm ("a0") = sysnum; -- register void *param0 asm ("a1") = addr; -- -- asm volatile (".align 4\n" -- ".option push\n" -- ".option norvc\n" -- -- "slli zero, zero, 0x1f\n" -- "ebreak\n" -- "srai zero, zero, 7\n" -- ".option pop\n" -- : "+r" (ret) : "r" (param0) : "memory"); -- -- return ret; --} -diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts -index 88b57bfb7e..12d3eff5fa 100644 ---- a/arch/sandbox/dts/sandbox.dts -+++ b/arch/sandbox/dts/sandbox.dts -@@ -49,7 +49,7 @@ - - cros_ec: cros-ec { - reg = <0 0>; -- u-boot,dm-pre-proper; -+ bootph-some-ram; - compatible = "google,cros-ec-sandbox"; - }; - -@@ -76,7 +76,7 @@ - clock-frequency = <400000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c0>; -- u-boot,dm-pre-reloc; -+ bootph-pre-ram; - }; - - pcic: pci@0 { -@@ -90,7 +90,7 @@ - }; - - spi: spi@0 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - #address-cells = <1>; - #size-cells = <0>; - reg = <0 0>; -@@ -103,6 +103,6 @@ - #include "cros-ec-keyboard.dtsi" - #include "sandbox_pmic.dtsi" - --#ifdef CONFIG_SANDBOX_VPL -+#if IS_ENABLED(CONFIG_SUPPORT_VPL) - #include "sandbox_vpl.dtsi" - #endif -diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi -index 7e7fcff6d2..30a305c4d2 100644 ---- a/arch/sandbox/dts/sandbox.dtsi -+++ b/arch/sandbox/dts/sandbox.dtsi -@@ -49,14 +49,14 @@ - }; - - clk_fixed: clk-fixed { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "sandbox,fixed-clock"; - #clock-cells = <0>; - clock-frequency = <1234>; - }; - - clk_sandbox: clk-sbox { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "sandbox,clk"; - #clock-cells = <1>; - assigned-clocks = <&clk_sandbox 3>; -@@ -64,7 +64,7 @@ - }; - - clk-test { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "sandbox,clk-test"; - clocks = <&clk_fixed>, - <&clk_sandbox 1>, -@@ -75,7 +75,7 @@ - }; - - gpio_a: gpios@0 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - gpio-controller; - compatible = "sandbox,gpio"; - #gpio-cells = <1>; -@@ -84,7 +84,7 @@ - }; - - gpio_b: gpios@1 { -- u-boot,dm-spl; -+ bootph-pre-ram; - gpio-controller; - compatible = "sandbox,gpio"; - #gpio-cells = <2>; -@@ -93,7 +93,7 @@ - }; - - gpio-test { -- u-boot,dm-spl; -+ bootph-pre-ram; - compatible = "sandbox,gpio-test"; - test-gpios = <&gpio_b 3 0>; - }; -@@ -115,7 +115,7 @@ - reg = <0x43>; - compatible = "sandbox-rtc"; - sandbox,emul = <&emul0>; -- u-boot,dm-pre-reloc; -+ bootph-pre-ram; - }; - sandbox_pmic: sandbox_pmic { - reg = <0x40>; -@@ -126,7 +126,7 @@ - }; - - i2c_emul: emul { -- u-boot,dm-pre-reloc; -+ bootph-pre-ram; - reg = <0xff>; - compatible = "sandbox,i2c-emul-parent"; - emul_eeprom: emul-eeprom { -@@ -136,7 +136,7 @@ - #emul-cells = <0>; - }; - emul0: emul0 { -- u-boot,dm-pre-reloc; -+ bootph-pre-ram; - compatible = "sandbox,i2c-rtc-emul"; - #emul-cells = <0>; - }; -@@ -149,20 +149,20 @@ - }; - - irq_sandbox: irq-sbox { -- u-boot,dm-spl; -+ bootph-pre-ram; - compatible = "sandbox,irq"; - interrupt-controller; - #interrupt-cells = <2>; - }; - - irq-test { -- u-boot,dm-spl; -+ bootph-pre-ram; - compatible = "sandbox,irq-test"; - interrupts-extended = <&irq_sandbox 3 0>; - }; - - lcd { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - compatible = "sandbox,lcd-sdl"; - xres = <1366>; - yres = <768>; -@@ -236,7 +236,7 @@ - - reset@1 { - compatible = "sandbox,reset"; -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - rng { -@@ -260,7 +260,7 @@ - - spi@0 { - firmware_storage_spi: flash@0 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - reg = <0>; - compatible = "spansion,m25p16", "jedec,spi-nor"; - spi-max-frequency = <40000000>; -@@ -269,7 +269,7 @@ - }; - - spl-test { -- u-boot,dm-spl; -+ bootph-pre-ram; - compatible = "sandbox,spl-test"; - boolval; - intval = <1>; -@@ -283,7 +283,7 @@ - }; - - spl-test2 { -- u-boot,dm-spl; -+ bootph-pre-ram; - compatible = "sandbox,spl-test"; - intval = <3>; - intarray = <5>; -@@ -295,26 +295,26 @@ - }; - - spl-test3 { -- u-boot,dm-spl; -+ bootph-pre-ram; - compatible = "sandbox,spl-test"; - stringarray = "one"; - maybe-empty-int = <1>; - }; - - spl-test5 { -- u-boot,dm-vpl; -+ bootph-verify; - compatible = "sandbox,spl-test"; - stringarray = "tpl"; - }; - - spl-test6 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - compatible = "sandbox,spl-test"; - stringarray = "pre-proper"; - }; - - spl-test7 { -- u-boot,dm-spl; -+ bootph-pre-ram; - compatible = "sandbox,spl-test"; - stringarray = "spl"; - }; -@@ -348,9 +348,9 @@ - - /* Needs to be available prior to relocation */ - uart0: serial { -- u-boot,dm-spl; -- u-boot,dm-tpl; -- u-boot,dm-vpl; -+ bootph-pre-ram; -+ bootph-pre-sram; -+ bootph-verify; - compatible = "sandbox,serial"; - sandbox,text-colour = "cyan"; - pinctrl-names = "default"; -@@ -473,6 +473,6 @@ - }; - - keyboard-controller { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - }; -diff --git a/arch/sandbox/dts/sandbox64.dts b/arch/sandbox/dts/sandbox64.dts -index a9cd7908f8..f21fc181f3 100644 ---- a/arch/sandbox/dts/sandbox64.dts -+++ b/arch/sandbox/dts/sandbox64.dts -@@ -46,7 +46,7 @@ - /* ... */ - cros_ec: cros-ec { - reg = <0 0 0 0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "google,cros-ec-sandbox"; - }; - -@@ -81,7 +81,7 @@ - }; - - spi: spi@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #address-cells = <1>; - #size-cells = <0>; - reg = <0 0 0 0>; -diff --git a/arch/sandbox/dts/sandbox_vpl.dtsi b/arch/sandbox/dts/sandbox_vpl.dtsi -index 1fba537f13..c7dc00a8d2 100644 ---- a/arch/sandbox/dts/sandbox_vpl.dtsi -+++ b/arch/sandbox/dts/sandbox_vpl.dtsi -@@ -17,8 +17,8 @@ - * provide plenty of space for ELF files with debug info so that - * gdb can be used - */ -- offset = <0x400000>; -- size = <0xdffc00>; -+ offset = <0x800000>; -+ size = <0x2000000>; - - fit { - fit,external-offset = <0>; -diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts -index 88d4d3cb98..7c1ee71cb7 100644 ---- a/arch/sandbox/dts/test.dts -+++ b/arch/sandbox/dts/test.dts -@@ -80,7 +80,7 @@ - }; - - bootstd { -- u-boot,dm-vpl; -+ bootph-verify; - compatible = "u-boot,boot-std"; - - filename-prefixes = "/", "/boot/"; -@@ -104,7 +104,7 @@ - * before the parititon starts - */ - firmware0 { -- u-boot,dm-vpl; -+ bootph-verify; - compatible = "fwupd,vbe-simple"; - storage = "mmc1"; - skip-offset = <0x200>; -@@ -125,11 +125,11 @@ - * running U-Boot - */ - firmware1 { -- u-boot,dm-vpl; -+ bootph-verify; - status = "disabled"; - compatible = "fwupd,vbe-simple"; - storage = "mmc3"; -- skip-offset = <0x400000>; -+ skip-offset = <0x800000>; - area-start = <0>; - area-size = <0xe00000>; - state-offset = <0xdffc00>; -@@ -260,7 +260,7 @@ - compatible = "denx,u-boot-fdt-test"; - ping-expect = <0>; - ping-add = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - test-gpios = <&gpio_a 1>, <&gpio_a 4>, - <&gpio_b 5 GPIO_ACTIVE_HIGH 3 2 1>, - <0>, <&gpio_a 12>; -@@ -889,7 +889,7 @@ - }; - - lcd { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "sandbox,lcd-sdl"; - pinctrl-names = "default"; - pinctrl-0 = <&pinmux_lcd_pins>; -@@ -959,21 +959,21 @@ - reg = <0x1>; - timebase-frequency = <3000000>; - compatible = "sandbox,cpu_sandbox"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - cpu2: cpu@2 { - device_type = "cpu"; - reg = <0x2>; - compatible = "sandbox,cpu_sandbox"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - cpu3: cpu@3 { - device_type = "cpu"; - reg = <0x3>; - compatible = "sandbox,cpu_sandbox"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -1213,12 +1213,12 @@ - - reset@0 { - compatible = "sandbox,warm-reset"; -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - reset@1 { - compatible = "sandbox,reset"; -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - resetc: reset-ctl { -@@ -1367,9 +1367,13 @@ - compatible = "sandbox,tpm2"; - }; - -+ tpm { -+ compatible = "google,sandbox-tpm"; -+ }; -+ - uart0: serial { - compatible = "sandbox,serial"; -- u-boot,dm-pre-reloc; -+ bootph-all; - pinctrl-names = "default"; - pinctrl-0 = <&pinmux_uart0_pins>; - }; -diff --git a/arch/sandbox/include/asm/rtc.h b/arch/sandbox/include/asm/rtc.h -index 025cd6c67c..bf3ac5ea1e 100644 ---- a/arch/sandbox/include/asm/rtc.h -+++ b/arch/sandbox/include/asm/rtc.h -@@ -40,7 +40,7 @@ enum { - * @reg: Register values - */ - struct sandbox_i2c_rtc_plat_data { --#if CONFIG_IS_ENABLED(OF_PLATDATA) -+#if CONFIG_IS_ENABLED(OF_PLATDATA) && IS_ENABLED(CONFIG_RTC_SANDBOX) - struct dtd_sandbox_i2c_rtc_emul dtplat; - #endif - long base_time; -diff --git a/arch/sh/dts/sh7751-r2dplus.dts b/arch/sh/dts/sh7751-r2dplus.dts -index da0648cd62..8e15331264 100644 ---- a/arch/sh/dts/sh7751-r2dplus.dts -+++ b/arch/sh/dts/sh7751-r2dplus.dts -@@ -21,7 +21,7 @@ - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <60000000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - scif1: serial@ffe80000 { -@@ -30,7 +30,7 @@ - clocks = <&scif_clks>; - clock-names = "fck"; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pci@fe200000 { -diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig -index 07be5cd05e..99e59d94c6 100644 ---- a/arch/x86/Kconfig -+++ b/arch/x86/Kconfig -@@ -32,8 +32,8 @@ config X86_RUN_32BIT - config X86_RUN_64BIT - bool "64-bit" - select X86_64 -- select SPL -- select SPL_SEPARATE_BSS -+ select SPL if !EFI_APP -+ select SPL_SEPARATE_BSS if !EFI_APP - help - Build U-Boot as a 64-bit binary with a 32-bit SPL. This is - experimental and many features are missing. U-Boot SPL starts up, -diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c -index 7637c9b07d..a133a5d811 100644 ---- a/arch/x86/cpu/mp_init.c -+++ b/arch/x86/cpu/mp_init.c -@@ -69,12 +69,12 @@ DECLARE_GLOBAL_DATA_PTR; - * CPUS are numbered sequentially from 0 using the device tree: - * - * cpus { -- * u-boot,dm-pre-reloc; -+ * bootph-all; - * #address-cells = <1>; - * #size-cells = <0>; - * - * cpu@0 { -- * u-boot,dm-pre-reloc; -+ * bootph-all; - * device_type = "cpu"; - * compatible = "intel,apl-cpu"; - * reg = <0>; -diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts -index f4cbbd61df..59403f40ce 100644 ---- a/arch/x86/dts/bayleybay.dts -+++ b/arch/x86/dts/bayleybay.dts -@@ -92,7 +92,7 @@ - compatible = "pci-x86"; - #address-cells = <3>; - #size-cells = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000 - 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000 - 0x01000000 0x0 0x2000 0x2000 0 0xe000>; -@@ -189,7 +189,7 @@ - - gpioa { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0 0x20>; - bank-name = "A"; - use-lvl-write-cache; -@@ -197,7 +197,7 @@ - - gpiob { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x20 0x20>; - bank-name = "B"; - use-lvl-write-cache; -@@ -205,7 +205,7 @@ - - gpioc { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x40 0x20>; - bank-name = "C"; - use-lvl-write-cache; -@@ -213,7 +213,7 @@ - - gpiod { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x60 0x20>; - bank-name = "D"; - use-lvl-write-cache; -@@ -221,7 +221,7 @@ - - gpioe { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x80 0x20>; - bank-name = "E"; - use-lvl-write-cache; -@@ -229,7 +229,7 @@ - - gpiof { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0xA0 0x20>; - bank-name = "F"; - use-lvl-write-cache; -diff --git a/arch/x86/dts/baytrail_som-db5800-som-6867.dts b/arch/x86/dts/baytrail_som-db5800-som-6867.dts -index ca7d97f2d4..4e12c4a40c 100644 ---- a/arch/x86/dts/baytrail_som-db5800-som-6867.dts -+++ b/arch/x86/dts/baytrail_som-db5800-som-6867.dts -@@ -116,7 +116,7 @@ - compatible = "intel,pci-baytrail", "pci-x86"; - #address-cells = <3>; - #size-cells = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000 - 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000 - 0x01000000 0x0 0x2000 0x2000 0 0xe000>; -@@ -213,7 +213,7 @@ - - gpioa { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0 0x20>; - bank-name = "A"; - use-lvl-write-cache; -@@ -221,7 +221,7 @@ - - gpiob { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x20 0x20>; - bank-name = "B"; - use-lvl-write-cache; -@@ -229,7 +229,7 @@ - - gpioc { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x40 0x20>; - bank-name = "C"; - use-lvl-write-cache; -@@ -237,7 +237,7 @@ - - gpiod { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x60 0x20>; - bank-name = "D"; - use-lvl-write-cache; -@@ -245,7 +245,7 @@ - - gpioe { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x80 0x20>; - bank-name = "E"; - use-lvl-write-cache; -@@ -253,7 +253,7 @@ - - gpiof { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0xA0 0x20>; - bank-name = "F"; - use-lvl-write-cache; -diff --git a/arch/x86/dts/cherryhill.dts b/arch/x86/dts/cherryhill.dts -index 7a273670bd..3d35e4643c 100644 ---- a/arch/x86/dts/cherryhill.dts -+++ b/arch/x86/dts/cherryhill.dts -@@ -70,7 +70,7 @@ - compatible = "pci-x86"; - #address-cells = <3>; - #size-cells = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000 - 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000 - 0x01000000 0x0 0x2000 0x2000 0 0xe000>; -diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts -index 69a1c1ce29..8bfb2c0d19 100644 ---- a/arch/x86/dts/chromebook_coral.dts -+++ b/arch/x86/dts/chromebook_coral.dts -@@ -113,17 +113,17 @@ - clk: clock { - compatible = "intel,apl-clk"; - #clock-cells = <1>; -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - cpus { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - #address-cells = <1>; - #size-cells = <0>; - - cpu_0: cpu@0 { -- u-boot,dm-pre-proper; -- u-boot,dm-spl; -+ bootph-some-ram; -+ bootph-pre-ram; - device_type = "cpu"; - compatible = "intel,apl-cpu"; - reg = <0>; -@@ -154,7 +154,7 @@ - }; - - acpi_gpe: general-purpose-events { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - reg = ; - compatible = "intel,acpi-gpe"; - interrupt-controller; -@@ -174,14 +174,14 @@ - compatible = "pci-x86"; - #address-cells = <3>; - #size-cells = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000 - 0x42000000 0x0 0xb0000000 0xb0000000 0 0x10000000 - 0x01000000 0x0 0x1000 0x1000 0 0xefff>; - u-boot,skip-auto-config-until-reloc; - - host_bridge: host-bridge@0,0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x00000000 0 0 0 0>; - compatible = "intel,apl-hostbridge"; - pciex-region-size = <0x10000000>; -@@ -197,7 +197,7 @@ - fsp_s: fsp-s { - }; - fsp_m: fsp-m { -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - nhlt { -@@ -206,20 +206,20 @@ - }; - - punit@0,1 { -- u-boot,dm-pre-proper; -- u-boot,dm-spl; -+ bootph-some-ram; -+ bootph-pre-ram; - reg = <0x00000800 0 0 0 0>; - compatible = "intel,apl-punit"; - }; - - gma@2,0 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - reg = <0x00001000 0 0 0 0>; - compatible = "fsp-fb"; - }; - - p2sb: p2sb@d,0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x02006810 0 0 0 0>; - compatible = "intel,p2sb"; - early-regs = ; -@@ -227,12 +227,12 @@ - - n { - compatible = "intel,apl-pinctrl"; -- u-boot,dm-pre-reloc; -+ bootph-all; - intel,p2sb-port-id = ; - acpi,path = "\\_SB.GPO0"; - gpio_n: gpio-n { - compatible = "intel,gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - gpio-controller; - #gpio-cells = <2>; - linux-name = "INT3452:00"; -@@ -240,14 +240,14 @@ - }; - - nw { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "intel,apl-pinctrl"; - intel,p2sb-port-id = ; - #gpio-cells = <2>; - acpi,path = "\\_SB.GPO1"; - gpio_nw: gpio-nw { - compatible = "intel,gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - gpio-controller; - #gpio-cells = <2>; - linux-name = "INT3452:01"; -@@ -255,14 +255,14 @@ - }; - - w { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "intel,apl-pinctrl"; - intel,p2sb-port-id = ; - #gpio-cells = <2>; - acpi,path = "\\_SB.GPO2"; - gpio_w: gpio-w { - compatible = "intel,gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - gpio-controller; - #gpio-cells = <2>; - linux-name = "INT3452:02"; -@@ -270,14 +270,14 @@ - }; - - sw { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "intel,apl-pinctrl"; - intel,p2sb-port-id = ; - #gpio-cells = <2>; - acpi,path = "\\_SB.GPO3"; - gpio_sw: gpio-sw { - compatible = "intel,gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - gpio-controller; - #gpio-cells = <2>; - linux-name = "INT3452:03"; -@@ -285,7 +285,7 @@ - }; - - itss { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "intel,itss"; - intel,p2sb-port-id = ; - intel,pmc-routes = < -@@ -301,7 +301,7 @@ - }; - - pmc@d,1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x6900 0 0 0 0>; - - /* -@@ -348,8 +348,8 @@ - }; - - spi: fast-spi@d,2 { -- u-boot,dm-pre-proper; -- u-boot,dm-spl; -+ bootph-some-ram; -+ bootph-pre-ram; - reg = <0x02006a10 0 0 0 0>; - #address-cells = <1>; - #size-cells = <0>; -@@ -360,8 +360,8 @@ - fwstore_spi: spi-flash@0 { - #size-cells = <1>; - #address-cells = <1>; -- u-boot,dm-pre-proper; -- u-boot,dm-spl; -+ bootph-some-ram; -+ bootph-pre-ram; - reg = <0>; - m25p,fast-read; - compatible = "winbond,w25q128fw", -@@ -369,12 +369,12 @@ - rw-mrc-cache { - label = "rw-mrc-cache"; - reg = <0x008e0000 0x00010000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - rw-var-mrc-cache { - label = "rw-mrc-cache"; - reg = <0x008f0000 0x0001000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -@@ -442,7 +442,7 @@ - compatible = "intel,apl-i2c", "snps,designware-i2c-pci"; - reg = <0x0200b210 0 0 0 0>; - early-regs = ; -- u-boot,dm-pre-proper; -+ bootph-some-ram; - #address-cells = <1>; - #size-cells = <0>; - clock-frequency = <400000>; -@@ -453,7 +453,7 @@ - tpm: tpm@50 { - reg = <0x50>; - compatible = "google,cr50"; -- u-boot,dm-pre-proper; -+ bootph-some-ram; - u-boot,i2c-offset-len = <0>; - ready-gpios = <&gpio_n 28 GPIO_ACTIVE_LOW>; - interrupts-extended = <&acpi_gpe GPIO_28_IRQ -@@ -577,7 +577,7 @@ - - serial: serial@18,2 { - reg = <0x0200c210 0 0 0 0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "intel,apl-ns16550"; - early-regs = <0xde000000 0x20>; - reg-shift = <2>; -@@ -603,7 +603,7 @@ - pch: pch@1f,0 { - reg = <0x0000f800 0 0 0 0>; - compatible = "intel,apl-pch"; -- u-boot,dm-pre-reloc; -+ bootph-all; - #address-cells = <1>; - #size-cells = <1>; - -@@ -611,10 +611,10 @@ - compatible = "intel,apl-lpc"; - #address-cells = <1>; - #size-cells = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - cros_ec: cros-ec { -- u-boot,dm-pre-proper; -- u-boot,dm-vpl; -+ bootph-some-ram; -+ bootph-verify; - compatible = "google,cros-ec-lpc"; - reg = <0x204 1 0x200 1 0x880 0x80>; - -@@ -785,7 +785,7 @@ - }; - - &fsp_s { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - - fsps,ish-enable = <0>; - fsps,enable-sata = <0>; -@@ -1253,5 +1253,5 @@ - &rtc { - #address-cells = <1>; - #size-cells = <0>; -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; -diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts -index 11ff520ac2..36956f40bd 100644 ---- a/arch/x86/dts/chromebook_link.dts -+++ b/arch/x86/dts/chromebook_link.dts -@@ -71,7 +71,7 @@ - - pch_pinctrl { - compatible = "intel,x86-pinctrl"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0 0>; - - gpio_a0 { -@@ -127,7 +127,7 @@ - }; - - gpio_a10 { -- u-boot,dm-pre-reloc; -+ bootph-all; - gpio-offset = <0 10>; - mode-gpio; - direction = ; -@@ -187,21 +187,21 @@ - }; - - gpio_b9 { -- u-boot,dm-pre-reloc; -+ bootph-all; - gpio-offset = <0x30 9>; - mode-gpio; - direction = ; - }; - - gpio_b10 { -- u-boot,dm-pre-reloc; -+ bootph-all; - gpio-offset = <0x30 10>; - mode-gpio; - direction = ; - }; - - gpio_b11 { -- u-boot,dm-pre-reloc; -+ bootph-all; - gpio-offset = <0x30 11>; - mode-gpio; - direction = ; -@@ -226,23 +226,23 @@ - compatible = "pci-x86"; - #address-cells = <3>; - #size-cells = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000 - 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 - 0x01000000 0x0 0x1000 0x1000 0 0xefff>; - - northbridge@0,0 { - reg = <0x00000000 0 0 0 0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "intel,bd82x6x-northbridge"; - board-id-gpios = <&gpio_b 9 0>, <&gpio_b 10 0>, - <&gpio_b 11 0>, <&gpio_a 10 0>; - spd { -- u-boot,dm-pre-reloc; -+ bootph-all; - #address-cells = <1>; - #size-cells = <0>; - elpida_4Gb_1600_x16 { -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0>; - data = [92 10 0b 03 04 19 02 02 - 03 52 01 08 0a 00 fe 00 -@@ -278,7 +278,7 @@ - 00 00 00 00 00 00 00 00]; - }; - samsung_4Gb_1600_1.35v_x16 { -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <1>; - data = [92 11 0b 03 04 19 02 02 - 03 11 01 08 0a 00 fe 00 -@@ -368,7 +368,7 @@ - me@16,0 { - reg = <0x0000b000 0 0 0 0>; - compatible = "intel,me"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - usb_1: usb@1a,0 { -@@ -410,7 +410,7 @@ - pch@1f,0 { - reg = <0x0000f800 0 0 0 0>; - compatible = "intel,bd82x6x", "intel,pch9"; -- u-boot,dm-pre-reloc; -+ bootph-all; - #address-cells = <1>; - #size-cells = <1>; - intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b -@@ -424,11 +424,11 @@ - #address-cells = <1>; - #size-cells = <0>; - compatible = "intel,ich9-spi"; -- u-boot,dm-pre-reloc; -+ bootph-all; - spi-flash@0 { - #size-cells = <1>; - #address-cells = <1>; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0>; - m25p,fast-read; - compatible = "winbond,w25q64", -@@ -437,14 +437,14 @@ - rw-mrc-cache { - label = "rw-mrc-cache"; - reg = <0x003e0000 0x00010000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; - - gpio_a: gpioa { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - #gpio-cells = <2>; - gpio-controller; - reg = <0 0x10>; -@@ -453,7 +453,7 @@ - - gpio_b: gpiob { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - #gpio-cells = <2>; - gpio-controller; - reg = <0x30 0x10>; -@@ -462,7 +462,7 @@ - - gpio_c: gpioc { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - #gpio-cells = <2>; - gpio-controller; - reg = <0x40 0x10>; -@@ -473,7 +473,7 @@ - compatible = "intel,bd82x6x-lpc"; - #address-cells = <1>; - #size-cells = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - intel,gen-dec = <0x800 0xfc 0x900 0xfc>; - cros-ec@200 { - compatible = "google,cros-ec"; -@@ -496,7 +496,7 @@ - sata@1f,2 { - compatible = "intel,pantherpoint-ahci"; - reg = <0x0000fa00 0 0 0 0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - intel,sata-mode = "ahci"; - intel,sata-port-map = <1>; - intel,sata-port0-gen3-tx = <0x00880a7f>; -@@ -505,7 +505,7 @@ - smbus: smbus@1f,3 { - compatible = "intel,ich-i2c"; - reg = <0x0000fb00 0 0 0 0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - -@@ -515,9 +515,9 @@ - }; - - microcode { -- u-boot,dm-pre-reloc; -+ bootph-all; - update@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #include "microcode/m12306a9_0000001b.dtsi" - }; - }; -diff --git a/arch/x86/dts/chromebook_samus.dts b/arch/x86/dts/chromebook_samus.dts -index 930ec1ace0..96705ceed0 100644 ---- a/arch/x86/dts/chromebook_samus.dts -+++ b/arch/x86/dts/chromebook_samus.dts -@@ -77,12 +77,12 @@ - - pch_pinctrl { - compatible = "intel,x86-broadwell-pinctrl"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0 0>; - - /* Put this first: it is the default */ - gpio_unused: gpio-unused { -- u-boot,dm-pre-reloc; -+ bootph-all; - mode-gpio; - direction = ; - owner = ; -@@ -90,7 +90,7 @@ - }; - - gpio_acpi_sci: acpi-sci { -- u-boot,dm-pre-reloc; -+ bootph-all; - mode-gpio; - direction = ; - invert; -@@ -98,7 +98,7 @@ - }; - - gpio_acpi_smi: acpi-smi { -- u-boot,dm-pre-reloc; -+ bootph-all; - mode-gpio; - direction = ; - invert; -@@ -106,14 +106,14 @@ - }; - - gpio_input: gpio-input { -- u-boot,dm-pre-reloc; -+ bootph-all; - mode-gpio; - direction = ; - owner = ; - }; - - gpio_input_invert: gpio-input-invert { -- u-boot,dm-pre-reloc; -+ bootph-all; - mode-gpio; - direction = ; - owner = ; -@@ -121,11 +121,11 @@ - }; - - gpio_native: gpio-native { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - gpio_out_high: gpio-out-high { -- u-boot,dm-pre-reloc; -+ bootph-all; - mode-gpio; - direction = ; - output-value = <1>; -@@ -134,7 +134,7 @@ - }; - - gpio_out_low: gpio-out-low { -- u-boot,dm-pre-reloc; -+ bootph-all; - mode-gpio; - direction = ; - output-value = <0>; -@@ -143,7 +143,7 @@ - }; - - gpio_pirq: gpio-pirq { -- u-boot,dm-pre-reloc; -+ bootph-all; - mode-gpio; - direction = ; - owner = ; -@@ -151,7 +151,7 @@ - }; - - soc_gpio@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - config = - <0 &gpio_unused 0>, /* unused */ - <1 &gpio_unused 0>, /* unused */ -@@ -255,7 +255,7 @@ - compatible = "pci-x86"; - #address-cells = <3>; - #size-cells = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000 - 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 - 0x01000000 0x0 0x1000 0x1000 0 0xefff>; -@@ -265,14 +265,14 @@ - compatible = "intel,broadwell-northbridge"; - board-id-gpios = <&gpio_c 5 0>, <&gpio_c 4 0>, - <&gpio_c 3 0>, <&gpio_c 1 0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - spd { - #address-cells = <1>; - #size-cells = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - samsung_4 { - reg = <6>; -- u-boot,dm-pre-reloc; -+ bootph-all; - data = [91 20 f1 03 04 11 05 0b - 03 11 01 08 0a 00 50 01 - 78 78 90 50 90 11 50 e0 -@@ -312,7 +312,7 @@ - * columns 10, density 4096 mb, x32 - */ - reg = <8>; -- u-boot,dm-pre-reloc; -+ bootph-all; - data = [91 20 f1 03 04 11 05 0b - 03 11 01 08 0a 00 50 01 - 78 78 90 50 90 11 50 e0 -@@ -348,7 +348,7 @@ - }; - samsung_8 { - reg = <10>; -- u-boot,dm-pre-reloc; -+ bootph-all; - data = [91 20 f1 03 04 12 05 0a - 03 11 01 08 0a 00 50 01 - 78 78 90 50 90 11 50 e0 -@@ -388,7 +388,7 @@ - * columns 11, density 4096 mb, x16 - */ - reg = <12>; -- u-boot,dm-pre-reloc; -+ bootph-all; - data = [91 20 f1 03 04 12 05 0a - 03 11 01 08 0a 00 50 01 - 78 78 90 50 90 11 50 e0 -@@ -428,7 +428,7 @@ - * columns 11, density 8192 mb, x16 - */ - reg = <13>; -- u-boot,dm-pre-reloc; -+ bootph-all; - data = [91 20 f1 03 05 1a 05 0a - 03 11 01 08 0a 00 50 01 - 78 78 90 50 90 11 50 e0 -@@ -468,7 +468,7 @@ - * columns 11, density 8192 mb, x16 - */ - reg = <15>; -- u-boot,dm-pre-reloc; -+ bootph-all; - data = [91 20 f1 03 05 1a 05 0a - 03 11 01 08 0a 00 50 01 - 78 78 90 50 90 11 50 e0 -@@ -557,7 +557,7 @@ - me@16,0 { - reg = <0x0000b000 0 0 0 0>; - compatible = "intel,me"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - usb_0: usb@1d,0 { -@@ -569,7 +569,7 @@ - pch: pch@1f,0 { - reg = <0x0000f800 0 0 0 0>; - compatible = "intel,broadwell-pch"; -- u-boot,dm-pre-reloc; -+ bootph-all; - #address-cells = <1>; - #size-cells = <1>; - intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b -@@ -585,12 +585,12 @@ - power-enable-gpio = <&gpio_a 23 0>; - - spi: spi { -- u-boot,dm-pre-reloc; -+ bootph-all; - #address-cells = <1>; - #size-cells = <0>; - compatible = "intel,ich9-spi"; - fwstore_spi: spi-flash@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #size-cells = <1>; - #address-cells = <1>; - reg = <0>; -@@ -599,7 +599,7 @@ - "jedec,spi-nor"; - memory-map = <0xff800000 0x00800000>; - rw-mrc-cache { -- u-boot,dm-pre-reloc; -+ bootph-all; - label = "rw-mrc-cache"; - reg = <0x003e0000 0x00010000>; - }; -@@ -608,7 +608,7 @@ - - gpio_a: gpioa { - compatible = "intel,broadwell-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - #gpio-cells = <2>; - gpio-controller; - reg = <0 0>; -@@ -617,7 +617,7 @@ - - gpio_b: gpiob { - compatible = "intel,broadwell-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - #gpio-cells = <2>; - gpio-controller; - reg = <1 0>; -@@ -626,7 +626,7 @@ - - gpio_c: gpioc { - compatible = "intel,broadwell-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - #gpio-cells = <2>; - gpio-controller; - reg = <2 0>; -@@ -637,10 +637,10 @@ - compatible = "intel,broadwell-lpc"; - #address-cells = <1>; - #size-cells = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - intel,gen-dec = <0x800 0xfc 0x900 0xfc>; - cros_ec: cros-ec { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "google,cros-ec-lpc"; - reg = <0x204 1 0x200 1 0x880 0x80>; - -@@ -661,7 +661,7 @@ - sata@1f,2 { - compatible = "intel,wildcatpoint-ahci"; - reg = <0x0000fa00 0 0 0 0>; -- u-boot,dm-pre-proper; -+ bootph-some-ram; - intel,sata-mode = "ahci"; - intel,sata-port-map = <1>; - intel,sata-port0-gen3-tx = <0x72>; -@@ -671,24 +671,24 @@ - smbus: smbus@1f,3 { - compatible = "intel,ich-i2c"; - reg = <0x0000fb00 0 0 0 0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - - tpm { -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0xfed40000 0x5000>; - compatible = "infineon,slb9635lpc"; - secdata { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "google,tpm-secdata"; - }; - }; - - microcode { -- u-boot,dm-pre-reloc; -+ bootph-all; - update@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - #include "microcode/mc0306d4_00000018.dtsi" - }; - }; -@@ -711,7 +711,7 @@ - #address-cells = <1>; - #size-cells = <0>; - nvdata { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "google,cmos-nvdata"; - reg = <0x26>; - }; -diff --git a/arch/x86/dts/chromebox_panther.dts b/arch/x86/dts/chromebox_panther.dts -index b25f759c79..242d8522db 100644 ---- a/arch/x86/dts/chromebox_panther.dts -+++ b/arch/x86/dts/chromebox_panther.dts -@@ -29,7 +29,7 @@ - compatible = "pci-x86"; - #address-cells = <3>; - #size-cells = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000 - 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 - 0x01000000 0x0 0x1000 0x1000 0 0xf000>; -@@ -61,21 +61,21 @@ - - gpioa { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0 0x10>; - bank-name = "A"; - }; - - gpiob { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x30 0x10>; - bank-name = "B"; - }; - - gpioc { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x40 0x10>; - bank-name = "C"; - }; -diff --git a/arch/x86/dts/conga-qeval20-qa3-e3845.dts b/arch/x86/dts/conga-qeval20-qa3-e3845.dts -index d11e789945..c6577b30c8 100644 ---- a/arch/x86/dts/conga-qeval20-qa3-e3845.dts -+++ b/arch/x86/dts/conga-qeval20-qa3-e3845.dts -@@ -103,7 +103,7 @@ - compatible = "intel,pci-baytrail", "pci-x86"; - #address-cells = <3>; - #size-cells = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000 - 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000 - 0x01000000 0x0 0x2000 0x2000 0 0xe000>; -@@ -200,7 +200,7 @@ - - gpioa { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0 0x20>; - bank-name = "A"; - use-lvl-write-cache; -@@ -208,7 +208,7 @@ - - gpiob { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x20 0x20>; - bank-name = "B"; - use-lvl-write-cache; -@@ -216,7 +216,7 @@ - - gpioc { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x40 0x20>; - bank-name = "C"; - use-lvl-write-cache; -@@ -224,7 +224,7 @@ - - gpiod { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x60 0x20>; - bank-name = "D"; - use-lvl-write-cache; -@@ -232,7 +232,7 @@ - - gpioe { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x80 0x20>; - bank-name = "E"; - use-lvl-write-cache; -@@ -240,7 +240,7 @@ - - gpiof { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0xA0 0x20>; - bank-name = "F"; - use-lvl-write-cache; -diff --git a/arch/x86/dts/coreboot.dts b/arch/x86/dts/coreboot.dts -index d21978d6e0..f9ff5346a7 100644 ---- a/arch/x86/dts/coreboot.dts -+++ b/arch/x86/dts/coreboot.dts -@@ -33,11 +33,11 @@ - - pci { - compatible = "pci-x86"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - serial: serial { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "coreboot-serial"; - }; - -diff --git a/arch/x86/dts/cougarcanyon2.dts b/arch/x86/dts/cougarcanyon2.dts -index 58395b5eb6..4833aab21c 100644 ---- a/arch/x86/dts/cougarcanyon2.dts -+++ b/arch/x86/dts/cougarcanyon2.dts -@@ -92,7 +92,7 @@ - #address-cells = <3>; - #size-cells = <2>; - compatible = "pci-x86"; -- u-boot,dm-pre-reloc; -+ bootph-all; - ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000 - 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 - 0x01000000 0x0 0x2000 0x2000 0 0xe000>; -@@ -100,7 +100,7 @@ - pch@1f,0 { - reg = <0x0000f800 0 0 0 0>; - compatible = "intel,bd82x6x"; -- u-boot,dm-pre-reloc; -+ bootph-all; - #address-cells = <1>; - #size-cells = <1>; - -@@ -164,21 +164,21 @@ - - gpioa { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0 0x10>; - bank-name = "A"; - }; - - gpiob { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x30 0x10>; - bank-name = "B"; - }; - - gpioc { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x40 0x10>; - bank-name = "C"; - }; -diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts -index 5768352531..64282303fb 100644 ---- a/arch/x86/dts/crownbay.dts -+++ b/arch/x86/dts/crownbay.dts -@@ -71,7 +71,7 @@ - #address-cells = <3>; - #size-cells = <2>; - compatible = "pci-x86"; -- u-boot,dm-pre-reloc; -+ bootph-all; - ranges = <0x02000000 0x0 0x40000000 0x40000000 0 0x80000000 - 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000 - 0x01000000 0x0 0x2000 0x2000 0 0xe000>; -@@ -80,14 +80,14 @@ - #address-cells = <3>; - #size-cells = <2>; - compatible = "pci-bridge"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x0000b800 0x0 0x0 0x0 0x0>; - - topcliff@0,0 { - #address-cells = <3>; - #size-cells = <2>; - compatible = "pci-bridge"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x00010000 0x0 0x0 0x0 0x0>; - - pciuart0: uart@a,1 { -@@ -96,7 +96,7 @@ - "pciclass,070002", - "pciclass,0700", - "ns16550"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x00025100 0x0 0x0 0x0 0x0 - 0x01025110 0x0 0x0 0x0 0x0>; - reg-shift = <0>; -@@ -110,7 +110,7 @@ - "pciclass,070002", - "pciclass,0700", - "ns16550"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x00025200 0x0 0x0 0x0 0x0 - 0x01025210 0x0 0x0 0x0 0x0>; - reg-shift = <0>; -@@ -124,7 +124,7 @@ - "pciclass,070002", - "pciclass,0700", - "ns16550"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x00025300 0x0 0x0 0x0 0x0 - 0x01025310 0x0 0x0 0x0 0x0>; - reg-shift = <0>; -@@ -138,7 +138,7 @@ - "pciclass,070002", - "pciclass,0700", - "ns16550"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x00025400 0x0 0x0 0x0 0x0 - 0x01025410 0x0 0x0 0x0 0x0>; - reg-shift = <0>; -@@ -233,14 +233,14 @@ - - gpioa { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0 0x20>; - bank-name = "A"; - }; - - gpiob { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x20 0x20>; - bank-name = "B"; - }; -diff --git a/arch/x86/dts/dfi-bt700.dtsi b/arch/x86/dts/dfi-bt700.dtsi -index c077a84574..868cea4d18 100644 ---- a/arch/x86/dts/dfi-bt700.dtsi -+++ b/arch/x86/dts/dfi-bt700.dtsi -@@ -101,7 +101,7 @@ - compatible = "intel,pci-baytrail", "pci-x86"; - #address-cells = <3>; - #size-cells = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000 - 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000 - 0x01000000 0x0 0x2000 0x2000 0 0xe000>; -@@ -112,7 +112,7 @@ - "pciclass,070002", - "pciclass,0700", - "ns16550"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x0200f310 0x0 0x0 0x0 0x0>; - reg-shift = <2>; - clock-frequency = <58982400>; -@@ -211,7 +211,7 @@ - - gpioa { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0 0x20>; - bank-name = "A"; - use-lvl-write-cache; -@@ -219,7 +219,7 @@ - - gpiob { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x20 0x20>; - bank-name = "B"; - use-lvl-write-cache; -@@ -227,7 +227,7 @@ - - gpioc { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x40 0x20>; - bank-name = "C"; - use-lvl-write-cache; -@@ -235,7 +235,7 @@ - - gpiod { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x60 0x20>; - bank-name = "D"; - use-lvl-write-cache; -@@ -243,7 +243,7 @@ - - gpioe { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x80 0x20>; - bank-name = "E"; - use-lvl-write-cache; -@@ -251,7 +251,7 @@ - - gpiof { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0xA0 0x20>; - bank-name = "F"; - use-lvl-write-cache; -diff --git a/arch/x86/dts/edison.dts b/arch/x86/dts/edison.dts -index b3658b8c30..7af8507e45 100644 ---- a/arch/x86/dts/edison.dts -+++ b/arch/x86/dts/edison.dts -@@ -55,7 +55,7 @@ - compatible = "pci-x86"; - #address-cells = <3>; - #size-cells = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000 - 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000 - 0x01000000 0x0 0x2000 0x2000 0 0xe000>; -@@ -130,7 +130,7 @@ - - reset { - compatible = "intel,reset-tangier"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - pinctrl { -diff --git a/arch/x86/dts/efi-x86_app.dts b/arch/x86/dts/efi-x86_app.dts -index a5316e2a1a..59e2e402d5 100644 ---- a/arch/x86/dts/efi-x86_app.dts -+++ b/arch/x86/dts/efi-x86_app.dts -@@ -23,10 +23,11 @@ - - reset { - compatible = "efi,reset"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - efi-fb { - compatible = "efi-fb"; -+ bootph-some-ram; - }; - - }; -diff --git a/arch/x86/dts/efi-x86_payload.dts b/arch/x86/dts/efi-x86_payload.dts -index 087865f225..1a6dd7dd70 100644 ---- a/arch/x86/dts/efi-x86_payload.dts -+++ b/arch/x86/dts/efi-x86_payload.dts -@@ -33,7 +33,7 @@ - - pci { - compatible = "pci-x86"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - efi-fb { -diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts -index 4120e8f5c4..08be190eda 100644 ---- a/arch/x86/dts/galileo.dts -+++ b/arch/x86/dts/galileo.dts -@@ -69,7 +69,7 @@ - #address-cells = <3>; - #size-cells = <2>; - compatible = "pci-x86"; -- u-boot,dm-pre-reloc; -+ bootph-all; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0 0x20000000 - 0x42000000 0x0 0xb0000000 0xb0000000 0 0x20000000 - 0x01000000 0x0 0x2000 0x2000 0 0xe000>; -@@ -80,7 +80,7 @@ - "pciclass,070002", - "pciclass,0700", - "ns16550"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x0000a500 0x0 0x0 0x0 0x0 - 0x0200a510 0x0 0x0 0x0 0x0>; - reg-shift = <2>; -@@ -147,14 +147,14 @@ - - gpioa { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0 0x20>; - bank-name = "A"; - }; - - gpiob { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x20 0x20>; - bank-name = "B"; - }; -diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts -index 466309f2b8..f44b9bbc53 100644 ---- a/arch/x86/dts/minnowmax.dts -+++ b/arch/x86/dts/minnowmax.dts -@@ -116,7 +116,7 @@ - compatible = "intel,pci-baytrail", "pci-x86"; - #address-cells = <3>; - #size-cells = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000 - 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000 - 0x01000000 0x0 0x2000 0x2000 0 0xe000>; -@@ -213,7 +213,7 @@ - - gpioa { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0 0x20>; - bank-name = "A"; - use-lvl-write-cache; -@@ -221,7 +221,7 @@ - - gpiob { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x20 0x20>; - bank-name = "B"; - use-lvl-write-cache; -@@ -229,7 +229,7 @@ - - gpioc { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x40 0x20>; - bank-name = "C"; - use-lvl-write-cache; -@@ -237,7 +237,7 @@ - - gpiod { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x60 0x20>; - bank-name = "D"; - use-lvl-write-cache; -@@ -245,7 +245,7 @@ - - gpioe { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x80 0x20>; - bank-name = "E"; - use-lvl-write-cache; -@@ -253,7 +253,7 @@ - - gpiof { - compatible = "intel,ich6-gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0xA0 0x20>; - bank-name = "F"; - use-lvl-write-cache; -diff --git a/arch/x86/dts/qemu-x86_i440fx.dts b/arch/x86/dts/qemu-x86_i440fx.dts -index 6556e9ebcd..3bb2f121de 100644 ---- a/arch/x86/dts/qemu-x86_i440fx.dts -+++ b/arch/x86/dts/qemu-x86_i440fx.dts -@@ -31,12 +31,12 @@ - cpus { - #address-cells = <1>; - #size-cells = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - cpu@0 { - device_type = "cpu"; - compatible = "cpu-qemu"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0>; - intel,apic-id = <0>; - }; -@@ -46,7 +46,7 @@ - compatible = "pci-x86"; - #address-cells = <3>; - #size-cells = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000 - 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 - 0x01000000 0x0 0x2000 0x2000 0 0xe000>; -@@ -54,11 +54,11 @@ - pch@1,0 { - reg = <0x00000800 0 0 0 0>; - compatible = "intel,pch7"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - irq-router { - compatible = "intel,irq-router"; -- u-boot,dm-pre-reloc; -+ bootph-all; - intel,pirq-config = "pci"; - intel,pirq-link = <0x60 4>; - intel,pirq-mask = <0x0e40>; -diff --git a/arch/x86/dts/qemu-x86_q35.dts b/arch/x86/dts/qemu-x86_q35.dts -index d0830892e8..63931cd6dd 100644 ---- a/arch/x86/dts/qemu-x86_q35.dts -+++ b/arch/x86/dts/qemu-x86_q35.dts -@@ -42,12 +42,12 @@ - cpus { - #address-cells = <1>; - #size-cells = <0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - - cpu@0 { - device_type = "cpu"; - compatible = "cpu-qemu"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0>; - intel,apic-id = <0>; - }; -@@ -57,7 +57,7 @@ - compatible = "pci-x86"; - #address-cells = <3>; - #size-cells = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000 - 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 - 0x01000000 0x0 0x2000 0x2000 0 0xe000>; -@@ -65,11 +65,11 @@ - pch@1f,0 { - reg = <0x0000f800 0 0 0 0>; - compatible = "intel,pch9"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - irq-router { - compatible = "intel,irq-router"; -- u-boot,dm-pre-reloc; -+ bootph-all; - intel,pirq-config = "pci"; - intel,actl-8bit; - intel,actl-addr = <0x44>; -diff --git a/arch/x86/dts/reset.dtsi b/arch/x86/dts/reset.dtsi -index f2ba2fb5e8..1f1ff9f64d 100644 ---- a/arch/x86/dts/reset.dtsi -+++ b/arch/x86/dts/reset.dtsi -@@ -1,6 +1,6 @@ - / { - reset: reset { - compatible = "x86,reset"; -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - }; -diff --git a/arch/x86/dts/rtc.dtsi b/arch/x86/dts/rtc.dtsi -index 942cc937dc..1c2eb2891a 100644 ---- a/arch/x86/dts/rtc.dtsi -+++ b/arch/x86/dts/rtc.dtsi -@@ -1,7 +1,7 @@ - / { - rtc: rtc { - compatible = "motorola,mc146818"; -- u-boot,dm-pre-proper; -+ bootph-some-ram; - reg = <0x70 2>; - }; - }; -diff --git a/arch/x86/dts/serial.dtsi b/arch/x86/dts/serial.dtsi -index 22f7b54fed..99022eb21e 100644 ---- a/arch/x86/dts/serial.dtsi -+++ b/arch/x86/dts/serial.dtsi -@@ -1,6 +1,6 @@ - / { - serial: serial { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "ns16550"; - reg = <0x3f8 8>; - reg-shift = <0>; -diff --git a/arch/x86/dts/tsc_timer.dtsi b/arch/x86/dts/tsc_timer.dtsi -index 4df8e9d7fc..9d098df832 100644 ---- a/arch/x86/dts/tsc_timer.dtsi -+++ b/arch/x86/dts/tsc_timer.dtsi -@@ -2,6 +2,6 @@ - tsc-timer { - compatible = "x86,tsc-timer"; - clock-frequency = ; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; -diff --git a/arch/x86/include/asm/bootm.h b/arch/x86/include/asm/bootm.h -index 109f686f74..3b641783b9 100644 ---- a/arch/x86/include/asm/bootm.h -+++ b/arch/x86/include/asm/bootm.h -@@ -14,14 +14,14 @@ void bootm_announce_and_cleanup(void); - * This boots a kernel image, either 32-bit or 64-bit. It will also work with - * a self-extracting kernel, if you set @image_64bit to false. - * -- * @setup_base: Pointer to the setup.bin information for the kernel -- * @load_address: Pointer to the start of the kernel image -- * @image_64bit: true if the image is a raw 64-bit kernel, false if it -- * is raw 32-bit or any type of self-extracting kernel -- * such as a bzImage. -+ * @setup_base: Address of the setup.bin information for the kernel -+ * @entry: Address of the kernel entry point -+ * @image_64bit: true if the image is a raw 64-bit kernel, or a kernel -+ * which supports booting in 64-bit mode; false if it is raw 32-bit or any type -+ * of self-extracting kernel such as a bzImage. - * Return: -ve error code. This function does not return if the kernel was - * booted successfully. - */ --int boot_linux_kernel(ulong setup_base, ulong load_address, bool image_64bit); -+int boot_linux_kernel(ulong setup_base, ulong entry, bool image_64bit); - - #endif -diff --git a/arch/x86/include/asm/bootparam.h b/arch/x86/include/asm/bootparam.h -index 7a3c1f5155..ea816ca746 100644 ---- a/arch/x86/include/asm/bootparam.h -+++ b/arch/x86/include/asm/bootparam.h -@@ -9,19 +9,54 @@ - #include - #include - --/* setup data types */ --enum { -- SETUP_NONE = 0, -- SETUP_E820_EXT, -- SETUP_DTB, --}; -+/* setup_data/setup_indirect types */ -+#define SETUP_NONE 0 -+#define SETUP_E820_EXT 1 -+#define SETUP_DTB 2 -+#define SETUP_PCI 3 -+#define SETUP_EFI 4 -+#define SETUP_APPLE_PROPERTIES 5 -+#define SETUP_JAILHOUSE 6 -+#define SETUP_CC_BLOB 7 -+#define SETUP_IMA 8 -+#define SETUP_RNG_SEED 9 -+#define SETUP_ENUM_MAX SETUP_RNG_SEED -+ -+#define SETUP_INDIRECT BIT(31) -+#define SETUP_TYPE_MAX (SETUP_ENUM_MAX | SETUP_INDIRECT) -+ -+/* ram_size flags */ -+#define RAMDISK_IMAGE_START_MASK 0x07FF -+#define RAMDISK_PROMPT_FLAG 0x8000 -+#define RAMDISK_LOAD_FLAG 0x4000 -+ -+/* loadflags */ -+#define LOADED_HIGH BIT(0) -+#define KASLR_FLAG BIT(1) -+#define QUIET_FLAG BIT(5) -+#define KEEP_SEGMENTS BIT(6) -+#define CAN_USE_HEAP BIT(7) -+ -+#define XLF_KERNEL_64 BIT(0) -+#define XLF_CAN_BE_LOADED_ABOVE_4G BIT(1) -+#define XLF_EFI_HANDOVER_32 BIT(2) -+#define XLF_EFI_HANDOVER_64 BIT(3) -+#define XLF_EFI_KEXEC BIT(4) - - /* extensible setup data list node */ - struct setup_data { - __u64 next; - __u32 type; - __u32 len; -- __u8 data[0]; -+ __u8 data[]; -+}; -+ -+/* extensible setup indirect data node */ -+struct setup_indirect { -+ __u32 type; -+ __u32 reserved; /* Reserved, must be set to zero. */ -+ __u64 len; -+ __u64 addr; - }; - - /** -@@ -34,9 +69,6 @@ struct setup_header { - __u16 root_flags; - __u32 syssize; - __u16 ram_size; --#define RAMDISK_IMAGE_START_MASK 0x07FF --#define RAMDISK_PROMPT_FLAG 0x8000 --#define RAMDISK_LOAD_FLAG 0x4000 - __u16 vid_mode; - __u16 root_dev; - __u16 boot_flag; -@@ -44,15 +76,10 @@ struct setup_header { - __u32 header; - __u16 version; - __u32 realmode_swtch; -- __u16 start_sys; -+ __u16 start_sys_seg; - __u16 kernel_version; - __u8 type_of_loader; - __u8 loadflags; --#define LOADED_HIGH BIT(0) --#define KASLR_FLAG BIT(1) --#define QUIET_FLAG BIT(5) --#define KEEP_SEGMENTS BIT(6) /* Obsolete */ --#define CAN_USE_HEAP BIT(7) - __u16 setup_move_size; - __u32 code32_start; - __u32 ramdisk_image; -@@ -65,13 +92,8 @@ struct setup_header { - __u32 initrd_addr_max; - __u32 kernel_alignment; - __u8 relocatable_kernel; -- u8 min_alignment; --#define XLF_KERNEL_64 BIT(0) --#define XLF_CAN_BE_LOADED_ABOVE_4G BIT(1) --#define XLF_EFI_HANDOVER_32 BIT(2) --#define XLF_EFI_HANDOVER_64 BIT(3) --#define XLF_EFI_KEXEC BIT(4) -- u16 xloadflags; -+ __u8 min_alignment; -+ __u16 xloadflags; - __u32 cmdline_size; - __u32 hardware_subarch; - __u64 hardware_subarch_data; -@@ -81,7 +103,7 @@ struct setup_header { - __u64 pref_address; - __u32 init_size; - __u32 handover_offset; -- u32 kernel_info_offset; -+ __u32 kernel_info_offset; - } __attribute__((packed)); - - struct sys_desc_table { -diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h -index 3346012d33..073f80b07f 100644 ---- a/arch/x86/include/asm/cpu.h -+++ b/arch/x86/include/asm/cpu.h -@@ -262,6 +262,7 @@ void cpu_call32(ulong code_seg32, ulong target, ulong table); - * - * @setup_base: Pointer to the setup.bin information for the kernel - * @target: Pointer to the start of the kernel image -+ * Return: -EFAULT if the kernel returned; otherwise does not return - */ - int cpu_jump_to_64bit(ulong setup_base, ulong target); - -diff --git a/arch/x86/lib/bdinfo.c b/arch/x86/lib/bdinfo.c -index 0cb79b01bd..15390070fe 100644 ---- a/arch/x86/lib/bdinfo.c -+++ b/arch/x86/lib/bdinfo.c -@@ -8,6 +8,7 @@ - #include - #include - #include -+#include - #include - #include - -@@ -16,6 +17,11 @@ DECLARE_GLOBAL_DATA_PTR; - void arch_print_bdinfo(void) - { - bdinfo_print_num_l("prev table", gd->arch.table); -+ bdinfo_print_num_l("clock_rate", gd->arch.clock_rate); -+ bdinfo_print_num_l("tsc_base", gd->arch.tsc_base); -+ bdinfo_print_num_l("vendor", gd->arch.x86_vendor); -+ bdinfo_print_str(" name", cpu_vendor_name(gd->arch.x86_vendor)); -+ bdinfo_print_num_l("model", gd->arch.x86_model); - - if (IS_ENABLED(CONFIG_EFI_STUB)) - efi_show_bdinfo(); -diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c -index 873e2bc176..61cb7bc611 100644 ---- a/arch/x86/lib/bootm.c -+++ b/arch/x86/lib/bootm.c -@@ -10,6 +10,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -149,26 +150,52 @@ error: - return 1; - } - --int boot_linux_kernel(ulong setup_base, ulong load_address, bool image_64bit) -+int boot_linux_kernel(ulong setup_base, ulong entry, bool image_64bit) - { - bootm_announce_and_cleanup(); - - #ifdef CONFIG_SYS_COREBOOT - timestamp_add_now(TS_U_BOOT_START_KERNEL); - #endif -+ -+ /* -+ * Exit EFI boot services just before jumping, after all console -+ * output, since the console won't be available afterwards. -+ */ -+ if (IS_ENABLED(CONFIG_EFI_APP)) { -+ int ret; -+ -+ ret = efi_store_memory_map(efi_get_priv()); -+ if (ret) -+ return ret; -+ printf("Exiting EFI boot services\n"); -+ ret = efi_call_exit_boot_services(); -+ if (ret) -+ return ret; -+ } -+ - if (image_64bit) { - if (!cpu_has_64bit()) { - puts("Cannot boot 64-bit kernel on 32-bit machine\n"); - return -EFAULT; - } -- /* At present 64-bit U-Boot does not support booting a -+ /* -+ * At present 64-bit U-Boot only supports booting a 64-bit - * kernel. -- * TODO(sjg@chromium.org): Support booting both 32-bit and -- * 64-bit kernels from 64-bit U-Boot. -+ * -+ * TODO(sjg@chromium.org): Support booting 32-bit kernels from -+ * 64-bit U-Boot - */ --#if !CONFIG_IS_ENABLED(X86_64) -- return cpu_jump_to_64bit(setup_base, load_address); --#endif -+ if (CONFIG_IS_ENABLED(X86_64)) { -+ typedef void (*h_func)(ulong zero, ulong setup); -+ h_func func; -+ -+ /* jump to Linux with rdi=0, rsi=setup_base */ -+ func = (h_func)entry; -+ func(0, setup_base); -+ } else { -+ return cpu_jump_to_64bit(setup_base, entry); -+ } - } else { - /* - * Set %ebx, %ebp, and %edi to 0, %esi to point to the -@@ -190,7 +217,7 @@ int boot_linux_kernel(ulong setup_base, ulong load_address, bool image_64bit) - "movl $0, %%ebp\n" - "cli\n" - "jmp *%[kernel_entry]\n" -- :: [kernel_entry]"a"(load_address), -+ :: [kernel_entry]"a"(entry), - [boot_params] "S"(setup_base), - "b"(0), "D"(0) - ); -diff --git a/arch/x86/lib/fsp/fsp_graphics.c b/arch/x86/lib/fsp/fsp_graphics.c -index b07c666caf..2bcc49f605 100644 ---- a/arch/x86/lib/fsp/fsp_graphics.c -+++ b/arch/x86/lib/fsp/fsp_graphics.c -@@ -106,7 +106,7 @@ static int fsp_video_probe(struct udevice *dev) - vesa->phys_base_ptr = dm_pci_read_bar32(dev, 2); - gd->fb_base = vesa->phys_base_ptr; - -- ret = vesa_setup_video_priv(vesa, uc_priv, plat); -+ ret = vesa_setup_video_priv(vesa, vesa->phys_base_ptr, uc_priv, plat); - if (ret) - goto err; - -diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c -index 9cc0449030..e5ea5129c1 100644 ---- a/arch/x86/lib/zimage.c -+++ b/arch/x86/lib/zimage.c -@@ -504,13 +504,24 @@ static int do_zboot_info(struct cmd_tbl *cmdtp, int flag, int argc, - static int do_zboot_go(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[]) - { -+ struct boot_params *params = state.base_ptr; -+ struct setup_header *hdr = ¶ms->hdr; -+ bool image_64bit; -+ ulong entry; - int ret; - - disable_interrupts(); - -+ entry = state.load_address; -+ image_64bit = false; -+ if (IS_ENABLED(CONFIG_X86_RUN_64BIT) && -+ (hdr->xloadflags & XLF_KERNEL_64)) { -+ entry += 0x200; -+ image_64bit = true; -+ } -+ - /* we assume that the kernel is in place */ -- ret = boot_linux_kernel((ulong)state.base_ptr, state.load_address, -- false); -+ ret = boot_linux_kernel((ulong)state.base_ptr, entry, image_64bit); - printf("Kernel returned! (err=%d)\n", ret); - - return CMD_RET_FAILURE; -@@ -655,7 +666,7 @@ void zimage_dump(struct boot_params *base_ptr) - printf("%-20s %s\n", "", "Ancient kernel, using version 100"); - print_num("Version", hdr->version); - print_num("Real mode switch", hdr->realmode_swtch); -- print_num("Start sys", hdr->start_sys); -+ print_num("Start sys seg", hdr->start_sys_seg); - print_num("Kernel version", hdr->kernel_version); - version = get_kernel_version(base_ptr, (void *)state.bzimage_addr); - if (version) -diff --git a/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c b/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c -index 34109c69dd..466174679e 100644 ---- a/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c -+++ b/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c -@@ -113,7 +113,7 @@ static const iomux_v3_cfg_t eqos_rst_pads[] = { - MX8MP_PAD_SAI2_RXC__GPIO4_IO22 | MUX_PAD_CTRL(NO_PAD_CTRL), - }; - --static void setup_iomux_eqos(void) -+static void setup_eqos(void) - { - imx_iomux_v3_setup_multiple_pads(eqos_rst_pads, - ARRAY_SIZE(eqos_rst_pads)); -@@ -124,21 +124,6 @@ static void setup_iomux_eqos(void) - gpio_direction_output(EQOS_RST_PAD, 1); - mdelay(100); - } -- --static int setup_eqos(void) --{ -- struct iomuxc_gpr_base_regs *gpr = -- (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; -- -- setup_iomux_eqos(); -- -- /* set INTF as RGMII, enable RGMII TXC clock */ -- clrsetbits_le32(&gpr->gpr[1], -- IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MASK, BIT(16)); -- setbits_le32(&gpr->gpr[1], BIT(19) | BIT(21)); -- -- return set_clk_eqos(ENET_125MHZ); --} - #endif /* CONFIG_DWC_ETH_QOS */ - - int board_phy_config(struct phy_device *phydev) -@@ -208,7 +193,8 @@ int board_late_init(void) - - #ifdef CONFIG_SPL_MMC - #define UBOOT_RAW_SECTOR_OFFSET 0x40 --unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc) -+unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc, -+ unsigned long raw_sector) - { - u32 boot_dev = spl_boot_device(); - -diff --git a/board/armltd/corstone1000/corstone1000.c b/board/armltd/corstone1000/corstone1000.c -index 4f4b96a095..6ec8e6144f 100644 ---- a/board/armltd/corstone1000/corstone1000.c -+++ b/board/armltd/corstone1000/corstone1000.c -@@ -6,6 +6,7 @@ - */ - - #include -+#include - #include - #include - #include -@@ -86,6 +87,6 @@ int dram_init_banksize(void) - return 0; - } - --void reset_cpu(ulong addr) -+void reset_cpu(void) - { - } -diff --git a/board/bosch/acc/acc.c b/board/bosch/acc/acc.c -index 770ca8b711..4a0603d0f3 100644 ---- a/board/bosch/acc/acc.c -+++ b/board/bosch/acc/acc.c -@@ -6,6 +6,7 @@ - */ - - #include -+#include - #include - #include - #include -@@ -720,7 +721,7 @@ int board_fit_config_name_match(const char *name) - return -1; - } - --void reset_cpu(ulong addr) -+void reset_cpu(void) - { - puts("Hanging CPU for watchdog reset!\n"); - hang(); -diff --git a/board/compulab/imx8mm-cl-iot-gate/ddr/ddr.h b/board/compulab/imx8mm-cl-iot-gate/ddr/ddr.h -index f7d4fdc101..508b4a565c 100644 ---- a/board/compulab/imx8mm-cl-iot-gate/ddr/ddr.h -+++ b/board/compulab/imx8mm-cl-iot-gate/ddr/ddr.h -@@ -25,7 +25,7 @@ struct lpddr4_tcm_desc { - - u32 cl_eeprom_get_ddrinfo(void); - u32 cl_eeprom_set_ddrinfo(u32 ddrinfo); --u32 cl_eeprom_get_subind(void); --u32 cl_eeprom_set_subind(u32 subind); -+u8 cl_eeprom_get_subind(void); -+u8 cl_eeprom_set_subind(u8 subind); - u32 cl_eeprom_get_osize(void); - #endif -diff --git a/board/dhelectronics/dh_imx8mp/Makefile b/board/dhelectronics/dh_imx8mp/Makefile -index 86ffc31fed..e5a29fdd12 100644 ---- a/board/dhelectronics/dh_imx8mp/Makefile -+++ b/board/dhelectronics/dh_imx8mp/Makefile -@@ -5,7 +5,7 @@ - # - - ifdef CONFIG_SPL_BUILD --obj-y += spl.o lpddr4_timing_4G_32.o -+obj-y += spl.o lpddr4_timing_2G_32.o lpddr4_timing_4G_32.o - else - obj-y += imx8mp_dhcom_pdk2.o - endif -diff --git a/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c b/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c -index 9d8e19d994..760ea4be35 100644 ---- a/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c -+++ b/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c -@@ -5,12 +5,16 @@ - - #include - #include -+#include -+#include - #include - #include - #include -+#include - #include - #include - #include -+#include - #include - #include - #include -@@ -37,30 +41,6 @@ int board_phys_sdram_size(phys_size_t *size) - return 0; - } - --static void setup_eqos(void) --{ -- struct iomuxc_gpr_base_regs *gpr = -- (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; -- -- /* Set INTF as RGMII, enable RGMII TXC clock. */ -- clrsetbits_le32(&gpr->gpr[1], -- IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MASK, BIT(16)); -- setbits_le32(&gpr->gpr[1], BIT(19) | BIT(21)); -- -- set_clk_eqos(ENET_125MHZ); --} -- --static void setup_fec(void) --{ -- struct iomuxc_gpr_base_regs *gpr = -- (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; -- -- /* Enable RGMII TX clk output. */ -- setbits_le32(&gpr->gpr[1], BIT(22)); -- -- set_clk_enet(ENET_125MHZ); --} -- - static int dh_imx8_setup_ethaddr(void) - { - unsigned char enetaddr[6]; -@@ -127,8 +107,6 @@ int dh_setup_mac_address(void) - - int board_init(void) - { -- setup_eqos(); -- setup_fec(); - return 0; - } - -@@ -142,3 +120,227 @@ enum env_location env_get_location(enum env_operation op, int prio) - { - return prio ? ENVL_UNKNOWN : ENVL_SPI_FLASH; - } -+ -+static const char *iomuxc_compat = "fsl,imx8mp-iomuxc"; -+static const char *lan_compat = "ethernet-phy-id0007.c110"; -+static const char *ksz_compat = "ethernet-phy-id0022.1642"; -+ -+static int dh_dt_patch_som_eqos(const void *fdt_blob) -+{ -+ const void __iomem *mux = (void __iomem *)IOMUXC_BASE_ADDR + -+ FIELD_GET(MUX_CTRL_OFS_MASK, MX8MP_PAD_ENET_RX_CTL__GPIO1_IO24); -+ int mac_node, mdio_node, iomuxc_node, ksz_node, lan_node, subnode; -+ const char *mac_compat = "nxp,imx8mp-dwmac-eqos"; -+ void *blob = (void *)fdt_blob; -+ const fdt32_t *clk_prop; -+ bool is_gigabit; -+ u32 handle; -+ u32 clk[6]; -+ -+ setbits_le32(mux, IOMUX_CONFIG_SION); -+ is_gigabit = !(readl(GPIO1_BASE_ADDR) & BIT(24)); -+ clrbits_le32(mux, IOMUX_CONFIG_SION); -+ -+ /* Adjust EQoS node for Gigabit KSZ9131RNXI or Fast LAN8740Ai PHY */ -+ mac_node = fdt_node_offset_by_compatible(blob, -1, mac_compat); -+ if (mac_node < 0) -+ return 0; -+ -+ mdio_node = fdt_first_subnode(blob, mac_node); -+ if (mdio_node < 0) -+ return 0; -+ -+ /* KSZ9131RNXI */ -+ ksz_node = fdt_node_offset_by_compatible(blob, mdio_node, ksz_compat); -+ if (ksz_node < 0) -+ return 0; -+ -+ /* LAN8740Ai */ -+ lan_node = fdt_node_offset_by_compatible(blob, mdio_node, lan_compat); -+ if (lan_node < 0) -+ return 0; -+ -+ iomuxc_node = fdt_node_offset_by_compatible(blob, -1, iomuxc_compat); -+ if (iomuxc_node < 0) -+ return 0; -+ -+ /* -+ * The code below adjusts the following DT properties: -+ * - assigned-clock-parents .. 125 MHz RGMII / 50 MHz RMII ref clock -+ * - assigned-clock-rates .... 125 MHz RGMII / 50 MHz RMII ref clock -+ * - phy-handle .............. KSZ9131RNXI RGMII / LAN8740Ai RMII -+ * - phy-mode ................ RGMII / RMII -+ * - pinctrl-0 ............... RGMII / RMII -+ * - PHY subnode status ...... "disabled"/"okay" per RGMII / RMII -+ */ -+ -+ /* Perform all inplace changes first, string changes last. */ -+ clk_prop = fdt_getprop(blob, mac_node, "assigned-clock-parents", NULL); -+ if (!clk_prop) -+ return 0; -+ clk[0] = clk_prop[0]; -+ clk[1] = cpu_to_fdt32(IMX8MP_SYS_PLL1_266M); -+ clk[2] = clk_prop[2]; -+ clk[3] = cpu_to_fdt32(IMX8MP_SYS_PLL2_100M); -+ clk[4] = clk_prop[4]; -+ clk[5] = is_gigabit ? cpu_to_fdt32(IMX8MP_SYS_PLL2_125M) : -+ cpu_to_fdt32(IMX8MP_SYS_PLL2_50M); -+ fdt_setprop_inplace(blob, mac_node, "assigned-clock-parents", -+ clk, 6 * sizeof(u32)); -+ -+ clk[0] = cpu_to_fdt32(0); -+ clk[1] = cpu_to_fdt32(100000000); -+ clk[2] = is_gigabit ? cpu_to_fdt32(125000000) : -+ cpu_to_fdt32(50000000); -+ fdt_setprop_inplace(blob, mac_node, "assigned-clock-rates", -+ clk, 3 * sizeof(u32)); -+ -+ handle = fdt_get_phandle(blob, is_gigabit ? ksz_node : lan_node); -+ fdt_setprop_inplace_u32(blob, mac_node, "phy-handle", handle); -+ -+ fdt_for_each_subnode(subnode, blob, iomuxc_node) { -+ if (!strstr(fdt_get_name(blob, subnode, NULL), -+ is_gigabit ? "eqos-rgmii" : "eqos-rmii")) -+ continue; -+ -+ handle = fdt_get_phandle(blob, subnode); -+ fdt_setprop_inplace_u32(blob, mac_node, "pinctrl-0", handle); -+ break; -+ } -+ -+ fdt_setprop_string(blob, mac_node, "phy-mode", -+ is_gigabit ? "rgmii-id" : "rmii"); -+ -+ mac_node = fdt_node_offset_by_compatible(blob, -1, mac_compat); -+ mdio_node = fdt_first_subnode(blob, mac_node); -+ ksz_node = fdt_node_offset_by_compatible(blob, mdio_node, ksz_compat); -+ fdt_setprop_string(blob, ksz_node, "status", -+ is_gigabit ? "okay" : "disabled"); -+ -+ mac_node = fdt_node_offset_by_compatible(blob, -1, mac_compat); -+ mdio_node = fdt_first_subnode(blob, mac_node); -+ lan_node = fdt_node_offset_by_compatible(blob, mdio_node, lan_compat); -+ fdt_setprop_string(blob, lan_node, "status", -+ is_gigabit ? "disabled" : "okay"); -+ -+ return 0; -+} -+ -+static int dh_dt_patch_som_fec(const void *fdt_blob) -+{ -+ const void __iomem *mux = (void __iomem *)IOMUXC_BASE_ADDR + -+ FIELD_GET(MUX_CTRL_OFS_MASK, MX8MP_PAD_SAI1_TXFS__GPIO4_IO10); -+ int mac_node, mdio_node, iomuxc_node, lan_node, phy_node, subnode; -+ const char *mac_compat = "fsl,imx8mp-fec"; -+ void *blob = (void *)fdt_blob; -+ const fdt32_t *clk_prop; -+ bool is_gigabit; -+ u32 handle; -+ u32 clk[8]; -+ -+ setbits_le32(mux, IOMUX_CONFIG_SION); -+ is_gigabit = !(readl(GPIO4_BASE_ADDR) & BIT(10)); -+ clrbits_le32(mux, IOMUX_CONFIG_SION); -+ -+ /* Test for non-default SoM with 100/Full PHY attached to FEC */ -+ if (is_gigabit) -+ return 0; -+ -+ /* Adjust FEC node for Fast LAN8740Ai PHY */ -+ mac_node = fdt_node_offset_by_compatible(blob, -1, mac_compat); -+ if (mac_node < 0) -+ return 0; -+ -+ /* Optional PHY pointed to by phy-handle, possibly on carrier board */ -+ phy_node = fdtdec_lookup_phandle(blob, mac_node, "phy-handle"); -+ if (phy_node > 0) { -+ fdt_setprop_string(blob, phy_node, "status", "disabled"); -+ mac_node = fdt_node_offset_by_compatible(blob, -1, mac_compat); -+ } -+ -+ mdio_node = fdt_first_subnode(blob, mac_node); -+ if (mdio_node < 0) -+ return 0; -+ -+ /* LAN8740Ai */ -+ lan_node = fdt_node_offset_by_compatible(blob, mdio_node, lan_compat); -+ if (lan_node < 0) -+ return 0; -+ -+ iomuxc_node = fdt_node_offset_by_compatible(blob, -1, iomuxc_compat); -+ if (iomuxc_node < 0) -+ return 0; -+ -+ /* -+ * The code below adjusts the following DT properties: -+ * - assigned-clock-parents .. 50 MHz RMII ref clock -+ * - assigned-clock-rates .... 50 MHz RMII ref clock -+ * - phy-handle .............. LAN8740Ai RMII -+ * - phy-mode ................ RMII -+ * - pinctrl-0 ............... RMII -+ * - PHY subnode status ...... "okay" for RMII PHY -+ */ -+ -+ /* Perform all inplace changes first, string changes last. */ -+ clk_prop = fdt_getprop(blob, mac_node, "assigned-clock-parents", NULL); -+ if (!clk_prop) -+ return 0; -+ clk[0] = clk_prop[0]; -+ clk[1] = cpu_to_fdt32(IMX8MP_SYS_PLL1_266M); -+ clk[2] = clk_prop[2]; -+ clk[3] = cpu_to_fdt32(IMX8MP_SYS_PLL2_100M); -+ clk[4] = clk_prop[4]; -+ clk[5] = cpu_to_fdt32(IMX8MP_SYS_PLL2_50M); -+ clk[6] = clk_prop[6]; -+ clk[7] = cpu_to_fdt32(IMX8MP_SYS_PLL2_50M); -+ fdt_setprop_inplace(blob, mac_node, "assigned-clock-parents", -+ clk, 8 * sizeof(u32)); -+ -+ clk[0] = cpu_to_fdt32(0); -+ clk[1] = cpu_to_fdt32(100000000); -+ clk[2] = cpu_to_fdt32(50000000); -+ clk[3] = cpu_to_fdt32(0); -+ fdt_setprop_inplace(blob, mac_node, "assigned-clock-rates", -+ clk, 4 * sizeof(u32)); -+ -+ handle = fdt_get_phandle(blob, lan_node); -+ fdt_setprop_inplace_u32(blob, mac_node, "phy-handle", handle); -+ -+ fdt_for_each_subnode(subnode, blob, iomuxc_node) { -+ if (!strstr(fdt_get_name(blob, subnode, NULL), "fec-rmii")) -+ continue; -+ -+ handle = fdt_get_phandle(blob, subnode); -+ fdt_setprop_inplace_u32(blob, mac_node, "pinctrl-0", handle); -+ break; -+ } -+ -+ fdt_setprop_string(blob, mac_node, "phy-mode", "rmii"); -+ mac_node = fdt_node_offset_by_compatible(blob, -1, mac_compat); -+ mdio_node = fdt_first_subnode(blob, mac_node); -+ lan_node = fdt_node_offset_by_compatible(blob, mdio_node, lan_compat); -+ fdt_setprop_string(blob, lan_node, "status", "okay"); -+ -+ return 0; -+} -+ -+static int dh_dt_patch_som(const void *fdt_blob) -+{ -+ int ret; -+ -+ /* Do nothing if not i.MX8MP DHCOM SoM */ -+ ret = fdt_node_check_compatible(fdt_blob, 0, "dh,imx8mp-dhcom-som"); -+ if (ret) -+ return 0; -+ -+ ret = dh_dt_patch_som_eqos(fdt_blob); -+ if (ret) -+ return ret; -+ -+ return dh_dt_patch_som_fec(fdt_blob); -+} -+ -+int fdtdec_board_setup(const void *fdt_blob) -+{ -+ return dh_dt_patch_som(fdt_blob); -+} -diff --git a/board/dhelectronics/dh_imx8mp/lpddr4_timing.h b/board/dhelectronics/dh_imx8mp/lpddr4_timing.h -index 6d496a970b..7894da3b91 100644 ---- a/board/dhelectronics/dh_imx8mp/lpddr4_timing.h -+++ b/board/dhelectronics/dh_imx8mp/lpddr4_timing.h -@@ -6,6 +6,7 @@ - #ifndef __LPDDR4_TIMING_H__ - #define __LPDDR4_TIMING_H__ - -+extern struct dram_timing_info dh_imx8mp_dhcom_dram_timing_16g_x32; - extern struct dram_timing_info dh_imx8mp_dhcom_dram_timing_32g_x32; - - u8 dh_get_memcfg(void); -diff --git a/board/dhelectronics/dh_imx8mp/lpddr4_timing_2G_32.c b/board/dhelectronics/dh_imx8mp/lpddr4_timing_2G_32.c -new file mode 100644 -index 0000000000..51b8c4cf7b ---- /dev/null -+++ b/board/dhelectronics/dh_imx8mp/lpddr4_timing_2G_32.c -@@ -0,0 +1,1845 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright 2022 Marek Vasut -+ * -+ * Generated code from MX8M_DDR_tool -+ */ -+ -+#include -+#include -+ -+static struct dram_cfg_param ddr_ddrc_cfg[] = { -+ /** Initialize DDRC registers **/ -+ { 0x3d400304, 0x1 }, -+ { 0x3d400030, 0x1 }, -+ { 0x3d400000, 0xa1080020 }, -+ { 0x3d400020, 0x1323 }, -+ { 0x3d400024, 0x1c79100 }, -+ { 0x3d400064, 0x710106 }, -+ { 0x3d400070, 0x7027f90 }, -+ { 0x3d400074, 0x790 }, -+ { 0x3d4000d0, 0xc0030720 }, -+ { 0x3d4000d4, 0xb80000 }, -+ { 0x3d4000dc, 0xe40036 }, -+ { 0x3d4000e0, 0x330000 }, -+ { 0x3d4000e8, 0x660048 }, -+ { 0x3d4000ec, 0x160048 }, -+ { 0x3d400100, 0x1e262028 }, -+ { 0x3d400104, 0x7073b }, -+ { 0x3d40010c, 0xe0e000 }, -+ { 0x3d400110, 0x11040a11 }, -+ { 0x3d400114, 0x2050e0e }, -+ { 0x3d400118, 0x1010008 }, -+ { 0x3d40011c, 0x502 }, -+ { 0x3d400130, 0x20700 }, -+ { 0x3d400134, 0xd100002 }, -+ { 0x3d400138, 0x10d }, -+ { 0x3d400144, 0xbb005e }, -+ { 0x3d400180, 0x3a5001c }, -+ { 0x3d400184, 0x2f071e5 }, -+ { 0x3d400188, 0x0 }, -+ { 0x3d400190, 0x49b820c }, -+ { 0x3d400194, 0x80303 }, -+ { 0x3d4001b4, 0x1b0c }, -+ { 0x3d4001a0, 0xe0400018 }, -+ { 0x3d4001a4, 0xdf00e4 }, -+ { 0x3d4001a8, 0x80000000 }, -+ { 0x3d4001b0, 0x11 }, -+ { 0x3d4001c0, 0x1 }, -+ { 0x3d4001c4, 0x1 }, -+ { 0x3d4000f4, 0x799 }, -+ { 0x3d400108, 0x810191a }, -+ { 0x3d400200, 0x1f }, -+ { 0x3d400208, 0x0 }, -+ { 0x3d40020c, 0x0 }, -+ { 0x3d400210, 0x1f1f }, -+ { 0x3d400204, 0x80808 }, -+ { 0x3d400214, 0x7070707 }, -+ { 0x3d400218, 0x7070707 }, -+ { 0x3d40021c, 0xf0f }, -+ { 0x3d400250, 0x1705 }, -+ { 0x3d400254, 0x2c }, -+ { 0x3d40025c, 0x4000030 }, -+ { 0x3d400264, 0x900093e7 }, -+ { 0x3d40026c, 0x2005574 }, -+ { 0x3d400400, 0x111 }, -+ { 0x3d400404, 0x72ff }, -+ { 0x3d400408, 0x72ff }, -+ { 0x3d400494, 0x2100e07 }, -+ { 0x3d400498, 0x620096 }, -+ { 0x3d40049c, 0x1100e07 }, -+ { 0x3d4004a0, 0xc8012c }, -+ { 0x3d402020, 0x1021 }, -+ { 0x3d402024, 0x30d400 }, -+ { 0x3d402050, 0x20d000 }, -+ { 0x3d402064, 0xc001c }, -+ { 0x3d4020dc, 0x840000 }, -+ { 0x3d4020e0, 0x330000 }, -+ { 0x3d4020e8, 0x660048 }, -+ { 0x3d4020ec, 0x160048 }, -+ { 0x3d402100, 0xa040305 }, -+ { 0x3d402104, 0x30407 }, -+ { 0x3d402108, 0x203060b }, -+ { 0x3d40210c, 0x505000 }, -+ { 0x3d402110, 0x2040202 }, -+ { 0x3d402114, 0x2030202 }, -+ { 0x3d402118, 0x1010004 }, -+ { 0x3d40211c, 0x302 }, -+ { 0x3d402130, 0x20300 }, -+ { 0x3d402134, 0xa100002 }, -+ { 0x3d402138, 0x1d }, -+ { 0x3d402144, 0x14000a }, -+ { 0x3d402180, 0x640004 }, -+ { 0x3d402190, 0x3818200 }, -+ { 0x3d402194, 0x80303 }, -+ { 0x3d4021b4, 0x100 }, -+ { 0x3d4020f4, 0x599 }, -+ { 0x3d403020, 0x1021 }, -+ { 0x3d403024, 0xc3500 }, -+ { 0x3d403050, 0x20d000 }, -+ { 0x3d403064, 0x30007 }, -+ { 0x3d4030dc, 0x840000 }, -+ { 0x3d4030e0, 0x330000 }, -+ { 0x3d4030e8, 0x660048 }, -+ { 0x3d4030ec, 0x160048 }, -+ { 0x3d403100, 0xa010102 }, -+ { 0x3d403104, 0x30404 }, -+ { 0x3d403108, 0x203060b }, -+ { 0x3d40310c, 0x505000 }, -+ { 0x3d403110, 0x2040202 }, -+ { 0x3d403114, 0x2030202 }, -+ { 0x3d403118, 0x1010004 }, -+ { 0x3d40311c, 0x302 }, -+ { 0x3d403130, 0x20300 }, -+ { 0x3d403134, 0xa100002 }, -+ { 0x3d403138, 0x8 }, -+ { 0x3d403144, 0x50003 }, -+ { 0x3d403180, 0x190004 }, -+ { 0x3d403190, 0x3818200 }, -+ { 0x3d403194, 0x80303 }, -+ { 0x3d4031b4, 0x100 }, -+ { 0x3d4030f4, 0x599 }, -+ { 0x3d400028, 0x0 }, -+}; -+ -+/* PHY Initialize Configuration */ -+static struct dram_cfg_param ddr_ddrphy_cfg[] = { -+ { 0x100a0, 0x0 }, -+ { 0x100a1, 0x1 }, -+ { 0x100a2, 0x2 }, -+ { 0x100a3, 0x3 }, -+ { 0x100a4, 0x4 }, -+ { 0x100a5, 0x5 }, -+ { 0x100a6, 0x6 }, -+ { 0x100a7, 0x7 }, -+ { 0x110a0, 0x0 }, -+ { 0x110a1, 0x1 }, -+ { 0x110a2, 0x3 }, -+ { 0x110a3, 0x4 }, -+ { 0x110a4, 0x5 }, -+ { 0x110a5, 0x2 }, -+ { 0x110a6, 0x7 }, -+ { 0x110a7, 0x6 }, -+ { 0x120a0, 0x0 }, -+ { 0x120a1, 0x1 }, -+ { 0x120a2, 0x3 }, -+ { 0x120a3, 0x2 }, -+ { 0x120a4, 0x5 }, -+ { 0x120a5, 0x4 }, -+ { 0x120a6, 0x7 }, -+ { 0x120a7, 0x6 }, -+ { 0x130a0, 0x0 }, -+ { 0x130a1, 0x1 }, -+ { 0x130a2, 0x2 }, -+ { 0x130a3, 0x3 }, -+ { 0x130a4, 0x4 }, -+ { 0x130a5, 0x5 }, -+ { 0x130a6, 0x6 }, -+ { 0x130a7, 0x7 }, -+ { 0x1005f, 0x1ff }, -+ { 0x1015f, 0x1ff }, -+ { 0x1105f, 0x1ff }, -+ { 0x1115f, 0x1ff }, -+ { 0x1205f, 0x1ff }, -+ { 0x1215f, 0x1ff }, -+ { 0x1305f, 0x1ff }, -+ { 0x1315f, 0x1ff }, -+ { 0x11005f, 0x1ff }, -+ { 0x11015f, 0x1ff }, -+ { 0x11105f, 0x1ff }, -+ { 0x11115f, 0x1ff }, -+ { 0x11205f, 0x1ff }, -+ { 0x11215f, 0x1ff }, -+ { 0x11305f, 0x1ff }, -+ { 0x11315f, 0x1ff }, -+ { 0x21005f, 0x1ff }, -+ { 0x21015f, 0x1ff }, -+ { 0x21105f, 0x1ff }, -+ { 0x21115f, 0x1ff }, -+ { 0x21205f, 0x1ff }, -+ { 0x21215f, 0x1ff }, -+ { 0x21305f, 0x1ff }, -+ { 0x21315f, 0x1ff }, -+ { 0x55, 0x1ff }, -+ { 0x1055, 0x1ff }, -+ { 0x2055, 0x1ff }, -+ { 0x3055, 0x1ff }, -+ { 0x4055, 0x1ff }, -+ { 0x5055, 0x1ff }, -+ { 0x6055, 0x1ff }, -+ { 0x7055, 0x1ff }, -+ { 0x8055, 0x1ff }, -+ { 0x9055, 0x1ff }, -+ { 0x200c5, 0x19 }, -+ { 0x1200c5, 0x7 }, -+ { 0x2200c5, 0x7 }, -+ { 0x2002e, 0x2 }, -+ { 0x12002e, 0x2 }, -+ { 0x22002e, 0x2 }, -+ { 0x90204, 0x0 }, -+ { 0x190204, 0x0 }, -+ { 0x290204, 0x0 }, -+ { 0x20024, 0x1e3 }, -+ { 0x2003a, 0x2 }, -+ { 0x120024, 0x1e3 }, -+ { 0x2003a, 0x2 }, -+ { 0x220024, 0x1e3 }, -+ { 0x2003a, 0x2 }, -+ { 0x20056, 0x3 }, -+ { 0x120056, 0x3 }, -+ { 0x220056, 0x3 }, -+ { 0x1004d, 0xe00 }, -+ { 0x1014d, 0xe00 }, -+ { 0x1104d, 0xe00 }, -+ { 0x1114d, 0xe00 }, -+ { 0x1204d, 0xe00 }, -+ { 0x1214d, 0xe00 }, -+ { 0x1304d, 0xe00 }, -+ { 0x1314d, 0xe00 }, -+ { 0x11004d, 0xe00 }, -+ { 0x11014d, 0xe00 }, -+ { 0x11104d, 0xe00 }, -+ { 0x11114d, 0xe00 }, -+ { 0x11204d, 0xe00 }, -+ { 0x11214d, 0xe00 }, -+ { 0x11304d, 0xe00 }, -+ { 0x11314d, 0xe00 }, -+ { 0x21004d, 0xe00 }, -+ { 0x21014d, 0xe00 }, -+ { 0x21104d, 0xe00 }, -+ { 0x21114d, 0xe00 }, -+ { 0x21204d, 0xe00 }, -+ { 0x21214d, 0xe00 }, -+ { 0x21304d, 0xe00 }, -+ { 0x21314d, 0xe00 }, -+ { 0x10049, 0xeba }, -+ { 0x10149, 0xeba }, -+ { 0x11049, 0xeba }, -+ { 0x11149, 0xeba }, -+ { 0x12049, 0xeba }, -+ { 0x12149, 0xeba }, -+ { 0x13049, 0xeba }, -+ { 0x13149, 0xeba }, -+ { 0x110049, 0xeba }, -+ { 0x110149, 0xeba }, -+ { 0x111049, 0xeba }, -+ { 0x111149, 0xeba }, -+ { 0x112049, 0xeba }, -+ { 0x112149, 0xeba }, -+ { 0x113049, 0xeba }, -+ { 0x113149, 0xeba }, -+ { 0x210049, 0xeba }, -+ { 0x210149, 0xeba }, -+ { 0x211049, 0xeba }, -+ { 0x211149, 0xeba }, -+ { 0x212049, 0xeba }, -+ { 0x212149, 0xeba }, -+ { 0x213049, 0xeba }, -+ { 0x213149, 0xeba }, -+ { 0x43, 0x63 }, -+ { 0x1043, 0x63 }, -+ { 0x2043, 0x63 }, -+ { 0x3043, 0x63 }, -+ { 0x4043, 0x63 }, -+ { 0x5043, 0x63 }, -+ { 0x6043, 0x63 }, -+ { 0x7043, 0x63 }, -+ { 0x8043, 0x63 }, -+ { 0x9043, 0x63 }, -+ { 0x20018, 0x3 }, -+ { 0x20075, 0x4 }, -+ { 0x20050, 0x0 }, -+ { 0x20008, 0x3a5 }, -+ { 0x120008, 0x64 }, -+ { 0x220008, 0x19 }, -+ { 0x20088, 0x9 }, -+ { 0x200b2, 0x104 }, -+ { 0x10043, 0x5a1 }, -+ { 0x10143, 0x5a1 }, -+ { 0x11043, 0x5a1 }, -+ { 0x11143, 0x5a1 }, -+ { 0x12043, 0x5a1 }, -+ { 0x12143, 0x5a1 }, -+ { 0x13043, 0x5a1 }, -+ { 0x13143, 0x5a1 }, -+ { 0x1200b2, 0x104 }, -+ { 0x110043, 0x5a1 }, -+ { 0x110143, 0x5a1 }, -+ { 0x111043, 0x5a1 }, -+ { 0x111143, 0x5a1 }, -+ { 0x112043, 0x5a1 }, -+ { 0x112143, 0x5a1 }, -+ { 0x113043, 0x5a1 }, -+ { 0x113143, 0x5a1 }, -+ { 0x2200b2, 0x104 }, -+ { 0x210043, 0x5a1 }, -+ { 0x210143, 0x5a1 }, -+ { 0x211043, 0x5a1 }, -+ { 0x211143, 0x5a1 }, -+ { 0x212043, 0x5a1 }, -+ { 0x212143, 0x5a1 }, -+ { 0x213043, 0x5a1 }, -+ { 0x213143, 0x5a1 }, -+ { 0x200fa, 0x1 }, -+ { 0x1200fa, 0x1 }, -+ { 0x2200fa, 0x1 }, -+ { 0x20019, 0x1 }, -+ { 0x120019, 0x1 }, -+ { 0x220019, 0x1 }, -+ { 0x200f0, 0x660 }, -+ { 0x200f1, 0x0 }, -+ { 0x200f2, 0x4444 }, -+ { 0x200f3, 0x8888 }, -+ { 0x200f4, 0x5665 }, -+ { 0x200f5, 0x0 }, -+ { 0x200f6, 0x0 }, -+ { 0x200f7, 0xf000 }, -+ { 0x20025, 0x0 }, -+ { 0x2002d, 0x0 }, -+ { 0x12002d, 0x0 }, -+ { 0x22002d, 0x0 }, -+ { 0x2007d, 0x212 }, -+ { 0x12007d, 0x212 }, -+ { 0x22007d, 0x212 }, -+ { 0x2007c, 0x61 }, -+ { 0x12007c, 0x61 }, -+ { 0x22007c, 0x61 }, -+ { 0x1004a, 0x500 }, -+ { 0x1104a, 0x500 }, -+ { 0x1204a, 0x500 }, -+ { 0x1304a, 0x500 }, -+ { 0x2002c, 0x0 }, -+}; -+ -+/* ddr phy trained csr */ -+static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { -+ { 0x200b2, 0x0 }, -+ { 0x1200b2, 0x0 }, -+ { 0x2200b2, 0x0 }, -+ { 0x200cb, 0x0 }, -+ { 0x10043, 0x0 }, -+ { 0x110043, 0x0 }, -+ { 0x210043, 0x0 }, -+ { 0x10143, 0x0 }, -+ { 0x110143, 0x0 }, -+ { 0x210143, 0x0 }, -+ { 0x11043, 0x0 }, -+ { 0x111043, 0x0 }, -+ { 0x211043, 0x0 }, -+ { 0x11143, 0x0 }, -+ { 0x111143, 0x0 }, -+ { 0x211143, 0x0 }, -+ { 0x12043, 0x0 }, -+ { 0x112043, 0x0 }, -+ { 0x212043, 0x0 }, -+ { 0x12143, 0x0 }, -+ { 0x112143, 0x0 }, -+ { 0x212143, 0x0 }, -+ { 0x13043, 0x0 }, -+ { 0x113043, 0x0 }, -+ { 0x213043, 0x0 }, -+ { 0x13143, 0x0 }, -+ { 0x113143, 0x0 }, -+ { 0x213143, 0x0 }, -+ { 0x80, 0x0 }, -+ { 0x100080, 0x0 }, -+ { 0x200080, 0x0 }, -+ { 0x1080, 0x0 }, -+ { 0x101080, 0x0 }, -+ { 0x201080, 0x0 }, -+ { 0x2080, 0x0 }, -+ { 0x102080, 0x0 }, -+ { 0x202080, 0x0 }, -+ { 0x3080, 0x0 }, -+ { 0x103080, 0x0 }, -+ { 0x203080, 0x0 }, -+ { 0x4080, 0x0 }, -+ { 0x104080, 0x0 }, -+ { 0x204080, 0x0 }, -+ { 0x5080, 0x0 }, -+ { 0x105080, 0x0 }, -+ { 0x205080, 0x0 }, -+ { 0x6080, 0x0 }, -+ { 0x106080, 0x0 }, -+ { 0x206080, 0x0 }, -+ { 0x7080, 0x0 }, -+ { 0x107080, 0x0 }, -+ { 0x207080, 0x0 }, -+ { 0x8080, 0x0 }, -+ { 0x108080, 0x0 }, -+ { 0x208080, 0x0 }, -+ { 0x9080, 0x0 }, -+ { 0x109080, 0x0 }, -+ { 0x209080, 0x0 }, -+ { 0x10080, 0x0 }, -+ { 0x110080, 0x0 }, -+ { 0x210080, 0x0 }, -+ { 0x10180, 0x0 }, -+ { 0x110180, 0x0 }, -+ { 0x210180, 0x0 }, -+ { 0x11080, 0x0 }, -+ { 0x111080, 0x0 }, -+ { 0x211080, 0x0 }, -+ { 0x11180, 0x0 }, -+ { 0x111180, 0x0 }, -+ { 0x211180, 0x0 }, -+ { 0x12080, 0x0 }, -+ { 0x112080, 0x0 }, -+ { 0x212080, 0x0 }, -+ { 0x12180, 0x0 }, -+ { 0x112180, 0x0 }, -+ { 0x212180, 0x0 }, -+ { 0x13080, 0x0 }, -+ { 0x113080, 0x0 }, -+ { 0x213080, 0x0 }, -+ { 0x13180, 0x0 }, -+ { 0x113180, 0x0 }, -+ { 0x213180, 0x0 }, -+ { 0x10081, 0x0 }, -+ { 0x110081, 0x0 }, -+ { 0x210081, 0x0 }, -+ { 0x10181, 0x0 }, -+ { 0x110181, 0x0 }, -+ { 0x210181, 0x0 }, -+ { 0x11081, 0x0 }, -+ { 0x111081, 0x0 }, -+ { 0x211081, 0x0 }, -+ { 0x11181, 0x0 }, -+ { 0x111181, 0x0 }, -+ { 0x211181, 0x0 }, -+ { 0x12081, 0x0 }, -+ { 0x112081, 0x0 }, -+ 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0x0 }, -+ { 0x120011, 0x0 }, -+ { 0x220011, 0x0 }, -+ { 0x100ae, 0x0 }, -+ { 0x1100ae, 0x0 }, -+ { 0x2100ae, 0x0 }, -+ { 0x100af, 0x0 }, -+ { 0x1100af, 0x0 }, -+ { 0x2100af, 0x0 }, -+ { 0x110ae, 0x0 }, -+ { 0x1110ae, 0x0 }, -+ { 0x2110ae, 0x0 }, -+ { 0x110af, 0x0 }, -+ { 0x1110af, 0x0 }, -+ { 0x2110af, 0x0 }, -+ { 0x120ae, 0x0 }, -+ { 0x1120ae, 0x0 }, -+ { 0x2120ae, 0x0 }, -+ { 0x120af, 0x0 }, -+ { 0x1120af, 0x0 }, -+ { 0x2120af, 0x0 }, -+ { 0x130ae, 0x0 }, -+ { 0x1130ae, 0x0 }, -+ { 0x2130ae, 0x0 }, -+ { 0x130af, 0x0 }, -+ { 0x1130af, 0x0 }, -+ { 0x2130af, 0x0 }, -+ { 0x20020, 0x0 }, -+ { 0x120020, 0x0 }, -+ { 0x220020, 0x0 }, -+ { 0x100a0, 0x0 }, -+ { 0x100a1, 0x0 }, -+ { 0x100a2, 0x0 }, -+ { 0x100a3, 0x0 }, -+ { 0x100a4, 0x0 }, -+ { 0x100a5, 0x0 }, -+ { 0x100a6, 0x0 }, -+ { 0x100a7, 0x0 }, -+ { 0x110a0, 0x0 }, -+ { 0x110a1, 0x0 }, -+ { 0x110a2, 0x0 }, -+ { 0x110a3, 0x0 }, -+ { 0x110a4, 0x0 }, -+ { 0x110a5, 0x0 }, -+ { 0x110a6, 0x0 }, -+ { 0x110a7, 0x0 }, -+ { 0x120a0, 0x0 }, -+ { 0x120a1, 0x0 }, -+ { 0x120a2, 0x0 }, -+ { 0x120a3, 0x0 }, -+ { 0x120a4, 0x0 }, -+ { 0x120a5, 0x0 }, -+ { 0x120a6, 0x0 }, -+ { 0x120a7, 0x0 }, -+ { 0x130a0, 0x0 }, -+ { 0x130a1, 0x0 }, -+ { 0x130a2, 0x0 }, -+ { 0x130a3, 0x0 }, -+ { 0x130a4, 0x0 }, -+ { 0x130a5, 0x0 }, -+ { 0x130a6, 0x0 }, -+ { 0x130a7, 0x0 }, -+ { 0x2007c, 0x0 }, -+ { 0x12007c, 0x0 }, -+ { 0x22007c, 0x0 }, -+ { 0x2007d, 0x0 }, -+ { 0x12007d, 0x0 }, -+ { 0x22007d, 0x0 }, -+ { 0x400fd, 0x0 }, -+ { 0x400c0, 0x0 }, -+ { 0x90201, 0x0 }, -+ { 0x190201, 0x0 }, -+ { 0x290201, 0x0 }, -+ { 0x90202, 0x0 }, -+ { 0x190202, 0x0 }, -+ { 0x290202, 0x0 }, -+ { 0x90203, 0x0 }, -+ { 0x190203, 0x0 }, -+ { 0x290203, 0x0 }, -+ { 0x90204, 0x0 }, -+ { 0x190204, 0x0 }, -+ { 0x290204, 0x0 }, -+ { 0x90205, 0x0 }, -+ { 0x190205, 0x0 }, -+ { 0x290205, 0x0 }, -+ { 0x90206, 0x0 }, -+ { 0x190206, 0x0 }, -+ { 0x290206, 0x0 }, -+ { 0x90207, 0x0 }, -+ { 0x190207, 0x0 }, -+ { 0x290207, 0x0 }, -+ { 0x90208, 0x0 }, -+ { 0x190208, 0x0 }, -+ { 0x290208, 0x0 }, -+ { 0x10062, 0x0 }, -+ { 0x10162, 0x0 }, -+ { 0x10262, 0x0 }, -+ { 0x10362, 0x0 }, -+ { 0x10462, 0x0 }, -+ { 0x10562, 0x0 }, -+ { 0x10662, 0x0 }, -+ { 0x10762, 0x0 }, -+ { 0x10862, 0x0 }, -+ { 0x11062, 0x0 }, -+ { 0x11162, 0x0 }, -+ { 0x11262, 0x0 }, -+ { 0x11362, 0x0 }, -+ { 0x11462, 0x0 }, -+ { 0x11562, 0x0 }, -+ { 0x11662, 0x0 }, -+ { 0x11762, 0x0 }, -+ { 0x11862, 0x0 }, -+ { 0x12062, 0x0 }, -+ { 0x12162, 0x0 }, -+ { 0x12262, 0x0 }, -+ { 0x12362, 0x0 }, -+ { 0x12462, 0x0 }, -+ { 0x12562, 0x0 }, -+ { 0x12662, 0x0 }, -+ { 0x12762, 0x0 }, -+ { 0x12862, 0x0 }, -+ { 0x13062, 0x0 }, -+ { 0x13162, 0x0 }, -+ { 0x13262, 0x0 }, -+ { 0x13362, 0x0 }, -+ { 0x13462, 0x0 }, -+ { 0x13562, 0x0 }, -+ { 0x13662, 0x0 }, -+ { 0x13762, 0x0 }, -+ { 0x13862, 0x0 }, -+ { 0x20077, 0x0 }, -+ { 0x10001, 0x0 }, -+ { 0x11001, 0x0 }, -+ { 0x12001, 0x0 }, -+ { 0x13001, 0x0 }, -+ { 0x10040, 0x0 }, -+ { 0x10140, 0x0 }, -+ { 0x10240, 0x0 }, -+ { 0x10340, 0x0 }, -+ { 0x10440, 0x0 }, -+ { 0x10540, 0x0 }, -+ { 0x10640, 0x0 }, -+ { 0x10740, 0x0 }, -+ { 0x10840, 0x0 }, -+ { 0x10030, 0x0 }, -+ { 0x10130, 0x0 }, -+ { 0x10230, 0x0 }, -+ { 0x10330, 0x0 }, -+ { 0x10430, 0x0 }, -+ { 0x10530, 0x0 }, -+ { 0x10630, 0x0 }, -+ { 0x10730, 0x0 }, -+ { 0x10830, 0x0 }, -+ { 0x11040, 0x0 }, -+ { 0x11140, 0x0 }, -+ { 0x11240, 0x0 }, -+ { 0x11340, 0x0 }, -+ { 0x11440, 0x0 }, -+ { 0x11540, 0x0 }, -+ { 0x11640, 0x0 }, -+ { 0x11740, 0x0 }, -+ { 0x11840, 0x0 }, -+ { 0x11030, 0x0 }, -+ { 0x11130, 0x0 }, -+ { 0x11230, 0x0 }, -+ { 0x11330, 0x0 }, -+ { 0x11430, 0x0 }, -+ { 0x11530, 0x0 }, -+ { 0x11630, 0x0 }, -+ { 0x11730, 0x0 }, -+ { 0x11830, 0x0 }, -+ { 0x12040, 0x0 }, -+ { 0x12140, 0x0 }, -+ { 0x12240, 0x0 }, -+ { 0x12340, 0x0 }, -+ { 0x12440, 0x0 }, -+ { 0x12540, 0x0 }, -+ { 0x12640, 0x0 }, -+ { 0x12740, 0x0 }, -+ { 0x12840, 0x0 }, -+ { 0x12030, 0x0 }, -+ { 0x12130, 0x0 }, -+ { 0x12230, 0x0 }, -+ { 0x12330, 0x0 }, -+ { 0x12430, 0x0 }, -+ { 0x12530, 0x0 }, -+ { 0x12630, 0x0 }, -+ { 0x12730, 0x0 }, -+ { 0x12830, 0x0 }, -+ { 0x13040, 0x0 }, -+ { 0x13140, 0x0 }, -+ { 0x13240, 0x0 }, -+ { 0x13340, 0x0 }, -+ { 0x13440, 0x0 }, -+ { 0x13540, 0x0 }, -+ { 0x13640, 0x0 }, -+ { 0x13740, 0x0 }, -+ { 0x13840, 0x0 }, -+ { 0x13030, 0x0 }, -+ { 0x13130, 0x0 }, -+ { 0x13230, 0x0 }, -+ { 0x13330, 0x0 }, -+ { 0x13430, 0x0 }, -+ { 0x13530, 0x0 }, -+ { 0x13630, 0x0 }, -+ { 0x13730, 0x0 }, -+ { 0x13830, 0x0 }, -+}; -+ -+/* P0 message block paremeter for training firmware */ -+static struct dram_cfg_param ddr_fsp0_cfg[] = { -+ { 0xd0000, 0x0 }, -+ { 0x54003, 0xe94 }, -+ { 0x54004, 0x2 }, -+ { 0x54005, 0x2228 }, -+ { 0x54006, 0x14 }, -+ { 0x54008, 0x131f }, -+ { 0x54009, 0xc8 }, -+ { 0x5400b, 0x2 }, -+ { 0x5400f, 0x100 }, -+ { 0x54012, 0x110 }, -+ { 0x54019, 0x36e4 }, -+ { 0x5401a, 0x33 }, -+ { 0x5401b, 0x4866 }, -+ { 0x5401c, 0x4800 }, -+ { 0x5401e, 0x16 }, -+ { 0x5401f, 0x36e4 }, -+ { 0x54020, 0x33 }, -+ { 0x54021, 0x4866 }, -+ { 0x54022, 0x4800 }, -+ { 0x54024, 0x16 }, -+ { 0x5402b, 0x1000 }, -+ { 0x5402c, 0x1 }, -+ { 0x54032, 0xe400 }, -+ { 0x54033, 0x3336 }, -+ { 0x54034, 0x6600 }, -+ { 0x54035, 0x48 }, -+ { 0x54036, 0x48 }, -+ { 0x54037, 0x1600 }, -+ { 0x54038, 0xe400 }, -+ { 0x54039, 0x3336 }, -+ { 0x5403a, 0x6600 }, -+ { 0x5403b, 0x48 }, -+ { 0x5403c, 0x48 }, -+ { 0x5403d, 0x1600 }, -+ { 0xd0000, 0x1 }, -+}; -+ -+/* P1 message block paremeter for training firmware */ -+static struct dram_cfg_param ddr_fsp1_cfg[] = { -+ { 0xd0000, 0x0 }, -+ { 0x54002, 0x101 }, -+ { 0x54003, 0x190 }, -+ { 0x54004, 0x2 }, -+ { 0x54005, 0x2228 }, -+ { 0x54006, 0x14 }, -+ { 0x54008, 0x121f }, -+ { 0x54009, 0xc8 }, -+ { 0x5400b, 0x2 }, -+ { 0x5400f, 0x100 }, -+ { 0x54012, 0x110 }, -+ { 0x54019, 0x84 }, -+ { 0x5401a, 0x33 }, -+ { 0x5401b, 0x4866 }, -+ { 0x5401c, 0x4800 }, -+ { 0x5401e, 0x16 }, -+ { 0x5401f, 0x84 }, -+ { 0x54020, 0x33 }, -+ { 0x54021, 0x4866 }, -+ { 0x54022, 0x4800 }, -+ { 0x54024, 0x16 }, -+ { 0x5402b, 0x1000 }, -+ { 0x5402c, 0x1 }, -+ { 0x54032, 0x8400 }, -+ { 0x54033, 0x3300 }, -+ { 0x54034, 0x6600 }, -+ { 0x54035, 0x48 }, -+ { 0x54036, 0x48 }, -+ { 0x54037, 0x1600 }, -+ { 0x54038, 0x8400 }, -+ { 0x54039, 0x3300 }, -+ { 0x5403a, 0x6600 }, -+ { 0x5403b, 0x48 }, -+ { 0x5403c, 0x48 }, -+ { 0x5403d, 0x1600 }, -+ { 0xd0000, 0x1 }, -+}; -+ -+/* P2 message block paremeter for training firmware */ -+static struct dram_cfg_param ddr_fsp2_cfg[] = { -+ { 0xd0000, 0x0 }, -+ { 0x54002, 0x102 }, -+ { 0x54003, 0x64 }, -+ { 0x54004, 0x2 }, -+ { 0x54005, 0x2228 }, -+ { 0x54006, 0x14 }, -+ { 0x54008, 0x121f }, -+ { 0x54009, 0xc8 }, -+ { 0x5400b, 0x2 }, -+ { 0x5400f, 0x100 }, -+ { 0x54012, 0x110 }, -+ { 0x54019, 0x84 }, -+ { 0x5401a, 0x33 }, -+ { 0x5401b, 0x4866 }, -+ { 0x5401c, 0x4800 }, -+ { 0x5401e, 0x16 }, -+ { 0x5401f, 0x84 }, -+ { 0x54020, 0x33 }, -+ { 0x54021, 0x4866 }, -+ { 0x54022, 0x4800 }, -+ { 0x54024, 0x16 }, -+ { 0x5402b, 0x1000 }, -+ { 0x5402c, 0x1 }, -+ { 0x54032, 0x8400 }, -+ { 0x54033, 0x3300 }, -+ { 0x54034, 0x6600 }, -+ { 0x54035, 0x48 }, -+ { 0x54036, 0x48 }, -+ { 0x54037, 0x1600 }, -+ { 0x54038, 0x8400 }, -+ { 0x54039, 0x3300 }, -+ { 0x5403a, 0x6600 }, -+ { 0x5403b, 0x48 }, -+ { 0x5403c, 0x48 }, -+ { 0x5403d, 0x1600 }, -+ { 0xd0000, 0x1 }, -+}; -+ -+/* P0 2D message block paremeter for training firmware */ -+static struct dram_cfg_param ddr_fsp0_2d_cfg[] = { -+ { 0xd0000, 0x0 }, -+ { 0x54003, 0xe94 }, -+ { 0x54004, 0x2 }, -+ { 0x54005, 0x2228 }, -+ { 0x54006, 0x14 }, -+ { 0x54008, 0x61 }, -+ { 0x54009, 0xc8 }, -+ { 0x5400b, 0x2 }, -+ { 0x5400f, 0x100 }, -+ { 0x54010, 0x1f7f }, -+ { 0x54012, 0x110 }, -+ { 0x54019, 0x36e4 }, -+ { 0x5401a, 0x33 }, -+ { 0x5401b, 0x4866 }, -+ { 0x5401c, 0x4800 }, -+ { 0x5401e, 0x16 }, -+ { 0x5401f, 0x36e4 }, -+ { 0x54020, 0x33 }, -+ { 0x54021, 0x4866 }, -+ { 0x54022, 0x4800 }, -+ { 0x54024, 0x16 }, -+ { 0x5402b, 0x1000 }, -+ { 0x5402c, 0x1 }, -+ { 0x54032, 0xe400 }, -+ { 0x54033, 0x3336 }, -+ { 0x54034, 0x6600 }, -+ { 0x54035, 0x48 }, -+ { 0x54036, 0x48 }, -+ { 0x54037, 0x1600 }, -+ { 0x54038, 0xe400 }, -+ { 0x54039, 0x3336 }, -+ { 0x5403a, 0x6600 }, -+ { 0x5403b, 0x48 }, -+ { 0x5403c, 0x48 }, -+ { 0x5403d, 0x1600 }, -+ { 0xd0000, 0x1 }, -+}; -+ -+/* DRAM PHY init engine image */ -+static struct dram_cfg_param ddr_phy_pie[] = { -+ { 0xd0000, 0x0 }, -+ { 0x90000, 0x10 }, -+ { 0x90001, 0x400 }, -+ { 0x90002, 0x10e }, -+ { 0x90003, 0x0 }, -+ { 0x90004, 0x0 }, -+ { 0x90005, 0x8 }, -+ { 0x90029, 0xb }, -+ { 0x9002a, 0x480 }, -+ { 0x9002b, 0x109 }, -+ { 0x9002c, 0x8 }, -+ { 0x9002d, 0x448 }, -+ { 0x9002e, 0x139 }, -+ { 0x9002f, 0x8 }, -+ { 0x90030, 0x478 }, -+ { 0x90031, 0x109 }, -+ { 0x90032, 0x0 }, -+ { 0x90033, 0xe8 }, -+ { 0x90034, 0x109 }, -+ { 0x90035, 0x2 }, -+ { 0x90036, 0x10 }, -+ { 0x90037, 0x139 }, -+ { 0x90038, 0xb }, -+ { 0x90039, 0x7c0 }, -+ { 0x9003a, 0x139 }, -+ { 0x9003b, 0x44 }, -+ { 0x9003c, 0x633 }, -+ { 0x9003d, 0x159 }, -+ { 0x9003e, 0x14f }, -+ { 0x9003f, 0x630 }, -+ { 0x90040, 0x159 }, -+ { 0x90041, 0x47 }, -+ { 0x90042, 0x633 }, -+ { 0x90043, 0x149 }, -+ { 0x90044, 0x4f }, -+ { 0x90045, 0x633 }, -+ { 0x90046, 0x179 }, -+ { 0x90047, 0x8 }, -+ { 0x90048, 0xe0 }, -+ { 0x90049, 0x109 }, -+ { 0x9004a, 0x0 }, -+ { 0x9004b, 0x7c8 }, -+ { 0x9004c, 0x109 }, -+ { 0x9004d, 0x0 }, -+ { 0x9004e, 0x1 }, -+ { 0x9004f, 0x8 }, -+ { 0x90050, 0x0 }, -+ { 0x90051, 0x45a }, -+ { 0x90052, 0x9 }, -+ { 0x90053, 0x0 }, -+ { 0x90054, 0x448 }, -+ { 0x90055, 0x109 }, -+ { 0x90056, 0x40 }, -+ { 0x90057, 0x633 }, -+ { 0x90058, 0x179 }, -+ { 0x90059, 0x1 }, -+ { 0x9005a, 0x618 }, -+ { 0x9005b, 0x109 }, -+ { 0x9005c, 0x40c0 }, -+ { 0x9005d, 0x633 }, -+ { 0x9005e, 0x149 }, -+ { 0x9005f, 0x8 }, -+ { 0x90060, 0x4 }, -+ { 0x90061, 0x48 }, -+ { 0x90062, 0x4040 }, -+ { 0x90063, 0x633 }, -+ { 0x90064, 0x149 }, -+ { 0x90065, 0x0 }, -+ { 0x90066, 0x4 }, -+ { 0x90067, 0x48 }, -+ { 0x90068, 0x40 }, -+ { 0x90069, 0x633 }, -+ { 0x9006a, 0x149 }, -+ { 0x9006b, 0x10 }, -+ { 0x9006c, 0x4 }, -+ { 0x9006d, 0x18 }, -+ { 0x9006e, 0x0 }, -+ { 0x9006f, 0x4 }, -+ { 0x90070, 0x78 }, -+ { 0x90071, 0x549 }, -+ { 0x90072, 0x633 }, -+ { 0x90073, 0x159 }, -+ { 0x90074, 0xd49 }, -+ { 0x90075, 0x633 }, -+ { 0x90076, 0x159 }, -+ { 0x90077, 0x94a }, -+ { 0x90078, 0x633 }, -+ { 0x90079, 0x159 }, -+ { 0x9007a, 0x441 }, -+ { 0x9007b, 0x633 }, -+ { 0x9007c, 0x149 }, -+ { 0x9007d, 0x42 }, -+ { 0x9007e, 0x633 }, -+ { 0x9007f, 0x149 }, -+ { 0x90080, 0x1 }, -+ { 0x90081, 0x633 }, -+ { 0x90082, 0x149 }, -+ { 0x90083, 0x0 }, -+ { 0x90084, 0xe0 }, -+ { 0x90085, 0x109 }, -+ { 0x90086, 0xa }, -+ { 0x90087, 0x10 }, -+ { 0x90088, 0x109 }, -+ { 0x90089, 0x9 }, -+ { 0x9008a, 0x3c0 }, -+ { 0x9008b, 0x149 }, -+ { 0x9008c, 0x9 }, -+ { 0x9008d, 0x3c0 }, -+ { 0x9008e, 0x159 }, -+ { 0x9008f, 0x18 }, -+ { 0x90090, 0x10 }, -+ { 0x90091, 0x109 }, -+ { 0x90092, 0x0 }, -+ { 0x90093, 0x3c0 }, -+ { 0x90094, 0x109 }, -+ { 0x90095, 0x18 }, -+ { 0x90096, 0x4 }, -+ { 0x90097, 0x48 }, -+ { 0x90098, 0x18 }, -+ { 0x90099, 0x4 }, -+ { 0x9009a, 0x58 }, -+ { 0x9009b, 0xb }, -+ { 0x9009c, 0x10 }, -+ { 0x9009d, 0x109 }, -+ { 0x9009e, 0x1 }, -+ { 0x9009f, 0x10 }, -+ { 0x900a0, 0x109 }, -+ { 0x900a1, 0x5 }, -+ { 0x900a2, 0x7c0 }, -+ { 0x900a3, 0x109 }, -+ { 0x40000, 0x811 }, -+ { 0x40020, 0x880 }, -+ { 0x40040, 0x0 }, -+ { 0x40060, 0x0 }, -+ { 0x40001, 0x4008 }, -+ { 0x40021, 0x83 }, -+ { 0x40041, 0x4f }, -+ { 0x40061, 0x0 }, -+ { 0x40002, 0x4040 }, -+ { 0x40022, 0x83 }, -+ { 0x40042, 0x51 }, -+ { 0x40062, 0x0 }, -+ { 0x40003, 0x811 }, -+ { 0x40023, 0x880 }, -+ { 0x40043, 0x0 }, -+ { 0x40063, 0x0 }, -+ { 0x40004, 0x720 }, -+ { 0x40024, 0xf }, -+ { 0x40044, 0x1740 }, -+ { 0x40064, 0x0 }, -+ { 0x40005, 0x16 }, -+ { 0x40025, 0x83 }, -+ { 0x40045, 0x4b }, -+ { 0x40065, 0x0 }, -+ { 0x40006, 0x716 }, -+ { 0x40026, 0xf }, -+ { 0x40046, 0x2001 }, -+ { 0x40066, 0x0 }, -+ { 0x40007, 0x716 }, -+ { 0x40027, 0xf }, -+ { 0x40047, 0x2800 }, -+ { 0x40067, 0x0 }, -+ { 0x40008, 0x716 }, -+ { 0x40028, 0xf }, -+ { 0x40048, 0xf00 }, -+ { 0x40068, 0x0 }, -+ { 0x40009, 0x720 }, -+ { 0x40029, 0xf }, -+ { 0x40049, 0x1400 }, -+ { 0x40069, 0x0 }, -+ { 0x4000a, 0xe08 }, -+ { 0x4002a, 0xc15 }, -+ { 0x4004a, 0x0 }, -+ { 0x4006a, 0x0 }, -+ { 0x4000b, 0x625 }, -+ { 0x4002b, 0x15 }, -+ { 0x4004b, 0x0 }, -+ { 0x4006b, 0x0 }, -+ { 0x4000c, 0x4028 }, -+ { 0x4002c, 0x80 }, -+ { 0x4004c, 0x0 }, -+ { 0x4006c, 0x0 }, -+ { 0x4000d, 0xe08 }, -+ { 0x4002d, 0xc1a }, -+ { 0x4004d, 0x0 }, -+ { 0x4006d, 0x0 }, -+ { 0x4000e, 0x625 }, -+ { 0x4002e, 0x1a }, -+ { 0x4004e, 0x0 }, -+ { 0x4006e, 0x0 }, -+ { 0x4000f, 0x4040 }, -+ { 0x4002f, 0x80 }, -+ { 0x4004f, 0x0 }, -+ { 0x4006f, 0x0 }, -+ { 0x40010, 0x2604 }, -+ { 0x40030, 0x15 }, -+ { 0x40050, 0x0 }, -+ { 0x40070, 0x0 }, -+ { 0x40011, 0x708 }, -+ { 0x40031, 0x5 }, -+ { 0x40051, 0x0 }, -+ { 0x40071, 0x2002 }, -+ { 0x40012, 0x8 }, -+ { 0x40032, 0x80 }, -+ { 0x40052, 0x0 }, -+ { 0x40072, 0x0 }, -+ { 0x40013, 0x2604 }, -+ { 0x40033, 0x1a }, -+ { 0x40053, 0x0 }, -+ { 0x40073, 0x0 }, -+ { 0x40014, 0x708 }, -+ { 0x40034, 0xa }, -+ { 0x40054, 0x0 }, -+ { 0x40074, 0x2002 }, -+ { 0x40015, 0x4040 }, -+ { 0x40035, 0x80 }, -+ { 0x40055, 0x0 }, -+ { 0x40075, 0x0 }, -+ { 0x40016, 0x60a }, -+ { 0x40036, 0x15 }, -+ { 0x40056, 0x1200 }, -+ { 0x40076, 0x0 }, -+ { 0x40017, 0x61a }, -+ { 0x40037, 0x15 }, -+ { 0x40057, 0x1300 }, -+ { 0x40077, 0x0 }, -+ { 0x40018, 0x60a }, -+ { 0x40038, 0x1a }, -+ { 0x40058, 0x1200 }, -+ { 0x40078, 0x0 }, -+ { 0x40019, 0x642 }, -+ { 0x40039, 0x1a }, -+ { 0x40059, 0x1300 }, -+ { 0x40079, 0x0 }, -+ { 0x4001a, 0x4808 }, -+ { 0x4003a, 0x880 }, -+ { 0x4005a, 0x0 }, -+ { 0x4007a, 0x0 }, -+ { 0x900a4, 0x0 }, -+ { 0x900a5, 0x790 }, -+ { 0x900a6, 0x11a }, -+ { 0x900a7, 0x8 }, -+ { 0x900a8, 0x7aa }, -+ { 0x900a9, 0x2a }, -+ { 0x900aa, 0x10 }, -+ { 0x900ab, 0x7b2 }, -+ { 0x900ac, 0x2a }, -+ { 0x900ad, 0x0 }, -+ { 0x900ae, 0x7c8 }, -+ { 0x900af, 0x109 }, -+ { 0x900b0, 0x10 }, -+ { 0x900b1, 0x10 }, -+ { 0x900b2, 0x109 }, -+ { 0x900b3, 0x10 }, -+ { 0x900b4, 0x2a8 }, -+ { 0x900b5, 0x129 }, -+ { 0x900b6, 0x8 }, -+ { 0x900b7, 0x370 }, -+ { 0x900b8, 0x129 }, -+ { 0x900b9, 0xa }, -+ { 0x900ba, 0x3c8 }, -+ { 0x900bb, 0x1a9 }, -+ { 0x900bc, 0xc }, -+ { 0x900bd, 0x408 }, -+ { 0x900be, 0x199 }, -+ { 0x900bf, 0x14 }, -+ { 0x900c0, 0x790 }, -+ { 0x900c1, 0x11a }, -+ { 0x900c2, 0x8 }, -+ { 0x900c3, 0x4 }, -+ { 0x900c4, 0x18 }, -+ { 0x900c5, 0xe }, -+ { 0x900c6, 0x408 }, -+ { 0x900c7, 0x199 }, -+ { 0x900c8, 0x8 }, -+ { 0x900c9, 0x8568 }, -+ { 0x900ca, 0x108 }, -+ { 0x900cb, 0x18 }, -+ { 0x900cc, 0x790 }, -+ { 0x900cd, 0x16a }, -+ { 0x900ce, 0x8 }, -+ { 0x900cf, 0x1d8 }, -+ { 0x900d0, 0x169 }, -+ { 0x900d1, 0x10 }, -+ { 0x900d2, 0x8558 }, -+ { 0x900d3, 0x168 }, -+ { 0x900d4, 0x70 }, -+ { 0x900d5, 0x788 }, -+ { 0x900d6, 0x16a }, -+ { 0x900d7, 0x1ff8 }, -+ { 0x900d8, 0x85a8 }, -+ { 0x900d9, 0x1e8 }, -+ { 0x900da, 0x50 }, -+ { 0x900db, 0x798 }, -+ { 0x900dc, 0x16a }, -+ { 0x900dd, 0x60 }, -+ { 0x900de, 0x7a0 }, -+ { 0x900df, 0x16a }, -+ { 0x900e0, 0x8 }, -+ { 0x900e1, 0x8310 }, -+ { 0x900e2, 0x168 }, -+ { 0x900e3, 0x8 }, -+ { 0x900e4, 0xa310 }, -+ { 0x900e5, 0x168 }, -+ { 0x900e6, 0xa }, -+ { 0x900e7, 0x408 }, -+ { 0x900e8, 0x169 }, -+ { 0x900e9, 0x6e }, -+ { 0x900ea, 0x0 }, -+ { 0x900eb, 0x68 }, -+ { 0x900ec, 0x0 }, -+ { 0x900ed, 0x408 }, -+ { 0x900ee, 0x169 }, -+ { 0x900ef, 0x0 }, -+ { 0x900f0, 0x8310 }, -+ { 0x900f1, 0x168 }, -+ { 0x900f2, 0x0 }, -+ { 0x900f3, 0xa310 }, -+ { 0x900f4, 0x168 }, -+ { 0x900f5, 0x1ff8 }, -+ { 0x900f6, 0x85a8 }, -+ { 0x900f7, 0x1e8 }, -+ { 0x900f8, 0x68 }, -+ { 0x900f9, 0x798 }, -+ { 0x900fa, 0x16a }, -+ { 0x900fb, 0x78 }, -+ { 0x900fc, 0x7a0 }, -+ { 0x900fd, 0x16a }, -+ { 0x900fe, 0x68 }, -+ { 0x900ff, 0x790 }, -+ { 0x90100, 0x16a }, -+ { 0x90101, 0x8 }, -+ { 0x90102, 0x8b10 }, -+ { 0x90103, 0x168 }, -+ { 0x90104, 0x8 }, -+ { 0x90105, 0xab10 }, -+ { 0x90106, 0x168 }, -+ { 0x90107, 0xa }, -+ { 0x90108, 0x408 }, -+ { 0x90109, 0x169 }, -+ { 0x9010a, 0x58 }, -+ { 0x9010b, 0x0 }, -+ { 0x9010c, 0x68 }, -+ { 0x9010d, 0x0 }, -+ { 0x9010e, 0x408 }, -+ { 0x9010f, 0x169 }, -+ { 0x90110, 0x0 }, -+ { 0x90111, 0x8b10 }, -+ { 0x90112, 0x168 }, -+ { 0x90113, 0x1 }, -+ { 0x90114, 0xab10 }, -+ { 0x90115, 0x168 }, -+ { 0x90116, 0x0 }, -+ { 0x90117, 0x1d8 }, -+ { 0x90118, 0x169 }, -+ { 0x90119, 0x80 }, -+ { 0x9011a, 0x790 }, -+ { 0x9011b, 0x16a }, -+ { 0x9011c, 0x18 }, -+ { 0x9011d, 0x7aa }, -+ { 0x9011e, 0x6a }, -+ { 0x9011f, 0xa }, -+ { 0x90120, 0x0 }, -+ { 0x90121, 0x1e9 }, -+ { 0x90122, 0x8 }, -+ { 0x90123, 0x8080 }, -+ { 0x90124, 0x108 }, -+ { 0x90125, 0xf }, -+ { 0x90126, 0x408 }, -+ { 0x90127, 0x169 }, -+ { 0x90128, 0xc }, -+ { 0x90129, 0x0 }, -+ { 0x9012a, 0x68 }, -+ { 0x9012b, 0x9 }, -+ { 0x9012c, 0x0 }, -+ { 0x9012d, 0x1a9 }, -+ { 0x9012e, 0x0 }, -+ { 0x9012f, 0x408 }, -+ { 0x90130, 0x169 }, -+ { 0x90131, 0x0 }, -+ { 0x90132, 0x8080 }, -+ { 0x90133, 0x108 }, -+ { 0x90134, 0x8 }, -+ { 0x90135, 0x7aa }, -+ { 0x90136, 0x6a }, -+ { 0x90137, 0x0 }, -+ { 0x90138, 0x8568 }, -+ { 0x90139, 0x108 }, -+ { 0x9013a, 0xb7 }, -+ { 0x9013b, 0x790 }, -+ { 0x9013c, 0x16a }, -+ { 0x9013d, 0x1f }, -+ { 0x9013e, 0x0 }, -+ { 0x9013f, 0x68 }, -+ { 0x90140, 0x8 }, -+ { 0x90141, 0x8558 }, -+ { 0x90142, 0x168 }, -+ { 0x90143, 0xf }, -+ { 0x90144, 0x408 }, -+ { 0x90145, 0x169 }, -+ { 0x90146, 0xd }, -+ { 0x90147, 0x0 }, -+ { 0x90148, 0x68 }, -+ { 0x90149, 0x0 }, -+ { 0x9014a, 0x408 }, -+ { 0x9014b, 0x169 }, -+ { 0x9014c, 0x0 }, -+ { 0x9014d, 0x8558 }, -+ { 0x9014e, 0x168 }, -+ { 0x9014f, 0x8 }, -+ { 0x90150, 0x3c8 }, -+ { 0x90151, 0x1a9 }, -+ { 0x90152, 0x3 }, -+ { 0x90153, 0x370 }, -+ { 0x90154, 0x129 }, -+ { 0x90155, 0x20 }, -+ { 0x90156, 0x2aa }, -+ { 0x90157, 0x9 }, -+ { 0x90158, 0x8 }, -+ { 0x90159, 0xe8 }, -+ { 0x9015a, 0x109 }, -+ { 0x9015b, 0x0 }, -+ { 0x9015c, 0x8140 }, -+ { 0x9015d, 0x10c }, -+ { 0x9015e, 0x10 }, -+ { 0x9015f, 0x8138 }, -+ { 0x90160, 0x104 }, -+ { 0x90161, 0x8 }, -+ { 0x90162, 0x448 }, -+ { 0x90163, 0x109 }, -+ { 0x90164, 0xf }, -+ { 0x90165, 0x7c0 }, -+ { 0x90166, 0x109 }, -+ { 0x90167, 0x0 }, -+ { 0x90168, 0xe8 }, -+ { 0x90169, 0x109 }, -+ { 0x9016a, 0x47 }, -+ { 0x9016b, 0x630 }, -+ { 0x9016c, 0x109 }, -+ { 0x9016d, 0x8 }, -+ { 0x9016e, 0x618 }, -+ { 0x9016f, 0x109 }, -+ { 0x90170, 0x8 }, -+ { 0x90171, 0xe0 }, -+ { 0x90172, 0x109 }, -+ { 0x90173, 0x0 }, -+ { 0x90174, 0x7c8 }, -+ { 0x90175, 0x109 }, -+ { 0x90176, 0x8 }, -+ { 0x90177, 0x8140 }, -+ { 0x90178, 0x10c }, -+ { 0x90179, 0x0 }, -+ { 0x9017a, 0x478 }, -+ { 0x9017b, 0x109 }, -+ { 0x9017c, 0x0 }, -+ { 0x9017d, 0x1 }, -+ { 0x9017e, 0x8 }, -+ { 0x9017f, 0x8 }, -+ { 0x90180, 0x4 }, -+ { 0x90181, 0x0 }, -+ { 0x90006, 0x8 }, -+ { 0x90007, 0x7c8 }, -+ { 0x90008, 0x109 }, -+ { 0x90009, 0x0 }, -+ { 0x9000a, 0x400 }, -+ { 0x9000b, 0x106 }, -+ { 0xd00e7, 0x400 }, -+ { 0x90017, 0x0 }, -+ { 0x9001f, 0x29 }, -+ { 0x90026, 0x68 }, -+ { 0x400d0, 0x0 }, -+ { 0x400d1, 0x101 }, -+ { 0x400d2, 0x105 }, -+ { 0x400d3, 0x107 }, -+ { 0x400d4, 0x10f }, -+ { 0x400d5, 0x202 }, -+ { 0x400d6, 0x20a }, -+ { 0x400d7, 0x20b }, -+ { 0x2003a, 0x2 }, -+ { 0x200be, 0x3 }, -+ { 0x2000b, 0x419 }, -+ { 0x2000c, 0xe9 }, -+ { 0x2000d, 0x91c }, -+ { 0x2000e, 0x2c }, -+ { 0x12000b, 0x70 }, -+ { 0x12000c, 0x19 }, -+ { 0x12000d, 0xfa }, -+ { 0x12000e, 0x10 }, -+ { 0x22000b, 0x1c }, -+ { 0x22000c, 0x6 }, -+ { 0x22000d, 0x3e }, -+ { 0x22000e, 0x10 }, -+ { 0x9000c, 0x0 }, -+ { 0x9000d, 0x173 }, -+ { 0x9000e, 0x60 }, -+ { 0x9000f, 0x6110 }, -+ { 0x90010, 0x2152 }, -+ { 0x90011, 0xdfbd }, -+ { 0x90012, 0x2060 }, -+ { 0x90013, 0x6152 }, -+ { 0x20010, 0x5a }, -+ { 0x20011, 0x3 }, -+ { 0x40080, 0xe0 }, -+ { 0x40081, 0x12 }, -+ { 0x40082, 0xe0 }, -+ { 0x40083, 0x12 }, -+ { 0x40084, 0xe0 }, -+ { 0x40085, 0x12 }, -+ { 0x140080, 0xe0 }, -+ { 0x140081, 0x12 }, -+ { 0x140082, 0xe0 }, -+ { 0x140083, 0x12 }, -+ { 0x140084, 0xe0 }, -+ { 0x140085, 0x12 }, -+ { 0x240080, 0xe0 }, -+ { 0x240081, 0x12 }, -+ { 0x240082, 0xe0 }, -+ { 0x240083, 0x12 }, -+ { 0x240084, 0xe0 }, -+ { 0x240085, 0x12 }, -+ { 0x400fd, 0xf }, -+ { 0x10011, 0x1 }, -+ { 0x10012, 0x1 }, -+ { 0x10013, 0x180 }, -+ { 0x10018, 0x1 }, -+ { 0x10002, 0x6209 }, -+ { 0x100b2, 0x1 }, -+ { 0x101b4, 0x1 }, -+ { 0x102b4, 0x1 }, -+ { 0x103b4, 0x1 }, -+ { 0x104b4, 0x1 }, -+ { 0x105b4, 0x1 }, -+ { 0x106b4, 0x1 }, -+ { 0x107b4, 0x1 }, -+ { 0x108b4, 0x1 }, -+ { 0x11011, 0x1 }, -+ { 0x11012, 0x1 }, -+ { 0x11013, 0x180 }, -+ { 0x11018, 0x1 }, -+ { 0x11002, 0x6209 }, -+ { 0x110b2, 0x1 }, -+ { 0x111b4, 0x1 }, -+ { 0x112b4, 0x1 }, -+ { 0x113b4, 0x1 }, -+ { 0x114b4, 0x1 }, -+ { 0x115b4, 0x1 }, -+ { 0x116b4, 0x1 }, -+ { 0x117b4, 0x1 }, -+ { 0x118b4, 0x1 }, -+ { 0x12011, 0x1 }, -+ { 0x12012, 0x1 }, -+ { 0x12013, 0x180 }, -+ { 0x12018, 0x1 }, -+ { 0x12002, 0x6209 }, -+ { 0x120b2, 0x1 }, -+ { 0x121b4, 0x1 }, -+ { 0x122b4, 0x1 }, -+ { 0x123b4, 0x1 }, -+ { 0x124b4, 0x1 }, -+ { 0x125b4, 0x1 }, -+ { 0x126b4, 0x1 }, -+ { 0x127b4, 0x1 }, -+ { 0x128b4, 0x1 }, -+ { 0x13011, 0x1 }, -+ { 0x13012, 0x1 }, -+ { 0x13013, 0x180 }, -+ { 0x13018, 0x1 }, -+ { 0x13002, 0x6209 }, -+ { 0x130b2, 0x1 }, -+ { 0x131b4, 0x1 }, -+ { 0x132b4, 0x1 }, -+ { 0x133b4, 0x1 }, -+ { 0x134b4, 0x1 }, -+ { 0x135b4, 0x1 }, -+ { 0x136b4, 0x1 }, -+ { 0x137b4, 0x1 }, -+ { 0x138b4, 0x1 }, -+ { 0x20089, 0x1 }, -+ { 0x20088, 0x19 }, -+ { 0xc0080, 0x2 }, -+ { 0xd0000, 0x1 } -+}; -+ -+static struct dram_fsp_msg ddr_dram_fsp_msg[] = { -+ { -+ /* P0 3733mts 1D */ -+ .drate = 3733, -+ .fw_type = FW_1D_IMAGE, -+ .fsp_cfg = ddr_fsp0_cfg, -+ .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), -+ }, -+ { -+ /* P1 400mts 1D */ -+ .drate = 400, -+ .fw_type = FW_1D_IMAGE, -+ .fsp_cfg = ddr_fsp1_cfg, -+ .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), -+ }, -+ { -+ /* P2 100mts 1D */ -+ .drate = 100, -+ .fw_type = FW_1D_IMAGE, -+ .fsp_cfg = ddr_fsp2_cfg, -+ .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), -+ }, -+ { -+ /* P0 3733mts 2D */ -+ .drate = 3733, -+ .fw_type = FW_2D_IMAGE, -+ .fsp_cfg = ddr_fsp0_2d_cfg, -+ .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), -+ }, -+}; -+ -+/* ddr timing config params */ -+struct dram_timing_info dh_imx8mp_dhcom_dram_timing_16g_x32 = { -+ .ddrc_cfg = ddr_ddrc_cfg, -+ .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), -+ .ddrphy_cfg = ddr_ddrphy_cfg, -+ .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), -+ .fsp_msg = ddr_dram_fsp_msg, -+ .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), -+ .ddrphy_trained_csr = ddr_ddrphy_trained_csr, -+ .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), -+ .ddrphy_pie = ddr_phy_pie, -+ .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), -+ .fsp_table = { 3733, 400, 100, }, -+}; -diff --git a/board/dhelectronics/dh_imx8mp/spl.c b/board/dhelectronics/dh_imx8mp/spl.c -index 95de74556a..e2aa874723 100644 ---- a/board/dhelectronics/dh_imx8mp/spl.c -+++ b/board/dhelectronics/dh_imx8mp/spl.c -@@ -99,7 +99,7 @@ static struct dram_timing_info *dram_timing_info[8] = { - NULL, /* 512 MiB */ - NULL, /* 1024 MiB */ - NULL, /* 1536 MiB */ -- NULL, /* 2048 MiB */ -+ &dh_imx8mp_dhcom_dram_timing_16g_x32, /* 2048 MiB */ - NULL, /* 3072 MiB */ - &dh_imx8mp_dhcom_dram_timing_32g_x32, /* 4096 MiB */ - NULL, /* 6144 MiB */ -diff --git a/board/engicam/imx8mm/icore_mx8mm.c b/board/engicam/imx8mm/icore_mx8mm.c -index 4f7c699d7d..320388faae 100644 ---- a/board/engicam/imx8mm/icore_mx8mm.c -+++ b/board/engicam/imx8mm/icore_mx8mm.c -@@ -29,7 +29,7 @@ static iomux_v3_cfg_t const fec1_rst_pads[] = { - IMX8MM_PAD_NAND_DATA01_GPIO3_IO7 | MUX_PAD_CTRL(NO_PAD_CTRL), - }; - --static void setup_iomux_fec(void) -+static void setup_fec(void) - { - imx_iomux_v3_setup_multiple_pads(fec1_rst_pads, - ARRAY_SIZE(fec1_rst_pads)); -@@ -40,19 +40,6 @@ static void setup_iomux_fec(void) - gpio_direction_output(FEC_RST_PAD, 1); - } - --static int setup_fec(void) --{ -- struct iomuxc_gpr_base_regs *gpr = -- (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; -- -- setup_iomux_fec(); -- -- /* Use 125M anatop REF_CLK1 for ENET1, not from external */ -- clrsetbits_le32(&gpr->gpr[1], 13, 0); -- -- return set_clk_enet(ENET_125MHZ); --} -- - int board_phy_config(struct phy_device *phydev) - { - /* enable rgmii rxc skew and phy mode select to RGMII copper */ -diff --git a/board/engicam/imx8mp/icore_mx8mp.c b/board/engicam/imx8mp/icore_mx8mp.c -index 500080c7cf..5f820cc8dd 100644 ---- a/board/engicam/imx8mp/icore_mx8mp.c -+++ b/board/engicam/imx8mp/icore_mx8mp.c -@@ -34,19 +34,6 @@ static void setup_fec(void) - setbits_le32(&gpr->gpr[1], BIT(22)); - } - --static int setup_eqos(void) --{ -- struct iomuxc_gpr_base_regs *gpr = -- (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; -- -- /* set INTF as RGMII, enable RGMII TXC clock */ -- clrsetbits_le32(&gpr->gpr[1], -- IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MASK, BIT(16)); -- setbits_le32(&gpr->gpr[1], BIT(19) | BIT(21)); -- -- return set_clk_eqos(ENET_125MHZ); --} -- - #if CONFIG_IS_ENABLED(NET) - int board_phy_config(struct phy_device *phydev) - { -@@ -61,9 +48,6 @@ int board_init(void) - if (IS_ENABLED(CONFIG_FEC_MXC)) - setup_fec(); - -- if (IS_ENABLED(CONFIG_DWC_ETH_QOS)) -- setup_eqos(); -- - return 0; - } - -diff --git a/board/freescale/imx8mp_evk/imx8mp_evk.c b/board/freescale/imx8mp_evk/imx8mp_evk.c -index ce211d486a..a24b8c1d86 100644 ---- a/board/freescale/imx8mp_evk/imx8mp_evk.c -+++ b/board/freescale/imx8mp_evk/imx8mp_evk.c -@@ -29,19 +29,6 @@ static void setup_fec(void) - setbits_le32(&gpr->gpr[1], BIT(22)); - } - --static int setup_eqos(void) --{ -- struct iomuxc_gpr_base_regs *gpr = -- (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; -- -- /* set INTF as RGMII, enable RGMII TXC clock */ -- clrsetbits_le32(&gpr->gpr[1], -- IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MASK, BIT(16)); -- setbits_le32(&gpr->gpr[1], BIT(19) | BIT(21)); -- -- return set_clk_eqos(ENET_125MHZ); --} -- - #if CONFIG_IS_ENABLED(NET) - int board_phy_config(struct phy_device *phydev) - { -@@ -59,10 +46,6 @@ int board_init(void) - setup_fec(); - } - -- if (IS_ENABLED(CONFIG_DWC_ETH_QOS)) { -- ret = setup_eqos(); -- } -- - return ret; - } - -diff --git a/board/freescale/imx8ulp_evk/Makefile b/board/freescale/imx8ulp_evk/Makefile -index b6ca238de5..1cf148ab91 100644 ---- a/board/freescale/imx8ulp_evk/Makefile -+++ b/board/freescale/imx8ulp_evk/Makefile -@@ -3,7 +3,7 @@ - obj-y += imx8ulp_evk.o - - ifdef CONFIG_SPL_BUILD --obj-y += spl.o ddr_init.o -+obj-y += spl.o - ifdef CONFIG_IMX8ULP_ND_MODE - obj-y += lpddr4_timing_264.o - else -diff --git a/board/freescale/imx8ulp_evk/ddr_init.c b/board/freescale/imx8ulp_evk/ddr_init.c -deleted file mode 100644 -index f4238d29b3..0000000000 ---- a/board/freescale/imx8ulp_evk/ddr_init.c -+++ /dev/null -@@ -1,207 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0+ OR MIT --/* -- * Copyright 2021 NXP -- */ --#include --#include --#include --#include --#include -- --#define DENALI_CTL_00 (DDR_CTL_BASE_ADDR) --#define CTL_START 0x1 -- --#define DENALI_CTL_03 (DDR_CTL_BASE_ADDR + 4 * 3) --#define DENALI_CTL_197 (DDR_CTL_BASE_ADDR + 4 * 197) --#define DENALI_CTL_250 (DDR_CTL_BASE_ADDR + 4 * 250) --#define DENALI_CTL_251 (DDR_CTL_BASE_ADDR + 4 * 251) --#define DENALI_CTL_266 (DDR_CTL_BASE_ADDR + 4 * 266) --#define DFI_INIT_COMPLETE 0x2 -- --#define DENALI_CTL_614 (DDR_CTL_BASE_ADDR + 4 * 614) --#define DENALI_CTL_615 (DDR_CTL_BASE_ADDR + 4 * 615) -- --#define DENALI_PI_00 (DDR_PI_BASE_ADDR) --#define PI_START 0x1 -- --#define DENALI_PI_04 (DDR_PI_BASE_ADDR + 4 * 4) --#define DENALI_PI_11 (DDR_PI_BASE_ADDR + 4 * 11) --#define DENALI_PI_12 (DDR_PI_BASE_ADDR + 4 * 12) --#define DENALI_CTL_23 (DDR_CTL_BASE_ADDR + 4 * 23) --#define DENALI_CTL_25 (DDR_CTL_BASE_ADDR + 4 * 25) -- --#define DENALI_PHY_1624 (DDR_PHY_BASE_ADDR + 4 * 1624) --#define DENALI_PHY_1537 (DDR_PHY_BASE_ADDR + 4 * 1537) --#define PHY_FREQ_SEL_MULTICAST_EN(X) ((X) << 8) --#define PHY_FREQ_SEL_INDEX(X) ((X) << 16) -- --#define DENALI_PHY_1547 (DDR_PHY_BASE_ADDR + 4 * 1547) --#define DENALI_PHY_1555 (DDR_PHY_BASE_ADDR + 4 * 1555) --#define DENALI_PHY_1564 (DDR_PHY_BASE_ADDR + 4 * 1564) --#define DENALI_PHY_1565 (DDR_PHY_BASE_ADDR + 4 * 1565) -- --int ddr_calibration(unsigned int fsp_table[3]) --{ -- u32 reg_val; -- u32 int_status_init, phy_freq_req, phy_freq_type; -- u32 lock_0, lock_1, lock_2; -- u32 freq_chg_pt, freq_chg_cnt; -- -- reg_val = readl(DENALI_CTL_250); -- if (((reg_val >> 16) & 0x3) == 1) -- freq_chg_cnt = 2; -- else -- freq_chg_cnt = 3; -- -- reg_val = readl(DENALI_PI_12); -- if (reg_val == 0x3) { -- freq_chg_pt = 1; -- } else if (reg_val == 0x7) { -- freq_chg_pt = 2; -- } else { -- printf("frequency map(0x%x) is wrong, please check!\r\n", reg_val); -- return -1; -- } -- -- debug("%s\n", __func__); -- -- /* Assert PI_START parameter and then assert START parameter in Controller. */ -- reg_val = readl(DENALI_PI_00) | PI_START; -- writel(reg_val, DENALI_PI_00); -- -- reg_val = readl(DENALI_CTL_00) | CTL_START; -- writel(reg_val, DENALI_CTL_00); -- -- /* Poll for init_done_bit in Controller interrupt status register (INT_STATUS_INIT) */ -- do { -- if (!freq_chg_cnt) { -- int_status_init = (readl(DENALI_CTL_266) >> 8) & 0xff; -- /* DDR subsystem is ready for traffic. */ -- if (int_status_init & DFI_INIT_COMPLETE) { -- printf("complete\n"); -- break; -- } -- } -- -- /* -- * During leveling, PHY will request for freq change and SoC clock -- * logic should provide requested frequency, Polling SIM LPDDR_CTRL2 -- * Bit phy_freq_chg_req until be 1'b1 -- */ -- reg_val = readl(AVD_SIM_LPDDR_CTRL2); -- phy_freq_req = (reg_val >> 7) & 0x1; -- -- if (phy_freq_req) { -- phy_freq_type = reg_val & 0x1F; -- if (!phy_freq_type) { -- printf("Poll for freq_chg_req on SIM register and change to F0 frequency.\n"); -- set_ddr_clk(fsp_table[phy_freq_type] >> 1); -- -- /* Write 1'b1 at LPDDR_CTRL2 bit phy_freq_cfg_ack */ -- reg_val = readl(AVD_SIM_LPDDR_CTRL2); -- writel(reg_val | (0x1 << 6), AVD_SIM_LPDDR_CTRL2); -- } else if (phy_freq_type == 0x01) { -- printf("Poll for freq_chg_req on SIM register and change to F1 frequency.\n"); -- set_ddr_clk(fsp_table[phy_freq_type] >> 1); -- -- /* Write 1'b1 at LPDDR_CTRL2 bit phy_freq_cfg_ack */ -- reg_val = readl(AVD_SIM_LPDDR_CTRL2); -- writel(reg_val | (0x1 << 6), AVD_SIM_LPDDR_CTRL2); -- if (freq_chg_pt == 1) -- freq_chg_cnt--; -- } else if (phy_freq_type == 0x02) { -- printf("Poll for freq_chg_req on SIM register and change to F2 frequency.\n"); -- set_ddr_clk(fsp_table[phy_freq_type] >> 1); -- -- /* Write 1'b1 at LPDDR_CTRL2 bit phy_freq_cfg_ack */ -- reg_val = readl(AVD_SIM_LPDDR_CTRL2); -- writel(reg_val | (0x1 << 6), AVD_SIM_LPDDR_CTRL2); -- if (freq_chg_pt == 2) -- freq_chg_cnt--; -- } -- reg_val = readl(AVD_SIM_LPDDR_CTRL2); -- } -- } while (1); -- -- /* Check PLL lock status */ -- lock_0 = readl(DENALI_PHY_1564) & 0xffff; -- lock_1 = (readl(DENALI_PHY_1564) >> 16) & 0xffff; -- lock_2 = readl(DENALI_PHY_1565) & 0xffff; -- -- if ((lock_0 & 0x3) != 0x3 || (lock_1 & 0x3) != 0x3 || (lock_2 & 0x3) != 0x3) { -- printf("De-Skew PLL failed to lock\n"); -- printf("lock_0=0x%x, lock_1=0x%x, lock_2=0x%x\n", lock_0, lock_1, lock_2); -- return -1; -- } -- -- printf("De-Skew PLL is locked and ready\n"); -- return 0; --} -- --int ddr_init(struct dram_timing_info2 *dram_timing) --{ -- int i; -- -- debug("%s\n", __func__); -- -- set_ddr_clk(dram_timing->fsp_table[0] >> 1); /* Set to boot freq */ -- -- /* Initialize CTL registers */ -- for (i = 0; i < dram_timing->ctl_cfg_num; i++) -- writel(dram_timing->ctl_cfg[i].val, (ulong)dram_timing->ctl_cfg[i].reg); -- -- /* Initialize PI registers */ -- for (i = 0; i < dram_timing->pi_cfg_num; i++) -- writel(dram_timing->pi_cfg[i].val, (ulong)dram_timing->pi_cfg[i].reg); -- -- /* Write PHY regiters for all 3 frequency points (48Mhz/384Mhz/528Mhz): f1_index=0 */ -- writel(PHY_FREQ_SEL_MULTICAST_EN(1) | PHY_FREQ_SEL_INDEX(0), DENALI_PHY_1537); -- for (i = 0; i < dram_timing->phy_f1_cfg_num; i++) -- writel(dram_timing->phy_f1_cfg[i].val, (ulong)dram_timing->phy_f1_cfg[i].reg); -- -- /* Write PHY regiters for freqency point 2 (528Mhz): f2_index=1 */ -- writel(PHY_FREQ_SEL_MULTICAST_EN(0) | PHY_FREQ_SEL_INDEX(1), DENALI_PHY_1537); -- for (i = 0; i < dram_timing->phy_f2_cfg_num; i++) -- writel(dram_timing->phy_f2_cfg[i].val, (ulong)dram_timing->phy_f2_cfg[i].reg); -- -- /* Re-enable MULTICAST mode */ -- writel(PHY_FREQ_SEL_MULTICAST_EN(1) | PHY_FREQ_SEL_INDEX(0), DENALI_PHY_1537); -- -- return ddr_calibration(dram_timing->fsp_table); --} -- --void enable_bypass_mode(void) --{ -- u32 reg_val; -- -- /* PI_INIT_LVL_EN=0x0 (DENALI_PI_04) */ -- reg_val = readl(DENALI_PI_04) & ~0x1; -- writel(reg_val, DENALI_PI_04); -- -- /* PI_FREQ_MAP=0x1 (DENALI_PI_12) */ -- writel(0x1, DENALI_PI_12); -- -- /* PI_INIT_WORK_FREQ=0x0 (DENALI_PI_11) */ -- reg_val = readl(DENALI_PI_11) & ~(0x1f << 8); -- writel(reg_val, DENALI_PI_11); -- -- /* DFIBUS_FREQ_INIT=0x0 (DENALI_CTL_23) */ -- reg_val = readl(DENALI_CTL_23) & ~(0x3 << 24); -- writel(reg_val, DENALI_CTL_23); -- -- /* PHY_LP4_BOOT_DISABLE=0x0 (DENALI_PHY_1547) */ -- reg_val = readl(DENALI_PHY_1547) & ~(0x1 << 8); -- writel(reg_val, DENALI_PHY_1547); -- -- /* PHY_PLL_BYPASS=0x1 (DENALI_PHY_1624) */ -- reg_val = readl(DENALI_PHY_1624) | 0x1; -- writel(reg_val, DENALI_PHY_1624); -- -- /* PHY_LP4_BOOT_PLL_BYPASS to 0x1 (DENALI_PHY_1555) */ -- reg_val = readl(DENALI_PHY_1555) | 0x1; -- writel(reg_val, DENALI_PHY_1555); -- -- /* FREQ_CHANGE_TYPE_F0 = 0x0/FREQ_CHANGE_TYPE_F1 = 0x1/FREQ_CHANGE_TYPE_F2 = 0x2 */ -- reg_val = 0x020100; -- writel(reg_val, DENALI_CTL_25); --} -diff --git a/board/freescale/imx8ulp_evk/imx8ulp_evk.c b/board/freescale/imx8ulp_evk/imx8ulp_evk.c -index 5aad1074a8..dd04d5925a 100644 ---- a/board/freescale/imx8ulp_evk/imx8ulp_evk.c -+++ b/board/freescale/imx8ulp_evk/imx8ulp_evk.c -@@ -101,18 +101,12 @@ void mipi_dsi_panel_backlight(void) - - int board_init(void) - { -- int sync = -ENODEV; - - if (IS_ENABLED(CONFIG_FEC_MXC)) - setup_fec(); - -- if (m33_image_booted()) { -- sync = m33_image_handshake(1000); -- printf("M33 Sync: %s\n", sync ? "Timeout" : "OK"); -- } -- - /* When sync with M33 is failed, use local driver to set for video */ -- if (sync != 0 && IS_ENABLED(CONFIG_VIDEO)) { -+ if (!is_m33_handshake_necessary() && IS_ENABLED(CONFIG_VIDEO)) { - mipi_dsi_mux_panel(); - mipi_dsi_panel_backlight(); - } -@@ -127,8 +121,16 @@ int board_early_init_f(void) - - int board_late_init(void) - { -+ ulong addr; -+ - #if CONFIG_IS_ENABLED(ENV_IS_IN_MMC) - board_late_mmc_env_init(); - #endif -+ -+ /* clear fdtaddr to avoid obsolete data */ -+ addr = env_get_hex("fdt_addr_r", 0); -+ if (addr) -+ memset((void *)addr, 0, 0x400); -+ - return 0; - } -diff --git a/board/freescale/imx8ulp_evk/lpddr4_timing.c b/board/freescale/imx8ulp_evk/lpddr4_timing.c -index 09240999ce..6d2805315b 100644 ---- a/board/freescale/imx8ulp_evk/lpddr4_timing.c -+++ b/board/freescale/imx8ulp_evk/lpddr4_timing.c -@@ -2,7 +2,7 @@ - /* - * Copyright 2021 NXP - * -- * Generated code from MX8M_DDR_tool -+ * Generated code from MX8ULP_DDR_tool - * - */ - -@@ -16,10 +16,10 @@ struct dram_cfg_param ddr_ctl_cfg[] = { - { 0x2e06002c, 0x17702 }, /* 11 */ - { 0x2e060030, 0x5 }, /* 12 */ - { 0x2e060034, 0x61 }, /* 13 */ -- { 0x2e060038, 0xce3f }, /* 14 */ -- { 0x2e06003c, 0x80e70 }, /* 15 */ -+ { 0x2e060038, 0x4b00 }, /* 14 */ -+ { 0x2e06003c, 0x2edfa }, /* 15 */ - { 0x2e060040, 0x5 }, /* 16 */ -- { 0x2e060044, 0x210 }, /* 17 */ -+ { 0x2e060044, 0xc0 }, /* 17 */ - { 0x2e060048, 0x19c7d }, /* 18 */ - { 0x2e06004c, 0x101cdf }, /* 19 */ - { 0x2e060050, 0x5 }, /* 20 */ -@@ -31,56 +31,56 @@ struct dram_cfg_param ddr_ctl_cfg[] = { - { 0x2e060068, 0xa }, /* 26 */ - { 0x2e06006c, 0x19 }, /* 27 */ - { 0x2e060078, 0x2020200 }, /* 30 */ -- { 0x2e06007c, 0x160b }, /* 31 */ -+ { 0x2e06007c, 0x1604 }, /* 31 */ - { 0x2e060090, 0x10 }, /* 36 */ - { 0x2e0600a4, 0x40c040c }, /* 41 */ - { 0x2e0600a8, 0x8040614 }, /* 42 */ - { 0x2e0600ac, 0x604 }, /* 43 */ - { 0x2e0600b0, 0x3090003 }, /* 44 */ - { 0x2e0600b4, 0x40002 }, /* 45 */ -- { 0x2e0600b8, 0xc0011 }, /* 46 */ -- { 0x2e0600bc, 0xb0509 }, /* 47 */ -+ { 0x2e0600b8, 0x50008 }, /* 46 */ -+ { 0x2e0600bc, 0x40309 }, /* 47 */ - { 0x2e0600c0, 0x2106 }, /* 48 */ - { 0x2e0600c4, 0xa090017 }, /* 49 */ - { 0x2e0600c8, 0x8200016 }, /* 50 */ - { 0x2e0600cc, 0xa0a }, /* 51 */ - { 0x2e0600d0, 0x4000694 }, /* 52 */ - { 0x2e0600d4, 0xa0a0804 }, /* 53 */ -- { 0x2e0600d8, 0x4002432 }, /* 54 */ -+ { 0x2e0600d8, 0x4000d29 }, /* 54 */ - { 0x2e0600dc, 0xa0a0804 }, /* 55 */ - { 0x2e0600e0, 0x4004864 }, /* 56 */ - { 0x2e0600e4, 0x2030404 }, /* 57 */ -- { 0x2e0600e8, 0x5040400 }, /* 58 */ -- { 0x2e0600ec, 0x80b0a06 }, /* 59 */ -+ { 0x2e0600e8, 0x4040400 }, /* 58 */ -+ { 0x2e0600ec, 0x80b0a04 }, /* 59 */ - { 0x2e0600f0, 0x7010100 }, /* 60 */ -- { 0x2e0600f4, 0x4150b }, /* 61 */ -+ { 0x2e0600f4, 0x41507 }, /* 61 */ - { 0x2e0600fc, 0x1010000 }, /* 63 */ - { 0x2e060100, 0x1000000 }, /* 64 */ - { 0x2e060104, 0xe0403 }, /* 65 */ - { 0x2e060108, 0xb3 }, /* 66 */ -- { 0x2e06010c, 0x4a }, /* 67 */ -- { 0x2e060110, 0x3fd }, /* 68 */ -+ { 0x2e06010c, 0x1b }, /* 67 */ -+ { 0x2e060110, 0x16e }, /* 68 */ - { 0x2e060114, 0x94 }, /* 69 */ - { 0x2e060118, 0x803 }, /* 70 */ - { 0x2e06011c, 0x5 }, /* 71 */ - { 0x2e060120, 0x70000 }, /* 72 */ -- { 0x2e060124, 0x25000f }, /* 73 */ -- { 0x2e060128, 0x4a0078 }, /* 74 */ -+ { 0x2e060124, 0xe000f }, /* 73 */ -+ { 0x2e060128, 0x4a0026 }, /* 74 */ - { 0x2e06012c, 0x4000f9 }, /* 75 */ - { 0x2e060130, 0x120103 }, /* 76 */ - { 0x2e060134, 0x50005 }, /* 77 */ -- { 0x2e060138, 0x8070005 }, /* 78 */ -+ { 0x2e060138, 0x7070005 }, /* 78 */ - { 0x2e06013c, 0x505010d }, /* 79 */ - { 0x2e060140, 0x101030a }, /* 80 */ - { 0x2e060144, 0x30a0505 }, /* 81 */ - { 0x2e060148, 0x5050101 }, /* 82 */ - { 0x2e06014c, 0x1030a }, /* 83 */ - { 0x2e060150, 0xe000e }, /* 84 */ -- { 0x2e060154, 0x4c004c }, /* 85 */ -+ { 0x2e060154, 0x1c001c }, /* 85 */ - { 0x2e060158, 0x980098 }, /* 86 */ - { 0x2e06015c, 0x3050505 }, /* 87 */ - { 0x2e060160, 0x3010403 }, /* 88 */ -- { 0x2e060164, 0x4050505 }, /* 89 */ -+ { 0x2e060164, 0x3050505 }, /* 89 */ - { 0x2e060168, 0x3010403 }, /* 90 */ - { 0x2e06016c, 0x8050505 }, /* 91 */ - { 0x2e060170, 0x3010403 }, /* 92 */ -@@ -101,12 +101,12 @@ struct dram_cfg_param ddr_ctl_cfg[] = { - { 0x2e0601b4, 0x2cc0 }, /* 109 */ - { 0x2e0601b8, 0x2cc0 }, /* 110 */ - { 0x2e0601c0, 0x4e5 }, /* 112 */ -- { 0x2e0601c4, 0xff40 }, /* 113 */ -- { 0x2e0601c8, 0xff40 }, /* 114 */ -- { 0x2e0601cc, 0xff40 }, /* 115 */ -- { 0x2e0601d0, 0xff40 }, /* 116 */ -- { 0x2e0601d4, 0xff40 }, /* 117 */ -- { 0x2e0601dc, 0x1beb }, /* 119 */ -+ { 0x2e0601c4, 0x5b80 }, /* 113 */ -+ { 0x2e0601c8, 0x5b80 }, /* 114 */ -+ { 0x2e0601cc, 0x5b80 }, /* 115 */ -+ { 0x2e0601d0, 0x5b80 }, /* 116 */ -+ { 0x2e0601d4, 0x5b80 }, /* 117 */ -+ { 0x2e0601dc, 0xa02 }, /* 119 */ - { 0x2e0601e0, 0x200c0 }, /* 120 */ - { 0x2e0601e4, 0x200c0 }, /* 121 */ - { 0x2e0601e8, 0x200c0 }, /* 122 */ -@@ -138,9 +138,9 @@ struct dram_cfg_param ddr_ctl_cfg[] = { - { 0x2e0602a8, 0xd0005 }, /* 170 */ - { 0x2e0602ac, 0x404 }, /* 171 */ - { 0x2e0602b0, 0xd }, /* 172 */ -- { 0x2e0602b4, 0x1b0035 }, /* 173 */ -- { 0x2e0602b8, 0x4040042 }, /* 174 */ -- { 0x2e0602bc, 0x42 }, /* 175 */ -+ { 0x2e0602b4, 0xa0014 }, /* 173 */ -+ { 0x2e0602b8, 0x4040018 }, /* 174 */ -+ { 0x2e0602bc, 0x18 }, /* 175 */ - { 0x2e0602c0, 0x35006a }, /* 176 */ - { 0x2e0602c4, 0x4040084 }, /* 177 */ - { 0x2e0602c8, 0x84 }, /* 178 */ -@@ -168,13 +168,13 @@ struct dram_cfg_param ddr_ctl_cfg[] = { - { 0x2e060390, 0x30000 }, /* 228 */ - { 0x2e060394, 0x1000200 }, /* 229 */ - { 0x2e060398, 0x310040 }, /* 230 */ -- { 0x2e06039c, 0x20002 }, /* 231 */ -+ { 0x2e06039c, 0x20008 }, /* 231 */ - { 0x2e0603a0, 0x400100 }, /* 232 */ -- { 0x2e0603a4, 0x80108 }, /* 233 */ -+ { 0x2e0603a4, 0x80060 }, /* 233 */ - { 0x2e0603a8, 0x1000200 }, /* 234 */ - { 0x2e0603ac, 0x2100040 }, /* 235 */ - { 0x2e0603b0, 0x10 }, /* 236 */ -- { 0x2e0603b4, 0xe0003 }, /* 237 */ -+ { 0x2e0603b4, 0x50003 }, /* 237 */ - { 0x2e0603b8, 0x100001b }, /* 238 */ - { 0x2e0603d8, 0xffff0b00 }, /* 246 */ - { 0x2e0603dc, 0x1010001 }, /* 247 */ -@@ -198,8 +198,8 @@ struct dram_cfg_param ddr_ctl_cfg[] = { - { 0x2e0604c8, 0x8000f00 }, /* 306 */ - { 0x2e0604cc, 0xa08 }, /* 307 */ - { 0x2e0604d0, 0x1010101 }, /* 308 */ -- { 0x2e0604d4, 0x102 }, /* 309 */ -- { 0x2e0604d8, 0x404 }, /* 310 */ -+ { 0x2e0604d4, 0x01000102 }, /* 309 */ -+ { 0x2e0604d8, 0x00000101 }, /* 310 */ - { 0x2e0604dc, 0x40400 }, /* 311 */ - { 0x2e0604e0, 0x4040000 }, /* 312 */ - { 0x2e0604e4, 0x4000000 }, /* 313 */ -@@ -396,10 +396,10 @@ struct dram_cfg_param ddr_ctl_cfg[] = { - { 0x2e0608e0, 0x30f0f }, /* 568 */ - { 0x2e0608e4, 0xffffffff }, /* 569 */ - { 0x2e0608e8, 0x32070f0f }, /* 570 */ -- { 0x2e0608ec, 0x1320001 }, /* 571 */ -+ { 0x2e0608ec, 0x1320000 }, /* 571 */ - { 0x2e0608f0, 0x13200 }, /* 572 */ - { 0x2e0608f4, 0x132 }, /* 573 */ -- { 0x2e0608fc, 0x1d1b0000 }, /* 575 */ -+ { 0x2e0608fc, 0x1b1b0000 }, /* 575 */ - { 0x2e060900, 0x21 }, /* 576 */ - { 0x2e060904, 0xa }, /* 577 */ - { 0x2e060908, 0x166 }, /* 578 */ -@@ -410,13 +410,13 @@ struct dram_cfg_param ddr_ctl_cfg[] = { - { 0x2e06091c, 0x432 }, /* 583 */ - { 0x2e060920, 0xdfc }, /* 584 */ - { 0x2e060924, 0x204 }, /* 585 */ -- { 0x2e060928, 0x7fa }, /* 586 */ -+ { 0x2e060928, 0x2dc }, /* 586 */ - { 0x2e06092c, 0x200 }, /* 587 */ - { 0x2e060930, 0x200 }, /* 588 */ - { 0x2e060934, 0x200 }, /* 589 */ - { 0x2e060938, 0x200 }, /* 590 */ -- { 0x2e06093c, 0x17ee }, /* 591 */ -- { 0x2e060940, 0x4fc4 }, /* 592 */ -+ { 0x2e06093c, 0x894 }, /* 591 */ -+ { 0x2e060940, 0x1c98 }, /* 592 */ - { 0x2e060944, 0x204 }, /* 593 */ - { 0x2e060948, 0x1006 }, /* 594 */ - { 0x2e06094c, 0x200 }, /* 595 */ -@@ -438,7 +438,7 @@ struct dram_cfg_param ddr_ctl_cfg[] = { - { 0x2e06098c, 0x2010000 }, /* 611 */ - { 0x2e060990, 0x6000200 }, /* 612 */ - { 0x2e060994, 0x3000a06 }, /* 613 */ -- { 0x2e060998, 0x2000c06 }, /* 614 */ -+ { 0x2e060998, 0x2000c03 }, /* 614 */ - }; - - /** PI settings **/ -@@ -518,22 +518,22 @@ struct dram_cfg_param ddr_pi_cfg[] = { - { 0x2e062260, 0x10001 }, /* 152 */ - { 0x2e062274, 0x401 }, /* 157 */ - { 0x2e06227c, 0x10000 }, /* 159 */ -- { 0x2e062284, 0x6010000 }, /* 161 */ -+ { 0x2e062284, 0x2010000 }, /* 161 */ - { 0x2e062288, 0xb }, /* 162 */ - { 0x2e06228c, 0x34 }, /* 163 */ -- { 0x2e062290, 0x36 }, /* 164 */ -+ { 0x2e062290, 0x34 }, /* 164 */ - { 0x2e062294, 0x2003c }, /* 165 */ - { 0x2e062298, 0x2000200 }, /* 166 */ - { 0x2e06229c, 0xc040c04 }, /* 167 */ - { 0x2e0622a0, 0xe1406 }, /* 168 */ - { 0x2e0622a4, 0xb3 }, /* 169 */ -- { 0x2e0622a8, 0x4a }, /* 170 */ -- { 0x2e0622ac, 0x3fd }, /* 171 */ -+ { 0x2e0622a8, 0x1b }, /* 170 */ -+ { 0x2e0622ac, 0x16e }, /* 171 */ - { 0x2e0622b0, 0x94 }, /* 172 */ - { 0x2e0622b4, 0x4000803 }, /* 173 */ - { 0x2e0622b8, 0x1010404 }, /* 174 */ - { 0x2e0622bc, 0x1501 }, /* 175 */ -- { 0x2e0622c0, 0x1a0018 }, /* 176 */ -+ { 0x2e0622c0, 0x1a0016 }, /* 176 */ - { 0x2e0622c4, 0x1000100 }, /* 177 */ - { 0x2e0622c8, 0x100 }, /* 178 */ - { 0x2e0622d0, 0x5040303 }, /* 180 */ -@@ -542,15 +542,15 @@ struct dram_cfg_param ddr_pi_cfg[] = { - { 0x2e0622e8, 0x2060404 }, /* 186 */ - { 0x2e0622ec, 0x2020402 }, /* 187 */ - { 0x2e0622f0, 0x3102 }, /* 188 */ -- { 0x2e0622f4, 0x340009 }, /* 189 */ -- { 0x2e0622f8, 0x36000c }, /* 190 */ -+ { 0x2e0622f4, 0x320009 }, /* 189 */ -+ { 0x2e0622f8, 0x36000a }, /* 190 */ - { 0x2e0622fc, 0x101000e }, /* 191 */ - { 0x2e062300, 0xd0101 }, /* 192 */ -- { 0x2e062304, 0x1004201 }, /* 193 */ -+ { 0x2e062304, 0x1001801 }, /* 193 */ - { 0x2e062308, 0x1000084 }, /* 194 */ - { 0x2e06230c, 0xe000e }, /* 195 */ -- { 0x2e062310, 0x430100 }, /* 196 */ -- { 0x2e062314, 0x1000043 }, /* 197 */ -+ { 0x2e062310, 0x190100 }, /* 196 */ -+ { 0x2e062314, 0x1000019 }, /* 197 */ - { 0x2e062318, 0x850085 }, /* 198 */ - { 0x2e06231c, 0x220f220f }, /* 199 */ - { 0x2e062320, 0x101220f }, /* 200 */ -@@ -561,8 +561,8 @@ struct dram_cfg_param ddr_pi_cfg[] = { - { 0x2e062334, 0xc01000 }, /* 205 */ - { 0x2e062338, 0xc01000 }, /* 206 */ - { 0x2e06233c, 0x21000 }, /* 207 */ -- { 0x2e062340, 0x11000d }, /* 208 */ -- { 0x2e062344, 0x140042 }, /* 209 */ -+ { 0x2e062340, 0x2000d }, /* 208 */ -+ { 0x2e062344, 0x140018 }, /* 209 */ - { 0x2e062348, 0x190084 }, /* 210 */ - { 0x2e06234c, 0x220f0056 }, /* 211 */ - { 0x2e062350, 0x101 }, /* 212 */ -@@ -575,40 +575,40 @@ struct dram_cfg_param ddr_pi_cfg[] = { - { 0x2e06236c, 0x5eb }, /* 219 */ - { 0x2e062370, 0x20010003 }, /* 220 */ - { 0x2e062374, 0x80a0a03 }, /* 221 */ -- { 0x2e062378, 0x6090506 }, /* 222 */ -- { 0x2e06237c, 0x2093 }, /* 223 */ -- { 0x2e062380, 0x2001000c }, /* 224 */ -- { 0x2e062384, 0x80a0a04 }, /* 225 */ -+ { 0x2e062378, 0x4090403 }, /* 222 */ -+ { 0x2e06237c, 0xbd8 }, /* 223 */ -+ { 0x2e062380, 0x20010005 }, /* 224 */ -+ { 0x2e062384, 0x80a0a03 }, /* 225 */ - { 0x2e062388, 0xb090a0c }, /* 226 */ - { 0x2e06238c, 0x4126 }, /* 227 */ - { 0x2e062390, 0x20020017 }, /* 228 */ - { 0x2e062394, 0xa0a08 }, /* 229 */ - { 0x2e062398, 0x166 }, /* 230 */ - { 0x2e06239c, 0xdfc }, /* 231 */ -- { 0x2e0623a0, 0x7fa }, /* 232 */ -- { 0x2e0623a4, 0x4fc4 }, /* 233 */ -+ { 0x2e0623a0, 0x2dc }, /* 232 */ -+ { 0x2e0623a4, 0x1c98 }, /* 233 */ - { 0x2e0623a8, 0x1006 }, /* 234 */ - { 0x2e0623ac, 0xa03c }, /* 235 */ -- { 0x2e0623b0, 0x4c000e }, /* 236 */ -+ { 0x2e0623b0, 0x1c000e }, /* 236 */ - { 0x2e0623b4, 0x3030098 }, /* 237 */ - { 0x2e0623b8, 0x258103 }, /* 238 */ - { 0x2e0623bc, 0x17702 }, /* 239 */ - { 0x2e0623c0, 0x5 }, /* 240 */ - { 0x2e0623c4, 0x61 }, /* 241 */ - { 0x2e0623c8, 0xe }, /* 242 */ -- { 0x2e0623cc, 0xce3f }, /* 243 */ -- { 0x2e0623d0, 0x80e70 }, /* 244 */ -+ { 0x2e0623cc, 0x4b00 }, /* 243 */ -+ { 0x2e0623d0, 0x17702 }, /* 244 */ - { 0x2e0623d4, 0x5 }, /* 245 */ -- { 0x2e0623d8, 0x210 }, /* 246 */ -- { 0x2e0623dc, 0x4c }, /* 247 */ -+ { 0x2e0623d8, 0xc0 }, /* 246 */ -+ { 0x2e0623dc, 0x1c }, /* 247 */ - { 0x2e0623e0, 0x19c7d }, /* 248 */ -- { 0x2e0623e4, 0x101cdf }, /* 249 */ -+ { 0x2e0623e4, 0x17702 }, /* 249 */ - { 0x2e0623e8, 0x5 }, /* 250 */ - { 0x2e0623ec, 0x420 }, /* 251 */ - { 0x2e0623f0, 0x1000098 }, /* 252 */ - { 0x2e0623f4, 0x310040 }, /* 253 */ -- { 0x2e0623f8, 0x10002 }, /* 254 */ -- { 0x2e0623fc, 0x1080040 }, /* 255 */ -+ { 0x2e0623f8, 0x10008 }, /* 254 */ -+ { 0x2e0623fc, 0x600040 }, /* 255 */ - { 0x2e062400, 0x10008 }, /* 256 */ - { 0x2e062404, 0x2100040 }, /* 257 */ - { 0x2e062408, 0x310 }, /* 258 */ -@@ -706,18 +706,18 @@ struct dram_cfg_param ddr_phy_f1_cfg[] = { - { 0x2e064168, 0x1000000 }, /* 90 */ - { 0x2e06416c, 0x10001000 }, /* 91 */ - { 0x2e064170, 0xc043242 }, /* 92 */ -- { 0x2e064174, 0xf0c1201 }, /* 93 */ -+ { 0x2e064174, 0xf0c0e01 }, /* 93 */ - { 0x2e064178, 0x1000140 }, /* 94 */ - { 0x2e06417c, 0xc000120 }, /* 95 */ -- { 0x2e064180, 0x143 }, /* 96 */ -+ { 0x2e064180, 0x118 }, /* 96 */ - { 0x2e064184, 0x1000203 }, /* 97 */ - { 0x2e064188, 0x56417032 }, /* 98 */ - { 0x2e06418c, 0x8 }, /* 99 */ -- { 0x2e064190, 0x2c302c3 }, /* 100 */ -- { 0x2e064194, 0x2c302c3 }, /* 101 */ -- { 0x2e064198, 0x2c302c3 }, /* 102 */ -- { 0x2e06419c, 0x2c302c3 }, /* 103 */ -- { 0x2e0641a0, 0x2c3 }, /* 104 */ -+ { 0x2e064190, 0x2980298 }, /* 100 */ -+ { 0x2e064194, 0x2980298 }, /* 101 */ -+ { 0x2e064198, 0x2980298 }, /* 102 */ -+ { 0x2e06419c, 0x2980298 }, /* 103 */ -+ { 0x2e0641a0, 0x298 }, /* 104 */ - { 0x2e0641a4, 0x8000 }, /* 105 */ - { 0x2e0641a8, 0x800080 }, /* 106 */ - { 0x2e0641ac, 0x800080 }, /* 107 */ -@@ -727,7 +727,7 @@ struct dram_cfg_param ddr_phy_f1_cfg[] = { - { 0x2e0641bc, 0x800080 }, /* 111 */ - { 0x2e0641c0, 0x800080 }, /* 112 */ - { 0x2e0641c4, 0x800080 }, /* 113 */ -- { 0x2e0641c8, 0x6b0080 }, /* 114 */ -+ { 0x2e0641c8, 0x1940080 }, /* 114 */ - { 0x2e0641cc, 0x1a00001 }, /* 115 */ - { 0x2e0641d4, 0x10000 }, /* 117 */ - { 0x2e0641d8, 0x80200 }, /* 118 */ -@@ -782,18 +782,18 @@ struct dram_cfg_param ddr_phy_f1_cfg[] = { - { 0x2e064568, 0x1000000 }, /* 346 */ - { 0x2e06456c, 0x10001000 }, /* 347 */ - { 0x2e064570, 0xc043242 }, /* 348 */ -- { 0x2e064574, 0xf0c1201 }, /* 349 */ -+ { 0x2e064574, 0xf0c0e01 }, /* 349 */ - { 0x2e064578, 0x1000140 }, /* 350 */ - { 0x2e06457c, 0xc000120 }, /* 351 */ -- { 0x2e064580, 0x143 }, /* 352 */ -+ { 0x2e064580, 0x118 }, /* 352 */ - { 0x2e064584, 0x1000203 }, /* 353 */ - { 0x2e064588, 0x30217465 }, /* 354 */ - { 0x2e06458c, 0x8 }, /* 355 */ -- { 0x2e064590, 0x2c302c3 }, /* 356 */ -- { 0x2e064594, 0x2c302c3 }, /* 357 */ -- { 0x2e064598, 0x2c302c3 }, /* 358 */ -- { 0x2e06459c, 0x2c302c3 }, /* 359 */ -- { 0x2e0645a0, 0x2c3 }, /* 360 */ -+ { 0x2e064590, 0x2980298 }, /* 356 */ -+ { 0x2e064594, 0x2980298 }, /* 357 */ -+ { 0x2e064598, 0x2980298 }, /* 358 */ -+ { 0x2e06459c, 0x2980298 }, /* 359 */ -+ { 0x2e0645a0, 0x298 }, /* 360 */ - { 0x2e0645a4, 0x8000 }, /* 361 */ - { 0x2e0645a8, 0x800080 }, /* 362 */ - { 0x2e0645ac, 0x800080 }, /* 363 */ -@@ -803,7 +803,7 @@ struct dram_cfg_param ddr_phy_f1_cfg[] = { - { 0x2e0645bc, 0x800080 }, /* 367 */ - { 0x2e0645c0, 0x800080 }, /* 368 */ - { 0x2e0645c4, 0x800080 }, /* 369 */ -- { 0x2e0645c8, 0x6b0080 }, /* 370 */ -+ { 0x2e0645c8, 0x1940080 }, /* 370 */ - { 0x2e0645cc, 0x1a00001 }, /* 371 */ - { 0x2e0645d4, 0x10000 }, /* 373 */ - { 0x2e0645d8, 0x80200 }, /* 374 */ -@@ -859,18 +859,18 @@ struct dram_cfg_param ddr_phy_f1_cfg[] = { - { 0x2e064968, 0x1000000 }, /* 602 */ - { 0x2e06496c, 0x10001000 }, /* 603 */ - { 0x2e064970, 0xc043242 }, /* 604 */ -- { 0x2e064974, 0xf0c1201 }, /* 605 */ -+ { 0x2e064974, 0xf0c0e01 }, /* 605 */ - { 0x2e064978, 0x1000140 }, /* 606 */ - { 0x2e06497c, 0xc000120 }, /* 607 */ -- { 0x2e064980, 0x143 }, /* 608 */ -+ { 0x2e064980, 0x118 }, /* 608 */ - { 0x2e064984, 0x1000203 }, /* 609 */ - { 0x2e064988, 0x75436012 }, /* 610 */ - { 0x2e06498c, 0x8 }, /* 611 */ -- { 0x2e064990, 0x2c302c3 }, /* 612 */ -- { 0x2e064994, 0x2c302c3 }, /* 613 */ -- { 0x2e064998, 0x2c302c3 }, /* 614 */ -- { 0x2e06499c, 0x2c302c3 }, /* 615 */ -- { 0x2e0649a0, 0x2c3 }, /* 616 */ -+ { 0x2e064990, 0x2980298 }, /* 612 */ -+ { 0x2e064994, 0x2980298 }, /* 613 */ -+ { 0x2e064998, 0x2980298 }, /* 614 */ -+ { 0x2e06499c, 0x2980298 }, /* 615 */ -+ { 0x2e0649a0, 0x298 }, /* 616 */ - { 0x2e0649a4, 0x8000 }, /* 617 */ - { 0x2e0649a8, 0x800080 }, /* 618 */ - { 0x2e0649ac, 0x800080 }, /* 619 */ -@@ -880,7 +880,7 @@ struct dram_cfg_param ddr_phy_f1_cfg[] = { - { 0x2e0649bc, 0x800080 }, /* 623 */ - { 0x2e0649c0, 0x800080 }, /* 624 */ - { 0x2e0649c4, 0x800080 }, /* 625 */ -- { 0x2e0649c8, 0x6b0080 }, /* 626 */ -+ { 0x2e0649c8, 0x1940080 }, /* 626 */ - { 0x2e0649cc, 0x1a00001 }, /* 627 */ - { 0x2e0649d4, 0x10000 }, /* 629 */ - { 0x2e0649d8, 0x80200 }, /* 630 */ -@@ -935,18 +935,18 @@ struct dram_cfg_param ddr_phy_f1_cfg[] = { - { 0x2e064d68, 0x1000000 }, /* 858 */ - { 0x2e064d6c, 0x10001000 }, /* 859 */ - { 0x2e064d70, 0xc043242 }, /* 860 */ -- { 0x2e064d74, 0xf0c1201 }, /* 861 */ -+ { 0x2e064d74, 0xf0c0e01 }, /* 861 */ - { 0x2e064d78, 0x1000140 }, /* 862 */ - { 0x2e064d7c, 0xc000120 }, /* 863 */ -- { 0x2e064d80, 0x143 }, /* 864 */ -+ { 0x2e064d80, 0x118 }, /* 864 */ - { 0x2e064d84, 0x1000203 }, /* 865 */ - { 0x2e064d88, 0x32017465 }, /* 866 */ - { 0x2e064d8c, 0x8 }, /* 867 */ -- { 0x2e064d90, 0x2c302c3 }, /* 868 */ -- { 0x2e064d94, 0x2c302c3 }, /* 869 */ -- { 0x2e064d98, 0x2c302c3 }, /* 870 */ -- { 0x2e064d9c, 0x2c302c3 }, /* 871 */ -- { 0x2e064da0, 0x2c3 }, /* 872 */ -+ { 0x2e064d90, 0x2980298 }, /* 868 */ -+ { 0x2e064d94, 0x2980298 }, /* 869 */ -+ { 0x2e064d98, 0x2980298 }, /* 870 */ -+ { 0x2e064d9c, 0x2980298 }, /* 871 */ -+ { 0x2e064da0, 0x298 }, /* 872 */ - { 0x2e064da4, 0x8000 }, /* 873 */ - { 0x2e064da8, 0x800080 }, /* 874 */ - { 0x2e064dac, 0x800080 }, /* 875 */ -@@ -956,7 +956,7 @@ struct dram_cfg_param ddr_phy_f1_cfg[] = { - { 0x2e064dbc, 0x800080 }, /* 879 */ - { 0x2e064dc0, 0x800080 }, /* 880 */ - { 0x2e064dc4, 0x800080 }, /* 881 */ -- { 0x2e064dc8, 0x6b0080 }, /* 882 */ -+ { 0x2e064dc8, 0x1940080 }, /* 882 */ - { 0x2e064dcc, 0x1a00001 }, /* 883 */ - { 0x2e064dd4, 0x10000 }, /* 885 */ - { 0x2e064dd8, 0x80200 }, /* 886 */ -@@ -1034,7 +1034,7 @@ struct dram_cfg_param ddr_phy_f1_cfg[] = { - { 0x2e065868, 0xf0f0f }, /* 1562 */ - { 0x2e06586c, 0x241342 }, /* 1563 */ - { 0x2e065874, 0x1020000 }, /* 1565 */ -- { 0x2e065878, 0x701 }, /* 1566 */ -+ { 0x2e065878, 0x10701 }, /* 1566 */ - { 0x2e06587c, 0x54 }, /* 1567 */ - { 0x2e065880, 0x4102000 }, /* 1568 */ - { 0x2e065884, 0x24410 }, /* 1569 */ -@@ -1047,7 +1047,7 @@ struct dram_cfg_param ddr_phy_f1_cfg[] = { - { 0x2e0658a0, 0x4410 }, /* 1576 */ - { 0x2e0658a4, 0x4410 }, /* 1577 */ - { 0x2e0658b0, 0x60000 }, /* 1580 */ -- { 0x2e0658b8, 0x66 }, /* 1582 */ -+ { 0x2e0658b8, 0x64 }, /* 1582 */ - { 0x2e0658bc, 0x10000 }, /* 1583 */ - { 0x2e0658c0, 0x8 }, /* 1584 */ - { 0x2e0658d8, 0x3000000 }, /* 1590 */ -@@ -1064,8 +1064,8 @@ struct dram_cfg_param ddr_phy_f1_cfg[] = { - { 0x2e065934, 0x40700 }, /* 1613 */ - { 0x2e06594c, 0x2 }, /* 1619 */ - { 0x2e065958, 0xf3c3 }, /* 1622 */ -- { 0x2e065964, 0x11542 }, /* 1625 */ -- { 0x2e065968, 0x30209bf }, /* 1626 */ -+ { 0x2e065964, 0x11742 }, /* 1625 */ -+ { 0x2e065968, 0x3020600 }, /* 1626 */ - { 0x2e06596c, 0x30000 }, /* 1627 */ - { 0x2e065970, 0x3000300 }, /* 1628 */ - { 0x2e065974, 0x3000300 }, /* 1629 */ -@@ -1098,7 +1098,7 @@ struct dram_cfg_param ddr_phy_f2_cfg[] = { - { 0x2e064170, 0xc043e42 }, /* 92 */ - { 0x2e064174, 0xf0c1701 }, /* 93 */ - { 0x2e064180, 0x187 }, /* 96 */ -- { 0x2e064184, 0x3010203 }, /* 97 */ -+ { 0x2e064184, 0x3200203 }, /* 97 */ - { 0x2e064190, 0x3070307 }, /* 100 */ - { 0x2e064194, 0x3070307 }, /* 101 */ - { 0x2e064198, 0x3070307 }, /* 102 */ -@@ -1109,7 +1109,7 @@ struct dram_cfg_param ddr_phy_f2_cfg[] = { - { 0x2e064570, 0xc043e42 }, /* 348 */ - { 0x2e064574, 0xf0c1701 }, /* 349 */ - { 0x2e064580, 0x187 }, /* 352 */ -- { 0x2e064584, 0x3010203 }, /* 353 */ -+ { 0x2e064584, 0x3200203 }, /* 353 */ - { 0x2e064590, 0x3070307 }, /* 356 */ - { 0x2e064594, 0x3070307 }, /* 357 */ - { 0x2e064598, 0x3070307 }, /* 358 */ -@@ -1120,7 +1120,7 @@ struct dram_cfg_param ddr_phy_f2_cfg[] = { - { 0x2e064970, 0xc043e42 }, /* 604 */ - { 0x2e064974, 0xf0c1701 }, /* 605 */ - { 0x2e064980, 0x187 }, /* 608 */ -- { 0x2e064984, 0x3010203 }, /* 609 */ -+ { 0x2e064984, 0x3200203 }, /* 609 */ - { 0x2e064990, 0x3070307 }, /* 612 */ - { 0x2e064994, 0x3070307 }, /* 613 */ - { 0x2e064998, 0x3070307 }, /* 614 */ -@@ -1131,7 +1131,7 @@ struct dram_cfg_param ddr_phy_f2_cfg[] = { - { 0x2e064d70, 0xc043e42 }, /* 860 */ - { 0x2e064d74, 0xf0c1701 }, /* 861 */ - { 0x2e064d80, 0x187 }, /* 864 */ -- { 0x2e064d84, 0x3010203 }, /* 865 */ -+ { 0x2e064d84, 0x3200203 }, /* 865 */ - { 0x2e064d90, 0x3070307 }, /* 868 */ - { 0x2e064d94, 0x3070307 }, /* 869 */ - { 0x2e064d98, 0x3070307 }, /* 870 */ -@@ -1154,5 +1154,5 @@ struct dram_timing_info2 dram_timing = { - .phy_f1_cfg_num = ARRAY_SIZE(ddr_phy_f1_cfg), - .phy_f2_cfg = ddr_phy_f2_cfg, - .phy_f2_cfg_num = ARRAY_SIZE(ddr_phy_f2_cfg), -- .fsp_table = { 96, 528, 1056 }, -+ .fsp_table = { 96, 192, 1056 }, - }; -diff --git a/board/freescale/imx8ulp_evk/lpddr4_timing_266.c b/board/freescale/imx8ulp_evk/lpddr4_timing_266.c -index e48cb965c1..7945760146 100644 ---- a/board/freescale/imx8ulp_evk/lpddr4_timing_266.c -+++ b/board/freescale/imx8ulp_evk/lpddr4_timing_266.c -@@ -197,8 +197,8 @@ struct dram_cfg_param ddr_ctl_cfg[] = { - { 0x2e0604c8, 0x8000f00 }, /* 306 */ - { 0x2e0604cc, 0xa08 }, /* 307 */ - { 0x2e0604d0, 0x1010101 }, /* 308 */ -- { 0x2e0604d4, 0x102 }, /* 309 */ -- { 0x2e0604d8, 0x404 }, /* 310 */ -+ { 0x2e0604d4, 0x01000102 }, /* 309 */ -+ { 0x2e0604d8, 0x00000101 }, /* 310 */ - { 0x2e0604dc, 0x40400 }, /* 311 */ - { 0x2e0604e0, 0x4040000 }, /* 312 */ - { 0x2e0604e4, 0x4000000 }, /* 313 */ -@@ -395,7 +395,7 @@ struct dram_cfg_param ddr_ctl_cfg[] = { - { 0x2e0608e0, 0x30f0f }, /* 568 */ - { 0x2e0608e4, 0xffffffff }, /* 569 */ - { 0x2e0608e8, 0x32070f0f }, /* 570 */ -- { 0x2e0608ec, 0x1320001 }, /* 571 */ -+ { 0x2e0608ec, 0x1320000 }, /* 571 */ - { 0x2e0608f0, 0x13200 }, /* 572 */ - { 0x2e0608f4, 0x132 }, /* 573 */ - { 0x2e0608fc, 0x1d1b0000 }, /* 575 */ -diff --git a/board/freescale/imx8ulp_evk/spl.c b/board/freescale/imx8ulp_evk/spl.c -index e672f6ee6c..a0dad5f983 100644 ---- a/board/freescale/imx8ulp_evk/spl.c -+++ b/board/freescale/imx8ulp_evk/spl.c -@@ -77,16 +77,12 @@ void display_ele_fw_version(void) - - void spl_board_init(void) - { -- struct udevice *dev; - u32 res; - int ret; - -- uclass_find_first_device(UCLASS_MISC, &dev); -- -- for (; dev; uclass_find_next_device(&dev)) { -- if (device_probe(dev)) -- continue; -- } -+ ret = imx8ulp_dm_post_init(); -+ if (ret) -+ return; - - board_early_init_f(); - -@@ -108,9 +104,6 @@ void spl_board_init(void) - - clock_init_late(); - -- /* DDR initialization */ -- spl_dram_init(); -- - /* This must place after upower init, so access to MDA and MRC are valid */ - /* Init XRDC MDA */ - xrdc_init_mda(); -@@ -118,6 +111,11 @@ void spl_board_init(void) - /* Init XRDC MRC for VIDEO, DSP domains */ - xrdc_init_mrc(); - -+ xrdc_init_pdac_msc(); -+ -+ /* DDR initialization */ -+ spl_dram_init(); -+ - /* Call it after PS16 power up */ - set_lpav_qos(); - -diff --git a/board/freescale/ls1088a/eth_ls1088aqds.c b/board/freescale/ls1088a/eth_ls1088aqds.c -index 8fe643f70b..f62f5fd274 100644 ---- a/board/freescale/ls1088a/eth_ls1088aqds.c -+++ b/board/freescale/ls1088a/eth_ls1088aqds.c -@@ -3,742 +3,9 @@ - * Copyright 2017 NXP - */ - --#include --#include --#include --#include --#include --#include - #include - #include --#include --#include --#include --#include --#include --#include --#include - #include --#include --#include -- --#include "../common/qixis.h" -- --#include "ls1088a_qixis.h" -- --#ifndef CONFIG_DM_ETH --#ifdef CONFIG_FSL_MC_ENET -- --#define SFP_TX 0 -- -- /* - In LS1088A A there are only 16 SERDES lanes, spread across 2 SERDES banks. -- * Bank 1 -> Lanes A, B, C, D, -- * Bank 2 -> Lanes A,B, C, D, -- */ -- -- /* Mapping of 8 SERDES lanes to LS1088A QDS board slots. A value of '0' here -- * means that the mapping must be determined dynamically, or that the lane -- * maps to something other than a board slot. -- */ -- --static u8 lane_to_slot_fsm1[] = { -- 0, 0, 0, 0, 0, 0, 0, 0 --}; -- --/* On the Vitesse VSC8234XHG SGMII riser card there are 4 SGMII PHYs -- * housed. -- */ -- --static int xqsgii_riser_phy_addr[] = { -- XQSGMII_CARD_PHY1_PORT0_ADDR, -- XQSGMII_CARD_PHY2_PORT0_ADDR, -- XQSGMII_CARD_PHY3_PORT0_ADDR, -- XQSGMII_CARD_PHY4_PORT0_ADDR, -- XQSGMII_CARD_PHY3_PORT2_ADDR, -- XQSGMII_CARD_PHY1_PORT2_ADDR, -- XQSGMII_CARD_PHY4_PORT2_ADDR, -- XQSGMII_CARD_PHY2_PORT2_ADDR, --}; -- --static int sgmii_riser_phy_addr[] = { -- SGMII_CARD_PORT1_PHY_ADDR, -- SGMII_CARD_PORT2_PHY_ADDR, -- SGMII_CARD_PORT3_PHY_ADDR, -- SGMII_CARD_PORT4_PHY_ADDR, --}; -- --/* Slot2 does not have EMI connections */ --#define EMI_NONE 0xFF --#define EMI1_RGMII1 0 --#define EMI1_RGMII2 1 --#define EMI1_SLOT1 2 -- --static const char * const mdio_names[] = { -- "LS1088A_QDS_MDIO0", -- "LS1088A_QDS_MDIO1", -- "LS1088A_QDS_MDIO2", -- DEFAULT_WRIOP_MDIO2_NAME, --}; -- --struct ls1088a_qds_mdio { -- u8 muxval; -- struct mii_dev *realbus; --}; -- --struct reg_pair { -- uint addr; -- u8 *val; --}; -- --static void sgmii_configure_repeater(int dpmac) --{ -- struct mii_dev *bus; -- uint8_t a = 0xf; -- int i, j, k, ret; -- unsigned short value; -- const char *dev = "LS1088A_QDS_MDIO2"; -- int i2c_addr[] = {0x58, 0x59, 0x5a, 0x5b}; -- int i2c_phy_addr = 0; -- int phy_addr = 0; -- -- uint8_t ch_a_eq[] = {0x1, 0x2, 0x3, 0x7}; -- uint8_t ch_a_ctl2[] = {0x81, 0x82, 0x83, 0x84}; -- uint8_t ch_b_eq[] = {0x1, 0x2, 0x3, 0x7}; -- uint8_t ch_b_ctl2[] = {0x81, 0x82, 0x83, 0x84}; -- -- u8 reg_val[6] = {0x18, 0x38, 0x4, 0x14, 0xb5, 0x20}; -- struct reg_pair reg_pair[10] = { -- {6, ®_val[0]}, {4, ®_val[1]}, -- {8, ®_val[2]}, {0xf, NULL}, -- {0x11, NULL}, {0x16, NULL}, -- {0x18, NULL}, {0x23, ®_val[3]}, -- {0x2d, ®_val[4]}, {4, ®_val[5]}, -- }; --#if CONFIG_IS_ENABLED(DM_I2C) -- struct udevice *udev; --#endif -- -- /* Set I2c to Slot 1 */ --#if !CONFIG_IS_ENABLED(DM_I2C) -- ret = i2c_write(0x77, 0, 0, &a, 1); --#else -- ret = i2c_get_chip_for_busnum(0, 0x77, 1, &udev); -- if (!ret) -- ret = dm_i2c_write(udev, 0, &a, 1); --#endif -- if (ret) -- goto error; -- -- switch (dpmac) { -- case 1: -- i2c_phy_addr = i2c_addr[1]; -- phy_addr = 4; -- break; -- case 2: -- i2c_phy_addr = i2c_addr[0]; -- phy_addr = 0; -- break; -- case 3: -- i2c_phy_addr = i2c_addr[3]; -- phy_addr = 0xc; -- break; -- case 7: -- i2c_phy_addr = i2c_addr[2]; -- phy_addr = 8; -- break; -- } -- -- /* Check the PHY status */ -- ret = miiphy_set_current_dev(dev); -- if (ret > 0) -- goto error; -- -- bus = mdio_get_current_dev(); -- debug("Reading from bus %s\n", bus->name); -- -- ret = miiphy_write(dev, phy_addr, 0x1f, 3); -- if (ret > 0) -- goto error; -- -- mdelay(10); -- ret = miiphy_read(dev, phy_addr, 0x11, &value); -- if (ret > 0) -- goto error; -- -- mdelay(10); -- -- if ((value & 0xfff) == 0x401) { -- miiphy_write(dev, phy_addr, 0x1f, 0); -- printf("DPMAC %d:PHY is ..... Configured\n", dpmac); -- return; -- } -- --#if CONFIG_IS_ENABLED(DM_I2C) -- i2c_get_chip_for_busnum(0, i2c_phy_addr, 1, &udev); --#endif -- -- for (i = 0; i < 4; i++) { -- for (j = 0; j < 4; j++) { -- reg_pair[3].val = &ch_a_eq[i]; -- reg_pair[4].val = &ch_a_ctl2[j]; -- reg_pair[5].val = &ch_b_eq[i]; -- reg_pair[6].val = &ch_b_ctl2[j]; -- for (k = 0; k < 10; k++) { --#if !CONFIG_IS_ENABLED(DM_I2C) -- ret = i2c_write(i2c_phy_addr, -- reg_pair[k].addr, -- 1, reg_pair[k].val, 1); --#else -- ret = i2c_get_chip_for_busnum(0, -- i2c_phy_addr, -- 1, &udev); -- if (!ret) -- ret = dm_i2c_write(udev, -- reg_pair[k].addr, -- reg_pair[k].val, 1); --#endif -- if (ret) -- goto error; -- } -- -- mdelay(100); -- ret = miiphy_read(dev, phy_addr, 0x11, &value); -- if (ret > 0) -- goto error; -- -- mdelay(100); -- ret = miiphy_read(dev, phy_addr, 0x11, &value); -- if (ret > 0) -- goto error; -- -- if ((value & 0xfff) == 0x401) { -- printf("DPMAC %d :PHY is configured ", -- dpmac); -- printf("after setting repeater 0x%x\n", -- value); -- i = 5; -- j = 5; -- } else { -- printf("DPMAC %d :PHY is failed to ", -- dpmac); -- printf("configure the repeater 0x%x\n", value); -- } -- } -- } -- miiphy_write(dev, phy_addr, 0x1f, 0); --error: -- if (ret) -- printf("DPMAC %d ..... FAILED to configure PHY\n", dpmac); -- return; --} -- --static void qsgmii_configure_repeater(int dpmac) --{ -- uint8_t a = 0xf; -- int i, j, k; -- int i2c_phy_addr = 0; -- int phy_addr = 0; -- int i2c_addr[] = {0x58, 0x59, 0x5a, 0x5b}; -- -- uint8_t ch_a_eq[] = {0x1, 0x2, 0x3, 0x7}; -- uint8_t ch_a_ctl2[] = {0x81, 0x82, 0x83, 0x84}; -- uint8_t ch_b_eq[] = {0x1, 0x2, 0x3, 0x7}; -- uint8_t ch_b_ctl2[] = {0x81, 0x82, 0x83, 0x84}; -- -- u8 reg_val[6] = {0x18, 0x38, 0x4, 0x14, 0xb5, 0x20}; -- struct reg_pair reg_pair[10] = { -- {6, ®_val[0]}, {4, ®_val[1]}, -- {8, ®_val[2]}, {0xf, NULL}, -- {0x11, NULL}, {0x16, NULL}, -- {0x18, NULL}, {0x23, ®_val[3]}, -- {0x2d, ®_val[4]}, {4, ®_val[5]}, -- }; -- -- const char *dev = mdio_names[EMI1_SLOT1]; -- int ret = 0; -- unsigned short value; --#if CONFIG_IS_ENABLED(DM_I2C) -- struct udevice *udev; --#endif -- -- /* Set I2c to Slot 1 */ --#if !CONFIG_IS_ENABLED(DM_I2C) -- ret = i2c_write(0x77, 0, 0, &a, 1); --#else -- ret = i2c_get_chip_for_busnum(0, 0x77, 1, &udev); -- if (!ret) -- ret = dm_i2c_write(udev, 0, &a, 1); --#endif -- if (ret) -- goto error; -- -- switch (dpmac) { -- case 7: -- case 8: -- case 9: -- case 10: -- i2c_phy_addr = i2c_addr[2]; -- phy_addr = 8; -- break; -- -- case 3: -- case 4: -- case 5: -- case 6: -- i2c_phy_addr = i2c_addr[3]; -- phy_addr = 0xc; -- break; -- } -- -- /* Check the PHY status */ -- ret = miiphy_set_current_dev(dev); -- ret = miiphy_write(dev, phy_addr, 0x1f, 3); -- mdelay(10); -- ret = miiphy_read(dev, phy_addr, 0x11, &value); -- mdelay(10); -- ret = miiphy_read(dev, phy_addr, 0x11, &value); -- mdelay(10); -- if ((value & 0xf) == 0xf) { -- miiphy_write(dev, phy_addr, 0x1f, 0); -- printf("DPMAC %d :PHY is ..... Configured\n", dpmac); -- return; -- } -- --#if CONFIG_IS_ENABLED(DM_I2C) -- i2c_get_chip_for_busnum(0, i2c_phy_addr, 1, &udev); --#endif -- -- for (i = 0; i < 4; i++) { -- for (j = 0; j < 4; j++) { -- reg_pair[3].val = &ch_a_eq[i]; -- reg_pair[4].val = &ch_a_ctl2[j]; -- reg_pair[5].val = &ch_b_eq[i]; -- reg_pair[6].val = &ch_b_ctl2[j]; -- -- for (k = 0; k < 10; k++) { --#if !CONFIG_IS_ENABLED(DM_I2C) -- ret = i2c_write(i2c_phy_addr, -- reg_pair[k].addr, -- 1, reg_pair[k].val, 1); --#else -- ret = i2c_get_chip_for_busnum(0, -- i2c_addr[dpmac], -- 1, &udev); -- if (!ret) -- ret = dm_i2c_write(udev, -- reg_pair[k].addr, -- reg_pair[k].val, 1); --#endif -- if (ret) -- goto error; -- } -- -- ret = miiphy_read(dev, phy_addr, 0x11, &value); -- if (ret > 0) -- goto error; -- mdelay(1); -- ret = miiphy_read(dev, phy_addr, 0x11, &value); -- if (ret > 0) -- goto error; -- mdelay(10); -- if ((value & 0xf) == 0xf) { -- miiphy_write(dev, phy_addr, 0x1f, 0); -- printf("DPMAC %d :PHY is ..... Configured\n", -- dpmac); -- return; -- } -- } -- } --error: -- printf("DPMAC %d :PHY ..... FAILED to configure PHY\n", dpmac); -- return; --} -- --static const char *ls1088a_qds_mdio_name_for_muxval(u8 muxval) --{ -- return mdio_names[muxval]; --} -- --struct mii_dev *mii_dev_for_muxval(u8 muxval) --{ -- struct mii_dev *bus; -- const char *name = ls1088a_qds_mdio_name_for_muxval(muxval); -- -- if (!name) { -- printf("No bus for muxval %x\n", muxval); -- return NULL; -- } -- -- bus = miiphy_get_dev_by_name(name); -- -- if (!bus) { -- printf("No bus by name %s\n", name); -- return NULL; -- } -- -- return bus; --} -- --static void ls1088a_qds_enable_SFP_TX(u8 muxval) --{ -- u8 brdcfg9; -- -- brdcfg9 = QIXIS_READ(brdcfg[9]); -- brdcfg9 &= ~BRDCFG9_SFPTX_MASK; -- brdcfg9 |= (muxval << BRDCFG9_SFPTX_SHIFT); -- QIXIS_WRITE(brdcfg[9], brdcfg9); --} -- --static void ls1088a_qds_mux_mdio(u8 muxval) --{ -- u8 brdcfg4; -- -- if (muxval <= 5) { -- brdcfg4 = QIXIS_READ(brdcfg[4]); -- brdcfg4 &= ~BRDCFG4_EMISEL_MASK; -- brdcfg4 |= (muxval << BRDCFG4_EMISEL_SHIFT); -- QIXIS_WRITE(brdcfg[4], brdcfg4); -- } --} -- --static int ls1088a_qds_mdio_read(struct mii_dev *bus, int addr, -- int devad, int regnum) --{ -- struct ls1088a_qds_mdio *priv = bus->priv; -- -- ls1088a_qds_mux_mdio(priv->muxval); -- -- return priv->realbus->read(priv->realbus, addr, devad, regnum); --} -- --static int ls1088a_qds_mdio_write(struct mii_dev *bus, int addr, int devad, -- int regnum, u16 value) --{ -- struct ls1088a_qds_mdio *priv = bus->priv; -- -- ls1088a_qds_mux_mdio(priv->muxval); -- -- return priv->realbus->write(priv->realbus, addr, devad, regnum, value); --} -- --static int ls1088a_qds_mdio_reset(struct mii_dev *bus) --{ -- struct ls1088a_qds_mdio *priv = bus->priv; -- -- return priv->realbus->reset(priv->realbus); --} -- --static int ls1088a_qds_mdio_init(char *realbusname, u8 muxval) --{ -- struct ls1088a_qds_mdio *pmdio; -- struct mii_dev *bus = mdio_alloc(); -- -- if (!bus) { -- printf("Failed to allocate ls1088a_qds MDIO bus\n"); -- return -1; -- } -- -- pmdio = malloc(sizeof(*pmdio)); -- if (!pmdio) { -- printf("Failed to allocate ls1088a_qds private data\n"); -- free(bus); -- return -1; -- } -- -- bus->read = ls1088a_qds_mdio_read; -- bus->write = ls1088a_qds_mdio_write; -- bus->reset = ls1088a_qds_mdio_reset; -- sprintf(bus->name, ls1088a_qds_mdio_name_for_muxval(muxval)); -- -- pmdio->realbus = miiphy_get_dev_by_name(realbusname); -- -- if (!pmdio->realbus) { -- printf("No bus with name %s\n", realbusname); -- free(bus); -- free(pmdio); -- return -1; -- } -- -- pmdio->muxval = muxval; -- bus->priv = pmdio; -- -- return mdio_register(bus); --} -- --/* -- * Initialize the dpmac_info array. -- * -- */ --static void initialize_dpmac_to_slot(void) --{ -- struct ccsr_gur __iomem *gur = (void *)CFG_SYS_FSL_GUTS_ADDR; -- u32 serdes1_prtcl, cfg; -- -- cfg = in_le32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]) & -- FSL_CHASSIS3_SRDS1_PRTCL_MASK; -- cfg >>= FSL_CHASSIS3_SRDS1_PRTCL_SHIFT; -- serdes1_prtcl = serdes_get_number(FSL_SRDS_1, cfg); -- -- switch (serdes1_prtcl) { -- case 0x12: -- printf("qds: WRIOP: Supported SerDes1 Protocol 0x%02x\n", -- serdes1_prtcl); -- lane_to_slot_fsm1[0] = EMI1_SLOT1 - 1; -- lane_to_slot_fsm1[1] = EMI1_SLOT1 - 1; -- lane_to_slot_fsm1[2] = EMI1_SLOT1 - 1; -- lane_to_slot_fsm1[3] = EMI1_SLOT1 - 1; -- break; -- case 0x15: -- case 0x1D: -- printf("qds: WRIOP: Supported SerDes1 Protocol 0x%02x\n", -- serdes1_prtcl); -- lane_to_slot_fsm1[0] = EMI1_SLOT1 - 1; -- lane_to_slot_fsm1[1] = EMI1_SLOT1 - 1; -- lane_to_slot_fsm1[2] = EMI_NONE; -- lane_to_slot_fsm1[3] = EMI_NONE; -- break; -- case 0x1E: -- printf("qds: WRIOP: Supported SerDes1 Protocol 0x%02x\n", -- serdes1_prtcl); -- lane_to_slot_fsm1[0] = EMI1_SLOT1 - 1; -- lane_to_slot_fsm1[1] = EMI1_SLOT1 - 1; -- lane_to_slot_fsm1[2] = EMI1_SLOT1 - 1; -- lane_to_slot_fsm1[3] = EMI_NONE; -- break; -- case 0x3A: -- printf("qds: WRIOP: Supported SerDes1 Protocol 0x%02x\n", -- serdes1_prtcl); -- lane_to_slot_fsm1[0] = EMI1_SLOT1 - 1; -- lane_to_slot_fsm1[1] = EMI_NONE; -- lane_to_slot_fsm1[2] = EMI1_SLOT1 - 1; -- lane_to_slot_fsm1[3] = EMI1_SLOT1 - 1; -- break; -- -- default: -- printf("%s qds: WRIOP: Unsupported SerDes1 Protocol 0x%02x\n", -- __func__, serdes1_prtcl); -- break; -- } --} -- --void ls1088a_handle_phy_interface_sgmii(int dpmac_id) --{ -- struct mii_dev *bus; -- struct ccsr_gur __iomem *gur = (void *)CFG_SYS_FSL_GUTS_ADDR; -- u32 serdes1_prtcl, cfg; -- -- cfg = in_le32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]) & -- FSL_CHASSIS3_SRDS1_PRTCL_MASK; -- cfg >>= FSL_CHASSIS3_SRDS1_PRTCL_SHIFT; -- serdes1_prtcl = serdes_get_number(FSL_SRDS_1, cfg); -- -- int *riser_phy_addr; -- char *env_hwconfig = env_get("hwconfig"); -- -- if (hwconfig_f("xqsgmii", env_hwconfig)) -- riser_phy_addr = &xqsgii_riser_phy_addr[0]; -- else -- riser_phy_addr = &sgmii_riser_phy_addr[0]; -- -- switch (serdes1_prtcl) { -- case 0x12: -- case 0x15: -- case 0x1E: -- case 0x3A: -- switch (dpmac_id) { -- case 1: -- wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[1]); -- break; -- case 2: -- wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[0]); -- break; -- case 3: -- wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[3]); -- break; -- case 7: -- wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[2]); -- break; -- default: -- printf("WRIOP: Wrong DPMAC%d set to SGMII", dpmac_id); -- break; -- } -- break; -- default: -- printf("%s qds: WRIOP: Unsupported SerDes1 Protocol 0x%02x\n", -- __func__, serdes1_prtcl); -- return; -- } -- dpmac_info[dpmac_id].board_mux = EMI1_SLOT1; -- bus = mii_dev_for_muxval(EMI1_SLOT1); -- wriop_set_mdio(dpmac_id, bus); --} -- --void ls1088a_handle_phy_interface_qsgmii(int dpmac_id) --{ -- struct mii_dev *bus; -- struct ccsr_gur __iomem *gur = (void *)CFG_SYS_FSL_GUTS_ADDR; -- u32 serdes1_prtcl, cfg; -- -- cfg = in_le32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]) & -- FSL_CHASSIS3_SRDS1_PRTCL_MASK; -- cfg >>= FSL_CHASSIS3_SRDS1_PRTCL_SHIFT; -- serdes1_prtcl = serdes_get_number(FSL_SRDS_1, cfg); -- -- switch (serdes1_prtcl) { -- case 0x1D: -- case 0x1E: -- switch (dpmac_id) { -- case 3: -- case 4: -- case 5: -- case 6: -- wriop_set_phy_address(dpmac_id, 0, dpmac_id + 9); -- break; -- case 7: -- case 8: -- case 9: -- case 10: -- wriop_set_phy_address(dpmac_id, 0, dpmac_id + 1); -- break; -- } -- -- dpmac_info[dpmac_id].board_mux = EMI1_SLOT1; -- bus = mii_dev_for_muxval(EMI1_SLOT1); -- wriop_set_mdio(dpmac_id, bus); -- break; -- default: -- printf("qds: WRIOP: Unsupported SerDes Protocol 0x%02x\n", -- serdes1_prtcl); -- break; -- } --} -- --void ls1088a_handle_phy_interface_xsgmii(int i) --{ -- struct ccsr_gur __iomem *gur = (void *)CFG_SYS_FSL_GUTS_ADDR; -- u32 serdes1_prtcl, cfg; -- -- cfg = in_le32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]) & -- FSL_CHASSIS3_SRDS1_PRTCL_MASK; -- cfg >>= FSL_CHASSIS3_SRDS1_PRTCL_SHIFT; -- serdes1_prtcl = serdes_get_number(FSL_SRDS_1, cfg); -- -- switch (serdes1_prtcl) { -- case 0x15: -- case 0x1D: -- case 0x1E: -- wriop_set_phy_address(i, 0, i + 26); -- ls1088a_qds_enable_SFP_TX(SFP_TX); -- break; -- default: -- printf("qds: WRIOP: Unsupported SerDes Protocol 0x%02x\n", -- serdes1_prtcl); -- break; -- } --} -- --static void ls1088a_handle_phy_interface_rgmii(int dpmac_id) --{ -- struct ccsr_gur __iomem *gur = (void *)CFG_SYS_FSL_GUTS_ADDR; -- u32 serdes1_prtcl, cfg; -- struct mii_dev *bus; -- -- cfg = in_le32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]) & -- FSL_CHASSIS3_SRDS1_PRTCL_MASK; -- cfg >>= FSL_CHASSIS3_SRDS1_PRTCL_SHIFT; -- serdes1_prtcl = serdes_get_number(FSL_SRDS_1, cfg); -- -- switch (dpmac_id) { -- case 4: -- wriop_set_phy_address(dpmac_id, 0, RGMII_PHY1_ADDR); -- dpmac_info[dpmac_id].board_mux = EMI1_RGMII1; -- bus = mii_dev_for_muxval(EMI1_RGMII1); -- wriop_set_mdio(dpmac_id, bus); -- break; -- case 5: -- wriop_set_phy_address(dpmac_id, 0, RGMII_PHY2_ADDR); -- dpmac_info[dpmac_id].board_mux = EMI1_RGMII2; -- bus = mii_dev_for_muxval(EMI1_RGMII2); -- wriop_set_mdio(dpmac_id, bus); -- break; -- default: -- printf("qds: WRIOP: Unsupported RGMII SerDes Protocol 0x%02x\n", -- serdes1_prtcl); -- break; -- } --} --#endif -- --int board_eth_init(struct bd_info *bis) --{ -- int error = 0, i; --#ifdef CONFIG_FSL_MC_ENET -- struct memac_mdio_info *memac_mdio0_info; -- char *env_hwconfig = env_get("hwconfig"); -- -- initialize_dpmac_to_slot(); -- -- memac_mdio0_info = (struct memac_mdio_info *)malloc( -- sizeof(struct memac_mdio_info)); -- memac_mdio0_info->regs = -- (struct memac_mdio_controller *) -- CFG_SYS_FSL_WRIOP1_MDIO1; -- memac_mdio0_info->name = DEFAULT_WRIOP_MDIO1_NAME; -- -- /* Register the real MDIO1 bus */ -- fm_memac_mdio_init(bis, memac_mdio0_info); -- /* Register the muxing front-ends to the MDIO buses */ -- ls1088a_qds_mdio_init(DEFAULT_WRIOP_MDIO1_NAME, EMI1_RGMII1); -- ls1088a_qds_mdio_init(DEFAULT_WRIOP_MDIO1_NAME, EMI1_RGMII2); -- ls1088a_qds_mdio_init(DEFAULT_WRIOP_MDIO1_NAME, EMI1_SLOT1); -- -- for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) { -- switch (wriop_get_enet_if(i)) { -- case PHY_INTERFACE_MODE_RGMII: -- case PHY_INTERFACE_MODE_RGMII_ID: -- ls1088a_handle_phy_interface_rgmii(i); -- break; -- case PHY_INTERFACE_MODE_QSGMII: -- ls1088a_handle_phy_interface_qsgmii(i); -- break; -- case PHY_INTERFACE_MODE_SGMII: -- ls1088a_handle_phy_interface_sgmii(i); -- break; -- case PHY_INTERFACE_MODE_XGMII: -- ls1088a_handle_phy_interface_xsgmii(i); -- break; -- default: -- break; -- -- if (i == 16) -- i = NUM_WRIOP_PORTS; -- } -- } -- -- error = cpu_eth_init(bis); -- -- if (hwconfig_f("xqsgmii", env_hwconfig)) { -- for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) { -- switch (wriop_get_enet_if(i)) { -- case PHY_INTERFACE_MODE_QSGMII: -- qsgmii_configure_repeater(i); -- break; -- case PHY_INTERFACE_MODE_SGMII: -- sgmii_configure_repeater(i); -- break; -- default: -- break; -- } -- -- if (i == 16) -- i = NUM_WRIOP_PORTS; -- } -- } --#endif -- error = pci_eth_init(bis); -- return error; --} --#endif // !CONFIG_DM_ETH - - #if defined(CONFIG_RESET_PHY_R) - void reset_phy(void) -@@ -747,10 +14,10 @@ void reset_phy(void) - } - #endif /* CONFIG_RESET_PHY_R */ - --#if defined(CONFIG_DM_ETH) && defined(CONFIG_MULTI_DTB_FIT) -+#if defined(CONFIG_MULTI_DTB_FIT) - --/* Structure to hold SERDES protocols supported in case of -- * CONFIG_DM_ETH enabled (network interfaces are described in the DTS). -+/* Structure to hold SERDES protocols supported (network interfaces are -+ * described in the DTS). - * - * @serdes_block: the index of the SERDES block - * @serdes_protocol: the decimal value of the protocol supported -diff --git a/board/freescale/ls1088a/eth_ls1088ardb.c b/board/freescale/ls1088a/eth_ls1088ardb.c -index 5792070f93..fb6f9c1a81 100644 ---- a/board/freescale/ls1088a/eth_ls1088ardb.c -+++ b/board/freescale/ls1088a/eth_ls1088ardb.c -@@ -3,100 +3,7 @@ - * Copyright 2017 NXP - */ - --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include - #include --#include -- --#ifndef CONFIG_DM_ETH --int board_eth_init(struct bd_info *bis) --{ --#if defined(CONFIG_FSL_MC_ENET) -- int i, interface; -- struct memac_mdio_info mdio_info; -- struct mii_dev *dev; -- struct ccsr_gur *gur = (void *)(CFG_SYS_FSL_GUTS_ADDR); -- struct memac_mdio_controller *reg; -- u32 srds_s1, cfg; -- -- cfg = in_le32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]) & -- FSL_CHASSIS3_SRDS1_PRTCL_MASK; -- cfg >>= FSL_CHASSIS3_SRDS1_PRTCL_SHIFT; -- -- srds_s1 = serdes_get_number(FSL_SRDS_1, cfg); -- -- reg = (struct memac_mdio_controller *)CFG_SYS_FSL_WRIOP1_MDIO1; -- mdio_info.regs = reg; -- mdio_info.name = DEFAULT_WRIOP_MDIO1_NAME; -- -- /* Register the EMI 1 */ -- fm_memac_mdio_init(bis, &mdio_info); -- -- reg = (struct memac_mdio_controller *)CFG_SYS_FSL_WRIOP1_MDIO2; -- mdio_info.regs = reg; -- mdio_info.name = DEFAULT_WRIOP_MDIO2_NAME; -- -- /* Register the EMI 2 */ -- fm_memac_mdio_init(bis, &mdio_info); -- -- switch (srds_s1) { -- case 0x1D: -- /* -- * 10GBase-R does not need a PHY to work, but to avoid U-boot -- * use default PHY address which is zero to a MAC when it found -- * a MAC has no PHY address, we give a PHY address to 10GBase-R -- * MAC error. -- */ -- wriop_set_phy_address(WRIOP1_DPMAC1, 0, 0x0a); -- wriop_set_phy_address(WRIOP1_DPMAC2, 0, AQ_PHY_ADDR1); -- wriop_set_phy_address(WRIOP1_DPMAC3, 0, QSGMII1_PORT1_PHY_ADDR); -- wriop_set_phy_address(WRIOP1_DPMAC4, 0, QSGMII1_PORT2_PHY_ADDR); -- wriop_set_phy_address(WRIOP1_DPMAC5, 0, QSGMII1_PORT3_PHY_ADDR); -- wriop_set_phy_address(WRIOP1_DPMAC6, 0, QSGMII1_PORT4_PHY_ADDR); -- wriop_set_phy_address(WRIOP1_DPMAC7, 0, QSGMII2_PORT1_PHY_ADDR); -- wriop_set_phy_address(WRIOP1_DPMAC8, 0, QSGMII2_PORT2_PHY_ADDR); -- wriop_set_phy_address(WRIOP1_DPMAC9, 0, QSGMII2_PORT3_PHY_ADDR); -- wriop_set_phy_address(WRIOP1_DPMAC10, 0, -- QSGMII2_PORT4_PHY_ADDR); -- -- break; -- default: -- printf("SerDes1 protocol 0x%x is not supported on LS1088ARDB\n", -- srds_s1); -- break; -- } -- -- for (i = WRIOP1_DPMAC3; i <= WRIOP1_DPMAC10; i++) { -- interface = wriop_get_enet_if(i); -- switch (interface) { -- case PHY_INTERFACE_MODE_QSGMII: -- dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO1_NAME); -- wriop_set_mdio(i, dev); -- break; -- default: -- break; -- } -- } -- -- dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO2_NAME); -- wriop_set_mdio(WRIOP1_DPMAC2, dev); -- -- cpu_eth_init(bis); --#endif /* CONFIG_FMAN_ENET */ -- -- return pci_eth_init(bis); --} --#endif - - #if defined(CONFIG_RESET_PHY_R) - void reset_phy(void) -diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c -index 0d3f22ce2b..7a1047a77f 100644 ---- a/board/freescale/ls1088a/ls1088a.c -+++ b/board/freescale/ls1088a/ls1088a.c -@@ -824,7 +824,7 @@ int board_init(void) - ppa_init(); - #endif - --#if !defined(CONFIG_SYS_EARLY_PCI_INIT) && defined(CONFIG_DM_ETH) -+#if !defined(CONFIG_SYS_EARLY_PCI_INIT) - pci_init(); - #endif - -diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c -index 6da6e5c841..0d0d5de156 100644 ---- a/board/freescale/ls2080aqds/eth.c -+++ b/board/freescale/ls2080aqds/eth.c -@@ -3,987 +3,12 @@ - * Copyright 2015 Freescale Semiconductor, Inc. - */ - --#include --#include --#include --#include --#include - #include - #include --#include --#include --#include --#include --#include --#include - #include --#include --#include -- --#include "../common/qixis.h" -- --#include "ls2080aqds_qixis.h" - - #define MC_BOOT_ENV_VAR "mcinitcmd" - --#ifndef CONFIG_DM_ETH -- --#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) -- /* - In LS2080A there are only 16 SERDES lanes, spread across 2 SERDES banks. -- * Bank 1 -> Lanes A, B, C, D, E, F, G, H -- * Bank 2 -> Lanes A,B, C, D, E, F, G, H -- */ -- -- /* Mapping of 16 SERDES lanes to LS2080A QDS board slots. A value of '0' here -- * means that the mapping must be determined dynamically, or that the lane -- * maps to something other than a board slot. -- */ -- --static u8 lane_to_slot_fsm1[] = { -- 0, 0, 0, 0, 0, 0, 0, 0 --}; -- --static u8 lane_to_slot_fsm2[] = { -- 0, 0, 0, 0, 0, 0, 0, 0 --}; -- --/* On the Vitesse VSC8234XHG SGMII riser card there are 4 SGMII PHYs -- * housed. -- */ -- --static int xqsgii_riser_phy_addr[] = { -- XQSGMII_CARD_PHY1_PORT0_ADDR, -- XQSGMII_CARD_PHY2_PORT0_ADDR, -- XQSGMII_CARD_PHY3_PORT0_ADDR, -- XQSGMII_CARD_PHY4_PORT0_ADDR, -- XQSGMII_CARD_PHY3_PORT2_ADDR, -- XQSGMII_CARD_PHY1_PORT2_ADDR, -- XQSGMII_CARD_PHY4_PORT2_ADDR, -- XQSGMII_CARD_PHY2_PORT2_ADDR, --}; -- --static int sgmii_riser_phy_addr[] = { -- SGMII_CARD_PORT1_PHY_ADDR, -- SGMII_CARD_PORT2_PHY_ADDR, -- SGMII_CARD_PORT3_PHY_ADDR, -- SGMII_CARD_PORT4_PHY_ADDR, --}; -- --/* Slot2 does not have EMI connections */ --#define EMI_NONE 0xFF --#define EMI1_SLOT1 0 --#define EMI1_SLOT2 1 --#define EMI1_SLOT3 2 --#define EMI1_SLOT4 3 --#define EMI1_SLOT5 4 --#define EMI1_SLOT6 5 --#define EMI2 6 --#define SFP_TX 0 -- --static const char * const mdio_names[] = { -- "LS2080A_QDS_MDIO0", -- "LS2080A_QDS_MDIO1", -- "LS2080A_QDS_MDIO2", -- "LS2080A_QDS_MDIO3", -- "LS2080A_QDS_MDIO4", -- "LS2080A_QDS_MDIO5", -- DEFAULT_WRIOP_MDIO2_NAME, --}; -- --struct ls2080a_qds_mdio { -- u8 muxval; -- struct mii_dev *realbus; --}; -- --struct reg_pair { -- uint addr; -- u8 *val; --}; -- --static void sgmii_configure_repeater(int serdes_port) --{ -- struct mii_dev *bus; -- uint8_t a = 0xf; -- int i, j, k, ret; -- int dpmac_id = 0, dpmac, mii_bus = 0; -- unsigned short value; -- char dev[2][20] = {"LS2080A_QDS_MDIO0", "LS2080A_QDS_MDIO3"}; -- uint8_t i2c_addr[] = {0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5f, 0x60}; -- -- uint8_t ch_a_eq[] = {0x1, 0x2, 0x3, 0x7}; -- uint8_t ch_a_ctl2[] = {0x81, 0x82, 0x83, 0x84}; -- uint8_t ch_b_eq[] = {0x1, 0x2, 0x3, 0x7}; -- uint8_t ch_b_ctl2[] = {0x81, 0x82, 0x83, 0x84}; -- -- u8 reg_val[6] = {0x18, 0x38, 0x4, 0x14, 0xb5, 0x20}; -- struct reg_pair reg_pair[10] = { -- {6, ®_val[0]}, {4, ®_val[1]}, -- {8, ®_val[2]}, {0xf, NULL}, -- {0x11, NULL}, {0x16, NULL}, -- {0x18, NULL}, {0x23, ®_val[3]}, -- {0x2d, ®_val[4]}, {4, ®_val[5]}, -- }; -- -- int *riser_phy_addr = &xqsgii_riser_phy_addr[0]; --#if CONFIG_IS_ENABLED(DM_I2C) -- struct udevice *udev; --#endif -- -- /* Set I2c to Slot 1 */ --#if !CONFIG_IS_ENABLED(DM_I2C) -- ret = i2c_write(0x77, 0, 0, &a, 1); --#else -- ret = i2c_get_chip_for_busnum(0, 0x77, 1, &udev); -- if (!ret) -- ret = dm_i2c_write(udev, 0, &a, 1); --#endif -- if (ret) -- goto error; -- -- for (dpmac = 0; dpmac < 8; dpmac++) { -- /* Check the PHY status */ -- switch (serdes_port) { -- case 1: -- mii_bus = 0; -- dpmac_id = dpmac + 1; -- break; -- case 2: -- mii_bus = 1; -- dpmac_id = dpmac + 9; -- a = 0xb; --#if !CONFIG_IS_ENABLED(DM_I2C) -- ret = i2c_write(0x76, 0, 0, &a, 1); --#else -- ret = i2c_get_chip_for_busnum(0, 0x76, 1, &udev); -- if (!ret) -- ret = dm_i2c_write(udev, 0, &a, 1); --#endif -- if (ret) -- goto error; -- break; -- } -- -- ret = miiphy_set_current_dev(dev[mii_bus]); -- if (ret > 0) -- goto error; -- -- bus = mdio_get_current_dev(); -- debug("Reading from bus %s\n", bus->name); -- -- ret = miiphy_write(dev[mii_bus], riser_phy_addr[dpmac], 0x1f, -- 3); -- if (ret > 0) -- goto error; -- -- mdelay(10); -- ret = miiphy_read(dev[mii_bus], riser_phy_addr[dpmac], 0x11, -- &value); -- if (ret > 0) -- goto error; -- -- mdelay(10); -- -- if ((value & 0xfff) == 0x401) { -- printf("DPMAC %d:PHY is ..... Configured\n", dpmac_id); -- miiphy_write(dev[mii_bus], riser_phy_addr[dpmac], -- 0x1f, 0); -- continue; -- } -- -- for (i = 0; i < 4; i++) { -- for (j = 0; j < 4; j++) { -- reg_pair[3].val = &ch_a_eq[i]; -- reg_pair[4].val = &ch_a_ctl2[j]; -- reg_pair[5].val = &ch_b_eq[i]; -- reg_pair[6].val = &ch_b_ctl2[j]; -- -- for (k = 0; k < 10; k++) { --#if !CONFIG_IS_ENABLED(DM_I2C) -- ret = i2c_write(i2c_addr[dpmac], -- reg_pair[k].addr, -- 1, reg_pair[k].val, 1); --#else -- ret = i2c_get_chip_for_busnum(0, -- i2c_addr[dpmac], -- 1, &udev); -- if (!ret) -- ret = dm_i2c_write(udev, -- reg_pair[k].addr, -- reg_pair[k].val, 1); --#endif -- if (ret) -- goto error; -- } -- -- mdelay(100); -- ret = miiphy_read(dev[mii_bus], -- riser_phy_addr[dpmac], -- 0x11, &value); -- if (ret > 0) -- goto error; -- -- mdelay(100); -- ret = miiphy_read(dev[mii_bus], -- riser_phy_addr[dpmac], -- 0x11, &value); -- if (ret > 0) -- goto error; -- -- if ((value & 0xfff) == 0x401) { -- printf("DPMAC %d :PHY is configured ", -- dpmac_id); -- printf("after setting repeater 0x%x\n", -- value); -- i = 5; -- j = 5; -- } else { -- printf("DPMAC %d :PHY is failed to ", -- dpmac_id); -- printf("configure the repeater 0x%x\n", -- value); -- } -- } -- } -- miiphy_write(dev[mii_bus], riser_phy_addr[dpmac], 0x1f, 0); -- } --error: -- if (ret) -- printf("DPMAC %d ..... FAILED to configure PHY\n", dpmac_id); -- return; --} -- --static void qsgmii_configure_repeater(int dpmac) --{ -- uint8_t a = 0xf; -- int i, j, k; -- int i2c_phy_addr = 0; -- int phy_addr = 0; -- int i2c_addr[] = {0x58, 0x59, 0x5a, 0x5b}; -- -- uint8_t ch_a_eq[] = {0x1, 0x2, 0x3, 0x7}; -- uint8_t ch_a_ctl2[] = {0x81, 0x82, 0x83, 0x84}; -- uint8_t ch_b_eq[] = {0x1, 0x2, 0x3, 0x7}; -- uint8_t ch_b_ctl2[] = {0x81, 0x82, 0x83, 0x84}; -- -- u8 reg_val[6] = {0x18, 0x38, 0x4, 0x14, 0xb5, 0x20}; -- struct reg_pair reg_pair[10] = { -- {6, ®_val[0]}, {4, ®_val[1]}, -- {8, ®_val[2]}, {0xf, NULL}, -- {0x11, NULL}, {0x16, NULL}, -- {0x18, NULL}, {0x23, ®_val[3]}, -- {0x2d, ®_val[4]}, {4, ®_val[5]}, -- }; -- -- const char *dev = "LS2080A_QDS_MDIO0"; -- int ret = 0; -- unsigned short value; --#if CONFIG_IS_ENABLED(DM_I2C) -- struct udevice *udev; --#endif -- -- /* Set I2c to Slot 1 */ --#if !CONFIG_IS_ENABLED(DM_I2C) -- ret = i2c_write(0x77, 0, 0, &a, 1); --#else -- ret = i2c_get_chip_for_busnum(0, 0x77, 1, &udev); -- if (!ret) -- ret = dm_i2c_write(udev, 0, &a, 1); --#endif -- if (ret) -- goto error; -- -- switch (dpmac) { -- case 1: -- case 2: -- case 3: -- case 4: -- i2c_phy_addr = i2c_addr[0]; -- phy_addr = 0; -- break; -- -- case 5: -- case 6: -- case 7: -- case 8: -- i2c_phy_addr = i2c_addr[1]; -- phy_addr = 4; -- break; -- -- case 9: -- case 10: -- case 11: -- case 12: -- i2c_phy_addr = i2c_addr[2]; -- phy_addr = 8; -- break; -- -- case 13: -- case 14: -- case 15: -- case 16: -- i2c_phy_addr = i2c_addr[3]; -- phy_addr = 0xc; -- break; -- } -- -- /* Check the PHY status */ -- ret = miiphy_set_current_dev(dev); -- ret = miiphy_write(dev, phy_addr, 0x1f, 3); -- mdelay(10); -- ret = miiphy_read(dev, phy_addr, 0x11, &value); -- mdelay(10); -- ret = miiphy_read(dev, phy_addr, 0x11, &value); -- mdelay(10); -- if ((value & 0xf) == 0xf) { -- printf("DPMAC %d :PHY is ..... Configured\n", dpmac); -- return; -- } -- -- for (i = 0; i < 4; i++) { -- for (j = 0; j < 4; j++) { -- reg_pair[3].val = &ch_a_eq[i]; -- reg_pair[4].val = &ch_a_ctl2[j]; -- reg_pair[5].val = &ch_b_eq[i]; -- reg_pair[6].val = &ch_b_ctl2[j]; -- -- for (k = 0; k < 10; k++) { --#if !CONFIG_IS_ENABLED(DM_I2C) -- ret = i2c_write(i2c_phy_addr, -- reg_pair[k].addr, -- 1, reg_pair[k].val, 1); --#else -- ret = i2c_get_chip_for_busnum(0, -- i2c_phy_addr, -- 1, &udev); -- if (!ret) -- ret = dm_i2c_write(udev, -- reg_pair[k].addr, -- reg_pair[k].val, 1); --#endif -- if (ret) -- goto error; -- } -- -- mdelay(100); -- ret = miiphy_read(dev, phy_addr, 0x11, &value); -- if (ret > 0) -- goto error; -- mdelay(1); -- ret = miiphy_read(dev, phy_addr, 0x11, &value); -- if (ret > 0) -- goto error; -- mdelay(10); -- if ((value & 0xf) == 0xf) { -- printf("DPMAC %d :PHY is ..... Configured\n", -- dpmac); -- return; -- } -- } -- } --error: -- printf("DPMAC %d :PHY ..... FAILED to configure PHY\n", dpmac); -- return; --} -- --static const char *ls2080a_qds_mdio_name_for_muxval(u8 muxval) --{ -- return mdio_names[muxval]; --} -- --struct mii_dev *mii_dev_for_muxval(u8 muxval) --{ -- struct mii_dev *bus; -- const char *name = ls2080a_qds_mdio_name_for_muxval(muxval); -- -- if (!name) { -- printf("No bus for muxval %x\n", muxval); -- return NULL; -- } -- -- bus = miiphy_get_dev_by_name(name); -- -- if (!bus) { -- printf("No bus by name %s\n", name); -- return NULL; -- } -- -- return bus; --} -- --static void ls2080a_qds_enable_SFP_TX(u8 muxval) --{ -- u8 brdcfg9; -- -- brdcfg9 = QIXIS_READ(brdcfg[9]); -- brdcfg9 &= ~BRDCFG9_SFPTX_MASK; -- brdcfg9 |= (muxval << BRDCFG9_SFPTX_SHIFT); -- QIXIS_WRITE(brdcfg[9], brdcfg9); --} -- --static void ls2080a_qds_mux_mdio(u8 muxval) --{ -- u8 brdcfg4; -- -- if (muxval <= 5) { -- brdcfg4 = QIXIS_READ(brdcfg[4]); -- brdcfg4 &= ~BRDCFG4_EMISEL_MASK; -- brdcfg4 |= (muxval << BRDCFG4_EMISEL_SHIFT); -- QIXIS_WRITE(brdcfg[4], brdcfg4); -- } --} -- --static int ls2080a_qds_mdio_read(struct mii_dev *bus, int addr, -- int devad, int regnum) --{ -- struct ls2080a_qds_mdio *priv = bus->priv; -- -- ls2080a_qds_mux_mdio(priv->muxval); -- -- return priv->realbus->read(priv->realbus, addr, devad, regnum); --} -- --static int ls2080a_qds_mdio_write(struct mii_dev *bus, int addr, int devad, -- int regnum, u16 value) --{ -- struct ls2080a_qds_mdio *priv = bus->priv; -- -- ls2080a_qds_mux_mdio(priv->muxval); -- -- return priv->realbus->write(priv->realbus, addr, devad, regnum, value); --} -- --static int ls2080a_qds_mdio_reset(struct mii_dev *bus) --{ -- struct ls2080a_qds_mdio *priv = bus->priv; -- -- return priv->realbus->reset(priv->realbus); --} -- --static int ls2080a_qds_mdio_init(char *realbusname, u8 muxval) --{ -- struct ls2080a_qds_mdio *pmdio; -- struct mii_dev *bus = mdio_alloc(); -- -- if (!bus) { -- printf("Failed to allocate ls2080a_qds MDIO bus\n"); -- return -1; -- } -- -- pmdio = malloc(sizeof(*pmdio)); -- if (!pmdio) { -- printf("Failed to allocate ls2080a_qds private data\n"); -- free(bus); -- return -1; -- } -- -- bus->read = ls2080a_qds_mdio_read; -- bus->write = ls2080a_qds_mdio_write; -- bus->reset = ls2080a_qds_mdio_reset; -- strcpy(bus->name, ls2080a_qds_mdio_name_for_muxval(muxval)); -- -- pmdio->realbus = miiphy_get_dev_by_name(realbusname); -- -- if (!pmdio->realbus) { -- printf("No bus with name %s\n", realbusname); -- free(bus); -- free(pmdio); -- return -1; -- } -- -- pmdio->muxval = muxval; -- bus->priv = pmdio; -- -- return mdio_register(bus); --} -- --/* -- * Initialize the dpmac_info array. -- * -- */ --static void initialize_dpmac_to_slot(void) --{ -- struct ccsr_gur __iomem *gur = (void *)CFG_SYS_FSL_GUTS_ADDR; -- int serdes1_prtcl = (in_le32(&gur->rcwsr[28]) & -- FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK) -- >> FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_SHIFT; -- int serdes2_prtcl = (in_le32(&gur->rcwsr[28]) & -- FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_MASK) -- >> FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_SHIFT; -- -- char *env_hwconfig; -- env_hwconfig = env_get("hwconfig"); -- -- switch (serdes1_prtcl) { -- case 0x07: -- case 0x09: -- case 0x33: -- printf("qds: WRIOP: Supported SerDes1 Protocol 0x%02x\n", -- serdes1_prtcl); -- lane_to_slot_fsm1[0] = EMI1_SLOT1; -- lane_to_slot_fsm1[1] = EMI1_SLOT1; -- lane_to_slot_fsm1[2] = EMI1_SLOT1; -- lane_to_slot_fsm1[3] = EMI1_SLOT1; -- if (hwconfig_f("xqsgmii", env_hwconfig)) { -- lane_to_slot_fsm1[4] = EMI1_SLOT1; -- lane_to_slot_fsm1[5] = EMI1_SLOT1; -- lane_to_slot_fsm1[6] = EMI1_SLOT1; -- lane_to_slot_fsm1[7] = EMI1_SLOT1; -- } else { -- lane_to_slot_fsm1[4] = EMI1_SLOT2; -- lane_to_slot_fsm1[5] = EMI1_SLOT2; -- lane_to_slot_fsm1[6] = EMI1_SLOT2; -- lane_to_slot_fsm1[7] = EMI1_SLOT2; -- } -- break; -- -- case 0x39: -- printf("qds: WRIOP: Supported SerDes1 Protocol 0x%02x\n", -- serdes1_prtcl); -- if (hwconfig_f("xqsgmii", env_hwconfig)) { -- lane_to_slot_fsm1[0] = EMI1_SLOT3; -- lane_to_slot_fsm1[1] = EMI1_SLOT3; -- lane_to_slot_fsm1[2] = EMI1_SLOT3; -- lane_to_slot_fsm1[3] = EMI_NONE; -- } else { -- lane_to_slot_fsm1[0] = EMI_NONE; -- lane_to_slot_fsm1[1] = EMI_NONE; -- lane_to_slot_fsm1[2] = EMI_NONE; -- lane_to_slot_fsm1[3] = EMI_NONE; -- } -- lane_to_slot_fsm1[4] = EMI1_SLOT3; -- lane_to_slot_fsm1[5] = EMI1_SLOT3; -- lane_to_slot_fsm1[6] = EMI1_SLOT3; -- lane_to_slot_fsm1[7] = EMI_NONE; -- break; -- -- case 0x4D: -- printf("qds: WRIOP: Supported SerDes1 Protocol 0x%02x\n", -- serdes1_prtcl); -- if (hwconfig_f("xqsgmii", env_hwconfig)) { -- lane_to_slot_fsm1[0] = EMI1_SLOT3; -- lane_to_slot_fsm1[1] = EMI1_SLOT3; -- lane_to_slot_fsm1[2] = EMI_NONE; -- lane_to_slot_fsm1[3] = EMI_NONE; -- } else { -- lane_to_slot_fsm1[0] = EMI_NONE; -- lane_to_slot_fsm1[1] = EMI_NONE; -- lane_to_slot_fsm1[2] = EMI_NONE; -- lane_to_slot_fsm1[3] = EMI_NONE; -- } -- lane_to_slot_fsm1[4] = EMI1_SLOT3; -- lane_to_slot_fsm1[5] = EMI1_SLOT3; -- lane_to_slot_fsm1[6] = EMI_NONE; -- lane_to_slot_fsm1[7] = EMI_NONE; -- break; -- -- case 0x2A: -- case 0x4B: -- case 0x4C: -- printf("qds: WRIOP: Supported SerDes1 Protocol 0x%02x\n", -- serdes1_prtcl); -- break; -- default: -- printf("%s qds: WRIOP: Unsupported SerDes1 Protocol 0x%02x\n", -- __func__, serdes1_prtcl); -- break; -- } -- -- switch (serdes2_prtcl) { -- case 0x07: -- case 0x08: -- case 0x09: -- case 0x49: -- printf("qds: WRIOP: Supported SerDes2 Protocol 0x%02x\n", -- serdes2_prtcl); -- lane_to_slot_fsm2[0] = EMI1_SLOT4; -- lane_to_slot_fsm2[1] = EMI1_SLOT4; -- lane_to_slot_fsm2[2] = EMI1_SLOT4; -- lane_to_slot_fsm2[3] = EMI1_SLOT4; -- -- if (hwconfig_f("xqsgmii", env_hwconfig)) { -- lane_to_slot_fsm2[4] = EMI1_SLOT4; -- lane_to_slot_fsm2[5] = EMI1_SLOT4; -- lane_to_slot_fsm2[6] = EMI1_SLOT4; -- lane_to_slot_fsm2[7] = EMI1_SLOT4; -- } else { -- /* No MDIO physical connection */ -- lane_to_slot_fsm2[4] = EMI1_SLOT6; -- lane_to_slot_fsm2[5] = EMI1_SLOT6; -- lane_to_slot_fsm2[6] = EMI1_SLOT6; -- lane_to_slot_fsm2[7] = EMI1_SLOT6; -- } -- break; -- -- case 0x47: -- printf("qds: WRIOP: Supported SerDes2 Protocol 0x%02x\n", -- serdes2_prtcl); -- lane_to_slot_fsm2[0] = EMI_NONE; -- lane_to_slot_fsm2[1] = EMI1_SLOT5; -- lane_to_slot_fsm2[2] = EMI1_SLOT5; -- lane_to_slot_fsm2[3] = EMI1_SLOT5; -- -- if (hwconfig_f("xqsgmii", env_hwconfig)) { -- lane_to_slot_fsm2[4] = EMI_NONE; -- lane_to_slot_fsm2[5] = EMI1_SLOT5; -- lane_to_slot_fsm2[6] = EMI1_SLOT5; -- lane_to_slot_fsm2[7] = EMI1_SLOT5; -- } -- break; -- -- case 0x57: -- printf("qds: WRIOP: Supported SerDes2 Protocol 0x%02x\n", -- serdes2_prtcl); -- if (hwconfig_f("xqsgmii", env_hwconfig)) { -- lane_to_slot_fsm2[0] = EMI_NONE; -- lane_to_slot_fsm2[1] = EMI_NONE; -- lane_to_slot_fsm2[2] = EMI_NONE; -- lane_to_slot_fsm2[3] = EMI_NONE; -- } -- lane_to_slot_fsm2[4] = EMI_NONE; -- lane_to_slot_fsm2[5] = EMI_NONE; -- lane_to_slot_fsm2[6] = EMI1_SLOT5; -- lane_to_slot_fsm2[7] = EMI1_SLOT5; -- break; -- -- default: -- printf(" %s qds: WRIOP: Unsupported SerDes2 Protocol 0x%02x\n", -- __func__ , serdes2_prtcl); -- break; -- } --} -- --void ls2080a_handle_phy_interface_sgmii(int dpmac_id) --{ -- int lane, slot; -- struct mii_dev *bus; -- struct ccsr_gur __iomem *gur = (void *)CFG_SYS_FSL_GUTS_ADDR; -- int serdes1_prtcl = (in_le32(&gur->rcwsr[28]) & -- FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK) -- >> FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_SHIFT; -- int serdes2_prtcl = (in_le32(&gur->rcwsr[28]) & -- FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_MASK) -- >> FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_SHIFT; -- -- int *riser_phy_addr; -- char *env_hwconfig = env_get("hwconfig"); -- -- if (hwconfig_f("xqsgmii", env_hwconfig)) -- riser_phy_addr = &xqsgii_riser_phy_addr[0]; -- else -- riser_phy_addr = &sgmii_riser_phy_addr[0]; -- -- if (dpmac_id > WRIOP1_DPMAC9) -- goto serdes2; -- -- switch (serdes1_prtcl) { -- case 0x07: -- case 0x39: -- case 0x4D: -- lane = serdes_get_first_lane(FSL_SRDS_1, SGMII1 + dpmac_id - 1); -- -- slot = lane_to_slot_fsm1[lane]; -- -- switch (++slot) { -- case 1: -- /* Slot housing a SGMII riser card? */ -- wriop_set_phy_address(dpmac_id, 0, -- riser_phy_addr[dpmac_id - 1]); -- dpmac_info[dpmac_id].board_mux = EMI1_SLOT1; -- bus = mii_dev_for_muxval(EMI1_SLOT1); -- wriop_set_mdio(dpmac_id, bus); -- break; -- case 2: -- /* Slot housing a SGMII riser card? */ -- wriop_set_phy_address(dpmac_id, 0, -- riser_phy_addr[dpmac_id - 1]); -- dpmac_info[dpmac_id].board_mux = EMI1_SLOT2; -- bus = mii_dev_for_muxval(EMI1_SLOT2); -- wriop_set_mdio(dpmac_id, bus); -- break; -- case 3: -- if (slot == EMI_NONE) -- return; -- if (serdes1_prtcl == 0x39) { -- wriop_set_phy_address(dpmac_id, 0, -- riser_phy_addr[dpmac_id - 2]); -- if (dpmac_id >= 6 && hwconfig_f("xqsgmii", -- env_hwconfig)) -- wriop_set_phy_address(dpmac_id, 0, -- riser_phy_addr[dpmac_id - 3]); -- } else { -- wriop_set_phy_address(dpmac_id, 0, -- riser_phy_addr[dpmac_id - 2]); -- if (dpmac_id >= 7 && hwconfig_f("xqsgmii", -- env_hwconfig)) -- wriop_set_phy_address(dpmac_id, 0, -- riser_phy_addr[dpmac_id - 3]); -- } -- dpmac_info[dpmac_id].board_mux = EMI1_SLOT3; -- bus = mii_dev_for_muxval(EMI1_SLOT3); -- wriop_set_mdio(dpmac_id, bus); -- break; -- case 4: -- break; -- case 5: -- break; -- case 6: -- break; -- } -- break; -- default: -- printf("%s qds: WRIOP: Unsupported SerDes1 Protocol 0x%02x\n", -- __func__ , serdes1_prtcl); -- break; -- } -- --serdes2: -- switch (serdes2_prtcl) { -- case 0x07: -- case 0x08: -- case 0x49: -- case 0x47: -- case 0x57: -- lane = serdes_get_first_lane(FSL_SRDS_2, SGMII9 + -- (dpmac_id - 9)); -- slot = lane_to_slot_fsm2[lane]; -- -- switch (++slot) { -- case 1: -- break; -- case 3: -- break; -- case 4: -- /* Slot housing a SGMII riser card? */ -- wriop_set_phy_address(dpmac_id, 0, -- riser_phy_addr[dpmac_id - 9]); -- dpmac_info[dpmac_id].board_mux = EMI1_SLOT4; -- bus = mii_dev_for_muxval(EMI1_SLOT4); -- wriop_set_mdio(dpmac_id, bus); -- break; -- case 5: -- if (slot == EMI_NONE) -- return; -- if (serdes2_prtcl == 0x47) { -- wriop_set_phy_address(dpmac_id, 0, -- riser_phy_addr[dpmac_id - 10]); -- if (dpmac_id >= 14 && hwconfig_f("xqsgmii", -- env_hwconfig)) -- wriop_set_phy_address(dpmac_id, 0, -- riser_phy_addr[dpmac_id - 11]); -- } else { -- wriop_set_phy_address(dpmac_id, 0, -- riser_phy_addr[dpmac_id - 11]); -- } -- dpmac_info[dpmac_id].board_mux = EMI1_SLOT5; -- bus = mii_dev_for_muxval(EMI1_SLOT5); -- wriop_set_mdio(dpmac_id, bus); -- break; -- case 6: -- /* Slot housing a SGMII riser card? */ -- wriop_set_phy_address(dpmac_id, 0, -- riser_phy_addr[dpmac_id - 13]); -- dpmac_info[dpmac_id].board_mux = EMI1_SLOT6; -- bus = mii_dev_for_muxval(EMI1_SLOT6); -- wriop_set_mdio(dpmac_id, bus); -- break; -- } -- break; -- default: -- printf("%s qds: WRIOP: Unsupported SerDes2 Protocol 0x%02x\n", -- __func__, serdes2_prtcl); -- break; -- } --} -- --void ls2080a_handle_phy_interface_qsgmii(int dpmac_id) --{ -- int lane = 0, slot; -- struct mii_dev *bus; -- struct ccsr_gur __iomem *gur = (void *)CFG_SYS_FSL_GUTS_ADDR; -- int serdes1_prtcl = (in_le32(&gur->rcwsr[28]) & -- FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK) -- >> FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_SHIFT; -- -- switch (serdes1_prtcl) { -- case 0x33: -- switch (dpmac_id) { -- case 1: -- case 2: -- case 3: -- case 4: -- lane = serdes_get_first_lane(FSL_SRDS_1, QSGMII_A); -- break; -- case 5: -- case 6: -- case 7: -- case 8: -- lane = serdes_get_first_lane(FSL_SRDS_1, QSGMII_B); -- break; -- case 9: -- case 10: -- case 11: -- case 12: -- lane = serdes_get_first_lane(FSL_SRDS_1, QSGMII_C); -- break; -- case 13: -- case 14: -- case 15: -- case 16: -- lane = serdes_get_first_lane(FSL_SRDS_1, QSGMII_D); -- break; -- } -- -- slot = lane_to_slot_fsm1[lane]; -- -- switch (++slot) { -- case 1: -- /* Slot housing a QSGMII riser card? */ -- wriop_set_phy_address(dpmac_id, 0, dpmac_id - 1); -- dpmac_info[dpmac_id].board_mux = EMI1_SLOT1; -- bus = mii_dev_for_muxval(EMI1_SLOT1); -- wriop_set_mdio(dpmac_id, bus); -- break; -- case 3: -- break; -- case 4: -- break; -- case 5: -- break; -- case 6: -- break; -- } -- break; -- default: -- printf("qds: WRIOP: Unsupported SerDes Protocol 0x%02x\n", -- serdes1_prtcl); -- break; -- } -- -- qsgmii_configure_repeater(dpmac_id); --} -- --void ls2080a_handle_phy_interface_xsgmii(int i) --{ -- struct ccsr_gur __iomem *gur = (void *)CFG_SYS_FSL_GUTS_ADDR; -- int serdes1_prtcl = (in_le32(&gur->rcwsr[28]) & -- FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK) -- >> FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_SHIFT; -- -- switch (serdes1_prtcl) { -- case 0x2A: -- case 0x4B: -- case 0x4C: -- /* -- * 10GBase-R does not need a PHY to work, but to avoid U-Boot -- * use default PHY address which is zero to a MAC when it found -- * a MAC has no PHY address, we give a PHY address to 10GBase-R -- * MAC, and should not use a real XAUI PHY address, since MDIO -- * can access it successfully, and then MDIO thinks the XAUI -- * card is used for the 10GBase-R MAC, which will cause error. -- */ -- wriop_set_phy_address(i, 0, i + 4); -- ls2080a_qds_enable_SFP_TX(SFP_TX); -- -- break; -- default: -- printf("qds: WRIOP: Unsupported SerDes Protocol 0x%02x\n", -- serdes1_prtcl); -- break; -- } --} --#endif --#endif // !CONFIG_DM_ETH -- --int board_eth_init(struct bd_info *bis) --{ --#ifndef CONFIG_DM_ETH --#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) -- struct ccsr_gur __iomem *gur = (void *)CFG_SYS_FSL_GUTS_ADDR; -- int serdes1_prtcl = (in_le32(&gur->rcwsr[28]) & -- FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK) -- >> FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_SHIFT; -- int serdes2_prtcl = (in_le32(&gur->rcwsr[28]) & -- FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_MASK) -- >> FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_SHIFT; -- -- struct memac_mdio_info *memac_mdio0_info; -- struct memac_mdio_info *memac_mdio1_info; -- unsigned int i; -- char *env_hwconfig; -- int error; -- -- env_hwconfig = env_get("hwconfig"); -- -- initialize_dpmac_to_slot(); -- -- memac_mdio0_info = (struct memac_mdio_info *)malloc( -- sizeof(struct memac_mdio_info)); -- memac_mdio0_info->regs = -- (struct memac_mdio_controller *) -- CFG_SYS_FSL_WRIOP1_MDIO1; -- memac_mdio0_info->name = DEFAULT_WRIOP_MDIO1_NAME; -- -- /* Register the real MDIO1 bus */ -- fm_memac_mdio_init(bis, memac_mdio0_info); -- -- memac_mdio1_info = (struct memac_mdio_info *)malloc( -- sizeof(struct memac_mdio_info)); -- memac_mdio1_info->regs = -- (struct memac_mdio_controller *) -- CFG_SYS_FSL_WRIOP1_MDIO2; -- memac_mdio1_info->name = DEFAULT_WRIOP_MDIO2_NAME; -- -- /* Register the real MDIO2 bus */ -- fm_memac_mdio_init(bis, memac_mdio1_info); -- -- /* Register the muxing front-ends to the MDIO buses */ -- ls2080a_qds_mdio_init(DEFAULT_WRIOP_MDIO1_NAME, EMI1_SLOT1); -- ls2080a_qds_mdio_init(DEFAULT_WRIOP_MDIO1_NAME, EMI1_SLOT2); -- ls2080a_qds_mdio_init(DEFAULT_WRIOP_MDIO1_NAME, EMI1_SLOT3); -- ls2080a_qds_mdio_init(DEFAULT_WRIOP_MDIO1_NAME, EMI1_SLOT4); -- ls2080a_qds_mdio_init(DEFAULT_WRIOP_MDIO1_NAME, EMI1_SLOT5); -- ls2080a_qds_mdio_init(DEFAULT_WRIOP_MDIO1_NAME, EMI1_SLOT6); -- -- ls2080a_qds_mdio_init(DEFAULT_WRIOP_MDIO2_NAME, EMI2); -- -- for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) { -- switch (wriop_get_enet_if(i)) { -- case PHY_INTERFACE_MODE_QSGMII: -- ls2080a_handle_phy_interface_qsgmii(i); -- break; -- case PHY_INTERFACE_MODE_SGMII: -- ls2080a_handle_phy_interface_sgmii(i); -- break; -- case PHY_INTERFACE_MODE_XGMII: -- ls2080a_handle_phy_interface_xsgmii(i); -- break; -- default: -- break; -- -- if (i == 16) -- i = NUM_WRIOP_PORTS; -- } -- } -- -- error = cpu_eth_init(bis); -- -- if (hwconfig_f("xqsgmii", env_hwconfig)) { -- if (serdes1_prtcl == 0x7) -- sgmii_configure_repeater(1); -- if (serdes2_prtcl == 0x7 || serdes2_prtcl == 0x8 || -- serdes2_prtcl == 0x49) -- sgmii_configure_repeater(2); -- } --#endif --#endif // !CONFIG_DM_ETH -- --#ifdef CONFIG_DM_ETH -- return 0; --#else -- return pci_eth_init(bis); --#endif --} -- - #if defined(CONFIG_RESET_PHY_R) - void reset_phy(void) - { -@@ -991,10 +16,10 @@ void reset_phy(void) - } - #endif /* CONFIG_RESET_PHY_R */ - --#if defined(CONFIG_DM_ETH) && defined(CONFIG_MULTI_DTB_FIT) -+#if defined(CONFIG_MULTI_DTB_FIT) - --/* Structure to hold SERDES protocols supported in case of -- * CONFIG_DM_ETH enabled (network interfaces are described in the DTS). -+/* Structure to hold SERDES protocols supported (network interfaces are -+ * described in the DTS). - * - * @serdes_block: the index of the SERDES block - * @serdes_protocol: the decimal value of the protocol supported -diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c -index 91db618227..ab5ff6f62c 100644 ---- a/board/freescale/ls2080aqds/ls2080aqds.c -+++ b/board/freescale/ls2080aqds/ls2080aqds.c -@@ -227,7 +227,7 @@ int board_init(void) - ppa_init(); - #endif - --#if !defined(CONFIG_SYS_EARLY_PCI_INIT) && defined(CONFIG_DM_ETH) -+#if !defined(CONFIG_SYS_EARLY_PCI_INIT) - pci_init(); - #endif - -diff --git a/board/freescale/ls2080ardb/eth_ls2080rdb.c b/board/freescale/ls2080ardb/eth_ls2080rdb.c -index 7034bc6e5d..44d9782d72 100644 ---- a/board/freescale/ls2080ardb/eth_ls2080rdb.c -+++ b/board/freescale/ls2080ardb/eth_ls2080rdb.c -@@ -4,104 +4,13 @@ - * - */ - --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include - #include --#include - #include --#include - - DECLARE_GLOBAL_DATA_PTR; - - int board_eth_init(struct bd_info *bis) - { --#ifndef CONFIG_DM_ETH --#if defined(CONFIG_FSL_MC_ENET) -- int i, interface; -- struct memac_mdio_info mdio_info; -- struct mii_dev *dev; -- struct ccsr_gur *gur = (void *)(CFG_SYS_FSL_GUTS_ADDR); -- u32 srds_s1; -- struct memac_mdio_controller *reg; -- -- srds_s1 = in_le32(&gur->rcwsr[28]) & -- FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK; -- srds_s1 >>= FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_SHIFT; -- -- reg = (struct memac_mdio_controller *)CFG_SYS_FSL_WRIOP1_MDIO1; -- mdio_info.regs = reg; -- mdio_info.name = DEFAULT_WRIOP_MDIO1_NAME; -- -- /* Register the EMI 1 */ -- fm_memac_mdio_init(bis, &mdio_info); -- -- reg = (struct memac_mdio_controller *)CFG_SYS_FSL_WRIOP1_MDIO2; -- mdio_info.regs = reg; -- mdio_info.name = DEFAULT_WRIOP_MDIO2_NAME; -- -- /* Register the EMI 2 */ -- fm_memac_mdio_init(bis, &mdio_info); -- -- switch (srds_s1) { -- case 0x2A: -- wriop_set_phy_address(WRIOP1_DPMAC1, 0, CORTINA_PHY_ADDR1); -- wriop_set_phy_address(WRIOP1_DPMAC2, 0, CORTINA_PHY_ADDR2); -- wriop_set_phy_address(WRIOP1_DPMAC3, 0, CORTINA_PHY_ADDR3); -- wriop_set_phy_address(WRIOP1_DPMAC4, 0, CORTINA_PHY_ADDR4); -- wriop_set_phy_address(WRIOP1_DPMAC5, 0, AQ_PHY_ADDR1); -- wriop_set_phy_address(WRIOP1_DPMAC6, 0, AQ_PHY_ADDR2); -- wriop_set_phy_address(WRIOP1_DPMAC7, 0, AQ_PHY_ADDR3); -- wriop_set_phy_address(WRIOP1_DPMAC8, 0, AQ_PHY_ADDR4); -- -- break; -- case 0x4B: -- wriop_set_phy_address(WRIOP1_DPMAC1, 0, CORTINA_PHY_ADDR1); -- wriop_set_phy_address(WRIOP1_DPMAC2, 0, CORTINA_PHY_ADDR2); -- wriop_set_phy_address(WRIOP1_DPMAC3, 0, CORTINA_PHY_ADDR3); -- wriop_set_phy_address(WRIOP1_DPMAC4, 0, CORTINA_PHY_ADDR4); -- -- break; -- default: -- printf("SerDes1 protocol 0x%x is not supported on LS2080aRDB\n", -- srds_s1); -- break; -- } -- -- for (i = WRIOP1_DPMAC1; i <= WRIOP1_DPMAC4; i++) { -- interface = wriop_get_enet_if(i); -- switch (interface) { -- case PHY_INTERFACE_MODE_XGMII: -- dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO1_NAME); -- wriop_set_mdio(i, dev); -- break; -- default: -- break; -- } -- } -- -- for (i = WRIOP1_DPMAC5; i <= WRIOP1_DPMAC8; i++) { -- switch (wriop_get_enet_if(i)) { -- case PHY_INTERFACE_MODE_XGMII: -- dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO2_NAME); -- wriop_set_mdio(i, dev); -- break; -- default: -- break; -- } -- } -- -- cpu_eth_init(bis); --#endif /* CONFIG_FSL_MC_ENET */ --#endif /* !CONFIG_DM_ETH */ - - #ifdef CONFIG_PHY_AQUANTIA - /* -@@ -116,11 +25,7 @@ int board_eth_init(struct bd_info *bis) - gd->jt->miiphy_set_current_dev = miiphy_set_current_dev; - #endif - --#ifdef CONFIG_DM_ETH - return 0; --#else -- return pci_eth_init(bis); --#endif - } - - #if defined(CONFIG_RESET_PHY_R) -diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c -index aa2d65b45b..a7fc2b2076 100644 ---- a/board/freescale/ls2080ardb/ls2080ardb.c -+++ b/board/freescale/ls2080ardb/ls2080ardb.c -@@ -297,7 +297,7 @@ int board_init(void) - out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR405_IRQ_MASK); - #endif - --#if !defined(CONFIG_SYS_EARLY_PCI_INIT) && defined(CONFIG_DM_ETH) -+#if !defined(CONFIG_SYS_EARLY_PCI_INIT) - pci_init(); - #endif - -diff --git a/board/freescale/lx2160a/eth_lx2160aqds.c b/board/freescale/lx2160a/eth_lx2160aqds.c -index 374d0526b4..9939bb6f89 100644 ---- a/board/freescale/lx2160a/eth_lx2160aqds.c -+++ b/board/freescale/lx2160a/eth_lx2160aqds.c -@@ -4,575 +4,15 @@ - * - */ - --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include - #include - #include - #include --#include - #include --#include --#include -- --#include "../common/qixis.h" - - DECLARE_GLOBAL_DATA_PTR; - --#ifndef CONFIG_DM_ETH --#define EMI_NONE 0 --#define EMI1 1 /* Mdio Bus 1 */ --#define EMI2 2 /* Mdio Bus 2 */ -- --#if defined(CONFIG_FSL_MC_ENET) --enum io_slot { -- IO_SLOT_NONE = 0, -- IO_SLOT_1, -- IO_SLOT_2, -- IO_SLOT_3, -- IO_SLOT_4, -- IO_SLOT_5, -- IO_SLOT_6, -- IO_SLOT_7, -- IO_SLOT_8, -- EMI1_RGMII1, -- EMI1_RGMII2, -- IO_SLOT_MAX --}; -- --struct lx2160a_qds_mdio { -- enum io_slot ioslot : 4; -- u8 realbusnum : 4; -- struct mii_dev *realbus; --}; -- --/* structure explaining the phy configuration on 8 lanes of a serdes*/ --struct serdes_phy_config { -- u8 serdes; /* serdes protocol */ -- struct phy_config { -- u8 dpmacid; -- /* -1 terminated array */ -- int phy_address[WRIOP_MAX_PHY_NUM + 1]; -- u8 mdio_bus; -- enum io_slot ioslot; -- } phy_config[SRDS_MAX_LANES]; --}; -- --/* Table defining the phy configuration on 8 lanes of a serdes. -- * Various assumptions have been made while defining this table. -- * e.g. for serdes1 protocol 19 it is being assumed that X-M11-USXGMII -- * card is being used for dpmac 3-4. (X-M12-XFI could also have been used) -- * And also that this card is connected to IO Slot 1 (could have been connected -- * to any of the 8 IO slots (IO slot 1 - IO slot 8)). -- * similarly, it is also being assumed that MDIO 1 is selected on X-M7-40G card -- * used in serdes1 protocol 19 (could have selected MDIO 2) -- * To override these settings "dpmac" environment variable can be used after -- * defining "dpmac_override" in hwconfig environment variable. -- * This table has limited serdes protocol entries. It can be expanded as per -- * requirement. -- */ --static const struct serdes_phy_config serdes1_phy_config[] = { -- {3, {{WRIOP1_DPMAC3, {AQ_PHY_ADDR1, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC4, {AQ_PHY_ADDR2, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC5, {AQ_PHY_ADDR3, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC6, {AQ_PHY_ADDR4, -1}, -- EMI1, IO_SLOT_1} } }, -- {7, {{WRIOP1_DPMAC3, {AQ_PHY_ADDR1, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC4, {AQ_PHY_ADDR2, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC5, {AQ_PHY_ADDR3, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC6, {AQ_PHY_ADDR4, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC7, {SGMII_CARD_PORT1_PHY_ADDR, -1}, -- EMI1, IO_SLOT_2}, -- {WRIOP1_DPMAC8, {SGMII_CARD_PORT2_PHY_ADDR, -1}, -- EMI1, IO_SLOT_2}, -- {WRIOP1_DPMAC9, {SGMII_CARD_PORT3_PHY_ADDR, -1}, -- EMI1, IO_SLOT_2}, -- {WRIOP1_DPMAC10, {SGMII_CARD_PORT4_PHY_ADDR, -1}, -- EMI1, IO_SLOT_2} } }, -- {8, {} }, -- {13, {{WRIOP1_DPMAC1, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC2, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1}, -- EMI1, IO_SLOT_2} } }, -- {14, {{WRIOP1_DPMAC1, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1}, -- EMI1, IO_SLOT_1} } }, -- {15, {{WRIOP1_DPMAC1, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC2, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1}, -- EMI1, IO_SLOT_1} } }, -- {17, {{WRIOP1_DPMAC3, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC4, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC5, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC6, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1}, -- EMI1, IO_SLOT_1} } }, -- {19, {{WRIOP1_DPMAC2, {CORTINA_PHY_ADDR1, -1}, -- EMI1, IO_SLOT_2}, -- {WRIOP1_DPMAC3, {AQ_PHY_ADDR1, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC4, {AQ_PHY_ADDR2, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC5, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1}, -- EMI1, IO_SLOT_6}, -- {WRIOP1_DPMAC6, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1}, -- EMI1, IO_SLOT_6} } }, -- {20, {{WRIOP1_DPMAC1, {CORTINA_PHY_ADDR1, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC2, {CORTINA_PHY_ADDR1, -1}, -- EMI1, IO_SLOT_2} } } --}; -- --static const struct serdes_phy_config serdes2_phy_config[] = { -- {2, {} }, -- {3, {} }, -- {5, {} }, -- {11, {{WRIOP1_DPMAC12, {SGMII_CARD_PORT2_PHY_ADDR, -1}, -- EMI1, IO_SLOT_7}, -- {WRIOP1_DPMAC17, {SGMII_CARD_PORT3_PHY_ADDR, -1}, -- EMI1, IO_SLOT_7}, -- {WRIOP1_DPMAC18, {SGMII_CARD_PORT4_PHY_ADDR, -1}, -- EMI1, IO_SLOT_7}, -- {WRIOP1_DPMAC16, {SGMII_CARD_PORT2_PHY_ADDR, -1}, -- EMI1, IO_SLOT_8}, -- {WRIOP1_DPMAC13, {SGMII_CARD_PORT3_PHY_ADDR, -1}, -- EMI1, IO_SLOT_8}, -- {WRIOP1_DPMAC14, {SGMII_CARD_PORT4_PHY_ADDR, -1}, -- EMI1, IO_SLOT_8} } }, --}; -- --static const struct serdes_phy_config serdes3_phy_config[] = { -- {2, {} }, -- {3, {} } --}; -- --static inline --const struct phy_config *get_phy_config(u8 serdes, -- const struct serdes_phy_config *table, -- u8 table_size) --{ -- int i; -- -- for (i = 0; i < table_size; i++) { -- if (table[i].serdes == serdes) -- return table[i].phy_config; -- } -- -- return NULL; --} -- --/* BRDCFG4 controls EMI routing for the board. -- * Bits Function -- * 7-6 EMI Interface #1 Primary Routing (CFG_MUX1_EMI1) (1.8V): -- * EMI1 00= On-board PHY #1 -- * 01= On-board PHY #2 -- * 10= (reserved) -- * 11= Slots 1..8 multiplexer and translator. -- * 5-3 EMI Interface #1 Secondary Routing (CFG_MUX2_EMI1) (2.5V): -- * EMI1X 000= Slot #1 -- * 001= Slot #2 -- * 010= Slot #3 -- * 011= Slot #4 -- * 100= Slot #5 -- * 101= Slot #6 -- * 110= Slot #7 -- * 111= Slot #8 -- * 2-0 EMI Interface #2 Routing (CFG_MUX_EMI2): -- * EMI2 000= Slot #1 (secondary EMI) -- * 001= Slot #2 (secondary EMI) -- * 010= Slot #3 (secondary EMI) -- * 011= Slot #4 (secondary EMI) -- * 100= Slot #5 (secondary EMI) -- * 101= Slot #6 (secondary EMI) -- * 110= Slot #7 (secondary EMI) -- * 111= Slot #8 (secondary EMI) -- */ --static int lx2160a_qds_get_mdio_mux_val(u8 realbusnum, enum io_slot ioslot) --{ -- switch (realbusnum) { -- case EMI1: -- switch (ioslot) { -- case EMI1_RGMII1: -- return 0; -- case EMI1_RGMII2: -- return 0x40; -- default: -- return (((ioslot - 1) << BRDCFG4_EMI1SEL_SHIFT) | 0xC0); -- } -- break; -- case EMI2: -- return ((ioslot - 1) << BRDCFG4_EMI2SEL_SHIFT); -- default: -- return -1; -- } --} -- --static void lx2160a_qds_mux_mdio(struct lx2160a_qds_mdio *priv) --{ -- u8 brdcfg4, mux_val, reg; -- -- brdcfg4 = QIXIS_READ(brdcfg[4]); -- reg = brdcfg4; -- mux_val = lx2160a_qds_get_mdio_mux_val(priv->realbusnum, priv->ioslot); -- -- switch (priv->realbusnum) { -- case EMI1: -- brdcfg4 &= ~BRDCFG4_EMI1SEL_MASK; -- brdcfg4 |= mux_val; -- break; -- case EMI2: -- brdcfg4 &= ~BRDCFG4_EMI2SEL_MASK; -- brdcfg4 |= mux_val; -- break; -- } -- -- if (brdcfg4 ^ reg) -- QIXIS_WRITE(brdcfg[4], brdcfg4); --} -- --static int lx2160a_qds_mdio_read(struct mii_dev *bus, int addr, -- int devad, int regnum) --{ -- struct lx2160a_qds_mdio *priv = bus->priv; -- -- lx2160a_qds_mux_mdio(priv); -- -- return priv->realbus->read(priv->realbus, addr, devad, regnum); --} -- --static int lx2160a_qds_mdio_write(struct mii_dev *bus, int addr, int devad, -- int regnum, u16 value) --{ -- struct lx2160a_qds_mdio *priv = bus->priv; -- -- lx2160a_qds_mux_mdio(priv); -- -- return priv->realbus->write(priv->realbus, addr, devad, regnum, value); --} -- --static int lx2160a_qds_mdio_reset(struct mii_dev *bus) --{ -- struct lx2160a_qds_mdio *priv = bus->priv; -- -- return priv->realbus->reset(priv->realbus); --} -- --static struct mii_dev *lx2160a_qds_mdio_init(u8 realbusnum, enum io_slot ioslot) --{ -- struct lx2160a_qds_mdio *pmdio; -- struct mii_dev *bus; -- /*should be within MDIO_NAME_LEN*/ -- char dummy_mdio_name[] = "LX2160A_QDS_MDIO1_IOSLOT1"; -- -- if (realbusnum == EMI2) { -- if (ioslot < IO_SLOT_1 || ioslot > IO_SLOT_8) { -- printf("invalid ioslot %d\n", ioslot); -- return NULL; -- } -- } else if (realbusnum == EMI1) { -- if (ioslot < IO_SLOT_1 || ioslot > EMI1_RGMII2) { -- printf("invalid ioslot %d\n", ioslot); -- return NULL; -- } -- } else { -- printf("not supported real mdio bus %d\n", realbusnum); -- return NULL; -- } -- -- if (ioslot == EMI1_RGMII1) -- strcpy(dummy_mdio_name, "LX2160A_QDS_MDIO1_RGMII1"); -- else if (ioslot == EMI1_RGMII2) -- strcpy(dummy_mdio_name, "LX2160A_QDS_MDIO1_RGMII2"); -- else -- sprintf(dummy_mdio_name, "LX2160A_QDS_MDIO%d_IOSLOT%d", -- realbusnum, ioslot); -- bus = miiphy_get_dev_by_name(dummy_mdio_name); -- -- if (bus) -- return bus; -- -- bus = mdio_alloc(); -- if (!bus) { -- printf("Failed to allocate %s bus\n", dummy_mdio_name); -- return NULL; -- } -- -- pmdio = malloc(sizeof(*pmdio)); -- if (!pmdio) { -- printf("Failed to allocate %s private data\n", dummy_mdio_name); -- free(bus); -- return NULL; -- } -- -- switch (realbusnum) { -- case EMI1: -- pmdio->realbus = -- miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO1_NAME); -- break; -- case EMI2: -- pmdio->realbus = -- miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO2_NAME); -- break; -- } -- -- if (!pmdio->realbus) { -- printf("No real mdio bus num %d found\n", realbusnum); -- free(bus); -- free(pmdio); -- return NULL; -- } -- -- pmdio->realbusnum = realbusnum; -- pmdio->ioslot = ioslot; -- bus->read = lx2160a_qds_mdio_read; -- bus->write = lx2160a_qds_mdio_write; -- bus->reset = lx2160a_qds_mdio_reset; -- strcpy(bus->name, dummy_mdio_name); -- bus->priv = pmdio; -- -- if (!mdio_register(bus)) -- return bus; -- -- printf("No bus with name %s\n", dummy_mdio_name); -- free(bus); -- free(pmdio); -- return NULL; --} -- --static inline void do_phy_config(const struct phy_config *phy_config) --{ -- struct mii_dev *bus; -- int i, phy_num, phy_address; -- -- for (i = 0; i < SRDS_MAX_LANES; i++) { -- if (!phy_config[i].dpmacid) -- continue; -- -- for (phy_num = 0; -- phy_num < ARRAY_SIZE(phy_config[i].phy_address); -- phy_num++) { -- phy_address = phy_config[i].phy_address[phy_num]; -- if (phy_address == -1) -- break; -- wriop_set_phy_address(phy_config[i].dpmacid, -- phy_num, phy_address); -- } -- /*Register the muxing front-ends to the MDIO buses*/ -- bus = lx2160a_qds_mdio_init(phy_config[i].mdio_bus, -- phy_config[i].ioslot); -- if (!bus) -- printf("could not get bus for mdio %d ioslot %d\n", -- phy_config[i].mdio_bus, -- phy_config[i].ioslot); -- else -- wriop_set_mdio(phy_config[i].dpmacid, bus); -- } --} -- --static inline void do_dpmac_config(int dpmac, const char *arg_dpmacid, -- char *env_dpmac) --{ -- const char *ret; -- size_t len; -- u8 realbusnum, ioslot; -- struct mii_dev *bus; -- int phy_num; -- char *phystr = "phy00"; -- -- /*search phy in dpmac arg*/ -- for (phy_num = 0; phy_num < WRIOP_MAX_PHY_NUM; phy_num++) { -- sprintf(phystr, "phy%d", phy_num + 1); -- ret = hwconfig_subarg_f(arg_dpmacid, phystr, &len, env_dpmac); -- if (!ret) { -- /*look for phy instead of phy1*/ -- if (!phy_num) -- ret = hwconfig_subarg_f(arg_dpmacid, "phy", -- &len, env_dpmac); -- if (!ret) -- continue; -- } -- -- if (len != 4 || strncmp(ret, "0x", 2)) -- printf("invalid phy format in %s variable.\n" -- "specify phy%d for %s in hex format e.g. 0x12\n", -- env_dpmac, phy_num + 1, arg_dpmacid); -- else -- wriop_set_phy_address(dpmac, phy_num, -- hextoul(ret, NULL)); -- } -- -- /*search mdio in dpmac arg*/ -- ret = hwconfig_subarg_f(arg_dpmacid, "mdio", &len, env_dpmac); -- if (ret) -- realbusnum = *ret - '0'; -- else -- realbusnum = EMI_NONE; -- -- if (realbusnum) { -- /*search io in dpmac arg*/ -- ret = hwconfig_subarg_f(arg_dpmacid, "io", &len, env_dpmac); -- if (ret) -- ioslot = *ret - '0'; -- else -- ioslot = IO_SLOT_NONE; -- /*Register the muxing front-ends to the MDIO buses*/ -- bus = lx2160a_qds_mdio_init(realbusnum, ioslot); -- if (!bus) -- printf("could not get bus for mdio %d ioslot %d\n", -- realbusnum, ioslot); -- else -- wriop_set_mdio(dpmac, bus); -- } --} -- --#endif --#endif /* !CONFIG_DM_ETH */ -- - int board_eth_init(struct bd_info *bis) - { --#ifndef CONFIG_DM_ETH --#if defined(CONFIG_FSL_MC_ENET) -- struct memac_mdio_info mdio_info; -- struct memac_mdio_controller *regs; -- int i; -- const char *ret; -- char *env_dpmac; -- char dpmacid[] = "dpmac00", srds[] = "00_00_00"; -- size_t len; -- struct mii_dev *bus; -- const struct phy_config *phy_config; -- struct ccsr_gur *gur = (void *)(CFG_SYS_FSL_GUTS_ADDR); -- u32 srds_s1, srds_s2, srds_s3; -- -- srds_s1 = in_le32(&gur->rcwsr[28]) & -- FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK; -- srds_s1 >>= FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_SHIFT; -- -- srds_s2 = in_le32(&gur->rcwsr[28]) & -- FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_MASK; -- srds_s2 >>= FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_SHIFT; -- -- srds_s3 = in_le32(&gur->rcwsr[28]) & -- FSL_CHASSIS3_RCWSR28_SRDS3_PRTCL_MASK; -- srds_s3 >>= FSL_CHASSIS3_RCWSR28_SRDS3_PRTCL_SHIFT; -- -- sprintf(srds, "%d_%d_%d", srds_s1, srds_s2, srds_s3); -- -- regs = (struct memac_mdio_controller *)CFG_SYS_FSL_WRIOP1_MDIO1; -- mdio_info.regs = regs; -- mdio_info.name = DEFAULT_WRIOP_MDIO1_NAME; -- -- /*Register the EMI 1*/ -- fm_memac_mdio_init(bis, &mdio_info); -- -- regs = (struct memac_mdio_controller *)CFG_SYS_FSL_WRIOP1_MDIO2; -- mdio_info.regs = regs; -- mdio_info.name = DEFAULT_WRIOP_MDIO2_NAME; -- -- /*Register the EMI 2*/ -- fm_memac_mdio_init(bis, &mdio_info); -- -- /* "dpmac" environment variable can be used after -- * defining "dpmac_override" in hwconfig environment variable. -- */ -- if (hwconfig("dpmac_override")) { -- env_dpmac = env_get("dpmac"); -- if (env_dpmac) { -- ret = hwconfig_arg_f("srds", &len, env_dpmac); -- if (ret) { -- if (strncmp(ret, srds, strlen(srds))) { -- printf("SERDES configuration changed.\n" -- "previous: %.*s, current: %s.\n" -- "update dpmac variable.\n", -- (int)len, ret, srds); -- } -- } else { -- printf("SERDES configuration not found.\n" -- "Please add srds:%s in dpmac variable\n", -- srds); -- } -- -- for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) { -- /* Look for dpmac1 to dpmac24(current max) arg -- * in dpmac environment variable -- */ -- sprintf(dpmacid, "dpmac%d", i); -- ret = hwconfig_arg_f(dpmacid, &len, env_dpmac); -- if (ret) -- do_dpmac_config(i, dpmacid, env_dpmac); -- } -- } else { -- printf("Warning: environment dpmac not found.\n" -- "DPAA network interfaces may not work\n"); -- } -- } else { -- /*Look for phy config for serdes1 in phy config table*/ -- phy_config = get_phy_config(srds_s1, serdes1_phy_config, -- ARRAY_SIZE(serdes1_phy_config)); -- if (!phy_config) { -- printf("%s WRIOP: Unsupported SerDes1 Protocol %d\n", -- __func__, srds_s1); -- } else { -- do_phy_config(phy_config); -- } -- phy_config = get_phy_config(srds_s2, serdes2_phy_config, -- ARRAY_SIZE(serdes2_phy_config)); -- if (!phy_config) { -- printf("%s WRIOP: Unsupported SerDes2 Protocol %d\n", -- __func__, srds_s2); -- } else { -- do_phy_config(phy_config); -- } -- phy_config = get_phy_config(srds_s3, serdes3_phy_config, -- ARRAY_SIZE(serdes3_phy_config)); -- if (!phy_config) { -- printf("%s WRIOP: Unsupported SerDes3 Protocol %d\n", -- __func__, srds_s3); -- } else { -- do_phy_config(phy_config); -- } -- } -- -- if (wriop_get_enet_if(WRIOP1_DPMAC17) == PHY_INTERFACE_MODE_RGMII_ID) { -- wriop_set_phy_address(WRIOP1_DPMAC17, 0, RGMII_PHY_ADDR1); -- bus = lx2160a_qds_mdio_init(EMI1, EMI1_RGMII1); -- if (!bus) -- printf("could not get bus for RGMII1\n"); -- else -- wriop_set_mdio(WRIOP1_DPMAC17, bus); -- } -- -- if (wriop_get_enet_if(WRIOP1_DPMAC18) == PHY_INTERFACE_MODE_RGMII_ID) { -- wriop_set_phy_address(WRIOP1_DPMAC18, 0, RGMII_PHY_ADDR2); -- bus = lx2160a_qds_mdio_init(EMI1, EMI1_RGMII2); -- if (!bus) -- printf("could not get bus for RGMII2\n"); -- else -- wriop_set_mdio(WRIOP1_DPMAC18, bus); -- } -- -- cpu_eth_init(bis); --#endif /* CONFIG_FMAN_ENET */ --#endif /* !CONFIG_DM_ETH */ -- - #ifdef CONFIG_PHY_AQUANTIA - /* - * Export functions to be used by AQ firmware -@@ -586,11 +26,7 @@ int board_eth_init(struct bd_info *bis) - gd->jt->miiphy_set_current_dev = miiphy_set_current_dev; - #endif - --#ifdef CONFIG_DM_ETH - return 0; --#else -- return pci_eth_init(bis); --#endif - } - - #if defined(CONFIG_RESET_PHY_R) -@@ -602,265 +38,10 @@ void reset_phy(void) - } - #endif /* CONFIG_RESET_PHY_R */ - --#ifndef CONFIG_DM_ETH --#if defined(CONFIG_FSL_MC_ENET) --int fdt_fixup_dpmac_phy_handle(void *fdt, int dpmac_id, int node_phandle) --{ -- int offset; -- int ret; -- char dpmac_str[] = "dpmacs@00"; -- const char *phy_string; -- -- offset = fdt_path_offset(fdt, "/soc/fsl-mc/dpmacs"); -- -- if (offset < 0) -- offset = fdt_path_offset(fdt, "/fsl-mc/dpmacs"); -- -- if (offset < 0) { -- printf("dpmacs node not found in device tree\n"); -- return offset; -- } -- -- sprintf(dpmac_str, "dpmac@%x", dpmac_id); -- debug("dpmac_str = %s\n", dpmac_str); -- -- offset = fdt_subnode_offset(fdt, offset, dpmac_str); -- if (offset < 0) { -- printf("%s node not found in device tree\n", dpmac_str); -- return offset; -- } -- -- phy_string = fdt_getprop(fdt, offset, "phy-connection-type", NULL); -- if (is_backplane_mode(phy_string)) { -- /* Backplane KR mode: skip fixups */ -- printf("Interface %d in backplane KR mode\n", dpmac_id); -- return 0; -- } -- -- ret = fdt_appendprop_cell(fdt, offset, "phy-handle", node_phandle); -- if (ret) -- printf("%d@%s %d\n", __LINE__, __func__, ret); -- -- phy_string = phy_string_for_interface(wriop_get_enet_if(dpmac_id)); -- ret = fdt_setprop_string(fdt, offset, "phy-connection-type", -- phy_string); -- if (ret) -- printf("%d@%s %d\n", __LINE__, __func__, ret); -- -- return ret; --} -- --int fdt_get_ioslot_offset(void *fdt, struct mii_dev *mii_dev, int fpga_offset) --{ -- char mdio_ioslot_str[] = "mdio@00"; -- struct lx2160a_qds_mdio *priv; -- u64 reg; -- u32 phandle; -- int offset, mux_val; -- -- /*Test if the MDIO bus is real mdio bus or muxing front end ?*/ -- if (strncmp(mii_dev->name, "LX2160A_QDS_MDIO", -- strlen("LX2160A_QDS_MDIO"))) -- return -1; -- -- /*Get the real MDIO bus num and ioslot info from bus's priv data*/ -- priv = mii_dev->priv; -- -- debug("real_bus_num = %d, ioslot = %d\n", -- priv->realbusnum, priv->ioslot); -- -- if (priv->realbusnum == EMI1) -- reg = CFG_SYS_FSL_WRIOP1_MDIO1; -- else -- reg = CFG_SYS_FSL_WRIOP1_MDIO2; -- -- offset = fdt_node_offset_by_compat_reg(fdt, "fsl,fman-memac-mdio", reg); -- if (offset < 0) { -- printf("mdio@%llx node not found in device tree\n", reg); -- return offset; -- } -- -- phandle = fdt_get_phandle(fdt, offset); -- phandle = cpu_to_fdt32(phandle); -- offset = fdt_node_offset_by_prop_value(fdt, -1, "mdio-parent-bus", -- &phandle, 4); -- if (offset < 0) { -- printf("mdio-mux-%d node not found in device tree\n", -- priv->realbusnum == EMI1 ? 1 : 2); -- return offset; -- } -- -- mux_val = lx2160a_qds_get_mdio_mux_val(priv->realbusnum, priv->ioslot); -- if (priv->realbusnum == EMI1) -- mux_val >>= BRDCFG4_EMI1SEL_SHIFT; -- else -- mux_val >>= BRDCFG4_EMI2SEL_SHIFT; -- sprintf(mdio_ioslot_str, "mdio@%x", (u8)mux_val); -- -- offset = fdt_subnode_offset(fdt, offset, mdio_ioslot_str); -- if (offset < 0) { -- printf("%s node not found in device tree\n", mdio_ioslot_str); -- return offset; -- } -- -- return offset; --} -- --int fdt_create_phy_node(void *fdt, int offset, u8 phyaddr, int *subnodeoffset, -- struct phy_device *phy_dev, int phandle) --{ -- char phy_node_name[] = "ethernet-phy@00"; -- char phy_id_compatible_str[] = "ethernet-phy-id0000.0000,"; -- int ret; -- -- sprintf(phy_node_name, "ethernet-phy@%x", phyaddr); -- debug("phy_node_name = %s\n", phy_node_name); -- -- *subnodeoffset = fdt_add_subnode(fdt, offset, phy_node_name); -- if (*subnodeoffset <= 0) { -- printf("Could not add subnode %s inside node %s err = %s\n", -- phy_node_name, fdt_get_name(fdt, offset, NULL), -- fdt_strerror(*subnodeoffset)); -- return *subnodeoffset; -- } -- -- sprintf(phy_id_compatible_str, "ethernet-phy-id%04x.%04x,", -- phy_dev->phy_id >> 16, phy_dev->phy_id & 0xFFFF); -- debug("phy_id_compatible_str %s\n", phy_id_compatible_str); -- -- ret = fdt_setprop_string(fdt, *subnodeoffset, "compatible", -- phy_id_compatible_str); -- if (ret) { -- printf("%d@%s %d\n", __LINE__, __func__, ret); -- goto out; -- } -- -- if (phy_dev->is_c45) { -- ret = fdt_appendprop_string(fdt, *subnodeoffset, "compatible", -- "ethernet-phy-ieee802.3-c45"); -- if (ret) { -- printf("%d@%s %d\n", __LINE__, __func__, ret); -- goto out; -- } -- } else { -- ret = fdt_appendprop_string(fdt, *subnodeoffset, "compatible", -- "ethernet-phy-ieee802.3-c22"); -- if (ret) { -- printf("%d@%s %d\n", __LINE__, __func__, ret); -- goto out; -- } -- } -- -- ret = fdt_setprop_cell(fdt, *subnodeoffset, "reg", phyaddr); -- if (ret) { -- printf("%d@%s %d\n", __LINE__, __func__, ret); -- goto out; -- } -- -- ret = fdt_set_phandle(fdt, *subnodeoffset, phandle); -- if (ret) { -- printf("%d@%s %d\n", __LINE__, __func__, ret); -- goto out; -- } -- --out: -- if (ret) -- fdt_del_node(fdt, *subnodeoffset); -- -- return ret; --} -- --int fdt_fixup_board_phy(void *fdt) --{ -- int fpga_offset, offset, subnodeoffset; -- struct mii_dev *mii_dev; -- struct list_head *mii_devs, *entry; -- int ret, dpmac_id, i; -- struct phy_device *phy_dev; -- char ethname[ETH_NAME_LEN]; -- phy_interface_t phy_iface; -- uint32_t phandle; -- -- ret = 0; -- /* we know FPGA is connected to i2c0, therefore search path directly, -- * instead of compatible property, as it saves time -- */ -- fpga_offset = fdt_path_offset(fdt, "/soc/i2c@2000000/fpga"); -- -- if (fpga_offset < 0) -- fpga_offset = fdt_path_offset(fdt, "/i2c@2000000/fpga"); -- -- if (fpga_offset < 0) { -- printf("i2c@2000000/fpga node not found in device tree\n"); -- return fpga_offset; -- } -- -- ret = fdt_generate_phandle(fdt, &phandle); -- if (ret < 0) -- return ret; -- -- mii_devs = mdio_get_list_head(); -- -- list_for_each(entry, mii_devs) { -- mii_dev = list_entry(entry, struct mii_dev, link); -- debug("mii_dev name : %s\n", mii_dev->name); -- offset = fdt_get_ioslot_offset(fdt, mii_dev, fpga_offset); -- if (offset < 0) -- continue; -- -- // Look for phy devices attached to MDIO bus muxing front end -- // and create their entries with compatible being the device id -- for (i = 0; i < PHY_MAX_ADDR; i++) { -- phy_dev = mii_dev->phymap[i]; -- if (!phy_dev) -- continue; -- -- // TODO: use sscanf instead of loop -- dpmac_id = WRIOP1_DPMAC1; -- while (dpmac_id < NUM_WRIOP_PORTS) { -- phy_iface = wriop_get_enet_if(dpmac_id); -- snprintf(ethname, ETH_NAME_LEN, "DPMAC%d@%s", -- dpmac_id, -- phy_string_for_interface(phy_iface)); -- if (strcmp(ethname, phy_dev->dev->name) == 0) -- break; -- dpmac_id++; -- } -- if (dpmac_id == NUM_WRIOP_PORTS) -- continue; -- ret = fdt_create_phy_node(fdt, offset, i, -- &subnodeoffset, -- phy_dev, phandle); -- if (ret) -- break; -- -- ret = fdt_fixup_dpmac_phy_handle(fdt, -- dpmac_id, phandle); -- if (ret) { -- fdt_del_node(fdt, subnodeoffset); -- break; -- } -- /* calculate offset again as new node addition may have -- * changed offset; -- */ -- offset = fdt_get_ioslot_offset(fdt, mii_dev, -- fpga_offset); -- phandle++; -- } -- -- if (ret) -- break; -- } -- -- return ret; --} --#endif // CONFIG_FSL_MC_ENET --#endif -- --#if defined(CONFIG_DM_ETH) && defined(CONFIG_MULTI_DTB_FIT) -+#if defined(CONFIG_MULTI_DTB_FIT) - --/* Structure to hold SERDES protocols supported in case of -- * CONFIG_DM_ETH enabled (network interfaces are described in the DTS). -+/* Structure to hold SERDES protocols supported (network interfaces are -+ * described in the DTS). - * - * @serdes_block: the index of the SERDES block - * @serdes_protocol: the decimal value of the protocol supported -diff --git a/board/freescale/lx2160a/eth_lx2160ardb.c b/board/freescale/lx2160a/eth_lx2160ardb.c -index 8a9c60f46c..533f606eff 100644 ---- a/board/freescale/lx2160a/eth_lx2160ardb.c -+++ b/board/freescale/lx2160a/eth_lx2160ardb.c -@@ -5,158 +5,14 @@ - */ - - #include --#include --#include --#include - #include --#include --#include --#include --#include --#include --#include --#include - #include --#include - #include --#include --#include "lx2160a.h" - - DECLARE_GLOBAL_DATA_PTR; - --static bool get_inphi_phy_id(struct mii_dev *bus, int addr, int devad) --{ -- int phy_reg; -- u32 phy_id; -- -- phy_reg = bus->read(bus, addr, devad, MII_PHYSID1); -- phy_id = (phy_reg & 0xffff) << 16; -- -- phy_reg = bus->read(bus, addr, devad, MII_PHYSID2); -- phy_id |= (phy_reg & 0xffff); -- -- if (phy_id == PHY_UID_IN112525_S03) -- return true; -- else -- return false; --} -- - int board_eth_init(struct bd_info *bis) - { --#if defined(CONFIG_FSL_MC_ENET) -- struct memac_mdio_info mdio_info; -- struct memac_mdio_controller *reg; -- int i, interface; -- struct mii_dev *dev; -- struct ccsr_gur *gur = (void *)(CFG_SYS_FSL_GUTS_ADDR); -- u32 srds_s1; -- -- srds_s1 = in_le32(&gur->rcwsr[28]) & -- FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK; -- srds_s1 >>= FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_SHIFT; -- -- reg = (struct memac_mdio_controller *)CFG_SYS_FSL_WRIOP1_MDIO1; -- mdio_info.regs = reg; -- mdio_info.name = DEFAULT_WRIOP_MDIO1_NAME; -- -- /* Register the EMI 1 */ -- fm_memac_mdio_init(bis, &mdio_info); -- -- reg = (struct memac_mdio_controller *)CFG_SYS_FSL_WRIOP1_MDIO2; -- mdio_info.regs = reg; -- mdio_info.name = DEFAULT_WRIOP_MDIO2_NAME; -- -- /* Register the EMI 2 */ -- fm_memac_mdio_init(bis, &mdio_info); -- -- dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO2_NAME); -- switch (srds_s1) { -- case 19: -- wriop_set_phy_address(WRIOP1_DPMAC2, 0, -- CORTINA_PHY_ADDR1); -- wriop_set_phy_address(WRIOP1_DPMAC3, 0, -- AQR107_PHY_ADDR1); -- wriop_set_phy_address(WRIOP1_DPMAC4, 0, -- AQR107_PHY_ADDR2); -- if (get_inphi_phy_id(dev, INPHI_PHY_ADDR1, MDIO_MMD_VEND1)) { -- wriop_set_phy_address(WRIOP1_DPMAC5, 0, -- INPHI_PHY_ADDR1); -- wriop_set_phy_address(WRIOP1_DPMAC6, 0, -- INPHI_PHY_ADDR1); -- } -- wriop_set_phy_address(WRIOP1_DPMAC17, 0, -- RGMII_PHY_ADDR1); -- wriop_set_phy_address(WRIOP1_DPMAC18, 0, -- RGMII_PHY_ADDR2); -- break; -- -- case 18: -- wriop_set_phy_address(WRIOP1_DPMAC7, 0, -- CORTINA_PHY_ADDR1); -- wriop_set_phy_address(WRIOP1_DPMAC8, 0, -- CORTINA_PHY_ADDR1); -- wriop_set_phy_address(WRIOP1_DPMAC9, 0, -- CORTINA_PHY_ADDR1); -- wriop_set_phy_address(WRIOP1_DPMAC10, 0, -- CORTINA_PHY_ADDR1); -- wriop_set_phy_address(WRIOP1_DPMAC3, 0, -- AQR107_PHY_ADDR1); -- wriop_set_phy_address(WRIOP1_DPMAC4, 0, -- AQR107_PHY_ADDR2); -- if (get_inphi_phy_id(dev, INPHI_PHY_ADDR1, MDIO_MMD_VEND1)) { -- wriop_set_phy_address(WRIOP1_DPMAC5, 0, -- INPHI_PHY_ADDR1); -- wriop_set_phy_address(WRIOP1_DPMAC6, 0, -- INPHI_PHY_ADDR1); -- } -- wriop_set_phy_address(WRIOP1_DPMAC17, 0, -- RGMII_PHY_ADDR1); -- wriop_set_phy_address(WRIOP1_DPMAC18, 0, -- RGMII_PHY_ADDR2); -- break; -- -- default: -- printf("SerDes1 protocol 0x%x is not supported on LX2160ARDB\n", -- srds_s1); -- goto next; -- } -- -- for (i = WRIOP1_DPMAC2; i <= WRIOP1_DPMAC10; i++) { -- interface = wriop_get_enet_if(i); -- switch (interface) { -- case PHY_INTERFACE_MODE_XGMII: -- dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO1_NAME); -- wriop_set_mdio(i, dev); -- break; -- case PHY_INTERFACE_MODE_25G_AUI: -- dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO2_NAME); -- wriop_set_mdio(i, dev); -- break; -- case PHY_INTERFACE_MODE_XLAUI: -- dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO1_NAME); -- wriop_set_mdio(i, dev); -- break; -- default: -- break; -- } -- } -- for (i = WRIOP1_DPMAC17; i <= WRIOP1_DPMAC18; i++) { -- interface = wriop_get_enet_if(i); -- switch (interface) { -- case PHY_INTERFACE_MODE_RGMII: -- case PHY_INTERFACE_MODE_RGMII_ID: -- dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO1_NAME); -- wriop_set_mdio(i, dev); -- break; -- default: -- break; -- } -- } -- --next: -- cpu_eth_init(bis); --#endif /* CONFIG_FSL_MC_ENET */ -- - #ifdef CONFIG_PHY_AQUANTIA - /* - * Export functions to be used by AQ firmware -@@ -180,35 +36,3 @@ void reset_phy(void) - #endif - } - #endif /* CONFIG_RESET_PHY_R */ -- --int fdt_fixup_board_phy(void *fdt) --{ -- int mdio_offset; -- int ret; -- struct mii_dev *dev; -- -- ret = 0; -- -- dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO2_NAME); -- if (!get_inphi_phy_id(dev, INPHI_PHY_ADDR1, MDIO_MMD_VEND1)) { -- mdio_offset = fdt_path_offset(fdt, "/soc/mdio@0x8B97000"); -- -- if (mdio_offset < 0) -- mdio_offset = fdt_path_offset(fdt, "/mdio@0x8B97000"); -- -- if (mdio_offset < 0) { -- printf("mdio@0x8B9700 node not found in dts\n"); -- return mdio_offset; -- } -- -- ret = fdt_setprop_string(fdt, mdio_offset, "status", -- "disabled"); -- if (ret) { -- printf("Could not set disable mdio@0x8B97000 %s\n", -- fdt_strerror(ret)); -- return ret; -- } -- } -- -- return ret; --} -diff --git a/board/freescale/lx2160a/eth_lx2162aqds.c b/board/freescale/lx2160a/eth_lx2162aqds.c -index 25fee89961..805aa705be 100644 ---- a/board/freescale/lx2160a/eth_lx2162aqds.c -+++ b/board/freescale/lx2160a/eth_lx2162aqds.c -@@ -4,584 +4,15 @@ - * - */ - --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include -+#include - #include - #include --#include --#include - #include --#include --#include -- --#include "../common/qixis.h" - - DECLARE_GLOBAL_DATA_PTR; - --#ifndef CONFIG_DM_ETH --#define EMI_NONE 0 --#define EMI1 1 /* Mdio Bus 1 */ --#define EMI2 2 /* Mdio Bus 2 */ -- --#if defined(CONFIG_FSL_MC_ENET) --enum io_slot { -- IO_SLOT_NONE = 0, -- IO_SLOT_1, -- IO_SLOT_2, -- IO_SLOT_3, -- IO_SLOT_4, -- IO_SLOT_5, -- IO_SLOT_6, -- IO_SLOT_7, -- IO_SLOT_8, -- EMI1_RGMII1, -- EMI1_RGMII2, -- IO_SLOT_MAX --}; -- --struct lx2162a_qds_mdio { -- enum io_slot ioslot : 4; -- u8 realbusnum : 4; -- struct mii_dev *realbus; --}; -- --/* structure explaining the phy configuration on 8 lanes of a serdes*/ --struct serdes_phy_config { -- u8 serdes; /* serdes protocol */ -- struct phy_config { -- u8 dpmacid; -- /* -1 terminated array */ -- int phy_address[WRIOP_MAX_PHY_NUM + 1]; -- u8 mdio_bus; -- enum io_slot ioslot; -- } phy_config[SRDS_MAX_LANES]; --}; -- --/* Table defining the phy configuration on 8 lanes of a serdes. -- * Various assumptions have been made while defining this table. -- * e.g. for serdes1 protocol 19 it is being assumed that X-M11-USXGMII -- * card is being used for dpmac 3-4. (X-M12-XFI could also have been used) -- * And also that this card is connected to IO Slot 1 (could have been connected -- * to any of the 8 IO slots (IO slot 1 - IO slot 8)). -- * similarly, it is also being assumed that MDIO 1 is selected on X-M7-40G card -- * used in serdes1 protocol 19 (could have selected MDIO 2) -- * To override these settings "dpmac" environment variable can be used after -- * defining "dpmac_override" in hwconfig environment variable. -- * This table has limited serdes protocol entries. It can be expanded as per -- * requirement. -- */ --/***************************************************************** -- *| SERDES_1 PROTOCOL | IO_SLOT | CARD | -- ****************************************************************** -- *| 2 | IO_SLOT_1 | M4-PCIE-SGMII | -- *| 3 | IO_SLOT_1 | M11-USXGMII | -- *| 15 | IO_SLOT_1 | M13-25G | -- *| 17 | IO_SLOT_1 | M13-25G | -- *| 18 | IO_SLOT_1 | M11-USXGMII | -- *| | IO_SLOT_6 | M13-25G | -- *| 20 | IO_SLOT_1 | M7-40G | -- ***************************************************************** -- */ --static const struct serdes_phy_config serdes1_phy_config[] = { -- {1, {} }, -- {2, {{WRIOP1_DPMAC3, {SGMII_CARD_PORT1_PHY_ADDR, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC4, {SGMII_CARD_PORT2_PHY_ADDR, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC5, {SGMII_CARD_PORT3_PHY_ADDR, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC6, {SGMII_CARD_PORT4_PHY_ADDR, -1}, -- EMI1, IO_SLOT_1} } }, -- {3, {{WRIOP1_DPMAC3, {AQ_PHY_ADDR1, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC4, {AQ_PHY_ADDR2, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC5, {AQ_PHY_ADDR3, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC6, {AQ_PHY_ADDR4, -1}, -- EMI1, IO_SLOT_1} } }, -- {15, {{WRIOP1_DPMAC1, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC2, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1}, -- EMI1, IO_SLOT_1} } }, -- {17, {{WRIOP1_DPMAC3, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC4, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC5, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC6, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1}, -- EMI1, IO_SLOT_1} } }, -- {18, {{WRIOP1_DPMAC3, {AQ_PHY_ADDR1, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC4, {AQ_PHY_ADDR2, -1}, -- EMI1, IO_SLOT_1}, -- {WRIOP1_DPMAC5, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1}, -- EMI1, IO_SLOT_6}, -- {WRIOP1_DPMAC6, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1}, -- EMI1, IO_SLOT_6} } }, -- {20, {{WRIOP1_DPMAC1, {CORTINA_PHY_ADDR1, -1}, -- EMI1, IO_SLOT_1} } } --}; -- --/***************************************************************** -- *| SERDES_2 PROTOCOL | IO_SLOT | CARD | -- ****************************************************************** -- *| 2 | IO_SLOT_7 | M4-PCIE-SGMII | -- *| | IO_SLOT_8 | M4-PCIE-SGMII | -- *| 3 | IO_SLOT_7 | M4-PCIE-SGMII | -- *| | IO_SLOT_8 | M4-PCIE-SGMII | -- *| 5 | IO_SLOT_7 | M4-PCIE-SGMII | -- *| 10 | IO_SLOT_7 | M4-PCIE-SGMII | -- *| | IO_SLOT_8 | M4-PCIE-SGMII | -- *| 11 | IO_SLOT_7 | M4-PCIE-SGMII | -- *| | IO_SLOT_8 | M4-PCIE-SGMII | -- *| 12 | IO_SLOT_7 | M4-PCIE-SGMII | -- *| | IO_SLOT_8 | M4-PCIE-SGMII | -- ****************************************************************** -- */ --static const struct serdes_phy_config serdes2_phy_config[] = { -- {2, {} }, -- {3, {} }, -- {5, {} }, -- {10, {{WRIOP1_DPMAC11, {SGMII_CARD_PORT1_PHY_ADDR, -1}, -- EMI1, IO_SLOT_7}, -- {WRIOP1_DPMAC12, {SGMII_CARD_PORT2_PHY_ADDR, -1}, -- EMI1, IO_SLOT_7}, -- {WRIOP1_DPMAC17, {SGMII_CARD_PORT3_PHY_ADDR, -1}, -- EMI1, IO_SLOT_7}, -- {WRIOP1_DPMAC18, {SGMII_CARD_PORT4_PHY_ADDR, -1}, -- EMI1, IO_SLOT_7} } }, -- {11, {{WRIOP1_DPMAC12, {SGMII_CARD_PORT2_PHY_ADDR, -1}, -- EMI1, IO_SLOT_7}, -- {WRIOP1_DPMAC17, {SGMII_CARD_PORT3_PHY_ADDR, -1}, -- EMI1, IO_SLOT_7}, -- {WRIOP1_DPMAC18, {SGMII_CARD_PORT4_PHY_ADDR, -1}, -- EMI1, IO_SLOT_7}, -- {WRIOP1_DPMAC16, {SGMII_CARD_PORT2_PHY_ADDR, -1}, -- EMI1, IO_SLOT_8}, -- {WRIOP1_DPMAC13, {SGMII_CARD_PORT3_PHY_ADDR, -1}, -- EMI1, IO_SLOT_8}, -- {WRIOP1_DPMAC14, {SGMII_CARD_PORT4_PHY_ADDR, -1}, -- EMI1, IO_SLOT_8} } }, -- {12, {{WRIOP1_DPMAC11, {SGMII_CARD_PORT1_PHY_ADDR, -1}, -- EMI1, IO_SLOT_7}, -- {WRIOP1_DPMAC12, {SGMII_CARD_PORT2_PHY_ADDR, -1}, -- EMI1, IO_SLOT_7}, -- {WRIOP1_DPMAC17, {SGMII_CARD_PORT3_PHY_ADDR, -1}, -- EMI1, IO_SLOT_7}, -- {WRIOP1_DPMAC18, {SGMII_CARD_PORT4_PHY_ADDR, -1}, -- EMI1, IO_SLOT_7} } } --}; -- --static inline --const struct phy_config *get_phy_config(u8 serdes, -- const struct serdes_phy_config *table, -- u8 table_size) --{ -- int i; -- -- for (i = 0; i < table_size; i++) { -- if (table[i].serdes == serdes) -- return table[i].phy_config; -- } -- -- return NULL; --} -- --/* BRDCFG4 controls EMI routing for the board. -- * Bits Function -- * 7-6 EMI Interface #1 Primary Routing (CFG_MUX1_EMI1) (1.8V): -- * EMI1 00= On-board PHY #1 -- * 01= On-board PHY #2 -- * 10= (reserved) -- * 11= Slots 1..8 multiplexer and translator. -- * 5-3 EMI Interface #1 Secondary Routing (CFG_MUX2_EMI1) (2.5V): -- * EMI1X 000= Slot #1 -- * 001= Slot #2 -- * 010= Slot #3 -- * 011= Slot #4 -- * 100= Slot #5 -- * 101= Slot #6 -- * 110= Slot #7 -- * 111= Slot #8 -- * 2-0 EMI Interface #2 Routing (CFG_MUX_EMI2): -- * EMI2 000= Slot #1 (secondary EMI) -- * 001= Slot #2 (secondary EMI) -- * 010= Slot #3 (secondary EMI) -- * 011= Slot #4 (secondary EMI) -- * 100= Slot #5 (secondary EMI) -- * 101= Slot #6 (secondary EMI) -- * 110= Slot #7 (secondary EMI) -- * 111= Slot #8 (secondary EMI) -- */ --static int lx2162a_qds_get_mdio_mux_val(u8 realbusnum, enum io_slot ioslot) --{ -- switch (realbusnum) { -- case EMI1: -- switch (ioslot) { -- case EMI1_RGMII1: -- return 0; -- case EMI1_RGMII2: -- return 0x40; -- default: -- return (((ioslot - 1) << BRDCFG4_EMI1SEL_SHIFT) | 0xC0); -- } -- break; -- case EMI2: -- return ((ioslot - 1) << BRDCFG4_EMI2SEL_SHIFT); -- default: -- return -1; -- } --} -- --static void lx2162a_qds_mux_mdio(struct lx2162a_qds_mdio *priv) --{ -- u8 brdcfg4, mux_val, reg; -- -- brdcfg4 = QIXIS_READ(brdcfg[4]); -- reg = brdcfg4; -- mux_val = lx2162a_qds_get_mdio_mux_val(priv->realbusnum, priv->ioslot); -- -- switch (priv->realbusnum) { -- case EMI1: -- brdcfg4 &= ~BRDCFG4_EMI1SEL_MASK; -- brdcfg4 |= mux_val; -- break; -- case EMI2: -- brdcfg4 &= ~BRDCFG4_EMI2SEL_MASK; -- brdcfg4 |= mux_val; -- break; -- } -- -- if (brdcfg4 ^ reg) -- QIXIS_WRITE(brdcfg[4], brdcfg4); --} -- --static int lx2162a_qds_mdio_read(struct mii_dev *bus, int addr, -- int devad, int regnum) --{ -- struct lx2162a_qds_mdio *priv = bus->priv; -- -- lx2162a_qds_mux_mdio(priv); -- -- return priv->realbus->read(priv->realbus, addr, devad, regnum); --} -- --static int lx2162a_qds_mdio_write(struct mii_dev *bus, int addr, int devad, -- int regnum, u16 value) --{ -- struct lx2162a_qds_mdio *priv = bus->priv; -- -- lx2162a_qds_mux_mdio(priv); -- -- return priv->realbus->write(priv->realbus, addr, devad, regnum, value); --} -- --static int lx2162a_qds_mdio_reset(struct mii_dev *bus) --{ -- struct lx2162a_qds_mdio *priv = bus->priv; -- -- return priv->realbus->reset(priv->realbus); --} -- --static struct mii_dev *lx2162a_qds_mdio_init(u8 realbusnum, enum io_slot ioslot) --{ -- struct lx2162a_qds_mdio *pmdio; -- struct mii_dev *bus; -- /*should be within MDIO_NAME_LEN*/ -- char dummy_mdio_name[] = "LX2162A_QDS_MDIO1_IOSLOT1"; -- -- if (realbusnum == EMI2) { -- if (ioslot < IO_SLOT_1 || ioslot > IO_SLOT_8) { -- printf("invalid ioslot %d\n", ioslot); -- return NULL; -- } -- } else if (realbusnum == EMI1) { -- if (ioslot < IO_SLOT_1 || ioslot > EMI1_RGMII2) { -- printf("invalid ioslot %d\n", ioslot); -- return NULL; -- } -- } else { -- printf("not supported real mdio bus %d\n", realbusnum); -- return NULL; -- } -- -- if (ioslot == EMI1_RGMII1) -- strcpy(dummy_mdio_name, "LX2162A_QDS_MDIO1_RGMII1"); -- else if (ioslot == EMI1_RGMII2) -- strcpy(dummy_mdio_name, "LX2162A_QDS_MDIO1_RGMII2"); -- else -- sprintf(dummy_mdio_name, "LX2162A_QDS_MDIO%d_IOSLOT%d", -- realbusnum, ioslot); -- bus = miiphy_get_dev_by_name(dummy_mdio_name); -- -- if (bus) -- return bus; -- -- bus = mdio_alloc(); -- if (!bus) { -- printf("Failed to allocate %s bus\n", dummy_mdio_name); -- return NULL; -- } -- -- pmdio = malloc(sizeof(*pmdio)); -- if (!pmdio) { -- printf("Failed to allocate %s private data\n", dummy_mdio_name); -- free(bus); -- return NULL; -- } -- -- switch (realbusnum) { -- case EMI1: -- pmdio->realbus = -- miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO1_NAME); -- break; -- case EMI2: -- pmdio->realbus = -- miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO2_NAME); -- break; -- } -- -- if (!pmdio->realbus) { -- printf("No real mdio bus num %d found\n", realbusnum); -- free(bus); -- free(pmdio); -- return NULL; -- } -- -- pmdio->realbusnum = realbusnum; -- pmdio->ioslot = ioslot; -- bus->read = lx2162a_qds_mdio_read; -- bus->write = lx2162a_qds_mdio_write; -- bus->reset = lx2162a_qds_mdio_reset; -- strcpy(bus->name, dummy_mdio_name); -- bus->priv = pmdio; -- -- if (!mdio_register(bus)) -- return bus; -- -- printf("No bus with name %s\n", dummy_mdio_name); -- free(bus); -- free(pmdio); -- return NULL; --} -- --static inline void do_phy_config(const struct phy_config *phy_config) --{ -- struct mii_dev *bus; -- int i, phy_num, phy_address; -- -- for (i = 0; i < SRDS_MAX_LANES; i++) { -- if (!phy_config[i].dpmacid) -- continue; -- -- for (phy_num = 0; -- phy_num < ARRAY_SIZE(phy_config[i].phy_address); -- phy_num++) { -- phy_address = phy_config[i].phy_address[phy_num]; -- if (phy_address == -1) -- break; -- wriop_set_phy_address(phy_config[i].dpmacid, -- phy_num, phy_address); -- } -- /*Register the muxing front-ends to the MDIO buses*/ -- bus = lx2162a_qds_mdio_init(phy_config[i].mdio_bus, -- phy_config[i].ioslot); -- if (!bus) -- printf("could not get bus for mdio %d ioslot %d\n", -- phy_config[i].mdio_bus, -- phy_config[i].ioslot); -- else -- wriop_set_mdio(phy_config[i].dpmacid, bus); -- } --} -- --static inline void do_dpmac_config(int dpmac, const char *arg_dpmacid, -- char *env_dpmac) --{ -- const char *ret; -- size_t len; -- u8 realbusnum, ioslot; -- struct mii_dev *bus; -- int phy_num; -- char *phystr = "phy00"; -- -- /*search phy in dpmac arg*/ -- for (phy_num = 0; phy_num < WRIOP_MAX_PHY_NUM; phy_num++) { -- sprintf(phystr, "phy%d", phy_num + 1); -- ret = hwconfig_subarg_f(arg_dpmacid, phystr, &len, env_dpmac); -- if (!ret) { -- /*look for phy instead of phy1*/ -- if (!phy_num) -- ret = hwconfig_subarg_f(arg_dpmacid, "phy", -- &len, env_dpmac); -- if (!ret) -- continue; -- } -- -- if (len != 4 || strncmp(ret, "0x", 2)) -- printf("invalid phy format in %s variable.\n" -- "specify phy%d for %s in hex format e.g. 0x12\n", -- env_dpmac, phy_num + 1, arg_dpmacid); -- else -- wriop_set_phy_address(dpmac, phy_num, -- hextoul(ret, NULL)); -- } -- -- /*search mdio in dpmac arg*/ -- ret = hwconfig_subarg_f(arg_dpmacid, "mdio", &len, env_dpmac); -- if (ret) -- realbusnum = *ret - '0'; -- else -- realbusnum = EMI_NONE; -- -- if (realbusnum) { -- /*search io in dpmac arg*/ -- ret = hwconfig_subarg_f(arg_dpmacid, "io", &len, env_dpmac); -- if (ret) -- ioslot = *ret - '0'; -- else -- ioslot = IO_SLOT_NONE; -- /*Register the muxing front-ends to the MDIO buses*/ -- bus = lx2162a_qds_mdio_init(realbusnum, ioslot); -- if (!bus) -- printf("could not get bus for mdio %d ioslot %d\n", -- realbusnum, ioslot); -- else -- wriop_set_mdio(dpmac, bus); -- } --} -- --#endif --#endif /* !CONFIG_DM_ETH */ -- - int board_eth_init(struct bd_info *bis) - { --#ifndef CONFIG_DM_ETH --#if defined(CONFIG_FSL_MC_ENET) -- struct memac_mdio_info mdio_info; -- struct memac_mdio_controller *regs; -- int i; -- const char *ret; -- char *env_dpmac; -- char dpmacid[] = "dpmac00", srds[] = "00_00_00"; -- size_t len; -- struct mii_dev *bus; -- const struct phy_config *phy_config; -- struct ccsr_gur *gur = (void *)(CFG_SYS_FSL_GUTS_ADDR); -- u32 srds_s1, srds_s2; -- -- srds_s1 = in_le32(&gur->rcwsr[28]) & -- FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK; -- srds_s1 >>= FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_SHIFT; -- -- srds_s2 = in_le32(&gur->rcwsr[28]) & -- FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_MASK; -- srds_s2 >>= FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_SHIFT; -- -- sprintf(srds, "%d_%d", srds_s1, srds_s2); -- -- regs = (struct memac_mdio_controller *)CFG_SYS_FSL_WRIOP1_MDIO1; -- mdio_info.regs = regs; -- mdio_info.name = DEFAULT_WRIOP_MDIO1_NAME; -- -- /*Register the EMI 1*/ -- fm_memac_mdio_init(bis, &mdio_info); -- -- regs = (struct memac_mdio_controller *)CFG_SYS_FSL_WRIOP1_MDIO2; -- mdio_info.regs = regs; -- mdio_info.name = DEFAULT_WRIOP_MDIO2_NAME; -- -- /*Register the EMI 2*/ -- fm_memac_mdio_init(bis, &mdio_info); -- -- /* "dpmac" environment variable can be used after -- * defining "dpmac_override" in hwconfig environment variable. -- */ -- if (hwconfig("dpmac_override")) { -- env_dpmac = env_get("dpmac"); -- if (env_dpmac) { -- ret = hwconfig_arg_f("srds", &len, env_dpmac); -- if (ret) { -- if (strncmp(ret, srds, strlen(srds))) { -- printf("SERDES configuration changed.\n" -- "previous: %.*s, current: %s.\n" -- "update dpmac variable.\n", -- (int)len, ret, srds); -- } -- } else { -- printf("SERDES configuration not found.\n" -- "Please add srds:%s in dpmac variable\n", -- srds); -- } -- -- for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) { -- /* Look for dpmac1 to dpmac24(current max) arg -- * in dpmac environment variable -- */ -- sprintf(dpmacid, "dpmac%d", i); -- ret = hwconfig_arg_f(dpmacid, &len, env_dpmac); -- if (ret) -- do_dpmac_config(i, dpmacid, env_dpmac); -- } -- } else { -- printf("Warning: environment dpmac not found.\n" -- "DPAA network interfaces may not work\n"); -- } -- } else { -- /*Look for phy config for serdes1 in phy config table*/ -- phy_config = get_phy_config(srds_s1, serdes1_phy_config, -- ARRAY_SIZE(serdes1_phy_config)); -- if (!phy_config) { -- printf("%s WRIOP: Unsupported SerDes1 Protocol %d\n", -- __func__, srds_s1); -- } else { -- do_phy_config(phy_config); -- } -- phy_config = get_phy_config(srds_s2, serdes2_phy_config, -- ARRAY_SIZE(serdes2_phy_config)); -- if (!phy_config) { -- printf("%s WRIOP: Unsupported SerDes2 Protocol %d\n", -- __func__, srds_s2); -- } else { -- do_phy_config(phy_config); -- } -- } -- -- if (wriop_get_enet_if(WRIOP1_DPMAC17) == PHY_INTERFACE_MODE_RGMII_ID) { -- wriop_set_phy_address(WRIOP1_DPMAC17, 0, RGMII_PHY_ADDR1); -- bus = lx2162a_qds_mdio_init(EMI1, EMI1_RGMII1); -- if (!bus) -- printf("could not get bus for RGMII1\n"); -- else -- wriop_set_mdio(WRIOP1_DPMAC17, bus); -- } -- -- if (wriop_get_enet_if(WRIOP1_DPMAC18) == PHY_INTERFACE_MODE_RGMII_ID) { -- wriop_set_phy_address(WRIOP1_DPMAC18, 0, RGMII_PHY_ADDR2); -- bus = lx2162a_qds_mdio_init(EMI1, EMI1_RGMII2); -- if (!bus) -- printf("could not get bus for RGMII2\n"); -- else -- wriop_set_mdio(WRIOP1_DPMAC18, bus); -- } -- -- cpu_eth_init(bis); --#endif /* CONFIG_FMAN_ENET */ --#endif /* !CONFIG_DM_ETH */ -- - #ifdef CONFIG_PHY_AQUANTIA - /* - * Export functions to be used by AQ firmware -@@ -595,11 +26,7 @@ int board_eth_init(struct bd_info *bis) - gd->jt->miiphy_set_current_dev = miiphy_set_current_dev; - #endif - --#ifdef CONFIG_DM_ETH - return 0; --#else -- return pci_eth_init(bis); --#endif - } - - #if defined(CONFIG_RESET_PHY_R) -@@ -611,273 +38,10 @@ void reset_phy(void) - } - #endif /* CONFIG_RESET_PHY_R */ - --#ifndef CONFIG_DM_ETH --#if defined(CONFIG_FSL_MC_ENET) --int fdt_fixup_dpmac_phy_handle(void *fdt, int dpmac_id, int node_phandle) --{ -- int offset; -- int ret; -- char dpmac_str[] = "dpmacs@00"; -- const char *phy_string; -- -- offset = fdt_path_offset(fdt, "/soc/fsl-mc/dpmacs"); -- -- if (offset < 0) -- offset = fdt_path_offset(fdt, "/fsl-mc/dpmacs"); -- -- if (offset < 0) { -- printf("dpmacs node not found in device tree\n"); -- return offset; -- } -- -- sprintf(dpmac_str, "dpmac@%x", dpmac_id); -- debug("dpmac_str = %s\n", dpmac_str); -- -- offset = fdt_subnode_offset(fdt, offset, dpmac_str); -- if (offset < 0) { -- printf("%s node not found in device tree\n", dpmac_str); -- return offset; -- } -- -- phy_string = fdt_getprop(fdt, offset, "phy-connection-type", NULL); -- if (is_backplane_mode(phy_string)) { -- /* Backplane KR mode: skip fixups */ -- printf("Interface %d in backplane KR mode\n", dpmac_id); -- return 0; -- } -- -- ret = fdt_appendprop_cell(fdt, offset, "phy-handle", node_phandle); -- if (ret) -- printf("%d@%s %d\n", __LINE__, __func__, ret); -- -- phy_string = phy_string_for_interface(wriop_get_enet_if(dpmac_id)); -- ret = fdt_setprop_string(fdt, offset, "phy-connection-type", -- phy_string); -- if (ret) -- printf("%d@%s %d\n", __LINE__, __func__, ret); -- -- return ret; --} -- --int fdt_get_ioslot_offset(void *fdt, struct mii_dev *mii_dev, int fpga_offset) --{ -- char mdio_ioslot_str[] = "mdio@00"; -- struct lx2162a_qds_mdio *priv; -- u64 reg; -- u32 phandle; -- int offset, mux_val; -- -- /*Test if the MDIO bus is real mdio bus or muxing front end ?*/ -- if (strncmp(mii_dev->name, "LX2162A_QDS_MDIO", -- strlen("LX2162A_QDS_MDIO"))) -- return -1; -- -- /*Get the real MDIO bus num and ioslot info from bus's priv data*/ -- priv = mii_dev->priv; -- -- debug("real_bus_num = %d, ioslot = %d\n", -- priv->realbusnum, priv->ioslot); -- -- if (priv->realbusnum == EMI1) -- reg = CFG_SYS_FSL_WRIOP1_MDIO1; -- else -- reg = CFG_SYS_FSL_WRIOP1_MDIO2; -- -- offset = fdt_node_offset_by_compat_reg(fdt, "fsl,fman-memac-mdio", reg); -- if (offset < 0) { -- printf("mdio@%llx node not found in device tree\n", reg); -- return offset; -- } -- -- phandle = fdt_get_phandle(fdt, offset); -- phandle = cpu_to_fdt32(phandle); -- offset = fdt_node_offset_by_prop_value(fdt, -1, "mdio-parent-bus", -- &phandle, 4); -- if (offset < 0) { -- printf("mdio-mux-%d node not found in device tree\n", -- priv->realbusnum == EMI1 ? 1 : 2); -- return offset; -- } -- -- mux_val = lx2162a_qds_get_mdio_mux_val(priv->realbusnum, priv->ioslot); -- if (priv->realbusnum == EMI1) -- mux_val >>= BRDCFG4_EMI1SEL_SHIFT; -- else -- mux_val >>= BRDCFG4_EMI2SEL_SHIFT; -- sprintf(mdio_ioslot_str, "mdio@%x", (u8)mux_val); -- -- offset = fdt_subnode_offset(fdt, offset, mdio_ioslot_str); -- if (offset < 0) { -- printf("%s node not found in device tree\n", mdio_ioslot_str); -- return offset; -- } -- -- return offset; --} -- --int fdt_create_phy_node(void *fdt, int offset, u8 phyaddr, int *subnodeoffset, -- struct phy_device *phy_dev, int phandle) --{ -- char phy_node_name[] = "ethernet-phy@00"; -- char phy_id_compatible_str[] = "ethernet-phy-id0000.0000,"; -- int ret; -- -- sprintf(phy_node_name, "ethernet-phy@%x", phyaddr); -- debug("phy_node_name = %s\n", phy_node_name); -- -- *subnodeoffset = fdt_add_subnode(fdt, offset, phy_node_name); -- if (*subnodeoffset <= 0) { -- printf("Could not add subnode %s inside node %s err = %s\n", -- phy_node_name, fdt_get_name(fdt, offset, NULL), -- fdt_strerror(*subnodeoffset)); -- return *subnodeoffset; -- } -- -- sprintf(phy_id_compatible_str, "ethernet-phy-id%04x.%04x,", -- phy_dev->phy_id >> 16, phy_dev->phy_id & 0xFFFF); -- debug("phy_id_compatible_str %s\n", phy_id_compatible_str); -- -- ret = fdt_setprop_string(fdt, *subnodeoffset, "compatible", -- phy_id_compatible_str); -- if (ret) { -- printf("%d@%s %d\n", __LINE__, __func__, ret); -- goto out; -- } -- -- if (phy_dev->is_c45) { -- ret = fdt_appendprop_string(fdt, *subnodeoffset, "compatible", -- "ethernet-phy-ieee802.3-c45"); -- if (ret) { -- printf("%d@%s %d\n", __LINE__, __func__, ret); -- goto out; -- } -- } else { -- ret = fdt_appendprop_string(fdt, *subnodeoffset, "compatible", -- "ethernet-phy-ieee802.3-c22"); -- if (ret) { -- printf("%d@%s %d\n", __LINE__, __func__, ret); -- goto out; -- } -- } -- -- ret = fdt_setprop_cell(fdt, *subnodeoffset, "reg", phyaddr); -- if (ret) { -- printf("%d@%s %d\n", __LINE__, __func__, ret); -- goto out; -- } -- -- ret = fdt_set_phandle(fdt, *subnodeoffset, phandle); -- if (ret) { -- printf("%d@%s %d\n", __LINE__, __func__, ret); -- goto out; -- } -- --out: -- if (ret) -- fdt_del_node(fdt, *subnodeoffset); -- -- return ret; --} -- --#define is_rgmii(dpmac_id) \ -- wriop_get_enet_if((dpmac_id)) == PHY_INTERFACE_MODE_RGMII_ID -- --int fdt_fixup_board_phy(void *fdt) --{ -- int fpga_offset, offset, subnodeoffset; -- struct mii_dev *mii_dev; -- struct list_head *mii_devs, *entry; -- int ret, dpmac_id, i; -- struct phy_device *phy_dev; -- char ethname[ETH_NAME_LEN]; -- phy_interface_t phy_iface; -- uint32_t phandle; -- -- ret = 0; -- /* we know FPGA is connected to i2c0, therefore search path directly, -- * instead of compatible property, as it saves time -- */ -- fpga_offset = fdt_path_offset(fdt, "/soc/i2c@2000000/fpga"); -- -- if (fpga_offset < 0) -- fpga_offset = fdt_path_offset(fdt, "/i2c@2000000/fpga"); -- -- if (fpga_offset < 0) { -- printf("i2c@2000000/fpga node not found in device tree\n"); -- return fpga_offset; -- } -- -- ret = fdt_generate_phandle(fdt, &phandle); -- if (ret < 0) -- return ret; -- -- mii_devs = mdio_get_list_head(); -- -- list_for_each(entry, mii_devs) { -- mii_dev = list_entry(entry, struct mii_dev, link); -- debug("mii_dev name : %s\n", mii_dev->name); -- offset = fdt_get_ioslot_offset(fdt, mii_dev, fpga_offset); -- if (offset < 0) -- continue; -- -- // Look for phy devices attached to MDIO bus muxing front end -- // and create their entries with compatible being the device id -- for (i = 0; i < PHY_MAX_ADDR; i++) { -- phy_dev = mii_dev->phymap[i]; -- if (!phy_dev) -- continue; -- -- // TODO: use sscanf instead of loop -- dpmac_id = WRIOP1_DPMAC1; -- while (dpmac_id < NUM_WRIOP_PORTS) { -- phy_iface = wriop_get_enet_if(dpmac_id); -- snprintf(ethname, ETH_NAME_LEN, "DPMAC%d@%s", -- dpmac_id, -- phy_string_for_interface(phy_iface)); -- if (strcmp(ethname, phy_dev->dev->name) == 0) -- break; -- dpmac_id++; -- } -- if (dpmac_id == NUM_WRIOP_PORTS) -- continue; -- -- if ((dpmac_id == 17 || dpmac_id == 18) && -- is_rgmii(dpmac_id)) -- continue; -- -- ret = fdt_create_phy_node(fdt, offset, i, -- &subnodeoffset, -- phy_dev, phandle); -- if (ret) -- break; -- -- ret = fdt_fixup_dpmac_phy_handle(fdt, -- dpmac_id, phandle); -- if (ret) { -- fdt_del_node(fdt, subnodeoffset); -- break; -- } -- /* calculate offset again as new node addition may have -- * changed offset; -- */ -- offset = fdt_get_ioslot_offset(fdt, mii_dev, -- fpga_offset); -- phandle++; -- } -- -- if (ret) -- break; -- } -- -- return ret; --} --#endif // CONFIG_FSL_MC_ENET --#endif -- --#if defined(CONFIG_DM_ETH) && defined(CONFIG_MULTI_DTB_FIT) -+#if defined(CONFIG_MULTI_DTB_FIT) - --/* Structure to hold SERDES protocols supported in case of -- * CONFIG_DM_ETH enabled (network interfaces are described in the DTS). -+/* Structure to hold SERDES protocols supported (network interfaces are -+ * described in the DTS). - * - * @serdes_block: the index of the SERDES block - * @serdes_protocol: the decimal value of the protocol supported -diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c -index d8a86cdf61..33842d0217 100644 ---- a/board/freescale/lx2160a/lx2160a.c -+++ b/board/freescale/lx2160a/lx2160a.c -@@ -572,7 +572,7 @@ int board_init(void) - out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR107_IRQ_MASK); - #endif - --#if !defined(CONFIG_SYS_EARLY_PCI_INIT) && defined(CONFIG_DM_ETH) -+#if !defined(CONFIG_SYS_EARLY_PCI_INIT) - pci_init(); - #endif - return 0; -@@ -642,7 +642,6 @@ u16 soc_get_fuse_vid(int vid_index) - #endif - - #ifdef CONFIG_FSL_MC_ENET --extern int fdt_fixup_board_phy(void *fdt); - - void fdt_fixup_board_enet(void *fdt) - { -@@ -662,9 +661,6 @@ void fdt_fixup_board_enet(void *fdt) - if (get_mc_boot_status() == 0 && - (is_lazy_dpl_addr_valid() || get_dpl_apply_status() == 0)) { - fdt_status_okay(fdt, offset); --#ifndef CONFIG_DM_ETH -- fdt_fixup_board_phy(fdt); --#endif - } else { - fdt_status_fail(fdt, offset); - } -diff --git a/board/freescale/mx51evk/mx51evk_video.c b/board/freescale/mx51evk/mx51evk_video.c -deleted file mode 100644 -index 3715c5d738..0000000000 ---- a/board/freescale/mx51evk/mx51evk_video.c -+++ /dev/null -@@ -1,98 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0+ --/* -- * Copyright (C) 2012 Freescale Semiconductor, Inc. -- * Fabio Estevam -- */ -- --#include --#include --#include --#include --#include --#include --#include -- --#define MX51EVK_LCD_3V3 IMX_GPIO_NR(4, 9) --#define MX51EVK_LCD_5V IMX_GPIO_NR(4, 10) --#define MX51EVK_LCD_BACKLIGHT IMX_GPIO_NR(3, 4) -- --static struct fb_videomode const claa_wvga = { -- .name = "CLAA07LC0ACW", -- .refresh = 57, -- .xres = 800, -- .yres = 480, -- .pixclock = 37037, -- .left_margin = 40, -- .right_margin = 60, -- .upper_margin = 10, -- .lower_margin = 10, -- .hsync_len = 20, -- .vsync_len = 10, -- .sync = 0, -- .vmode = FB_VMODE_NONINTERLACED --}; -- --static struct fb_videomode const dvi = { -- .name = "DVI panel", -- .refresh = 60, -- .xres = 1024, -- .yres = 768, -- .pixclock = 15385, -- .left_margin = 220, -- .right_margin = 40, -- .upper_margin = 21, -- .lower_margin = 7, -- .hsync_len = 60, -- .vsync_len = 10, -- .sync = 0, -- .vmode = FB_VMODE_NONINTERLACED --}; -- --void setup_iomux_lcd(void) --{ -- /* DI2_PIN15 */ -- imx_iomux_v3_setup_pad(MX51_PAD_DI_GP4__DI2_PIN15); -- -- /* Pad settings for DI2_DISP_CLK */ -- imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK, -- PAD_CTL_PKE | PAD_CTL_DSE_MAX | PAD_CTL_SRE_SLOW)); -- -- /* Turn on 3.3V voltage for LCD */ -- imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_CSI2_D12__GPIO4_9, -- NO_PAD_CTRL)); -- gpio_direction_output(MX51EVK_LCD_3V3, 1); -- -- /* Turn on 5V voltage for LCD */ -- imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_CSI2_D13__GPIO4_10, -- NO_PAD_CTRL)); -- gpio_direction_output(MX51EVK_LCD_5V, 1); -- -- /* Turn on GPIO backlight */ -- imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_DI1_D1_CS__GPIO3_4, -- NO_PAD_CTRL)); -- gpio_direction_output(MX51EVK_LCD_BACKLIGHT, 1); --} -- --int board_video_skip(void) --{ -- int ret; -- char const *e = env_get("panel"); -- -- if (e) { -- if (strcmp(e, "claa") == 0) { -- ret = ipuv3_fb_init(&claa_wvga, 1, IPU_PIX_FMT_RGB565); -- if (ret) -- printf("claa cannot be configured: %d\n", ret); -- return ret; -- } -- } -- -- /* -- * 'panel' env variable not found or has different value than 'claa' -- * Defaulting to dvi output. -- */ -- ret = ipuv3_fb_init(&dvi, 0, IPU_PIX_FMT_RGB24); -- if (ret) -- printf("dvi cannot be configured: %d\n", ret); -- return ret; --} -diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c -index d447ad840a..d418cd8f4c 100644 ---- a/board/freescale/mx53loco/mx53loco.c -+++ b/board/freescale/mx53loco/mx53loco.c -@@ -27,6 +27,8 @@ - #include - #include - #include -+#include -+#include - - #define MX53LOCO_LCD_POWER IMX_GPIO_NR(3, 24) - -@@ -39,10 +41,16 @@ u32 get_board_rev(void) - struct fuse_bank *bank = &iim->bank[0]; - struct fuse_bank0_regs *fuse = - (struct fuse_bank0_regs *)bank->fuse_regs; -+ struct udevice *bus; -+ struct udevice *dev; - - int rev = readl(&fuse->gp[6]); - -- if (!i2c_probe(CFG_SYS_DIALOG_PMIC_I2C_ADDR)) -+ ret = uclass_get_device_by_seq(UCLASS_I2C, 0, &bus); -+ if (ret) -+ return ret; -+ -+ if (!dm_i2c_probe(bus, CFG_SYS_DIALOG_PMIC_I2C_ADDR, 0, &dev)) - rev = 0; - - return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8; -@@ -62,26 +70,19 @@ static void setup_iomux_uart(void) - imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); - } - --#define I2C_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \ -- PAD_CTL_PUS_100K_UP | PAD_CTL_ODE) -- --static void setup_iomux_i2c(void) --{ -- static const iomux_v3_cfg_t i2c1_pads[] = { -- NEW_PAD_CTRL(MX53_PAD_CSI0_DAT8__I2C1_SDA, I2C_PAD_CTRL), -- NEW_PAD_CTRL(MX53_PAD_CSI0_DAT9__I2C1_SCL, I2C_PAD_CTRL), -- }; -- -- imx_iomux_v3_setup_multiple_pads(i2c1_pads, ARRAY_SIZE(i2c1_pads)); --} -- - static int power_init(void) - { - unsigned int val; - int ret; - struct pmic *p; -+ struct udevice *bus; -+ struct udevice *dev; -+ -+ ret = uclass_get_device_by_seq(UCLASS_I2C, 0, &bus); -+ if (ret) -+ return ret; - -- if (!i2c_probe(CFG_SYS_DIALOG_PMIC_I2C_ADDR)) { -+ if (!dm_i2c_probe(bus, CFG_SYS_DIALOG_PMIC_I2C_ADDR, 0, &dev)) { - ret = pmic_dialog_init(I2C_PMIC); - if (ret) - return ret; -@@ -124,8 +125,8 @@ static int power_init(void) - return ret; - } - -- if (!i2c_probe(CFG_SYS_FSL_PMIC_I2C_ADDR)) { -- ret = pmic_init(I2C_0); -+ if (!dm_i2c_probe(bus, CFG_SYS_FSL_PMIC_I2C_ADDR, 0, &dev)) { -+ ret = pmic_init(0); - if (ret) - return ret; - -@@ -225,7 +226,6 @@ int board_init(void) - gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; - - mxc_set_sata_internal_clock(); -- setup_iomux_i2c(); - - return 0; - } -diff --git a/board/freescale/mx53loco/mx53loco_video.c b/board/freescale/mx53loco/mx53loco_video.c -deleted file mode 100644 -index ff3fc8ce3e..0000000000 ---- a/board/freescale/mx53loco/mx53loco_video.c -+++ /dev/null -@@ -1,114 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0+ --/* -- * Copyright (C) 2012 Freescale Semiconductor, Inc. -- * Fabio Estevam -- */ -- --#include --#include --#include --#include --#include --#include --#include -- --#define MX53LOCO_LCD_POWER IMX_GPIO_NR(3, 24) -- --static struct fb_videomode const claa_wvga = { -- .name = "CLAA07LC0ACW", -- .refresh = 57, -- .xres = 800, -- .yres = 480, -- .pixclock = 37037, -- .left_margin = 40, -- .right_margin = 60, -- .upper_margin = 10, -- .lower_margin = 10, -- .hsync_len = 20, -- .vsync_len = 10, -- .sync = 0, -- .vmode = FB_VMODE_NONINTERLACED --}; -- --static struct fb_videomode const seiko_wvga = { -- .name = "Seiko-43WVF1G", -- .refresh = 60, -- .xres = 800, -- .yres = 480, -- .pixclock = 29851, /* picosecond (33.5 MHz) */ -- .left_margin = 89, -- .right_margin = 164, -- .upper_margin = 23, -- .lower_margin = 10, -- .hsync_len = 10, -- .vsync_len = 10, -- .sync = 0, --}; -- --void setup_iomux_lcd(void) --{ -- static const iomux_v3_cfg_t lcd_pads[] = { -- MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK, -- MX53_PAD_DI0_PIN15__IPU_DI0_PIN15, -- MX53_PAD_DI0_PIN2__IPU_DI0_PIN2, -- MX53_PAD_DI0_PIN3__IPU_DI0_PIN3, -- MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0, -- MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1, -- MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2, -- MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3, -- MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4, -- MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5, -- MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6, -- MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7, -- MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8, -- MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9, -- MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10, -- MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11, -- MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12, -- MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13, -- MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14, -- MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15, -- MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16, -- MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17, -- MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18, -- MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19, -- MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20, -- MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21, -- MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22, -- MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23, -- }; -- -- imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads)); -- -- /* Turn on GPIO backlight */ -- imx_iomux_v3_setup_pad(MX53_PAD_EIM_D24__GPIO3_24); -- gpio_direction_output(MX53LOCO_LCD_POWER, 1); -- -- /* Turn on display contrast */ -- imx_iomux_v3_setup_pad(MX53_PAD_GPIO_1__GPIO1_1); -- gpio_direction_output(IMX_GPIO_NR(1, 1), 1); --} -- --int board_video_skip(void) --{ -- int ret; -- char const *e = env_get("panel"); -- -- if (e) { -- if (strcmp(e, "seiko") == 0) { -- ret = ipuv3_fb_init(&seiko_wvga, 0, IPU_PIX_FMT_RGB24); -- if (ret) -- printf("Seiko cannot be configured: %d\n", ret); -- return ret; -- } -- } -- -- /* -- * 'panel' env variable not found or has different value than 'seiko' -- * Defaulting to claa lcd. -- */ -- ret = ipuv3_fb_init(&claa_wvga, 0, IPU_PIX_FMT_RGB565); -- if (ret) -- printf("CLAA cannot be configured: %d\n", ret); -- return ret; --} -diff --git a/board/freescale/mx6sabreauto/mx6sabreauto.c b/board/freescale/mx6sabreauto/mx6sabreauto.c -index 9155dcfbd0..039deb5bf9 100644 ---- a/board/freescale/mx6sabreauto/mx6sabreauto.c -+++ b/board/freescale/mx6sabreauto/mx6sabreauto.c -@@ -19,14 +19,12 @@ - #include - #include - #include --#include - #include - #include - #include - #include - #include - #include --#include - #include - #include - #include -@@ -49,23 +47,15 @@ DECLARE_GLOBAL_DATA_PTR; - #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ - PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) - --#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ -- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ -- PAD_CTL_ODE | PAD_CTL_SRE_FAST) -- - #define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP) - #define GPMI_PAD_CTRL1 (PAD_CTL_DSE_40ohm | PAD_CTL_SPEED_MED | \ - PAD_CTL_SRE_FAST) - #define GPMI_PAD_CTRL2 (GPMI_PAD_CTRL0 | GPMI_PAD_CTRL1) - --#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) -- - #define WEIM_NOR_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) - --#define I2C_PMIC 1 -- - int dram_init(void) - { - gd->ram_size = imx_ddr_size(); -@@ -78,70 +68,6 @@ static iomux_v3_cfg_t const uart4_pads[] = { - IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), - }; - -- --/* I2C2 PMIC, iPod, Tuner, Codec, Touch, HDMI EDID, MIPI CSI2 card */ --static struct i2c_pads_info mx6q_i2c_pad_info1 = { -- .scl = { -- .i2c_mode = MX6Q_PAD_EIM_EB2__I2C2_SCL | PC, -- .gpio_mode = MX6Q_PAD_EIM_EB2__GPIO2_IO30 | PC, -- .gp = IMX_GPIO_NR(2, 30) -- }, -- .sda = { -- .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC, -- .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO4_IO13 | PC, -- .gp = IMX_GPIO_NR(4, 13) -- } --}; -- --static struct i2c_pads_info mx6dl_i2c_pad_info1 = { -- .scl = { -- .i2c_mode = MX6DL_PAD_EIM_EB2__I2C2_SCL | PC, -- .gpio_mode = MX6DL_PAD_EIM_EB2__GPIO2_IO30 | PC, -- .gp = IMX_GPIO_NR(2, 30) -- }, -- .sda = { -- .i2c_mode = MX6DL_PAD_KEY_ROW3__I2C2_SDA | PC, -- .gpio_mode = MX6DL_PAD_KEY_ROW3__GPIO4_IO13 | PC, -- .gp = IMX_GPIO_NR(4, 13) -- } --}; -- --#ifndef CONFIG_SYS_FLASH_CFI --/* -- * I2C3 MLB, Port Expanders (A, B, C), Video ADC, Light Sensor, -- * Compass Sensor, Accelerometer, Res Touch -- */ --static struct i2c_pads_info mx6q_i2c_pad_info2 = { -- .scl = { -- .i2c_mode = MX6Q_PAD_GPIO_3__I2C3_SCL | PC, -- .gpio_mode = MX6Q_PAD_GPIO_3__GPIO1_IO03 | PC, -- .gp = IMX_GPIO_NR(1, 3) -- }, -- .sda = { -- .i2c_mode = MX6Q_PAD_EIM_D18__I2C3_SDA | PC, -- .gpio_mode = MX6Q_PAD_EIM_D18__GPIO3_IO18 | PC, -- .gp = IMX_GPIO_NR(3, 18) -- } --}; -- --static struct i2c_pads_info mx6dl_i2c_pad_info2 = { -- .scl = { -- .i2c_mode = MX6DL_PAD_GPIO_3__I2C3_SCL | PC, -- .gpio_mode = MX6DL_PAD_GPIO_3__GPIO1_IO03 | PC, -- .gp = IMX_GPIO_NR(1, 3) -- }, -- .sda = { -- .i2c_mode = MX6DL_PAD_EIM_D18__I2C3_SDA | PC, -- .gpio_mode = MX6DL_PAD_EIM_D18__GPIO3_IO18 | PC, -- .gp = IMX_GPIO_NR(3, 18) -- } --}; --#endif -- --static iomux_v3_cfg_t const i2c3_pads[] = { -- IOMUX_PADS(PAD_EIM_A24__GPIO5_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL)), --}; -- - static iomux_v3_cfg_t const port_exp[] = { - IOMUX_PADS(PAD_SD2_DAT0__GPIO1_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL)), - }; -@@ -516,21 +442,10 @@ int board_init(void) - /* address of boot parameters */ - gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; - -- /* I2C 2 and 3 setup - I2C 3 hw mux with EIM */ -- if (is_mx6dq() || is_mx6dqp()) -- setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c_pad_info1); -- else -- setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c_pad_info1); - /* I2C 3 Steer */ - gpio_request(IMX_GPIO_NR(5, 4), "steer logic"); - gpio_direction_output(IMX_GPIO_NR(5, 4), 1); -- SETUP_IOMUX_PADS(i2c3_pads); --#ifndef CONFIG_SYS_FLASH_CFI -- if (is_mx6dq() || is_mx6dqp()) -- setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c_pad_info2); -- else -- setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c_pad_info2); --#endif -+ - gpio_request(IMX_GPIO_NR(1, 15), "expander en"); - gpio_direction_output(IMX_GPIO_NR(1, 15), 1); - SETUP_IOMUX_PADS(port_exp); -@@ -554,22 +469,27 @@ int board_spi_cs_gpio(unsigned bus, unsigned cs) - - int power_init_board(void) - { -- struct pmic *p; -+ struct udevice *dev; - unsigned int value; -+ int ret; -+ -+ ret = pmic_get("pfuze100@8", &dev); -+ if (ret == -ENODEV) -+ return 0; -+ -+ if (ret != 0) -+ return ret; - -- p = pfuze_common_init(I2C_PMIC); -- if (!p) -- return -ENODEV; - - if (is_mx6dqp()) { - /* set SW2 staby volatage 0.975V*/ -- pmic_reg_read(p, PFUZE100_SW2STBY, &value); -+ value = pmic_reg_read(dev, PFUZE100_SW2STBY); - value &= ~0x3f; - value |= 0x17; -- pmic_reg_write(p, PFUZE100_SW2STBY, value); -+ pmic_reg_write(dev, PFUZE100_SW2STBY, value); - } - -- return pfuze_mode_init(p, APS_PFM); -+ return pfuze_mode_init(dev, APS_PFM); - } - - #ifdef CONFIG_CMD_BMODE -@@ -979,7 +899,6 @@ void board_init_f(ulong dummy) - ccgr_init(); - gpr_init(); - -- /* iomux and setup of i2c */ - board_early_init_f(); - - /* setup GP timer */ -diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c -index 8c35230855..96a76b0581 100644 ---- a/board/freescale/mx6sabresd/mx6sabresd.c -+++ b/board/freescale/mx6sabresd/mx6sabresd.c -@@ -17,7 +17,6 @@ - #include - #include - #include --#include - #include - #include - #include -@@ -28,7 +27,6 @@ - #include - #include - #include --#include - #include - #include - #include -@@ -49,14 +47,6 @@ DECLARE_GLOBAL_DATA_PTR; - #define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) - --#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ -- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ -- PAD_CTL_ODE | PAD_CTL_SRE_FAST) -- --#define I2C_PMIC 1 -- --#define I2C_PAD MUX_PAD_CTRL(I2C_PAD_CTRL) -- - #define DISP0_PWR_EN IMX_GPIO_NR(1, 21) - - #define KEY_VOL_UP IMX_GPIO_NR(1, 4) -@@ -174,32 +164,6 @@ static void enable_lvds(struct display_info_t const *dev) - enable_backlight(); - } - --static struct i2c_pads_info mx6q_i2c_pad_info1 = { -- .scl = { -- .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | I2C_PAD, -- .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO4_IO12 | I2C_PAD, -- .gp = IMX_GPIO_NR(4, 12) -- }, -- .sda = { -- .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | I2C_PAD, -- .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO4_IO13 | I2C_PAD, -- .gp = IMX_GPIO_NR(4, 13) -- } --}; -- --static struct i2c_pads_info mx6dl_i2c_pad_info1 = { -- .scl = { -- .i2c_mode = MX6DL_PAD_KEY_COL3__I2C2_SCL | I2C_PAD, -- .gpio_mode = MX6DL_PAD_KEY_COL3__GPIO4_IO12 | I2C_PAD, -- .gp = IMX_GPIO_NR(4, 12) -- }, -- .sda = { -- .i2c_mode = MX6DL_PAD_KEY_ROW3__I2C2_SDA | I2C_PAD, -- .gpio_mode = MX6DL_PAD_KEY_ROW3__GPIO4_IO13 | I2C_PAD, -- .gp = IMX_GPIO_NR(4, 13) -- } --}; -- - static void setup_spi(void) - { - SETUP_IOMUX_PADS(ecspi1_pads); -@@ -495,10 +459,7 @@ int board_init(void) - #ifdef CONFIG_MXC_SPI - setup_spi(); - #endif -- if (is_mx6dq() || is_mx6dqp()) -- setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c_pad_info1); -- else -- setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c_pad_info1); -+ - #if defined(CONFIG_VIDEO_IPUV3) - setup_display(); - #endif -@@ -511,29 +472,32 @@ int board_init(void) - - int power_init_board(void) - { -- struct pmic *p; -+ struct udevice *dev; - unsigned int reg; - int ret; - -- p = pfuze_common_init(I2C_PMIC); -- if (!p) -- return -ENODEV; -+ ret = pmic_get("pfuze100@8", &dev); -+ if (ret == -ENODEV) -+ return 0; -+ -+ if (ret != 0) -+ return ret; - -- ret = pfuze_mode_init(p, APS_PFM); -+ ret = pfuze_mode_init(dev, APS_PFM); - if (ret < 0) - return ret; - - /* Increase VGEN3 from 2.5 to 2.8V */ -- pmic_reg_read(p, PFUZE100_VGEN3VOL, ®); -+ reg = pmic_reg_read(dev, PFUZE100_VGEN3VOL); - reg &= ~LDO_VOL_MASK; - reg |= LDOB_2_80V; -- pmic_reg_write(p, PFUZE100_VGEN3VOL, reg); -+ pmic_reg_write(dev, PFUZE100_VGEN3VOL, reg); - - /* Increase VGEN5 from 2.8 to 3V */ -- pmic_reg_read(p, PFUZE100_VGEN5VOL, ®); -+ reg = pmic_reg_read(dev, PFUZE100_VGEN5VOL); - reg &= ~LDO_VOL_MASK; - reg |= LDOB_3_00V; -- pmic_reg_write(p, PFUZE100_VGEN5VOL, reg); -+ pmic_reg_write(dev, PFUZE100_VGEN5VOL, reg); - - return 0; - } -@@ -902,7 +866,6 @@ void board_init_f(ulong dummy) - ccgr_init(); - gpr_init(); - -- /* iomux and setup of i2c */ - board_early_init_f(); - - /* setup GP timer */ -diff --git a/board/freescale/mx6sxsabreauto/MAINTAINERS b/board/freescale/mx6sxsabreauto/MAINTAINERS -index 692bbd9767..8dc62e5e3e 100644 ---- a/board/freescale/mx6sxsabreauto/MAINTAINERS -+++ b/board/freescale/mx6sxsabreauto/MAINTAINERS -@@ -1,5 +1,5 @@ - MX6SXSABREAUTO BOARD --M: Fabio Estevam -+M: Peng Fan - S: Maintained - F: board/freescale/mx6sxsabreauto/ - F: include/configs/mx6sxsabreauto.h -diff --git a/board/gateworks/gw_ventana/MAINTAINERS b/board/gateworks/gw_ventana/MAINTAINERS -index 1619d23c87..f9872806c0 100644 ---- a/board/gateworks/gw_ventana/MAINTAINERS -+++ b/board/gateworks/gw_ventana/MAINTAINERS -@@ -5,7 +5,6 @@ F: board/gateworks/gw_ventana/ - F: include/configs/gw_ventana.h - F: configs/gwventana_nand_defconfig - F: configs/gwventana_emmc_defconfig --F: configs/gwventana_gw5904_defconfig - F: arch/arm/dts/imx6dl-gw51xx.dts - F: arch/arm/dts/imx6dl-gw52xx.dts - F: arch/arm/dts/imx6dl-gw53xx.dts -diff --git a/board/gateworks/venice/venice.c b/board/gateworks/venice/venice.c -index c4d86c26a9..ca62f0be6d 100644 ---- a/board/gateworks/venice/venice.c -+++ b/board/gateworks/venice/venice.c -@@ -41,8 +41,7 @@ int board_fit_config_name_match(const char *name) - return -1; - } - --#if (IS_ENABLED(CONFIG_NET)) --static int setup_fec(void) -+static int __maybe_unused setup_fec(void) - { - struct iomuxc_gpr_base_regs *gpr = - (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; -@@ -58,23 +57,10 @@ static int setup_fec(void) - return 0; - } - --static int setup_eqos(void) --{ -- struct iomuxc_gpr_base_regs *gpr = -- (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; -- -- /* set INTF as RGMII, enable RGMII TXC clock */ -- clrsetbits_le32(&gpr->gpr[1], -- IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MASK, BIT(16)); -- setbits_le32(&gpr->gpr[1], BIT(19) | BIT(21)); -- -- return set_clk_eqos(ENET_125MHZ); --} -- -+#if (IS_ENABLED(CONFIG_NET)) - int board_phy_config(struct phy_device *phydev) - { - unsigned short val; -- ofnode node; - - switch (phydev->phy_id) { - case 0x2000a231: /* TI DP83867 GbE PHY */ -@@ -85,21 +71,6 @@ int board_phy_config(struct phy_device *phydev) - val |= 0xb << 8; /* LED2(Green;Link/Act): blink for TX/RX act */ - phy_write(phydev, MDIO_DEVAD_NONE, 24, val); - break; -- case 0xd565a401: /* MaxLinear GPY111 */ -- puts("GPY111 "); -- node = phy_get_ofnode(phydev); -- if (ofnode_valid(node)) { -- u32 rx_delay, tx_delay; -- -- rx_delay = ofnode_read_u32_default(node, "rx-internal-delay-ps", 2000); -- tx_delay = ofnode_read_u32_default(node, "tx-internal-delay-ps", 2000); -- val = phy_read(phydev, MDIO_DEVAD_NONE, 0x17); -- val &= ~((0x7 << 12) | (0x7 << 8)); -- val |= (rx_delay / 500) << 12; -- val |= (tx_delay / 500) << 8; -- phy_write(phydev, MDIO_DEVAD_NONE, 0x17, val); -- } -- break; - } - - if (phydev->drv->config) -@@ -115,8 +86,6 @@ int board_init(void) - - if (IS_ENABLED(CONFIG_FEC_MXC)) - setup_fec(); -- if (IS_ENABLED(CONFIG_DWC_ETH_QOS)) -- setup_eqos(); - - return 0; - } -diff --git a/board/keymile/common/common.c b/board/keymile/common/common.c -index 8c282f9952..991022ac83 100644 ---- a/board/keymile/common/common.c -+++ b/board/keymile/common/common.c -@@ -78,7 +78,7 @@ int set_km_env(void) - return 0; - } - --#if CONFIG_IS_ENABLED(PG_WCOM_UBOOT_UPDATE_SUPPORTED) -+#if IS_ENABLED(CONFIG_PG_WCOM_UBOOT_UPDATE_SUPPORTED) - #if ((!IS_ENABLED(CONFIG_PG_WCOM_UBOOT_BOOTPACKAGE) && \ - !IS_ENABLED(CONFIG_PG_WCOM_UBOOT_UPDATE)) || \ - (IS_ENABLED(CONFIG_PG_WCOM_UBOOT_BOOTPACKAGE) && \ -diff --git a/board/kontron/pitx_imx8m/pitx_imx8m.c b/board/kontron/pitx_imx8m/pitx_imx8m.c -index af1832c473..fcda86bc1b 100644 ---- a/board/kontron/pitx_imx8m/pitx_imx8m.c -+++ b/board/kontron/pitx_imx8m/pitx_imx8m.c -@@ -92,24 +92,12 @@ static iomux_v3_cfg_t const fec1_rst_pads[] = { - IMX8MQ_PAD_GPIO1_IO11__GPIO1_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL), - }; - --static void setup_iomux_fec(void) -+static void setup_fec(void) - { - imx_iomux_v3_setup_multiple_pads(fec1_rst_pads, - ARRAY_SIZE(fec1_rst_pads)); - } - --static int setup_fec(void) --{ -- struct iomuxc_gpr_base_regs *gpr = -- (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; -- -- setup_iomux_fec(); -- -- /* Use 125M anatop REF_CLK1 for ENET1, not from external */ -- clrsetbits_le32(&gpr->gpr[1], BIT(13) | BIT(17), 0); -- return set_clk_enet(ENET_125MHZ); --} -- - int board_phy_config(struct phy_device *phydev) - { - unsigned int val; -diff --git a/board/msc/sm2s_imx8mp/sm2s_imx8mp.c b/board/msc/sm2s_imx8mp/sm2s_imx8mp.c -index 3913c4f242..6ccbf02db0 100644 ---- a/board/msc/sm2s_imx8mp/sm2s_imx8mp.c -+++ b/board/msc/sm2s_imx8mp/sm2s_imx8mp.c -@@ -30,19 +30,6 @@ static void setup_fec(void) - setbits_le32(&gpr->gpr[1], BIT(22)); - } - --static int setup_eqos(void) --{ -- struct iomuxc_gpr_base_regs *gpr = -- (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; -- -- /* set INTF as RGMII, enable RGMII TXC clock */ -- clrsetbits_le32(&gpr->gpr[1], -- IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MASK, BIT(16)); -- setbits_le32(&gpr->gpr[1], BIT(19) | BIT(21)); -- -- return set_clk_eqos(ENET_125MHZ); --} -- - int board_phy_config(struct phy_device *phydev) - { - if (phydev->drv->config) -@@ -54,7 +41,5 @@ int board_init(void) - { - setup_fec(); - -- setup_eqos(); -- - return 0; - } -diff --git a/board/purism/librem5/spl.c b/board/purism/librem5/spl.c -index 1a203b4599..90f1fcf415 100644 ---- a/board/purism/librem5/spl.c -+++ b/board/purism/librem5/spl.c -@@ -26,6 +26,7 @@ - #include - #include - #include -+#include - #include "librem5.h" - - DECLARE_GLOBAL_DATA_PTR; -@@ -417,7 +418,7 @@ out: - return rv; - } - --int usb_gadget_handle_interrupts(void) -+int usb_gadget_handle_interrupts(int index) - { - dwc3_uboot_handle_interrupt(0); - return 0; -diff --git a/board/renesas/falcon/falcon.c b/board/renesas/falcon/falcon.c -index b0cb4e747b..ab7464d0ee 100644 ---- a/board/renesas/falcon/falcon.c -+++ b/board/renesas/falcon/falcon.c -@@ -14,6 +14,7 @@ - #include - #include - #include -+#include - - DECLARE_GLOBAL_DATA_PTR; - -@@ -69,7 +70,8 @@ static void init_gic_v3(void) - - void s_init(void) - { -- init_generic_timer(); -+ if (current_el() == 3) -+ init_generic_timer(); - } - - int board_early_init_f(void) -@@ -81,20 +83,27 @@ int board_early_init_f(void) - return 0; - } - -+#define RST_BASE 0xE6160000 /* Domain0 */ -+#define RST_SRESCR0 (RST_BASE + 0x18) -+#define RST_SPRES 0x5AA58000 -+#define RST_WDTRSTCR (RST_BASE + 0x10) -+#define RST_RWDT 0xA55A8002 -+ - int board_init(void) - { - /* address of boot parameters */ - gd->bd->bi_boot_params = CONFIG_TEXT_BASE + 0x50000; - -- init_gic_v3(); -+ if (current_el() == 3) { -+ init_gic_v3(); -+ -+ /* Enable RWDT reset */ -+ writel(RST_RWDT, RST_WDTRSTCR); -+ } - - return 0; - } - --#define RST_BASE 0xE6160000 /* Domain0 */ --#define RST_SRESCR0 (RST_BASE + 0x18) --#define RST_SPRES 0x5AA58000 -- - void reset_cpu(void) - { - writel(RST_SPRES, RST_SRESCR0); -diff --git a/board/renesas/rcar-common/common.c b/board/renesas/rcar-common/common.c -index daa1beb14f..0ddae95e23 100644 ---- a/board/renesas/rcar-common/common.c -+++ b/board/renesas/rcar-common/common.c -@@ -73,9 +73,9 @@ static int is_mem_overlap(void *blob, int first_mem_node, int curr_mem_node) - if (curr_mem_res.start >= first_mem_res.end) - continue; - -- printf("Overlap found: 0x%llx..0x%llx / 0x%llx..0x%llx\n", -- first_mem_res.start, first_mem_res.end, -- curr_mem_res.start, curr_mem_res.end); -+ log_debug("Overlap found: 0x%llx..0x%llx / 0x%llx..0x%llx\n", -+ first_mem_res.start, first_mem_res.end, -+ curr_mem_res.start, curr_mem_res.end); - - return 1; - } -diff --git a/board/siemens/iot2050/Kconfig b/board/siemens/iot2050/Kconfig -index 063142a43b..e66b2427d9 100644 ---- a/board/siemens/iot2050/Kconfig -+++ b/board/siemens/iot2050/Kconfig -@@ -1,20 +1,40 @@ - # SPDX-License-Identifier: GPL-2.0+ - # --# Copyright (c) Siemens AG, 2018-2021 -+# Copyright (c) Siemens AG, 2018-2022 - # - # Authors: - # Le Jin - # Jan Kiszka - --config TARGET_IOT2050_A53 -- bool "IOT2050 running on A53" -+choice -+ prompt "Siemens SIMATIC IOT2050 boards" -+ optional -+ -+config TARGET_IOT2050_A53_PG1 -+ bool "IOT2050 PG1 running on A53" -+ select IOT2050_A53_COMMON -+ help -+ This builds U-Boot for the Product Generation 1 (PG1) of the IOT2050 -+ devices. -+ -+config TARGET_IOT2050_A53_PG2 -+ bool "IOT2050 PG2 running on A53" -+ select IOT2050_A53_COMMON -+ help -+ This builds U-Boot for the Product Generation 2 (PG2) of the IOT2050 -+ devices. -+ -+endchoice -+ -+config IOT2050_A53_COMMON -+ bool - select ARM64 - select SOC_K3_AM654 - select BOARD_LATE_INIT - select SYS_DISABLE_DCACHE_OPS - select BINMAN - --if TARGET_IOT2050_A53 -+if IOT2050_A53_COMMON - - config SYS_BOARD - default "iot2050" -@@ -29,4 +49,11 @@ config IOT2050_BOOT_SWITCH - bool "Disable eMMC boot via USER button (Advanced version only)" - default y - -+config IOT2050_EMBED_OTPCMD -+ bool "Embed OTP programming data" -+ help -+ Embed signed OTP programming data 'otpcmd.bin' into the firmware -+ image. This data will be evaluated and executed on first boot of the -+ device. -+ - endif -diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c -index 8f4b0eae49..df705b7c97 100644 ---- a/board/siemens/iot2050/board.c -+++ b/board/siemens/iot2050/board.c -@@ -1,7 +1,7 @@ - // SPDX-License-Identifier: GPL-2.0+ - /* - * Board specific initialization for IOT2050 -- * Copyright (c) Siemens AG, 2018-2021 -+ * Copyright (c) Siemens AG, 2018-2022 - * - * Authors: - * Le Jin -@@ -11,9 +11,11 @@ - #include - #include - #include -+#include - #include - #include - #include -+#include - #include - #include - #include -@@ -47,20 +49,120 @@ struct iot2050_info { - - DECLARE_GLOBAL_DATA_PTR; - --static bool board_is_advanced(void) -+struct gpio_config { -+ const char *gpio_name; -+ const char *label; -+}; -+ -+enum m2_connector_mode { -+ BKEY_PCIEX2 = 0, -+ BKEY_PCIE_EKEY_PCIE, -+ BKEY_USB30_EKEY_PCIE, -+ CONNECTOR_MODE_INVALID -+}; -+ -+struct m2_config_pins { -+ int config[4]; -+}; -+ -+struct serdes_mux_control { -+ int ctrl_usb30_pcie0_lane0; -+ int ctrl_pcie1_pcie0; -+ int ctrl_usb30_pcie0_lane1; -+}; -+ -+struct m2_config_table { -+ struct m2_config_pins config_pins; -+ enum m2_connector_mode mode; -+}; -+ -+static const struct gpio_config serdes_mux_ctl_pin_info[] = { -+ {"gpio@600000_88", "CTRL_USB30_PCIE0_LANE0"}, -+ {"gpio@600000_82", "CTRL_PCIE1_PCIE0"}, -+ {"gpio@600000_89", "CTRL_USB30_PCIE0_LANE1"}, -+}; -+ -+static const struct gpio_config m2_bkey_cfg_pin_info[] = { -+ {"gpio@601000_18", "KEY_CONFIG_0"}, -+ {"gpio@601000_19", "KEY_CONFIG_1"}, -+ {"gpio@601000_88", "KEY_CONFIG_2"}, -+ {"gpio@601000_89", "KEY_CONFIG_3"}, -+}; -+ -+static const struct m2_config_table m2_config_table[] = { -+ {{{0, 1, 0, 0}}, BKEY_PCIEX2}, -+ {{{0, 0, 1, 0}}, BKEY_PCIE_EKEY_PCIE}, -+ {{{0, 1, 1, 0}}, BKEY_PCIE_EKEY_PCIE}, -+ {{{1, 0, 0, 1}}, BKEY_PCIE_EKEY_PCIE}, -+ {{{1, 1, 0, 1}}, BKEY_PCIE_EKEY_PCIE}, -+ {{{0, 0, 0, 1}}, BKEY_USB30_EKEY_PCIE}, -+ {{{0, 1, 0, 1}}, BKEY_USB30_EKEY_PCIE}, -+ {{{0, 0, 1, 1}}, BKEY_USB30_EKEY_PCIE}, -+ {{{0, 1, 1, 1}}, BKEY_USB30_EKEY_PCIE}, -+ {{{1, 0, 1, 1}}, BKEY_USB30_EKEY_PCIE}, -+}; -+ -+static const struct serdes_mux_control serdes_mux_ctrl[] = { -+ [BKEY_PCIEX2] = {0, 0, 1}, -+ [BKEY_PCIE_EKEY_PCIE] = {0, 1, 0}, -+ [BKEY_USB30_EKEY_PCIE] = {1, 1, 0}, -+}; -+ -+static const char *m2_connector_mode_name[] = { -+ [BKEY_PCIEX2] = "PCIe x2 (key B)", -+ [BKEY_PCIE_EKEY_PCIE] = "PCIe (key B) / PCIe (key E)", -+ [BKEY_USB30_EKEY_PCIE] = "USB 3.0 (key B) / PCIe (key E)", -+}; -+ -+static enum m2_connector_mode connector_mode; -+ -+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) -+static void *connector_overlay; -+static u32 connector_overlay_size; -+#endif -+ -+static int get_pinvalue(const char *gpio_name, const char *label) -+{ -+ struct gpio_desc gpio; -+ -+ if (dm_gpio_lookup_name(gpio_name, &gpio) < 0 || -+ dm_gpio_request(&gpio, label) < 0 || -+ dm_gpio_set_dir_flags(&gpio, GPIOD_IS_IN) < 0) { -+ pr_err("Cannot get pin %s for M.2 configuration\n", gpio_name); -+ return 0; -+ } -+ -+ return dm_gpio_get_value(&gpio); -+} -+ -+static void set_pinvalue(const char *gpio_name, const char *label, int value) -+{ -+ struct gpio_desc gpio; -+ -+ if (dm_gpio_lookup_name(gpio_name, &gpio) < 0 || -+ dm_gpio_request(&gpio, label) < 0 || -+ dm_gpio_set_dir_flags(&gpio, GPIOD_IS_OUT) < 0) { -+ pr_err("Cannot set pin %s for M.2 configuration\n", gpio_name); -+ return; -+ } -+ dm_gpio_set_value(&gpio, value); -+} -+ -+static bool board_is_m2(void) - { - struct iot2050_info *info = IOT2050_INFO_DATA; - -- return info->magic == IOT2050_INFO_MAGIC && -- strstr((char *)info->name, "IOT2050-ADVANCED") != NULL; -+ return IS_ENABLED(CONFIG_TARGET_IOT2050_A53_PG2) && -+ info->magic == IOT2050_INFO_MAGIC && -+ strcmp((char *)info->name, "IOT2050-ADVANCED-M2") == 0; - } - --static bool board_is_sr1(void) -+static bool board_is_advanced(void) - { - struct iot2050_info *info = IOT2050_INFO_DATA; - - return info->magic == IOT2050_INFO_MAGIC && -- !strstr((char *)info->name, "-PG2"); -+ strstr((char *)info->name, "IOT2050-ADVANCED") != NULL; - } - - static void remove_mmc1_target(void) -@@ -109,12 +211,14 @@ void set_board_info_env(void) - } - - if (board_is_advanced()) { -- if (board_is_sr1()) -+ if (IS_ENABLED(CONFIG_TARGET_IOT2050_A53_PG1)) - fdtfile = "ti/k3-am6548-iot2050-advanced.dtb"; -+ else if(board_is_m2()) -+ fdtfile = "ti/k3-am6548-iot2050-advanced-m2.dtb"; - else - fdtfile = "ti/k3-am6548-iot2050-advanced-pg2.dtb"; - } else { -- if (board_is_sr1()) -+ if (IS_ENABLED(CONFIG_TARGET_IOT2050_A53_PG1)) - fdtfile = "ti/k3-am6528-iot2050-basic.dtb"; - else - fdtfile = "ti/k3-am6528-iot2050-basic-pg2.dtb"; -@@ -126,6 +230,101 @@ void set_board_info_env(void) - env_save(); - } - -+static void m2_overlay_prepare(void) -+{ -+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) -+ const char *overlay_path; -+ void *overlay; -+ u64 loadaddr; -+ ofnode node; -+ int ret; -+ -+ if (connector_mode == BKEY_PCIEX2) -+ return; -+ -+ if (connector_mode == BKEY_PCIE_EKEY_PCIE) -+ overlay_path = "/fit-images/bkey-ekey-pcie-overlay"; -+ else -+ overlay_path = "/fit-images/bkey-usb3-overlay"; -+ -+ node = ofnode_path(overlay_path); -+ if (!ofnode_valid(node)) -+ goto fit_error; -+ -+ ret = ofnode_read_u64(node, "load", &loadaddr); -+ if (ret) -+ goto fit_error; -+ -+ ret = ofnode_read_u32(node, "size", &connector_overlay_size); -+ if (ret) -+ goto fit_error; -+ -+ overlay = map_sysmem(loadaddr, connector_overlay_size); -+ -+ connector_overlay = malloc(connector_overlay_size); -+ if (!connector_overlay) -+ goto fit_error; -+ -+ memcpy(connector_overlay, overlay, connector_overlay_size); -+ return; -+ -+fit_error: -+ pr_err("M.2 device tree overlay %s not available,\n", overlay_path); -+#endif -+} -+ -+static void m2_connector_setup(void) -+{ -+ ulong m2_manual_config = env_get_ulong("m2_manual_config", 10, -+ CONNECTOR_MODE_INVALID); -+ const char *mode_info = ""; -+ struct m2_config_pins config_pins; -+ unsigned int n; -+ -+ /* enable M.2 connector power */ -+ set_pinvalue("gpio@601000_17", "P3V3_M2_EN", 1); -+ udelay(4 * 100); -+ -+ if (m2_manual_config < CONNECTOR_MODE_INVALID) { -+ mode_info = " [manual mode]"; -+ connector_mode = m2_manual_config; -+ } else { /* auto detection */ -+ for (n = 0; n < ARRAY_SIZE(config_pins.config); n++) -+ config_pins.config[n] = -+ get_pinvalue(m2_bkey_cfg_pin_info[n].gpio_name, -+ m2_bkey_cfg_pin_info[n].label); -+ connector_mode = CONNECTOR_MODE_INVALID; -+ for (n = 0; n < ARRAY_SIZE(m2_config_table); n++) { -+ if (!memcmp(config_pins.config, -+ m2_config_table[n].config_pins.config, -+ sizeof(config_pins.config))) { -+ connector_mode = m2_config_table[n].mode; -+ break; -+ } -+ } -+ if (connector_mode == CONNECTOR_MODE_INVALID) { -+ mode_info = " [fallback, card unknown/unsupported]"; -+ connector_mode = BKEY_USB30_EKEY_PCIE; -+ } -+ } -+ -+ printf("M.2: %s%s\n", m2_connector_mode_name[connector_mode], -+ mode_info); -+ -+ /* configure serdes mux */ -+ set_pinvalue(serdes_mux_ctl_pin_info[0].gpio_name, -+ serdes_mux_ctl_pin_info[0].label, -+ serdes_mux_ctrl[connector_mode].ctrl_usb30_pcie0_lane0); -+ set_pinvalue(serdes_mux_ctl_pin_info[1].gpio_name, -+ serdes_mux_ctl_pin_info[1].label, -+ serdes_mux_ctrl[connector_mode].ctrl_pcie1_pcie0); -+ set_pinvalue(serdes_mux_ctl_pin_info[2].gpio_name, -+ serdes_mux_ctl_pin_info[2].label, -+ serdes_mux_ctrl[connector_mode].ctrl_usb30_pcie0_lane1); -+ -+ m2_overlay_prepare(); -+} -+ - int board_init(void) - { - return 0; -@@ -162,6 +361,9 @@ int board_fit_config_name_match(const char *name) - struct iot2050_info *info = IOT2050_INFO_DATA; - char upper_name[32]; - -+ /* skip the prefix "k3-am65x8-" */ -+ name += 10; -+ - if (info->magic != IOT2050_INFO_MAGIC || - strlen(name) >= sizeof(upper_name)) - return -1; -@@ -188,7 +390,7 @@ static bool user_button_pressed(void) - - memset(&gpio, 0, sizeof(gpio)); - -- if (dm_gpio_lookup_name("25", &gpio) < 0 || -+ if (dm_gpio_lookup_name("gpio@42110000_25", &gpio) < 0 || - dm_gpio_request(&gpio, "USER button") < 0 || - dm_gpio_set_dir_flags(&gpio, GPIOD_IS_IN) < 0) - return false; -@@ -220,6 +422,9 @@ int board_late_init(void) - /* change CTRL_MMR register to let serdes0 not output USB3.0 signals. */ - writel(0x3, SERDES0_LANE_SELECT); - -+ if (board_is_m2()) -+ m2_connector_setup(); -+ - set_board_info_env(); - - /* remove the eMMC if requested via button */ -@@ -231,6 +436,50 @@ int board_late_init(void) - } - - #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) -+static void m2_fdt_fixup(void *blob) -+{ -+ void *overlay_copy = NULL; -+ void *fdt_copy = NULL; -+ u32 fdt_size; -+ int err; -+ -+ if (!connector_overlay) -+ return; -+ -+ /* -+ * We need to work with temporary copies here because fdt_overlay_apply -+ * is destructive to the overlay and also to the target blob, even if -+ * application fails. -+ */ -+ fdt_size = fdt_totalsize(blob); -+ fdt_copy = malloc(fdt_size); -+ if (!fdt_copy) -+ goto fixup_error; -+ -+ memcpy(fdt_copy, blob, fdt_size); -+ -+ overlay_copy = malloc(connector_overlay_size); -+ if (!overlay_copy) -+ goto fixup_error; -+ -+ memcpy(overlay_copy, connector_overlay, connector_overlay_size); -+ -+ err = fdt_overlay_apply_verbose(fdt_copy, overlay_copy); -+ if (err) -+ goto fixup_error; -+ -+ memcpy(blob, fdt_copy, fdt_size); -+ -+cleanup: -+ free(fdt_copy); -+ free(overlay_copy); -+ return; -+ -+fixup_error: -+ pr_err("Could not apply M.2 device tree overlay\n"); -+ goto cleanup; -+} -+ - int ft_board_setup(void *blob, struct bd_info *bd) - { - int ret; -@@ -242,6 +491,9 @@ int ft_board_setup(void *blob, struct bd_info *bd) - if (ret) - pr_err("%s: fixing up msmc ram failed %d\n", __func__, ret); - -+ if (board_is_m2()) -+ m2_fdt_fixup(blob); -+ - return ret; - } - #endif -diff --git a/board/siemens/iot2050/iot2050.env b/board/siemens/iot2050/iot2050.env -new file mode 100644 -index 0000000000..02958798b4 ---- /dev/null -+++ b/board/siemens/iot2050/iot2050.env -@@ -0,0 +1,17 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (c) Siemens AG, 2023 -+ * -+ * Authors: -+ * Jan Kiszka -+ */ -+ -+usb_pgood_delay=900 -+ -+watchdog_timeout_ms=CONFIG_WATCHDOG_TIMEOUT_MSECS -+start_watchdog= -+ if test ${watchdog_timeout_ms} -gt 0; then -+ wdt dev watchdog@40610000; -+ wdt start ${watchdog_timeout_ms}; -+ echo Watchdog started, timeout ${watchdog_timeout_ms} ms; -+ fi -diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c -index 03adb591d8..6edb422155 100644 ---- a/board/solidrun/clearfog/clearfog.c -+++ b/board/solidrun/clearfog/clearfog.c -@@ -10,6 +10,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -261,3 +262,35 @@ int board_late_init(void) - - return 0; - } -+ -+static bool has_emmc(void) -+{ -+ struct mmc *mmc; -+ -+ mmc = find_mmc_device(0); -+ if (!mmc) -+ return 0; -+ return (!mmc_init(mmc) && IS_MMC(mmc)) ? true : false; -+} -+ -+/* -+ * The Clearfog devices have only one SDHC device. This is either eMMC -+ * if it is populated on the SOM or SDHC if not. The Linux device tree -+ * assumes the SDHC case. Detect if the device is an eMMC and fixup the -+ * device-tree, so that it will be detected by Linux. -+ */ -+int ft_board_setup(void *blob, struct bd_info *bd) -+{ -+ int node; -+ -+ if (has_emmc()) { -+ node = fdt_node_offset_by_compatible(blob, -1, "marvell,armada-380-sdhci"); -+ if (node < 0) -+ return 0; /* Unexpected eMMC device; patching not supported */ -+ -+ puts("Patching FDT so that eMMC is detected by OS\n"); -+ return fdt_setprop_empty(blob, node, "non-removable"); -+ } -+ -+ return 0; -+} -diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c -index 7c44379ec4..cb14c2f30c 100644 ---- a/board/solidrun/mx6cuboxi/mx6cuboxi.c -+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c -@@ -275,7 +275,7 @@ int board_early_init_f(void) - { - setup_iomux_uart(); - --#ifdef CONFIG_CMD_SATA -+#ifdef CONFIG_SATA - setup_sata(); - #endif - setup_fec(); -diff --git a/board/ti/am62ax/Kconfig b/board/ti/am62ax/Kconfig -index 2c18cd49b5..9b868e4553 100644 ---- a/board/ti/am62ax/Kconfig -+++ b/board/ti/am62ax/Kconfig -@@ -10,7 +10,6 @@ choice - config TARGET_AM62A7_A53_EVM - bool "TI K3 based AM62A7 EVM running on A53" - select ARM64 -- select SOC_K3_AM62A7 - imply BOARD - imply SPL_BOARD - imply TI_I2C_BOARD_DETECT -@@ -20,7 +19,6 @@ config TARGET_AM62A7_R5_EVM - select CPU_V7R - select SYS_THUMB_BUILD - select K3_LOAD_SYSFW -- select SOC_K3_AM62A7 - select RAM - select SPL_RAM - select K3_DDRSS -diff --git a/board/ti/am62ax/am62ax.env b/board/ti/am62ax/am62ax.env -new file mode 100644 -index 0000000000..8c1c26e9a2 ---- /dev/null -+++ b/board/ti/am62ax/am62ax.env -@@ -0,0 +1,33 @@ -+#include -+#include -+ -+default_device_tree=k3-am62a7-sk.dtb -+findfdt= -+ setenv name_fdt ${default_device_tree}; -+ setenv fdtfile ${name_fdt} -+name_kern=Image -+console=ttyS2,115200n8 -+args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x02800000 -+ ${mtdparts} -+run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr} -+ -+boot=mmc -+mmcdev=1 -+bootpart=1:2 -+bootdir=/boot -+rd_spec=- -+init_mmc=run args_all args_mmc -+get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt} -+get_overlay_mmc= -+ fdt address ${fdtaddr}; -+ fdt resize 0x100000; -+ for overlay in $name_overlays; -+ do; -+ load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} && -+ fdt apply ${dtboaddr}; -+ done; -+get_kern_mmc=load mmc ${bootpart} ${loadaddr} -+ ${bootdir}/${name_kern} -+get_fit_mmc=load mmc ${bootpart} ${addr_fit} -+ ${bootdir}/${name_fit} -+partitions=name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs} -diff --git a/board/ti/am62x/Kconfig b/board/ti/am62x/Kconfig -index 87fed44df1..5e8dfa3cc4 100644 ---- a/board/ti/am62x/Kconfig -+++ b/board/ti/am62x/Kconfig -@@ -10,14 +10,12 @@ choice - config TARGET_AM625_A53_EVM - bool "TI K3 based AM625 EVM running on A53" - select ARM64 -- select SOC_K3_AM625 - - config TARGET_AM625_R5_EVM - bool "TI K3 based AM625 EVM running on R5" - select CPU_V7R - select SYS_THUMB_BUILD - select K3_LOAD_SYSFW -- select SOC_K3_AM625 - select RAM - select SPL_RAM - select K3_DDRSS -diff --git a/board/ti/am62x/am62x.env b/board/ti/am62x/am62x.env -index c9a3b3dfae..e4e64fa637 100644 ---- a/board/ti/am62x/am62x.env -+++ b/board/ti/am62x/am62x.env -@@ -1,75 +1,5 @@ --loadaddr=0x82000000 --kernel_addr_r=0x82000000 --fdtaddr=0x88000000 --dtboaddr=0x89000000 --fdt_addr_r=0x88000000 --fdtoverlay_addr_r=0x89000000 --rdaddr=0x88080000 --ramdisk_addr_r=0x88080000 --scriptaddr=0x80000000 --pxefile_addr_r=0x80100000 --bootm_size=0x10000000 --boot_fdt=try -- --mmcrootfstype=ext4 rootwait --finduuid=part uuid ${boot} ${bootpart} uuid --args_mmc=run finduuid;setenv bootargs console=${console} -- ${optargs} -- root=PARTUUID=${uuid} rw -- rootfstype=${mmcrootfstype} --loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr --bootscript=echo Running bootscript from mmc${mmcdev} ...; -- source ${loadaddr} --bootenvfile=uEnv.txt --importbootenv=echo Importing environment from mmc${mmcdev} ...; -- env import -t ${loadaddr} ${filesize} --loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile} --loadimage=load ${devtype} ${bootpart} ${loadaddr} ${bootdir}/${bootfile} --loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile} --envboot=mmc dev ${mmcdev}; -- if mmc rescan; then -- echo SD/MMC found on device ${mmcdev}; -- if run loadbootscript; then -- run bootscript; -- else -- if run loadbootenv; then -- echo Loaded env from ${bootenvfile}; -- run importbootenv; -- fi; -- if test -n $uenvcmd; then -- echo Running uenvcmd ...; -- run uenvcmd; -- fi; -- fi; -- fi; --mmcloados= -- if test ${boot_fdt} = yes || test ${boot_fdt} = try; then -- if run loadfdt; then -- bootz ${loadaddr} - ${fdtaddr}; -- else -- if test ${boot_fdt} = try; then -- bootz; -- else -- echo WARN: Cannot load the DT; -- fi; -- fi; -- else -- bootz; -- fi; --mmcboot=mmc dev ${mmcdev}; -- devnum=${mmcdev}; -- devtype=mmc; -- if mmc rescan; then -- echo SD/MMC found on device ${mmcdev}; -- if run loadimage; then -- run args_mmc; -- if test ${boot_fit} -eq 1; then -- run run_fit; -- else -- run mmcloados; -- fi; -- fi; -- fi; -+#include -+#include - - default_device_tree=k3-am625-sk.dtb - findfdt= -diff --git a/board/ti/am64x/Kconfig b/board/ti/am64x/Kconfig -index 8036947e34..afb54f8cda 100644 ---- a/board/ti/am64x/Kconfig -+++ b/board/ti/am64x/Kconfig -@@ -9,7 +9,6 @@ choice - config TARGET_AM642_A53_EVM - bool "TI K3 based AM642 EVM running on A53" - select ARM64 -- select SOC_K3_AM642 - imply BOARD - imply SPL_BOARD - imply TI_I2C_BOARD_DETECT -@@ -19,7 +18,6 @@ config TARGET_AM642_R5_EVM - select CPU_V7R - select SYS_THUMB_BUILD - select K3_LOAD_SYSFW -- select SOC_K3_AM642 - select RAM - select SPL_RAM - select K3_DDRSS -diff --git a/board/ti/am65x/Kconfig b/board/ti/am65x/Kconfig -index 4765b13ba0..220dd0234c 100644 ---- a/board/ti/am65x/Kconfig -+++ b/board/ti/am65x/Kconfig -@@ -10,7 +10,6 @@ choice - config TARGET_AM654_A53_EVM - bool "TI K3 based AM654 EVM running on A53" - select ARM64 -- select SOC_K3_AM654 - select SYS_DISABLE_DCACHE_OPS - select BOARD_LATE_INIT - imply TI_I2C_BOARD_DETECT -@@ -19,7 +18,6 @@ config TARGET_AM654_R5_EVM - bool "TI K3 based AM654 EVM running on R5" - select CPU_V7R - select SYS_THUMB_BUILD -- select SOC_K3_AM654 - select K3_LOAD_SYSFW - select K3_AM654_DDRSS - imply SYS_K3_SPL_ATF -diff --git a/board/ti/am65x/am65x.env b/board/ti/am65x/am65x.env -new file mode 100644 -index 0000000000..a048b47071 ---- /dev/null -+++ b/board/ti/am65x/am65x.env -@@ -0,0 +1,47 @@ -+#include -+#include -+#include -+#if CONFIG_CMD_REMOTEPROC -+#include -+#endif -+ -+findfdt= -+ setenv name_fdt k3-am654-base-board.dtb; -+ setenv fdtfile ${name_fdt} -+name_kern=Image -+console=ttyS2,115200n8 -+args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x02800000 -+ ${mtdparts} -+run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr} -+ -+boot=mmc -+mmcdev=1 -+bootpart=1:2 -+bootdir=/boot -+rd_spec=- -+init_mmc=run args_all args_mmc -+get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt} -+get_overlay_mmc= -+ fdt address ${fdtaddr}; -+ fdt resize 0x100000; -+ for overlay in $name_overlays; -+ do; -+ load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} && -+ fdt apply ${dtboaddr}; -+ done; -+get_kern_mmc=load mmc ${bootpart} ${loadaddr} -+ ${bootdir}/${name_kern} -+get_fit_mmc=load mmc ${bootpart} ${addr_fit} -+ ${bootdir}/${name_fit} -+partitions=name=root,start=0,size=-,uuid=${uuid_gpt_rootfs} -+ -+init_ubi= -+ run args_all args_ubi; -+ sf probe; -+ ubi part ospi.rootfs; -+ ubifsmount ubi:rootfs; -+get_kern_ubi=ubifsload ${loadaddr} ${bootdir}/${name_kern} -+get_fdt_ubi=ubifsload ${fdtaddr} ${bootdir}/${name_fdt} -+args_ubi=setenv bootargs console=${console} ${optargs} -+rootfstype=ubifs root=ubi0:rootfs rw ubi.mtd=ospi.rootfs -+ -diff --git a/board/ti/common/Kconfig b/board/ti/common/Kconfig -index 49edd98014..f03357cc75 100644 ---- a/board/ti/common/Kconfig -+++ b/board/ti/common/Kconfig -@@ -1,5 +1,6 @@ - config TI_I2C_BOARD_DETECT - bool "Support for Board detection for TI platforms" -+ select K3_BOARD_DETECT if ARCH_K3 - help - Support for detection board information on Texas Instrument's - Evaluation Boards which have I2C based EEPROM detection -diff --git a/board/ti/j721e/Kconfig b/board/ti/j721e/Kconfig -index d19d30d59e..84bca32712 100644 ---- a/board/ti/j721e/Kconfig -+++ b/board/ti/j721e/Kconfig -@@ -10,7 +10,6 @@ choice - config TARGET_J721E_A72_EVM - bool "TI K3 based J721E EVM running on A72" - select ARM64 -- select SOC_K3_J721E - select BOARD_LATE_INIT - imply TI_I2C_BOARD_DETECT - select SYS_DISABLE_DCACHE_OPS -@@ -19,7 +18,6 @@ config TARGET_J721E_R5_EVM - bool "TI K3 based J721E EVM running on R5" - select CPU_V7R - select SYS_THUMB_BUILD -- select SOC_K3_J721E - select K3_LOAD_SYSFW - select RAM - select SPL_RAM -@@ -30,7 +28,6 @@ config TARGET_J721E_R5_EVM - config TARGET_J7200_A72_EVM - bool "TI K3 based J7200 EVM running on A72" - select ARM64 -- select SOC_K3_J721E - select BOARD_LATE_INIT - imply TI_I2C_BOARD_DETECT - select SYS_DISABLE_DCACHE_OPS -@@ -39,7 +36,6 @@ config TARGET_J7200_R5_EVM - bool "TI K3 based J7200 EVM running on R5" - select CPU_V7R - select SYS_THUMB_BUILD -- select SOC_K3_J721E - select K3_LOAD_SYSFW - select RAM - select SPL_RAM -@@ -60,6 +56,9 @@ config SYS_VENDOR - config SYS_CONFIG_NAME - default "j721e_evm" - -+config ENV_SOURCE_FILE -+ default "j721e" -+ - source "board/ti/common/Kconfig" - - endif -@@ -75,6 +74,9 @@ config SYS_VENDOR - config SYS_CONFIG_NAME - default "j721e_evm" - -+config ENV_SOURCE_FILE -+ default "j721e" -+ - source "board/ti/common/Kconfig" - - endif -@@ -90,6 +92,9 @@ config SYS_VENDOR - config SYS_CONFIG_NAME - default "j721e_evm" - -+config ENV_SOURCE_FILE -+ default "j721e" -+ - source "board/ti/common/Kconfig" - - endif -@@ -105,6 +110,9 @@ config SYS_VENDOR - config SYS_CONFIG_NAME - default "j721e_evm" - -+config ENV_SOURCE_FILE -+ default "j721e" -+ - source "board/ti/common/Kconfig" - - endif -diff --git a/board/ti/j721e/j721e.env b/board/ti/j721e/j721e.env -new file mode 100644 -index 0000000000..446395adfa ---- /dev/null -+++ b/board/ti/j721e/j721e.env -@@ -0,0 +1,82 @@ -+#include -+#include -+#include -+#include -+ -+#if CONFIG_CMD_REMOTEPROC -+#include -+#endif -+ -+default_device_tree=k3-j721e-common-proc-board.dtb -+findfdt= -+ setenv name_fdt ${default_device_tree}; -+ if test $board_name = j721e; then -+ setenv name_fdt k3-j721e-common-proc-board.dtb; fi; -+ if test $board_name = j721e-eaik || test $board_name = j721e-sk; then -+ setenv name_fdt k3-j721e-sk.dtb; fi; -+ setenv fdtfile ${name_fdt} -+name_kern=Image -+console=ttyS2,115200n8 -+args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000 -+ ${mtdparts} -+run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr} -+ -+#if CONFIG_SYS_K3_SPL_ATF -+#if CONFIG_TARGET_J721E_R5_EVM -+addr_mcur5f0_0load=0x89000000 -+name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw -+#elif CONFIG_TARGET_J7200_R5_EVM -+addr_mcur5f0_0load=0x89000000 -+name_mcur5f0_0fw=/lib/firmware/j7200-mcu-r5f0_0-fw -+#endif -+#endif -+ -+boot=mmc -+mmcdev=1 -+bootpart=1:2 -+bootdir=/boot -+rd_spec=- -+init_mmc=run args_all args_mmc -+get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt} -+get_overlay_mmc= -+ fdt address ${fdtaddr}; -+ fdt resize 0x100000; -+ for overlay in $name_overlays; -+ do; -+ load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} && -+ fdt apply ${dtboaddr}; -+ done; -+partitions=uuid_disk=${uuid_gpt_disk}; -+ name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs} -+get_kern_mmc=load mmc ${bootpart} ${loadaddr} -+ ${bootdir}/${name_kern} -+get_fit_mmc=load mmc ${bootpart} ${addr_fit} -+ ${bootdir}/${name_fit} -+ -+#if CONFIG_TARGET_J7200_A72_EVM -+do_main_cpsw0_qsgmii_phyinit=1 -+init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17; -+ gpio clear gpio@22_16 -+main_cpsw0_qsgmii_phyinit= -+ if test ${do_main_cpsw0_qsgmii_phyinit} -eq 1 && test ${dorprocboot} -eq 1 && test ${boot} = mmc; then -+ run init_main_cpsw0_qsgmii_phy; -+ fi; -+#elif CONFIG_TARGET_J721E_A72_EVM -+init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17; -+ gpio clear gpio@22_16 -+main_cpsw0_qsgmii_phyinit= -+ if test $board_name = J721EX-PM1-SOM || test $board_name = J721EX-PM2-SOM || test $board_name = j721e; then -+ do_main_cpsw0_qsgmii_phyinit=1; else -+ do_main_cpsw0_qsgmii_phyinit=0; fi; -+ if test ${do_main_cpsw0_qsgmii_phyinit} -eq 1 && test ${dorprocboot} -eq 1 && test ${boot} = mmc; then -+ run init_main_cpsw0_qsgmii_phy; \ -+ fi; -+#endif -+ -+#if CONFIG_TARGET_J721E_A72_EVM -+rproc_fw_binaries=2 /lib/firmware/j7-main-r5f0_0-fw 3 /lib/firmware/j7-main-r5f0_1-fw 4 /lib/firmware/j7-main-r5f1_0-fw 5 /lib/firmware/j7-main-r5f1_1-fw 6 /lib/firmware/j7-c66_0-fw 7 /lib/firmware/j7-c66_1-fw 8 /lib/firmware/j7-c71_0-fw -+#endif -+ -+#if CONFIG_TARGET_J7200_A72_EVM -+rproc_fw_binaries=2 /lib/firmware/j7200-main-r5f0_0-fw 3 /lib/firmware/j7200-main-r5f0_1-fw -+#endif -diff --git a/board/ti/j721s2/Kconfig b/board/ti/j721s2/Kconfig -index 6141798333..a24641f8cf 100644 ---- a/board/ti/j721s2/Kconfig -+++ b/board/ti/j721s2/Kconfig -@@ -10,7 +10,6 @@ choice - config TARGET_J721S2_A72_EVM - bool "TI K3 based J721S2 EVM running on A72" - select ARM64 -- select SOC_K3_J721S2 - select BOARD_LATE_INIT - imply TI_I2C_BOARD_DETECT - select SYS_DISABLE_DCACHE_OPS -@@ -19,7 +18,6 @@ config TARGET_J721S2_R5_EVM - bool "TI K3 based J721S2 EVM running on R5" - select CPU_V7R - select SYS_THUMB_BUILD -- select SOC_K3_J721S2 - select K3_LOAD_SYSFW - select RAM - select SPL_RAM -@@ -40,6 +38,9 @@ config SYS_VENDOR - config SYS_CONFIG_NAME - default "j721s2_evm" - -+config ENV_SOURCE_FILE -+ default "j721s2" -+ - source "board/ti/common/Kconfig" - - endif -@@ -55,6 +56,9 @@ config SYS_VENDOR - config SYS_CONFIG_NAME - default "j721s2_evm" - -+config ENV_SOURCE_FILE -+ default "j721s2" -+ - source "board/ti/common/Kconfig" - - endif -diff --git a/board/ti/j721s2/j721s2.env b/board/ti/j721s2/j721s2.env -new file mode 100644 -index 0000000000..2152f8849f ---- /dev/null -+++ b/board/ti/j721s2/j721s2.env -@@ -0,0 +1,56 @@ -+#include -+#include -+#include -+#include -+ -+#if CONFIG_CMD_REMOTEPROC -+#include -+#endif -+ -+default_device_tree=k3-j721s2-common-proc-board.dtb -+findfdt= -+ setenv name_fdt ${default_device_tree}; -+ if test $board_name = j721s2; then \ -+ setenv name_fdt k3-j721s2-common-proc-board.dtb; fi; -+ if test $board_name = am68-sk; then -+ setenv name_fdt k3-am68-sk-base-board.dtb; fi; -+ setenv fdtfile ${name_fdt} -+name_kern=Image -+console=ttyS2,115200n8 -+args_all=setenv optargs earlycon=ns16550a,mmio32,0x02880000 -+ ${mtdparts} -+run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr} -+ -+boot=mmc -+mmcdev=1 -+bootpart=1:2 -+bootdir=/boot -+#if CONFIG_SYS_K3_SPL_ATF -+#if CONFIG_TARGET_J721S2_R5_EVM -+addr_mcur5f0_0load=0x89000000 -+name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw -+#endif -+#endif -+rd_spec=- -+init_mmc=run args_all args_mmc -+get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt} -+get_overlay_mmc= -+ fdt address ${fdtaddr}; -+ fdt resize 0x100000; -+ for overlay in $name_overlays; -+ do; -+ load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} && -+ fdt apply ${dtboaddr}; -+ done; -+partitions=uuid_disk=${uuid_gpt_disk}; -+ name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs} -+get_kern_mmc=load mmc ${bootpart} ${loadaddr} -+ ${bootdir}/${name_kern} -+get_fit_mmc=load mmc ${bootpart} ${addr_fit} -+ ${bootdir}/${name_fit} -+partitions=uuid_disk=${uuid_gpt_disk}; -+ name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs} -+ -+rproc_fw_binaries= 2 /lib/firmware/j721s2-main-r5f0_0-fw 3 /lib/firmware/j721s2-main-r5f0_1-fw 4 /lib/firmware/j721s2-main-r5f1_0-fw 5 /lib/firmware/j721s2-main-r5f1_1-fw 6 /lib/firmware/j721s2-c71_0-fw 7 /lib/firmware/j721s2-c71_1-fw -+ -+ -diff --git a/board/toradex/colibri-imx8x/Kconfig b/board/toradex/colibri-imx8x/Kconfig -index b89840a379..cb11e2c318 100644 ---- a/board/toradex/colibri-imx8x/Kconfig -+++ b/board/toradex/colibri-imx8x/Kconfig -@@ -12,6 +12,9 @@ config SYS_CONFIG_NAME - config TDX_CFG_BLOCK - default y - -+config TDX_CFG_BLOCK_2ND_ETHADDR -+ default y -+ - config TDX_HAVE_MMC - default y - -diff --git a/board/toradex/colibri-imx8x/colibri-imx8x.c b/board/toradex/colibri-imx8x/colibri-imx8x.c -index 169d4d04b1..6ed9cc4fa8 100644 ---- a/board/toradex/colibri-imx8x/colibri-imx8x.c -+++ b/board/toradex/colibri-imx8x/colibri-imx8x.c -@@ -40,21 +40,25 @@ static void setup_iomux_uart(void) - imx8_iomux_setup_multiple_pads(uart3_pads, ARRAY_SIZE(uart3_pads)); - } - --void board_mem_get_layout(u64 *phys_sdram_1_start, -- u64 *phys_sdram_1_size, -- u64 *phys_sdram_2_start, -- u64 *phys_sdram_2_size) -+static int is_imx8dx(void) - { -- u32 is_dualx = 0, val = 0; -- sc_err_t scierr = sc_misc_otp_fuse_read(-1, 6, &val); -+ u32 val = 0; -+ sc_err_t sc_err = sc_misc_otp_fuse_read(-1, 6, &val); - -- if (scierr == SC_ERR_NONE) { -+ if (sc_err == SC_ERR_NONE) { - /* DX has two A35 cores disabled */ -- is_dualx = (val & 0xf) != 0x0; -+ return (val & 0xf) != 0x0; - } -+ return false; -+} - -+void board_mem_get_layout(u64 *phys_sdram_1_start, -+ u64 *phys_sdram_1_size, -+ u64 *phys_sdram_2_start, -+ u64 *phys_sdram_2_size) -+{ - *phys_sdram_1_start = PHYS_SDRAM_1; -- if (is_dualx) -+ if (is_imx8dx()) - /* Our DX based SKUs only have 1 GB RAM */ - *phys_sdram_1_size = SZ_1G; - else -@@ -119,6 +123,18 @@ int checkboard(void) - return 0; - } - -+static void select_dt_from_module_version(void) -+{ -+ /* -+ * The dtb filename is constructed from ${soc}-colibri-${fdt_board}.dtb. -+ * Set soc depending on the used SoC. -+ */ -+ if (is_imx8dx()) -+ env_set("soc", "imx8dx"); -+ else -+ env_set("soc", "imx8qxp"); -+} -+ - int board_init(void) - { - board_gpio_init(); -@@ -154,5 +170,7 @@ int board_late_init(void) - env_set("board_rev", "v1.0"); - #endif - -+ select_dt_from_module_version(); -+ - return 0; - } -diff --git a/board/toradex/verdin-imx8mp/verdin-imx8mp.c b/board/toradex/verdin-imx8mp/verdin-imx8mp.c -index 9c2e44a122..5490d3ed44 100644 ---- a/board/toradex/verdin-imx8mp/verdin-imx8mp.c -+++ b/board/toradex/verdin-imx8mp/verdin-imx8mp.c -@@ -49,19 +49,6 @@ static void setup_fec(void) - setbits_le32(&gpr->gpr[1], BIT(22)); - } - --static int setup_eqos(void) --{ -- struct iomuxc_gpr_base_regs *gpr = -- (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; -- -- /* set INTF as RGMII, enable RGMII TXC clock */ -- clrsetbits_le32(&gpr->gpr[1], -- IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MASK, BIT(16)); -- setbits_le32(&gpr->gpr[1], BIT(19) | BIT(21)); -- -- return set_clk_eqos(ENET_125MHZ); --} -- - #if IS_ENABLED(CONFIG_NET) - int board_phy_config(struct phy_device *phydev) - { -@@ -78,9 +65,6 @@ int board_init(void) - if (IS_ENABLED(CONFIG_FEC_MXC)) - setup_fec(); - -- if (IS_ENABLED(CONFIG_DWC_ETH_QOS)) -- ret = setup_eqos(); -- - return ret; - } - -diff --git a/board/xilinx/zynqmp/Kconfig b/board/xilinx/zynqmp/Kconfig -index 7d1f7398c3..ffa2f0215d 100644 ---- a/board/xilinx/zynqmp/Kconfig -+++ b/board/xilinx/zynqmp/Kconfig -@@ -6,6 +6,7 @@ if ARCH_ZYNQMP - - config CMD_ZYNQMP - bool "Enable ZynqMP specific commands" -+ depends on ZYNQMP_FIRMWARE - default y - help - Enable ZynqMP specific commands like "zynqmp secure" -diff --git a/boot/Kconfig b/boot/Kconfig -index ad035695a4..d95a2a7026 100644 ---- a/boot/Kconfig -+++ b/boot/Kconfig -@@ -411,7 +411,7 @@ config BOOTSTD_FULL - as well as the "boot_targets" environment variable - - config SPL_BOOTSTD -- bool "Standard boot support in VPL" -+ bool "Standard boot support in SPL" - depends on SPL && SPL_DM && SPL_OF_CONTROL && SPL_BLK - default y if VPL - help -@@ -537,6 +537,26 @@ config VPL_BOOTMETH_VBE - - if BOOTMETH_VBE - -+config BOOTMETH_VBE_REQUEST -+ bool "Support for serving VBE OS requests" -+ default y -+ help -+ Enables support for looking that the requests made by the -+ Operating System being booted. These requests result in additions to -+ the device tree /chosen node, added during the device tree fixup -+ phase. -+ -+config SPL_BOOTMETH_VBE_REQUEST -+ bool "Support for serving VBE OS requests (SPL)" -+ depends on SPL -+ help -+ Enables support for looking that the requests made by the -+ Operating System being booted. These requests result in additions to -+ the device tree /chosen node, added during the device tree fixup -+ phase. -+ -+ This is only useful if you are booting an OS direct from SPL. -+ - config BOOTMETH_VBE_SIMPLE - bool "Bootdev support for VBE 'simple' method" - default y -diff --git a/boot/Makefile b/boot/Makefile -index 5424b6fafc..88193a1b60 100644 ---- a/boot/Makefile -+++ b/boot/Makefile -@@ -11,6 +11,7 @@ obj-$(CONFIG_CMD_BOOTZ) += bootm.o bootm_os.o - obj-$(CONFIG_CMD_BOOTI) += bootm.o bootm_os.o - - obj-$(CONFIG_PXE_UTILS) += pxe_utils.o -+obj-$(CONFIG_QFW) += bootmeth_qfw.o - - endif - -@@ -26,7 +27,6 @@ obj-$(CONFIG_$(SPL_TPL_)BOOTSTD) += bootstd-uclass.o - obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_DISTRO) += bootmeth_distro.o - obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_DISTRO_PXE) += bootmeth_pxe.o - obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_EFILOADER) += bootmeth_efi.o --obj-$(CONFIG_$(SPL_TPL_)QFW) += bootmeth_qfw.o - obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_SANDBOX) += bootmeth_sandbox.o - obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_SCRIPT) += bootmeth_script.o - ifdef CONFIG_$(SPL_TPL_)BOOTSTD_FULL -@@ -52,7 +52,8 @@ endif - - obj-$(CONFIG_$(SPL_TPL_)EXPO) += expo.o scene.o scene_menu.o - --obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_VBE) += vbe.o vbe_request.o -+obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_VBE) += vbe.o -+obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_VBE_REQUEST) += vbe_request.o - obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_VBE_SIMPLE) += vbe_simple.o - obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_VBE_SIMPLE_FW) += vbe_simple_fw.o - obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_VBE_SIMPLE_OS) += vbe_simple_os.o -diff --git a/boot/bootdev-uclass.c b/boot/bootdev-uclass.c -index 8103a11d1b..d34b7e37cf 100644 ---- a/boot/bootdev-uclass.c -+++ b/boot/bootdev-uclass.c -@@ -629,11 +629,11 @@ int bootdev_next_prio(struct bootflow_iter *iter, struct udevice **devp) - if (++iter->cur_prio == BOOTDEVP_COUNT) - return log_msg_ret("fin", -ENODEV); - -- if (iter->flags & BOOTFLOWF_HUNT) { -+ if (iter->flags & BOOTFLOWIF_HUNT) { - /* hunt to find new bootdevs */ - ret = bootdev_hunt_prio(iter->cur_prio, - iter->flags & -- BOOTFLOWF_SHOW); -+ BOOTFLOWIF_SHOW); - log_debug("- hunt ret %d\n", ret); - if (ret) - return log_msg_ret("hun", ret); -@@ -657,7 +657,7 @@ int bootdev_setup_iter(struct bootflow_iter *iter, const char *label, - struct udevice **devp, int *method_flagsp) - { - struct udevice *bootstd, *dev = NULL; -- bool show = iter->flags & BOOTFLOWF_SHOW; -+ bool show = iter->flags & BOOTFLOWIF_SHOW; - int method_flags; - int ret; - -@@ -668,7 +668,7 @@ int bootdev_setup_iter(struct bootflow_iter *iter, const char *label, - } - - /* hunt for any pre-scan devices */ -- if (iter->flags & BOOTFLOWF_HUNT) { -+ if (iter->flags & BOOTFLOWIF_HUNT) { - ret = bootdev_hunt_prio(BOOTDEVP_1_PRE_SCAN, show); - if (ret) - return log_msg_ret("pre", ret); -@@ -676,7 +676,7 @@ int bootdev_setup_iter(struct bootflow_iter *iter, const char *label, - - /* Handle scanning a single device */ - if (IS_ENABLED(CONFIG_BOOTSTD_FULL) && label) { -- if (iter->flags & BOOTFLOWF_HUNT) { -+ if (iter->flags & BOOTFLOWIF_HUNT) { - ret = bootdev_hunt(label, show); - if (ret) - return log_msg_ret("hun", ret); -@@ -687,11 +687,11 @@ int bootdev_setup_iter(struct bootflow_iter *iter, const char *label, - - log_debug("method_flags: %x\n", method_flags); - if (method_flags & BOOTFLOW_METHF_SINGLE_UCLASS) -- iter->flags |= BOOTFLOWF_SINGLE_UCLASS; -+ iter->flags |= BOOTFLOWIF_SINGLE_UCLASS; - else if (method_flags & BOOTFLOW_METHF_SINGLE_DEV) -- iter->flags |= BOOTFLOWF_SINGLE_DEV; -+ iter->flags |= BOOTFLOWIF_SINGLE_DEV; - else -- iter->flags |= BOOTFLOWF_SINGLE_MEDIA; -+ iter->flags |= BOOTFLOWIF_SINGLE_MEDIA; - log_debug("Selected label: %s, flags %x\n", label, iter->flags); - } else { - bool ok; -diff --git a/boot/bootflow.c b/boot/bootflow.c -index 60791e681b..8f2cb876bb 100644 ---- a/boot/bootflow.c -+++ b/boot/bootflow.c -@@ -139,8 +139,8 @@ static void bootflow_iter_set_dev(struct bootflow_iter *iter, - if (dev && iter->num_devs < iter->max_devs) - iter->dev_used[iter->num_devs++] = dev; - -- if ((iter->flags & (BOOTFLOWF_SHOW | BOOTFLOWF_SINGLE_DEV)) == -- BOOTFLOWF_SHOW) { -+ if ((iter->flags & (BOOTFLOWIF_SHOW | BOOTFLOWIF_SINGLE_DEV)) == -+ BOOTFLOWIF_SHOW) { - if (dev) - printf("Scanning bootdev '%s':\n", dev->name); - else if (IS_ENABLED(CONFIG_BOOTMETH_GLOBAL) && -@@ -215,7 +215,7 @@ static int iter_incr(struct bootflow_iter *iter) - iter->max_part = 0; - - /* ...select next bootdev */ -- if (iter->flags & BOOTFLOWF_SINGLE_DEV) { -+ if (iter->flags & BOOTFLOWIF_SINGLE_DEV) { - ret = -ENOENT; - } else { - int method_flags; -@@ -227,7 +227,7 @@ static int iter_incr(struct bootflow_iter *iter) - ret = bootdev_setup_iter(iter, NULL, &dev, - &method_flags); - } else if (IS_ENABLED(CONFIG_BOOTSTD_FULL) && -- (iter->flags & BOOTFLOWF_SINGLE_UCLASS)) { -+ (iter->flags & BOOTFLOWIF_SINGLE_UCLASS)) { - /* Move to the next bootdev in this uclass */ - uclass_find_next_device(&dev); - if (!dev) { -@@ -236,7 +236,7 @@ static int iter_incr(struct bootflow_iter *iter) - ret = -ENODEV; - } - } else if (IS_ENABLED(CONFIG_BOOTSTD_FULL) && -- iter->flags & BOOTFLOWF_SINGLE_MEDIA) { -+ iter->flags & BOOTFLOWIF_SINGLE_MEDIA) { - log_debug("next in single\n"); - method_flags = 0; - do { -@@ -328,7 +328,7 @@ static int bootflow_check(struct bootflow_iter *iter, struct bootflow *bflow) - * For 'all' we return all bootflows, even - * those with errors - */ -- if (iter->flags & BOOTFLOWF_ALL) -+ if (iter->flags & BOOTFLOWIF_ALL) - return log_msg_ret("all", ret); - } - if (ret) -@@ -344,14 +344,14 @@ int bootflow_scan_first(struct udevice *dev, const char *label, - int ret; - - if (dev || label) -- flags |= BOOTFLOWF_SKIP_GLOBAL; -+ flags |= BOOTFLOWIF_SKIP_GLOBAL; - bootflow_iter_init(iter, flags); - - /* - * Set up the ordering of bootmeths. This sets iter->doing_global and - * iter->first_glob_method if we are starting with the global bootmeths - */ -- ret = bootmeth_setup_iter_order(iter, !(flags & BOOTFLOWF_SKIP_GLOBAL)); -+ ret = bootmeth_setup_iter_order(iter, !(flags & BOOTFLOWIF_SKIP_GLOBAL)); - if (ret) - return log_msg_ret("obmeth", -ENODEV); - -@@ -373,7 +373,7 @@ int bootflow_scan_first(struct udevice *dev, const char *label, - if (ret) { - log_debug("check - ret=%d\n", ret); - if (ret != BF_NO_MORE_PARTS && ret != -ENOSYS) { -- if (iter->flags & BOOTFLOWF_ALL) -+ if (iter->flags & BOOTFLOWIF_ALL) - return log_msg_ret("all", ret); - } - iter->err = ret; -@@ -402,7 +402,7 @@ int bootflow_scan_next(struct bootflow_iter *iter, struct bootflow *bflow) - return 0; - iter->err = ret; - if (ret != BF_NO_MORE_PARTS && ret != -ENOSYS) { -- if (iter->flags & BOOTFLOWF_ALL) -+ if (iter->flags & BOOTFLOWIF_ALL) - return log_msg_ret("all", ret); - } - } else { -@@ -467,6 +467,9 @@ int bootflow_run_boot(struct bootflow_iter *iter, struct bootflow *bflow) - - printf("** Booting bootflow '%s' with %s\n", bflow->name, - bflow->method->name); -+ if (IS_ENABLED(CONFIG_OF_HAS_PRIOR_STAGE) && -+ (bflow->flags & BOOTFLOWF_USE_PRIOR_FDT)) -+ printf("Using prior-stage device tree\n"); - ret = bootflow_boot(bflow); - if (!IS_ENABLED(CONFIG_BOOTSTD_FULL)) { - printf("Boot failed (err=%d)\n", ret); -diff --git a/boot/bootmeth_efi.c b/boot/bootmeth_efi.c -index 67c972e3fe..6a97ac02ff 100644 ---- a/boot/bootmeth_efi.c -+++ b/boot/bootmeth_efi.c -@@ -147,25 +147,60 @@ static int distro_efi_check(struct udevice *dev, struct bootflow_iter *iter) - return 0; - } - --static void distro_efi_get_fdt_name(char *fname, int size) -+/** -+ * distro_efi_get_fdt_name() - Get the filename for reading the .dtb file -+ * -+ * @fname: Place to put filename -+ * @size: Max size of filename -+ * @seq: Sequence number, to cycle through options (0=first) -+ * Returns: 0 on success, -ENOENT if the "fdtfile" env var does not exist, -+ * -EINVAL if there are no more options, -EALREADY if the control FDT should be -+ * used -+ */ -+static int distro_efi_get_fdt_name(char *fname, int size, int seq) - { - const char *fdt_fname; -+ const char *prefix; -+ -+ /* select the prefix */ -+ switch (seq) { -+ case 0: -+ /* this is the default */ -+ prefix = "/dtb"; -+ break; -+ case 1: -+ prefix = ""; -+ break; -+ case 2: -+ prefix = "/dtb/current"; -+ break; -+ default: -+ return log_msg_ret("pref", -EINVAL); -+ } - - fdt_fname = env_get("fdtfile"); - if (fdt_fname) { -- snprintf(fname, size, "dtb/%s", fdt_fname); -+ snprintf(fname, size, "%s/%s", prefix, fdt_fname); - log_debug("Using device tree: %s\n", fname); -- } else { -+ } else if (IS_ENABLED(CONFIG_OF_HAS_PRIOR_STAGE)) { -+ strcpy(fname, ""); -+ return log_msg_ret("pref", -EALREADY); -+ /* Use this fallback only for 32-bit ARM */ -+ } else if (IS_ENABLED(CONFIG_ARM) && !IS_ENABLED(CONFIG_ARM64)) { - const char *soc = env_get("soc"); - const char *board = env_get("board"); - const char *boardver = env_get("boardver"); - - /* cf the code in label_boot() which seems very complex */ -- snprintf(fname, size, "dtb/%s%s%s%s.dtb", -+ snprintf(fname, size, "%s/%s%s%s%s.dtb", prefix, - soc ? soc : "", soc ? "-" : "", board ? board : "", - boardver ? boardver : ""); - log_debug("Using default device tree: %s\n", fname); -+ } else { -+ return log_msg_ret("env", -ENOENT); - } -+ -+ return 0; - } - - static int distro_efi_read_bootflow_file(struct udevice *dev, -@@ -174,7 +209,7 @@ static int distro_efi_read_bootflow_file(struct udevice *dev, - struct blk_desc *desc = NULL; - ulong fdt_addr, size; - char fname[256]; -- int ret; -+ int ret, seq; - - /* We require a partition table */ - if (!bflow->part) -@@ -196,13 +231,26 @@ static int distro_efi_read_bootflow_file(struct udevice *dev, - if (ret) - return log_msg_ret("read", -EINVAL); - -- distro_efi_get_fdt_name(fname, sizeof(fname)); -+ fdt_addr = env_get_hex("fdt_addr_r", 0); -+ -+ /* try the various available names */ -+ ret = -ENOENT; -+ for (seq = 0; ret; seq++) { -+ ret = distro_efi_get_fdt_name(fname, sizeof(fname), seq); -+ if (ret == -EALREADY) { -+ bflow->flags = BOOTFLOWF_USE_PRIOR_FDT; -+ break; -+ } -+ if (ret) -+ return log_msg_ret("nam", ret); -+ ret = bootmeth_common_read_file(dev, bflow, fname, fdt_addr, -+ &size); -+ } -+ - bflow->fdt_fname = strdup(fname); - if (!bflow->fdt_fname) - return log_msg_ret("fil", -ENOMEM); - -- fdt_addr = env_get_hex("fdt_addr_r", 0); -- ret = bootmeth_common_read_file(dev, bflow, fname, fdt_addr, &size); - if (!ret) { - bflow->fdt_size = size; - bflow->fdt_addr = fdt_addr; -@@ -277,7 +325,11 @@ static int distro_efi_read_bootflow_net(struct bootflow *bflow) - fdt_addr = hextoul(fdt_addr_str, NULL); - sprintf(file_addr, "%lx", fdt_addr); - -- distro_efi_get_fdt_name(fname, sizeof(fname)); -+ /* We only allow the first prefix with PXE */ -+ ret = distro_efi_get_fdt_name(fname, sizeof(fname), 0); -+ if (ret) -+ return log_msg_ret("nam", ret); -+ - bflow->fdt_fname = strdup(fname); - if (!bflow->fdt_fname) - return log_msg_ret("fil", -ENOMEM); -diff --git a/boot/image-board.c b/boot/image-board.c -index 25b60ec30b..9bf70824cb 100644 ---- a/boot/image-board.c -+++ b/boot/image-board.c -@@ -1004,7 +1004,9 @@ int image_locate_script(void *buf, int size, const char *fit_uname, - - switch (genimg_get_format(buf)) { - case IMAGE_FORMAT_LEGACY: -- if (IS_ENABLED(CONFIG_LEGACY_IMAGE_FORMAT)) { -+ if (!IS_ENABLED(CONFIG_LEGACY_IMAGE_FORMAT)) { -+ goto exit_image_format; -+ } else { - hdr = buf; - - if (!image_check_magic(hdr)) { -@@ -1047,7 +1049,9 @@ int image_locate_script(void *buf, int size, const char *fit_uname, - } - break; - case IMAGE_FORMAT_FIT: -- if (IS_ENABLED(CONFIG_FIT)) { -+ if (!IS_ENABLED(CONFIG_FIT)) { -+ goto exit_image_format; -+ } else { - fit_hdr = buf; - if (fit_check_format(fit_hdr, IMAGE_SIZE_INVAL)) { - puts("Bad FIT image format\n"); -@@ -1121,12 +1125,15 @@ fallback: - } - break; - default: -- puts("Wrong image format for \"source\" command\n"); -- return -EPERM; -+ goto exit_image_format; - } - - *datap = (char *)data; - *lenp = len; - - return 0; -+ -+exit_image_format: -+ puts("Wrong image format for \"source\" command\n"); -+ return -EPERM; - } -diff --git a/boot/vbe_request.c b/boot/vbe_request.c -index 45f1d2b7e1..312edfa2bd 100644 ---- a/boot/vbe_request.c -+++ b/boot/vbe_request.c -@@ -36,7 +36,7 @@ static int handle_random_req(ofnode node, int default_size, - u32 size; - int ret; - -- if (!CONFIG_IS_ENABLED(DM_RNG)) -+ if (!IS_ENABLED(CONFIG_DM_RNG)) - return -ENOTSUPP; - - if (ofnode_read_u32(node, "vbe,size", &size)) { -diff --git a/cmd/Kconfig b/cmd/Kconfig -index 2caa4af71c..8c9b430f99 100644 ---- a/cmd/Kconfig -+++ b/cmd/Kconfig -@@ -1396,6 +1396,16 @@ config CMD_PCI - peripherals. Sub-commands allow bus enumeration, displaying and - changing configuration space and a few other features. - -+config CMD_PCI_MPS -+ bool "pci_mps - Configure PCI device MPS" -+ depends on PCI -+ help -+ Enables PCI Express Maximum Packet Size (MPS) tuning. This -+ command configures the PCI Express MPS of each endpoint to the -+ largest value supported by all devices below the root complex. -+ The Maximum Read Request Size will not be altered. This method is -+ the same algorithm as used by Linux pci=pcie_bus_safe. -+ - config CMD_PINMUX - bool "pinmux - show pins muxing" - depends on PINCTRL -@@ -1542,6 +1552,12 @@ config CMD_USB_MASS_STORAGE - export a block device: U-Boot, the USB device, acts as a simple - external hard drive plugged on the host USB port. - -+config CMD_UMS_ABORT_KEYED -+ bool "UMS abort with any key" -+ depends on CMD_USB_MASS_STORAGE -+ help -+ Allow interruption of usb mass storage run with any key pressed. -+ - config CMD_PVBLOCK - bool "Xen para-virtualized block device" - depends on XEN -@@ -1562,6 +1578,11 @@ config CMD_WDT - help - This provides commands to control the watchdog timer devices. - -+config CMD_WRITE -+ bool "write - Write binary data to a partition" -+ help -+ Provides low-level write access to a partition. -+ - config CMD_AXI - bool "axi" - depends on AXI -@@ -2226,6 +2247,14 @@ config CMD_VIDCONSOLE - The name 'lcdputs' is a bit of a misnomer, but so named because the - video device is often an LCD. - -+config CMD_SELECT_FONT -+ bool "select font size" -+ depends on VIDEO -+ default n -+ help -+ Enabling this will provide 'font' command. -+ Allows font selection at runtime. -+ - endmenu - - source "cmd/ti/Kconfig" -diff --git a/cmd/Makefile b/cmd/Makefile -index 36d2daf22a..e032091621 100644 ---- a/cmd/Makefile -+++ b/cmd/Makefile -@@ -62,8 +62,8 @@ obj-$(CONFIG_CMD_EXTENSION) += extension_board.o - obj-$(CONFIG_CMD_ECHO) += echo.o - obj-$(CONFIG_ENV_IS_IN_EEPROM) += eeprom.o - obj-$(CONFIG_CMD_EEPROM) += eeprom.o --obj-$(CONFIG_EFI) += efi.o --obj-$(CONFIG_CMD_EFIDEBUG) += efidebug.o -+obj-$(CONFIG_EFI) += efi.o efi_common.o -+obj-$(CONFIG_CMD_EFIDEBUG) += efidebug.o efi_common.o - obj-$(CONFIG_CMD_EFICONFIG) += eficonfig.o - ifdef CONFIG_CMD_EFICONFIG - ifdef CONFIG_EFI_MM_COMM_TEE -@@ -78,7 +78,7 @@ obj-$(CONFIG_CMD_EXT2) += ext2.o - obj-$(CONFIG_CMD_FAT) += fat.o - obj-$(CONFIG_CMD_FDT) += fdt.o - obj-$(CONFIG_CMD_SQUASHFS) += sqfs.o --obj-$(CONFIG_CONSOLE_TRUETYPE) += font.o -+obj-$(CONFIG_CMD_SELECT_FONT) += font.o - obj-$(CONFIG_CMD_FLASH) += flash.o - obj-$(CONFIG_CMD_FPGA) += fpga.o - obj-$(CONFIG_CMD_FPGAD) += fpgad.o -@@ -131,6 +131,7 @@ obj-$(CONFIG_CMD_PART) += part.o - obj-$(CONFIG_CMD_PCAP) += pcap.o - ifdef CONFIG_PCI - obj-$(CONFIG_CMD_PCI) += pci.o -+obj-$(CONFIG_CMD_PCI_MPS) += pci_mps.o - endif - obj-$(CONFIG_CMD_PINMUX) += pinmux.o - obj-$(CONFIG_CMD_PMC) += pmc.o -@@ -140,6 +141,7 @@ obj-$(CONFIG_CMD_PXE) += pxe.o - obj-$(CONFIG_CMD_WOL) += wol.o - obj-$(CONFIG_CMD_QFW) += qfw.o - obj-$(CONFIG_CMD_READ) += read.o -+obj-$(CONFIG_CMD_WRITE) += read.o - obj-$(CONFIG_CMD_REGINFO) += reginfo.o - obj-$(CONFIG_CMD_REISER) += reiser.o - obj-$(CONFIG_CMD_REMOTEPROC) += remoteproc.o -diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c -index bf002f8447..f709904c51 100644 ---- a/cmd/bdinfo.c -+++ b/cmd/bdinfo.c -@@ -26,6 +26,11 @@ void bdinfo_print_size(const char *name, uint64_t size) - print_size(size, "\n"); - } - -+void bdinfo_print_str(const char *name, const char *str) -+{ -+ printf("%-12s= %s\n", name, str); -+} -+ - void bdinfo_print_num_l(const char *name, ulong value) - { - printf("%-12s= 0x%0*lx\n", name, 2 * (int)sizeof(value), value); -@@ -83,11 +88,15 @@ static void show_video_info(void) - device_active(dev) ? "" : "in"); - if (device_active(dev)) { - struct video_priv *upriv = dev_get_uclass_priv(dev); -+ struct video_uc_plat *plat = dev_get_uclass_plat(dev); - - bdinfo_print_num_ll("FB base", (ulong)upriv->fb); -- if (upriv->copy_fb) -+ if (upriv->copy_fb) { - bdinfo_print_num_ll("FB copy", - (ulong)upriv->copy_fb); -+ bdinfo_print_num_l(" copy size", -+ plat->copy_size); -+ } - printf("%-12s= %dx%dx%d\n", "FB size", upriv->xsize, - upriv->ysize, 1 << upriv->bpix); - } -diff --git a/cmd/bootefi.c b/cmd/bootefi.c -index 6618335ddf..8aa15a64c8 100644 ---- a/cmd/bootefi.c -+++ b/cmd/bootefi.c -@@ -204,25 +204,12 @@ static efi_status_t copy_fdt(void **fdtp) - fdt_pages = efi_size_in_pages(fdt_totalsize(fdt) + 0x3000); - fdt_size = fdt_pages << EFI_PAGE_SHIFT; - -- /* -- * Safe fdt location is at 127 MiB. -- * On the sandbox convert from the sandbox address space. -- */ -- new_fdt_addr = (uintptr_t)map_sysmem(fdt_ram_start + 0x7f00000 + -- fdt_size, 0); -- ret = efi_allocate_pages(EFI_ALLOCATE_MAX_ADDRESS, -+ ret = efi_allocate_pages(EFI_ALLOCATE_ANY_PAGES, - EFI_ACPI_RECLAIM_MEMORY, fdt_pages, - &new_fdt_addr); - if (ret != EFI_SUCCESS) { -- /* If we can't put it there, put it somewhere */ -- new_fdt_addr = (ulong)memalign(EFI_PAGE_SIZE, fdt_size); -- ret = efi_allocate_pages(EFI_ALLOCATE_MAX_ADDRESS, -- EFI_ACPI_RECLAIM_MEMORY, fdt_pages, -- &new_fdt_addr); -- if (ret != EFI_SUCCESS) { -- log_err("ERROR: Failed to reserve space for FDT\n"); -- goto done; -- } -+ log_err("ERROR: Failed to reserve space for FDT\n"); -+ goto done; - } - new_fdt = (void *)(uintptr_t)new_fdt_addr; - memcpy(new_fdt, fdt, fdt_totalsize(fdt)); -diff --git a/cmd/bootflow.c b/cmd/bootflow.c -index 3548bbb683..42f6e14a43 100644 ---- a/cmd/bootflow.c -+++ b/cmd/bootflow.c -@@ -135,13 +135,13 @@ static int do_bootflow_scan(struct cmd_tbl *cmdtp, int flag, int argc, - - flags = 0; - if (list) -- flags |= BOOTFLOWF_SHOW; -+ flags |= BOOTFLOWIF_SHOW; - if (all) -- flags |= BOOTFLOWF_ALL; -+ flags |= BOOTFLOWIF_ALL; - if (no_global) -- flags |= BOOTFLOWF_SKIP_GLOBAL; -+ flags |= BOOTFLOWIF_SKIP_GLOBAL; - if (!no_hunter) -- flags |= BOOTFLOWF_HUNT; -+ flags |= BOOTFLOWIF_HUNT; - - /* - * If we have a device, just scan for bootflows attached to that device -diff --git a/cmd/cls.c b/cmd/cls.c -index 40a32eeab6..1125a3f81b 100644 ---- a/cmd/cls.c -+++ b/cmd/cls.c -@@ -8,7 +8,7 @@ - #include - #include - #include --#include -+#include - - #define CSI "\x1b[" - -@@ -17,14 +17,24 @@ static int do_video_clear(struct cmd_tbl *cmdtp, int flag, int argc, - { - __maybe_unused struct udevice *dev; - -- /* Send clear screen and home */ -+ /* -+ * Send clear screen and home -+ * -+ * FIXME(Heinrich Schuchardt ): This should go -+ * through an API and only be written to serial terminals, not video -+ * displays -+ */ - printf(CSI "2J" CSI "1;1H"); -- if (IS_ENABLED(CONFIG_VIDEO) && !IS_ENABLED(CONFIG_VIDEO_ANSI)) { -- if (uclass_first_device_err(UCLASS_VIDEO, &dev)) -+ if (IS_ENABLED(CONFIG_VIDEO_ANSI)) -+ return 0; -+ -+ if (IS_ENABLED(CONFIG_VIDEO)) { -+ if (uclass_first_device_err(UCLASS_VIDEO_CONSOLE, &dev)) - return CMD_RET_FAILURE; -- if (video_clear(dev)) -+ if (vidconsole_clear_and_reset(dev)) - return CMD_RET_FAILURE; - } -+ - return CMD_RET_SUCCESS; - } - -diff --git a/cmd/efi.c b/cmd/efi.c -index c0384e0db2..6cd5361aca 100644 ---- a/cmd/efi.c -+++ b/cmd/efi.c -@@ -7,10 +7,12 @@ - #include - #include - #include -+#include - #include - #include - #include - #include -+#include - #include - - DECLARE_GLOBAL_DATA_PTR; -@@ -273,8 +275,34 @@ done: - return ret ? CMD_RET_FAILURE : 0; - } - -+static int do_efi_tables(struct cmd_tbl *cmdtp, int flag, int argc, -+ char *const argv[]) -+{ -+ struct efi_system_table *systab; -+ -+ if (IS_ENABLED(CONFIG_EFI_APP)) { -+ systab = efi_get_sys_table(); -+ if (!systab) { -+ printf("Cannot read system table\n"); -+ return CMD_RET_FAILURE; -+ } -+ } else { -+ int size; -+ int ret; -+ -+ ret = efi_info_get(EFIET_SYS_TABLE, (void **)&systab, &size); -+ if (ret) /* this should not happen */ -+ return CMD_RET_FAILURE; -+ } -+ -+ efi_show_tables(systab); -+ -+ return 0; -+} -+ - static struct cmd_tbl efi_commands[] = { - U_BOOT_CMD_MKENT(mem, 1, 1, do_efi_mem, "", ""), -+ U_BOOT_CMD_MKENT(tables, 1, 1, do_efi_tables, "", ""), - }; - - static int do_efi(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -@@ -298,5 +326,6 @@ static int do_efi(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) - U_BOOT_CMD( - efi, 3, 1, do_efi, - "EFI access", -- "mem [all] Dump memory information [include boot services]" -+ "mem [all] Dump memory information [include boot services]\n" -+ "tables Dump tables" - ); -diff --git a/cmd/efi_common.c b/cmd/efi_common.c -new file mode 100644 -index 0000000000..f4056096cd ---- /dev/null -+++ b/cmd/efi_common.c -@@ -0,0 +1,26 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Common code for EFI commands -+ * -+ * Copyright 2023 Google LLC -+ * Written by Simon Glass -+ */ -+ -+#include -+#include -+#include -+#include -+ -+void efi_show_tables(struct efi_system_table *systab) -+{ -+ int i; -+ -+ for (i = 0; i < systab->nr_tables; i++) { -+ struct efi_configuration_table *tab = &systab->tables[i]; -+ char guid_str[37]; -+ -+ uuid_bin_to_str(tab->guid.b, guid_str, 1); -+ printf("%p %pUl %s\n", tab->table, guid_str, -+ uuid_guid_get_str(tab->guid.b) ?: "(unknown)"); -+ } -+} -diff --git a/cmd/efidebug.c b/cmd/efidebug.c -index e6959ede93..9622430c47 100644 ---- a/cmd/efidebug.c -+++ b/cmd/efidebug.c -@@ -649,11 +649,7 @@ static int do_efi_show_memmap(struct cmd_tbl *cmdtp, int flag, - static int do_efi_show_tables(struct cmd_tbl *cmdtp, int flag, - int argc, char *const argv[]) - { -- efi_uintn_t i; -- -- for (i = 0; i < systab.nr_tables; ++i) -- printf("%pUl (%pUs)\n", -- &systab.tables[i].guid, &systab.tables[i].guid); -+ efi_show_tables(&systab); - - return CMD_RET_SUCCESS; - } -diff --git a/cmd/fdt.c b/cmd/fdt.c -index f38fe909c3..aae3278526 100644 ---- a/cmd/fdt.c -+++ b/cmd/fdt.c -@@ -36,16 +36,21 @@ static int is_printable_string(const void *data, int len); - */ - struct fdt_header *working_fdt; - --void set_working_fdt_addr(ulong addr) -+static void set_working_fdt_addr_quiet(ulong addr) - { - void *buf; - -- printf("Working FDT set to %lx\n", addr); - buf = map_sysmem(addr, 0); - working_fdt = buf; - env_set_hex("fdtaddr", addr); - } - -+void set_working_fdt_addr(ulong addr) -+{ -+ printf("Working FDT set to %lx\n", addr); -+ set_working_fdt_addr_quiet(addr); -+} -+ - /* - * Get a value from the fdt and format it to be set in the environment - */ -@@ -192,10 +197,14 @@ static int do_fdt(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) - if ((quiet && fdt_check_header(blob)) || - (!quiet && !fdt_valid(&blob))) - return 1; -- if (control) -+ if (control) { - gd->fdt_blob = blob; -- else -- set_working_fdt_addr(addr); -+ } else { -+ if (quiet) -+ set_working_fdt_addr_quiet(addr); -+ else -+ set_working_fdt_addr(addr); -+ } - - if (argc >= 2) { - int len; -@@ -475,18 +484,9 @@ static int do_fdt(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) - if (ret != 0) - return ret; - } else if (subcmd[0] == 'a') { -- /* Get address */ -- char buf[19]; -- -- snprintf(buf, sizeof(buf), "0x%lx", -- (ulong)map_to_sysmem(nodep)); -- env_set(var, buf); -+ env_set_hex(var, (ulong)map_to_sysmem(nodep)); - } else if (subcmd[0] == 's') { -- /* Get size */ -- char buf[11]; -- -- sprintf(buf, "0x%08X", len); -- env_set(var, buf); -+ env_set_hex(var, len); - } else - return CMD_RET_USAGE; - return 0; -diff --git a/cmd/font.c b/cmd/font.c -index 7b4347f32b..fe2d65caaf 100644 ---- a/cmd/font.c -+++ b/cmd/font.c -@@ -61,7 +61,11 @@ static int do_font_size(struct cmd_tbl *cmdtp, int flag, int argc, - - if (uclass_first_device_err(UCLASS_VIDEO_CONSOLE, &dev)) - return CMD_RET_FAILURE; -- font_name = vidconsole_get_font_size(dev, &size); -+ ret = vidconsole_get_font_size(dev, &font_name, &size); -+ if (ret) { -+ printf("Failed (error %d)\n", ret); -+ return CMD_RET_FAILURE; -+ } - - size = dectoul(argv[1], NULL); - -diff --git a/cmd/mvebu/Kconfig b/cmd/mvebu/Kconfig -index 9ec3aa983a..e83a982949 100644 ---- a/cmd/mvebu/Kconfig -+++ b/cmd/mvebu/Kconfig -@@ -3,8 +3,12 @@ depends on ARCH_MVEBU - - config CMD_MVEBU_BUBT - bool "bubt" -+ default y - select SHA256 if ARMADA_3700 - select SHA512 if ARMADA_3700 -+ select DOS_PARTITION if ARMADA_3700 -+ select EFI_PARTITION if ARMADA_3700 -+ select PARTITION_TYPE_GUID if ARMADA_3700 - select MVEBU_EFUSE if ARMADA_38X || ARMADA_3700 - help - bubt - Burn a u-boot image to flash -@@ -15,6 +19,10 @@ if CMD_MVEBU_BUBT - - choice - prompt "Flash for image" -+ default MVEBU_SPI_BOOT if MVEBU_SPL_BOOT_DEVICE_SPI -+ default MVEBU_NAND_BOOT if MVEBU_SPL_BOOT_DEVICE_NAND -+ default MVEBU_MMC_BOOT if MVEBU_SPL_BOOT_DEVICE_MMC -+ default MVEBU_SATA_BOOT if MVEBU_SPL_BOOT_DEVICE_SATA - default MVEBU_SPI_BOOT - - config MVEBU_NAND_BOOT -@@ -44,10 +52,20 @@ config MVEBU_MMC_BOOT - For details about bubt command please see the documentation - in doc/mvebu/cmd/bubt.txt - -+config MVEBU_SATA_BOOT -+ bool "SATA flash boot" -+ depends on SCSI -+ help -+ Enable boot from SATA disk. -+ Allow usage of SATA disk as a target for "bubt" command -+ For details about bubt command please see the documentation -+ in doc/mvebu/cmd/bubt.txt -+ - endchoice - - config MVEBU_UBOOT_DFLT_NAME - string "Default image name for bubt command" -+ default BUILD_TARGET if ARMADA_32BIT && BUILD_TARGET != "" - default "flash-image.bin" - help - This option should contain a default file name to be used with -diff --git a/cmd/mvebu/bubt.c b/cmd/mvebu/bubt.c -index 1efbe2e607..49797b2314 100644 ---- a/cmd/mvebu/bubt.c -+++ b/cmd/mvebu/bubt.c -@@ -19,6 +19,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -189,6 +190,11 @@ static int mmc_burn_image(size_t image_size) - #ifdef CONFIG_BLK - struct blk_desc *blk_desc; - #endif -+#ifdef CONFIG_SUPPORT_EMMC_BOOT -+ u8 part; -+ u8 orig_part; -+#endif -+ - mmc = find_mmc_device(mmc_dev_num); - if (!mmc) { - printf("No SD/MMC/eMMC card found\n"); -@@ -202,6 +208,38 @@ static int mmc_burn_image(size_t image_size) - return err; - } - -+#ifdef CONFIG_BLK -+ blk_desc = mmc_get_blk_desc(mmc); -+ if (!blk_desc) { -+ printf("Error - failed to obtain block descriptor\n"); -+ return -ENODEV; -+ } -+#endif -+ -+#ifdef CONFIG_SUPPORT_EMMC_BOOT -+#ifdef CONFIG_BLK -+ orig_part = blk_desc->hwpart; -+#else -+ orig_part = mmc->block_dev.hwpart; -+#endif -+ -+ part = (mmc->part_config >> 3) & PART_ACCESS_MASK; -+ -+ if (part == 7) -+ part = 0; -+ -+#ifdef CONFIG_BLK -+ err = blk_dselect_hwpart(blk_desc, part); -+#else -+ err = mmc_switch_part(mmc, part); -+#endif -+ -+ if (err) { -+ printf("Error - MMC partition switch failed\n"); -+ return err; -+ } -+#endif -+ - /* SD reserves LBA-0 for MBR and boots from LBA-1, - * MMC/eMMC boots from LBA-0 - */ -@@ -211,11 +249,6 @@ static int mmc_burn_image(size_t image_size) - if (image_size % mmc->write_bl_len) - blk_count += 1; - -- blk_desc = mmc_get_blk_desc(mmc); -- if (!blk_desc) { -- printf("Error - failed to obtain block descriptor\n"); -- return -ENODEV; -- } - blk_written = blk_dwrite(blk_desc, start_lba, blk_count, - (void *)get_load_addr()); - #else -@@ -227,6 +260,17 @@ static int mmc_burn_image(size_t image_size) - start_lba, blk_count, - (void *)get_load_addr()); - #endif /* CONFIG_BLK */ -+ -+#ifdef CONFIG_SUPPORT_EMMC_BOOT -+#ifdef CONFIG_BLK -+ err = blk_dselect_hwpart(blk_desc, orig_part); -+#else -+ err = mmc_switch_part(mmc, orig_part); -+#endif -+ if (err) -+ printf("Error - MMC failed to switch back to original partition\n"); -+#endif -+ - if (blk_written != blk_count) { - printf("Error - written %#lx blocks\n", blk_written); - return -ENOSPC; -@@ -290,6 +334,143 @@ static int is_mmc_active(void) - } - #endif /* CONFIG_DM_MMC */ - -+/******************************************************************** -+ * SATA services -+ ********************************************************************/ -+#if defined(CONFIG_SCSI) && defined(CONFIG_BLK) -+static int sata_burn_image(size_t image_size) -+{ -+#if defined(CONFIG_ARMADA_3700) || defined(CONFIG_ARMADA_32BIT) -+ lbaint_t start_lba; -+ lbaint_t blk_count; -+ ulong blk_written; -+ struct blk_desc *blk_desc; -+#ifdef CONFIG_ARMADA_3700 -+ struct disk_partition info; -+ int part; -+#endif -+ -+ scsi_scan(false); -+ -+ blk_desc = blk_get_devnum_by_uclass_id(UCLASS_SCSI, 0); -+ if (!blk_desc) -+ return -ENODEV; -+ -+#ifdef CONFIG_ARMADA_3700 -+ /* -+ * 64-bit Armada 3700 BootROM loads SATA firmware from -+ * GPT 'Marvell Armada 3700 Boot partition' or from -+ * MBR 'M' (0x4d) partition. -+ */ -+ switch (blk_desc->part_type) { -+ case PART_TYPE_DOS: -+ for (part = 1; part <= 4; part++) { -+ info.sys_ind = 0; -+ if (part_get_info(blk_desc, part, &info)) -+ continue; -+ if (info.sys_ind == 'M') -+ break; -+ } -+ if (part > 4) { -+ printf("Error - cannot find MBR 'M' (0x4d) partition on SATA disk\n"); -+ return -ENODEV; -+ } -+ start_lba = info.start; -+ break; -+ case PART_TYPE_EFI: -+ for (part = 1; part <= 64; part++) { -+ info.type_guid[0] = 0; -+ if (part_get_info(blk_desc, part, &info)) -+ continue; -+ /* Check for GPT type GUID of 'Marvell Armada 3700 Boot partition' */ -+ if (strcmp(info.type_guid, "6828311A-BA55-42A4-BCDE-A89BB5EDECAE") == 0) -+ break; -+ } -+ if (part > 64) { -+ printf("Error - cannot find GPT 'Marvell Armada 3700 Boot partition' on SATA disk\n"); -+ return -ENODEV; -+ } -+ start_lba = info.start; -+ break; -+ default: -+ printf("Error - no partitions on SATA disk\n"); -+ return -ENODEV; -+ } -+#else -+ /* 32-bit Armada BootROM loads SATA firmware from the sector 1. */ -+ start_lba = 1; -+#endif -+ -+ blk_count = image_size / blk_desc->blksz; -+ if (image_size % blk_desc->blksz) -+ blk_count += 1; -+ -+ blk_written = blk_dwrite(blk_desc, start_lba, blk_count, -+ (void *)get_load_addr()); -+ -+ if (blk_written != blk_count) { -+ printf("Error - written %#lx blocks\n", blk_written); -+ return -ENOSPC; -+ } -+ -+ printf("Done!\n"); -+ return 0; -+#else -+ return -ENODEV; -+#endif -+} -+ -+static size_t sata_read_file(const char *file_name) -+{ -+ loff_t act_read = 0; -+ struct udevice *dev; -+ int rc; -+ -+ /* try to recognize storage devices immediately */ -+ scsi_scan(false); -+ -+ /* Try to recognize storage devices immediately */ -+ blk_first_device(UCLASS_SCSI, &dev); -+ if (!dev) { -+ printf("Error: SATA device not found\n"); -+ return 0; -+ } -+ -+ /* Always load from scsi 0 */ -+ if (fs_set_blk_dev("scsi", "0", FS_TYPE_ANY)) { -+ printf("Error: SATA 0 not found\n"); -+ return 0; -+ } -+ -+ /* Perfrom file read */ -+ rc = fs_read(file_name, get_load_addr(), 0, 0, &act_read); -+ if (rc) -+ return 0; -+ -+ return act_read; -+} -+ -+static int is_sata_active(void) -+{ -+ return 1; -+} -+#else /* CONFIG_SCSI */ -+static int sata_burn_image(size_t image_size) -+{ -+ return -ENODEV; -+} -+ -+static size_t sata_read_file(const char *file_name) -+{ -+ return 0; -+} -+ -+static int is_sata_active(void) -+{ -+ return 0; -+} -+#endif /* CONFIG_SCSI */ -+ - /******************************************************************** - * SPI services - ********************************************************************/ -@@ -499,16 +680,18 @@ enum bubt_devices { - BUBT_DEV_NET = 0, - BUBT_DEV_USB, - BUBT_DEV_MMC, -+ BUBT_DEV_SATA, - BUBT_DEV_SPI, - BUBT_DEV_NAND, - - BUBT_MAX_DEV - }; - --struct bubt_dev bubt_devs[BUBT_MAX_DEV] = { -+static struct bubt_dev bubt_devs[BUBT_MAX_DEV] = { - {"tftp", tftp_read_file, NULL, is_tftp_active}, - {"usb", usb_read_file, NULL, is_usb_active}, - {"mmc", mmc_read_file, mmc_burn_image, is_mmc_active}, -+ {"sata", sata_read_file, sata_burn_image, is_sata_active}, - {"spi", NULL, spi_burn_image, is_spi_active}, - {"nand", NULL, nand_burn_image, is_nand_active}, - }; -@@ -524,7 +707,7 @@ static int bubt_write_file(struct bubt_dev *dst, size_t image_size) - } - - #if defined(CONFIG_ARMADA_8K) --u32 do_checksum32(u32 *start, int32_t len) -+static u32 do_checksum32(u32 *start, int32_t len) - { - u32 sum = 0; - u32 *startp = start; -@@ -542,9 +725,8 @@ static int check_image_header(void) - { - struct mvebu_image_header *hdr = - (struct mvebu_image_header *)get_load_addr(); -- u32 header_len = hdr->prolog_size; - u32 checksum; -- u32 checksum_ref = hdr->prolog_checksum; -+ u32 checksum_ref; - - /* - * For now compare checksum, and magic. Later we can -@@ -556,18 +738,23 @@ static int check_image_header(void) - return -ENOEXEC; - } - -- /* The checksum value is discarded from checksum calculation */ -- hdr->prolog_checksum = 0; -+ checksum_ref = hdr->prolog_checksum; -+ checksum = do_checksum32((u32 *)hdr, hdr->prolog_size); -+ checksum -= hdr->prolog_checksum; -+ if (checksum != checksum_ref) { -+ printf("Error: Bad Prolog checksum. 0x%x != 0x%x\n", -+ checksum, checksum_ref); -+ return -ENOEXEC; -+ } - -- checksum = do_checksum32((u32 *)hdr, header_len); -+ checksum_ref = hdr->boot_image_checksum; -+ checksum = do_checksum32((u32 *)((u8 *)hdr + hdr->prolog_size), hdr->boot_image_size); - if (checksum != checksum_ref) { - printf("Error: Bad Image checksum. 0x%x != 0x%x\n", - checksum, checksum_ref); - return -ENOEXEC; - } - -- /* Restore the checksum before writing */ -- hdr->prolog_checksum = checksum_ref; - printf("Image checksum...OK!\n"); - - return 0; -@@ -722,12 +909,12 @@ static int check_image_header(void) - u32 offset, size; - const struct a38x_main_hdr_v1 *hdr = - (struct a38x_main_hdr_v1 *)get_load_addr(); -- const size_t image_size = a38x_header_size(hdr); -+ const size_t hdr_size = a38x_header_size(hdr); - -- if (!image_size) -+ if (!hdr_size) - return -ENOEXEC; - -- checksum = image_checksum8(hdr, image_size); -+ checksum = image_checksum8(hdr, hdr_size); - checksum -= hdr->checksum; - if (checksum != hdr->checksum) { - printf("Error: Bad A38x image header checksum. 0x%x != 0x%x\n", -@@ -738,16 +925,7 @@ static int check_image_header(void) - offset = le32_to_cpu(hdr->srcaddr); - size = le32_to_cpu(hdr->blocksize); - -- if (hdr->blockid == 0x78) { /* SATA id */ -- if (offset < 1) { -- printf("Error: Bad A38x image srcaddr.\n"); -- return -ENOEXEC; -- } -- offset -= 1; -- offset *= 512; -- } -- -- if (hdr->blockid == 0xAE) /* SDIO id */ -+ if (hdr->blockid == 0x78) /* SATA id */ - offset *= 512; - - if (offset % 4 != 0 || size < 4 || size % 4 != 0) { -@@ -770,7 +948,7 @@ static int check_image_header(void) - #if defined(CONFIG_ARMADA_38X) - static int a38x_image_is_secure(const struct a38x_main_hdr_v1 *hdr) - { -- u32 image_size = a38x_header_size(hdr); -+ const size_t hdr_size = a38x_header_size(hdr); - struct a38x_opt_hdr_v1 *ohdr; - u32 ohdr_size; - -@@ -791,7 +969,7 @@ static int a38x_image_is_secure(const struct a38x_main_hdr_v1 *hdr) - break; - - ohdr = (struct a38x_opt_hdr_v1 *)((u8 *)ohdr + ohdr_size); -- if ((u8 *)ohdr >= (u8 *)hdr + image_size) -+ if ((u8 *)ohdr >= (u8 *)hdr + hdr_size) - break; - } while (1); - -@@ -806,7 +984,7 @@ static int check_image_header(void) - } - #endif - --#if defined(CONFIG_ARMADA_3700) || defined(CONFIG_ARMADA_32BIT) -+#if defined(CONFIG_ARMADA_3700) || defined(CONFIG_ARMADA_38X) - static u64 fuse_read_u64(u32 bank) - { - u32 val[2]; -@@ -835,7 +1013,10 @@ static inline u8 maj3(u8 val) - static int bubt_check_boot_mode(const struct bubt_dev *dst) - { - #if defined(CONFIG_ARMADA_3700) || defined(CONFIG_ARMADA_32BIT) -- int mode, secure_mode; -+ int mode; -+#if defined(CONFIG_ARMADA_3700) || defined(CONFIG_ARMADA_38X) -+ int secure_mode; -+#endif - #if defined(CONFIG_ARMADA_3700) - const struct tim_boot_flash_sign *boot_modes = tim_boot_flash_signs; - const struct common_tim_data *hdr = -@@ -966,7 +1147,7 @@ static int bubt_is_dev_active(struct bubt_dev *dev) - return 1; - } - --struct bubt_dev *find_bubt_dev(char *dev_name) -+static struct bubt_dev *find_bubt_dev(char *dev_name) - { - int dev; - -@@ -987,12 +1168,14 @@ struct bubt_dev *find_bubt_dev(char *dev_name) - #define DEFAULT_BUBT_DST "nand" - #elif defined(CONFIG_MVEBU_MMC_BOOT) - #define DEFAULT_BUBT_DST "mmc" -+#elif defined(CONFIG_MVEBU_SATA_BOOT) -+#define DEFAULT_BUBT_DST "sata" - #else - #define DEFAULT_BUBT_DST "error" - #endif - #endif /* DEFAULT_BUBT_DST */ - --int do_bubt_cmd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -+static int do_bubt_cmd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) - { - struct bubt_dev *src, *dst; - size_t image_size; -@@ -1064,8 +1247,8 @@ U_BOOT_CMD( - "Burn a u-boot image to flash", - "[file-name] [destination [source]]\n" - "\t-file-name The image file name to burn. Default = " CONFIG_MVEBU_UBOOT_DFLT_NAME "\n" -- "\t-destination Flash to burn to [spi, nand, mmc]. Default = " DEFAULT_BUBT_DST "\n" -- "\t-source The source to load image from [tftp, usb, mmc]. Default = " DEFAULT_BUBT_SRC "\n" -+ "\t-destination Flash to burn to [spi, nand, mmc, sata]. Default = " DEFAULT_BUBT_DST "\n" -+ "\t-source The source to load image from [tftp, usb, mmc, sata]. Default = " DEFAULT_BUBT_SRC "\n" - "Examples:\n" - "\tbubt - Burn flash-image.bin from tftp to active boot device\n" - "\tbubt flash-image-new.bin nand - Burn flash-image-new.bin from tftp to NAND flash\n" -diff --git a/cmd/nand.c b/cmd/nand.c -index 9a723f5757..b41e54ec42 100644 ---- a/cmd/nand.c -+++ b/cmd/nand.c -@@ -567,9 +567,12 @@ static int do_nand(struct cmd_tbl *cmdtp, int flag, int argc, - - if (strcmp(cmd, "bad") == 0) { - printf("\nDevice %d bad blocks:\n", dev); -- for (off = 0; off < mtd->size; off += mtd->erasesize) -- if (nand_block_isbad(mtd, off)) -- printf(" %08llx\n", (unsigned long long)off); -+ for (off = 0; off < mtd->size; off += mtd->erasesize) { -+ ret = nand_block_isbad(mtd, off); -+ if (ret) -+ printf(" 0x%08llx%s\n", (unsigned long long)off, -+ ret == 2 ? "\t (bbt reserved)" : ""); -+ } - return 0; - } - -diff --git a/cmd/nvedit.c b/cmd/nvedit.c -index 7cbc3fd573..12eae0627b 100644 ---- a/cmd/nvedit.c -+++ b/cmd/nvedit.c -@@ -1025,6 +1025,7 @@ static int do_env_indirect(struct cmd_tbl *cmdtp, int flag, - char *from = argv[2]; - char *default_value = NULL; - int ret = 0; -+ char *val; - - if (argc < 3 || argc > 4) { - return CMD_RET_USAGE; -@@ -1034,18 +1035,14 @@ static int do_env_indirect(struct cmd_tbl *cmdtp, int flag, - default_value = argv[3]; - } - -- if (env_get(from) == NULL && default_value == NULL) { -+ val = env_get(from) ?: default_value; -+ if (!val) { - printf("## env indirect: Environment variable for (%s) does not exist.\n", from); - - return CMD_RET_FAILURE; - } - -- if (env_get(from) == NULL) { -- ret = env_set(to, default_value); -- } -- else { -- ret = env_set(to, env_get(from)); -- } -+ ret = env_set(to, val); - - if (ret == 0) { - return CMD_RET_SUCCESS; -diff --git a/cmd/pci_mps.c b/cmd/pci_mps.c -new file mode 100644 -index 0000000000..555a5fdd8e ---- /dev/null -+++ b/cmd/pci_mps.c -@@ -0,0 +1,164 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * (C) Copyright 2022 Microsoft Corporation -+ * Stephen Carlson -+ * -+ * PCI Express Maximum Packet Size (MPS) configuration -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define PCI_MPS_SAFE 0 -+#define PCI_MPS_PEER2PEER 1 -+ -+static int pci_mps_find_safe(struct udevice *bus, unsigned int *min_mps, -+ unsigned int *n) -+{ -+ struct udevice *dev; -+ int res = 0, addr; -+ unsigned int mpss; -+ u32 regval; -+ -+ if (!min_mps || !n) -+ return -EINVAL; -+ -+ for (device_find_first_child(bus, &dev); -+ dev; -+ device_find_next_child(&dev)) { -+ addr = dm_pci_find_capability(dev, PCI_CAP_ID_EXP); -+ if (addr <= 0) -+ continue; -+ -+ res = dm_pci_read_config32(dev, addr + PCI_EXP_DEVCAP, -+ ®val); -+ if (res != 0) -+ return res; -+ mpss = (unsigned int)(regval & PCI_EXP_DEVCAP_PAYLOAD); -+ *n += 1; -+ if (mpss < *min_mps) -+ *min_mps = mpss; -+ } -+ -+ return res; -+} -+ -+static int pci_mps_set_bus(struct udevice *bus, unsigned int target) -+{ -+ struct udevice *dev; -+ u32 mpss, target_mps = (u32)(target << 5); -+ u16 mps; -+ int res = 0, addr; -+ -+ for (device_find_first_child(bus, &dev); -+ dev && res == 0; -+ device_find_next_child(&dev)) { -+ addr = dm_pci_find_capability(dev, PCI_CAP_ID_EXP); -+ if (addr <= 0) -+ continue; -+ -+ res = dm_pci_read_config32(dev, addr + PCI_EXP_DEVCAP, -+ &mpss); -+ if (res != 0) -+ return res; -+ -+ /* Do not set device above its maximum MPSS */ -+ mpss = (mpss & PCI_EXP_DEVCAP_PAYLOAD) << 5; -+ if (target_mps < mpss) -+ mps = (u16)target_mps; -+ else -+ mps = (u16)mpss; -+ res = dm_pci_clrset_config16(dev, addr + PCI_EXP_DEVCTL, -+ PCI_EXP_DEVCTL_PAYLOAD, mps); -+ } -+ -+ return res; -+} -+ -+/* -+ * Sets the MPS of each PCI Express device to the specified policy. -+ */ -+static int pci_mps_set(int policy) -+{ -+ struct udevice *bus; -+ int i, res = 0; -+ /* 0 = 128B, min value for hotplug */ -+ unsigned int mps = 0; -+ -+ if (policy == PCI_MPS_SAFE) { -+ unsigned int min_mps = PCI_EXP_DEVCAP_PAYLOAD_4096B, n = 0; -+ -+ /* Find maximum MPS supported by all devices */ -+ for (i = 0; -+ uclass_get_device_by_seq(UCLASS_PCI, i, &bus) == 0 && -+ res == 0; -+ i++) -+ res = pci_mps_find_safe(bus, &min_mps, &n); -+ -+ /* If no devices were found, do not reconfigure */ -+ if (n == 0) -+ return res; -+ mps = min_mps; -+ } -+ -+ /* This message is checked by the sandbox test */ -+ printf("Setting MPS of all devices to %uB\n", 128U << mps); -+ for (i = 0; -+ uclass_get_device_by_seq(UCLASS_PCI, i, &bus) == 0 && res == 0; -+ i++) -+ res = pci_mps_set_bus(bus, mps); -+ -+ return res; -+} -+ -+/* -+ * PCI MPS tuning commands -+ * -+ * Syntax: -+ * pci_mps safe -+ * pci_mps peer2peer -+ */ -+static int do_pci_mps(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -+{ -+ char cmd = 'u'; -+ int ret = 0; -+ -+ if (argc > 1) -+ cmd = argv[1][0]; -+ -+ switch (cmd) { -+ case 's': /* safe */ -+ ret = pci_mps_set(PCI_MPS_SAFE); -+ break; -+ case 'p': /* peer2peer/hotplug */ -+ ret = pci_mps_set(PCI_MPS_PEER2PEER); -+ break; -+ default: /* usage, help */ -+ goto usage; -+ } -+ -+ return ret; -+usage: -+ return CMD_RET_USAGE; -+} -+ -+/***************************************************/ -+ -+#ifdef CONFIG_SYS_LONGHELP -+static char pci_mps_help_text[] = -+ "safe\n" -+ " - Set PCI Express MPS of all devices to safe values\n" -+ "pci_mps peer2peer\n" -+ " - Set PCI Express MPS of all devices to support hotplug and peer-to-peer DMA\n"; -+#endif -+ -+U_BOOT_CMD(pci_mps, 2, 0, do_pci_mps, -+ "configure PCI Express MPS", pci_mps_help_text); -diff --git a/cmd/read.c b/cmd/read.c -index fecfadaa1f..1218e7acfd 100644 ---- a/cmd/read.c -+++ b/cmd/read.c -@@ -13,70 +13,69 @@ - #include - #include - --int do_read(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -+static int -+do_rw(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) - { -- char *ep; - struct blk_desc *dev_desc = NULL; -- int dev; -- int part = 0; - struct disk_partition part_info; -- ulong offset = 0u; -- ulong limit = 0u; -+ ulong offset, limit; -+ uint blk, cnt, res; - void *addr; -- uint blk; -- uint cnt; -+ int part; - - if (argc != 6) { - cmd_usage(cmdtp); - return 1; - } - -- dev = (int)hextoul(argv[2], &ep); -- if (*ep) { -- if (*ep != ':') { -- printf("Invalid block device %s\n", argv[2]); -- return 1; -- } -- part = (int)hextoul(++ep, NULL); -- } -- -- dev_desc = blk_get_dev(argv[1], dev); -- if (dev_desc == NULL) { -- printf("Block device %s %d not supported\n", argv[1], dev); -+ part = part_get_info_by_dev_and_name_or_num(argv[1], argv[2], -+ &dev_desc, &part_info, 1); -+ if (part < 0) - return 1; -- } - - addr = map_sysmem(hextoul(argv[3], NULL), 0); - blk = hextoul(argv[4], NULL); - cnt = hextoul(argv[5], NULL); - -- if (part != 0) { -- if (part_get_info(dev_desc, part, &part_info)) { -- printf("Cannot find partition %d\n", part); -- return 1; -- } -+ if (part > 0) { - offset = part_info.start; - limit = part_info.size; - } else { - /* Largest address not available in struct blk_desc. */ -+ offset = 0; - limit = ~0; - } - - if (cnt + blk > limit) { -- printf("Read out of range\n"); -+ printf("%s out of range\n", cmdtp->name); - return 1; - } - -- if (blk_dread(dev_desc, offset + blk, cnt, addr) != cnt) { -- printf("Error reading blocks\n"); -+ if (IS_ENABLED(CONFIG_CMD_WRITE) && !strcmp(cmdtp->name, "write")) -+ res = blk_dwrite(dev_desc, offset + blk, cnt, addr); -+ else -+ res = blk_dread(dev_desc, offset + blk, cnt, addr); -+ -+ if (res != cnt) { -+ printf("%s error\n", cmdtp->name); - return 1; - } - - return 0; - } - -+#ifdef CONFIG_CMD_READ - U_BOOT_CMD( -- read, 6, 0, do_read, -+ read, 6, 0, do_rw, - "Load binary data from a partition", -- " addr blk# cnt" -+ " addr blk# cnt" -+); -+#endif -+ -+#ifdef CONFIG_CMD_WRITE -+U_BOOT_CMD( -+ write, 6, 0, do_rw, -+ "Store binary data to a partition", -+ " addr blk# cnt" - ); -+#endif -diff --git a/cmd/smccc.c b/cmd/smccc.c -index 0539a42587..fb80431ad1 100644 ---- a/cmd/smccc.c -+++ b/cmd/smccc.c -@@ -43,7 +43,7 @@ static int do_call(struct cmd_tbl *cmdtp, int flag, int argc, - else - arm_smccc_hvc(fid, a1, a2, a3, a4, a5, a6, a7, &res); - -- printf("Res: %ld %ld %ld %ld\n", res.a0, res.a1, res.a2, res.a3); -+ printf("Res: 0x%lx 0x%lx 0x%lx 0x%lx\n", res.a0, res.a1, res.a2, res.a3); - - return 0; - } -diff --git a/cmd/usb_mass_storage.c b/cmd/usb_mass_storage.c -index b7daaa6e8e..c3cc1975f9 100644 ---- a/cmd/usb_mass_storage.c -+++ b/cmd/usb_mass_storage.c -@@ -231,6 +231,16 @@ static int do_usb_mass_storage(struct cmd_tbl *cmdtp, int flag, - goto cleanup_register; - } - -+ if (IS_ENABLED(CONFIG_CMD_UMS_ABORT_KEYED)) { -+ /* Abort by pressing any key */ -+ if (tstc()) { -+ getchar(); -+ printf("\rOperation aborted.\n"); -+ rc = CMD_RET_SUCCESS; -+ goto cleanup_register; -+ } -+ } -+ - schedule(); - } - -diff --git a/common/Kconfig b/common/Kconfig -index 0afc01b759..7ff62552cb 100644 ---- a/common/Kconfig -+++ b/common/Kconfig -@@ -551,12 +551,11 @@ endmenu - menu "Init options" - - config BOARD_TYPES -- bool "Call get_board_type() to get and display the board type" -+ bool "Enable board_type entry in global data struct" - help -- If this option is enabled, checkboard() will call get_board_type() -- to get a string containing the board type and this will be -- displayed immediately after the model is shown on the console -- early in boot. -+ If this option is enabled, a field will be added to the global -+ data struct to store an unsigned long value for the type of -+ platform that we have determined we are on, at run-time. - - config DISPLAY_CPUINFO - bool "Display information about the CPU during start up" -@@ -631,10 +630,30 @@ config EVENT_DEBUG - events, such as event-type names. This adds to the code size of - U-Boot so can be turned off for production builds. - -+config SPL_EVENT -+ bool # General-purpose event-handling mechanism in SPL -+ depends on SPL -+ help -+ This adds a framework for general purpose sending and processing of -+ events, to allow interested parties to be alerted when something -+ happens. This is an attempt to stem the flow of weak functions, -+ hooks, functions in board_f.c and board_r.c and the Kconfig options -+ below. -+ -+ See doc/develop/event.rst for more information. -+ -+config SPL_EVENT_DYNAMIC -+ bool -+ depends on SPL_EVENT && EVENT_DYNAMIC -+ help -+ Enable this to support adding an event spy at runtime, without adding -+ it to the EVENT_SPY() linker list. This increases code size slightly -+ but provides more flexibility for boards and subsystems that need it. -+ - endif # EVENT - - config ARCH_EARLY_INIT_R -- bool "Call arch-specific init soon after relocation" -+ bool - help - With this option U-Boot will call arch_early_init_r() soon after - relocation. Driver model is running by this point, and the cache -@@ -1043,7 +1062,7 @@ choice - prompt "Bloblist location in TPL" - help - Select the location of the bloblist, via various means. Typically -- you should use the same value for SPL as for U-Boot, since they need -+ you should use the same value for TPL as for U-Boot, since they need - to look in the same place. But if BLOBLIST_ALLOC is used, then a - fresh bloblist will be created each time, since there is no shared - address (between phases) for the bloblist. -@@ -1066,6 +1085,35 @@ endchoice - - endif # TPL_BLOBLIST - -+if VPL_BLOBLIST -+ -+choice -+ prompt "Bloblist location in VPL" -+ help -+ Select the location of the bloblist, via various means. Typically -+ you should use the same value for VPL as for U-Boot, since they need -+ to look in the same place. But if BLOBLIST_ALLOC is used, then a -+ fresh bloblist will be created each time, since there is no shared -+ address (between phases) for the bloblist. -+ -+config VPL_BLOBLIST_FIXED -+ bool "Place bloblist at a fixed address in memory" -+ help -+ Select this to used a fixed memory address for the bloblist. If the -+ bloblist exists at this address from a previous phase, it used as is. -+ If not it is created at this address in VPL. -+ -+config VPL_BLOBLIST_ALLOC -+ bool "Allocate bloblist" -+ help -+ Allocate the bloblist using malloc(). This avoids the need to -+ specify a fixed address on systems where this is unknown or can -+ change at runtime. -+ -+endchoice -+ -+endif # VPL_BLOBLIST -+ - endmenu - - source "common/spl/Kconfig" -diff --git a/common/board_r.c b/common/board_r.c -index e45003353f..6b4180b3ec 100644 ---- a/common/board_r.c -+++ b/common/board_r.c -@@ -569,6 +569,13 @@ static int dm_announce(void) - printf("Warning: Unexpected devicetree source (not from a prior stage)"); - printf("Warning: U-Boot may not function properly\n"); - } -+ if (IS_ENABLED(CONFIG_OF_TAG_MIGRATE) && -+ (gd->flags & GD_FLG_OF_TAG_MIGRATE)) -+ /* -+ * U-Boot will silently fail to work after 2023.07 if -+ * there are old tags present -+ */ -+ printf("Warning: Device tree includes old 'u-boot,dm-' tags: please fix by 2023.07!\n"); - } - - return 0; -diff --git a/common/cli.c b/common/cli.c -index 9451e6a142..3916a7b10a 100644 ---- a/common/cli.c -+++ b/common/cli.c -@@ -8,6 +8,8 @@ - * JinHua Luo, GuangDong Linux Center, - */ - -+#define pr_fmt(fmt) "cli: %s: " fmt, __func__ -+ - #include - #include - #include -@@ -20,6 +22,7 @@ - #include - #include - #include -+#include - - #ifdef CONFIG_CMDLINE - /* -@@ -129,16 +132,26 @@ int run_command_list(const char *cmd, int len, int flag) - int run_commandf(const char *fmt, ...) - { - va_list args; -- char cmd[128]; -- int i, ret; -+ int nbytes; - - va_start(args, fmt); -- i = vsnprintf(cmd, sizeof(cmd), fmt, args); -+ /* -+ * Limit the console_buffer space being used to CONFIG_SYS_CBSIZE, -+ * because its last byte is used to fit the replacement of \0 by \n\0 -+ * in underlying hush parser -+ */ -+ nbytes = vsnprintf(console_buffer, CONFIG_SYS_CBSIZE, fmt, args); - va_end(args); - -- ret = run_command(cmd, 0); -- -- return ret; -+ if (nbytes < 0) { -+ pr_debug("I/O internal error occurred.\n"); -+ return -EIO; -+ } else if (nbytes >= CONFIG_SYS_CBSIZE) { -+ pr_debug("'fmt' size:%d exceeds the limit(%d)\n", -+ nbytes, CONFIG_SYS_CBSIZE); -+ return -ENOSPC; -+ } -+ return run_command(console_buffer, 0); - } - - /****************************************************************************/ -diff --git a/common/console.c b/common/console.c -index e4301a4932..71ad8efd6f 100644 ---- a/common/console.c -+++ b/common/console.c -@@ -842,7 +842,7 @@ int console_record_readline(char *str, int maxlen) - return -ENOSPC; - - return membuff_readline((struct membuff *)&gd->console_out, str, -- maxlen, ' '); -+ maxlen, '\0'); - } - - int console_record_avail(void) -diff --git a/common/dlmalloc.c b/common/dlmalloc.c -index 41c7230424..0f9b7262d5 100644 ---- a/common/dlmalloc.c -+++ b/common/dlmalloc.c -@@ -80,7 +80,7 @@ GmListElement* makeGmListElement (void* bas) - return this; - } - --void gcleanup () -+void gcleanup (void) - { - BOOL rval; - assert ( (head == NULL) || (head->base == (void*)gAddressBase)); -@@ -2340,7 +2340,7 @@ size_t malloc_usable_size(mem) Void_t* mem; - /* Utility to update current_mallinfo for malloc_stats and mallinfo() */ - - #ifdef DEBUG --static void malloc_update_mallinfo() -+static void malloc_update_mallinfo(void) - { - int i; - mbinptr b; -@@ -2397,7 +2397,7 @@ static void malloc_update_mallinfo() - */ - - #ifdef DEBUG --void malloc_stats() -+void malloc_stats(void) - { - malloc_update_mallinfo(); - printf("max system bytes = %10u\n", -@@ -2418,7 +2418,7 @@ void malloc_stats() - */ - - #ifdef DEBUG --struct mallinfo mALLINFo() -+struct mallinfo mALLINFo(void) - { - malloc_update_mallinfo(); - return current_mallinfo; -diff --git a/common/main.c b/common/main.c -index 682f3359ea..7c70de2e59 100644 ---- a/common/main.c -+++ b/common/main.c -@@ -13,6 +13,7 @@ - #include - #include - #include -+#include - #include - #include - #include -diff --git a/common/spl/Kconfig b/common/spl/Kconfig -index 3c2af453ab..2c042ad306 100644 ---- a/common/spl/Kconfig -+++ b/common/spl/Kconfig -@@ -816,8 +816,17 @@ config SPL_MMC - this option to build the drivers in drivers/mmc as part of an SPL - build. - -+config SYS_MMCSD_FS_BOOT -+ bool "MMC FS Boot mode" -+ depends on SPL_MMC -+ default y if !ARCH_MVEBU -+ help -+ Enable MMC FS Boot mode. Partition is selected by option -+ SYS_MMCSD_FS_BOOT_PARTITION. -+ - config SYS_MMCSD_FS_BOOT_PARTITION - int "MMC Boot Partition" -+ depends on SYS_MMCSD_FS_BOOT - default 1 - help - Partition on the MMC to load U-Boot from when the MMC is being -diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c -index c51482b3b6..ca2e337b1e 100644 ---- a/common/spl/spl_fit.c -+++ b/common/spl/spl_fit.c -@@ -570,6 +570,12 @@ static void warn_deprecated(const char *msg) - printf("\tSee doc/uImage.FIT/source_file_format.txt\n"); - } - -+__weak int fpga_load(int devnum, const void *buf, size_t bsize, -+ bitstream_type bstype, int flags) -+{ -+ return 0; -+} -+ - static int spl_fit_upload_fpga(struct spl_fit_info *ctx, int node, - struct spl_image_info *fpga_image) - { -diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c -index e4135b2048..bd5e6adf1e 100644 ---- a/common/spl/spl_mmc.c -+++ b/common/spl/spl_mmc.c -@@ -272,7 +272,7 @@ int spl_start_uboot(void) - } - #endif - --#ifdef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION -+#ifdef CONFIG_SYS_MMCSD_FS_BOOT - static int spl_mmc_do_fs_boot(struct spl_image_info *spl_image, - struct spl_boot_device *bootdev, - struct mmc *mmc, -@@ -341,14 +341,6 @@ static int spl_mmc_do_fs_boot(struct spl_image_info *spl_image, - - return err; - } --#else --static int spl_mmc_do_fs_boot(struct spl_image_info *spl_image, -- struct spl_boot_device *bootdev, -- struct mmc *mmc, -- const char *filename) --{ -- return -ENOSYS; --} - #endif - - u32 __weak spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device) -@@ -481,6 +473,7 @@ int spl_mmc_load(struct spl_image_info *spl_image, - return err; - #endif - /* If RAW mode fails, try FS mode. */ -+#ifdef CONFIG_SYS_MMCSD_FS_BOOT - case MMCSD_MODE_FS: - debug("spl: mmc boot mode: fs\n"); - -@@ -489,6 +482,7 @@ int spl_mmc_load(struct spl_image_info *spl_image, - return err; - - break; -+#endif - #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT - default: - puts("spl: mmc: wrong boot mode\n"); -diff --git a/common/splash.c b/common/splash.c -index 245ff680eb..4bc54b1bf9 100644 ---- a/common/splash.c -+++ b/common/splash.c -@@ -127,9 +127,11 @@ void splash_get_pos(int *x, int *y) - #include - #include - #include -+#include - - void splash_display_banner(void) - { -+ struct video_fontdata __maybe_unused *fontdata = fonts; - struct udevice *dev; - char buf[DISPLAY_OPTIONS_BANNER_LENGTH]; - int col, row, ret; -@@ -138,9 +140,9 @@ void splash_display_banner(void) - if (ret) - return; - --#ifdef CONFIG_VIDEO_LOGO -- col = BMP_LOGO_WIDTH / VIDEO_FONT_WIDTH + 1; -- row = BMP_LOGO_HEIGHT / VIDEO_FONT_HEIGHT + 1; -+#if IS_ENABLED(CONFIG_VIDEO_LOGO) -+ col = BMP_LOGO_WIDTH / fontdata->width + 1; -+ row = BMP_LOGO_HEIGHT / fontdata->height + 1; - #else - col = 0; - row = 0; -diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig -index 7287ca6b24..8f3f54cb4f 100644 ---- a/configs/MPC837XERDB_defconfig -+++ b/configs/MPC837XERDB_defconfig -@@ -108,37 +108,6 @@ CONFIG_LBLAW2=y - CONFIG_LBLAW2_BASE=0xF0000000 - CONFIG_LBLAW2_NAME="VSC7385" - CONFIG_LBLAW2_LENGTH_128_KBYTES=y --CONFIG_ELBC_BR0_OR0=y --CONFIG_BR0_OR0_NAME="FLASH" --CONFIG_BR0_OR0_BASE=0xFE000000 --CONFIG_BR0_PORTSIZE_16BIT=y --CONFIG_OR0_AM_8_MBYTES=y --CONFIG_OR0_SCY_9=y --CONFIG_OR0_XACS_EXTENDED=y --CONFIG_OR0_EHTR_1_CYCLE=y --CONFIG_OR0_EAD_EXTRA=y --CONFIG_ELBC_BR1_OR1=y --CONFIG_BR1_OR1_NAME="NAND" --CONFIG_BR1_OR1_BASE=0xE0600000 --CONFIG_BR1_ERRORCHECKING_BOTH=y --CONFIG_BR1_MACHINE_FCM=y --CONFIG_OR1_SCY_1=y --CONFIG_OR1_CSCT_8_CYCLE=y --CONFIG_OR1_CST_ONE_CLOCK=y --CONFIG_OR1_CHT_TWO_CLOCK=y --CONFIG_OR1_TRLX_RELAXED=y --CONFIG_OR1_EHTR_8_CYCLE=y --CONFIG_ELBC_BR2_OR2=y --CONFIG_BR2_OR2_NAME="VSC7385" --CONFIG_BR2_OR2_BASE=0xF0000000 --CONFIG_OR2_AM_128_KBYTES=y --CONFIG_OR2_SCY_15=y --CONFIG_OR2_CSNT_EARLIER=y --CONFIG_OR2_XACS_EXTENDED=y --CONFIG_OR2_SETA_EXTERNAL=y --CONFIG_OR2_TRLX_RELAXED=y --CONFIG_OR2_EHTR_8_CYCLE=y --CONFIG_OR2_EAD_EXTRA=y - CONFIG_HID0_FINAL_EMCP=y - CONFIG_HID0_FINAL_ICE=y - CONFIG_HID2_HBE=y -diff --git a/configs/am62ax_evm_a53_defconfig b/configs/am62ax_evm_a53_defconfig -index 8b48f5e8e6..46a95a692e 100644 ---- a/configs/am62ax_evm_a53_defconfig -+++ b/configs/am62ax_evm_a53_defconfig -@@ -1,5 +1,6 @@ - CONFIG_ARM=y - CONFIG_ARCH_K3=y -+CONFIG_TI_SECURE_DEVICE=y - CONFIG_SYS_MALLOC_F_LEN=0x8000 - CONFIG_SPL_LIBCOMMON_SUPPORT=y - CONFIG_SPL_LIBGENERIC_SUPPORT=y -diff --git a/configs/am62ax_evm_r5_defconfig b/configs/am62ax_evm_r5_defconfig -index fac48fbd12..e5bee14446 100644 ---- a/configs/am62ax_evm_r5_defconfig -+++ b/configs/am62ax_evm_r5_defconfig -@@ -1,5 +1,6 @@ - CONFIG_ARM=y - CONFIG_ARCH_K3=y -+CONFIG_TI_SECURE_DEVICE=y - CONFIG_SYS_MALLOC_F_LEN=0x9000 - CONFIG_SPL_LIBCOMMON_SUPPORT=y - CONFIG_SPL_LIBGENERIC_SUPPORT=y -@@ -52,6 +53,7 @@ CONFIG_SPL_RAM_SUPPORT=y - CONFIG_SPL_RAM_DEVICE=y - CONFIG_SPL_REMOTEPROC=y - CONFIG_SPL_THERMAL=y -+CONFIG_SPL_YMODEM_SUPPORT=y - CONFIG_HUSH_PARSER=y - CONFIG_CMD_ASKENV=y - CONFIG_CMD_DFU=y -diff --git a/configs/apple_m1_defconfig b/configs/apple_m1_defconfig -index b4ecf73cbc..755560971e 100644 ---- a/configs/apple_m1_defconfig -+++ b/configs/apple_m1_defconfig -@@ -21,3 +21,4 @@ CONFIG_SYS_WHITE_ON_BLACK=y - CONFIG_NO_FB_CLEAR=y - CONFIG_VIDEO_SIMPLE=y - # CONFIG_GENERATE_SMBIOS_TABLE is not set -+CONFIG_LMB_MAX_REGIONS=64 -diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig -index 401506e219..f5995f2200 100644 ---- a/configs/chromebook_coral_defconfig -+++ b/configs/chromebook_coral_defconfig -@@ -87,6 +87,7 @@ CONFIG_TFTP_TSIZE=y - CONFIG_USE_ROOTPATH=y - CONFIG_REGMAP=y - CONFIG_SYSCON=y -+CONFIG_TPL_SIMPLE_BUS=y - CONFIG_SPL_OF_TRANSLATE=y - CONFIG_LBA48=y - CONFIG_SYS_64BIT_LBA=y -@@ -96,6 +97,8 @@ CONFIG_SYS_I2C_DW=y - CONFIG_MISC=y - CONFIG_CROS_EC=y - CONFIG_CROS_EC_LPC=y -+CONFIG_SPL_P2SB=y -+CONFIG_TPL_P2SB=y - CONFIG_SPI_FLASH_WINBOND=y - # CONFIG_X86_PCH7 is not set - # CONFIG_X86_PCH9 is not set -diff --git a/configs/clearfog_sata_defconfig b/configs/clearfog_sata_defconfig -new file mode 100644 -index 0000000000..e9b36150ea ---- /dev/null -+++ b/configs/clearfog_sata_defconfig -@@ -0,0 +1,83 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_CPU_INIT=y -+CONFIG_SYS_THUMB_BUILD=y -+CONFIG_ARCH_MVEBU=y -+CONFIG_TEXT_BASE=0x00800000 -+CONFIG_SPL_LIBCOMMON_SUPPORT=y -+CONFIG_SPL_LIBGENERIC_SUPPORT=y -+CONFIG_NR_DRAM_BANKS=2 -+CONFIG_TARGET_CLEARFOG=y -+CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA=y -+CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog" -+CONFIG_SPL_TEXT_BASE=0x40000030 -+CONFIG_SPL_SERIAL=y -+CONFIG_SPL=y -+CONFIG_DEBUG_UART_BASE=0xf1012000 -+CONFIG_DEBUG_UART_CLOCK=250000000 -+CONFIG_SYS_LOAD_ADDR=0x800000 -+CONFIG_DEBUG_UART=y -+CONFIG_AHCI=y -+CONFIG_DISTRO_DEFAULTS=y -+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 -+CONFIG_BOOTDELAY=3 -+CONFIG_USE_PREBOOT=y -+CONFIG_SYS_CONSOLE_INFO_QUIET=y -+# CONFIG_DISPLAY_BOARDINFO is not set -+CONFIG_DISPLAY_BOARDINFO_LATE=y -+CONFIG_SPL_MAX_SIZE=0x22fd0 -+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -+CONFIG_SPL_BSS_START_ADDR=0x40023000 -+CONFIG_SPL_BSS_MAX_SIZE=0x4000 -+CONFIG_SPL_SYS_MALLOC_SIMPLE=y -+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -+CONFIG_SPL_STACK=0x4002c000 -+CONFIG_SPL_I2C=y -+CONFIG_SYS_MAXARGS=32 -+CONFIG_CMD_TLV_EEPROM=y -+CONFIG_SPL_CMD_TLV_EEPROM=y -+# CONFIG_CMD_FLASH is not set -+CONFIG_CMD_GPIO=y -+CONFIG_CMD_I2C=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_PCI=y -+CONFIG_CMD_SPI=y -+CONFIG_CMD_USB=y -+CONFIG_CMD_TFTPPUT=y -+CONFIG_CMD_CACHE=y -+CONFIG_CMD_TIME=y -+CONFIG_CMD_MVEBU_BUBT=y -+CONFIG_ENV_OVERWRITE=y -+CONFIG_ENV_MIN_ENTRIES=128 -+CONFIG_ARP_TIMEOUT=200 -+CONFIG_NET_RETRY_COUNT=50 -+CONFIG_NET_RANDOM_ETHADDR=y -+CONFIG_SPL_OF_TRANSLATE=y -+CONFIG_AHCI_MVEBU=y -+CONFIG_DM_PCA953X=y -+CONFIG_DM_I2C=y -+CONFIG_SYS_I2C_MVTWSI=y -+CONFIG_I2C_EEPROM=y -+CONFIG_SPL_I2C_EEPROM=y -+CONFIG_SUPPORT_EMMC_BOOT=y -+CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_SDMA=y -+CONFIG_MMC_SDHCI_MV=y -+CONFIG_MTD=y -+CONFIG_SF_DEFAULT_BUS=1 -+CONFIG_SPI_FLASH_WINBOND=y -+CONFIG_SPI_FLASH_MTD=y -+CONFIG_PHY_MARVELL=y -+CONFIG_PHY_GIGE=y -+CONFIG_MVNETA=y -+CONFIG_MII=y -+CONFIG_MVMDIO=y -+CONFIG_PCI=y -+CONFIG_PCI_MVEBU=y -+CONFIG_SCSI=y -+CONFIG_SPL_DEBUG_UART_BASE=0xd0012000 -+CONFIG_DEBUG_UART_SHIFT=2 -+CONFIG_SYS_NS16550=y -+CONFIG_KIRKWOOD_SPI=y -+CONFIG_USB=y -+CONFIG_USB_XHCI_HCD=y -diff --git a/configs/clearfog_spi_defconfig b/configs/clearfog_spi_defconfig -new file mode 100644 -index 0000000000..9dcf16fe92 ---- /dev/null -+++ b/configs/clearfog_spi_defconfig -@@ -0,0 +1,83 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_CPU_INIT=y -+CONFIG_SYS_THUMB_BUILD=y -+CONFIG_ARCH_MVEBU=y -+CONFIG_TEXT_BASE=0x00800000 -+CONFIG_SPL_LIBCOMMON_SUPPORT=y -+CONFIG_SPL_LIBGENERIC_SUPPORT=y -+CONFIG_NR_DRAM_BANKS=2 -+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 -+CONFIG_TARGET_CLEARFOG=y -+CONFIG_ENV_SECT_SIZE=0x10000 -+CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog" -+CONFIG_SPL_TEXT_BASE=0x40000030 -+CONFIG_SPL_SERIAL=y -+CONFIG_SPL_STACK=0x4002c000 -+CONFIG_SPL=y -+CONFIG_DEBUG_UART_BASE=0xf1012000 -+CONFIG_DEBUG_UART_CLOCK=250000000 -+CONFIG_SYS_LOAD_ADDR=0x800000 -+CONFIG_DEBUG_UART=y -+CONFIG_AHCI=y -+CONFIG_DISTRO_DEFAULTS=y -+CONFIG_BOOTDELAY=3 -+CONFIG_USE_PREBOOT=y -+CONFIG_SYS_CONSOLE_INFO_QUIET=y -+# CONFIG_DISPLAY_BOARDINFO is not set -+CONFIG_DISPLAY_BOARDINFO_LATE=y -+CONFIG_SPL_MAX_SIZE=0x22fd0 -+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -+CONFIG_SPL_BSS_START_ADDR=0x40023000 -+CONFIG_SPL_BSS_MAX_SIZE=0x4000 -+CONFIG_SPL_SYS_MALLOC_SIMPLE=y -+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -+CONFIG_SPL_I2C=y -+CONFIG_SYS_MAXARGS=32 -+CONFIG_CMD_TLV_EEPROM=y -+CONFIG_SPL_CMD_TLV_EEPROM=y -+# CONFIG_CMD_FLASH is not set -+CONFIG_CMD_GPIO=y -+CONFIG_CMD_I2C=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_PCI=y -+CONFIG_CMD_SPI=y -+CONFIG_CMD_USB=y -+CONFIG_CMD_TFTPPUT=y -+CONFIG_CMD_CACHE=y -+CONFIG_CMD_TIME=y -+CONFIG_CMD_MVEBU_BUBT=y -+CONFIG_ENV_OVERWRITE=y -+CONFIG_ENV_MIN_ENTRIES=128 -+CONFIG_ARP_TIMEOUT=200 -+CONFIG_NET_RETRY_COUNT=50 -+CONFIG_NET_RANDOM_ETHADDR=y -+CONFIG_SPL_OF_TRANSLATE=y -+CONFIG_AHCI_MVEBU=y -+CONFIG_DM_PCA953X=y -+CONFIG_DM_I2C=y -+CONFIG_SYS_I2C_MVTWSI=y -+CONFIG_I2C_EEPROM=y -+CONFIG_SPL_I2C_EEPROM=y -+CONFIG_SUPPORT_EMMC_BOOT=y -+CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_SDMA=y -+CONFIG_MMC_SDHCI_MV=y -+CONFIG_MTD=y -+CONFIG_SF_DEFAULT_BUS=1 -+CONFIG_SPI_FLASH_WINBOND=y -+CONFIG_SPI_FLASH_MTD=y -+CONFIG_PHY_MARVELL=y -+CONFIG_PHY_GIGE=y -+CONFIG_MVNETA=y -+CONFIG_MII=y -+CONFIG_MVMDIO=y -+CONFIG_PCI=y -+CONFIG_PCI_MVEBU=y -+CONFIG_SCSI=y -+CONFIG_SPL_DEBUG_UART_BASE=0xd0012000 -+CONFIG_DEBUG_UART_SHIFT=2 -+CONFIG_SYS_NS16550=y -+CONFIG_KIRKWOOD_SPI=y -+CONFIG_USB=y -+CONFIG_USB_XHCI_HCD=y -diff --git a/configs/colibri-imx8x_defconfig b/configs/colibri-imx8x_defconfig -index 60fac23086..87160215a5 100644 ---- a/configs/colibri-imx8x_defconfig -+++ b/configs/colibri-imx8x_defconfig -@@ -10,14 +10,20 @@ CONFIG_ENV_SIZE=0x2000 - CONFIG_ENV_OFFSET=0xFFFFDE00 - CONFIG_DM_GPIO=y - CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-colibri" -+CONFIG_BOOTAUX_RESERVED_MEM_BASE=0x88000000 -+CONFIG_BOOTAUX_RESERVED_MEM_SIZE=0x08000000 - CONFIG_TARGET_COLIBRI_IMX8X=y --CONFIG_SYS_LOAD_ADDR=0x80280000 -+CONFIG_SYS_PROMPT="Colibri iMX8X # " -+CONFIG_SYS_LOAD_ADDR=0x95c00000 - CONFIG_SYS_MEMTEST_START=0x88000000 - CONFIG_SYS_MEMTEST_END=0x89000000 - CONFIG_REMAKE_ELF=y - CONFIG_FIT=y --CONFIG_FIT_EXTERNAL_OFFSET=0x3000 - CONFIG_FIT_VERBOSE=y -+CONFIG_OF_SYSTEM_SETUP=y -+CONFIG_BOOTDELAY=1 -+CONFIG_USE_PREBOOT=y -+CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile ${soc}-colibri-${fdt_board}.dtb" - CONFIG_DISTRO_DEFAULTS=y - CONFIG_LOG=y - # CONFIG_DISPLAY_BOARDINFO is not set -@@ -32,6 +38,7 @@ CONFIG_CMD_ASKENV=y - CONFIG_CMD_MEMTEST=y - CONFIG_CMD_CLK=y - CONFIG_CMD_DM=y -+CONFIG_CMD_FUSE=y - CONFIG_CMD_GPIO=y - CONFIG_CMD_I2C=y - CONFIG_CMD_MMC=y -@@ -53,6 +60,8 @@ CONFIG_USE_NETMASK=y - CONFIG_NETMASK="255.255.255.0" - CONFIG_USE_SERVERIP=y - CONFIG_SERVERIP="192.168.10.1" -+CONFIG_BOOTCOUNT_LIMIT=y -+CONFIG_BOOTCOUNT_ENV=y - CONFIG_CLK_IMX8=y - CONFIG_CPU=y - CONFIG_FXL6408_GPIO=y -diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig -index d00144eccc..3a67ea3850 100644 ---- a/configs/colibri_imx7_defconfig -+++ b/configs/colibri_imx7_defconfig -@@ -77,6 +77,7 @@ CONFIG_FSL_USDHC=y - CONFIG_MTD=y - CONFIG_DM_MTD=y - CONFIG_MTD_RAW_NAND=y -+CONFIG_SYS_NAND_USE_FLASH_BBT=y - CONFIG_NAND_MXS_DT=y - CONFIG_SYS_NAND_ONFI_DETECTION=y - CONFIG_MTD_UBI_FASTMAP=y -diff --git a/configs/db-88f6820-amc_nand_defconfig b/configs/db-88f6820-amc_nand_defconfig -new file mode 100644 -index 0000000000..e784c34563 ---- /dev/null -+++ b/configs/db-88f6820-amc_nand_defconfig -@@ -0,0 +1,92 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_CPU_INIT=y -+CONFIG_ARCH_MVEBU=y -+CONFIG_TEXT_BASE=0x00800000 -+CONFIG_SPL_LIBCOMMON_SUPPORT=y -+CONFIG_SPL_LIBGENERIC_SUPPORT=y -+CONFIG_NR_DRAM_BANKS=2 -+CONFIG_TARGET_DB_88F6820_AMC=y -+CONFIG_MVEBU_SPL_BOOT_DEVICE_NAND=y -+CONFIG_MVEBU_SPL_NAND_BADBLK_LOCATION=0x00 -+CONFIG_ENV_SIZE=0x10000 -+CONFIG_ENV_OFFSET=0x100000 -+CONFIG_ENV_SECT_SIZE=0x40000 -+CONFIG_DEFAULT_DEVICE_TREE="armada-385-db-88f6820-amc" -+CONFIG_SPL_TEXT_BASE=0x40000030 -+CONFIG_SPL_SERIAL=y -+CONFIG_SPL=y -+CONFIG_DEBUG_UART_BASE=0xf1012000 -+CONFIG_DEBUG_UART_CLOCK=200000000 -+CONFIG_SYS_LOAD_ADDR=0x800000 -+CONFIG_DEBUG_UART=y -+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 -+CONFIG_FIT=y -+CONFIG_FIT_VERBOSE=y -+CONFIG_BOOTDELAY=3 -+CONFIG_USE_PREBOOT=y -+CONFIG_SYS_CONSOLE_INFO_QUIET=y -+# CONFIG_DISPLAY_BOARDINFO is not set -+CONFIG_DISPLAY_BOARDINFO_LATE=y -+CONFIG_SPL_MAX_SIZE=0x22fd0 -+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -+CONFIG_SPL_BSS_START_ADDR=0x40023000 -+CONFIG_SPL_BSS_MAX_SIZE=0x4000 -+CONFIG_SPL_SYS_MALLOC_SIMPLE=y -+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -+CONFIG_SPL_STACK=0x4002c000 -+CONFIG_SPL_I2C=y -+CONFIG_SYS_MAXARGS=96 -+# CONFIG_CMD_FLASH is not set -+CONFIG_CMD_I2C=y -+CONFIG_CMD_PCI=y -+CONFIG_CMD_SPI=y -+CONFIG_CMD_USB=y -+# CONFIG_CMD_SETEXPR is not set -+CONFIG_CMD_DHCP=y -+CONFIG_CMD_TFTPPUT=y -+CONFIG_CMD_MII=y -+CONFIG_CMD_PING=y -+CONFIG_CMD_CACHE=y -+CONFIG_CMD_TIME=y -+CONFIG_CMD_EXT2=y -+CONFIG_CMD_EXT4=y -+CONFIG_CMD_FAT=y -+CONFIG_CMD_FS_GENERIC=y -+CONFIG_EFI_PARTITION=y -+CONFIG_ENV_OVERWRITE=y -+CONFIG_ENV_IS_IN_SPI_FLASH=y -+CONFIG_ENV_SPI_MAX_HZ=50000000 -+CONFIG_SYS_RELOC_GD_ENV_ADDR=y -+CONFIG_ARP_TIMEOUT=200 -+CONFIG_NET_RETRY_COUNT=50 -+CONFIG_SPL_OF_TRANSLATE=y -+# CONFIG_SPL_BLK is not set -+# CONFIG_BLOCK_CACHE is not set -+CONFIG_DM_I2C=y -+CONFIG_SYS_I2C_MVTWSI=y -+# CONFIG_MMC is not set -+CONFIG_MTD=y -+CONFIG_SYS_NAND_USE_FLASH_BBT=y -+CONFIG_NAND_PXA3XX=y -+CONFIG_SYS_NAND_BLOCK_SIZE=0x40000 -+CONFIG_SYS_NAND_ONFI_DETECTION=y -+CONFIG_SYS_NAND_PAGE_SIZE=0x1000 -+CONFIG_SF_DEFAULT_BUS=1 -+CONFIG_SPI_FLASH_BAR=y -+CONFIG_SPI_FLASH_MACRONIX=y -+CONFIG_SPI_FLASH_STMICRO=y -+CONFIG_PHY_MARVELL=y -+CONFIG_PHY_GIGE=y -+CONFIG_MVNETA=y -+CONFIG_MII=y -+CONFIG_MVMDIO=y -+CONFIG_PCI=y -+CONFIG_PCI_MVEBU=y -+CONFIG_SPL_DEBUG_UART_BASE=0xd0012000 -+CONFIG_DEBUG_UART_SHIFT=2 -+CONFIG_SYS_NS16550=y -+CONFIG_KIRKWOOD_SPI=y -+CONFIG_USB=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_STORAGE=y -diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig -index 12e73d9ab0..3487cc2f5c 100644 ---- a/configs/dh_imx6_defconfig -+++ b/configs/dh_imx6_defconfig -@@ -98,6 +98,7 @@ CONFIG_PINCTRL_IMX6=y - CONFIG_DM_REGULATOR=y - CONFIG_DM_REGULATOR_FIXED=y - CONFIG_DM_SCSI=y -+CONFIG_DM_SERIAL=y - CONFIG_MXC_UART=y - CONFIG_SPI=y - CONFIG_DM_SPI=y -diff --git a/configs/efi-x86_app32_defconfig b/configs/efi-x86_app32_defconfig -index 905f375a3e..50975dbfaa 100644 ---- a/configs/efi-x86_app32_defconfig -+++ b/configs/efi-x86_app32_defconfig -@@ -19,7 +19,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y - CONFIG_LAST_STAGE_INIT=y - CONFIG_HUSH_PARSER=y - CONFIG_SYS_PBSIZE=532 --# CONFIG_CMD_BOOTM is not set -+CONFIG_CMD_BOOTZ=y - CONFIG_CMD_PART=y - # CONFIG_CMD_NET is not set - CONFIG_CMD_TIME=y -diff --git a/configs/efi-x86_app64_defconfig b/configs/efi-x86_app64_defconfig -index 605d49ff8c..0fc358ddcd 100644 ---- a/configs/efi-x86_app64_defconfig -+++ b/configs/efi-x86_app64_defconfig -@@ -4,6 +4,7 @@ CONFIG_ENV_SIZE=0x1000 - CONFIG_DEFAULT_DEVICE_TREE="efi-x86_app" - CONFIG_DEBUG_UART_BASE=0 - CONFIG_DEBUG_UART_CLOCK=0 -+CONFIG_X86_RUN_64BIT=y - CONFIG_VENDOR_EFI=y - CONFIG_TARGET_EFI_APP64=y - CONFIG_DEBUG_UART=y -@@ -19,9 +20,10 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y - CONFIG_LAST_STAGE_INIT=y - CONFIG_HUSH_PARSER=y - CONFIG_SYS_PBSIZE=532 --# CONFIG_CMD_BOOTM is not set -+CONFIG_CMD_BOOTZ=y - CONFIG_CMD_PART=y - # CONFIG_CMD_NET is not set -+CONFIG_CMD_CACHE=y - CONFIG_CMD_TIME=y - CONFIG_CMD_EXT2=y - CONFIG_CMD_EXT4=y -@@ -39,7 +41,9 @@ CONFIG_BOOTFILE="bzImage" - CONFIG_USE_ROOTPATH=y - CONFIG_REGMAP=y - CONFIG_SYSCON=y -+CONFIG_CONSOLE_SCROLL_LINES=5 - # CONFIG_REGEX is not set -+CONFIG_CMD_DHRYSTONE=y - # CONFIG_GZIP is not set - CONFIG_EFI=y - CONFIG_EFI_APP_64BIT=y -diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig -index 597b7715d3..32e022fb8a 100644 ---- a/configs/evb-ast2600_defconfig -+++ b/configs/evb-ast2600_defconfig -@@ -13,6 +13,8 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y - CONFIG_NR_DRAM_BANKS=1 - CONFIG_SPL_LDSCRIPT="arch/arm/mach-aspeed/ast2600/u-boot-spl.lds" - CONFIG_ENV_SIZE=0x10000 -+CONFIG_ENV_OFFSET=0xe0000 -+CONFIG_ENV_SECT_SIZE=0x10000 - CONFIG_DM_GPIO=y - CONFIG_DEFAULT_DEVICE_TREE="ast2600-evb" - CONFIG_DM_RESET=y -@@ -74,6 +76,8 @@ CONFIG_EFI_PARTITION=y - # CONFIG_SPL_EFI_PARTITION is not set - CONFIG_SPL_OF_CONTROL=y - CONFIG_ENV_OVERWRITE=y -+CONFIG_ENV_IS_IN_SPI_FLASH=y -+CONFIG_ENV_SECT_SIZE_AUTO=y - CONFIG_SYS_RELOC_GD_ENV_ADDR=y - CONFIG_NET_RANDOM_ETHADDR=y - CONFIG_SPL_DM=y -diff --git a/configs/gazerbeam_defconfig b/configs/gazerbeam_defconfig -index 63051af411..63488da30a 100644 ---- a/configs/gazerbeam_defconfig -+++ b/configs/gazerbeam_defconfig -@@ -67,31 +67,6 @@ CONFIG_LBLAW2=y - CONFIG_LBLAW2_BASE=0xE0700000 - CONFIG_LBLAW2_NAME="FPGA1" - CONFIG_LBLAW2_LENGTH_1_MBYTES=y --CONFIG_ELBC_BR0_OR0=y --CONFIG_BR0_OR0_NAME="FLASH" --CONFIG_BR0_OR0_BASE=0xFE000000 --CONFIG_BR0_PORTSIZE_16BIT=y --CONFIG_OR0_AM_8_MBYTES=y --CONFIG_OR0_SCY_15=y --CONFIG_OR0_CSNT_EARLIER=y --CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y --CONFIG_OR0_XACS_EXTENDED=y --CONFIG_OR0_TRLX_RELAXED=y --CONFIG_OR0_EHTR_8_CYCLE=y --CONFIG_ELBC_BR1_OR1=y --CONFIG_BR1_OR1_NAME="FPGA0" --CONFIG_BR1_OR1_BASE=0xE0600000 --CONFIG_BR1_PORTSIZE_16BIT=y --CONFIG_OR1_AM_1_MBYTES=y --CONFIG_OR1_SCY_5=y --CONFIG_OR1_CSNT_EARLIER=y --CONFIG_ELBC_BR2_OR2=y --CONFIG_BR2_OR2_NAME="FPGA1" --CONFIG_BR2_OR2_BASE=0xE0700000 --CONFIG_BR2_PORTSIZE_16BIT=y --CONFIG_OR2_AM_1_MBYTES=y --CONFIG_OR2_SCY_5=y --CONFIG_OR2_CSNT_EARLIER=y - CONFIG_HID0_FINAL_EMCP=y - CONFIG_HID0_FINAL_DPM=y - CONFIG_HID0_FINAL_ICE=y -diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig -index 032dcfe343..ee833a59f3 100644 ---- a/configs/gwventana_emmc_defconfig -+++ b/configs/gwventana_emmc_defconfig -@@ -114,9 +114,12 @@ CONFIG_SUPPORT_EMMC_BOOT=y - CONFIG_FSL_USDHC=y - CONFIG_MTD=y - CONFIG_PHYLIB=y -+CONFIG_PHY_FIXED=y - CONFIG_DM_MDIO=y -+CONFIG_DM_DSA=y - CONFIG_E1000=y - CONFIG_FEC_MXC=y -+CONFIG_MV88E6XXX=y - CONFIG_MII=y - CONFIG_PCI=y - CONFIG_PCIE_IMX=y -diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig -deleted file mode 100644 -index ee833a59f3..0000000000 ---- a/configs/gwventana_gw5904_defconfig -+++ /dev/null -@@ -1,179 +0,0 @@ --CONFIG_ARM=y --CONFIG_ARCH_MX6=y --CONFIG_TEXT_BASE=0x17800000 --CONFIG_SYS_MALLOC_LEN=0xa00000 --CONFIG_SPL_GPIO=y --CONFIG_SPL_LIBCOMMON_SUPPORT=y --CONFIG_SPL_LIBGENERIC_SUPPORT=y --CONFIG_NR_DRAM_BANKS=1 --CONFIG_ENV_SIZE=0x20000 --CONFIG_ENV_OFFSET=0xB1400 --CONFIG_MX6QDL=y --CONFIG_TARGET_GW_VENTANA=y --CONFIG_SYS_I2C_MXC_I2C1=y --CONFIG_SYS_I2C_MXC_I2C2=y --CONFIG_SYS_I2C_MXC_I2C3=y --CONFIG_CMD_EECONFIG=y --CONFIG_DEFAULT_DEVICE_TREE="imx6q-gw54xx" --CONFIG_SPL_TEXT_BASE=0x00908000 --CONFIG_SYS_PROMPT="Ventana > " --CONFIG_SPL_MMC=y --CONFIG_SPL_SERIAL=y --CONFIG_SPL_DRIVERS_MISC=y --CONFIG_SPL_STACK_R_ADDR=0x18000000 --CONFIG_SPL=y --CONFIG_ENV_OFFSET_REDUND=0xD1400 --CONFIG_CMD_HDMIDETECT=y --CONFIG_AHCI=y --CONFIG_SYS_MONITOR_LEN=409600 --CONFIG_FIT=y --CONFIG_FIT_VERBOSE=y --CONFIG_SPL_LOAD_FIT=y --CONFIG_SUPPORT_RAW_INITRD=y --CONFIG_OF_BOARD_SETUP=y --CONFIG_BOOTDELAY=3 --CONFIG_USE_BOOTCOMMAND=y --CONFIG_BOOTCOMMAND="for btype in ${bootdevs}; do echo; echo Attempting ${btype} boot...; if run ${btype}_boot; then; fi; done" --CONFIG_USE_PREBOOT=y --# CONFIG_DISPLAY_BOARDINFO is not set --CONFIG_DISPLAY_BOARDINFO_LATE=y --CONFIG_BOARD_EARLY_INIT_F=y --CONFIG_HWCONFIG=y --CONFIG_MISC_INIT_R=y --CONFIG_PCI_INIT_R=y --CONFIG_SPL_BOARD_INIT=y --CONFIG_SPL_STACK_R=y --CONFIG_SYS_SPL_MALLOC=y --CONFIG_SPL_FIT_IMAGE_TINY=y --CONFIG_SPL_DMA=y --CONFIG_SPL_I2C=y --CONFIG_SPL_OS_BOOT=y --CONFIG_SYS_SPL_ARGS_ADDR=0x18000000 --CONFIG_SPL_FALCON_BOOT_MMCSD=y --CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 --CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x800 --CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x100 --CONFIG_SPL_POWER=y --CONFIG_HUSH_PARSER=y --CONFIG_SYS_MAXARGS=32 --CONFIG_SYS_PBSIZE=539 --CONFIG_CMD_BOOTZ=y --CONFIG_SYS_BOOTM_LEN=0x4000000 --CONFIG_CMD_SPL_WRITE_SIZE=0x20000 --CONFIG_CMD_UNZIP=y --# CONFIG_CMD_FLASH is not set --CONFIG_CMD_GPIO=y --CONFIG_CMD_I2C=y --CONFIG_CMD_MMC=y --CONFIG_CMD_PART=y --CONFIG_CMD_PCI=y --CONFIG_CMD_USB=y --CONFIG_CMD_USB_MASS_STORAGE=y --CONFIG_CMD_WDT=y --CONFIG_CMD_DHCP=y --CONFIG_CMD_MII=y --CONFIG_CMD_PING=y --CONFIG_CMD_BMP=y --CONFIG_CMD_CACHE=y --CONFIG_CMD_TIME=y --# CONFIG_CMD_VIDCONSOLE is not set --CONFIG_CMD_EXT2=y --CONFIG_CMD_EXT4=y --CONFIG_CMD_EXT4_WRITE=y --CONFIG_CMD_FAT=y --CONFIG_CMD_FS_GENERIC=y --CONFIG_CMD_MTDPARTS=y --CONFIG_MTDIDS_DEFAULT="nand0=nand" --CONFIG_MTDPARTS_DEFAULT="mtdparts=nand:16m(uboot),1m(env),-(rootfs)" --CONFIG_CMD_UBI=y --CONFIG_OF_CONTROL=y --CONFIG_OF_LIST="imx6q-gw51xx imx6dl-gw51xx imx6q-gw52xx imx6dl-gw52xx imx6q-gw53xx imx6dl-gw53xx imx6q-gw54xx imx6dl-gw54xx imx6q-gw551x imx6dl-gw551x imx6q-gw552x imx6dl-gw552x imx6q-gw553x imx6dl-gw553x imx6q-gw560x imx6dl-gw560x imx6q-gw5903 imx6dl-gw5903 imx6q-gw5904 imx6dl-gw5904 imx6q-gw5907 imx6dl-gw5907 imx6q-gw5910 imx6dl-gw5910 imx6q-gw5912 imx6dl-gw5912 imx6q-gw5913 imx6dl-gw5913" --CONFIG_MULTI_DTB_FIT=y --CONFIG_ENV_OVERWRITE=y --CONFIG_ENV_IS_IN_MMC=y --CONFIG_SYS_REDUNDAND_ENVIRONMENT=y --CONFIG_SYS_RELOC_GD_ENV_ADDR=y --CONFIG_SYS_MMC_ENV_PART=1 --CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y --CONFIG_NETCONSOLE=y --CONFIG_USE_IPADDR=y --CONFIG_IPADDR="192.168.1.1" --CONFIG_USE_SERVERIP=y --CONFIG_SERVERIP="192.168.1.146" --CONFIG_BOUNCE_BUFFER=y --CONFIG_DWC_AHSATA=y --CONFIG_LBA48=y --CONFIG_DM_I2C=y --CONFIG_SPL_SYS_I2C_LEGACY=y --CONFIG_SYS_I2C_MXC=y --CONFIG_LED=y --CONFIG_LED_BLINK=y --CONFIG_LED_GPIO=y --CONFIG_SUPPORT_EMMC_RPMB=y --CONFIG_SUPPORT_EMMC_BOOT=y --CONFIG_FSL_USDHC=y --CONFIG_MTD=y --CONFIG_PHYLIB=y --CONFIG_PHY_FIXED=y --CONFIG_DM_MDIO=y --CONFIG_DM_DSA=y --CONFIG_E1000=y --CONFIG_FEC_MXC=y --CONFIG_MV88E6XXX=y --CONFIG_MII=y --CONFIG_PCI=y --CONFIG_PCIE_IMX=y --CONFIG_PINCTRL=y --CONFIG_PINCTRL_IMX6=y --CONFIG_POWER_LEGACY=y --CONFIG_POWER_LTC3676=y --CONFIG_POWER_PFUZE100=y --CONFIG_DM_REGULATOR=y --CONFIG_DM_REGULATOR_FIXED=y --CONFIG_POWER_I2C=y --CONFIG_CONS_INDEX=2 --CONFIG_DM_SERIAL=y --CONFIG_MXC_UART=y --CONFIG_SPI=y --CONFIG_DM_SPI=y --CONFIG_MXC_SPI=y --CONFIG_SYSRESET=y --CONFIG_SYSRESET_WATCHDOG=y --CONFIG_DM_THERMAL=y --CONFIG_IMX_THERMAL=y --CONFIG_USB=y --CONFIG_USB_STORAGE=y --CONFIG_USB_HOST_ETHER=y --CONFIG_USB_ETHER_ASIX=y --CONFIG_USB_ETHER_ASIX88179=y --CONFIG_USB_ETHER_LAN75XX=y --CONFIG_USB_ETHER_LAN78XX=y --CONFIG_USB_ETHER_MCS7830=y --CONFIG_USB_ETHER_RTL8152=y --CONFIG_USB_ETHER_SMSC95XX=y --CONFIG_USB_GADGET=y --CONFIG_USB_GADGET_MANUFACTURER="Gateworks" --CONFIG_USB_GADGET_VENDOR_NUM=0x0525 --CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 --CONFIG_CI_UDC=y --CONFIG_USB_GADGET_DOWNLOAD=y --CONFIG_USB_ETHER=y --CONFIG_USB_ETH_CDC=y --CONFIG_VIDEO=y --CONFIG_VIDEO_LOGO=y --# CONFIG_BACKLIGHT is not set --# CONFIG_VIDEO_BPP8 is not set --# CONFIG_VIDEO_BPP32 is not set --# CONFIG_VIDEO_ANSI is not set --CONFIG_SYS_WHITE_ON_BLACK=y --# CONFIG_PANEL is not set --CONFIG_I2C_EDID=y --CONFIG_VIDEO_IPUV3=y --CONFIG_IMX_VIDEO_SKIP=y --CONFIG_IMX_HDMI=y --CONFIG_SPLASH_SCREEN=y --CONFIG_SPLASH_SCREEN_ALIGN=y --CONFIG_HIDE_LOGO_VERSION=y --CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 --CONFIG_IMX_WATCHDOG=y --CONFIG_FDT_FIXUP_PARTITIONS=y -diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig -index 6b673b80c1..db2da79ab1 100644 ---- a/configs/imx8mm_venice_defconfig -+++ b/configs/imx8mm_venice_defconfig -@@ -104,6 +104,7 @@ CONFIG_SPL_MMC_HS400_SUPPORT=y - CONFIG_FSL_USDHC=y - CONFIG_PHYLIB=y - CONFIG_PHY_TI_DP83867=y -+CONFIG_PHY_XWAY=y - CONFIG_PHY_FIXED=y - CONFIG_DM_MDIO=y - CONFIG_DM_DSA=y -diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig -index 9a14f214d6..e9cb264950 100644 ---- a/configs/imx8mn_venice_defconfig -+++ b/configs/imx8mn_venice_defconfig -@@ -105,6 +105,7 @@ CONFIG_SPL_MMC_HS400_SUPPORT=y - CONFIG_FSL_USDHC=y - CONFIG_PHYLIB=y - CONFIG_PHY_TI_DP83867=y -+CONFIG_PHY_XWAY=y - CONFIG_PHY_FIXED=y - CONFIG_DM_MDIO=y - CONFIG_DM_DSA=y -diff --git a/configs/imx8mp_dhcom_pdk2_defconfig b/configs/imx8mp_dhcom_pdk2_defconfig -index 6452c219e2..c065706707 100644 ---- a/configs/imx8mp_dhcom_pdk2_defconfig -+++ b/configs/imx8mp_dhcom_pdk2_defconfig -@@ -31,6 +31,7 @@ CONFIG_IMX_BOOTAUX=y - CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 - CONFIG_SYS_LOAD_ADDR=0x50000000 - CONFIG_DEBUG_UART=y -+CONFIG_LTO=y - CONFIG_ENV_VARS_UBOOT_CONFIG=y - CONFIG_SYS_MONITOR_LEN=1048576 - CONFIG_FIT=y -diff --git a/configs/imx8mp_dhcom_pdk3_defconfig b/configs/imx8mp_dhcom_pdk3_defconfig -new file mode 100644 -index 0000000000..9966c50807 ---- /dev/null -+++ b/configs/imx8mp_dhcom_pdk3_defconfig -@@ -0,0 +1,266 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_IMX8M=y -+CONFIG_TEXT_BASE=0x40200000 -+CONFIG_SYS_MALLOC_LEN=0x1000000 -+CONFIG_SYS_MALLOC_F_LEN=0x18000 -+CONFIG_SPL_GPIO=y -+CONFIG_SPL_LIBCOMMON_SUPPORT=y -+CONFIG_SPL_LIBGENERIC_SUPPORT=y -+CONFIG_NR_DRAM_BANKS=2 -+CONFIG_ENV_SIZE=0x10000 -+CONFIG_ENV_OFFSET=0xFE0000 -+CONFIG_ENV_SECT_SIZE=0x1000 -+CONFIG_DM_GPIO=y -+CONFIG_DEFAULT_DEVICE_TREE="imx8mp-dhcom-pdk3" -+CONFIG_SPL_TEXT_BASE=0x920000 -+CONFIG_TARGET_IMX8MP_DH_DHCOM_PDK2=y -+CONFIG_SYS_PROMPT="u-boot=> " -+CONFIG_DM_RESET=y -+CONFIG_SPL_MMC=y -+CONFIG_SPL_SERIAL=y -+CONFIG_SPL_DRIVERS_MISC=y -+CONFIG_BOOTCOUNT_BOOTLIMIT=3 -+CONFIG_SYS_BOOTCOUNT_ADDR=0x30370090 -+CONFIG_SPL_STACK=0x96fc00 -+CONFIG_SPL=y -+CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y -+CONFIG_DEBUG_UART_BASE=0x30860000 -+CONFIG_DEBUG_UART_CLOCK=24000000 -+CONFIG_ENV_OFFSET_REDUND=0xFF0000 -+CONFIG_IMX_BOOTAUX=y -+CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 -+CONFIG_SYS_LOAD_ADDR=0x50000000 -+CONFIG_DEBUG_UART=y -+CONFIG_LTO=y -+CONFIG_ENV_VARS_UBOOT_CONFIG=y -+CONFIG_SYS_MONITOR_LEN=1048576 -+CONFIG_FIT=y -+CONFIG_FIT_EXTERNAL_OFFSET=0x3000 -+CONFIG_SPL_LOAD_FIT=y -+CONFIG_SPL_LOAD_FIT_ADDRESS=0x44000000 -+CONFIG_SUPPORT_RAW_INITRD=y -+CONFIG_OF_SYSTEM_SETUP=y -+CONFIG_USE_BOOTARGS=y -+CONFIG_USE_BOOTCOMMAND=y -+CONFIG_BOOTCOMMAND="run dh_update_env distro_bootcmd ; reset" -+CONFIG_USE_PREBOOT=y -+CONFIG_PREBOOT="gpio clear GPIO1_11 ; sleep 0.1 ; gpio set GPIO1_11 ; sleep 0.1 ; i2c dev 4 && i2c mw 0x70 0 4 && i2c probe 0x2d && i2c mw 0x2d 0xaa55.2 0" -+CONFIG_DEFAULT_FDT_FILE="imx8mp-dhcom-pdk3.dtb" -+CONFIG_CONSOLE_MUX=y -+CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y -+CONFIG_ARCH_MISC_INIT=y -+CONFIG_BOARD_LATE_INIT=y -+CONFIG_SPL_MAX_SIZE=0x25000 -+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -+CONFIG_SPL_BSS_START_ADDR=0x96fc00 -+CONFIG_SPL_BSS_MAX_SIZE=0x400 -+CONFIG_SPL_BOOTROM_SUPPORT=y -+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -+CONFIG_SYS_SPL_MALLOC=y -+CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y -+CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x4c000000 -+CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 -+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y -+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 -+CONFIG_SPL_I2C=y -+CONFIG_SPL_POWER=y -+CONFIG_SPL_WATCHDOG=y -+CONFIG_HUSH_PARSER=y -+CONFIG_SYS_MAXARGS=64 -+CONFIG_SYS_CBSIZE=2048 -+CONFIG_SYS_PBSIZE=2081 -+# CONFIG_BOOTM_NETBSD is not set -+# CONFIG_BOOTM_PLAN9 is not set -+# CONFIG_BOOTM_RTEMS is not set -+# CONFIG_BOOTM_VXWORKS is not set -+CONFIG_SYS_BOOTM_LEN=0x8000000 -+CONFIG_CMD_ASKENV=y -+# CONFIG_CMD_EXPORTENV is not set -+CONFIG_CMD_ERASEENV=y -+CONFIG_CRC32_VERIFY=y -+CONFIG_CMD_EEPROM=y -+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 -+CONFIG_SYS_EEPROM_SIZE=16384 -+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 -+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=20 -+CONFIG_CMD_MD5SUM=y -+CONFIG_MD5SUM_VERIFY=y -+CONFIG_CMD_MEMTEST=y -+CONFIG_CMD_SHA1SUM=y -+CONFIG_SHA1SUM_VERIFY=y -+CONFIG_CMD_BIND=y -+CONFIG_CMD_CLK=y -+CONFIG_CMD_DFU=y -+CONFIG_CMD_FUSE=y -+CONFIG_CMD_GPIO=y -+CONFIG_CMD_GPT=y -+CONFIG_CMD_GPT_RENAME=y -+CONFIG_CMD_I2C=y -+CONFIG_CMD_LSBLK=y -+CONFIG_CMD_MBR=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_BKOPS_ENABLE=y -+CONFIG_CMD_MTD=y -+CONFIG_CMD_PART=y -+CONFIG_CMD_READ=y -+CONFIG_CMD_SPI=y -+CONFIG_CMD_USB=y -+CONFIG_CMD_USB_SDP=y -+CONFIG_CMD_USB_MASS_STORAGE=y -+CONFIG_CMD_DHCP=y -+CONFIG_CMD_MII=y -+CONFIG_CMD_PING=y -+CONFIG_CMD_PXE=y -+CONFIG_CMD_BOOTCOUNT=y -+CONFIG_CMD_CACHE=y -+CONFIG_CMD_TIME=y -+CONFIG_CMD_GETTIME=y -+CONFIG_CMD_SYSBOOT=y -+CONFIG_CMD_UUID=y -+CONFIG_CMD_PMIC=y -+CONFIG_CMD_REGULATOR=y -+CONFIG_CMD_HASH=y -+CONFIG_CMD_SMC=y -+CONFIG_HASH_VERIFY=y -+CONFIG_CMD_BTRFS=y -+CONFIG_CMD_EXT2=y -+CONFIG_CMD_EXT4=y -+CONFIG_CMD_EXT4_WRITE=y -+CONFIG_CMD_FAT=y -+CONFIG_CMD_FS_GENERIC=y -+CONFIG_CMD_FS_UUID=y -+CONFIG_CMD_MTDPARTS=y -+CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y -+CONFIG_MTDIDS_DEFAULT="nor0=flash@0" -+CONFIG_MTDPARTS_DEFAULT="mtdparts=flash@0:-(sf)" -+CONFIG_MMC_SPEED_MODE_SET=y -+CONFIG_PARTITION_TYPE_GUID=y -+CONFIG_OF_CONTROL=y -+CONFIG_SPL_OF_CONTROL=y -+CONFIG_ENV_OVERWRITE=y -+CONFIG_ENV_IS_NOWHERE=y -+CONFIG_ENV_IS_IN_SPI_FLASH=y -+CONFIG_ENV_SECT_SIZE_AUTO=y -+CONFIG_ENV_SPI_MAX_HZ=80000000 -+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -+CONFIG_SYS_RELOC_GD_ENV_ADDR=y -+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -+CONFIG_VERSION_VARIABLE=y -+CONFIG_NET_RANDOM_ETHADDR=y -+CONFIG_NETCONSOLE=y -+CONFIG_IP_DEFRAG=y -+CONFIG_TFTP_TSIZE=y -+CONFIG_SPL_DM=y -+CONFIG_REGMAP=y -+CONFIG_SYSCON=y -+CONFIG_BOOTCOUNT_LIMIT=y -+CONFIG_SYS_BOOTCOUNT_MAGIC=0xB0C40000 -+CONFIG_SPL_CLK_COMPOSITE_CCF=y -+CONFIG_CLK_COMPOSITE_CCF=y -+CONFIG_SPL_CLK_IMX8MP=y -+CONFIG_CLK_IMX8MP=y -+CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 -+CONFIG_DFU_TFTP=y -+CONFIG_DFU_TIMEOUT=y -+CONFIG_DFU_MMC=y -+CONFIG_DFU_MTD=y -+CONFIG_DFU_RAM=y -+CONFIG_USB_FUNCTION_FASTBOOT=y -+CONFIG_FASTBOOT_BUF_ADDR=0x42800000 -+CONFIG_FASTBOOT_BUF_SIZE=0x20000000 -+CONFIG_FASTBOOT_FLASH=y -+CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -+CONFIG_GPIO_HOG=y -+CONFIG_SPL_GPIO_HOG=y -+CONFIG_MXC_GPIO=y -+CONFIG_DM_I2C=y -+CONFIG_I2C_MUX=y -+CONFIG_I2C_MUX_PCA954x=y -+# CONFIG_INPUT is not set -+CONFIG_LED=y -+CONFIG_LED_BLINK=y -+CONFIG_LED_GPIO=y -+CONFIG_MISC=y -+CONFIG_I2C_EEPROM=y -+CONFIG_SYS_I2C_EEPROM_ADDR=0x50 -+CONFIG_SUPPORT_EMMC_BOOT=y -+CONFIG_MMC_IO_VOLTAGE=y -+CONFIG_SPL_MMC_IO_VOLTAGE=y -+CONFIG_MMC_UHS_SUPPORT=y -+CONFIG_SPL_MMC_UHS_SUPPORT=y -+CONFIG_MMC_HS400_ES_SUPPORT=y -+CONFIG_MMC_HS400_SUPPORT=y -+CONFIG_FSL_USDHC=y -+CONFIG_MTD=y -+CONFIG_DM_MTD=y -+CONFIG_DM_SPI_FLASH=y -+CONFIG_SF_DEFAULT_SPEED=50000000 -+CONFIG_SPI_FLASH_SFDP_SUPPORT=y -+# CONFIG_SPI_FLASH_UNLOCK_ALL is not set -+CONFIG_SPI_FLASH_WINBOND=y -+CONFIG_SPI_FLASH_MTD=y -+CONFIG_PHY_MICREL=y -+CONFIG_PHY_MICREL_KSZ90X1=y -+CONFIG_PHY_SMSC=y -+CONFIG_DM_MDIO=y -+CONFIG_DM_ETH_PHY=y -+CONFIG_DWC_ETH_QOS=y -+CONFIG_DWC_ETH_QOS_IMX=y -+CONFIG_FEC_MXC=y -+CONFIG_RGMII=y -+CONFIG_MII=y -+CONFIG_PHY_IMX8MQ_USB=y -+CONFIG_PINCTRL=y -+CONFIG_SPL_PINCTRL=y -+CONFIG_PINCTRL_IMX8M=y -+CONFIG_POWER_DOMAIN=y -+CONFIG_IMX8M_POWER_DOMAIN=y -+CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y -+CONFIG_DM_PMIC=y -+CONFIG_DM_PMIC_PCA9450=y -+CONFIG_SPL_DM_PMIC_PCA9450=y -+CONFIG_DM_REGULATOR=y -+CONFIG_SPL_DM_REGULATOR=y -+CONFIG_DM_REGULATOR_PCA9450=y -+CONFIG_SPL_DM_REGULATOR_PCA9450=y -+CONFIG_DM_REGULATOR_FIXED=y -+CONFIG_DM_REGULATOR_GPIO=y -+CONFIG_DM_RTC=y -+CONFIG_RTC_M41T62=y -+CONFIG_CONS_INDEX=2 -+CONFIG_DM_SERIAL=y -+# CONFIG_SPL_DM_SERIAL is not set -+CONFIG_MXC_UART=y -+CONFIG_SPI=y -+CONFIG_DM_SPI=y -+CONFIG_NXP_FSPI=y -+CONFIG_MXC_SPI=y -+CONFIG_SYSRESET=y -+CONFIG_SPL_SYSRESET=y -+CONFIG_SYSRESET_PSCI=y -+CONFIG_SYSRESET_WATCHDOG=y -+CONFIG_DM_THERMAL=y -+CONFIG_IMX_TMU=y -+CONFIG_USB=y -+# CONFIG_SPL_DM_USB is not set -+CONFIG_DM_USB_GADGET=y -+CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_XHCI_DWC3=y -+CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_DWC3=y -+CONFIG_USB_DWC3_GENERIC=y -+CONFIG_USB_STORAGE=y -+CONFIG_USB_HOST_ETHER=y -+CONFIG_USB_ETHER_ASIX=y -+CONFIG_USB_GADGET=y -+CONFIG_USB_GADGET_MANUFACTURER="DH electronics" -+CONFIG_USB_GADGET_VENDOR_NUM=0x0525 -+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 -+CONFIG_SDP_LOADADDR=0x0 -+CONFIG_USB_FUNCTION_ACM=y -+CONFIG_USB_ETHER=y -+CONFIG_USB_ETH_CDC=y -+CONFIG_IMX_WATCHDOG=y -+CONFIG_OF_LIBFDT_OVERLAY=y -diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig -index ee488b1c56..4d0432078d 100644 ---- a/configs/imx8mp_venice_defconfig -+++ b/configs/imx8mp_venice_defconfig -@@ -98,6 +98,7 @@ CONFIG_MMC_HS400_ES_SUPPORT=y - CONFIG_MMC_HS400_SUPPORT=y - CONFIG_FSL_USDHC=y - CONFIG_PHY_TI_DP83867=y -+CONFIG_PHY_XWAY=y - CONFIG_PHY_FIXED=y - CONFIG_DM_MDIO=y - CONFIG_DM_DSA=y -diff --git a/configs/imx93_11x11_evk_defconfig b/configs/imx93_11x11_evk_defconfig -index 694f8c33ef..4f8777161e 100644 ---- a/configs/imx93_11x11_evk_defconfig -+++ b/configs/imx93_11x11_evk_defconfig -@@ -26,7 +26,6 @@ CONFIG_REMAKE_ELF=y - CONFIG_SYS_MONITOR_LEN=524288 - CONFIG_DISTRO_DEFAULTS=y - CONFIG_DEFAULT_FDT_FILE="imx93-11x11-evk.dtb" --CONFIG_ARCH_MISC_INIT=y - CONFIG_BOARD_EARLY_INIT_F=y - CONFIG_BOARD_LATE_INIT=y - CONFIG_SPL_MAX_SIZE=0x26000 -diff --git a/configs/iot2050_defconfig b/configs/iot2050_pg1_defconfig -similarity index 93% -rename from configs/iot2050_defconfig -rename to configs/iot2050_pg1_defconfig -index 57387edcb4..b02769609c 100644 ---- a/configs/iot2050_defconfig -+++ b/configs/iot2050_pg1_defconfig -@@ -8,7 +8,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y - CONFIG_SPL_LIBGENERIC_SUPPORT=y - CONFIG_NR_DRAM_BANKS=2 - CONFIG_SOC_K3_AM654=y --CONFIG_TARGET_IOT2050_A53=y -+CONFIG_TARGET_IOT2050_A53_PG1=y - CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y - CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80100000 - CONFIG_ENV_SIZE=0x20000 -@@ -32,6 +32,7 @@ CONFIG_DISTRO_DEFAULTS=y - CONFIG_BOOTSTAGE=y - CONFIG_SHOW_BOOT_PROGRESS=y - CONFIG_SPL_SHOW_BOOT_PROGRESS=y -+CONFIG_BOOTCOMMAND="run start_watchdog; run distro_bootcmd" - CONFIG_CONSOLE_MUX=y - # CONFIG_DISPLAY_CPUINFO is not set - CONFIG_SPL_MAX_SIZE=0x58000 -@@ -52,7 +53,7 @@ CONFIG_SPL_POWER_DOMAIN=y - # CONFIG_SPL_SPI_FLASH_TINY is not set - CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y - CONFIG_SPL_SPI_LOAD=y --CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 -+CONFIG_SYS_SPI_U_BOOT_OFFS=0x380000 - CONFIG_SYS_MAXARGS=64 - CONFIG_SYS_PBSIZE=1050 - CONFIG_CMD_ASKENV=y -@@ -69,6 +70,7 @@ CONFIG_CMD_TIME=y - # CONFIG_ISO_PARTITION is not set - CONFIG_OF_CONTROL=y - CONFIG_SPL_OF_CONTROL=y -+CONFIG_OF_LIST="k3-am6528-iot2050-basic k3-am6548-iot2050-advanced" - CONFIG_SPL_MULTI_DTB_FIT=y - CONFIG_SPL_OF_LIST="k3-am65-iot2050-spl" - CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y -@@ -139,7 +141,9 @@ CONFIG_USB_DWC3_GENERIC=y - CONFIG_USB_KEYBOARD=y - # CONFIG_WATCHDOG is not set - # CONFIG_WATCHDOG_AUTOSTART is not set -+CONFIG_WATCHDOG_TIMEOUT_MSECS=0 - CONFIG_WDT=y - CONFIG_WDT_K3_RTI=y - CONFIG_WDT_K3_RTI_LOAD_FW=y - CONFIG_OF_LIBFDT_OVERLAY=y -+CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN=y -diff --git a/configs/iot2050_pg2_defconfig b/configs/iot2050_pg2_defconfig -new file mode 100644 -index 0000000000..b20667780a ---- /dev/null -+++ b/configs/iot2050_pg2_defconfig -@@ -0,0 +1,149 @@ -+CONFIG_ARM=y -+CONFIG_SKIP_LOWLEVEL_INIT=y -+CONFIG_ARCH_K3=y -+CONFIG_SYS_MALLOC_LEN=0x2000000 -+CONFIG_SYS_MALLOC_F_LEN=0x8000 -+CONFIG_SPL_GPIO=y -+CONFIG_SPL_LIBCOMMON_SUPPORT=y -+CONFIG_SPL_LIBGENERIC_SUPPORT=y -+CONFIG_NR_DRAM_BANKS=2 -+CONFIG_SOC_K3_AM654=y -+CONFIG_TARGET_IOT2050_A53_PG2=y -+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80100000 -+CONFIG_ENV_SIZE=0x20000 -+CONFIG_ENV_OFFSET=0x680000 -+CONFIG_ENV_SECT_SIZE=0x20000 -+CONFIG_DM_GPIO=y -+CONFIG_SPL_DM_SPI=y -+CONFIG_DEFAULT_DEVICE_TREE="k3-am6528-iot2050-basic-pg2" -+CONFIG_SPL_TEXT_BASE=0x80080000 -+CONFIG_SYS_PROMPT="IOT2050> " -+CONFIG_SPL_SERIAL=y -+CONFIG_SPL_STACK_R_ADDR=0x82000000 -+CONFIG_ENV_OFFSET_REDUND=0x6a0000 -+CONFIG_SPL_SPI_FLASH_SUPPORT=y -+CONFIG_SPL_SPI=y -+CONFIG_DISTRO_DEFAULTS=y -+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -+CONFIG_SPL_LOAD_FIT=y -+CONFIG_OF_BOARD_SETUP=y -+CONFIG_BOOTSTAGE=y -+CONFIG_SHOW_BOOT_PROGRESS=y -+CONFIG_SPL_SHOW_BOOT_PROGRESS=y -+CONFIG_BOOTCOMMAND="run start_watchdog; run distro_bootcmd" -+CONFIG_CONSOLE_MUX=y -+# CONFIG_DISPLAY_CPUINFO is not set -+CONFIG_SPL_MAX_SIZE=0x58000 -+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -+CONFIG_SPL_BSS_START_ADDR=0x80a00000 -+CONFIG_SPL_BSS_MAX_SIZE=0x80000 -+CONFIG_SPL_BOARD_INIT=y -+CONFIG_SPL_SYS_MALLOC_SIMPLE=y -+CONFIG_SPL_STACK_R=y -+CONFIG_SYS_SPL_MALLOC=y -+CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 -+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y -+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 -+CONFIG_SPL_DM_MAILBOX=y -+CONFIG_SPL_DM_SPI_FLASH=y -+CONFIG_SPL_DM_RESET=y -+CONFIG_SPL_POWER_DOMAIN=y -+# CONFIG_SPL_SPI_FLASH_TINY is not set -+CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y -+CONFIG_SPL_SPI_LOAD=y -+CONFIG_SYS_SPI_U_BOOT_OFFS=0x380000 -+CONFIG_SYS_MAXARGS=64 -+CONFIG_SYS_PBSIZE=1050 -+CONFIG_CMD_ASKENV=y -+CONFIG_CMD_DFU=y -+CONFIG_CMD_GPT=y -+CONFIG_CMD_I2C=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_PCI=y -+CONFIG_CMD_REMOTEPROC=y -+CONFIG_CMD_USB=y -+CONFIG_CMD_WDT=y -+# CONFIG_CMD_SETEXPR is not set -+CONFIG_CMD_TIME=y -+# CONFIG_ISO_PARTITION is not set -+CONFIG_OF_CONTROL=y -+CONFIG_SPL_OF_CONTROL=y -+CONFIG_OF_LIST="k3-am6528-iot2050-basic-pg2 k3-am6548-iot2050-advanced-pg2 k3-am6548-iot2050-advanced-m2" -+CONFIG_SPL_MULTI_DTB_FIT=y -+CONFIG_SPL_OF_LIST="k3-am65-iot2050-spl" -+CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y -+CONFIG_ENV_IS_IN_SPI_FLASH=y -+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -+CONFIG_SPL_DM=y -+CONFIG_SPL_DM_SEQ_ALIAS=y -+CONFIG_SPL_REGMAP=y -+CONFIG_SPL_OF_TRANSLATE=y -+CONFIG_CLK=y -+CONFIG_SPL_CLK=y -+CONFIG_CLK_TI_SCI=y -+CONFIG_DFU_MMC=y -+CONFIG_DFU_RAM=y -+CONFIG_DFU_SF=y -+CONFIG_DMA_CHANNELS=y -+CONFIG_TI_K3_NAVSS_UDMA=y -+CONFIG_TI_SCI_PROTOCOL=y -+CONFIG_DA8XX_GPIO=y -+CONFIG_DM_PCA953X=y -+CONFIG_DM_I2C=y -+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y -+CONFIG_SYS_I2C_OMAP24XX=y -+CONFIG_LED=y -+CONFIG_SPL_LED=y -+CONFIG_LED_GPIO=y -+CONFIG_SPL_LED_GPIO=y -+CONFIG_DM_MAILBOX=y -+CONFIG_K3_SEC_PROXY=y -+CONFIG_MMC_HS200_SUPPORT=y -+CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_ADMA=y -+CONFIG_MMC_SDHCI_AM654=y -+CONFIG_DM_SPI_FLASH=y -+CONFIG_SPI_FLASH_SFDP_SUPPORT=y -+CONFIG_SPI_FLASH_STMICRO=y -+CONFIG_SPI_FLASH_WINBOND=y -+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set -+CONFIG_PCI=y -+CONFIG_PCI_KEYSTONE=y -+CONFIG_PHY=y -+CONFIG_AM654_PHY=y -+CONFIG_OMAP_USB2_PHY=y -+CONFIG_PINCTRL=y -+# CONFIG_PINCTRL_GENERIC is not set -+CONFIG_SPL_PINCTRL=y -+# CONFIG_SPL_PINCTRL_GENERIC is not set -+CONFIG_PINCTRL_SINGLE=y -+CONFIG_POWER_DOMAIN=y -+CONFIG_TI_SCI_POWER_DOMAIN=y -+CONFIG_REMOTEPROC_TI_K3_R5F=y -+CONFIG_DM_RESET=y -+CONFIG_RESET_TI_SCI=y -+CONFIG_DM_SERIAL=y -+CONFIG_SOC_DEVICE=y -+CONFIG_SOC_DEVICE_TI_K3=y -+CONFIG_SOC_TI=y -+CONFIG_SPI=y -+CONFIG_DM_SPI=y -+CONFIG_CADENCE_QSPI=y -+CONFIG_SYSRESET=y -+CONFIG_SPL_SYSRESET=y -+CONFIG_SYSRESET_TI_SCI=y -+CONFIG_USB=y -+CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_XHCI_DWC3=y -+CONFIG_USB_DWC3=y -+CONFIG_USB_DWC3_GENERIC=y -+CONFIG_USB_KEYBOARD=y -+# CONFIG_WATCHDOG is not set -+# CONFIG_WATCHDOG_AUTOSTART is not set -+CONFIG_WATCHDOG_TIMEOUT_MSECS=0 -+CONFIG_WDT=y -+CONFIG_WDT_K3_RTI=y -+CONFIG_WDT_K3_RTI_LOAD_FW=y -+CONFIG_OF_LIBFDT_OVERLAY=y -+CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN=y -diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig -index 4ea7da8d32..40e2b22894 100644 ---- a/configs/kmcoge5ne_defconfig -+++ b/configs/kmcoge5ne_defconfig -@@ -111,43 +111,6 @@ CONFIG_LBLAW3=y - CONFIG_LBLAW3_BASE=0xA0000000 - CONFIG_LBLAW3_NAME="PAXE" - CONFIG_LBLAW3_LENGTH_512_MBYTES=y --CONFIG_ELBC_BR0_OR0=y --CONFIG_BR0_OR0_NAME="FLASH" --CONFIG_BR0_OR0_BASE=0xF0000000 --CONFIG_BR0_PORTSIZE_16BIT=y --CONFIG_OR0_AM_256_MBYTES=y --CONFIG_OR0_SCY_5=y --CONFIG_OR0_CSNT_EARLIER=y --CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y --CONFIG_OR0_TRLX_RELAXED=y --CONFIG_OR0_EAD_EXTRA=y --CONFIG_ELBC_BR1_OR1=y --CONFIG_BR1_OR1_NAME="KMBEC_FPGA" --CONFIG_BR1_OR1_BASE=0xE8000000 --CONFIG_OR1_AM_64_MBYTES=y --CONFIG_OR1_SCY_2=y --CONFIG_OR1_CSNT_EARLIER=y --CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y --CONFIG_OR1_TRLX_RELAXED=y --CONFIG_OR1_EAD_EXTRA=y --CONFIG_ELBC_BR3_OR3=y --CONFIG_BR3_OR3_NAME="PAXE" --CONFIG_BR3_OR3_BASE=0xA0000000 --CONFIG_OR3_AM_256_MBYTES=y --CONFIG_OR3_SCY_2=y --CONFIG_OR3_CSNT_EARLIER=y --CONFIG_OR3_ACS_HALF_CYCLE_EARLIER=y --CONFIG_OR3_TRLX_RELAXED=y --CONFIG_OR3_EAD_EXTRA=y --CONFIG_ELBC_BR4_OR4=y --CONFIG_BR4_OR4_NAME="BFTIC3" --CONFIG_BR4_OR4_BASE=0xB0000000 --CONFIG_OR4_AM_256_MBYTES=y --CONFIG_OR4_SCY_2=y --CONFIG_OR4_CSNT_EARLIER=y --CONFIG_OR4_ACS_HALF_CYCLE_EARLIER=y --CONFIG_OR4_TRLX_RELAXED=y --CONFIG_OR4_EAD_EXTRA=y - CONFIG_HID0_FINAL_EMCP=y - CONFIG_HID0_FINAL_ICE=y - CONFIG_HID2_HBE=y -diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig -index 96298ed0c3..f49367595d 100644 ---- a/configs/kmeter1_defconfig -+++ b/configs/kmeter1_defconfig -@@ -91,34 +91,6 @@ CONFIG_LBLAW3=y - CONFIG_LBLAW3_BASE=0xA0000000 - CONFIG_LBLAW3_NAME="PAXE" - CONFIG_LBLAW3_LENGTH_512_MBYTES=y --CONFIG_ELBC_BR0_OR0=y --CONFIG_BR0_OR0_NAME="FLASH" --CONFIG_BR0_OR0_BASE=0xF0000000 --CONFIG_BR0_PORTSIZE_16BIT=y --CONFIG_OR0_AM_256_MBYTES=y --CONFIG_OR0_SCY_5=y --CONFIG_OR0_CSNT_EARLIER=y --CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y --CONFIG_OR0_TRLX_RELAXED=y --CONFIG_OR0_EAD_EXTRA=y --CONFIG_ELBC_BR1_OR1=y --CONFIG_BR1_OR1_NAME="KMBEC_FPGA" --CONFIG_BR1_OR1_BASE=0xE8000000 --CONFIG_OR1_AM_64_MBYTES=y --CONFIG_OR1_SCY_2=y --CONFIG_OR1_CSNT_EARLIER=y --CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y --CONFIG_OR1_TRLX_RELAXED=y --CONFIG_OR1_EAD_EXTRA=y --CONFIG_ELBC_BR3_OR3=y --CONFIG_BR3_OR3_NAME="PAXE" --CONFIG_BR3_OR3_BASE=0xA0000000 --CONFIG_OR3_AM_256_MBYTES=y --CONFIG_OR3_SCY_2=y --CONFIG_OR3_CSNT_EARLIER=y --CONFIG_OR3_ACS_HALF_CYCLE_EARLIER=y --CONFIG_OR3_TRLX_RELAXED=y --CONFIG_OR3_EAD_EXTRA=y - CONFIG_HID0_FINAL_EMCP=y - CONFIG_HID0_FINAL_ICE=y - CONFIG_HID2_HBE=y -diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig -index db717e4a15..9a1b6b894b 100644 ---- a/configs/kmopti2_defconfig -+++ b/configs/kmopti2_defconfig -@@ -99,40 +99,6 @@ CONFIG_LBLAW3=y - CONFIG_LBLAW3_BASE=0xB0000000 - CONFIG_LBLAW3_NAME="APP2" - CONFIG_LBLAW3_LENGTH_256_MBYTES=y --CONFIG_ELBC_BR0_OR0=y --CONFIG_BR0_OR0_NAME="FLASH" --CONFIG_BR0_OR0_BASE=0xF0000000 --CONFIG_BR0_PORTSIZE_16BIT=y --CONFIG_OR0_AM_256_MBYTES=y --CONFIG_OR0_SCY_5=y --CONFIG_OR0_CSNT_EARLIER=y --CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y --CONFIG_OR0_TRLX_RELAXED=y --CONFIG_OR0_EAD_EXTRA=y --CONFIG_ELBC_BR1_OR1=y --CONFIG_BR1_OR1_NAME="KMBEC_FPGA" --CONFIG_BR1_OR1_BASE=0xE8000000 --CONFIG_OR1_AM_128_MBYTES=y --CONFIG_OR1_SCY_2=y --CONFIG_OR1_CSNT_EARLIER=y --CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y --CONFIG_OR1_TRLX_RELAXED=y --CONFIG_OR1_EAD_EXTRA=y --CONFIG_ELBC_BR2_OR2=y --CONFIG_BR2_OR2_NAME="APP1" --CONFIG_BR2_OR2_BASE=0xA0000000 --CONFIG_OR2_AM_256_MBYTES=y --CONFIG_OR2_SCY_2=y --CONFIG_OR2_CSNT_EARLIER=y --CONFIG_OR2_ACS_QUARTER_CYCLE_EARLIER=y --CONFIG_OR2_TRLX_RELAXED=y --CONFIG_OR2_EAD_EXTRA=y --CONFIG_ELBC_BR3_OR3=y --CONFIG_BR3_OR3_NAME="APP2" --CONFIG_BR3_OR3_BASE=0xB0000000 --CONFIG_BR3_PORTSIZE_16BIT=y --CONFIG_OR3_AM_256_MBYTES=y --CONFIG_OR3_SCY_4=y - CONFIG_HID0_FINAL_EMCP=y - CONFIG_HID0_FINAL_ICE=y - CONFIG_HID2_HBE=y -diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig -index 69de685baf..cafe39a545 100644 ---- a/configs/kmsupx5_defconfig -+++ b/configs/kmsupx5_defconfig -@@ -85,34 +85,6 @@ CONFIG_LBLAW2=y - CONFIG_LBLAW2_BASE=0xA0000000 - CONFIG_LBLAW2_NAME="APP1" - CONFIG_LBLAW2_LENGTH_256_MBYTES=y --CONFIG_ELBC_BR0_OR0=y --CONFIG_BR0_OR0_NAME="FLASH" --CONFIG_BR0_OR0_BASE=0xF0000000 --CONFIG_BR0_PORTSIZE_16BIT=y --CONFIG_OR0_AM_256_MBYTES=y --CONFIG_OR0_SCY_5=y --CONFIG_OR0_CSNT_EARLIER=y --CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y --CONFIG_OR0_TRLX_RELAXED=y --CONFIG_OR0_EAD_EXTRA=y --CONFIG_ELBC_BR1_OR1=y --CONFIG_BR1_OR1_NAME="KMBEC_FPGA" --CONFIG_BR1_OR1_BASE=0xE8000000 --CONFIG_OR1_AM_128_MBYTES=y --CONFIG_OR1_SCY_2=y --CONFIG_OR1_CSNT_EARLIER=y --CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y --CONFIG_OR1_TRLX_RELAXED=y --CONFIG_OR1_EAD_EXTRA=y --CONFIG_ELBC_BR2_OR2=y --CONFIG_BR2_OR2_NAME="APP1" --CONFIG_BR2_OR2_BASE=0xA0000000 --CONFIG_OR2_AM_256_MBYTES=y --CONFIG_OR2_SCY_2=y --CONFIG_OR2_CSNT_EARLIER=y --CONFIG_OR2_ACS_QUARTER_CYCLE_EARLIER=y --CONFIG_OR2_TRLX_RELAXED=y --CONFIG_OR2_EAD_EXTRA=y - CONFIG_HID0_FINAL_EMCP=y - CONFIG_HID0_FINAL_ICE=y - CONFIG_HID2_HBE=y -diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig -index 92f2b0adec..0b88ebdfd3 100644 ---- a/configs/kmtepr2_defconfig -+++ b/configs/kmtepr2_defconfig -@@ -99,40 +99,6 @@ CONFIG_LBLAW3=y - CONFIG_LBLAW3_BASE=0xB0000000 - CONFIG_LBLAW3_NAME="APP2" - CONFIG_LBLAW3_LENGTH_256_MBYTES=y --CONFIG_ELBC_BR0_OR0=y --CONFIG_BR0_OR0_NAME="FLASH" --CONFIG_BR0_OR0_BASE=0xF0000000 --CONFIG_BR0_PORTSIZE_16BIT=y --CONFIG_OR0_AM_256_MBYTES=y --CONFIG_OR0_SCY_5=y --CONFIG_OR0_CSNT_EARLIER=y --CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y --CONFIG_OR0_TRLX_RELAXED=y --CONFIG_OR0_EAD_EXTRA=y --CONFIG_ELBC_BR1_OR1=y --CONFIG_BR1_OR1_NAME="KMBEC_FPGA" --CONFIG_BR1_OR1_BASE=0xE8000000 --CONFIG_OR1_AM_128_MBYTES=y --CONFIG_OR1_SCY_2=y --CONFIG_OR1_CSNT_EARLIER=y --CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y --CONFIG_OR1_TRLX_RELAXED=y --CONFIG_OR1_EAD_EXTRA=y --CONFIG_ELBC_BR2_OR2=y --CONFIG_BR2_OR2_NAME="APP1" --CONFIG_BR2_OR2_BASE=0xA0000000 --CONFIG_OR2_AM_256_MBYTES=y --CONFIG_OR2_SCY_2=y --CONFIG_OR2_CSNT_EARLIER=y --CONFIG_OR2_ACS_QUARTER_CYCLE_EARLIER=y --CONFIG_OR2_TRLX_RELAXED=y --CONFIG_OR2_EAD_EXTRA=y --CONFIG_ELBC_BR3_OR3=y --CONFIG_BR3_OR3_NAME="APP2" --CONFIG_BR3_OR3_BASE=0xB0000000 --CONFIG_BR3_PORTSIZE_16BIT=y --CONFIG_OR3_AM_256_MBYTES=y --CONFIG_OR3_SCY_4=y - CONFIG_HID0_FINAL_EMCP=y - CONFIG_HID0_FINAL_ICE=y - CONFIG_HID2_HBE=y -diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig -index a9faa1525a..9f10dd23b2 100644 ---- a/configs/ls2088aqds_tfa_defconfig -+++ b/configs/ls2088aqds_tfa_defconfig -@@ -18,7 +18,6 @@ CONFIG_AHCI=y - CONFIG_FSL_USE_PCA9547_MUX=y - CONFIG_FSL_QIXIS=y - # CONFIG_QIXIS_I2C_ACCESS is not set --# CONFIG_SYS_MALLOC_F is not set - CONFIG_REMAKE_ELF=y - CONFIG_SYS_MONITOR_LEN=1048576 - CONFIG_MP=y -@@ -113,7 +112,9 @@ CONFIG_DM_RTC=y - CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y - CONFIG_RTC_DS3231=y - CONFIG_DM_SCSI=y --CONFIG_SYS_NS16550_SERIAL=y -+CONFIG_SPECIFY_CONSOLE_INDEX=y -+CONFIG_DM_SERIAL=y -+CONFIG_SYS_NS16550=y - CONFIG_SPI=y - CONFIG_DM_SPI=y - CONFIG_FSL_DSPI=y -diff --git a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig -index 1dd7c1dd80..f110bee575 100644 ---- a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig -+++ b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig -@@ -100,8 +100,10 @@ CONFIG_PCIE_LAYERSCAPE_RC=y - CONFIG_DM_RTC=y - CONFIG_RTC_DS3231=y - CONFIG_DM_SCSI=y -+CONFIG_SPECIFY_CONSOLE_INDEX=y - CONFIG_CONS_INDEX=2 --CONFIG_SYS_NS16550_SERIAL=y -+CONFIG_DM_SERIAL=y -+CONFIG_SYS_NS16550=y - CONFIG_SPI=y - CONFIG_DM_SPI=y - CONFIG_FSL_DSPI=y -diff --git a/configs/ls2088ardb_tfa_defconfig b/configs/ls2088ardb_tfa_defconfig -index 246ab40375..6ff4e493dc 100644 ---- a/configs/ls2088ardb_tfa_defconfig -+++ b/configs/ls2088ardb_tfa_defconfig -@@ -108,8 +108,10 @@ CONFIG_PCIE_LAYERSCAPE_RC=y - CONFIG_DM_RTC=y - CONFIG_RTC_DS3231=y - CONFIG_DM_SCSI=y -+CONFIG_SPECIFY_CONSOLE_INDEX=y - CONFIG_CONS_INDEX=2 --CONFIG_SYS_NS16550_SERIAL=y -+CONFIG_DM_SERIAL=y -+CONFIG_SYS_NS16550=y - CONFIG_SPI=y - CONFIG_DM_SPI=y - CONFIG_FSL_DSPI=y -diff --git a/configs/mvebu_ac5_rd_defconfig b/configs/mvebu_ac5_rd_defconfig -index 050af31f0a..4f13040bd6 100644 ---- a/configs/mvebu_ac5_rd_defconfig -+++ b/configs/mvebu_ac5_rd_defconfig -@@ -22,7 +22,6 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y - CONFIG_SYS_CONSOLE_INFO_QUIET=y - CONFIG_DISPLAY_BOARDINFO_LATE=y - CONFIG_ARCH_EARLY_INIT_R=y --CONFIG_ARCH_MISC_INIT=y - CONFIG_CMD_BOOTZ=y - CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 - CONFIG_CMD_MEMTEST=y -diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig -index b173648c8e..832f718410 100644 ---- a/configs/mx51evk_defconfig -+++ b/configs/mx51evk_defconfig -@@ -57,6 +57,7 @@ CONFIG_DM_REGULATOR_GPIO=y - CONFIG_POWER_FSL=y - CONFIG_POWER_SPI=y - CONFIG_RTC_MC13XXX=y -+CONFIG_DM_SERIAL=y - CONFIG_MXC_UART=y - CONFIG_SPI=y - CONFIG_MXC_SPI=y -diff --git a/configs/mx53loco_defconfig b/configs/mx53loco_defconfig -index d5f2b7092d..f497ccf9e9 100644 ---- a/configs/mx53loco_defconfig -+++ b/configs/mx53loco_defconfig -@@ -44,7 +44,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y - CONFIG_USE_ETHPRIME=y - CONFIG_ETHPRIME="FEC0" - CONFIG_ARP_TIMEOUT=200 --CONFIG_SYS_I2C_LEGACY=y -+CONFIG_DM_I2C=y - CONFIG_SYS_I2C_MXC=y - CONFIG_FSL_ESDHC_IMX=y - CONFIG_MTD=y -@@ -61,6 +61,7 @@ CONFIG_DM_REGULATOR_FIXED=y - CONFIG_DM_REGULATOR_GPIO=y - CONFIG_POWER_FSL=y - CONFIG_POWER_I2C=y -+CONFIG_DM_SERIAL=y - CONFIG_MXC_UART=y - CONFIG_USB=y - CONFIG_USB_EHCI_MX5=y -diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig -index 1151ed332c..f53045c977 100644 ---- a/configs/mx6sabreauto_defconfig -+++ b/configs/mx6sabreauto_defconfig -@@ -11,9 +11,6 @@ CONFIG_ENV_SIZE=0x2000 - CONFIG_ENV_OFFSET=0xC0000 - CONFIG_MX6QDL=y - CONFIG_TARGET_MX6SABREAUTO=y --CONFIG_SYS_I2C_MXC_I2C1=y --CONFIG_SYS_I2C_MXC_I2C2=y --CONFIG_SYS_I2C_MXC_I2C3=y - CONFIG_DM_GPIO=y - CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabreauto" - CONFIG_SPL_TEXT_BASE=0x00908000 -@@ -37,7 +34,6 @@ CONFIG_SYS_SPL_MALLOC=y - CONFIG_SPL_FIT_IMAGE_TINY=y - CONFIG_SPL_FS_EXT4=y - CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" --CONFIG_SPL_I2C=y - CONFIG_SPL_USB_HOST=y - CONFIG_SPL_USB_GADGET=y - CONFIG_SPL_USB_SDP_SUPPORT=y -@@ -76,7 +72,6 @@ CONFIG_BOUNCE_BUFFER=y - CONFIG_DFU_MMC=y - CONFIG_DFU_SF=y - CONFIG_DM_I2C=y --CONFIG_SPL_SYS_I2C_LEGACY=y - CONFIG_SYS_I2C_MXC=y - CONFIG_FSL_USDHC=y - CONFIG_MTD=y -@@ -93,10 +88,12 @@ CONFIG_RGMII=y - CONFIG_MII=y - CONFIG_PINCTRL=y - CONFIG_PINCTRL_IMX6=y --CONFIG_POWER_LEGACY=y --CONFIG_POWER_PFUZE100=y -+CONFIG_DM_PMIC=y -+CONFIG_DM_PMIC_PFUZE100=y - CONFIG_DM_REGULATOR=y --CONFIG_POWER_I2C=y -+CONFIG_DM_REGULATOR_PFUZE100=y -+CONFIG_DM_REGULATOR_FIXED=y -+CONFIG_DM_REGULATOR_GPIO=y - CONFIG_DM_SERIAL=y - CONFIG_MXC_UART=y - CONFIG_SPI=y -diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig -index 965536cfb6..2770b12598 100644 ---- a/configs/mx6sabresd_defconfig -+++ b/configs/mx6sabresd_defconfig -@@ -11,9 +11,6 @@ CONFIG_ENV_SIZE=0x2000 - CONFIG_ENV_OFFSET=0xC0000 - CONFIG_MX6QDL=y - CONFIG_TARGET_MX6SABRESD=y --CONFIG_SYS_I2C_MXC_I2C1=y --CONFIG_SYS_I2C_MXC_I2C2=y --CONFIG_SYS_I2C_MXC_I2C3=y - CONFIG_DM_GPIO=y - CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabresd" - CONFIG_SPL_TEXT_BASE=0x00908000 -@@ -82,7 +79,6 @@ CONFIG_FASTBOOT_BUF_SIZE=0x10000000 - CONFIG_FASTBOOT_FLASH=y - CONFIG_FASTBOOT_FLASH_MMC_DEV=2 - CONFIG_DM_I2C=y --CONFIG_SPL_SYS_I2C_LEGACY=y - CONFIG_SYS_I2C_MXC=y - CONFIG_SUPPORT_EMMC_BOOT=y - CONFIG_FSL_USDHC=y -@@ -100,11 +96,12 @@ CONFIG_PCI_SCAN_SHOW=y - CONFIG_PCIE_IMX=y - CONFIG_PINCTRL=y - CONFIG_PINCTRL_IMX6=y --CONFIG_POWER_LEGACY=y --CONFIG_POWER_PFUZE100=y -+CONFIG_DM_PMIC=y -+CONFIG_DM_PMIC_PFUZE100=y - CONFIG_DM_REGULATOR=y - CONFIG_DM_REGULATOR_FIXED=y --CONFIG_POWER_I2C=y -+CONFIG_DM_REGULATOR_PFUZE100=y -+CONFIG_DM_REGULATOR_GPIO=y - CONFIG_DM_SERIAL=y - CONFIG_MXC_UART=y - CONFIG_SPI=y -diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig -index c469084737..2e52e301ae 100644 ---- a/configs/mx6sxsabresd_defconfig -+++ b/configs/mx6sxsabresd_defconfig -@@ -69,6 +69,7 @@ CONFIG_DM_REGULATOR=y - CONFIG_DM_REGULATOR_PFUZE100=y - CONFIG_DM_REGULATOR_FIXED=y - CONFIG_DM_REGULATOR_GPIO=y -+CONFIG_DM_SERIAL=y - CONFIG_MXC_UART=y - CONFIG_SPI=y - CONFIG_DM_SPI=y -diff --git a/configs/n2350_defconfig b/configs/n2350_defconfig -index b85ef0dfeb..247533ebb8 100644 ---- a/configs/n2350_defconfig -+++ b/configs/n2350_defconfig -@@ -69,6 +69,9 @@ CONFIG_SYS_64BIT_LBA=y - CONFIG_DM_I2C=y - CONFIG_SYS_I2C_MVTWSI=y - CONFIG_MTD=y -+CONFIG_MTD_RAW_NAND=y -+CONFIG_NAND_PXA3XX=y -+CONFIG_SYS_NAND_ONFI_DETECTION=y - CONFIG_SF_DEFAULT_SPEED=50000000 - CONFIG_SPI_FLASH_MACRONIX=y - CONFIG_SPI_FLASH_STMICRO=y -diff --git a/configs/neu6a-io-rk3588_defconfig b/configs/neu6a-io-rk3588_defconfig -index c9b2252531..fb1ce4c174 100644 ---- a/configs/neu6a-io-rk3588_defconfig -+++ b/configs/neu6a-io-rk3588_defconfig -@@ -62,5 +62,4 @@ CONFIG_SPL_RAM=y - CONFIG_BAUDRATE=1500000 - CONFIG_DEBUG_UART_SHIFT=2 - CONFIG_SYSRESET=y --# CONFIG_BINMAN_FDT is not set - CONFIG_ERRNO_STR=y -diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig -index 76839e62dd..b936ae1b25 100644 ---- a/configs/nsa310s_defconfig -+++ b/configs/nsa310s_defconfig -@@ -15,8 +15,11 @@ CONFIG_ENV_SIZE=0x20000 - CONFIG_ENV_OFFSET=0xE0000 - CONFIG_DEFAULT_DEVICE_TREE="kirkwood-nsa310s" - CONFIG_SYS_PROMPT="NSA310s> " -+CONFIG_DEBUG_UART_BASE=0xf1012000 -+CONFIG_DEBUG_UART_CLOCK=166666667 - CONFIG_IDENT_STRING="\nZyXEL NSA310S/320S 1/2-Bay Power Media Server" - CONFIG_SYS_LOAD_ADDR=0x800000 -+CONFIG_DEBUG_UART=y - CONFIG_DISTRO_DEFAULTS=y - CONFIG_BOOTDELAY=3 - CONFIG_USE_PREBOOT=y -@@ -50,6 +53,7 @@ CONFIG_MTD_RAW_NAND=y - CONFIG_PHY_MARVELL=y - CONFIG_MVGBE=y - CONFIG_MII=y -+CONFIG_DEBUG_UART_SHIFT=2 - CONFIG_USB=y - CONFIG_USB_EHCI_HCD=y - CONFIG_UBIFS_SILENCE_MSG=y -diff --git a/configs/pico-imx6_defconfig b/configs/pico-imx6_defconfig -index ed15d32d83..300bb61f71 100644 ---- a/configs/pico-imx6_defconfig -+++ b/configs/pico-imx6_defconfig -@@ -82,6 +82,7 @@ CONFIG_RGMII=y - CONFIG_MII=y - CONFIG_PINCTRL=y - CONFIG_PINCTRL_IMX6=y -+CONFIG_DM_SERIAL=y - CONFIG_MXC_UART=y - CONFIG_USB=y - CONFIG_USB_GADGET=y -diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig -index efbfd6559e..37af576493 100644 ---- a/configs/r8a77970_eagle_defconfig -+++ b/configs/r8a77970_eagle_defconfig -@@ -37,7 +37,6 @@ CONFIG_CMD_DFU=y - CONFIG_CMD_GPIO=y - CONFIG_CMD_I2C=y - CONFIG_CMD_SPI=y --CONFIG_CMD_USB=y - CONFIG_CMD_DHCP=y - CONFIG_CMD_MII=y - CONFIG_CMD_PING=y -@@ -82,9 +81,4 @@ CONFIG_DM_SPI=y - CONFIG_RENESAS_RPC_SPI=y - CONFIG_TEE=y - CONFIG_OPTEE=y --CONFIG_USB=y --CONFIG_USB_XHCI_HCD=y --CONFIG_USB_EHCI_HCD=y --CONFIG_USB_EHCI_GENERIC=y --CONFIG_USB_STORAGE=y - CONFIG_OF_LIBFDT_OVERLAY=y -diff --git a/configs/r8a77980_condor_defconfig b/configs/r8a77980_condor_defconfig -index e1b3dc5d38..687a894d80 100644 ---- a/configs/r8a77980_condor_defconfig -+++ b/configs/r8a77980_condor_defconfig -@@ -39,7 +39,6 @@ CONFIG_CMD_GPIO=y - CONFIG_CMD_I2C=y - CONFIG_CMD_MMC=y - CONFIG_CMD_SPI=y --CONFIG_CMD_USB=y - CONFIG_CMD_DHCP=y - CONFIG_CMD_MII=y - CONFIG_CMD_PING=y -@@ -91,9 +90,4 @@ CONFIG_RENESAS_RPC_SPI=y - CONFIG_SYSINFO=y - CONFIG_TEE=y - CONFIG_OPTEE=y --CONFIG_USB=y --CONFIG_USB_XHCI_HCD=y --CONFIG_USB_EHCI_HCD=y --CONFIG_USB_EHCI_GENERIC=y --CONFIG_USB_STORAGE=y - CONFIG_OF_LIBFDT_OVERLAY=y -diff --git a/configs/rock-3a-rk3568_defconfig b/configs/rock-3a-rk3568_defconfig -index e753832183..af1374549d 100644 ---- a/configs/rock-3a-rk3568_defconfig -+++ b/configs/rock-3a-rk3568_defconfig -@@ -69,5 +69,4 @@ CONFIG_BAUDRATE=1500000 - CONFIG_DEBUG_UART_SHIFT=2 - CONFIG_SYS_NS16550_MEM32=y - CONFIG_SYSRESET=y --# CONFIG_BINMAN_FDT is not set - CONFIG_ERRNO_STR=y -diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig -index f3026c7ea1..a14fcd2ee9 100644 ---- a/configs/rock5b-rk3588_defconfig -+++ b/configs/rock5b-rk3588_defconfig -@@ -14,12 +14,15 @@ CONFIG_ROCKCHIP_RK3588=y - CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y - CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y - CONFIG_SPL_MMC=y -+CONFIG_ROCKCHIP_SPI_IMAGE=y - CONFIG_SPL_SERIAL=y - CONFIG_SPL_STACK_R_ADDR=0x600000 - CONFIG_TARGET_ROCK5B_RK3588=y - CONFIG_SPL_STACK=0x400000 - CONFIG_DEBUG_UART_BASE=0xFEB50000 - CONFIG_DEBUG_UART_CLOCK=24000000 -+CONFIG_SPL_SPI_FLASH_SUPPORT=y -+CONFIG_SPL_SPI=y - CONFIG_SYS_LOAD_ADDR=0xc00800 - CONFIG_DEBUG_UART=y - CONFIG_FIT=y -@@ -38,14 +41,21 @@ CONFIG_SPL_BSS_MAX_SIZE=0x4000 - # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set - # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set - CONFIG_SPL_STACK_R=y -+CONFIG_SPL_SPI_LOAD=y -+CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 - CONFIG_SPL_ATF=y -+CONFIG_CMD_GPIO=y - CONFIG_CMD_GPT=y - CONFIG_CMD_MMC=y -+CONFIG_CMD_PCI=y -+CONFIG_CMD_SPI=y -+CONFIG_CMD_USB=y - # CONFIG_CMD_SETEXPR is not set -+CONFIG_CMD_REGULATOR=y - # CONFIG_SPL_DOS_PARTITION is not set - CONFIG_SPL_OF_CONTROL=y - CONFIG_OF_LIVE=y --CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" -+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" - CONFIG_NET_RANDOM_ETHADDR=y - CONFIG_SPL_REGMAP=y - CONFIG_SPL_SYSCON=y -@@ -59,14 +69,34 @@ CONFIG_MMC_DW_ROCKCHIP=y - CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_SDMA=y - CONFIG_MMC_SDHCI_ROCKCHIP=y -+CONFIG_SPI_FLASH_MACRONIX=y - CONFIG_ETH_DESIGNWARE=y - CONFIG_GMAC_ROCKCHIP=y -+CONFIG_PCI=y -+CONFIG_PCIE_DW_ROCKCHIP=y -+CONFIG_PHY_ROCKCHIP_INNO_USB2=y -+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y -+CONFIG_SPL_PINCTRL=y - CONFIG_REGULATOR_PWM=y -+CONFIG_DM_REGULATOR_FIXED=y - CONFIG_PWM_ROCKCHIP=y - CONFIG_SPL_RAM=y - CONFIG_BAUDRATE=1500000 - CONFIG_DEBUG_UART_SHIFT=2 --CONFIG_DEBUG_UART_ANNOUNCE=y -+CONFIG_ROCKCHIP_SFC=y - CONFIG_SYSRESET=y -+CONFIG_USB=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_EHCI_GENERIC=y -+CONFIG_USB_OHCI_HCD=y -+CONFIG_USB_OHCI_GENERIC=y -+CONFIG_USB_HOST_ETHER=y -+CONFIG_USB_ETHER_ASIX=y -+CONFIG_USB_ETHER_ASIX88179=y -+CONFIG_USB_ETHER_LAN75XX=y -+CONFIG_USB_ETHER_LAN78XX=y -+CONFIG_USB_ETHER_MCS7830=y -+CONFIG_USB_ETHER_RTL8152=y -+CONFIG_USB_ETHER_SMSC95XX=y - # CONFIG_BINMAN_FDT is not set - CONFIG_ERRNO_STR=y -diff --git a/configs/s5p4418_nanopi2_defconfig b/configs/s5p4418_nanopi2_defconfig -index 12688e1667..5356161ff0 100644 ---- a/configs/s5p4418_nanopi2_defconfig -+++ b/configs/s5p4418_nanopi2_defconfig -@@ -29,7 +29,6 @@ CONFIG_FIT_BEST_MATCH=y - CONFIG_SUPPORT_RAW_INITRD=y - CONFIG_OF_BOARD_SETUP=y - CONFIG_BOOTDELAY=1 --CONFIG_ARCH_MISC_INIT=y - CONFIG_BOARD_LATE_INIT=y - CONFIG_HUSH_PARSER=y - CONFIG_SYS_PBSIZE=1050 -diff --git a/configs/sam9x60_curiosity_mmc1_defconfig b/configs/sam9x60_curiosity_mmc1_defconfig -index d076ea8b19..4a1b2b9484 100644 ---- a/configs/sam9x60_curiosity_mmc1_defconfig -+++ b/configs/sam9x60_curiosity_mmc1_defconfig -@@ -58,6 +58,7 @@ CONFIG_CLK_CCF=y - CONFIG_CLK_AT91=y - CONFIG_AT91_GENERIC_CLK=y - CONFIG_AT91_SAM9X60_PLL=y -+CONFIG_AT91_SAM9X60_USB=y - CONFIG_CPU=y - CONFIG_AT91_GPIO=y - CONFIG_DM_I2C=y -diff --git a/configs/sam9x60_curiosity_mmc_defconfig b/configs/sam9x60_curiosity_mmc_defconfig -index 6e550dc34d..f9ab17ab7e 100644 ---- a/configs/sam9x60_curiosity_mmc_defconfig -+++ b/configs/sam9x60_curiosity_mmc_defconfig -@@ -54,6 +54,7 @@ CONFIG_CLK_CCF=y - CONFIG_CLK_AT91=y - CONFIG_AT91_GENERIC_CLK=y - CONFIG_AT91_SAM9X60_PLL=y -+CONFIG_AT91_SAM9X60_USB=y - CONFIG_CPU=y - CONFIG_AT91_GPIO=y - CONFIG_DM_I2C=y -diff --git a/configs/sam9x60ek_mmc_defconfig b/configs/sam9x60ek_mmc_defconfig -index 2caeacc230..b0307ec5a9 100644 ---- a/configs/sam9x60ek_mmc_defconfig -+++ b/configs/sam9x60ek_mmc_defconfig -@@ -59,6 +59,7 @@ CONFIG_CLK_CCF=y - CONFIG_CLK_AT91=y - CONFIG_AT91_GENERIC_CLK=y - CONFIG_AT91_SAM9X60_PLL=y -+CONFIG_AT91_SAM9X60_USB=y - CONFIG_CPU=y - CONFIG_AT91_GPIO=y - CONFIG_DM_I2C=y -diff --git a/configs/sam9x60ek_nandflash_defconfig b/configs/sam9x60ek_nandflash_defconfig -index d1fd5e8723..4c58178a8c 100644 ---- a/configs/sam9x60ek_nandflash_defconfig -+++ b/configs/sam9x60ek_nandflash_defconfig -@@ -61,6 +61,7 @@ CONFIG_CLK_CCF=y - CONFIG_CLK_AT91=y - CONFIG_AT91_GENERIC_CLK=y - CONFIG_AT91_SAM9X60_PLL=y -+CONFIG_AT91_SAM9X60_USB=y - CONFIG_CPU=y - CONFIG_AT91_GPIO=y - CONFIG_DM_I2C=y -diff --git a/configs/sam9x60ek_qspiflash_defconfig b/configs/sam9x60ek_qspiflash_defconfig -index 9d2f97551a..32aa49d41f 100644 ---- a/configs/sam9x60ek_qspiflash_defconfig -+++ b/configs/sam9x60ek_qspiflash_defconfig -@@ -61,6 +61,7 @@ CONFIG_CLK_CCF=y - CONFIG_CLK_AT91=y - CONFIG_AT91_GENERIC_CLK=y - CONFIG_AT91_SAM9X60_PLL=y -+CONFIG_AT91_SAM9X60_USB=y - CONFIG_CPU=y - CONFIG_AT91_GPIO=y - CONFIG_DM_I2C=y -diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig -index 89cba40713..af2c56ad4c 100644 ---- a/configs/sandbox64_defconfig -+++ b/configs/sandbox64_defconfig -@@ -58,6 +58,7 @@ CONFIG_CMD_SPI=y - CONFIG_CMD_TEMPERATURE=y - CONFIG_CMD_USB=y - CONFIG_CMD_WDT=y -+CONFIG_CMD_WRITE=y - CONFIG_CMD_CAT=y - CONFIG_BOOTP_DNS2=y - CONFIG_CMD_TFTPPUT=y -diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig -index ce32dfc23a..cbace259f8 100644 ---- a/configs/sandbox_defconfig -+++ b/configs/sandbox_defconfig -@@ -78,12 +78,14 @@ CONFIG_CMD_MMC=y - CONFIG_CMD_MUX=y - CONFIG_CMD_OSD=y - CONFIG_CMD_PCI=y -+CONFIG_CMD_PCI_MPS=y - CONFIG_CMD_READ=y - CONFIG_CMD_REMOTEPROC=y - CONFIG_CMD_SPI=y - CONFIG_CMD_TEMPERATURE=y - CONFIG_CMD_USB=y - CONFIG_CMD_WDT=y -+CONFIG_CMD_WRITE=y - CONFIG_CMD_AXI=y - CONFIG_CMD_CAT=y - CONFIG_CMD_SETEXPR_FMT=y -@@ -267,6 +269,7 @@ CONFIG_SANDBOX_RESET=y - CONFIG_RESET_SYSCON=y - CONFIG_RESET_SCMI=y - CONFIG_DM_RTC=y -+CONFIG_RTC_MAX313XX=y - CONFIG_RTC_RV8803=y - CONFIG_RTC_HT1380=y - CONFIG_SCSI=y -@@ -298,6 +301,7 @@ CONFIG_USB_GADGET_DOWNLOAD=y - CONFIG_USB_ETHER=y - CONFIG_USB_ETH_CDC=y - CONFIG_VIDEO=y -+CONFIG_VIDEO_FONT_SUN12X22=y - CONFIG_VIDEO_COPY=y - CONFIG_CONSOLE_ROTATION=y - CONFIG_CONSOLE_TRUETYPE=y -diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig -index 103877b2cd..e9fcc5b0cb 100644 ---- a/configs/sandbox_flattree_defconfig -+++ b/configs/sandbox_flattree_defconfig -@@ -206,6 +206,7 @@ CONFIG_USB=y - CONFIG_USB_EMUL=y - CONFIG_USB_KEYBOARD=y - CONFIG_VIDEO=y -+CONFIG_VIDEO_FONT_SUN12X22=y - CONFIG_CONSOLE_ROTATION=y - CONFIG_CONSOLE_TRUETYPE=y - CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y -diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig -index 24655131a8..df8b31b4e7 100644 ---- a/configs/socrates_defconfig -+++ b/configs/socrates_defconfig -@@ -18,7 +18,6 @@ CONFIG_SYS_MONITOR_LEN=786432 - CONFIG_FIT=y - CONFIG_FIT_SIGNATURE=y - CONFIG_FIT_VERBOSE=y --CONFIG_LEGACY_IMAGE_FORMAT=y - CONFIG_OF_BOARD_SETUP=y - CONFIG_BOOTDELAY=1 - CONFIG_AUTOBOOT_KEYED=y -diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig -index 0c3381461e..6df74b5077 100644 ---- a/configs/tuge1_defconfig -+++ b/configs/tuge1_defconfig -@@ -85,34 +85,6 @@ CONFIG_LBLAW2=y - CONFIG_LBLAW2_BASE=0xA0000000 - CONFIG_LBLAW2_NAME="APP1" - CONFIG_LBLAW2_LENGTH_256_MBYTES=y --CONFIG_ELBC_BR0_OR0=y --CONFIG_BR0_OR0_NAME="FLASH" --CONFIG_BR0_OR0_BASE=0xF0000000 --CONFIG_BR0_PORTSIZE_16BIT=y --CONFIG_OR0_AM_256_MBYTES=y --CONFIG_OR0_SCY_5=y --CONFIG_OR0_CSNT_EARLIER=y --CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y --CONFIG_OR0_TRLX_RELAXED=y --CONFIG_OR0_EAD_EXTRA=y --CONFIG_ELBC_BR1_OR1=y --CONFIG_BR1_OR1_NAME="KMBEC_FPGA" --CONFIG_BR1_OR1_BASE=0xE8000000 --CONFIG_OR1_AM_128_MBYTES=y --CONFIG_OR1_SCY_2=y --CONFIG_OR1_CSNT_EARLIER=y --CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y --CONFIG_OR1_TRLX_RELAXED=y --CONFIG_OR1_EAD_EXTRA=y --CONFIG_ELBC_BR2_OR2=y --CONFIG_BR2_OR2_NAME="APP1" --CONFIG_BR2_OR2_BASE=0xA0000000 --CONFIG_OR2_AM_256_MBYTES=y --CONFIG_OR2_SCY_2=y --CONFIG_OR2_CSNT_EARLIER=y --CONFIG_OR2_ACS_QUARTER_CYCLE_EARLIER=y --CONFIG_OR2_TRLX_RELAXED=y --CONFIG_OR2_EAD_EXTRA=y - CONFIG_HID0_FINAL_EMCP=y - CONFIG_HID0_FINAL_ICE=y - CONFIG_HID2_HBE=y -diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig -index 4f192ad262..837098f0e5 100644 ---- a/configs/tuxx1_defconfig -+++ b/configs/tuxx1_defconfig -@@ -99,42 +99,6 @@ CONFIG_LBLAW3=y - CONFIG_LBLAW3_BASE=0xB0000000 - CONFIG_LBLAW3_NAME="APP2" - CONFIG_LBLAW3_LENGTH_256_MBYTES=y --CONFIG_ELBC_BR0_OR0=y --CONFIG_BR0_OR0_NAME="FLASH" --CONFIG_BR0_OR0_BASE=0xF0000000 --CONFIG_BR0_PORTSIZE_16BIT=y --CONFIG_OR0_AM_256_MBYTES=y --CONFIG_OR0_SCY_5=y --CONFIG_OR0_CSNT_EARLIER=y --CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y --CONFIG_OR0_TRLX_RELAXED=y --CONFIG_OR0_EAD_EXTRA=y --CONFIG_ELBC_BR1_OR1=y --CONFIG_BR1_OR1_NAME="KMBEC_FPGA" --CONFIG_BR1_OR1_BASE=0xE8000000 --CONFIG_OR1_AM_128_MBYTES=y --CONFIG_OR1_SCY_2=y --CONFIG_OR1_CSNT_EARLIER=y --CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y --CONFIG_OR1_TRLX_RELAXED=y --CONFIG_OR1_EAD_EXTRA=y --CONFIG_ELBC_BR2_OR2=y --CONFIG_BR2_OR2_NAME="APP1" --CONFIG_BR2_OR2_BASE=0xA0000000 --CONFIG_OR2_AM_256_MBYTES=y --CONFIG_OR2_SCY_2=y --CONFIG_OR2_CSNT_EARLIER=y --CONFIG_OR2_ACS_QUARTER_CYCLE_EARLIER=y --CONFIG_OR2_TRLX_RELAXED=y --CONFIG_OR2_EAD_EXTRA=y --CONFIG_ELBC_BR3_OR3=y --CONFIG_BR3_OR3_NAME="APP2" --CONFIG_BR3_OR3_BASE=0xB0000000 --CONFIG_OR3_AM_256_MBYTES=y --CONFIG_OR3_SCY_2=y --CONFIG_OR3_CSNT_EARLIER=y --CONFIG_OR3_ACS_HALF_CYCLE_EARLIER=y --CONFIG_OR3_TRLX_RELAXED=y - CONFIG_HID0_FINAL_EMCP=y - CONFIG_HID0_FINAL_ICE=y - CONFIG_HID2_HBE=y -diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig -index 6be8fad1e9..d7f1c98920 100644 ---- a/configs/udoo_defconfig -+++ b/configs/udoo_defconfig -@@ -55,5 +55,6 @@ CONFIG_MII=y - CONFIG_PINCTRL=y - CONFIG_PINCTRL_IMX6=y - CONFIG_DM_SCSI=y -+CONFIG_DM_SERIAL=y - CONFIG_MXC_UART=y - CONFIG_DM_THERMAL=y -diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig -index 501d0ebdd5..b7b86b668c 100644 ---- a/configs/uniphier_v7_defconfig -+++ b/configs/uniphier_v7_defconfig -@@ -82,7 +82,6 @@ CONFIG_TIMER=y - CONFIG_SPL_TIMER=y - CONFIG_USB=y - CONFIG_USB_XHCI_HCD=y --CONFIG_USB_XHCI_DWC3=y - CONFIG_USB_EHCI_HCD=y - CONFIG_USB_EHCI_GENERIC=y - CONFIG_USB_DWC3=y -diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig -index 6a0e2666cf..ed58b5746e 100644 ---- a/configs/uniphier_v8_defconfig -+++ b/configs/uniphier_v8_defconfig -@@ -71,7 +71,6 @@ CONFIG_SYSRESET=y - CONFIG_SYSRESET_PSCI=y - CONFIG_USB=y - CONFIG_USB_XHCI_HCD=y --CONFIG_USB_XHCI_DWC3=y - CONFIG_USB_EHCI_HCD=y - CONFIG_USB_EHCI_GENERIC=y - CONFIG_USB_DWC3=y -diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig -index 359e51ab1b..4efe6f9c21 100644 ---- a/configs/verdin-imx8mp_defconfig -+++ b/configs/verdin-imx8mp_defconfig -@@ -50,6 +50,7 @@ CONFIG_SPL_BOARD_INIT=y - CONFIG_SPL_BOOTROM_SUPPORT=y - CONFIG_SPL_SYS_MALLOC_SIMPLE=y - # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -+CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000 - CONFIG_SYS_SPL_MALLOC=y - CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y - CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 -diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig -index e0ea5feddf..6a1bf8d97e 100644 ---- a/configs/wandboard_defconfig -+++ b/configs/wandboard_defconfig -@@ -70,6 +70,7 @@ CONFIG_MII=y - CONFIG_PINCTRL=y - CONFIG_PINCTRL_IMX6=y - CONFIG_DM_PMIC=y -+CONFIG_SPL_DM_PMIC=y - CONFIG_DM_PMIC_PFUZE100=y - CONFIG_DM_SCSI=y - CONFIG_DM_SERIAL=y -diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig -index 17f7412c96..aae01dfbdc 100644 ---- a/configs/xilinx_versal_net_virt_defconfig -+++ b/configs/xilinx_versal_net_virt_defconfig -@@ -48,6 +48,7 @@ CONFIG_CMD_CACHE=y - CONFIG_CMD_EFIDEBUG=y - CONFIG_CMD_TIME=y - CONFIG_CMD_TIMER=y -+CONFIG_CMD_SMC=y - CONFIG_CMD_EXT4_WRITE=y - CONFIG_CMD_SQUASHFS=y - CONFIG_CMD_MTDPARTS=y -diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig -index c87f21b360..018ec72765 100644 ---- a/configs/xilinx_versal_virt_defconfig -+++ b/configs/xilinx_versal_virt_defconfig -@@ -48,6 +48,7 @@ CONFIG_CMD_CACHE=y - CONFIG_CMD_EFIDEBUG=y - CONFIG_CMD_TIME=y - CONFIG_CMD_TIMER=y -+CONFIG_CMD_SMC=y - CONFIG_CMD_EXT4_WRITE=y - CONFIG_CMD_SQUASHFS=y - CONFIG_CMD_MTDPARTS=y -diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig -index fb91449ef7..fb6bf62265 100644 ---- a/configs/xilinx_zynqmp_virt_defconfig -+++ b/configs/xilinx_zynqmp_virt_defconfig -@@ -92,6 +92,7 @@ CONFIG_CMD_TIME=y - CONFIG_CMD_GETTIME=y - CONFIG_CMD_TIMER=y - CONFIG_CMD_REGULATOR=y -+CONFIG_CMD_SMC=y - CONFIG_CMD_TPM=y - CONFIG_CMD_EXT4_WRITE=y - CONFIG_CMD_SQUASHFS=y -diff --git a/disk/Kconfig b/disk/Kconfig -index c9b9dbaf1a..817b7c8c76 100644 ---- a/disk/Kconfig -+++ b/disk/Kconfig -@@ -149,6 +149,7 @@ config SPL_PARTITION_UUIDS - bool "Enable support of UUID for partition in SPL" - depends on SPL_PARTITIONS - default y if SPL_EFI_PARTITION -+ select SPL_LIB_UUID - - config PARTITION_TYPE_GUID - bool "Enable support of GUID for partition type" -@@ -157,4 +158,11 @@ config PARTITION_TYPE_GUID - Activate the configuration of GUID type - for EFI partition - -+config SPL_PARTITION_TYPE_GUID -+ bool "Enable support of GUID for partition type (SPL)" -+ depends on SPL_EFI_PARTITION -+ help -+ Activate the configuration of GUID type -+ for EFI partition -+ - endmenu -diff --git a/doc/README.TPL b/doc/README.TPL -index 72027fd692..95b466e4af 100644 ---- a/doc/README.TPL -+++ b/doc/README.TPL -@@ -35,8 +35,8 @@ is set. Source files can be compiled for TPL with options chosen in the - board config file. - - TPL use a small device tree (u-boot-tpl.dtb), containing only the nodes with --the pre-relocation properties: 'u-boot,dm-pre-reloc' and 'u-boot,dm-tpl' --(see README.SPL for details). -+the pre-relocation properties: 'bootph-all' and 'bootph-pre-sram' -+(see doc/develop/spl.rst for details). - - For example: - -diff --git a/doc/arch/sandbox/sandbox.rst b/doc/arch/sandbox/sandbox.rst -index cd7f8a2cb0..77ca6bc4cc 100644 ---- a/doc/arch/sandbox/sandbox.rst -+++ b/doc/arch/sandbox/sandbox.rst -@@ -388,7 +388,7 @@ The device can be marked removeable with 'host bind -r'. - A disk image can be created using the following commands:: - - $> truncate -s 1200M ./disk.raw -- $> echo -e "label: gpt\n,64M,U\n,,L" | /usr/sbin/sgdisk ./disk.raw -+ $> /usr/sbin/sgdisk --new=1:0:+64M --typecode=1:EF00 --new=2:0:0 --typecode=2:8300 disk.raw - $> lodev=`sudo losetup -P -f --show ./disk.raw` - $> sudo mkfs.vfat -n EFI -v ${lodev}p1 - $> sudo mkfs.ext4 -L ROOT -v ${lodev}p2 -diff --git a/doc/board/kontron/sl-mx8mm.rst b/doc/board/kontron/sl-mx8mm.rst -index 09c50aa8b1..702db60fe3 100644 ---- a/doc/board/kontron/sl-mx8mm.rst -+++ b/doc/board/kontron/sl-mx8mm.rst -@@ -40,7 +40,7 @@ There are two sources for the TF-A. Mainline and NXP. Get the one you prefer - - **NXP's imx-atf** - --1. Get TF-A from: https://github.com/nxp-imx/imx-atf, branch: imx_5.4.70_2.3.0 -+1. Get TF-A from: https://github.com/nxp-imx/imx-atf, branch: lf_v2.6 - 2. Build - - .. code-block:: bash -diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst -index b5563b8f7f..1f88d15aad 100644 ---- a/doc/board/rockchip/rockchip.rst -+++ b/doc/board/rockchip/rockchip.rst -@@ -185,6 +185,15 @@ To build rk3568 boards: - make evb-rk3568_defconfig - make CROSS_COMPILE=aarch64-linux-gnu- - -+To build rk3588 boards: -+ -+.. code-block:: bash -+ -+ export BL31=../rkbin/bin/rk35/rk3588_bl31_v1.27.elf -+ export ROCKCHIP_TPL=../rkbin/bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2736MHz_v1.08.bin -+ make rock5b-rk3588_defconfig -+ make CROSS_COMPILE=aarch64-linux-gnu- -+ - Flashing - -------- - -diff --git a/doc/board/siemens/iot2050.rst b/doc/board/siemens/iot2050.rst -index 7e97f817ce..074d6aa15a 100644 ---- a/doc/board/siemens/iot2050.rst -+++ b/doc/board/siemens/iot2050.rst -@@ -6,7 +6,9 @@ SIMATIC IOT2050 BASIC and ADVANCED - - The SIMATIC IOT2050 is an open industrial IoT gateway that is using the TI - AM6528 GP (Basic variant) or the AM6548 HS (Advanced variant). The Advanced --variant is prepared for secure boot. -+variant is prepared for secure boot. M.2 Variant also uses the AM6548 HS. -+Instead of a MiniPCI connector, it comes with two M.2 connectors and can -+support 5G/WIFI/BT applications or connect an SSD. - - The IOT2050 starts only from OSPI. It loads a Siemens-provided bootloader - called SE-Boot for the MCU domain (R5F cores), then hands over to ATF and -@@ -24,11 +26,20 @@ Binary dependencies can be found in - https://github.com/siemens/meta-iot2050/tree/master/recipes-bsp/u-boot/files/prebuild. - The following binaries from that source need to be present in the build folder: - -- - tiboot3.bin -- - sysfw.itb -- - sysfw.itb_HS -- - sysfw_sr2.itb -- - sysfw_sr2.itb_HS -+ - seboot_pg1.bin -+ - seboot_pg2.bin -+ -+When using the watchdog, a related firmware for the R5 core(s) is needed, e.g. -+https://github.com/siemens/k3-rti-wdt. The name and location of the image is -+configured via CONFIG_WDT_K3_RTI_FW_FILE. -+ -+For building an image containing the OTP key provisioning data, below binary -+needs to be present in the build folder: -+ -+ - otpcmd.bin -+ -+Regarding how to generating this otpcmd.bin, please refer to: -+https://github.com/siemens/meta-iot2050/tree/master/recipes-bsp/secure-boot-otp-provisioning/files/make-otpcmd.sh - - Building - -------- -@@ -57,7 +68,13 @@ U-Boot: - - $ export ATF=/path/to/bl31.bin - $ export TEE=/path/to/tee-pager_v2.bin -- $ make iot2050_defconfig -+ -+ # configure for PG1 -+ $ make iot2050_pg1_defconfig -+ -+ # or configure for PG2 or the M.2 variant -+ $ make iot2050_pg2_defconfig -+ - $ make - - Flashing -@@ -76,3 +93,73 @@ Via external programmer Dediprog SF100 or SF600: - .. code-block:: text - - $ dpcmd --vcc 2 -v -u flash.bin -+ -+Signing (optional) -+------------------ -+ -+To enable verified boot for the firmware artifacts after the Siemens-managed -+first-stage loader (seboot_pg*.bin), the following steps need to be taken -+before and after the build: -+ -+Generate dtsi holding the public key -+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ -+ -+.. code-block:: text -+ -+ tools/key2dtsi.py -c -s key.pem public-key.dtsi -+ -+This will be used to embed the public key into U-Boot SPL and main so that each -+step can validate signatures of the succeeding one. -+ -+Adjust U-Boot configuration -+^^^^^^^^^^^^^^^^^^^^^^^^^^^ -+ -+Enabled at least the following options in U-Boot: -+ -+.. code-block:: text -+ -+ CONFIG_SPL_FIT_SIGNATURE=y -+ CONFIG_DEVICE_TREE_INCLUDES="/path/to/public-key.dtsi" -+ CONFIG_RSA=y -+ -+Note that there are more configuration changes needed in order to lock-down -+the command line and the boot process of U-Boot for secure scenarios. These are -+not in scope here. -+ -+Build U-Boot -+^^^^^^^^^^^^ -+ -+See related section above. -+ -+Sign flash.bin -+^^^^^^^^^^^^^^ -+ -+In the build folder still containing artifacts from step 3, invoke: -+ -+.. code-block:: text -+ -+ tools/iot2050-sign-fw.sh /path/to/key.pem -+ -+Flash signed flash.bin -+^^^^^^^^^^^^^^^^^^^^^^ -+ -+The signing has happen in-place in flash.bin, thus the flashing procedure -+described above. -+ -+M.2 slot configuration -+---------------------- -+ -+The M.2 variant of the IOT2050 comes with one B-keyed and one E-keyed slot. -+These are configured by U-Boot depending on the detected usage (auto -+configuration). The device tree loaded later on for the OS will be fixed up -+by U-Boot according to this configuration. -+ -+For the case auto configuration does not work reliably, it is possible to set -+the U-Boot environment variable "m2_manual_config" to select the mode manually: -+ -+"0" - B-key: PCIe x2, USB 2.0 -+ E-key: USB 2.0 -+"1" - B-key: PCIe, USB 2.0 -+ E-key: PCIe, USB 2.0 -+"2" - B-key: USB 3.0, -+ E-key: PCIe, USB 2.0 -diff --git a/doc/build/reproducible.rst b/doc/build/reproducible.rst -index 5423080633..8b030f469d 100644 ---- a/doc/build/reproducible.rst -+++ b/doc/build/reproducible.rst -@@ -23,3 +23,5 @@ This date is shown when we launch U-Boot: - - ./u-boot -T - U-Boot 2023.01 (Jan 01 2023 - 00:00:00 +0000) -+ -+The same effect can be obtained with buildman using the `-r` flag. -diff --git a/doc/develop/bootstd.rst b/doc/develop/bootstd.rst -index dabe987c0d..5dfa6cfce5 100644 ---- a/doc/develop/bootstd.rst -+++ b/doc/develop/bootstd.rst -@@ -489,22 +489,22 @@ in a valid bootflow, whether to iterate through just a single bootdev, etc. - Then the iterator is set up to according to the parameters given: - - - When `dev` is provided, then a single bootdev is scanned. In this case, -- `BOOTFLOWF_SKIP_GLOBAL` and `BOOTFLOWF_SINGLE_DEV` are set. No hunters are -+ `BOOTFLOWIF_SKIP_GLOBAL` and `BOOTFLOWIF_SINGLE_DEV` are set. No hunters are - used in this case - - - Otherwise, when `label` is provided, then a single label or named bootdev is -- scanned. In this case `BOOTFLOWF_SKIP_GLOBAL` is set and there are three -+ scanned. In this case `BOOTFLOWIF_SKIP_GLOBAL` is set and there are three - options (with an effect on the `iter_incr()` function described later): - - - If `label` indicates a numeric bootdev number (e.g. "2") then - `BOOTFLOW_METHF_SINGLE_DEV` is set. In this case, moving to the next bootdev - simple stops, since there is only one. No hunters are used. - - If `label` indicates a particular media device (e.g. "mmc1") then -- `BOOTFLOWF_SINGLE_MEDIA` is set. In this case, moving to the next bootdev -+ `BOOTFLOWIF_SINGLE_MEDIA` is set. In this case, moving to the next bootdev - processes just the children of the media device. Hunters are used, in this - example just the "mmc" hunter. - - If `label` indicates a media uclass (e.g. "mmc") then -- `BOOTFLOWF_SINGLE_UCLASS` is set. In this case, all bootdevs in that uclass -+ `BOOTFLOWIF_SINGLE_UCLASS` is set. In this case, all bootdevs in that uclass - are used. Hunters are used, in this example just the "mmc" hunter - - - Otherwise, none of the above flags is set and iteration is set up to work -@@ -543,7 +543,7 @@ bootdev. - With the iterator ready, `bootflow_scan_first()` checks whether the current - settings produce a valid bootflow. This is handled by `bootflow_check()`, which - either returns 0 (if it got something) or an error if not (more on that later). --If the `BOOTFLOWF_ALL` iterator flag is set, even errors are returned as -+If the `BOOTFLOWIF_ALL` iterator flag is set, even errors are returned as - incomplete bootflows, but normally an error results in moving onto the next - iteration. - -@@ -651,7 +651,7 @@ e.g. updating the state, depending on what it finds. For global bootmeths the - Based on what the bootdev or bootmeth responds with, `bootflow_check()` either - returns a valid bootflow, or a partial one with an error. A partial bootflow - is one that has some fields set up, but did not reach the `BOOTFLOWST_READY` --state. As noted before, if the `BOOTFLOWF_ALL` iterator flag is set, then all -+state. As noted before, if the `BOOTFLOWIF_ALL` iterator flag is set, then all - bootflows are returned, even partial ones. This can help with debugging. - - So at this point you can see that total control over whether a bootflow can -diff --git a/doc/develop/driver-model/design.rst b/doc/develop/driver-model/design.rst -index 20611e85e3..8c2c81d7ac 100644 ---- a/doc/develop/driver-model/design.rst -+++ b/doc/develop/driver-model/design.rst -@@ -1114,12 +1114,12 @@ Pre-Relocation Support - ---------------------- - - For pre-relocation we simply call the driver model init function. Only --drivers marked with DM_FLAG_PRE_RELOC or the device tree 'u-boot,dm-pre-reloc' -+drivers marked with DM_FLAG_PRE_RELOC or the device tree 'bootph-all' - property are initialised prior to relocation. This helps to reduce the driver - model overhead. This flag applies to SPL and TPL as well, if device tree is - enabled (CONFIG_OF_CONTROL) there. - --Note when device tree is enabled, the device tree 'u-boot,dm-pre-reloc' -+Note when device tree is enabled, the device tree 'bootph-all' - property can provide better control granularity on which device is bound - before relocation. While with DM_FLAG_PRE_RELOC flag of the driver all - devices with the same driver are bound, which requires allocation a large -@@ -1128,14 +1128,15 @@ only way for statically declared devices via U_BOOT_DRVINFO() to be bound - prior to relocation. - - It is possible to limit this to specific relocation steps, by using --the more specialized 'u-boot,dm-spl' and 'u-boot,dm-tpl' flags --in the device tree node. For U-Boot proper you can use 'u-boot,dm-pre-proper' -+the more specialized 'bootph-pre-ram' and 'bootph-pre-sram' flags -+in the device tree node. For U-Boot proper you can use 'bootph-some-ram' - which means that it will be processed (and a driver bound) in U-Boot proper - prior to relocation, but will not be available in SPL or TPL. - --To reduce the size of SPL and TPL, only the nodes with pre-relocation properties --('u-boot,dm-pre-reloc', 'u-boot,dm-spl' or 'u-boot,dm-tpl') are keept in their --device trees (see README.SPL for details); the remaining nodes are always bound. -+To reduce the size of SPL and TPL, only the nodes with pre-relocation -+properties ('bootph-all', 'bootph-pre-ram' or 'bootph-pre-sram') are kept in -+their device trees (see README.SPL for details); the remaining nodes are -+always bound. - - Then post relocation we throw that away and re-init driver model again. - For drivers which require some sort of continuity between pre- and -diff --git a/doc/develop/driver-model/fs_firmware_loader.rst b/doc/develop/driver-model/fs_firmware_loader.rst -index a44708cb4c..b0823700a9 100644 ---- a/doc/develop/driver-model/fs_firmware_loader.rst -+++ b/doc/develop/driver-model/fs_firmware_loader.rst -@@ -28,7 +28,7 @@ defined in fs-loader node as shown in below: - Example for block device:: - - fs_loader0: fs-loader { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "u-boot,fs-loader"; - phandlepart = <&mmc 1>; - }; -@@ -41,7 +41,7 @@ device, it can be described in FDT as shown in below: - Example for ubi:: - - fs_loader1: fs-loader { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "u-boot,fs-loader"; - mtdpart = "UBI", - ubivol = "ubi0"; -diff --git a/doc/develop/driver-model/of-plat.rst b/doc/develop/driver-model/of-plat.rst -index b454f7be85..01724ba72c 100644 ---- a/doc/develop/driver-model/of-plat.rst -+++ b/doc/develop/driver-model/of-plat.rst -@@ -67,7 +67,7 @@ device. As an example, consider this MMC node: - pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>; - vmmc-supply = <&vcc_sd>; - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - -@@ -632,7 +632,7 @@ the devicetree. For example, if the devicetree has:: - grf: grf@20008000 { - compatible = "rockchip,rk3188-grf", "syscon"; - reg = <0x20008000 0x200>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; - - then dtoc looks at the first compatible string ("rockchip,rk3188-grf"), -@@ -685,21 +685,22 @@ indicates that the two nodes have different phase settings. Looking at the - source .dts:: - - i2c_emul: emul { -- u-boot,dm-spl; -+ bootph-pre-ram; - reg = <0xff>; - compatible = "sandbox,i2c-emul-parent"; - emul0: emul0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "sandbox,i2c-rtc-emul"; - #emul-cells = <0>; - }; - }; - --you can see that the child node 'emul0' usees 'u-boot,dm-pre-reloc', indicating --that the node is present in all SPL builds, but its parent uses 'u-boot,dm-spl' --indicating it is only present in SPL, not TPL. For a TPL build, this will fail --with the above message. The fix is to change 'emul0' to use the same --'u-boot,dm-spl' condition, so that it is not present in TPL, like its parent. -+you can see that the child node 'emul0' usees 'bootph-all', indicating -+that the node is present in all SPL builds, but its parent uses -+'bootph-pre-ram' indicating it is only present in SPL, not TPL. For a TPL -+build, this will fail with the above message. The fix is to change 'emul0' to -+use the same 'bootph-pre-ram' condition, so that it is not present in TPL, -+like its parent. - - Link errors / undefined reference - ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -@@ -715,16 +716,16 @@ you get a link error, e.g.:: - The first one indicates that the device cannot find its driver. This means that - there is a driver 'sandbox_spl_test' but it is not compiled into the build. - Check your Kconfig settings to make sure it is. If you don't want that in the --build, adjust your phase settings, e.g. by using 'u-boot,dm-spl' in the node -+build, adjust your phase settings, e.g. by using 'bootph-pre-ram' in the node - to exclude it from the TPL build:: - - spl-test5 { -- u-boot,dm-tpl; -+ bootph-pre-sram; - compatible = "sandbox,spl-test"; - stringarray = "tpl"; - }; - --We can drop the 'u-boot,dm-tpl' line so this node won't appear in the TPL -+We can drop the 'bootph-pre-sram' line so this node won't appear in the TPL - devicetree and thus the driver won't be needed. - - The second error above indicates that the MISC uclass is needed by the driver -diff --git a/doc/develop/driver-model/pci-info.rst b/doc/develop/driver-model/pci-info.rst -index 251601a51e..dea595b6cf 100644 ---- a/doc/develop/driver-model/pci-info.rst -+++ b/doc/develop/driver-model/pci-info.rst -@@ -52,7 +52,7 @@ their drivers accordingly. A working example like below:: - #address-cells = <3>; - #size-cells = <2>; - compatible = "pci-x86"; -- u-boot,dm-pre-reloc; -+ bootph-all; - ranges = <0x02000000 0x0 0x40000000 0x40000000 0 0x80000000 - 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000 - 0x01000000 0x0 0x2000 0x2000 0 0xe000>; -@@ -61,14 +61,14 @@ their drivers accordingly. A working example like below:: - #address-cells = <3>; - #size-cells = <2>; - compatible = "pci-bridge"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x0000b800 0x0 0x0 0x0 0x0>; - - topcliff@0,0 { - #address-cells = <3>; - #size-cells = <2>; - compatible = "pci-bridge"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x00010000 0x0 0x0 0x0 0x0>; - - pciuart0: uart@a,1 { -@@ -77,7 +77,7 @@ their drivers accordingly. A working example like below:: - "pciclass,070002", - "pciclass,0700", - "x86-uart"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x00025100 0x0 0x0 0x0 0x0 - 0x01025110 0x0 0x0 0x0 0x0>; - ...... -@@ -98,7 +98,7 @@ bus hierarchy: on the root PCI bus, there is a PCIe root port which connects - to a downstream device Topcliff chipset. Inside Topcliff chipset, it has a - PCIe-to-PCI bridge and all the chipset integrated devices like the PCI UART - device are on the PCI bus. Like other devices in the device tree, if we want --to bind PCI devices before relocation, "u-boot,dm-pre-reloc" must be declared -+to bind PCI devices before relocation, "bootph-all" must be declared - in each of these nodes. - - If PCI devices are not listed in the device tree, U_BOOT_PCI_DEVICE can be used -diff --git a/doc/develop/driver-model/serial-howto.rst b/doc/develop/driver-model/serial-howto.rst -index 5b1d57d83a..17b53e3cab 100644 ---- a/doc/develop/driver-model/serial-howto.rst -+++ b/doc/develop/driver-model/serial-howto.rst -@@ -62,7 +62,7 @@ what you need. U-Boot automatically includes these files: see :ref:`dttweaks`. - Here are some things you might need to consider: - - 1. The serial driver itself needs to be present before relocation, so that the -- U-Boot banner appears. Make sure it has a u-boot,dm-pre-reloc tag in the device -+ U-Boot banner appears. Make sure it has a bootph-all tag in the device - tree, so that the serial driver is bound when U-Boot starts. - - For example, on iMX8:: -@@ -75,11 +75,11 @@ Here are some things you might need to consider: - put this in your xxx-u-boot.dtsi file:: - - &lpuart3 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - 2. If your serial port requires a particular pinmux configuration, you may need -- a pinctrl driver. This needs to have a u-boot,dm-pre-reloc tag also. Take care -+ a pinctrl driver. This needs to have a bootph-all tag also. Take care - that any subnodes have the same tag, if they are needed to make the correct - pinctrl available. - -@@ -107,15 +107,15 @@ Here are some things you might need to consider: - parents, so put this in your xxx-u-boot.dtsi file:: - - &pinctrl { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - &uart2_xfer { -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - 3. The same applies to power domains. For example, if a particular power domain -@@ -125,11 +125,11 @@ Here are some things you might need to consider: - For example, on iMX8, put this in your xxx-u-boot.dtsi file:: - - &pd_dma { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - &pd_dma_lpuart3 { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - }; - - 4. The same applies to clocks, in the same way. Make sure that when your driver -@@ -168,10 +168,10 @@ some customisation. - Serial in SPL - ------------- - --A similar process is needed in SPL, but in this case the u-boot,dm-spl or --u-boot,dm-tpl tags are used. Add these in the same way as above, to ensure that --the SPL device tree contains the required nodes (see spl/u-boot-spl.dtb for --what it actually contains). -+A similar process is needed in SPL, but in this case the bootph-pre-ram or -+bootph-pre-sram tags are used. Add these in the same way as above, to ensure -+that the SPL device tree contains the required nodes (see spl/u-boot-spl.dtb -+for what it actually contains). - - Removing old code - ----------------- -diff --git a/doc/develop/spl.rst b/doc/develop/spl.rst -index aec7b562fa..a1515a7b43 100644 ---- a/doc/develop/spl.rst -+++ b/doc/develop/spl.rst -@@ -113,17 +113,22 @@ with: - - - the mandatory nodes (/alias, /chosen, /config) - - the nodes with one pre-relocation property: -- 'u-boot,dm-pre-reloc' or 'u-boot,dm-spl' -+ 'bootph-all' or 'bootph-pre-ram' - - fdtgrep is also used to remove: - - - the properties defined in CONFIG_OF_SPL_REMOVE_PROPS - - all the pre-relocation properties -- ('u-boot,dm-pre-reloc', 'u-boot,dm-spl' and 'u-boot,dm-tpl') -+ ('bootph-all', 'bootph-pre-ram' (SPL), 'bootph-pre-sram' (TPL) and -+ 'bootph-verify' (TPL)) - - All the nodes remaining in the SPL devicetree are bound - (see doc/driver-model/design.rst). - -+NOTE: U-Boot migrated to a new schema for the u-boot,dm-* tags in 2023. Please -+update to use the new bootph-* tags as described in the -+doc/device-tree-bindings/bootph.yaml binding file. -+ - Debugging - --------- - -diff --git a/doc/device-tree-bindings/bootph.yaml b/doc/device-tree-bindings/bootph.yaml -new file mode 100644 -index 0000000000..a3ccf06efa ---- /dev/null -+++ b/doc/device-tree-bindings/bootph.yaml -@@ -0,0 +1,88 @@ -+# SPDX-License-Identifier: BSD-2-Clause -+# Copyright 2022 Google LLC -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/bootph.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: Boot-phase-specific device nodes -+ -+maintainers: -+ - Simon Glass -+ -+description: | -+ Some programs run in memory-constrained environments yet want to make use -+ of device tree. -+ -+ The full device tree is often quite large relative to the available memory -+ of a boot phase, so cannot fit into every phase of the boot process. Even -+ when memory is not a problem, some phases may wish to limit which device -+ nodes are present, so as to reduce execution time. -+ -+ This binding supports adding tags to device tree nodes to allow them to be -+ marked according to the phases where they should be included. -+ -+ Without any tags, nodes are included only in the final phase, where all -+ memory is available. Any untagged nodes are dropped from previous phases -+ and are ignored before the final phase is reached. -+ -+ The build process produces a separate executable for each phase. It can -+ use fdtgrep to drop any nodes which are not needed for a particular build. -+ For example, the pre-sram build will drop any nodes which are not marked -+ with bootph-pre-sram or bootph-all tags. -+ -+ Note that phase builds may drop the tags, since they have served their -+ purpose by that point. So when looking at phase-specific device tree files -+ you may not see these tags. -+ -+ Multiple tags can be used in the same node. -+ -+ Tags in a child node are implied to be present in all parent nodes as well. -+ This is important, since some missing properties (such as "ranges", or -+ "compatible") can cause the child node to be ignored or incorrectly -+ parsed. -+ -+ That said, at present, fdtgrep applies tags only to the node they are -+ added to, not to any parents. This means U-Boot device tree files often -+ add the same tag to parent nodes, rather than relying on tooling to do -+ this. This is a limitation of fdtgrep and it will be addressed so that -+ 'Linux DTs' do not need to do this. -+ -+ The available tags are described as properties below, in order of phase -+ execution. -+ -+select: true -+ -+properties: -+ bootph-pre-sram: -+ type: boolean -+ description: -+ Enable this node when SRAM is not available. This phase must set up -+ some SRAM or cache-as-RAM so it can obtain data/BSS space to use -+ during execution. -+ -+ bootph-verify: -+ type: boolean -+ description: -+ Enable this node in the verification step, which decides which of the -+ available images should be run next. -+ -+ bootph-pre-ram: -+ type: boolean -+ description: -+ Enable this node in the phase that sets up SDRAM. -+ -+ bootph-some-ram: -+ type: boolean -+ description: -+ Enable this node in the phase that is run after SDRAM is working but -+ before all of it is available. Some RAM is available but it is limited -+ (e.g. it may be split into two pieces by the location of the running -+ program) because the program code is not yet relocated out of the way. -+ -+ bootph-all: -+ type: boolean -+ description: -+ Include this node in all phases (for U-Boot see enum u_boot_phase). -+ -+additionalProperties: true -diff --git a/doc/device-tree-bindings/chosen.txt b/doc/device-tree-bindings/chosen.txt -index e5ba6720ce..c8312540f5 100644 ---- a/doc/device-tree-bindings/chosen.txt -+++ b/doc/device-tree-bindings/chosen.txt -@@ -129,7 +129,7 @@ Example - }; - - fs_loader0: fs-loader@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "u-boot,fs-loader"; - phandlepart = <&mmc 1>; - }; -diff --git a/doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt b/doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt -index 8e7357d53d..da474fbabd 100644 ---- a/doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt -+++ b/doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt -@@ -54,7 +54,7 @@ Example (for DDR3-1600K and 800MHz) - #include - - dmc: dmc@ff610000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "rockchip,rk3368-dmc"; - reg = <0 0xff610000 0 0x400 - 0 0xff620000 0 0x400>; -diff --git a/doc/device-tree-bindings/clock/rockchip,rk3399-dmc.txt b/doc/device-tree-bindings/clock/rockchip,rk3399-dmc.txt -index a15dc5d1f8..4a56f78f55 100644 ---- a/doc/device-tree-bindings/clock/rockchip,rk3399-dmc.txt -+++ b/doc/device-tree-bindings/clock/rockchip,rk3399-dmc.txt -@@ -16,7 +16,7 @@ Required properties: - - Example: - dmc: dmc { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "rockchip,rk3399-dmc"; - devfreq-events = <&dfi>; - interrupts = ; -diff --git a/doc/device-tree-bindings/clock/st,stm32mp1.txt b/doc/device-tree-bindings/clock/st,stm32mp1.txt -index 4d4136d2fc..e638bcef7b 100644 ---- a/doc/device-tree-bindings/clock/st,stm32mp1.txt -+++ b/doc/device-tree-bindings/clock/st,stm32mp1.txt -@@ -251,9 +251,9 @@ Example of clock tree initialization - - / { - clocks { -- u-boot,dm-pre-reloc; -+ bootph-all; - clk_hse: clk-hse { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <24000000>; -@@ -261,28 +261,28 @@ Example of clock tree initialization - }; - - clk_hsi: clk-hsi { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <64000000>; - }; - - clk_lse: clk-lse { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <32768>; - }; - - clk_lsi: clk-lsi { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <32000>; - }; - - clk_csi: clk-csi { -- u-boot,dm-pre-reloc; -+ bootph-all; - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <4000000>; -@@ -292,7 +292,7 @@ Example of clock tree initialization - soc { - - rcc: rcc@50000000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "st,stm32mp1-rcc", "syscon"; - reg = <0x50000000 0x1000>; - #address-cells = <1>; -@@ -371,7 +371,7 @@ Example of clock tree initialization - reg = <0>; - cfg = < 2 80 0 0 0 PQR(1,0,0) >; - frac = < 0x800 >; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), -@@ -381,7 +381,7 @@ Example of clock tree initialization - reg = <1>; - cfg = < 2 65 1 0 0 PQR(1,1,1) >; - frac = < 0x1400 >; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */ -@@ -390,7 +390,7 @@ Example of clock tree initialization - reg = <2>; - cfg = < 1 33 1 16 36 PQR(1,1,1) >; - frac = < 0x1a04 >; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */ -@@ -398,7 +398,7 @@ Example of clock tree initialization - compatible = "st,stm32mp1-pll"; - reg = <3>; - cfg = < 3 98 5 7 7 PQR(1,1,1) >; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - }; - }; -diff --git a/doc/device-tree-bindings/device.txt b/doc/device-tree-bindings/device.txt -index 73ce2a3b5b..ef4f219e91 100644 ---- a/doc/device-tree-bindings/device.txt -+++ b/doc/device-tree-bindings/device.txt -@@ -54,7 +54,7 @@ pcie-a0@14,0 { - }; - - p2sb: p2sb@d,0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <0x02006810 0 0 0 0>; - compatible = "intel,apl-p2sb"; - early-regs = ; -@@ -62,12 +62,12 @@ p2sb: p2sb@d,0 { - - n { - compatible = "intel,apl-pinctrl"; -- u-boot,dm-pre-reloc; -+ bootph-all; - intel,p2sb-port-id = ; - acpi,path = "\\_SB.GPO0"; - gpio_n: gpio-n { - compatible = "intel,gpio"; -- u-boot,dm-pre-reloc; -+ bootph-all; - gpio-controller; - #gpio-cells = <2>; - linux-name = "INT3452:00"; -diff --git a/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-s.txt b/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-s.txt -index dc8e3251a3..33386ebd38 100644 ---- a/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-s.txt -+++ b/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-s.txt -@@ -474,7 +474,7 @@ Optional properties: - Example: - - &fsp_s { -- u-boot,dm-pre-proper; -+ bootph-some-ram; - - fsps,ish-enable = <0>; - fsps,enable-sata = <0>; -diff --git a/doc/device-tree-bindings/memory-controller/k3-j721e-ddrss.txt b/doc/device-tree-bindings/memory-controller/k3-j721e-ddrss.txt -index 1ea0a70114..2e41096aa6 100644 ---- a/doc/device-tree-bindings/memory-controller/k3-j721e-ddrss.txt -+++ b/doc/device-tree-bindings/memory-controller/k3-j721e-ddrss.txt -@@ -57,7 +57,7 @@ memorycontroller: memorycontroller@0298e000 { - ti,ddr-freq2 = ; - ti,ddr-fhs-cnt = ; - -- u-boot,dm-spl; -+ bootph-pre-ram; - - ti,ctl-data = < - DDRSS_CTL_00_DATA -diff --git a/doc/device-tree-bindings/memory-controllers/k3-am654-ddrss.txt b/doc/device-tree-bindings/memory-controllers/k3-am654-ddrss.txt -index 1e11edf7b1..792560a323 100644 ---- a/doc/device-tree-bindings/memory-controllers/k3-am654-ddrss.txt -+++ b/doc/device-tree-bindings/memory-controllers/k3-am654-ddrss.txt -@@ -42,5 +42,5 @@ Example (AM65x): - reg-names = "ss", "ctl", "phy"; - clocks = <&k3_clks 20 0>; - power-domains = <&k3_pds 20>; -- u-boot,dm-spl; -+ bootph-pre-ram; - }; -diff --git a/doc/device-tree-bindings/misc/fs_loader.txt b/doc/device-tree-bindings/misc/fs_loader.txt -index 884fbf47c0..542be4b25a 100644 ---- a/doc/device-tree-bindings/misc/fs_loader.txt -+++ b/doc/device-tree-bindings/misc/fs_loader.txt -@@ -20,28 +20,28 @@ ubi in device tree source as shown in below: - sata and ubi as shown in below: - Example for mmc: - fs_loader0: fs-loader@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "u-boot,fs-loader"; - phandlepart = <&mmc_0 1>; - }; - - Example for usb: - fs_loader1: fs-loader@1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "u-boot,fs-loader"; - phandlepart = <&usb0 1>; - }; - - Example for sata: - fs_loader2: fs-loader@2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "u-boot,fs-loader"; - phandlepart = <&sata0 1>; - }; - - Example for ubi: - fs_loader3: fs-loader@3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "u-boot,fs-loader"; - mtdpart = "UBI", - ubivol = "ubi0"; -diff --git a/doc/device-tree-bindings/net/mdio-mux-reg.txt b/doc/device-tree-bindings/net/mdio-mux-reg.txt -index 0ac34dc423..0f7c295687 100644 ---- a/doc/device-tree-bindings/net/mdio-mux-reg.txt -+++ b/doc/device-tree-bindings/net/mdio-mux-reg.txt -@@ -16,7 +16,7 @@ Example structure, used on Freescale LS1028A QDS board: - - &i2c0 { - status = "okay"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - fpga@66 { - #address-cells = <1>; -diff --git a/doc/device-tree-bindings/pci/x86-pci.txt b/doc/device-tree-bindings/pci/x86-pci.txt -index cf4e5ed595..e6d4b37535 100644 ---- a/doc/device-tree-bindings/pci/x86-pci.txt -+++ b/doc/device-tree-bindings/pci/x86-pci.txt -@@ -31,7 +31,7 @@ pci { - compatible = "pci-x86"; - #address-cells = <3>; - #size-cells = <2>; -- u-boot,dm-pre-reloc; -+ bootph-all; - ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000 - 0x42000000 0x0 0xb0000000 0xb0000000 0 0x10000000 - 0x01000000 0x0 0x1000 0x1000 0 0xefff>; -@@ -41,7 +41,7 @@ pci { - - serial: serial@18,2 { - reg = <0x0200c210 0 0 0 0>; -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "intel,apl-ns16550"; - early-regs = <0xde000000 0x20>; - reg-shift = <2>; -diff --git a/doc/device-tree-bindings/phy/phy-mtk-tphy.txt b/doc/device-tree-bindings/phy/phy-mtk-tphy.txt -index 8cd23d8c0b..3042c39d09 100644 ---- a/doc/device-tree-bindings/phy/phy-mtk-tphy.txt -+++ b/doc/device-tree-bindings/phy/phy-mtk-tphy.txt -@@ -8,6 +8,7 @@ Required properties (controller (parent) node): - - compatible : should be one of - "mediatek,generic-tphy-v1" - "mediatek,generic-tphy-v2" -+ "mediatek,mt8195-tphy" - - - #address-cells: the number of cells used to represent physical - base addresses. -diff --git a/doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt b/doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt -index 115ab53a4c..38e322db81 100644 ---- a/doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt -+++ b/doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt -@@ -20,7 +20,7 @@ Example: - pinctrl_0: pinctrl@c0010000 { - compatible = "nexell,s5pxx18-pinctrl"; - reg = <0xc0010000 0xf000>; -- u-boot,dm-pre-reloc; -+ bootph-all; - }; - - Nexell's pin configuration nodes act as a container for an arbitrary number of -diff --git a/doc/device-tree-bindings/ram/fsl,mpc83xx-mem-controller.txt b/doc/device-tree-bindings/ram/fsl,mpc83xx-mem-controller.txt -index da01fe908d..de498aca78 100644 ---- a/doc/device-tree-bindings/ram/fsl,mpc83xx-mem-controller.txt -+++ b/doc/device-tree-bindings/ram/fsl,mpc83xx-mem-controller.txt -@@ -249,7 +249,7 @@ memory@2000 { - compatible = "fsl,mpc83xx-mem-controller"; - reg = <0x2000 0x1000>; - device_type = "memory"; -- u-boot,dm-pre-reloc; -+ bootph-all; - - driver_software_override = ; - p_impedance_override = ; -diff --git a/doc/device-tree-bindings/usb/mediatek,mtk-xhci.txt b/doc/device-tree-bindings/usb/mediatek,mtk-xhci.txt -index 2a298f7b16..e26e9618eb 100644 ---- a/doc/device-tree-bindings/usb/mediatek,mtk-xhci.txt -+++ b/doc/device-tree-bindings/usb/mediatek,mtk-xhci.txt -@@ -3,7 +3,9 @@ MediaTek xHCI - The device node for USB3 host controller on MediaTek SoCs. - - Required properties: -- - compatible : should be "mediatek,mtk-xhci" -+ - compatible : should be one of -+ "mediatek,mtk-xhci" -+ "mediatek,mt8195-xhci" - - reg : specifies physical base address and size of the registers - - reg-names: should be "mac" for xHCI MAC and "ippc" for IP port control - - power-domains : a phandle to USB power domain node to control USB's -diff --git a/doc/device-tree-bindings/video/atmel-hlcdc.txt b/doc/device-tree-bindings/video/atmel-hlcdc.txt -index b378cbf9de..7c9441ae8b 100644 ---- a/doc/device-tree-bindings/video/atmel-hlcdc.txt -+++ b/doc/device-tree-bindings/video/atmel-hlcdc.txt -@@ -15,7 +15,7 @@ Required properties: - - Example: - hlcdc: hlcdc@f0000000 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "atmel,sama5d2-hlcdc"; - reg = <0xf0000000 0x2000>; - clocks = <&lcdc_clk>; -diff --git a/doc/kwboot.1 b/doc/kwboot.1 -index a528fbbe8c..32d324f055 100644 ---- a/doc/kwboot.1 -+++ b/doc/kwboot.1 -@@ -69,7 +69,7 @@ To get a BootROM help, type this command followed by ENTER key: - .IP - - Armada 38x BootROM has a bug which cause that BootROM's standard output --is turned off on UART when SPI-NOR contains valid boot image. Nevertheless -+is turned off on UART when default boot source location contains valid boot image. Nevertheless - BootROM's standard input and BootROM's terminal echo are active and working - fine. To workaround this BootROM bug with standard output, it is possible - to manually overwrite BootROM variables stored in SRAM which BootROM use -@@ -159,7 +159,8 @@ program: - Instruct BootROM to enter boot Xmodem boot mode, send header of - \fIu-boot-with-spl.kwb\fP kwbimage file via Xmodem at 115200 Bd, then instruct - BootROM to change baudrate to 5200000 Bd, send data part of the kwbimage --file via Xmodem at high speed and finally run terminal program: -+file via Xmodem at high speed, then change baudrate back to 115200 Bd, -+and finally run terminal program: - .IP - .B kwboot -b u-boot-with-spl.kwb -B 5200000 -t /dev/ttyUSB0 - -diff --git a/doc/mvebu/cmd/bubt.txt b/doc/mvebu/cmd/bubt.txt -index 6051243f11..52bd3e66c5 100644 ---- a/doc/mvebu/cmd/bubt.txt -+++ b/doc/mvebu/cmd/bubt.txt -@@ -5,8 +5,8 @@ Bubt command is used to burn a new ATF image to flash device. - The bubt command gets the following parameters: ATF file name, destination device and source device. - bubt [file-name] [destination [source]] - - file-name Image file name to burn. default = flash-image.bin -- - destination Flash to burn to [spi, nand, mmc]. default = active flash -- - source Source to load image from [tftp, usb]. default = tftp -+ - destination Flash to burn to [spi, nand, mmc, sata]. default = active flash -+ - source Source to load image from [tftp, usb, mmc, sata]. default = tftp - - Examples: - bubt - Burn flash-image.bin from tftp to active flash -@@ -14,8 +14,7 @@ Examples: - - Notes: - - For the TFTP interface set serverip and ipaddr. --- To burn image to SD/eMMC device, the target is defined -- by parameters CONFIG_SYS_MMC_ENV_DEV and CONFIG_SYS_MMC_ENV_PART. -+- To burn image to SD/eMMC device, the target is defined by HW partition. - - Bubt command details (burn image step by-step) - ---------------------------------------------- -@@ -40,10 +39,20 @@ Notes: - Number 0 is used for user data partition and should not be utilized for storing - boot images and U-Boot environment in RAW mode since it will break file system - structures usually located here. -- The default boot partition is BOOT0. It is selected by the following parameter: -- CONFIG_SYS_MMC_ENV_PART=1 -- Valid values for this parameter are 1 for BOOT0 and 2 for BOOT1. -- Please never use partition number 0 here! -+ -+ Currently configured boot partition can be printed by command: -+ # mmc partconf 0 -+ (search for BOOT_PARTITION_ACCESS output, number 7 is user data) -+ -+ Change it to BOOT0: -+ # mmc partconf 0 0 1 1 -+ -+ Change it to BOOT1: -+ # mmc partconf 0 0 2 2 -+ -+ Change it to user data: -+ # mmc partconf 0 0 7 0 -+ - - The partition number is ignored if the target device is SD card. - - The boot image offset starts at block 0 for eMMC and block 1 for SD devices. - The block 0 on SD devices is left for MBR storage. -diff --git a/doc/usage/cmd/efi.rst b/doc/usage/cmd/efi.rst -new file mode 100644 -index 0000000000..ef37ff2f4c ---- /dev/null -+++ b/doc/usage/cmd/efi.rst -@@ -0,0 +1,219 @@ -+.. SPDX-License-Identifier: GPL-2.0+ -+.. Copyright 2020, Heinrich Schuchardt -+ -+efi command -+=========== -+ -+Synopsis -+-------- -+ -+:: -+ -+ efi mem [all] -+ efi tables -+ -+Description -+----------- -+ -+The *efi* command provides information about the EFI environment U-Boot is -+running in, when it is started from EFI. -+ -+When running as an EFI app, this command queries EFI boot services for the -+information. When running as an EFI payload, EFI boot services have been -+stopped, so it uses the information collected by the boot stub before that -+happened. -+ -+efi mem -+~~~~~~~ -+ -+This shows the EFI memory map, sorted in order of physical address. -+ -+This is normally a very large table. To help reduce the amount of detritus, -+boot-time memory is normally merged with conventional memory. Use the 'all' -+argument to show everything. -+ -+The fields are as follows: -+ -+# -+ Entry number (sequentially from 0) -+ -+Type -+ Memory type. EFI has a large number of memory types. The type is shown in -+ the format : where in is the format number in hex and is the -+ name. -+ -+Physical -+ Physical address -+ -+Virtual -+ Virtual address -+ -+Size -+ Size of memory area in bytes -+ -+Attributes -+ Shows a code for memory attributes. The key for this is shown below the -+ table. -+ -+efi tables -+~~~~~~~~~~ -+ -+This shows a list of the EFI tables provided in the system table. These use -+GUIDs so it is not possible in general to show the name of a table. But some -+effort is made to provide a useful table, where the GUID is known by U-Boot. -+ -+ -+Example -+------- -+ -+:: -+ -+ => efi mem -+ EFI table at 0, memory map 000000001ad38b60, size 1260, key a79, version 1, descr. size 0x30 -+ # Type Physical Virtual Size Attributes -+ 0 7:conv 0000000000 0000000000 00000a0000 f -+ 00000a0000 0000060000 -+ 1 7:conv 0000100000 0000000000 0000700000 f -+ 2 a:acpi_nvs 0000800000 0000000000 0000008000 f -+ 3 7:conv 0000808000 0000000000 0000008000 f -+ 4 a:acpi_nvs 0000810000 0000000000 00000f0000 f -+ 5 7:conv 0000900000 0000000000 001efef000 f -+ 6 6:rt_data 001f8ef000 0000000000 0000100000 rf -+ 7 5:rt_code 001f9ef000 0000000000 0000100000 rf -+ 8 0:reserved 001faef000 0000000000 0000080000 f -+ 9 9:acpi_reclaim 001fb6f000 0000000000 0000010000 f -+ 10 a:acpi_nvs 001fb7f000 0000000000 0000080000 f -+ 11 7:conv 001fbff000 0000000000 0000359000 f -+ 12 6:rt_data 001ff58000 0000000000 0000020000 rf -+ 13 a:acpi_nvs 001ff78000 0000000000 0000088000 f -+ 0020000000 0090000000 -+ 14 0:reserved 00b0000000 0000000000 0010000000 1 -+ -+ Attributes key: -+ f: uncached, write-coalescing, write-through, write-back -+ rf: uncached, write-coalescing, write-through, write-back, needs runtime mapping -+ 1: uncached -+ *Some areas are merged (use 'all' to see) -+ -+ -+ => efi mem all -+ EFI table at 0, memory map 000000001ad38bb0, size 1260, key a79, version 1, descr. size 0x30 -+ # Type Physical Virtual Size Attributes -+ 0 3:bs_code 0000000000 0000000000 0000001000 f -+ 1 7:conv 0000001000 0000000000 000009f000 f -+ 00000a0000 0000060000 -+ 2 7:conv 0000100000 0000000000 0000700000 f -+ 3 a:acpi_nvs 0000800000 0000000000 0000008000 f -+ 4 7:conv 0000808000 0000000000 0000008000 f -+ 5 a:acpi_nvs 0000810000 0000000000 00000f0000 f -+ 6 4:bs_data 0000900000 0000000000 0000c00000 f -+ 7 7:conv 0001500000 0000000000 000aa36000 f -+ 8 2:loader_data 000bf36000 0000000000 0010000000 f -+ 9 4:bs_data 001bf36000 0000000000 0000020000 f -+ 10 7:conv 001bf56000 0000000000 00021e1000 f -+ 11 1:loader_code 001e137000 0000000000 00000c4000 f -+ 12 7:conv 001e1fb000 0000000000 000009b000 f -+ 13 1:loader_code 001e296000 0000000000 00000e2000 f -+ 14 7:conv 001e378000 0000000000 000005b000 f -+ 15 4:bs_data 001e3d3000 0000000000 000001e000 f -+ 16 7:conv 001e3f1000 0000000000 0000016000 f -+ 17 4:bs_data 001e407000 0000000000 0000016000 f -+ 18 2:loader_data 001e41d000 0000000000 0000002000 f -+ 19 4:bs_data 001e41f000 0000000000 0000828000 f -+ 20 3:bs_code 001ec47000 0000000000 0000045000 f -+ 21 4:bs_data 001ec8c000 0000000000 0000001000 f -+ 22 3:bs_code 001ec8d000 0000000000 000000e000 f -+ 23 4:bs_data 001ec9b000 0000000000 0000001000 f -+ 24 3:bs_code 001ec9c000 0000000000 000002c000 f -+ 25 4:bs_data 001ecc8000 0000000000 0000001000 f -+ 26 3:bs_code 001ecc9000 0000000000 000000c000 f -+ 27 4:bs_data 001ecd5000 0000000000 0000006000 f -+ 28 3:bs_code 001ecdb000 0000000000 0000014000 f -+ 29 4:bs_data 001ecef000 0000000000 0000001000 f -+ 30 3:bs_code 001ecf0000 0000000000 000005b000 f -+ 31 4:bs_data 001ed4b000 0000000000 000000b000 f -+ 32 3:bs_code 001ed56000 0000000000 0000024000 f -+ 33 4:bs_data 001ed7a000 0000000000 0000006000 f -+ 34 3:bs_code 001ed80000 0000000000 0000010000 f -+ 35 4:bs_data 001ed90000 0000000000 0000002000 f -+ 36 3:bs_code 001ed92000 0000000000 0000025000 f -+ 37 4:bs_data 001edb7000 0000000000 0000003000 f -+ 38 3:bs_code 001edba000 0000000000 0000011000 f -+ 39 4:bs_data 001edcb000 0000000000 0000008000 f -+ 40 3:bs_code 001edd3000 0000000000 000002d000 f -+ 41 4:bs_data 001ee00000 0000000000 0000201000 f -+ 42 3:bs_code 001f001000 0000000000 0000024000 f -+ 43 4:bs_data 001f025000 0000000000 0000002000 f -+ 44 3:bs_code 001f027000 0000000000 0000009000 f -+ 45 4:bs_data 001f030000 0000000000 0000005000 f -+ 46 3:bs_code 001f035000 0000000000 000002f000 f -+ 47 4:bs_data 001f064000 0000000000 0000001000 f -+ 48 3:bs_code 001f065000 0000000000 0000005000 f -+ 49 4:bs_data 001f06a000 0000000000 0000005000 f -+ 50 3:bs_code 001f06f000 0000000000 0000007000 f -+ 51 4:bs_data 001f076000 0000000000 0000007000 f -+ 52 3:bs_code 001f07d000 0000000000 000000d000 f -+ 53 4:bs_data 001f08a000 0000000000 0000001000 f -+ 54 3:bs_code 001f08b000 0000000000 0000006000 f -+ 55 4:bs_data 001f091000 0000000000 0000004000 f -+ 56 3:bs_code 001f095000 0000000000 000000d000 f -+ 57 4:bs_data 001f0a2000 0000000000 0000003000 f -+ 58 3:bs_code 001f0a5000 0000000000 0000026000 f -+ 59 4:bs_data 001f0cb000 0000000000 0000005000 f -+ 60 3:bs_code 001f0d0000 0000000000 0000019000 f -+ 61 4:bs_data 001f0e9000 0000000000 0000004000 f -+ 62 3:bs_code 001f0ed000 0000000000 0000024000 f -+ 63 4:bs_data 001f111000 0000000000 0000008000 f -+ 64 3:bs_code 001f119000 0000000000 000000b000 f -+ 65 4:bs_data 001f124000 0000000000 0000001000 f -+ 66 3:bs_code 001f125000 0000000000 0000002000 f -+ 67 4:bs_data 001f127000 0000000000 0000002000 f -+ 68 3:bs_code 001f129000 0000000000 0000009000 f -+ 69 4:bs_data 001f132000 0000000000 0000003000 f -+ 70 3:bs_code 001f135000 0000000000 0000005000 f -+ 71 4:bs_data 001f13a000 0000000000 0000003000 f -+ 72 3:bs_code 001f13d000 0000000000 0000005000 f -+ 73 4:bs_data 001f142000 0000000000 0000003000 f -+ 74 3:bs_code 001f145000 0000000000 0000011000 f -+ 75 4:bs_data 001f156000 0000000000 000000b000 f -+ 76 3:bs_code 001f161000 0000000000 0000009000 f -+ 77 4:bs_data 001f16a000 0000000000 0000400000 f -+ 78 3:bs_code 001f56a000 0000000000 0000006000 f -+ 79 4:bs_data 001f570000 0000000000 0000001000 f -+ 80 3:bs_code 001f571000 0000000000 0000001000 f -+ 81 4:bs_data 001f572000 0000000000 0000002000 f -+ 82 3:bs_code 001f574000 0000000000 0000017000 f -+ 83 4:bs_data 001f58b000 0000000000 0000364000 f -+ 84 6:rt_data 001f8ef000 0000000000 0000100000 rf -+ 85 5:rt_code 001f9ef000 0000000000 0000100000 rf -+ 86 0:reserved 001faef000 0000000000 0000080000 f -+ 87 9:acpi_reclaim 001fb6f000 0000000000 0000010000 f -+ 88 a:acpi_nvs 001fb7f000 0000000000 0000080000 f -+ 89 4:bs_data 001fbff000 0000000000 0000201000 f -+ 90 7:conv 001fe00000 0000000000 00000e8000 f -+ 91 4:bs_data 001fee8000 0000000000 0000020000 f -+ 92 3:bs_code 001ff08000 0000000000 0000026000 f -+ 93 4:bs_data 001ff2e000 0000000000 0000009000 f -+ 94 3:bs_code 001ff37000 0000000000 0000021000 f -+ 95 6:rt_data 001ff58000 0000000000 0000020000 rf -+ 96 a:acpi_nvs 001ff78000 0000000000 0000088000 f -+ 0020000000 0090000000 -+ 97 0:reserved 00b0000000 0000000000 0010000000 1 -+ -+ Attributes key: -+ f: uncached, write-coalescing, write-through, write-back -+ rf: uncached, write-coalescing, write-through, write-back, needs runtime mapping -+ 1: uncached -+ -+ -+ => efi tables -+ 000000001f8edf98 ee4e5898-3914-4259-9d6e-dc7bd79403cf EFI_LZMA_COMPRESSED -+ 000000001ff2ace0 05ad34ba-6f02-4214-952e-4da0398e2bb9 EFI_DXE_SERVICES -+ 000000001f8ea018 7739f24c-93d7-11d4-9a3a-0090273fc14d EFI_HOB_LIST -+ 000000001ff2bac0 4c19049f-4137-4dd3-9c10-8b97a83ffdfa EFI_MEMORY_TYPE -+ 000000001ff2cb10 49152e77-1ada-4764-b7a2-7afefed95e8b (unknown) -+ 000000001f9ac018 060cc026-4c0d-4dda-8f41-595fef00a502 EFI_MEM_STATUS_CODE_REC -+ 000000001f9ab000 eb9d2d31-2d88-11d3-9a16-0090273fc14d SMBIOS table -+ 000000001fb7e000 eb9d2d30-2d88-11d3-9a16-0090273fc14d EFI_GUID_EFI_ACPI1 -+ 000000001fb7e014 8868e871-e4f1-11d3-bc22-0080c73c8881 ACPI table -+ 000000001e654018 dcfa911d-26eb-469f-a220-38b7dc461220 (unknown) -diff --git a/doc/usage/cmd/read.rst b/doc/usage/cmd/read.rst -new file mode 100644 -index 0000000000..840846728f ---- /dev/null -+++ b/doc/usage/cmd/read.rst -@@ -0,0 +1,44 @@ -+.. SPDX-License-Identifier: GPL-2.0-or-later: -+ -+read and write commands -+======================= -+ -+Synopsis -+-------- -+ -+:: -+ -+ read -+ write -+ -+The read and write commands can be used for raw access to data in -+block devices (or partitions therein), i.e. without going through a -+file system. -+ -+read -+---- -+ -+The block device is specified using the (e.g. "mmc") and -+ parameters. If the block device has a partition table, one can -+optionally specify a partition number (using the :part syntax) or -+partition name (using the #partname syntax). The command then reads -+the blocks of data starting at block number of the given -+device/partition to the memory address . -+ -+write -+----- -+ -+The write command is completely equivalent to the read command, except -+of course that the transfer direction is reversed. -+ -+Examples -+-------- -+ -+ # Read 2 MiB from partition 3 of mmc device 2 to $loadaddr -+ read mmc 2.3 $loadaddr 0 0x1000 -+ -+ # Read 16 MiB from the partition named 'kernel' of mmc device 1 to $loadaddr -+ read mmc 1#kernel $loadaddr 0 0x8000 -+ -+ # Write to the third sector of the partition named 'bootdata' of mmc device 0 -+ write mmc 0#bootdata $loadaddr 2 1 -diff --git a/doc/usage/cmd/write.rst b/doc/usage/cmd/write.rst -new file mode 100644 -index 0000000000..c16870d6dc ---- /dev/null -+++ b/doc/usage/cmd/write.rst -@@ -0,0 +1,6 @@ -+.. SPDX-License-Identifier: GPL-2.0-or-later: -+ -+write command -+============= -+ -+See :doc:`read`. -diff --git a/doc/usage/index.rst b/doc/usage/index.rst -index ebf5eea9f8..bc85e1d49a 100644 ---- a/doc/usage/index.rst -+++ b/doc/usage/index.rst -@@ -43,6 +43,7 @@ Shell commands - cmd/dm - cmd/ebtupdate - cmd/echo -+ cmd/efi - cmd/eficonfig - cmd/env - cmd/event -@@ -72,6 +73,7 @@ Shell commands - cmd/printenv - cmd/pstore - cmd/qfw -+ cmd/read - cmd/reset - cmd/rng - cmd/sbi -@@ -92,6 +94,7 @@ Shell commands - cmd/ut - cmd/wdt - cmd/wget -+ cmd/write - cmd/xxd - - Booting OS -diff --git a/drivers/Makefile b/drivers/Makefile -index 15d19d0c8a..58be410135 100644 ---- a/drivers/Makefile -+++ b/drivers/Makefile -@@ -18,7 +18,6 @@ obj-$(CONFIG_$(SPL_TPL_)INPUT) += input/ - obj-$(CONFIG_$(SPL_TPL_)LED) += led/ - obj-$(CONFIG_$(SPL_TPL_)MMC) += mmc/ - obj-y += mtd/ --obj-$(CONFIG_$(SPL_)MULTIPLEXER) += mux/ - obj-$(CONFIG_$(SPL_TPL_)ETH) += net/ - obj-$(CONFIG_$(SPL_TPL_)PCH) += pch/ - obj-$(CONFIG_$(SPL_TPL_)PCI) += pci/ -@@ -87,6 +86,7 @@ obj-$(CONFIG_FASTBOOT) += fastboot/ - obj-$(CONFIG_FWU_MDATA) += fwu-mdata/ - obj-y += misc/ - obj-$(CONFIG_MMC) += mmc/ -+obj-$(CONFIG_MULTIPLEXER) += mux/ - obj-$(CONFIG_NVME) += nvme/ - obj-$(CONFIG_PCI_ENDPOINT) += pci_endpoint/ - obj-y += dfu/ -diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig -index 09aa97ee8c..19269c7fd4 100644 ---- a/drivers/clk/Kconfig -+++ b/drivers/clk/Kconfig -@@ -166,6 +166,14 @@ config CLK_SCMI - by a SCMI agent based on SCMI clock protocol communication - with a SCMI server. - -+config SPL_CLK_SCMI -+ bool "Enable SCMI clock driver in SPL" -+ depends on SCMI_FIRMWARE && SPL_FIRMWARE -+ help -+ Enable this option if you want to support clock devices exposed -+ by a SCMI agent based on SCMI clock protocol communication -+ with a SCMI server in SPL. -+ - config CLK_HSDK - bool "Enable cgu clock driver for HSDK boards" - depends on CLK && TARGET_HSDK -@@ -185,7 +193,7 @@ config CLK_VERSACLOCK - config CLK_VERSAL - bool "Enable clock driver support for Versal" - depends on (ARCH_VERSAL || ARCH_VERSAL_NET) -- select ZYNQMP_FIRMWARE -+ imply ZYNQMP_FIRMWARE - help - This clock driver adds support for clock realted settings for - Versal platform. -@@ -219,7 +227,7 @@ config CLK_ZYNQ - config CLK_ZYNQMP - bool "Enable clock driver support for ZynqMP" - depends on ARCH_ZYNQMP -- select ZYNQMP_FIRMWARE -+ imply ZYNQMP_FIRMWARE - help - This clock driver adds support for clock realted settings for - ZynqMP platform. -diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile -index c274cda77c..c1347774b5 100644 ---- a/drivers/clk/Makefile -+++ b/drivers/clk/Makefile -@@ -39,7 +39,7 @@ obj-$(CONFIG_CLK_MVEBU) += mvebu/ - obj-$(CONFIG_CLK_OCTEON) += clk_octeon.o - obj-$(CONFIG_CLK_OWL) += owl/ - obj-$(CONFIG_CLK_RENESAS) += renesas/ --obj-$(CONFIG_CLK_SCMI) += clk_scmi.o -+obj-$(CONFIG_$(SPL_TPL_)CLK_SCMI) += clk_scmi.o - obj-$(CONFIG_CLK_SIFIVE) += sifive/ - obj-$(CONFIG_CLK_UNIPHIER) += uniphier/ - obj-$(CONFIG_CLK_VERSACLOCK) += clk_versaclock.o -diff --git a/drivers/clk/aspeed/clk_ast2600.c b/drivers/clk/aspeed/clk_ast2600.c -index 0df1dc3718..e5ada5b6d4 100644 ---- a/drivers/clk/aspeed/clk_ast2600.c -+++ b/drivers/clk/aspeed/clk_ast2600.c -@@ -538,7 +538,7 @@ static uint32_t ast2600_configure_pll(struct ast2600_scu *scu, - } - - p_cfg->reg.b.bypass = 0; -- p_cfg->reg.b.off = 1; -+ p_cfg->reg.b.off = 0; - p_cfg->reg.b.reset = 1; - - reg = readl(addr); -@@ -549,7 +549,6 @@ static uint32_t ast2600_configure_pll(struct ast2600_scu *scu, - /* write extend parameter */ - writel(p_cfg->ext_reg, addr_ext); - udelay(100); -- p_cfg->reg.b.off = 0; - p_cfg->reg.b.reset = 0; - reg &= ~GENMASK(25, 0); - reg |= p_cfg->reg.w; -diff --git a/drivers/clk/at91/Kconfig b/drivers/clk/at91/Kconfig -index 4abc8026b4..4563892647 100644 ---- a/drivers/clk/at91/Kconfig -+++ b/drivers/clk/at91/Kconfig -@@ -61,3 +61,10 @@ config AT91_SAM9X60_PLL - help - This option is used to enable the AT91 SAM9X60's PLL clock - driver. -+ -+config AT91_SAM9X60_USB -+ bool "USB Clock support for SAM9X60 SoCs" -+ depends on CLK_AT91 -+ help -+ This option is used to enable the AT91 SAM9X60's USB clock -+ driver. -diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile -index 580b406d7b..e53dcb4ca7 100644 ---- a/drivers/clk/at91/Makefile -+++ b/drivers/clk/at91/Makefile -@@ -9,6 +9,7 @@ obj-y += clk-peripheral.o - obj-$(CONFIG_AT91_GENERIC_CLK) += clk-generic.o - obj-$(CONFIG_AT91_UTMI) += clk-utmi.o - obj-$(CONFIG_AT91_SAM9X60_PLL) += clk-sam9x60-pll.o -+obj-$(CONFIG_AT91_SAM9X60_USB) += clk-sam9x60-usb.o - obj-$(CONFIG_SAMA7G5) += sama7g5.o - obj-$(CONFIG_SAM9X60) += sam9x60.o - else -diff --git a/drivers/clk/at91/clk-sam9x60-usb.c b/drivers/clk/at91/clk-sam9x60-usb.c -new file mode 100644 -index 0000000000..798fa9eb3c ---- /dev/null -+++ b/drivers/clk/at91/clk-sam9x60-usb.c -@@ -0,0 +1,157 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * SAM9X60's USB Clock support. -+ * -+ * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries -+ * -+ * Author: Sergiu Moga -+ */ -+ -+#include -+#include -+#include -+ -+#include "pmc.h" -+ -+#define UBOOT_DM_CLK_AT91_SAM9X60_USB "at91-sam9x60-usb-clk" -+ -+struct sam9x60_usb { -+ const struct clk_usbck_layout *layout; -+ void __iomem *base; -+ struct clk clk; -+ const u32 *clk_mux_table; -+ const u32 *mux_table; -+ const char * const *parent_names; -+ u32 num_parents; -+ u8 id; -+}; -+ -+#define to_sam9x60_usb(_clk) container_of(_clk, struct sam9x60_usb, clk) -+#define USB_MAX_DIV 15 -+ -+static int sam9x60_usb_clk_set_parent(struct clk *clk, struct clk *parent) -+{ -+ struct sam9x60_usb *usb = to_sam9x60_usb(clk); -+ int index; -+ u32 val; -+ -+ index = at91_clk_mux_val_to_index(usb->clk_mux_table, usb->num_parents, -+ parent->id); -+ if (index < 0) -+ return index; -+ -+ index = at91_clk_mux_index_to_val(usb->mux_table, usb->num_parents, -+ index); -+ if (index < 0) -+ return index; -+ -+ pmc_read(usb->base, usb->layout->offset, &val); -+ val &= ~usb->layout->usbs_mask; -+ val |= index << (ffs(usb->layout->usbs_mask - 1)); -+ pmc_write(usb->base, usb->layout->offset, val); -+ -+ return 0; -+} -+ -+static ulong sam9x60_usb_clk_get_rate(struct clk *clk) -+{ -+ struct sam9x60_usb *usb = to_sam9x60_usb(clk); -+ ulong parent_rate = clk_get_parent_rate(clk); -+ u32 val, usbdiv; -+ -+ if (!parent_rate) -+ return 0; -+ -+ pmc_read(usb->base, usb->layout->offset, &val); -+ usbdiv = (val & usb->layout->usbdiv_mask) >> -+ (ffs(usb->layout->usbdiv_mask) - 1); -+ return parent_rate / (usbdiv + 1); -+} -+ -+static ulong sam9x60_usb_clk_set_rate(struct clk *clk, ulong rate) -+{ -+ struct sam9x60_usb *usb = to_sam9x60_usb(clk); -+ ulong parent_rate = clk_get_parent_rate(clk); -+ u32 usbdiv, val; -+ -+ if (!parent_rate) -+ return 0; -+ -+ usbdiv = DIV_ROUND_CLOSEST(parent_rate, rate); -+ if (usbdiv > USB_MAX_DIV + 1 || !usbdiv) -+ return 0; -+ -+ pmc_read(usb->base, usb->layout->offset, &val); -+ val &= usb->layout->usbdiv_mask; -+ val |= (usbdiv - 1) << (ffs(usb->layout->usbdiv_mask) - 1); -+ pmc_write(usb->base, usb->layout->offset, val); -+ -+ return parent_rate / usbdiv; -+} -+ -+static const struct clk_ops sam9x60_usb_ops = { -+ .set_parent = sam9x60_usb_clk_set_parent, -+ .set_rate = sam9x60_usb_clk_set_rate, -+ .get_rate = sam9x60_usb_clk_get_rate, -+}; -+ -+struct clk * -+sam9x60_clk_register_usb(void __iomem *base, const char *name, -+ const char * const *parent_names, u8 num_parents, -+ const struct clk_usbck_layout *usbck_layout, -+ const u32 *clk_mux_table, const u32 *mux_table, u8 id) -+{ -+ struct sam9x60_usb *usb; -+ struct clk *clk; -+ int ret, index; -+ u32 val; -+ -+ if (!base || !name || !parent_names || !num_parents || -+ !clk_mux_table || !mux_table) -+ return ERR_PTR(-EINVAL); -+ -+ usb = kzalloc(sizeof(*usb), GFP_KERNEL); -+ if (!usb) -+ return ERR_PTR(-ENOMEM); -+ -+ usb->id = id; -+ usb->base = base; -+ usb->layout = usbck_layout; -+ usb->parent_names = parent_names; -+ usb->num_parents = num_parents; -+ usb->clk_mux_table = clk_mux_table; -+ usb->mux_table = mux_table; -+ -+ clk = &usb->clk; -+ clk->flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | -+ CLK_SET_RATE_PARENT; -+ -+ pmc_read(usb->base, usb->layout->offset, &val); -+ -+ val = (val & usb->layout->usbs_mask) >> -+ (ffs(usb->layout->usbs_mask) - 1); -+ -+ index = at91_clk_mux_val_to_index(usb->mux_table, usb->num_parents, -+ val); -+ -+ if (index < 0) { -+ kfree(usb); -+ return ERR_PTR(index); -+ } -+ -+ ret = clk_register(clk, UBOOT_DM_CLK_AT91_SAM9X60_USB, name, -+ parent_names[index]); -+ if (ret) { -+ kfree(usb); -+ clk = ERR_PTR(ret); -+ } -+ -+ return clk; -+} -+ -+U_BOOT_DRIVER(at91_sam9x60_usb_clk) = { -+ .name = UBOOT_DM_CLK_AT91_SAM9X60_USB, -+ .id = UCLASS_CLK, -+ .ops = &sam9x60_usb_ops, -+ .flags = DM_FLAG_PRE_RELOC, -+}; -diff --git a/drivers/clk/at91/pmc.c b/drivers/clk/at91/pmc.c -index 270892517a..87d2069d89 100644 ---- a/drivers/clk/at91/pmc.c -+++ b/drivers/clk/at91/pmc.c -@@ -120,3 +120,45 @@ int at91_clk_mux_index_to_val(const u32 *table, u32 num_parents, u32 index) - - return table[index]; - } -+ -+int at91_clk_setup(const struct pmc_clk_setup *setup, int size) -+{ -+ struct clk *c, *parent; -+ int i, ret; -+ -+ if (!size) -+ return 0; -+ -+ if (!setup) -+ return -EINVAL; -+ -+ for (i = 0; i < size; i++) { -+ ret = clk_get_by_id(setup[i].cid, &c); -+ if (ret) -+ return ret; -+ -+ if (setup[i].pid) { -+ ret = clk_get_by_id(setup[i].pid, &parent); -+ if (ret) -+ return ret; -+ -+ ret = clk_set_parent(c, parent); -+ if (ret) -+ return ret; -+ -+ if (setup[i].prate) { -+ ret = clk_set_rate(parent, setup[i].prate); -+ if (ret < 0) -+ return ret; -+ } -+ } -+ -+ if (setup[i].rate) { -+ ret = clk_set_rate(c, setup[i].rate); -+ if (ret < 0) -+ return ret; -+ } -+ } -+ -+ return 0; -+} -diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h -index 2b4dd9a3d9..ff464522aa 100644 ---- a/drivers/clk/at91/pmc.h -+++ b/drivers/clk/at91/pmc.h -@@ -71,6 +71,26 @@ struct clk_pcr_layout { - u32 pid_mask; - }; - -+struct clk_usbck_layout { -+ u32 offset; -+ u32 usbs_mask; -+ u32 usbdiv_mask; -+}; -+ -+/** -+ * Clock setup description -+ * @cid: clock id corresponding to clock subsystem -+ * @pid: parent clock id corresponding to clock subsystem -+ * @rate: clock rate -+ * @prate: parent rate -+ */ -+struct pmc_clk_setup { -+ unsigned int cid; -+ unsigned int pid; -+ unsigned long rate; -+ unsigned long prate; -+}; -+ - extern const struct clk_programmable_layout at91rm9200_programmable_layout; - extern const struct clk_programmable_layout at91sam9g45_programmable_layout; - extern const struct clk_programmable_layout at91sam9x5_programmable_layout; -@@ -87,6 +107,11 @@ struct clk *at91_clk_sam9x5_main(void __iomem *reg, const char *name, - const char * const *parent_names, int num_parents, - const u32 *mux_table, int type); - struct clk * -+sam9x60_clk_register_usb(void __iomem *base, const char *name, -+ const char * const *parent_names, u8 num_parents, -+ const struct clk_usbck_layout *usbck_layout, -+ const u32 *clk_mux_table, const u32 *mux_table, u8 id); -+struct clk * - sam9x60_clk_register_div_pll(void __iomem *base, const char *name, - const char *parent_name, u8 id, - const struct clk_pll_characteristics *characteristics, -@@ -149,4 +174,6 @@ void pmc_write(void __iomem *base, unsigned int off, unsigned int val); - void pmc_update_bits(void __iomem *base, unsigned int off, unsigned int mask, - unsigned int bits); - -+int at91_clk_setup(const struct pmc_clk_setup *setup, int size); -+ - #endif -diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c -index 6b5486c6c9..e2f72446d5 100644 ---- a/drivers/clk/at91/sam9x60.c -+++ b/drivers/clk/at91/sam9x60.c -@@ -76,6 +76,8 @@ enum pmc_clk_ids { - ID_QSPI = 18, - - ID_MCK_PRES = 19, -+ ID_USBCK = 20, -+ ID_UHPCK = 21, - - ID_MAX, - }; -@@ -99,6 +101,7 @@ static const char *clk_names[] = { - [ID_PLL_A_DIV] = "plla_divpmcck", - [ID_MCK_PRES] = "mck_pres", - [ID_MCK_DIV] = "mck_div", -+ [ID_USBCK] = "usbck", - }; - - /* Fractional PLL output range. */ -@@ -171,6 +174,13 @@ static const struct clk_pcr_layout pcr_layout = { - .pid_mask = GENMASK(6, 0), - }; - -+/* USB clock layout */ -+static const struct clk_usbck_layout usbck_layout = { -+ .offset = 0x38, -+ .usbs_mask = GENMASK(1, 0), -+ .usbdiv_mask = GENMASK(11, 8), -+}; -+ - /** - * PLL clocks description - * @n: clock name -@@ -266,6 +276,7 @@ static const struct { - u8 cid; - } sam9x60_systemck[] = { - { .n = "ddrck", .p = "mck_div", .id = 2, .cid = ID_DDR, }, -+ { .n = "uhpck", .p = "usbck", .id = 6, .cid = ID_UHPCK }, - { .n = "pck0", .p = "prog0", .id = 8, .cid = ID_PCK0, }, - { .n = "pck1", .p = "prog1", .id = 9, .cid = ID_PCK1, }, - { .n = "qspick", .p = "mck_div", .id = 19, .cid = ID_QSPI, }, -@@ -367,6 +378,31 @@ static const struct { - { .n = "dbgu_gclk", .id = 47, }, - }; - -+/** -+ * Clock setup description -+ * @cid: clock id corresponding to clock subsystem -+ * @pid: parent clock id corresponding to clock subsystem -+ * @rate: clock rate -+ * @prate: parent rate -+ */ -+static const struct pmc_clk_setup sam9x60_clk_setup[] = { -+ { -+ .cid = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_U_FRAC), -+ .rate = 960000000, -+ }, -+ -+ { -+ .cid = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_U_DIV), -+ .rate = 480000000, -+ }, -+ -+ { -+ .cid = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_USBCK), -+ .pid = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_U_DIV), -+ .rate = 48000000, -+ }, -+}; -+ - #define prepare_mux_table(_allocs, _index, _dst, _src, _num, _label) \ - do { \ - int _i; \ -@@ -543,6 +579,28 @@ static int sam9x60_clk_probe(struct udevice *dev) - } - clk_dm(AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK_DIV), c); - -+ /* Register usbck. */ -+ p[0] = clk_names[ID_PLL_A_DIV]; -+ p[1] = clk_names[ID_PLL_U_DIV]; -+ p[2] = clk_names[ID_MAIN_XTAL]; -+ m[0] = 0; -+ m[1] = 1; -+ m[2] = 2; -+ cm[0] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_A_DIV); -+ cm[1] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_U_DIV); -+ cm[2] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MAIN_XTAL); -+ prepare_mux_table(clkmuxallocs, clkmuxallocindex, tmpclkmux, cm, -+ 3, fail); -+ prepare_mux_table(muxallocs, muxallocindex, tmpmux, m, 3, fail); -+ c = sam9x60_clk_register_usb(base, clk_names[ID_USBCK], p, 3, -+ &usbck_layout, tmpclkmux, tmpmux, -+ ID_USBCK); -+ if (IS_ERR(c)) { -+ ret = PTR_ERR(c); -+ goto fail; -+ } -+ clk_dm(AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_USBCK), c); -+ - /* Register programmable clocks. */ - p[0] = clk_names[ID_MD_SLCK]; - p[1] = clk_names[ID_TD_SLCK]; -@@ -635,6 +693,11 @@ static int sam9x60_clk_probe(struct udevice *dev) - clk_dm(AT91_TO_CLK_ID(PMC_TYPE_GCK, sam9x60_gck[i].id), c); - } - -+ /* Setup clocks. */ -+ ret = at91_clk_setup(sam9x60_clk_setup, ARRAY_SIZE(sam9x60_clk_setup)); -+ if (ret) -+ goto fail; -+ - return 0; - - fail: -diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c -index d1ec3c82b5..8bd9c14156 100644 ---- a/drivers/clk/at91/sama7g5.c -+++ b/drivers/clk/at91/sama7g5.c -@@ -1070,19 +1070,8 @@ static const struct { - }, - }; - --/** -- * Clock setup description -- * @cid: clock id corresponding to clock subsystem -- * @pid: parent clock id corresponding to clock subsystem -- * @rate: clock rate -- * @prate: parent rate -- */ --static const struct pmc_clk_setup { -- unsigned int cid; -- unsigned int pid; -- unsigned long rate; -- unsigned long prate; --} sama7g5_clk_setup[] = { -+/* Clock setup description */ -+static const struct pmc_clk_setup sama7g5_clk_setup[] = { - { - .cid = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_ETH_FRAC), - .rate = 625000000, -@@ -1119,7 +1108,7 @@ static int sama7g5_clk_probe(struct udevice *dev) - unsigned int *muxallocs[SAMA7G5_MAX_MUX_ALLOCS]; - const char *p[10]; - unsigned int cm[10], m[10], *tmpclkmux, *tmpmux; -- struct clk clk, *c, *parent; -+ struct clk clk, *c; - bool main_osc_bypass; - int ret, muxallocindex = 0, clkmuxallocindex = 0, i, j; - -@@ -1353,34 +1342,9 @@ static int sama7g5_clk_probe(struct udevice *dev) - } - - /* Setup clocks. */ -- for (i = 0; i < ARRAY_SIZE(sama7g5_clk_setup); i++) { -- ret = clk_get_by_id(sama7g5_clk_setup[i].cid, &c); -- if (ret) -- goto fail; -- -- if (sama7g5_clk_setup[i].pid) { -- ret = clk_get_by_id(sama7g5_clk_setup[i].pid, &parent); -- if (ret) -- goto fail; -- -- ret = clk_set_parent(c, parent); -- if (ret) -- goto fail; -- -- if (sama7g5_clk_setup[i].prate) { -- ret = clk_set_rate(parent, -- sama7g5_clk_setup[i].prate); -- if (ret < 0) -- goto fail; -- } -- } -- -- if (sama7g5_clk_setup[i].rate) { -- ret = clk_set_rate(c, sama7g5_clk_setup[i].rate); -- if (ret < 0) -- goto fail; -- } -- } -+ ret = at91_clk_setup(sama7g5_clk_setup, ARRAY_SIZE(sama7g5_clk_setup)); -+ if (ret) -+ goto fail; - - return 0; - -diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c -index ffbc1d1ba9..09bef596f2 100644 ---- a/drivers/clk/imx/clk-imx8mp.c -+++ b/drivers/clk/imx/clk-imx8mp.c -@@ -70,6 +70,14 @@ static const char *imx8mp_i2c6_sels[] = {"clock-osc-24m", "sys_pll1_160m", "sys_ - "sys_pll3_out", "audio_pll1_out", "video_pll1_out", - "audio_pll2_out", "sys_pll1_133m", }; - -+static const char *imx8mp_enet_qos_sels[] = {"clock-osc-24m", "sys_pll2_125m", "sys_pll2_50m", -+ "sys_pll2_100m", "sys_pll1_160m", "audio_pll1_out", -+ "video_pll1_out", "clk_ext4", }; -+ -+static const char *imx8mp_enet_qos_timer_sels[] = {"clock-osc-24m", "sys_pll2_100m", "audio_pll1_out", -+ "clk_ext1", "clk_ext2", "clk_ext3", -+ "clk_ext4", "video_pll1_out", }; -+ - static const char *imx8mp_usdhc1_sels[] = {"clock-osc-24m", "sys_pll1_400m", "sys_pll1_800m", - "sys_pll2_500m", "sys_pll3_out", "sys_pll1_266m", - "audio_pll2_out", "sys_pll1_100m", }; -@@ -122,6 +130,22 @@ static const char *imx8mp_gic_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sys_p - "sys_pll2_100m", "sys_pll1_800m", - "sys_pll2_500m", "clk_ext4", "audio_pll2_out" }; - -+static const char *imx8mp_pwm1_sels[] = {"clock-osc-24m", "sys_pll2_100m", "sys_pll1_160m", -+ "sys_pll1_40m", "sys_pll3_out", "clk_ext1", -+ "sys_pll1_80m", "video_pll1_out", }; -+ -+static const char *imx8mp_pwm2_sels[] = {"clock-osc-24m", "sys_pll2_100m", "sys_pll1_160m", -+ "sys_pll1_40m", "sys_pll3_out", "clk_ext1", -+ "sys_pll1_80m", "video_pll1_out", }; -+ -+static const char *imx8mp_pwm3_sels[] = {"clock-osc-24m", "sys_pll2_100m", "sys_pll1_160m", -+ "sys_pll1_40m", "sys_pll3_out", "clk_ext2", -+ "sys_pll1_80m", "video_pll1_out", }; -+ -+static const char *imx8mp_pwm4_sels[] = {"clock-osc-24m", "sys_pll2_100m", "sys_pll1_160m", -+ "sys_pll1_40m", "sys_pll3_out", "clk_ext2", -+ "sys_pll1_80m", "video_pll1_out", }; -+ - static const char *imx8mp_ecspi1_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sys_pll1_40m", - "sys_pll1_160m", "sys_pll1_800m", "sys_pll3_out", - "sys_pll2_250m", "audio_pll2_out", }; -@@ -250,6 +274,8 @@ static int imx8mp_clk_probe(struct udevice *dev) - clk_dm(IMX8MP_CLK_DRAM_APB, imx8m_clk_composite_critical("dram_apb", imx8mp_dram_apb_sels, base + 0xa080)); - clk_dm(IMX8MP_CLK_I2C5, imx8m_clk_composite("i2c5", imx8mp_i2c5_sels, base + 0xa480)); - clk_dm(IMX8MP_CLK_I2C6, imx8m_clk_composite("i2c6", imx8mp_i2c6_sels, base + 0xa500)); -+ clk_dm(IMX8MP_CLK_ENET_QOS, imx8m_clk_composite("enet_qos", imx8mp_enet_qos_sels, base + 0xa880)); -+ clk_dm(IMX8MP_CLK_ENET_QOS_TIMER, imx8m_clk_composite("enet_qos_timer", imx8mp_enet_qos_timer_sels, base + 0xa900)); - clk_dm(IMX8MP_CLK_ENET_REF, imx8m_clk_composite("enet_ref", imx8mp_enet_ref_sels, base + 0xa980)); - clk_dm(IMX8MP_CLK_ENET_TIMER, imx8m_clk_composite("enet_timer", imx8mp_enet_timer_sels, base + 0xaa00)); - clk_dm(IMX8MP_CLK_ENET_PHY_REF, imx8m_clk_composite("enet_phy_ref", imx8mp_enet_phy_ref_sels, base + 0xaa80)); -@@ -270,6 +296,10 @@ static int imx8mp_clk_probe(struct udevice *dev) - clk_dm(IMX8MP_CLK_GIC, imx8m_clk_composite_critical("gic", imx8mp_gic_sels, base + 0xb200)); - clk_dm(IMX8MP_CLK_ECSPI1, imx8m_clk_composite("ecspi1", imx8mp_ecspi1_sels, base + 0xb280)); - clk_dm(IMX8MP_CLK_ECSPI2, imx8m_clk_composite("ecspi2", imx8mp_ecspi2_sels, base + 0xb300)); -+ clk_dm(IMX8MP_CLK_PWM1, imx8m_clk_composite_critical("pwm1", imx8mp_pwm1_sels, base + 0xb380)); -+ clk_dm(IMX8MP_CLK_PWM2, imx8m_clk_composite_critical("pwm2", imx8mp_pwm2_sels, base + 0xb400)); -+ clk_dm(IMX8MP_CLK_PWM3, imx8m_clk_composite_critical("pwm3", imx8mp_pwm3_sels, base + 0xb480)); -+ clk_dm(IMX8MP_CLK_PWM4, imx8m_clk_composite_critical("pwm4", imx8mp_pwm4_sels, base + 0xb500)); - clk_dm(IMX8MP_CLK_ECSPI3, imx8m_clk_composite("ecspi3", imx8mp_ecspi3_sels, base + 0xc180)); - - clk_dm(IMX8MP_CLK_WDOG, imx8m_clk_composite("wdog", imx8mp_wdog_sels, base + 0xb900)); -@@ -292,10 +322,17 @@ static int imx8mp_clk_probe(struct udevice *dev) - clk_dm(IMX8MP_CLK_I2C2_ROOT, imx_clk_gate4("i2c2_root_clk", "i2c2", base + 0x4180, 0)); - clk_dm(IMX8MP_CLK_I2C3_ROOT, imx_clk_gate4("i2c3_root_clk", "i2c3", base + 0x4190, 0)); - clk_dm(IMX8MP_CLK_I2C4_ROOT, imx_clk_gate4("i2c4_root_clk", "i2c4", base + 0x41a0, 0)); -+ clk_dm(IMX8MP_CLK_PWM1_ROOT, imx_clk_gate4("pwm1_root_clk", "pwm1", base + 0x4280, 0)); -+ clk_dm(IMX8MP_CLK_PWM2_ROOT, imx_clk_gate4("pwm2_root_clk", "pwm2", base + 0x4290, 0)); -+ clk_dm(IMX8MP_CLK_PWM3_ROOT, imx_clk_gate4("pwm3_root_clk", "pwm3", base + 0x42a0, 0)); -+ clk_dm(IMX8MP_CLK_PWM4_ROOT, imx_clk_gate4("pwm4_root_clk", "pwm4", base + 0x42b0, 0)); -+ clk_dm(IMX8MP_CLK_QOS_ROOT, imx_clk_gate4("qos_root_clk", "ipg_root", base + 0x42c0, 0)); -+ clk_dm(IMX8MP_CLK_QOS_ENET_ROOT, imx_clk_gate4("qos_enet_root_clk", "ipg_root", base + 0x42e0, 0)); - clk_dm(IMX8MP_CLK_QSPI_ROOT, imx_clk_gate4("qspi_root_clk", "qspi", base + 0x42f0, 0)); - clk_dm(IMX8MP_CLK_I2C5_ROOT, imx_clk_gate2("i2c5_root_clk", "i2c5", base + 0x4330, 0)); - clk_dm(IMX8MP_CLK_I2C6_ROOT, imx_clk_gate2("i2c6_root_clk", "i2c6", base + 0x4340, 0)); - clk_dm(IMX8MP_CLK_SIM_ENET_ROOT, imx_clk_gate4("sim_enet_root_clk", "enet_axi", base + 0x4400, 0)); -+ clk_dm(IMX8MP_CLK_ENET_QOS_ROOT, imx_clk_gate4("enet_qos_root_clk", "sim_enet_root_clk", base + 0x43b0, 0)); - clk_dm(IMX8MP_CLK_UART1_ROOT, imx_clk_gate4("uart1_root_clk", "uart1", base + 0x4490, 0)); - clk_dm(IMX8MP_CLK_UART2_ROOT, imx_clk_gate4("uart2_root_clk", "uart2", base + 0x44a0, 0)); - clk_dm(IMX8MP_CLK_UART3_ROOT, imx_clk_gate4("uart3_root_clk", "uart3", base + 0x44b0, 0)); -diff --git a/drivers/clk/renesas/clk-rcar-gen3.c b/drivers/clk/renesas/clk-rcar-gen3.c -index c121d82de7..1697867ff0 100644 ---- a/drivers/clk/renesas/clk-rcar-gen3.c -+++ b/drivers/clk/renesas/clk-rcar-gen3.c -@@ -55,6 +55,7 @@ static int gen3_clk_get_parent(struct gen3_clk_priv *priv, struct clk *clk, - struct cpg_mssr_info *info, struct clk *parent) - { - const struct cpg_core_clk *core; -+ u8 shift; - int ret; - - if (!renesas_clk_is_mod(clk)) { -@@ -63,8 +64,9 @@ static int gen3_clk_get_parent(struct gen3_clk_priv *priv, struct clk *clk, - return ret; - - if (core->type == CLK_TYPE_GEN3_MDSEL) { -+ shift = priv->cpg_mode & BIT(core->offset) ? 16 : 0; - parent->dev = clk->dev; -- parent->id = core->parent >> (priv->sscg ? 16 : 0); -+ parent->id = core->parent >> shift; - parent->id &= 0xffff; - return 0; - } -@@ -183,6 +185,7 @@ static u64 gen3_clk_get_rate64(struct clk *clk) - priv->cpg_pll_config; - u32 value, div; - u64 rate = 0; -+ u8 shift; - int ret; - - debug("%s[%i] Clock: id=%lu\n", __func__, __LINE__, clk->id); -@@ -277,11 +280,11 @@ static u64 gen3_clk_get_rate64(struct clk *clk) - "FIXED"); - - case CLK_TYPE_GEN3_MDSEL: -- div = (core->div >> (priv->sscg ? 16 : 0)) & 0xffff; -+ shift = priv->cpg_mode & BIT(core->offset) ? 16 : 0; -+ div = (core->div >> shift) & 0xffff; - rate = gen3_clk_get_rate64(&parent) / div; - debug("%s[%i] PE clk: parent=%i div=%u => rate=%llu\n", -- __func__, __LINE__, -- (core->parent >> (priv->sscg ? 16 : 0)) & 0xffff, -+ __func__, __LINE__, (core->parent >> shift) & 0xffff, - div, rate); - return rate; - -@@ -407,7 +410,6 @@ static int gen3_clk_probe(struct udevice *dev) - struct cpg_mssr_info *info = - (struct cpg_mssr_info *)dev_get_driver_data(dev); - fdt_addr_t rst_base; -- u32 cpg_mode; - int ret; - - priv->base = dev_read_addr_ptr(dev); -@@ -423,15 +425,13 @@ static int gen3_clk_probe(struct udevice *dev) - if (rst_base == FDT_ADDR_T_NONE) - return -EINVAL; - -- cpg_mode = readl(rst_base + info->reset_modemr_offset); -+ priv->cpg_mode = readl(rst_base + info->reset_modemr_offset); - - priv->cpg_pll_config = -- (struct rcar_gen3_cpg_pll_config *)info->get_pll_config(cpg_mode); -+ (struct rcar_gen3_cpg_pll_config *)info->get_pll_config(priv->cpg_mode); - if (!priv->cpg_pll_config->extal_div) - return -EINVAL; - -- priv->sscg = !(cpg_mode & BIT(12)); -- - if (info->reg_layout == CLK_REG_LAYOUT_RCAR_GEN2_AND_GEN3) { - priv->info->status_regs = mstpsr; - priv->info->control_regs = smstpcr; -diff --git a/drivers/clk/renesas/rcar-gen3-cpg.h b/drivers/clk/renesas/rcar-gen3-cpg.h -index 200e4adb90..894e376549 100644 ---- a/drivers/clk/renesas/rcar-gen3-cpg.h -+++ b/drivers/clk/renesas/rcar-gen3-cpg.h -@@ -132,7 +132,7 @@ struct gen3_clk_priv { - struct cpg_mssr_info *info; - struct clk clk_extal; - struct clk clk_extalr; -- bool sscg; -+ u32 cpg_mode; - const struct rcar_gen3_cpg_pll_config *cpg_pll_config; - }; - -diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c -index a7df553e87..f972aa93d7 100644 ---- a/drivers/clk/rockchip/clk_rk3588.c -+++ b/drivers/clk/rockchip/clk_rk3588.c -@@ -9,6 +9,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -1555,6 +1556,21 @@ static ulong rk3588_clk_get_rate(struct clk *clk) - case TCLK_WDT0: - rate = OSC_HZ; - break; -+ case PCLK_PMU0_ROOT: -+ rate = 100000000; -+ break; -+ case HCLK_PMU_CM0_ROOT: -+ rate = 200000000; -+ break; -+ case ACLK_BUS_ROOT: -+ rate = 375000000; -+ break; -+ case CLK_150M_SRC: -+ rate = 150000000; -+ break; -+ case CLK_GPU: -+ rate = 200000000; -+ break; - #ifndef CONFIG_SPL_BUILD - case CLK_AUX16M_0: - case CLK_AUX16M_1: -@@ -1704,6 +1720,13 @@ static ulong rk3588_clk_set_rate(struct clk *clk, ulong rate) - case TCLK_WDT0: - ret = OSC_HZ; - break; -+ case PCLK_PMU0_ROOT: -+ case CLK_GPU: -+ case HCLK_PMU_CM0_ROOT: -+ case ACLK_BUS_ROOT: -+ case CLK_150M_SRC: -+ ret = 0; -+ break; - #ifndef CONFIG_SPL_BUILD - case CLK_AUX16M_0: - case CLK_AUX16M_1: -@@ -1971,7 +1994,7 @@ static int rk3588_clk_bind(struct udevice *dev) - - #if CONFIG_IS_ENABLED(RESET_ROCKCHIP) - ret = offsetof(struct rk3588_cru, softrst_con[0]); -- ret = rockchip_reset_bind(dev, ret, 49158); -+ ret = rk3588_reset_bind_lut(dev, ret, 49158); - if (ret) - debug("Warning: software reset driver bind faile\n"); - #endif -@@ -1994,3 +2017,127 @@ U_BOOT_DRIVER(rockchip_rk3588_cru) = { - .bind = rk3588_clk_bind, - .probe = rk3588_clk_probe, - }; -+ -+#ifdef CONFIG_SPL_BUILD -+#define SCRU_BASE 0xfd7d0000 -+ -+static ulong rk3588_scru_clk_get_rate(struct clk *clk) -+{ -+ u32 con, div, sel, parent; -+ -+ switch (clk->id) { -+ case SCMI_CCLK_SD: -+ con = readl(SCRU_BASE + RK3588_CLKSEL_CON(3)); -+ sel = (con & SCMI_CCLK_SD_SEL_MASK) >> SCMI_CCLK_SD_SEL_SHIFT; -+ div = (con & SCMI_CCLK_SD_DIV_MASK) >> SCMI_CCLK_SD_DIV_SHIFT; -+ if (sel == SCMI_CCLK_SD_SEL_GPLL) -+ parent = GPLL_HZ; -+ else if (sel == SCMI_CCLK_SD_SEL_SPLL) -+ parent = SPLL_HZ; -+ else -+ parent = OSC_HZ; -+ return DIV_TO_RATE(parent, div); -+ case SCMI_HCLK_SD: -+ con = readl(SCRU_BASE + RK3588_CLKSEL_CON(1)); -+ sel = (con & SCMI_HCLK_SD_SEL_MASK) >> SCMI_HCLK_SD_SEL_SHIFT; -+ if (sel == SCMI_HCLK_SD_SEL_150M) -+ return 150 * MHz; -+ else if (sel == SCMI_HCLK_SD_SEL_100M) -+ return 100 * MHz; -+ else if (sel == SCMI_HCLK_SD_SEL_50M) -+ return 50 * MHz; -+ else -+ return OSC_HZ; -+ default: -+ return -ENOENT; -+ } -+} -+ -+static ulong rk3588_scru_clk_set_rate(struct clk *clk, ulong rate) -+{ -+ u32 div, sel; -+ -+ switch (clk->id) { -+ case SCMI_CCLK_SD: -+ if ((OSC_HZ % rate) == 0) { -+ sel = SCMI_CCLK_SD_SEL_24M; -+ div = DIV_ROUND_UP(OSC_HZ, rate); -+ } else if ((SPLL_HZ % rate) == 0) { -+ sel = SCMI_CCLK_SD_SEL_SPLL; -+ div = DIV_ROUND_UP(SPLL_HZ, rate); -+ } else { -+ sel = SCMI_CCLK_SD_SEL_GPLL; -+ div = DIV_ROUND_UP(GPLL_HZ, rate); -+ } -+ rk_clrsetreg(SCRU_BASE + RK3588_CLKSEL_CON(3), -+ SCMI_CCLK_SD_SEL_MASK | SCMI_CCLK_SD_DIV_MASK, -+ sel << SCMI_CCLK_SD_SEL_SHIFT | -+ (div - 1) << SCMI_CCLK_SD_DIV_SHIFT); -+ break; -+ case SCMI_HCLK_SD: -+ if (rate >= 150 * MHz) -+ sel = SCMI_HCLK_SD_SEL_150M; -+ else if (rate >= 100 * MHz) -+ sel = SCMI_HCLK_SD_SEL_100M; -+ else if (rate >= 50 * MHz) -+ sel = SCMI_HCLK_SD_SEL_50M; -+ else -+ sel = SCMI_HCLK_SD_SEL_24M; -+ rk_clrsetreg(SCRU_BASE + RK3588_CLKSEL_CON(1), -+ SCMI_HCLK_SD_SEL_MASK, -+ sel << SCMI_HCLK_SD_SEL_SHIFT); -+ break; -+ default: -+ return -ENOENT; -+ } -+ -+ return rk3588_scru_clk_get_rate(clk); -+} -+ -+static const struct clk_ops rk3588_scru_clk_ops = { -+ .get_rate = rk3588_scru_clk_get_rate, -+ .set_rate = rk3588_scru_clk_set_rate, -+}; -+ -+U_BOOT_DRIVER(rockchip_rk3588_scru) = { -+ .name = "rockchip_rk3588_scru", -+ .id = UCLASS_CLK, -+ .ops = &rk3588_scru_clk_ops, -+}; -+ -+static int rk3588_scmi_spl_glue_bind(struct udevice *dev) -+{ -+ ofnode node; -+ u32 protocol_id; -+ const char *name; -+ -+ dev_for_each_subnode(node, dev) { -+ if (!ofnode_is_enabled(node)) -+ continue; -+ -+ if (ofnode_read_u32(node, "reg", &protocol_id)) -+ continue; -+ -+ if (protocol_id != SCMI_PROTOCOL_ID_CLOCK) -+ continue; -+ -+ name = ofnode_get_name(node); -+ return device_bind_driver_to_node(dev, "rockchip_rk3588_scru", -+ name, node, NULL); -+ } -+ -+ return -ENOENT; -+} -+ -+static const struct udevice_id rk3588_scmi_spl_glue_ids[] = { -+ { .compatible = "arm,scmi-smc" }, -+ { } -+}; -+ -+U_BOOT_DRIVER(rk3588_scmi_spl_glue) = { -+ .name = "rk3588_scmi_spl_glue", -+ .id = UCLASS_NOP, -+ .of_match = rk3588_scmi_spl_glue_ids, -+ .bind = rk3588_scmi_spl_glue_bind, -+}; -+#endif -diff --git a/drivers/clk/uniphier/clk-uniphier-sys.c b/drivers/clk/uniphier/clk-uniphier-sys.c -index ff5d364f59..3b8595fe61 100644 ---- a/drivers/clk/uniphier/clk-uniphier-sys.c -+++ b/drivers/clk/uniphier/clk-uniphier-sys.c -@@ -28,7 +28,10 @@ const struct uniphier_clk_data uniphier_pxs2_sys_clk_data[] = { - UNIPHIER_CLK_GATE_SIMPLE(14, 0x2104, 16), /* usb30 (Pro4, Pro5, PXs2) */ - UNIPHIER_CLK_GATE_SIMPLE(15, 0x2104, 17), /* usb31 (Pro4, Pro5, PXs2) */ - UNIPHIER_CLK_GATE_SIMPLE(16, 0x2104, 19), /* usb30-phy (PXs2) */ -+ UNIPHIER_CLK_RATE(17, 25000000), /* usb30-phy2 (PXs2) */ -+ UNIPHIER_CLK_RATE(18, 25000000), /* usb30-phy3 (PXs2) */ - UNIPHIER_CLK_GATE_SIMPLE(20, 0x2104, 20), /* usb31-phy (PXs2) */ -+ UNIPHIER_CLK_RATE(21, 25000000), /* usb31-phy2 (PXs2) */ - UNIPHIER_CLK_GATE_SIMPLE(24, 0x2108, 2), /* pcie (Pro5) */ - { /* sentinel */ } - #endif -@@ -44,6 +47,8 @@ const struct uniphier_clk_data uniphier_ld20_sys_clk_data[] = { - UNIPHIER_CLK_GATE_SIMPLE(14, 0x210c, 14), /* usb30 (LD20) */ - UNIPHIER_CLK_GATE_SIMPLE(16, 0x210c, 12), /* usb30-phy0 (LD20) */ - UNIPHIER_CLK_GATE_SIMPLE(17, 0x210c, 13), /* usb30-phy1 (LD20) */ -+ UNIPHIER_CLK_RATE(18, 25000000), /* usb30-phy2 (LD20) */ -+ UNIPHIER_CLK_RATE(19, 25000000), /* usb30-phy3 (LD20) */ - UNIPHIER_CLK_GATE_SIMPLE(24, 0x210c, 4), /* pcie */ - { /* sentinel */ } - #endif -diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig -index 6fc8854b57..0f755aa702 100644 ---- a/drivers/core/Kconfig -+++ b/drivers/core/Kconfig -@@ -301,6 +301,13 @@ config SPL_SIMPLE_BUS - Supports the 'simple-bus' driver, which is used on some systems - in SPL. - -+config TPL_SIMPLE_BUS -+ bool "Support simple-bus driver in TPL" -+ depends on TPL_DM && TPL_OF_CONTROL -+ help -+ Supports the 'simple-bus' driver, which is used on some systems -+ in TPL. -+ - config SIMPLE_BUS_CORRECT_RANGE - bool "Decode the 'simple-bus' by honoring the #address-cells and #size-cells" - depends on SIMPLE_BUS -diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c -index d08578e9c4..f49ee493d3 100644 ---- a/drivers/core/ofnode.c -+++ b/drivers/core/ofnode.c -@@ -1312,24 +1312,36 @@ bool ofnode_pre_reloc(ofnode node) - { - #if defined(CONFIG_SPL_BUILD) || defined(CONFIG_TPL_BUILD) - /* for SPL and TPL the remaining nodes after the fdtgrep 1st pass -- * had property dm-pre-reloc or u-boot,dm-spl/tpl. -+ * had property bootph-all or bootph-pre-sram/bootph-pre-ram. - * They are removed in final dtb (fdtgrep 2nd pass) - */ - return true; - #else -- if (ofnode_read_bool(node, "u-boot,dm-pre-reloc")) -+ if (ofnode_read_bool(node, "bootph-all")) - return true; -- if (ofnode_read_bool(node, "u-boot,dm-pre-proper")) -+ if (ofnode_read_bool(node, "bootph-some-ram")) - return true; - - /* - * In regular builds individual spl and tpl handling both - * count as handled pre-relocation for later second init. - */ -- if (ofnode_read_bool(node, "u-boot,dm-spl") || -- ofnode_read_bool(node, "u-boot,dm-tpl")) -+ if (ofnode_read_bool(node, "bootph-pre-ram") || -+ ofnode_read_bool(node, "bootph-pre-sram")) - return true; - -+ if (IS_ENABLED(CONFIG_OF_TAG_MIGRATE)) { -+ /* detect and handle old tags */ -+ if (ofnode_read_bool(node, "u-boot,dm-pre-reloc") || -+ ofnode_read_bool(node, "u-boot,dm-pre-proper") || -+ ofnode_read_bool(node, "u-boot,dm-spl") || -+ ofnode_read_bool(node, "u-boot,dm-tpl") || -+ ofnode_read_bool(node, "u-boot,dm-vpl")) { -+ gd->flags |= GD_FLG_OF_TAG_MIGRATE; -+ return true; -+ } -+ } -+ - return false; - #endif - } -diff --git a/drivers/ddr/imx/imx8ulp/Kconfig b/drivers/ddr/imx/imx8ulp/Kconfig -index 42848863aa..5448c33838 100644 ---- a/drivers/ddr/imx/imx8ulp/Kconfig -+++ b/drivers/ddr/imx/imx8ulp/Kconfig -@@ -13,6 +13,6 @@ config SAVED_DRAM_TIMING_BASE - help - The DRAM config timing data need to be saved into sram - for low power use. -- default 0x2006c000 -+ default 0x20055000 - - endmenu -diff --git a/drivers/ddr/imx/imx8ulp/ddr_init.c b/drivers/ddr/imx/imx8ulp/ddr_init.c -index a5a9fd8d7c..c362a2da33 100644 ---- a/drivers/ddr/imx/imx8ulp/ddr_init.c -+++ b/drivers/ddr/imx/imx8ulp/ddr_init.c -@@ -31,6 +31,7 @@ - #define DENALI_CTL_25 (DDR_CTL_BASE_ADDR + 4 * 25) - - #define DENALI_PHY_1624 (DDR_PHY_BASE_ADDR + 4 * 1624) -+#define DENALI_PHY_1625 (DDR_PHY_BASE_ADDR + 4 * 1625) - #define DENALI_PHY_1537 (DDR_PHY_BASE_ADDR + 4 * 1537) - #define PHY_FREQ_SEL_MULTICAST_EN(X) ((X) << 8) - #define PHY_FREQ_SEL_INDEX(X) ((X) << 16) -@@ -82,25 +83,39 @@ int ddr_calibration(unsigned int fsp_table[3]) - u32 int_status_init, phy_freq_req, phy_freq_type; - u32 lock_0, lock_1, lock_2; - u32 freq_chg_pt, freq_chg_cnt; -+ u32 is_lpddr4 = 0; - - if (IS_ENABLED(CONFIG_IMX8ULP_DRAM_PHY_PLL_BYPASS)) { - ddr_enable_pll_bypass(); - freq_chg_cnt = 0; - freq_chg_pt = 0; - } else { -- reg_val = readl(DENALI_CTL_250); -- if (((reg_val >> 16) & 0x3) == 1) -- freq_chg_cnt = 2; -- else -- freq_chg_cnt = 3; -- -- reg_val = readl(DENALI_PI_12); -- if (reg_val == 0x3) { -- freq_chg_pt = 1; -- } else if (reg_val == 0x7) { -- freq_chg_pt = 2; -+ reg_val = (readl(DENALI_CTL_00)>>8)&0xf; -+ if(reg_val == 0x7) { -+ /* LPDDR3 type */ -+ set_ddr_clk(fsp_table[1] >> 1); -+ freq_chg_cnt = 0; -+ freq_chg_pt = 0; -+ } else if(reg_val == 0xb) { -+ /* LPDDR4/4x type */ -+ is_lpddr4 = 1; -+ reg_val = readl(DENALI_CTL_250); -+ if (((reg_val >> 16) & 0x3) == 1) -+ freq_chg_cnt = 2; -+ else -+ freq_chg_cnt = 3; -+ -+ reg_val = readl(DENALI_PI_12); -+ if(reg_val == 0x3) -+ freq_chg_pt = 1; -+ else if(reg_val == 0x7) -+ freq_chg_pt = 2; -+ else { -+ printf("frequency map(0x%x) is wrong, please check!\r\n", reg_val); -+ return -1; -+ } - } else { -- printf("frequency map(0x%x) is wrong, please check!\r\n", reg_val); -+ printf("Incorrect DDR type configured!\r\n"); - return -1; - } - } -@@ -179,6 +194,22 @@ int ddr_calibration(unsigned int fsp_table[3]) - } - - debug("De-Skew PLL is locked and ready\n"); -+ -+ /* Change LPDDR4 FREQ1 to bypass mode if it is lower than 200MHz */ -+ if(is_lpddr4 && fsp_table[1] < 400) { -+ /* Set FREQ1 to bypass mode */ -+ reg_val = PHY_FREQ_SEL_MULTICAST_EN(0) | PHY_FREQ_SEL_INDEX(0); -+ writel(reg_val, DENALI_PHY_1537); -+ -+ /* PHY_PLL_BYPASS=0x1 (DENALI_PHY_1624) */ -+ reg_val =readl(DENALI_PHY_1624) | 0x1; -+ writel(reg_val, DENALI_PHY_1624); -+ -+ /* DENALI_PHY_1625: bypass mode in PHY PLL */ -+ reg_val =readl(DENALI_PHY_1625) & ~0xf; -+ writel(reg_val, DENALI_PHY_1625); -+ } -+ - return 0; - } - -diff --git a/drivers/ddr/marvell/a38x/ddr3_init.h b/drivers/ddr/marvell/a38x/ddr3_init.h -index ba9f7881d5..6854bb49de 100644 ---- a/drivers/ddr/marvell/a38x/ddr3_init.h -+++ b/drivers/ddr/marvell/a38x/ddr3_init.h -@@ -9,7 +9,6 @@ - #include "ddr_ml_wrapper.h" - #include "mv_ddr_plat.h" - --#include "seq_exec.h" - #include "ddr3_logging_def.h" - #include "ddr3_training_hw_algo.h" - #include "ddr3_training_ip.h" -diff --git a/drivers/ddr/marvell/a38x/seq_exec.h b/drivers/ddr/marvell/a38x/seq_exec.h -deleted file mode 100644 -index fe0cb8f75d..0000000000 ---- a/drivers/ddr/marvell/a38x/seq_exec.h -+++ /dev/null -@@ -1,64 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0 */ --/* -- * Copyright (C) Marvell International Ltd. and its affiliates -- */ -- --#ifndef _SEQ_EXEC_H --#define _SEQ_EXEC_H -- --#define NA 0xff --#define DEFAULT_PARAM 0 --#define MV_BOARD_TCLK_ERROR 0xffffffff -- --#define NO_DATA 0xffffffff --#define MAX_DATA_ARRAY 5 --#define FIRST_CELL 0 -- --/* Operation types */ --enum mv_op { -- WRITE_OP, -- DELAY_OP, -- POLL_OP, --}; -- --/* Operation parameters */ --struct op_params { -- u32 unit_base_reg; -- u32 unit_offset; -- u32 mask; -- u32 data[MAX_DATA_ARRAY]; /* data array */ -- u8 wait_time; /* msec */ -- u16 num_of_loops; /* for polling only */ --}; -- --/* -- * Sequence parameters. Each sequence contains: -- * 1. Sequence id. -- * 2. Sequence size (total amount of operations during the sequence) -- * 3. a series of operations. operations can be write, poll or delay -- * 4. index in the data array (the entry where the relevant data sits) -- */ --struct cfg_seq { -- struct op_params *op_params_ptr; -- u8 cfg_seq_size; -- u8 data_arr_idx; --}; -- --extern struct cfg_seq serdes_seq_db[]; -- --/* -- * A generic function type for executing an operation (write, poll or delay) -- */ --typedef int (*op_execute_func_ptr)(u32 serdes_num, struct op_params *params, -- u32 data_arr_idx); -- --/* Specific functions for executing each operation */ --int write_op_execute(u32 serdes_num, struct op_params *params, -- u32 data_arr_idx); --int delay_op_execute(u32 serdes_num, struct op_params *params, -- u32 data_arr_idx); --int poll_op_execute(u32 serdes_num, struct op_params *params, u32 data_arr_idx); --enum mv_op get_cfg_seq_op(struct op_params *params); --int mv_seq_exec(u32 serdes_num, u32 seq_id); -- --#endif /*_SEQ_EXEC_H*/ -diff --git a/drivers/firmware/scmi/scmi_agent-uclass.c b/drivers/firmware/scmi/scmi_agent-uclass.c -index 9a32678617..54d563d929 100644 ---- a/drivers/firmware/scmi/scmi_agent-uclass.c -+++ b/drivers/firmware/scmi/scmi_agent-uclass.c -@@ -75,7 +75,7 @@ static int scmi_bind_protocols(struct udevice *dev) - name = ofnode_get_name(node); - switch (protocol_id) { - case SCMI_PROTOCOL_ID_CLOCK: -- if (IS_ENABLED(CONFIG_CLK_SCMI)) -+ if (CONFIG_IS_ENABLED(CLK_SCMI)) - drv = DM_DRIVER_GET(scmi_clock); - break; - case SCMI_PROTOCOL_ID_RESET_DOMAIN: -diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig -index 61490d6d8d..62cb77b098 100644 ---- a/drivers/fpga/Kconfig -+++ b/drivers/fpga/Kconfig -@@ -75,7 +75,7 @@ config FPGA_XILINX - - config FPGA_ZYNQMPPL - bool "Enable Xilinx FPGA driver for ZynqMP" -- depends on FPGA_XILINX -+ depends on FPGA_XILINX && ZYNQMP_FIRMWARE - help - Enable FPGA driver for loading bitstream in BIT and BIN format - on Xilinx Zynq UltraScale+ (ZynqMP) device. -diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c -index d1491da02c..7b5128fe27 100644 ---- a/drivers/fpga/zynqmppl.c -+++ b/drivers/fpga/zynqmppl.c -@@ -332,10 +332,16 @@ static int zynqmp_loads(xilinx_desc *desc, const void *buf, size_t bsize, - buf_lo = lower_32_bits((ulong)buf); - buf_hi = upper_32_bits((ulong)buf); - -- ret = xilinx_pm_request(PM_FPGA_LOAD, buf_lo, -+ if ((u32)(uintptr_t)fpga_sec_info->userkey_addr) -+ ret = xilinx_pm_request(PM_FPGA_LOAD, buf_lo, - buf_hi, -- (u32)(uintptr_t)fpga_sec_info->userkey_addr, -- flag, ret_payload); -+ (u32)(uintptr_t)fpga_sec_info->userkey_addr, -+ flag, ret_payload); -+ else -+ ret = xilinx_pm_request(PM_FPGA_LOAD, buf_lo, -+ buf_hi, (u32)bsize, -+ flag, ret_payload); -+ - if (ret) - puts("PL FPGA LOAD fail\n"); - else -diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c -index dbebf3a53e..c8be5a4d66 100644 ---- a/drivers/gpio/gpio-uclass.c -+++ b/drivers/gpio/gpio-uclass.c -@@ -1171,6 +1171,13 @@ int gpio_request_by_line_name(struct udevice *dev, const char *line_name, - { - int ret; - -+ if (!dev) { -+ uclass_foreach_dev_probe(UCLASS_GPIO, dev) -+ if (!gpio_request_by_line_name(dev, line_name, desc, flags)) -+ return 0; -+ return -ENOENT; -+ } -+ - ret = dev_read_stringlist_search(dev, "gpio-line-names", line_name); - if (ret < 0) - return ret; -diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c -index f7ad4d68b4..d9bde8f4f0 100644 ---- a/drivers/gpio/rk_gpio.c -+++ b/drivers/gpio/rk_gpio.c -@@ -13,83 +13,118 @@ - #include - #include - #include -+#include - #include - #include --#include -+#include -+#include -+ -+#define SWPORT_DR 0x0000 -+#define SWPORT_DDR 0x0004 -+#define EXT_PORT 0x0050 -+#define SWPORT_DR_L 0x0000 -+#define SWPORT_DR_H 0x0004 -+#define SWPORT_DDR_L 0x0008 -+#define SWPORT_DDR_H 0x000C -+#define EXT_PORT_V2 0x0070 -+#define VER_ID_V2 0x0078 - - enum { - ROCKCHIP_GPIOS_PER_BANK = 32, - }; - --#define OFFSET_TO_BIT(bit) (1UL << (bit)) -- - struct rockchip_gpio_priv { -- struct rockchip_gpio_regs *regs; -+ void __iomem *regs; - struct udevice *pinctrl; - int bank; - char name[2]; -+ u32 version; - }; - --static int rockchip_gpio_direction_input(struct udevice *dev, unsigned offset) -+static int rockchip_gpio_get_value(struct udevice *dev, unsigned offset) - { - struct rockchip_gpio_priv *priv = dev_get_priv(dev); -- struct rockchip_gpio_regs *regs = priv->regs; -+ u32 mask = BIT(offset), data; - -- clrbits_le32(®s->swport_ddr, OFFSET_TO_BIT(offset)); -+ if (priv->version) -+ data = readl(priv->regs + EXT_PORT_V2); -+ else -+ data = readl(priv->regs + EXT_PORT); - -- return 0; -+ return (data & mask) ? 1 : 0; - } - --static int rockchip_gpio_direction_output(struct udevice *dev, unsigned offset, -- int value) -+static int rockchip_gpio_set_value(struct udevice *dev, unsigned offset, -+ int value) - { - struct rockchip_gpio_priv *priv = dev_get_priv(dev); -- struct rockchip_gpio_regs *regs = priv->regs; -- int mask = OFFSET_TO_BIT(offset); -+ u32 mask = BIT(offset), data = value ? mask : 0; - -- clrsetbits_le32(®s->swport_dr, mask, value ? mask : 0); -- setbits_le32(®s->swport_ddr, mask); -+ if (priv->version && offset >= 16) -+ rk_clrsetreg(priv->regs + SWPORT_DR_H, mask >> 16, data >> 16); -+ else if (priv->version) -+ rk_clrsetreg(priv->regs + SWPORT_DR_L, mask, data); -+ else -+ clrsetbits_le32(priv->regs + SWPORT_DR, mask, data); - - return 0; - } - --static int rockchip_gpio_get_value(struct udevice *dev, unsigned offset) -+static int rockchip_gpio_direction_input(struct udevice *dev, unsigned offset) - { - struct rockchip_gpio_priv *priv = dev_get_priv(dev); -- struct rockchip_gpio_regs *regs = priv->regs; -+ u32 mask = BIT(offset); -+ -+ if (priv->version && offset >= 16) -+ rk_clrreg(priv->regs + SWPORT_DDR_H, mask >> 16); -+ else if (priv->version) -+ rk_clrreg(priv->regs + SWPORT_DDR_L, mask); -+ else -+ clrbits_le32(priv->regs + SWPORT_DDR, mask); - -- return readl(®s->ext_port) & OFFSET_TO_BIT(offset) ? 1 : 0; -+ return 0; - } - --static int rockchip_gpio_set_value(struct udevice *dev, unsigned offset, -- int value) -+static int rockchip_gpio_direction_output(struct udevice *dev, unsigned offset, -+ int value) - { - struct rockchip_gpio_priv *priv = dev_get_priv(dev); -- struct rockchip_gpio_regs *regs = priv->regs; -- int mask = OFFSET_TO_BIT(offset); -+ u32 mask = BIT(offset); -+ -+ rockchip_gpio_set_value(dev, offset, value); - -- clrsetbits_le32(®s->swport_dr, mask, value ? mask : 0); -+ if (priv->version && offset >= 16) -+ rk_setreg(priv->regs + SWPORT_DDR_H, mask >> 16); -+ else if (priv->version) -+ rk_setreg(priv->regs + SWPORT_DDR_L, mask); -+ else -+ setbits_le32(priv->regs + SWPORT_DDR, mask); - - return 0; - } - - static int rockchip_gpio_get_function(struct udevice *dev, unsigned offset) - { --#ifdef CONFIG_SPL_BUILD -- return -ENODATA; --#else - struct rockchip_gpio_priv *priv = dev_get_priv(dev); -- struct rockchip_gpio_regs *regs = priv->regs; -- bool is_output; -+ u32 mask = BIT(offset), data; - int ret; - -- ret = pinctrl_get_gpio_mux(priv->pinctrl, priv->bank, offset); -- if (ret) -- return ret; -- is_output = readl(®s->swport_ddr) & OFFSET_TO_BIT(offset); -+ if (CONFIG_IS_ENABLED(PINCTRL)) { -+ ret = pinctrl_get_gpio_mux(priv->pinctrl, priv->bank, offset); -+ if (ret < 0) -+ return ret; -+ else if (ret != RK_FUNC_GPIO) -+ return GPIOF_FUNC; -+ } -+ -+ if (priv->version && offset >= 16) -+ data = readl(priv->regs + SWPORT_DDR_H) << 16; -+ else if (priv->version) -+ data = readl(priv->regs + SWPORT_DDR_L); -+ else -+ data = readl(priv->regs + SWPORT_DDR); - -- return is_output ? GPIOF_OUTPUT : GPIOF_INPUT; --#endif -+ return (data & mask) ? GPIOF_OUTPUT : GPIOF_INPUT; - } - - /* Simple SPL interface to GPIOs */ -@@ -147,9 +182,12 @@ static int rockchip_gpio_probe(struct udevice *dev) - int ret; - - priv->regs = dev_read_addr_ptr(dev); -- ret = uclass_first_device_err(UCLASS_PINCTRL, &priv->pinctrl); -- if (ret) -- return ret; -+ -+ if (CONFIG_IS_ENABLED(PINCTRL)) { -+ ret = uclass_first_device_err(UCLASS_PINCTRL, &priv->pinctrl); -+ if (ret) -+ return ret; -+ } - - /* - * If "gpio-ranges" is present in the devicetree use it to parse -@@ -170,6 +208,8 @@ static int rockchip_gpio_probe(struct udevice *dev) - priv->name[0] = 'A' + priv->bank; - uc_priv->bank_name = priv->name; - -+ priv->version = readl(priv->regs + VER_ID_V2); -+ - return 0; - } - -diff --git a/drivers/gpio/sh_pfc.c b/drivers/gpio/sh_pfc.c -index 988f7e9bba..92522b63bb 100644 ---- a/drivers/gpio/sh_pfc.c -+++ b/drivers/gpio/sh_pfc.c -@@ -568,10 +568,10 @@ static int sh_gpio_get_value(struct pinmux_info *gpioc, unsigned gpio) - - if (!gpioc || get_data_reg(gpioc, gpio, &dr, &bit) != 0) - return -1; --#if defined(CONFIG_RCAR_GEN3) -- if ((gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE) == PINMUX_TYPE_INPUT) -+ -+ if (IS_ENABLED(CONFIG_RCAR_GEN3) && -+ ((gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE) == PINMUX_TYPE_INPUT)) - offset += 4; --#endif - - return gpio_read_bit(dr, offset, bit); - } -diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig -index 3279fef1eb..2eae33cd54 100644 ---- a/drivers/i2c/Kconfig -+++ b/drivers/i2c/Kconfig -@@ -47,6 +47,16 @@ config SPL_DM_I2C - device (bus child) info is kept as parent platdata. The interface - is defined in include/i2c.h. - -+config TPL_DM_I2C -+ bool "Enable Driver Model for I2C drivers in TPL" -+ depends on TPL_DM && DM_I2C -+ help -+ Enable driver model for I2C. The I2C uclass interface: probe, read, -+ write and speed, is implemented with the bus drivers operations, -+ which provide methods for bus setting and data transfer. Each chip -+ device (bus child) info is kept as parent platdata. The interface -+ is defined in include/i2c.h. -+ - config VPL_DM_I2C - bool "Enable Driver Model for I2C drivers in VPL" - depends on VPL_DM && DM_I2C -@@ -486,13 +496,13 @@ config SYS_I2C_OMAP24XX - - config SYS_I2C_RCAR_I2C - bool "Renesas RCar I2C driver" -- depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C -+ depends on (RCAR_GEN2 || RCAR_GEN3) && DM_I2C - help - Support for Renesas RCar I2C controller. - - config SYS_I2C_RCAR_IIC - bool "Renesas RCar Gen3 IIC driver" -- depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C -+ depends on (RCAR_GEN2 || RCAR_GEN3) && DM_I2C - help - Support for Renesas RCar Gen3 IIC controller. - -@@ -508,6 +518,16 @@ config SYS_I2C_ROCKCHIP - config SYS_I2C_SANDBOX - bool "Sandbox I2C driver" - depends on SANDBOX && DM_I2C -+ default y -+ help -+ Enable I2C support for sandbox. This is an emulation of a real I2C -+ bus. Devices can be attached to the bus using the device tree -+ which specifies the driver to use. See sandbox.dts as an example. -+ -+config SPL_SYS_I2C_SANDBOX -+ bool "Sandbox I2C driver (SPL)" -+ depends on SPL && SANDBOX && DM_I2C -+ default y - help - Enable I2C support for sandbox. This is an emulation of a real I2C - bus. Devices can be attached to the bus using the device tree -diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig -index 32360d94c0..c2b365af11 100644 ---- a/drivers/input/Kconfig -+++ b/drivers/input/Kconfig -@@ -48,8 +48,8 @@ config APPLE_SPI_KEYB - - config BUTTON_KEYBOARD - bool "Buttons as keyboard" -- depends on BUTTON_GPIO - depends on DM_KEYBOARD -+ select BUTTON_GPIO - help - Enable support for mapping buttons to keycode events. Use linux,code button driver - dt node to define button-event mapping. -diff --git a/drivers/input/Makefile b/drivers/input/Makefile -index 14c0ea7325..71f315adf6 100644 ---- a/drivers/input/Makefile -+++ b/drivers/input/Makefile -@@ -14,5 +14,4 @@ obj-$(CONFIG_APPLE_SPI_KEYB) += apple_spi_kbd.o - obj-$(CONFIG_I8042_KEYB) += i8042.o - obj-$(CONFIG_TEGRA_KEYBOARD) += input.o tegra-kbc.o - obj-$(CONFIG_TWL4030_INPUT) += twl4030.o --obj-$(CONFIG_TWL6030_INPUT) += twl6030.o - endif -diff --git a/drivers/input/button_kbd.c b/drivers/input/button_kbd.c -index 99e65f12f0..74fadfca8b 100644 ---- a/drivers/input/button_kbd.c -+++ b/drivers/input/button_kbd.c -@@ -111,16 +111,14 @@ static int button_kbd_probe(struct udevice *dev) - return 0; - } - --static const struct udevice_id button_kbd_ids[] = { -- { .compatible = "button-kbd" }, -- { } --}; -- - U_BOOT_DRIVER(button_kbd) = { - .name = "button_kbd", - .id = UCLASS_KEYBOARD, -- .of_match = button_kbd_ids, - .ops = &button_kbd_ops, - .priv_auto = sizeof(struct button_kbd_priv), - .probe = button_kbd_probe, - }; -+ -+U_BOOT_DRVINFO(button_kbd) = { -+ .name = "button_kbd" -+}; -diff --git a/drivers/input/twl6030.c b/drivers/input/twl6030.c -deleted file mode 100644 -index 76bd3488fc..0000000000 ---- a/drivers/input/twl6030.c -+++ /dev/null -@@ -1,47 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0+ --/* -- * TWL6030 input -- * -- * Copyright (C) 2016 Paul Kocialkowski -- */ -- --#include -- --int twl6030_input_power_button(void) --{ -- u8 value; -- -- twl6030_i2c_read_u8(TWL6030_CHIP_PM, TWL6030_STS_HW_CONDITIONS, &value); -- -- /* Power button is active low. */ -- if (value & TWL6030_STS_HW_CONDITIONS_PWRON) -- return 0; -- -- return 1; --} -- --int twl6030_input_charger(void) --{ -- u8 value; -- -- twl6030_i2c_read_u8(TWL6030_CHIP_CHARGER, TWL6030_CONTROLLER_STAT1, -- &value); -- -- if (value & TWL6030_CONTROLLER_STAT1_VAC_DET) -- return 1; -- -- return 0; --} -- --int twl6030_input_usb(void) --{ -- u8 value; -- -- twl6030_i2c_read_u8(TWL6030_CHIP_CHARGER, TWL6030_CONTROLLER_STAT1, -- &value); -- -- if (value & TWL6030_CONTROLLER_STAT1_VBUS_DET) -- return 1; -- -- return 0; --} -diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig -index b5707a15c5..4e1ae03e9f 100644 ---- a/drivers/misc/Kconfig -+++ b/drivers/misc/Kconfig -@@ -348,7 +348,7 @@ config NPCM_HOST - - config SPL_MXC_OCOTP - bool "Enable MXC OCOTP driver in SPL" -- depends on SPL_MISC && (ARCH_IMX8M || ARCH_MX6 || ARCH_MX7 || ARCH_MX7ULP || ARCH_VF610) -+ depends on SPL_DRIVERS_MISC && (ARCH_IMX8M || ARCH_MX6 || ARCH_MX7 || ARCH_MX7ULP || ARCH_VF610) - default y - help - If you say Y here, you will get support for the One Time -diff --git a/drivers/misc/sentinel/fuse.c b/drivers/misc/sentinel/fuse.c -index e2b6875766..99342d33c0 100644 ---- a/drivers/misc/sentinel/fuse.c -+++ b/drivers/misc/sentinel/fuse.c -@@ -60,6 +60,11 @@ struct fsb_map_entry fsb_mapping_table[] = { - { 46, 8 }, - }; - -+/* None ECC banks such like Redundancy or Bit protect */ -+u32 nonecc_fuse_banks[] = { -+ 0, 1, 8, 12, 16, 22, 24, 25, 26, 27, 36, 41, 51, 56 -+}; -+ - struct s400_map_entry s400_api_mapping_table[] = { - { 1, 8 }, /* LOCK */ - { 2, 8 }, /* ECID */ -@@ -67,6 +72,16 @@ struct s400_map_entry s400_api_mapping_table[] = { - { 15, 8 }, /* OEM SRK HASH */ - { 23, 1, 4, 2 }, /* OTFAD */ - { 25, 8 }, /* Test config2 */ -+ { 26, 8 }, /* PMU */ -+ { 27, 8 }, /* Test flow/USB */ -+ { 32, 8 }, /* GP1 */ -+ { 33, 8 }, /* GP2 */ -+ { 34, 8 }, /* GP3 */ -+ { 35, 8 }, /* GP4 */ -+ { 36, 8 }, /* GP5 */ -+ { 49, 8 }, /* GP8 */ -+ { 50, 8 }, /* GP9 */ -+ { 51, 8 }, /* GP10 */ - }; - #elif defined(CONFIG_ARCH_IMX9) - #define FSB_OTP_SHADOW 0x8000 -@@ -270,11 +285,26 @@ int fuse_prog(u32 bank, u32 word, u32 val) - { - u32 res; - int ret; -+ bool lock = false; - - if (bank >= FUSE_BANKS || word >= WORDS_PER_BANKS || !val) - return -EINVAL; - -- ret = ahab_write_fuse((bank * 8 + word), val, false, &res); -+ /* Lock 8ULP ECC fuse word, so second programming will return failure. -+ * iMX9 OTP can protect ECC fuse, so not need it -+ */ -+#if defined(CONFIG_IMX8ULP) -+ u32 i; -+ for (i = 0; i < ARRAY_SIZE(nonecc_fuse_banks); i++) { -+ if (nonecc_fuse_banks[i] == bank) -+ break; -+ } -+ -+ if (i == ARRAY_SIZE(nonecc_fuse_banks)) -+ lock = true; -+#endif -+ -+ ret = ahab_write_fuse((bank * 8 + word), val, lock, &res); - if (ret) { - printf("ahab write fuse failed %d, 0x%x\n", ret, res); - return ret; -diff --git a/drivers/misc/sentinel/s400_api.c b/drivers/misc/sentinel/s400_api.c -index 65032f7736..6c0d0b3f18 100644 ---- a/drivers/misc/sentinel/s400_api.c -+++ b/drivers/misc/sentinel/s400_api.c -@@ -29,7 +29,7 @@ int ahab_release_rdc(u8 core_id, u8 xrdc, u32 *response) - msg.version = AHAB_VERSION; - msg.tag = AHAB_CMD_TAG; - msg.size = 2; -- msg.command = AHAB_RELEASE_RDC_REQ_CID; -+ msg.command = ELE_RELEASE_RDC_REQ; - switch (xrdc) { - case 0: - msg.data[0] = (0x74 << 8) | core_id; -@@ -74,7 +74,7 @@ int ahab_auth_oem_ctnr(ulong ctnr_addr, u32 *response) - msg.version = AHAB_VERSION; - msg.tag = AHAB_CMD_TAG; - msg.size = 3; -- msg.command = AHAB_AUTH_OEM_CTNR_CID; -+ msg.command = ELE_OEM_CNTN_AUTH_REQ; - msg.data[0] = upper_32_bits(ctnr_addr); - msg.data[1] = lower_32_bits(ctnr_addr); - -@@ -104,7 +104,7 @@ int ahab_release_container(u32 *response) - msg.version = AHAB_VERSION; - msg.tag = AHAB_CMD_TAG; - msg.size = 1; -- msg.command = AHAB_RELEASE_CTNR_CID; -+ msg.command = ELE_RELEASE_CONTAINER_REQ; - - ret = misc_call(dev, false, &msg, size, &msg, size); - if (ret) -@@ -132,7 +132,7 @@ int ahab_verify_image(u32 img_id, u32 *response) - msg.version = AHAB_VERSION; - msg.tag = AHAB_CMD_TAG; - msg.size = 2; -- msg.command = AHAB_VERIFY_IMG_CID; -+ msg.command = ELE_VERIFY_IMAGE_REQ; - msg.data[0] = 1 << img_id; - - ret = misc_call(dev, false, &msg, size, &msg, size); -@@ -161,7 +161,7 @@ int ahab_forward_lifecycle(u16 life_cycle, u32 *response) - msg.version = AHAB_VERSION; - msg.tag = AHAB_CMD_TAG; - msg.size = 2; -- msg.command = AHAB_FWD_LIFECYCLE_UP_REQ_CID; -+ msg.command = ELE_FWD_LIFECYCLE_UP_REQ; - msg.data[0] = life_cycle; - - ret = misc_call(dev, false, &msg, size, &msg, size); -@@ -201,7 +201,7 @@ int ahab_read_common_fuse(u16 fuse_id, u32 *fuse_words, u32 fuse_num, u32 *respo - msg.version = AHAB_VERSION; - msg.tag = AHAB_CMD_TAG; - msg.size = 2; -- msg.command = AHAB_READ_FUSE_REQ_CID; -+ msg.command = ELE_READ_FUSE_REQ; - msg.data[0] = fuse_id; - - ret = misc_call(dev, false, &msg, size, &msg, size); -@@ -238,7 +238,7 @@ int ahab_write_fuse(u16 fuse_id, u32 fuse_val, bool lock, u32 *response) - msg.version = AHAB_VERSION; - msg.tag = AHAB_CMD_TAG; - msg.size = 3; -- msg.command = AHAB_WRITE_FUSE_REQ_CID; -+ msg.command = ELE_WRITE_FUSE_REQ; - msg.data[0] = (32 << 16) | (fuse_id << 5); - if (lock) - msg.data[0] |= (1 << 31); -@@ -271,7 +271,7 @@ int ahab_release_caam(u32 core_did, u32 *response) - msg.version = AHAB_VERSION; - msg.tag = AHAB_CMD_TAG; - msg.size = 2; -- msg.command = AHAB_CAAM_RELEASE_CID; -+ msg.command = ELE_RELEASE_CAAM_REQ; - msg.data[0] = core_did; - - ret = misc_call(dev, false, &msg, size, &msg, size); -@@ -310,7 +310,7 @@ int ahab_get_fw_version(u32 *fw_version, u32 *sha1, u32 *response) - msg.version = AHAB_VERSION; - msg.tag = AHAB_CMD_TAG; - msg.size = 1; -- msg.command = AHAB_GET_FW_VERSION_CID; -+ msg.command = ELE_GET_FW_VERSION_REQ; - - ret = misc_call(dev, false, &msg, size, &msg, size); - if (ret) -@@ -341,7 +341,7 @@ int ahab_dump_buffer(u32 *buffer, u32 buffer_length) - msg.version = AHAB_VERSION; - msg.tag = AHAB_CMD_TAG; - msg.size = 1; -- msg.command = AHAB_LOG_CID; -+ msg.command = ELE_DUMP_DEBUG_BUFFER_REQ; - - ret = misc_call(dev, false, &msg, size, &msg, size); - if (ret) { -@@ -375,7 +375,7 @@ int ahab_get_info(struct sentinel_get_info_data *info, u32 *response) - msg.version = AHAB_VERSION; - msg.tag = AHAB_CMD_TAG; - msg.size = 4; -- msg.command = AHAB_GET_INFO_CID; -+ msg.command = ELE_GET_INFO_REQ; - msg.data[0] = upper_32_bits((ulong)info); - msg.data[1] = lower_32_bits((ulong)info); - msg.data[2] = sizeof(struct sentinel_get_info_data); -@@ -406,7 +406,7 @@ int ahab_get_fw_status(u32 *status, u32 *response) - msg.version = AHAB_VERSION; - msg.tag = AHAB_CMD_TAG; - msg.size = 1; -- msg.command = AHAB_GET_FW_STATUS_CID; -+ msg.command = ELE_GET_FW_STATUS_REQ; - - ret = misc_call(dev, false, &msg, size, &msg, size); - if (ret) -@@ -436,7 +436,7 @@ int ahab_release_m33_trout(void) - msg.version = AHAB_VERSION; - msg.tag = AHAB_CMD_TAG; - msg.size = 1; -- msg.command = 0xd3; -+ msg.command = ELE_ENABLE_RTC_REQ; - - ret = misc_call(dev, false, &msg, size, &msg, size); - if (ret) -@@ -445,3 +445,48 @@ int ahab_release_m33_trout(void) - - return ret; - } -+ -+int ahab_get_events(u32 *events, u32 *events_cnt, u32 *response) -+{ -+ struct udevice *dev = gd->arch.s400_dev; -+ int size = sizeof(struct sentinel_msg); -+ struct sentinel_msg msg; -+ int ret, i = 0; -+ u32 actual_events; -+ -+ if (!dev) { -+ printf("s400 dev is not initialized\n"); -+ return -ENODEV; -+ } -+ -+ if (!events || !events_cnt || *events_cnt == 0) { -+ printf("Invalid parameters for %s\n", __func__); -+ return -EINVAL; -+ } -+ -+ msg.version = AHAB_VERSION; -+ msg.tag = AHAB_CMD_TAG; -+ msg.size = 1; -+ msg.command = ELE_GET_EVENTS_REQ; -+ -+ ret = misc_call(dev, false, &msg, size, &msg, size); -+ if (ret) -+ printf("Error: %s: ret %d, response 0x%x\n", -+ __func__, ret, msg.data[0]); -+ -+ if (response) -+ *response = msg.data[0]; -+ -+ if (!ret) { -+ actual_events = msg.data[1] & 0xffff; -+ if (*events_cnt < actual_events) -+ actual_events = *events_cnt; -+ -+ for (; i < actual_events; i++) -+ events[i] = msg.data[i + 2]; -+ -+ *events_cnt = actual_events; -+ } -+ -+ return ret; -+} -diff --git a/drivers/misc/swap_case.c b/drivers/misc/swap_case.c -index 7093ad1cd4..ee5c12bd0a 100644 ---- a/drivers/misc/swap_case.c -+++ b/drivers/misc/swap_case.c -@@ -165,6 +165,9 @@ static int sandbox_swap_case_read_config(const struct udevice *emul, - case PCI_CAP_ID_EXP_OFFSET + PCI_CAP_LIST_NEXT: - *valuep = PCI_CAP_ID_MSIX_OFFSET; - break; -+ case PCI_CAP_ID_EXP_OFFSET + PCI_EXP_DEVCAP: -+ *valuep = PCI_EXP_DEVCAP_PAYLOAD_256B; -+ break; - case PCI_CAP_ID_MSIX_OFFSET: - if (sandbox_swap_case_use_ea(emul)) - *valuep = (PCI_CAP_ID_EA_OFFSET << 8) | PCI_CAP_ID_MSIX; -diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig -index 878f867c62..80641e1393 100644 ---- a/drivers/mmc/Kconfig -+++ b/drivers/mmc/Kconfig -@@ -667,18 +667,6 @@ config MMC_SDHCI_S5P - - If unsure, say N. - --config MMC_SDHCI_SPEAR -- bool "SDHCI support on ST SPEAr platform" -- depends on MMC_SDHCI -- help -- This selects the Secure Digital Host Controller Interface (SDHCI) -- often referrered to as the HSMMC block in some of the ST SPEAR range -- of SoC -- -- If you have a controller with this interface, say Y here. -- -- If unsure, say N. -- - config MMC_SDHCI_STI - bool "SDHCI support for STMicroelectronics SoC" - depends on MMC_SDHCI && OF_CONTROL -diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile -index 3dc757108d..2c65c4765a 100644 ---- a/drivers/mmc/Makefile -+++ b/drivers/mmc/Makefile -@@ -70,7 +70,6 @@ obj-$(CONFIG_MMC_SDHCI_NPCM) += npcm_sdhci.o - obj-$(CONFIG_MMC_SDHCI_PIC32) += pic32_sdhci.o - obj-$(CONFIG_MMC_SDHCI_ROCKCHIP) += rockchip_sdhci.o - obj-$(CONFIG_MMC_SDHCI_S5P) += s5p_sdhci.o --obj-$(CONFIG_MMC_SDHCI_SPEAR) += spear_sdhci.o - obj-$(CONFIG_MMC_SDHCI_STI) += sti_sdhci.o - obj-$(CONFIG_MMC_SDHCI_TANGIER) += tangier_sdhci.o - obj-$(CONFIG_MMC_SDHCI_TEGRA) += tegra_mmc.o -diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c -index 5085a3b491..d6cad998b0 100644 ---- a/drivers/mmc/dw_mmc.c -+++ b/drivers/mmc/dw_mmc.c -@@ -138,7 +138,7 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) - { - struct mmc *mmc = host->mmc; - int ret = 0; -- u32 timeout, mask, size, i, len = 0; -+ u32 timeout, reset_timeout = 100, status, ctrl, mask, size, i, len = 0; - u32 *buf = NULL; - ulong start = get_timer(0); - u32 fifo_depth = (((host->fifoth_val & RX_WMARK_MASK) >> -@@ -159,6 +159,24 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) - /* Error during data transfer. */ - if (mask & (DWMCI_DATA_ERR | DWMCI_DATA_TOUT)) { - debug("%s: DATA ERROR!\n", __func__); -+ -+ dwmci_wait_reset(host, DWMCI_RESET_ALL); -+ dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_PRV_DAT_WAIT | -+ DWMCI_CMD_UPD_CLK | DWMCI_CMD_START); -+ -+ do { -+ status = dwmci_readl(host, DWMCI_CMD); -+ if (!reset_timeout--) -+ break; -+ udelay(100); -+ } while (status & DWMCI_CMD_START); -+ -+ if (!host->fifo_mode) { -+ ctrl = dwmci_readl(host, DWMCI_BMOD); -+ ctrl |= DWMCI_BMOD_IDMAC_RESET; -+ dwmci_writel(host, DWMCI_BMOD, ctrl); -+ } -+ - ret = -EINVAL; - break; - } -diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c -index 91e309d275..9dc310663f 100644 ---- a/drivers/mmc/zynq_sdhci.c -+++ b/drivers/mmc/zynq_sdhci.c -@@ -14,6 +14,7 @@ - #include "mmc_private.h" - #include - #include -+#include - #include - #include - #include -@@ -988,7 +989,7 @@ static const struct sdhci_ops arasan_ops = { - }; - #endif - --#if defined(CONFIG_ARCH_ZYNQMP) -+#if defined(CONFIG_ARCH_ZYNQMP) && defined(CONFIG_ZYNQMP_FIRMWARE) - static int sdhci_zynqmp_set_dynamic_config(struct arasan_sdhci_priv *priv, - struct udevice *dev) - { -@@ -1090,7 +1091,7 @@ static int arasan_sdhci_probe(struct udevice *dev) - - host = priv->host; - --#if defined(CONFIG_ARCH_ZYNQMP) -+#if defined(CONFIG_ARCH_ZYNQMP) && defined(CONFIG_ZYNQMP_FIRMWARE) - if (device_is_compatible(dev, "xlnx,zynqmp-8.9a")) { - ret = zynqmp_pm_is_function_supported(PM_IOCTL, - IOCTL_SET_SD_CONFIG); -diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig -index 5b35da45f5..5c7b0d9dcc 100644 ---- a/drivers/mtd/nand/raw/Kconfig -+++ b/drivers/mtd/nand/raw/Kconfig -@@ -628,7 +628,8 @@ comment "Generic NAND options" - - config SYS_NAND_BLOCK_SIZE - hex "NAND chip eraseblock size" -- depends on ARCH_SUNXI || SPL_NAND_SUPPORT || TPL_NAND_SUPPORT -+ depends on ARCH_SUNXI || SPL_NAND_SUPPORT || TPL_NAND_SUPPORT || \ -+ MVEBU_SPL_BOOT_DEVICE_NAND - depends on !NAND_MXS && !NAND_DENALI_DT && !NAND_LPC32XX_MLC && \ - !NAND_FSL_IFC && !NAND_MT7621 - help -@@ -655,6 +656,7 @@ config SYS_NAND_PAGE_SIZE - hex "NAND chip page size" - depends on ARCH_SUNXI || NAND_OMAP_GPMC || NAND_LPC32XX_SLC || \ - SPL_NAND_SIMPLE || (NAND_MXC && SPL_NAND_SUPPORT) || \ -+ MVEBU_SPL_BOOT_DEVICE_NAND || \ - (NAND_ATMEL && SPL_NAND_SUPPORT) || SPL_GENERATE_ATMEL_PMECC_HEADER - depends on !NAND_MXS && !NAND_DENALI_DT && !NAND_LPC32XX_MLC && !NAND_MT7621 - help -diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile -index 666323e221..add2b4cf65 100644 ---- a/drivers/mtd/nand/raw/Makefile -+++ b/drivers/mtd/nand/raw/Makefile -@@ -56,7 +56,6 @@ obj-$(CONFIG_NAND_DENALI) += denali.o - obj-$(CONFIG_NAND_DENALI_DT) += denali_dt.o - obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o - obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o --obj-$(CONFIG_NAND_KB9202) += kb9202_nand.o - obj-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o - obj-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o - obj-$(CONFIG_NAND_LPC32XX_MLC) += lpc32xx_nand_mlc.o -diff --git a/drivers/mtd/nand/raw/arasan_nfc.c b/drivers/mtd/nand/raw/arasan_nfc.c -index 4621bfb03e..99e2681c14 100644 ---- a/drivers/mtd/nand/raw/arasan_nfc.c -+++ b/drivers/mtd/nand/raw/arasan_nfc.c -@@ -1230,12 +1230,16 @@ static int arasan_probe(struct udevice *dev) - struct nand_drv *info = &arasan->nand_ctrl; - struct nand_config *nand = &info->config; - struct mtd_info *mtd; -+ ofnode child; - int err = -1; - - info->reg = (struct nand_regs *)dev_read_addr(dev); - mtd = nand_to_mtd(nand_chip); - nand_set_controller_data(nand_chip, &arasan->nand_ctrl); - -+ ofnode_for_each_subnode(child, dev_ofnode(dev)) -+ nand_set_flash_node(nand_chip, child); -+ - #ifdef CONFIG_SYS_NAND_NO_SUBPAGE_WRITE - nand_chip->options |= NAND_NO_SUBPAGE_WRITE; - #endif -@@ -1248,7 +1252,6 @@ static int arasan_probe(struct udevice *dev) - /* Buffer read/write routines */ - nand_chip->read_buf = arasan_nand_read_buf; - nand_chip->write_buf = arasan_nand_write_buf; -- nand_chip->bbt_options = NAND_BBT_USE_FLASH; - - writel(0x0, &info->reg->cmd_reg); - writel(0x0, &info->reg->pgm_reg); -diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c -index 74c9348f7f..efbf9a3120 100644 ---- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c -+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c -@@ -86,6 +86,12 @@ struct brcm_nand_dma_desc { - #define FLASH_DMA_ECC_ERROR (1 << 8) - #define FLASH_DMA_CORR_ERROR (1 << 9) - -+/* Bitfields for DMA_MODE */ -+#define FLASH_DMA_MODE_STOP_ON_ERROR BIT(1) /* stop in Uncorr ECC error */ -+#define FLASH_DMA_MODE_MODE BIT(0) /* link list */ -+#define FLASH_DMA_MODE_MASK (FLASH_DMA_MODE_STOP_ON_ERROR | \ -+ FLASH_DMA_MODE_MODE) -+ - /* 512B flash cache in the NAND controller HW */ - #define FC_SHIFT 9U - #define FC_BYTES 512U -@@ -98,6 +104,65 @@ struct brcm_nand_dma_desc { - #define NAND_CTRL_RDY (INTFC_CTLR_READY | INTFC_FLASH_READY) - #define NAND_POLL_STATUS_TIMEOUT_MS 100 - -+/* flash_dma registers */ -+enum flash_dma_reg { -+ FLASH_DMA_REVISION = 0, -+ FLASH_DMA_FIRST_DESC, -+ FLASH_DMA_FIRST_DESC_EXT, -+ FLASH_DMA_CTRL, -+ FLASH_DMA_MODE, -+ FLASH_DMA_STATUS, -+ FLASH_DMA_INTERRUPT_DESC, -+ FLASH_DMA_INTERRUPT_DESC_EXT, -+ FLASH_DMA_ERROR_STATUS, -+ FLASH_DMA_CURRENT_DESC, -+ FLASH_DMA_CURRENT_DESC_EXT, -+}; -+ -+#ifndef __UBOOT__ -+/* flash_dma registers v0*/ -+static const u16 flash_dma_regs_v0[] = { -+ [FLASH_DMA_REVISION] = 0x00, -+ [FLASH_DMA_FIRST_DESC] = 0x04, -+ [FLASH_DMA_CTRL] = 0x08, -+ [FLASH_DMA_MODE] = 0x0c, -+ [FLASH_DMA_STATUS] = 0x10, -+ [FLASH_DMA_INTERRUPT_DESC] = 0x14, -+ [FLASH_DMA_ERROR_STATUS] = 0x18, -+ [FLASH_DMA_CURRENT_DESC] = 0x1c, -+}; -+ -+/* flash_dma registers v1*/ -+static const u16 flash_dma_regs_v1[] = { -+ [FLASH_DMA_REVISION] = 0x00, -+ [FLASH_DMA_FIRST_DESC] = 0x04, -+ [FLASH_DMA_FIRST_DESC_EXT] = 0x08, -+ [FLASH_DMA_CTRL] = 0x0c, -+ [FLASH_DMA_MODE] = 0x10, -+ [FLASH_DMA_STATUS] = 0x14, -+ [FLASH_DMA_INTERRUPT_DESC] = 0x18, -+ [FLASH_DMA_INTERRUPT_DESC_EXT] = 0x1c, -+ [FLASH_DMA_ERROR_STATUS] = 0x20, -+ [FLASH_DMA_CURRENT_DESC] = 0x24, -+ [FLASH_DMA_CURRENT_DESC_EXT] = 0x28, -+}; -+ -+/* flash_dma registers v4 */ -+static const u16 flash_dma_regs_v4[] = { -+ [FLASH_DMA_REVISION] = 0x00, -+ [FLASH_DMA_FIRST_DESC] = 0x08, -+ [FLASH_DMA_FIRST_DESC_EXT] = 0x0c, -+ [FLASH_DMA_CTRL] = 0x10, -+ [FLASH_DMA_MODE] = 0x14, -+ [FLASH_DMA_STATUS] = 0x18, -+ [FLASH_DMA_INTERRUPT_DESC] = 0x20, -+ [FLASH_DMA_INTERRUPT_DESC_EXT] = 0x24, -+ [FLASH_DMA_ERROR_STATUS] = 0x28, -+ [FLASH_DMA_CURRENT_DESC] = 0x30, -+ [FLASH_DMA_CURRENT_DESC_EXT] = 0x34, -+}; -+#endif /* __UBOOT__ */ -+ - /* Controller feature flags */ - enum { - BRCMNAND_HAS_1K_SECTORS = BIT(0), -@@ -135,6 +200,8 @@ struct brcmnand_controller { - /* List of NAND hosts (one for each chip-select) */ - struct list_head host_list; - -+ /* flash_dma reg */ -+ const u16 *flash_dma_offsets; - struct brcm_nand_dma_desc *dma_desc; - dma_addr_t dma_pa; - -@@ -150,6 +217,7 @@ struct brcmnand_controller { - const unsigned int *block_sizes; - unsigned int max_page_size; - const unsigned int *page_sizes; -+ unsigned int page_size_shift; - unsigned int max_oob; - u32 features; - -@@ -226,8 +294,38 @@ enum brcmnand_reg { - BRCMNAND_FC_BASE, - }; - --/* BRCMNAND v4.0 */ --static const u16 brcmnand_regs_v40[] = { -+/* BRCMNAND v2.1-v2.2 */ -+static const u16 brcmnand_regs_v21[] = { -+ [BRCMNAND_CMD_START] = 0x04, -+ [BRCMNAND_CMD_EXT_ADDRESS] = 0x08, -+ [BRCMNAND_CMD_ADDRESS] = 0x0c, -+ [BRCMNAND_INTFC_STATUS] = 0x5c, -+ [BRCMNAND_CS_SELECT] = 0x14, -+ [BRCMNAND_CS_XOR] = 0x18, -+ [BRCMNAND_LL_OP] = 0, -+ [BRCMNAND_CS0_BASE] = 0x40, -+ [BRCMNAND_CS1_BASE] = 0, -+ [BRCMNAND_CORR_THRESHOLD] = 0, -+ [BRCMNAND_CORR_THRESHOLD_EXT] = 0, -+ [BRCMNAND_UNCORR_COUNT] = 0, -+ [BRCMNAND_CORR_COUNT] = 0, -+ [BRCMNAND_CORR_EXT_ADDR] = 0x60, -+ [BRCMNAND_CORR_ADDR] = 0x64, -+ [BRCMNAND_UNCORR_EXT_ADDR] = 0x68, -+ [BRCMNAND_UNCORR_ADDR] = 0x6c, -+ [BRCMNAND_SEMAPHORE] = 0x50, -+ [BRCMNAND_ID] = 0x54, -+ [BRCMNAND_ID_EXT] = 0, -+ [BRCMNAND_LL_RDATA] = 0, -+ [BRCMNAND_OOB_READ_BASE] = 0x20, -+ [BRCMNAND_OOB_READ_10_BASE] = 0, -+ [BRCMNAND_OOB_WRITE_BASE] = 0x30, -+ [BRCMNAND_OOB_WRITE_10_BASE] = 0, -+ [BRCMNAND_FC_BASE] = 0x200, -+}; -+ -+/* BRCMNAND v3.3-v4.0 */ -+static const u16 brcmnand_regs_v33[] = { - [BRCMNAND_CMD_START] = 0x04, - [BRCMNAND_CMD_EXT_ADDRESS] = 0x08, - [BRCMNAND_CMD_ADDRESS] = 0x0c, -@@ -424,6 +522,9 @@ enum { - CFG_BUS_WIDTH = BIT(CFG_BUS_WIDTH_SHIFT), - CFG_DEVICE_SIZE_SHIFT = 24, - -+ /* Only for v2.1 */ -+ CFG_PAGE_SIZE_SHIFT_v2_1 = 30, -+ - /* Only for pre-v7.1 (with no CFG_EXT register) */ - CFG_PAGE_SIZE_SHIFT = 20, - CFG_BLK_SIZE_SHIFT = 28, -@@ -459,12 +560,16 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl) - { - static const unsigned int block_sizes_v6[] = { 8, 16, 128, 256, 512, 1024, 2048, 0 }; - static const unsigned int block_sizes_v4[] = { 16, 128, 8, 512, 256, 1024, 2048, 0 }; -- static const unsigned int page_sizes[] = { 512, 2048, 4096, 8192, 0 }; -+ static const unsigned int block_sizes_v2_2[] = { 16, 128, 8, 512, 256, 0 }; -+ static const unsigned int block_sizes_v2_1[] = { 16, 128, 8, 512, 0 }; -+ static const unsigned int page_sizes_v3_4[] = { 512, 2048, 4096, 8192, 0 }; -+ static const unsigned int page_sizes_v2_2[] = { 512, 2048, 4096, 0 }; -+ static const unsigned int page_sizes_v2_1[] = { 512, 2048, 0 }; - - ctrl->nand_version = nand_readreg(ctrl, 0) & 0xffff; - -- /* Only support v4.0+? */ -- if (ctrl->nand_version < 0x0400) { -+ /* Only support v2.1+ */ -+ if (ctrl->nand_version < 0x0201) { - dev_err(ctrl->dev, "version %#x not supported\n", - ctrl->nand_version); - return -ENODEV; -@@ -473,14 +578,16 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl) - /* Register offsets */ - if (ctrl->nand_version >= 0x0702) - ctrl->reg_offsets = brcmnand_regs_v72; -- else if (ctrl->nand_version >= 0x0701) -+ else if (ctrl->nand_version == 0x0701) - ctrl->reg_offsets = brcmnand_regs_v71; - else if (ctrl->nand_version >= 0x0600) - ctrl->reg_offsets = brcmnand_regs_v60; - else if (ctrl->nand_version >= 0x0500) - ctrl->reg_offsets = brcmnand_regs_v50; -- else if (ctrl->nand_version >= 0x0400) -- ctrl->reg_offsets = brcmnand_regs_v40; -+ else if (ctrl->nand_version >= 0x0303) -+ ctrl->reg_offsets = brcmnand_regs_v33; -+ else if (ctrl->nand_version >= 0x0201) -+ ctrl->reg_offsets = brcmnand_regs_v21; - - /* Chip-select stride */ - if (ctrl->nand_version >= 0x0701) -@@ -494,8 +601,9 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl) - } else { - ctrl->cs_offsets = brcmnand_cs_offsets; - -- /* v5.0 and earlier has a different CS0 offset layout */ -- if (ctrl->nand_version <= 0x0500) -+ /* v3.3-5.0 have a different CS0 offset layout */ -+ if (ctrl->nand_version >= 0x0303 && -+ ctrl->nand_version <= 0x0500) - ctrl->cs0_offsets = brcmnand_cs_offsets_cs0; - } - -@@ -505,20 +613,38 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl) - ctrl->max_page_size = 16 * 1024; - ctrl->max_block_size = 2 * 1024 * 1024; - } else { -- ctrl->page_sizes = page_sizes; -+ if (ctrl->nand_version >= 0x0304) -+ ctrl->page_sizes = page_sizes_v3_4; -+ else if (ctrl->nand_version >= 0x0202) -+ ctrl->page_sizes = page_sizes_v2_2; -+ else -+ ctrl->page_sizes = page_sizes_v2_1; -+ -+ if (ctrl->nand_version >= 0x0202) -+ ctrl->page_size_shift = CFG_PAGE_SIZE_SHIFT; -+ else -+ ctrl->page_size_shift = CFG_PAGE_SIZE_SHIFT_v2_1; -+ - if (ctrl->nand_version >= 0x0600) - ctrl->block_sizes = block_sizes_v6; -- else -+ else if (ctrl->nand_version >= 0x0400) - ctrl->block_sizes = block_sizes_v4; -+ else if (ctrl->nand_version >= 0x0202) -+ ctrl->block_sizes = block_sizes_v2_2; -+ else -+ ctrl->block_sizes = block_sizes_v2_1; - - if (ctrl->nand_version < 0x0400) { -- ctrl->max_page_size = 4096; -+ if (ctrl->nand_version < 0x0202) -+ ctrl->max_page_size = 2048; -+ else -+ ctrl->max_page_size = 4096; - ctrl->max_block_size = 512 * 1024; - } - } - - /* Maximum spare area sector size (per 512B) */ -- if (ctrl->nand_version >= 0x0702) -+ if (ctrl->nand_version == 0x0702) - ctrl->max_oob = 128; - else if (ctrl->nand_version >= 0x0600) - ctrl->max_oob = 64; -@@ -553,6 +679,19 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl) - return 0; - } - -+#ifndef __UBOOT__ -+static void brcmnand_flash_dma_revision_init(struct brcmnand_controller *ctrl) -+{ -+ /* flash_dma register offsets */ -+ if (ctrl->nand_version >= 0x0703) -+ ctrl->flash_dma_offsets = flash_dma_regs_v4; -+ else if (ctrl->nand_version == 0x0602) -+ ctrl->flash_dma_offsets = flash_dma_regs_v0; -+ else -+ ctrl->flash_dma_offsets = flash_dma_regs_v1; -+} -+#endif /* __UBOOT__ */ -+ - static inline u32 brcmnand_read_reg(struct brcmnand_controller *ctrl, - enum brcmnand_reg reg) - { -@@ -595,6 +734,54 @@ static inline void brcmnand_write_fc(struct brcmnand_controller *ctrl, - __raw_writel(val, ctrl->nand_fc + word * 4); - } - -+static void brcmnand_clear_ecc_addr(struct brcmnand_controller *ctrl) -+{ -+ -+ /* Clear error addresses */ -+ brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_ADDR, 0); -+ brcmnand_write_reg(ctrl, BRCMNAND_CORR_ADDR, 0); -+ brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_EXT_ADDR, 0); -+ brcmnand_write_reg(ctrl, BRCMNAND_CORR_EXT_ADDR, 0); -+} -+ -+static u64 brcmnand_get_uncorrecc_addr(struct brcmnand_controller *ctrl) -+{ -+ u64 err_addr; -+ -+ err_addr = brcmnand_read_reg(ctrl, BRCMNAND_UNCORR_ADDR); -+ err_addr |= ((u64)(brcmnand_read_reg(ctrl, -+ BRCMNAND_UNCORR_EXT_ADDR) -+ & 0xffff) << 32); -+ -+ return err_addr; -+} -+ -+static u64 brcmnand_get_correcc_addr(struct brcmnand_controller *ctrl) -+{ -+ u64 err_addr; -+ -+ err_addr = brcmnand_read_reg(ctrl, BRCMNAND_CORR_ADDR); -+ err_addr |= ((u64)(brcmnand_read_reg(ctrl, -+ BRCMNAND_CORR_EXT_ADDR) -+ & 0xffff) << 32); -+ -+ return err_addr; -+} -+ -+static void brcmnand_set_cmd_addr(struct mtd_info *mtd, u64 addr) -+{ -+ struct nand_chip *chip = mtd_to_nand(mtd); -+ struct brcmnand_host *host = nand_get_controller_data(chip); -+ struct brcmnand_controller *ctrl = host->ctrl; -+ -+ brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS, -+ (host->cs << 16) | ((addr >> 32) & 0xffff)); -+ (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS); -+ brcmnand_write_reg(ctrl, BRCMNAND_CMD_ADDRESS, -+ lower_32_bits(addr)); -+ (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS); -+} -+ - static inline u16 brcmnand_cs_offset(struct brcmnand_controller *ctrl, int cs, - enum brcmnand_cs_reg reg) - { -@@ -627,7 +814,10 @@ static void brcmnand_wr_corr_thresh(struct brcmnand_host *host, u8 val) - enum brcmnand_reg reg = BRCMNAND_CORR_THRESHOLD; - int cs = host->cs; - -- if (ctrl->nand_version >= 0x0702) -+ if (!ctrl->reg_offsets[reg]) -+ return; -+ -+ if (ctrl->nand_version == 0x0702) - bits = 7; - else if (ctrl->nand_version >= 0x0600) - bits = 6; -@@ -681,12 +871,14 @@ enum { - - static inline u32 brcmnand_spare_area_mask(struct brcmnand_controller *ctrl) - { -- if (ctrl->nand_version >= 0x0702) -+ if (ctrl->nand_version == 0x0702) - return GENMASK(7, 0); - else if (ctrl->nand_version >= 0x0600) - return GENMASK(6, 0); -- else -+ else if (ctrl->nand_version >= 0x0303) - return GENMASK(5, 0); -+ else -+ return GENMASK(4, 0); - } - - #define NAND_ACC_CONTROL_ECC_SHIFT 16 -@@ -829,20 +1021,6 @@ static inline void brcmnand_set_wp(struct brcmnand_controller *ctrl, bool en) - * Flash DMA - ***********************************************************************/ - --enum flash_dma_reg { -- FLASH_DMA_REVISION = 0x00, -- FLASH_DMA_FIRST_DESC = 0x04, -- FLASH_DMA_FIRST_DESC_EXT = 0x08, -- FLASH_DMA_CTRL = 0x0c, -- FLASH_DMA_MODE = 0x10, -- FLASH_DMA_STATUS = 0x14, -- FLASH_DMA_INTERRUPT_DESC = 0x18, -- FLASH_DMA_INTERRUPT_DESC_EXT = 0x1c, -- FLASH_DMA_ERROR_STATUS = 0x20, -- FLASH_DMA_CURRENT_DESC = 0x24, -- FLASH_DMA_CURRENT_DESC_EXT = 0x28, --}; -- - static inline bool has_flash_dma(struct brcmnand_controller *ctrl) - { - return ctrl->flash_dma_base; -@@ -858,14 +1036,19 @@ static inline bool flash_dma_buf_ok(const void *buf) - #endif /* __UBOOT__ */ - } - --static inline void flash_dma_writel(struct brcmnand_controller *ctrl, u8 offs, -- u32 val) -+static inline void flash_dma_writel(struct brcmnand_controller *ctrl, -+ enum flash_dma_reg dma_reg, u32 val) - { -+ u16 offs = ctrl->flash_dma_offsets[dma_reg]; -+ - brcmnand_writel(val, ctrl->flash_dma_base + offs); - } - --static inline u32 flash_dma_readl(struct brcmnand_controller *ctrl, u8 offs) -+static inline u32 flash_dma_readl(struct brcmnand_controller *ctrl, -+ enum flash_dma_reg dma_reg) - { -+ u16 offs = ctrl->flash_dma_offsets[dma_reg]; -+ - return brcmnand_readl(ctrl->flash_dma_base + offs); - } - -@@ -1190,9 +1373,12 @@ static void brcmnand_send_cmd(struct brcmnand_host *host, int cmd) - { - struct brcmnand_controller *ctrl = host->ctrl; - int ret; -+ u64 cmd_addr; -+ -+ cmd_addr = brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS); -+ -+ dev_dbg(ctrl->dev, "send native cmd %d addr 0x%llx\n", cmd, cmd_addr); - -- dev_dbg(ctrl->dev, "send native cmd %d addr_lo 0x%x\n", cmd, -- brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS)); - BUG_ON(ctrl->cmd_pending != 0); - ctrl->cmd_pending = cmd; - -@@ -1365,12 +1551,7 @@ static void brcmnand_cmdfunc(struct mtd_info *mtd, unsigned command, - if (!native_cmd) - return; - -- brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS, -- (host->cs << 16) | ((addr >> 32) & 0xffff)); -- (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS); -- brcmnand_write_reg(ctrl, BRCMNAND_CMD_ADDRESS, lower_32_bits(addr)); -- (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS); -- -+ brcmnand_set_cmd_addr(mtd, addr); - brcmnand_send_cmd(host, native_cmd); - brcmnand_waitfunc(mtd, chip); - -@@ -1542,8 +1723,11 @@ static void brcmnand_dma_run(struct brcmnand_host *host, dma_addr_t desc) - - flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC, lower_32_bits(desc)); - (void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC); -- flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC_EXT, upper_32_bits(desc)); -- (void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC_EXT); -+ if (ctrl->nand_version > 0x0602) { -+ flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC_EXT, -+ upper_32_bits(desc)); -+ (void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC_EXT); -+ } - - /* Start FLASH_DMA engine */ - ctrl->dma_pending = true; -@@ -1600,20 +1784,10 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip, - struct brcmnand_controller *ctrl = host->ctrl; - int i, j, ret = 0; - -- /* Clear error addresses */ -- brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_ADDR, 0); -- brcmnand_write_reg(ctrl, BRCMNAND_CORR_ADDR, 0); -- brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_EXT_ADDR, 0); -- brcmnand_write_reg(ctrl, BRCMNAND_CORR_EXT_ADDR, 0); -- -- brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS, -- (host->cs << 16) | ((addr >> 32) & 0xffff)); -- (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS); -+ brcmnand_clear_ecc_addr(ctrl); - - for (i = 0; i < trans; i++, addr += FC_BYTES) { -- brcmnand_write_reg(ctrl, BRCMNAND_CMD_ADDRESS, -- lower_32_bits(addr)); -- (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS); -+ brcmnand_set_cmd_addr(mtd, addr); - /* SPARE_AREA_READ does not use ECC, so just use PAGE_READ */ - brcmnand_send_cmd(host, CMD_PAGE_READ); - brcmnand_waitfunc(mtd, chip); -@@ -1633,21 +1807,15 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip, - host->hwcfg.sector_size_1k); - - if (ret != -EBADMSG) { -- *err_addr = brcmnand_read_reg(ctrl, -- BRCMNAND_UNCORR_ADDR) | -- ((u64)(brcmnand_read_reg(ctrl, -- BRCMNAND_UNCORR_EXT_ADDR) -- & 0xffff) << 32); -+ *err_addr = brcmnand_get_uncorrecc_addr(ctrl); -+ - if (*err_addr) - ret = -EBADMSG; - } - - if (!ret) { -- *err_addr = brcmnand_read_reg(ctrl, -- BRCMNAND_CORR_ADDR) | -- ((u64)(brcmnand_read_reg(ctrl, -- BRCMNAND_CORR_EXT_ADDR) -- & 0xffff) << 32); -+ *err_addr = brcmnand_get_correcc_addr(ctrl); -+ - if (*err_addr) - ret = -EUCLEAN; - } -@@ -1673,11 +1841,13 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip, - static int brcmstb_nand_verify_erased_page(struct mtd_info *mtd, - struct nand_chip *chip, void *buf, u64 addr) - { -- int i, sas; -- void *oob = chip->oob_poi; -+ struct mtd_oob_region ecc; -+ int i; - int bitflips = 0; - int page = addr >> chip->page_shift; - int ret; -+ void *ecc_bytes; -+ void *ecc_chunk; - - if (!buf) { - #ifndef __UBOOT__ -@@ -1689,16 +1859,20 @@ static int brcmstb_nand_verify_erased_page(struct mtd_info *mtd, - chip->pagebuf = -1; - } - -- sas = mtd->oobsize / chip->ecc.steps; -- - /* read without ecc for verification */ - ret = chip->ecc.read_page_raw(mtd, chip, buf, true, page); - if (ret) - return ret; - -- for (i = 0; i < chip->ecc.steps; i++, oob += sas) { -- ret = nand_check_erased_ecc_chunk(buf, chip->ecc.size, -- oob, sas, NULL, 0, -+ for (i = 0; i < chip->ecc.steps; i++) { -+ ecc_chunk = buf + chip->ecc.size * i; -+ -+ mtd_ooblayout_ecc(mtd, i, &ecc); -+ ecc_bytes = chip->oob_poi + ecc.offset; -+ -+ ret = nand_check_erased_ecc_chunk(ecc_chunk, chip->ecc.size, -+ ecc_bytes, ecc.length, -+ NULL, 0, - chip->ecc.strength); - if (ret < 0) - return ret; -@@ -1721,7 +1895,7 @@ static int brcmnand_read(struct mtd_info *mtd, struct nand_chip *chip, - dev_dbg(ctrl->dev, "read %llx -> %p\n", (unsigned long long)addr, buf); - - try_dmaread: -- brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_COUNT, 0); -+ brcmnand_clear_ecc_addr(ctrl); - - #ifndef __UBOOT__ - if (has_flash_dma(ctrl) && !oob && flash_dma_buf_ok(buf)) { -@@ -1875,15 +2049,9 @@ static int brcmnand_write(struct mtd_info *mtd, struct nand_chip *chip, - } - #endif /* __UBOOT__ */ - -- brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS, -- (host->cs << 16) | ((addr >> 32) & 0xffff)); -- (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS); -- - for (i = 0; i < trans; i++, addr += FC_BYTES) { - /* full address MUST be set before populating FC */ -- brcmnand_write_reg(ctrl, BRCMNAND_CMD_ADDRESS, -- lower_32_bits(addr)); -- (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS); -+ brcmnand_set_cmd_addr(mtd, addr); - - if (buf) { - brcmnand_soc_data_bus_prepare(ctrl->soc, false); -@@ -2044,7 +2212,7 @@ static int brcmnand_set_cfg(struct brcmnand_host *host, - (!!(cfg->device_width == 16) << CFG_BUS_WIDTH_SHIFT) | - (device_size << CFG_DEVICE_SIZE_SHIFT); - if (cfg_offs == cfg_ext_offs) { -- tmp |= (page_size << CFG_PAGE_SIZE_SHIFT) | -+ tmp |= (page_size << ctrl->page_size_shift) | - (block_size << CFG_BLK_SIZE_SHIFT); - nand_writereg(ctrl, cfg_offs, tmp); - } else { -@@ -2056,9 +2224,11 @@ static int brcmnand_set_cfg(struct brcmnand_host *host, - - tmp = nand_readreg(ctrl, acc_control_offs); - tmp &= ~brcmnand_ecc_level_mask(ctrl); -- tmp |= cfg->ecc_level << NAND_ACC_CONTROL_ECC_SHIFT; - tmp &= ~brcmnand_spare_area_mask(ctrl); -- tmp |= cfg->spare_area_size; -+ if (ctrl->nand_version >= 0x0302) { -+ tmp |= cfg->ecc_level << NAND_ACC_CONTROL_ECC_SHIFT; -+ tmp |= cfg->spare_area_size; -+ } - nand_writereg(ctrl, acc_control_offs, tmp); - - brcmnand_set_sector_size_1k(host, cfg->sector_size_1k); -@@ -2345,6 +2515,12 @@ static int brcmnand_init_cs(struct brcmnand_host *host, ofnode dn) - ret = nand_register(0, mtd); - #endif /* __UBOOT__ */ - -+ /* If OOB is written with ECC enabled it will cause ECC errors */ -+ if (is_hamming_ecc(host->ctrl, &host->hwcfg)) { -+ chip->ecc.write_oob = brcmnand_write_oob_raw; -+ chip->ecc.read_oob = brcmnand_read_oob_raw; -+ } -+ - return ret; - } - -@@ -2438,6 +2614,8 @@ const struct dev_pm_ops brcmnand_pm_ops = { - EXPORT_SYMBOL_GPL(brcmnand_pm_ops); - - static const struct of_device_id brcmnand_of_match[] = { -+ { .compatible = "brcm,brcmnand-v2.1" }, -+ { .compatible = "brcm,brcmnand-v2.2" }, - { .compatible = "brcm,brcmnand-v4.0" }, - { .compatible = "brcm,brcmnand-v5.0" }, - { .compatible = "brcm,brcmnand-v6.0" }, -@@ -2446,6 +2624,7 @@ static const struct of_device_id brcmnand_of_match[] = { - { .compatible = "brcm,brcmnand-v7.0" }, - { .compatible = "brcm,brcmnand-v7.1" }, - { .compatible = "brcm,brcmnand-v7.2" }, -+ { .compatible = "brcm,brcmnand-v7.3" }, - {}, - }; - MODULE_DEVICE_TABLE(of, brcmnand_of_match); -@@ -2576,7 +2755,11 @@ int brcmnand_probe(struct udevice *dev, struct brcmnand_soc *soc) - goto err; - } - -- flash_dma_writel(ctrl, FLASH_DMA_MODE, 1); /* linked-list */ -+ /* initialize the dma version */ -+ brcmnand_flash_dma_revision_init(ctrl); -+ -+ /* linked-list and stop on error */ -+ flash_dma_writel(ctrl, FLASH_DMA_MODE, FLASH_DMA_MODE_MASK); - flash_dma_writel(ctrl, FLASH_DMA_ERROR_STATUS, 0); - - /* Allocate descriptor(s) */ -diff --git a/drivers/mtd/nand/raw/kb9202_nand.c b/drivers/mtd/nand/raw/kb9202_nand.c -deleted file mode 100644 -index 9d26532c78..0000000000 ---- a/drivers/mtd/nand/raw/kb9202_nand.c -+++ /dev/null -@@ -1,134 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0+ --/* -- * (C) Copyright 2006 -- * KwikByte -- * -- * (C) Copyright 2009 -- * Matthias Kaehlcke -- */ -- --#include --#include --#include --#include --#include -- --#include -- --/* -- * hardware specific access to control-lines -- */ -- --#define MASK_ALE (1 << 22) /* our ALE is A22 */ --#define MASK_CLE (1 << 21) /* our CLE is A21 */ -- --#define KB9202_NAND_NCE (1 << 28) /* EN* on D28 */ --#define KB9202_NAND_BUSY (1 << 29) /* RB* on D29 */ -- --#define KB9202_SMC2_NWS (1 << 2) --#define KB9202_SMC2_TDF (1 << 8) --#define KB9202_SMC2_RWSETUP (1 << 24) --#define KB9202_SMC2_RWHOLD (1 << 29) -- --/* -- * Board-specific function to access device control signals -- */ --static void kb9202_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) --{ -- struct nand_chip *this = mtd_to_nand(mtd); -- -- if (ctrl & NAND_CTRL_CHANGE) { -- ulong IO_ADDR_W = (ulong) this->IO_ADDR_W; -- -- /* clear ALE and CLE bits */ -- IO_ADDR_W &= ~(MASK_ALE | MASK_CLE); -- -- if (ctrl & NAND_CLE) -- IO_ADDR_W |= MASK_CLE; -- -- if (ctrl & NAND_ALE) -- IO_ADDR_W |= MASK_ALE; -- -- this->IO_ADDR_W = (void *) IO_ADDR_W; -- -- if (ctrl & NAND_NCE) -- writel(KB9202_NAND_NCE, AT91C_PIOC_CODR); -- else -- writel(KB9202_NAND_NCE, AT91C_PIOC_SODR); -- } -- -- if (cmd != NAND_CMD_NONE) -- writeb(cmd, this->IO_ADDR_W); --} -- -- --/* -- * Board-specific function to access the device ready signal. -- */ --static int kb9202_nand_ready(struct mtd_info *mtd) --{ -- return readl(AT91C_PIOC_PDSR) & KB9202_NAND_BUSY; --} -- -- --/* -- * Board-specific NAND init. Copied from include/linux/mtd/nand.h for reference. -- * -- * struct nand_chip - NAND Private Flash Chip Data -- * @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device -- * @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device -- * @hwcontrol: [BOARDSPECIFIC] hardwarespecific function for accesing control-lines -- * @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accesing device ready/busy line -- * If set to NULL no access to ready/busy is available and the ready/busy information -- * is read from the chip status register -- * @enable_hwecc: [BOARDSPECIFIC] function to enable (reset) hardware ecc generator. Must only -- * be provided if a hardware ECC is available -- * @eccmode: [BOARDSPECIFIC] mode of ecc, see defines -- * @chip_delay: [BOARDSPECIFIC] chip dependent delay for transfering data from array to read regs (tR) -- * @options: [BOARDSPECIFIC] various chip options. They can partly be set to inform nand_scan about -- * special functionality. See the defines for further explanation --*/ --/* -- * This routine initializes controller and GPIOs. -- */ --int board_nand_init(struct nand_chip *nand) --{ -- unsigned int value; -- -- nand->ecc.mode = NAND_ECC_SOFT; -- nand->cmd_ctrl = kb9202_nand_hwcontrol; -- nand->dev_ready = kb9202_nand_ready; -- -- /* in case running outside of bootloader */ -- writel(1 << AT91C_ID_PIOC, AT91C_PMC_PCER); -- -- /* setup nand flash access (allow ample margin) */ -- /* 4 wait states, 1 setup, 1 hold, 1 float for 8-bit device */ -- writel(AT91C_SMC2_WSEN | KB9202_SMC2_NWS | KB9202_SMC2_TDF | -- AT91C_SMC2_DBW_8 | KB9202_SMC2_RWSETUP | KB9202_SMC2_RWHOLD, -- AT91C_SMC_CSR3); -- -- /* enable internal NAND controller */ -- value = readl(AT91C_EBI_CSA); -- value |= AT91C_EBI_CS3A_SMC_SmartMedia; -- writel(value, AT91C_EBI_CSA); -- -- /* enable SMOE/SMWE */ -- writel(AT91C_PC1_BFRDY_SMOE | AT91C_PC3_BFBAA_SMWE, AT91C_PIOC_ASR); -- writel(AT91C_PC1_BFRDY_SMOE | AT91C_PC3_BFBAA_SMWE, AT91C_PIOC_PDR); -- writel(AT91C_PC1_BFRDY_SMOE | AT91C_PC3_BFBAA_SMWE, AT91C_PIOC_OER); -- -- /* set NCE to high */ -- writel(KB9202_NAND_NCE, AT91C_PIOC_SODR); -- -- /* disable output on pin connected to the busy line of the NAND */ -- writel(KB9202_NAND_BUSY, AT91C_PIOC_ODR); -- -- /* enable the PIO to control NCE and BUSY */ -- writel(KB9202_NAND_NCE | KB9202_NAND_BUSY, AT91C_PIOC_PER); -- -- /* enable output for NCE */ -- writel(KB9202_NAND_NCE, AT91C_PIOC_OER); -- -- return (0); --} -diff --git a/drivers/mtd/nand/raw/nand_bbt.c b/drivers/mtd/nand/raw/nand_bbt.c -index 911472e91e..cd451870a6 100644 ---- a/drivers/mtd/nand/raw/nand_bbt.c -+++ b/drivers/mtd/nand/raw/nand_bbt.c -@@ -1330,6 +1330,7 @@ int nand_isreserved_bbt(struct mtd_info *mtd, loff_t offs) - * @mtd: MTD device structure - * @offs: offset in the device - * @allowbbt: allow access to bad block table region -+ * Return: 0 - good block, 1- bad block, 2 - reserved block - */ - int nand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt) - { -@@ -1348,7 +1349,7 @@ int nand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt) - case BBT_BLOCK_WORN: - return 1; - case BBT_BLOCK_RESERVED: -- return allowbbt ? 0 : 1; -+ return allowbbt ? 0 : 2; - } - return 1; - } -diff --git a/drivers/mtd/nand/raw/nand_util.c b/drivers/mtd/nand/raw/nand_util.c -index b2345dca7f..72cc24f403 100644 ---- a/drivers/mtd/nand/raw/nand_util.c -+++ b/drivers/mtd/nand/raw/nand_util.c -@@ -113,9 +113,10 @@ int nand_erase_opts(struct mtd_info *mtd, - int ret = mtd_block_isbad(mtd, erase.addr); - if (ret > 0) { - if (!opts->quiet) -- printf("\rSkipping bad block at " -+ printf("\rSkipping %s at " - "0x%08llx " - " \n", -+ ret == 1 ? "bad block" : "bbt reserved", - erase.addr); - - if (!opts->spread) -diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c -index 134bf22c80..70d8ae531e 100644 ---- a/drivers/mtd/nand/spi/core.c -+++ b/drivers/mtd/nand/spi/core.c -@@ -979,8 +979,9 @@ static int spinand_detect(struct spinand_device *spinand) - - ret = spinand_manufacturer_detect(spinand); - if (ret) { -- dev_err(spinand->slave->dev, "unknown raw ID %*phN\n", -- SPINAND_MAX_ID_LEN, spinand->id.data); -+ dev_err(spinand->slave->dev, "unknown raw ID %02x %02x %02x %02x\n", -+ spinand->id.data[0], spinand->id.data[1], -+ spinand->id.data[2], spinand->id.data[3]); - return ret; - } - -diff --git a/drivers/mux/Makefile b/drivers/mux/Makefile -index 78ebf04c7a..d4e24789d3 100644 ---- a/drivers/mux/Makefile -+++ b/drivers/mux/Makefile -@@ -3,5 +3,5 @@ - # (C) Copyright 2019 - # Jean-Jacques Hiblot - --obj-$(CONFIG_$(SPL_)MULTIPLEXER) += mux-uclass.o -+obj-$(CONFIG_MULTIPLEXER) += mux-uclass.o - obj-$(CONFIG_$(SPL_)MUX_MMIO) += mmio.o -diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c -index 112deb546d..ec58697b31 100644 ---- a/drivers/net/dwc_eth_qos.c -+++ b/drivers/net/dwc_eth_qos.c -@@ -108,7 +108,7 @@ void eqos_flush_desc_generic(void *desc) - flush_dcache_range(start, end); - } - --void eqos_inval_buffer_tegra186(void *buf, size_t size) -+static void eqos_inval_buffer_tegra186(void *buf, size_t size) - { - unsigned long start = (unsigned long)buf & ~(ARCH_DMA_MINALIGN - 1); - unsigned long end = ALIGN(start + size, ARCH_DMA_MINALIGN); -@@ -761,6 +761,12 @@ static int eqos_start(struct udevice *dev) - - eqos->reg_access_ok = true; - -+ /* -+ * Assert the SWR first, the actually reset the MAC and to latch in -+ * e.g. i.MX8M Plus GPR[1] content, which selects interface mode. -+ */ -+ setbits_le32(&eqos->dma_regs->mode, EQOS_DMA_MODE_SWR); -+ - ret = wait_for_bit_le32(&eqos->dma_regs->mode, - EQOS_DMA_MODE_SWR, false, - eqos->config->swr_wait, false); -@@ -1383,7 +1389,6 @@ static int eqos_probe_resources_tegra186(struct udevice *dev) - if (ret) { - pr_err("clk_get_by_name(ptp_ref) failed: %d", ret); - goto err_free_clk_rx; -- return ret; - } - - ret = clk_get_by_name(dev, "tx", &eqos->clk_tx); -@@ -1412,13 +1417,6 @@ err_free_reset_eqos: - return ret; - } - --/* board-specific Ethernet Interface initializations. */ --__weak int board_interface_eth_init(struct udevice *dev, -- phy_interface_t interface_type) --{ -- return 0; --} -- - static int eqos_probe_resources_stm32(struct udevice *dev) - { - struct eqos_priv *eqos = dev_get_priv(dev); -@@ -1501,7 +1499,7 @@ static int eqos_remove_resources_tegra186(struct udevice *dev) - - static int eqos_remove_resources_stm32(struct udevice *dev) - { -- struct eqos_priv *eqos = dev_get_priv(dev); -+ struct eqos_priv * __maybe_unused eqos = dev_get_priv(dev); - - debug("%s(dev=%p):\n", __func__, dev); - -@@ -1513,9 +1511,6 @@ static int eqos_remove_resources_stm32(struct udevice *dev) - clk_free(&eqos->clk_ck); - #endif - -- if (dm_gpio_is_valid(&eqos->phy_reset_gpio)) -- dm_gpio_free(dev, &eqos->phy_reset_gpio); -- - debug("%s: OK\n", __func__); - return 0; - } -diff --git a/drivers/net/dwc_eth_qos_imx.c b/drivers/net/dwc_eth_qos_imx.c -index 42cb164ad1..60f3f3f5a1 100644 ---- a/drivers/net/dwc_eth_qos_imx.c -+++ b/drivers/net/dwc_eth_qos_imx.c -@@ -7,6 +7,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -32,20 +33,18 @@ __weak u32 imx_get_eqos_csr_clk(void) - return 100 * 1000000; - } - --__weak int imx_eqos_txclk_set_rate(unsigned long rate) --{ -- return 0; --} -- - static ulong eqos_get_tick_clk_rate_imx(struct udevice *dev) - { -- return imx_get_eqos_csr_clk(); -+ struct eqos_priv *eqos = dev_get_priv(dev); -+ -+ return clk_get_rate(&eqos->clk_master_bus); - } - - static int eqos_probe_resources_imx(struct udevice *dev) - { - struct eqos_priv *eqos = dev_get_priv(dev); - phy_interface_t interface; -+ int ret; - - debug("%s(dev=%p):\n", __func__, dev); - -@@ -56,6 +55,122 @@ static int eqos_probe_resources_imx(struct udevice *dev) - return -EINVAL; - } - -+ ret = board_interface_eth_init(dev, interface); -+ if (ret) -+ return -EINVAL; -+ -+ eqos->max_speed = dev_read_u32_default(dev, "max-speed", 0); -+ -+ ret = clk_get_by_name(dev, "stmmaceth", &eqos->clk_master_bus); -+ if (ret) { -+ dev_dbg(dev, "clk_get_by_name(master_bus) failed: %d", ret); -+ goto err_probe; -+ } -+ -+ ret = clk_get_by_name(dev, "ptp_ref", &eqos->clk_ptp_ref); -+ if (ret) { -+ dev_dbg(dev, "clk_get_by_name(ptp_ref) failed: %d", ret); -+ goto err_free_clk_master_bus; -+ } -+ -+ ret = clk_get_by_name(dev, "tx", &eqos->clk_tx); -+ if (ret) { -+ dev_dbg(dev, "clk_get_by_name(tx) failed: %d", ret); -+ goto err_free_clk_ptp_ref; -+ } -+ -+ ret = clk_get_by_name(dev, "pclk", &eqos->clk_ck); -+ if (ret) { -+ dev_dbg(dev, "clk_get_by_name(pclk) failed: %d", ret); -+ goto err_free_clk_tx; -+ } -+ -+ debug("%s: OK\n", __func__); -+ return 0; -+ -+err_free_clk_tx: -+ clk_free(&eqos->clk_tx); -+err_free_clk_ptp_ref: -+ clk_free(&eqos->clk_ptp_ref); -+err_free_clk_master_bus: -+ clk_free(&eqos->clk_master_bus); -+err_probe: -+ -+ debug("%s: returns %d\n", __func__, ret); -+ return ret; -+} -+ -+static int eqos_remove_resources_imx(struct udevice *dev) -+{ -+ struct eqos_priv *eqos = dev_get_priv(dev); -+ -+ debug("%s(dev=%p):\n", __func__, dev); -+ -+ clk_free(&eqos->clk_ck); -+ clk_free(&eqos->clk_tx); -+ clk_free(&eqos->clk_ptp_ref); -+ clk_free(&eqos->clk_master_bus); -+ -+ debug("%s: OK\n", __func__); -+ return 0; -+} -+ -+static int eqos_start_clks_imx(struct udevice *dev) -+{ -+ struct eqos_priv *eqos = dev_get_priv(dev); -+ int ret; -+ -+ debug("%s(dev=%p):\n", __func__, dev); -+ -+ ret = clk_enable(&eqos->clk_master_bus); -+ if (ret < 0) { -+ dev_dbg(dev, "clk_enable(clk_master_bus) failed: %d", ret); -+ goto err; -+ } -+ -+ ret = clk_enable(&eqos->clk_ptp_ref); -+ if (ret < 0) { -+ dev_dbg(dev, "clk_enable(clk_ptp_ref) failed: %d", ret); -+ goto err_disable_clk_master_bus; -+ } -+ -+ ret = clk_enable(&eqos->clk_tx); -+ if (ret < 0) { -+ dev_dbg(dev, "clk_enable(clk_tx) failed: %d", ret); -+ goto err_disable_clk_ptp_ref; -+ } -+ -+ ret = clk_enable(&eqos->clk_ck); -+ if (ret < 0) { -+ dev_dbg(dev, "clk_enable(clk_ck) failed: %d", ret); -+ goto err_disable_clk_tx; -+ } -+ -+ debug("%s: OK\n", __func__); -+ return 0; -+ -+err_disable_clk_tx: -+ clk_disable(&eqos->clk_tx); -+err_disable_clk_ptp_ref: -+ clk_disable(&eqos->clk_ptp_ref); -+err_disable_clk_master_bus: -+ clk_disable(&eqos->clk_master_bus); -+err: -+ debug("%s: FAILED: %d\n", __func__, ret); -+ return ret; -+} -+ -+static int eqos_stop_clks_imx(struct udevice *dev) -+{ -+ struct eqos_priv *eqos = dev_get_priv(dev); -+ -+ debug("%s(dev=%p):\n", __func__, dev); -+ -+ clk_disable(&eqos->clk_ck); -+ clk_disable(&eqos->clk_tx); -+ clk_disable(&eqos->clk_ptp_ref); -+ clk_disable(&eqos->clk_master_bus); -+ - debug("%s: OK\n", __func__); - return 0; - } -@@ -68,22 +183,29 @@ static int eqos_set_tx_clk_speed_imx(struct udevice *dev) - - debug("%s(dev=%p):\n", __func__, dev); - -- switch (eqos->phy->speed) { -- case SPEED_1000: -- rate = 125 * 1000 * 1000; -- break; -- case SPEED_100: -- rate = 25 * 1000 * 1000; -- break; -- case SPEED_10: -- rate = 2.5 * 1000 * 1000; -- break; -- default: -+ if (eqos->phy->interface == PHY_INTERFACE_MODE_RMII) -+ rate = 5000; /* 5000 kHz = 5 MHz */ -+ else -+ rate = 2500; /* 2500 kHz = 2.5 MHz */ -+ -+ if (eqos->phy->speed == SPEED_1000 && -+ (eqos->phy->interface == PHY_INTERFACE_MODE_RGMII || -+ eqos->phy->interface == PHY_INTERFACE_MODE_RGMII_ID || -+ eqos->phy->interface == PHY_INTERFACE_MODE_RGMII_RXID || -+ eqos->phy->interface == PHY_INTERFACE_MODE_RGMII_TXID)) { -+ rate *= 50; /* Use 50x base rate i.e. 125 MHz */ -+ } else if (eqos->phy->speed == SPEED_100) { -+ rate *= 10; /* Use 10x base rate */ -+ } else if (eqos->phy->speed == SPEED_10) { -+ rate *= 1; /* Use base rate */ -+ } else { - pr_err("invalid speed %d", eqos->phy->speed); - return -EINVAL; - } - -- ret = imx_eqos_txclk_set_rate(rate); -+ rate *= 1000; /* clk_set_rate() operates in Hz */ -+ -+ ret = clk_set_rate(&eqos->clk_tx, rate); - if (ret < 0) { - pr_err("imx (tx_clk, %lu) failed: %d", rate, ret); - return ret; -@@ -107,11 +229,11 @@ static struct eqos_ops eqos_imx_ops = { - .eqos_inval_buffer = eqos_inval_buffer_generic, - .eqos_flush_buffer = eqos_flush_buffer_generic, - .eqos_probe_resources = eqos_probe_resources_imx, -- .eqos_remove_resources = eqos_null_ops, -+ .eqos_remove_resources = eqos_remove_resources_imx, - .eqos_stop_resets = eqos_null_ops, - .eqos_start_resets = eqos_null_ops, -- .eqos_stop_clks = eqos_null_ops, -- .eqos_start_clks = eqos_null_ops, -+ .eqos_stop_clks = eqos_stop_clks_imx, -+ .eqos_start_clks = eqos_start_clks_imx, - .eqos_calibrate_pads = eqos_null_ops, - .eqos_disable_calibration = eqos_null_ops, - .eqos_set_tx_clk_speed = eqos_set_tx_clk_speed_imx, -diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c -index 1a6c18a441..ac937676f9 100644 ---- a/drivers/net/fec_mxc.c -+++ b/drivers/net/fec_mxc.c -@@ -1196,6 +1196,33 @@ static void fec_gpio_reset(struct fec_priv *priv) - } - #endif - -+static int fecmxc_set_ref_clk(struct clk *clk_ref, phy_interface_t interface) -+{ -+ unsigned int freq; -+ int ret; -+ -+ if (!CONFIG_IS_ENABLED(CLK_CCF)) -+ return 0; -+ -+ if (interface == PHY_INTERFACE_MODE_MII) -+ freq = 25000000; -+ else if (interface == PHY_INTERFACE_MODE_RMII) -+ freq = 50000000; -+ else if (interface == PHY_INTERFACE_MODE_RGMII || -+ interface == PHY_INTERFACE_MODE_RGMII_ID || -+ interface == PHY_INTERFACE_MODE_RGMII_RXID || -+ interface == PHY_INTERFACE_MODE_RGMII_TXID) -+ freq = 125000000; -+ else -+ return -EINVAL; -+ -+ ret = clk_set_rate(clk_ref, freq); -+ if (ret < 0) -+ return ret; -+ -+ return 0; -+} -+ - static int fecmxc_probe(struct udevice *dev) - { - bool dm_mii_bus = true; -@@ -1205,6 +1232,10 @@ static int fecmxc_probe(struct udevice *dev) - uint32_t start; - int ret; - -+ ret = board_interface_eth_init(dev, pdata->phy_interface); -+ if (ret) -+ return ret; -+ - if (IS_ENABLED(CONFIG_IMX_MODULE_FUSE)) { - if (enet_fused((ulong)priv->eth)) { - printf("SoC fuse indicates Ethernet@0x%lx is unavailable.\n", (ulong)priv->eth); -@@ -1253,6 +1284,11 @@ static int fecmxc_probe(struct udevice *dev) - - ret = clk_get_by_name(dev, "enet_clk_ref", &priv->clk_ref); - if (!ret) { -+ ret = fecmxc_set_ref_clk(&priv->clk_ref, -+ pdata->phy_interface); -+ if (ret) -+ return ret; -+ - ret = clk_enable(&priv->clk_ref); - if (ret) - return ret; -diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c -index 0fbfad11d4..24933473fa 100644 ---- a/drivers/net/mvneta.c -+++ b/drivers/net/mvneta.c -@@ -815,7 +815,7 @@ static void mvneta_defaults_set(struct mvneta_port *pp) - mvreg_write(pp, MVNETA_SDMA_CONFIG, val); - - /* Enable PHY polling in hardware if not in fixed-link mode */ -- if (!CONFIG_IS_ENABLED(PHY_FIXED) || -+ if (!IS_ENABLED(CONFIG_PHY_FIXED) || - pp->phydev->phy_id != PHY_FIXED_ID) { - mvreg_write(pp, MVNETA_PHY_ADDR, pp->phydev->addr); - -@@ -1176,7 +1176,7 @@ static void mvneta_adjust_link(struct udevice *dev) - * be added). Also, why is ADVERT_FC enabled if we don't enable - * inband AN at all? - */ -- if (CONFIG_IS_ENABLED(PHY_FIXED) && -+ if (IS_ENABLED(CONFIG_PHY_FIXED) && - pp->phydev->phy_id == PHY_FIXED_ID) - val = MVNETA_GMAC_IB_BYPASS_AN_EN | - MVNETA_GMAC_SET_FC_EN | -diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig -index 5eaff053a0..6806e3c090 100644 ---- a/drivers/net/phy/Kconfig -+++ b/drivers/net/phy/Kconfig -@@ -106,6 +106,9 @@ config PHY_AQUANTIA_FW_NAME - config PHY_ATHEROS - bool "Atheros Ethernet PHYs support" - -+config SPL_PHY_ATHEROS -+ bool "Atheros Ethernet PHYs support (SPL)" -+ - config PHY_BROADCOM - bool "Broadcom Ethernet PHYs support" - -diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c -index 5a835cc06f..0bc50dc733 100644 ---- a/drivers/net/ravb.c -+++ b/drivers/net/ravb.c -@@ -310,7 +310,7 @@ static int ravb_phy_config(struct udevice *dev) - struct ravb_priv *eth = dev_get_priv(dev); - struct eth_pdata *pdata = dev_get_plat(dev); - struct phy_device *phydev; -- int mask = 0xffffffff, reg; -+ int reg; - - if (dm_gpio_is_valid(ð->reset_gpio)) { - dm_gpio_set_value(ð->reset_gpio, 1); -@@ -319,12 +319,10 @@ static int ravb_phy_config(struct udevice *dev) - mdelay(1); - } - -- phydev = phy_find_by_mask(eth->bus, mask); -+ phydev = phy_connect(eth->bus, -1, dev, pdata->phy_interface); - if (!phydev) - return -ENODEV; - -- phy_connect_dev(phydev, dev, pdata->phy_interface); -- - eth->phydev = phydev; - - phydev->supported &= SUPPORTED_100baseT_Full | -diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c -index cc49788012..211b2c6e55 100644 ---- a/drivers/net/zynq_gem.c -+++ b/drivers/net/zynq_gem.c -@@ -738,7 +738,7 @@ static int gem_zynqmp_set_dynamic_config(struct udevice *dev) - u32 pm_info[2]; - int ret; - -- if (IS_ENABLED(CONFIG_ARCH_ZYNQMP)) { -+ if (IS_ENABLED(CONFIG_ARCH_ZYNQMP) && IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE)) { - if (!zynqmp_pm_is_function_supported(PM_IOCTL, - IOCTL_SET_GEM_CONFIG)) { - ret = ofnode_read_u32_array(dev_ofnode(dev), -diff --git a/drivers/pci/pci_rom.c b/drivers/pci/pci_rom.c -index 47b6e6e5bc..f0dfe63149 100644 ---- a/drivers/pci/pci_rom.c -+++ b/drivers/pci/pci_rom.c -@@ -325,7 +325,7 @@ err: - return ret; - } - --int vesa_setup_video_priv(struct vesa_mode_info *vesa, -+int vesa_setup_video_priv(struct vesa_mode_info *vesa, u64 fb, - struct video_priv *uc_priv, - struct video_uc_plat *plat) - { -@@ -348,9 +348,9 @@ int vesa_setup_video_priv(struct vesa_mode_info *vesa, - - /* Use double buffering if enabled */ - if (IS_ENABLED(CONFIG_VIDEO_COPY) && plat->base) -- plat->copy_base = vesa->phys_base_ptr; -+ plat->copy_base = fb; - else -- plat->base = vesa->phys_base_ptr; -+ plat->base = fb; - log_debug("base = %lx, copy_base = %lx\n", plat->base, plat->copy_base); - plat->size = vesa->bytes_per_scanline * vesa->y_resolution; - -@@ -377,7 +377,9 @@ int vesa_setup_video(struct udevice *dev, int (*int15_handler)(void)) - return ret; - } - -- ret = vesa_setup_video_priv(&mode_info.vesa, uc_priv, plat); -+ ret = vesa_setup_video_priv(&mode_info.vesa, -+ mode_info.vesa.phys_base_ptr, uc_priv, -+ plat); - if (ret) { - if (ret == -ENFILE) { - /* -diff --git a/drivers/pci/pcie_apple.c b/drivers/pci/pcie_apple.c -index 9b08e1e5da..b934fdbc35 100644 ---- a/drivers/pci/pcie_apple.c -+++ b/drivers/pci/pcie_apple.c -@@ -315,6 +315,8 @@ static int apple_pcie_probe(struct udevice *dev) - for (of_port = ofnode_first_subnode(dev_ofnode(dev)); - ofnode_valid(of_port); - of_port = ofnode_next_subnode(of_port)) { -+ if (!ofnode_is_enabled(of_port)) -+ continue; - ret = apple_pcie_setup_port(pcie, of_port); - if (ret) { - dev_err(pcie->dev, "Port %d setup fail: %d\n", i, ret); -diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c -index 9322e735b9..6a2a5e1564 100644 ---- a/drivers/pci/pcie_dw_rockchip.c -+++ b/drivers/pci/pcie_dw_rockchip.c -@@ -42,6 +42,7 @@ struct rk_pcie { - struct clk_bulk clks; - struct reset_ctl_bulk rsts; - struct gpio_desc rst_gpio; -+ u32 gen; - }; - - /* Parameters for the waiting for iATU enabled routine */ -@@ -331,7 +332,7 @@ static int rockchip_pcie_init_port(struct udevice *dev) - rk_pcie_writel_apb(priv, 0x0, 0xf00040); - pcie_dw_setup_host(&priv->dw); - -- ret = rk_pcie_link_up(priv, LINK_SPEED_GEN_3); -+ ret = rk_pcie_link_up(priv, priv->gen); - if (ret < 0) - goto err_link_up; - -@@ -351,6 +352,7 @@ err_exit_phy: - static int rockchip_pcie_parse_dt(struct udevice *dev) - { - struct rk_pcie *priv = dev_get_priv(dev); -+ u32 max_link_speed; - int ret; - - priv->dw.dbi_base = (void *)dev_read_addr_index(dev, 0); -@@ -375,29 +377,46 @@ static int rockchip_pcie_parse_dt(struct udevice *dev) - ret = reset_get_bulk(dev, &priv->rsts); - if (ret) { - dev_err(dev, "Can't get reset: %d\n", ret); -- return ret; -+ goto rockchip_pcie_parse_dt_err_reset_get_bulk; - } - - ret = clk_get_bulk(dev, &priv->clks); - if (ret) { - dev_err(dev, "Can't get clock: %d\n", ret); -- return ret; -+ goto rockchip_pcie_parse_dt_err_clk_get_bulk; - } - - ret = device_get_supply_regulator(dev, "vpcie3v3-supply", - &priv->vpcie3v3); - if (ret && ret != -ENOENT) { - dev_err(dev, "failed to get vpcie3v3 supply (ret=%d)\n", ret); -- return ret; -+ goto rockchip_pcie_parse_dt_err_supply_regulator; - } - - ret = generic_phy_get_by_index(dev, 0, &priv->phy); - if (ret) { - dev_err(dev, "failed to get pcie phy (ret=%d)\n", ret); -- return ret; -+ goto rockchip_pcie_parse_dt_err_phy_get_by_index; - } - -+ ret = ofnode_read_u32(dev_ofnode(dev), "max-link-speed", -+ &max_link_speed); -+ if (ret < 0 || max_link_speed > 4) -+ priv->gen = LINK_SPEED_GEN_3; -+ else -+ priv->gen = max_link_speed; -+ - return 0; -+ -+rockchip_pcie_parse_dt_err_phy_get_by_index: -+ /* regulators don't need release */ -+rockchip_pcie_parse_dt_err_supply_regulator: -+ clk_release_bulk(&priv->clks); -+rockchip_pcie_parse_dt_err_clk_get_bulk: -+ reset_release_bulk(&priv->rsts); -+rockchip_pcie_parse_dt_err_reset_get_bulk: -+ dm_gpio_free(dev, &priv->rst_gpio); -+ return ret; - } - - /** -@@ -426,7 +445,7 @@ static int rockchip_pcie_probe(struct udevice *dev) - - ret = rockchip_pcie_init_port(dev); - if (ret) -- return ret; -+ goto rockchip_pcie_probe_err_init_port; - - dev_info(dev, "PCIE-%d: Link up (Gen%d-x%d, Bus%d)\n", - dev_seq(dev), pcie_dw_get_link_speed(&priv->dw), -@@ -434,12 +453,21 @@ static int rockchip_pcie_probe(struct udevice *dev) - hose->first_busno); - - -- return pcie_dw_prog_outbound_atu_unroll(&priv->dw, -- PCIE_ATU_REGION_INDEX0, -- PCIE_ATU_TYPE_MEM, -- priv->dw.mem.phys_start, -- priv->dw.mem.bus_start, -- priv->dw.mem.size); -+ ret = pcie_dw_prog_outbound_atu_unroll(&priv->dw, -+ PCIE_ATU_REGION_INDEX0, -+ PCIE_ATU_TYPE_MEM, -+ priv->dw.mem.phys_start, -+ priv->dw.mem.bus_start, -+ priv->dw.mem.size); -+ if (!ret) -+ return ret; -+ -+rockchip_pcie_probe_err_init_port: -+ clk_release_bulk(&priv->clks); -+ reset_release_bulk(&priv->rsts); -+ dm_gpio_free(dev, &priv->rst_gpio); -+ -+ return ret; - } - - static const struct dm_pci_ops rockchip_pcie_ops = { -@@ -449,6 +477,7 @@ static const struct dm_pci_ops rockchip_pcie_ops = { - - static const struct udevice_id rockchip_pcie_ids[] = { - { .compatible = "rockchip,rk3568-pcie" }, -+ { .compatible = "rockchip,rk3588-pcie" }, - { } - }; - -diff --git a/drivers/phy/meson-g12a-usb2.c b/drivers/phy/meson-g12a-usb2.c -index 2fbba7fdae..650b88bd18 100644 ---- a/drivers/phy/meson-g12a-usb2.c -+++ b/drivers/phy/meson-g12a-usb2.c -@@ -54,50 +54,12 @@ - - struct phy_meson_g12a_usb2_priv { - struct regmap *regmap; --#if CONFIG_IS_ENABLED(DM_REGULATOR) -- struct udevice *phy_supply; --#endif - #if CONFIG_IS_ENABLED(CLK) - struct clk clk; - #endif - struct reset_ctl reset; - }; - -- --static int phy_meson_g12a_usb2_power_on(struct phy *phy) --{ --#if CONFIG_IS_ENABLED(DM_REGULATOR) -- struct udevice *dev = phy->dev; -- struct phy_meson_g12a_usb2_priv *priv = dev_get_priv(dev); -- -- if (priv->phy_supply) { -- int ret = regulator_set_enable(priv->phy_supply, true); -- if (ret) -- return ret; -- } --#endif -- -- return 0; --} -- --static int phy_meson_g12a_usb2_power_off(struct phy *phy) --{ --#if CONFIG_IS_ENABLED(DM_REGULATOR) -- struct udevice *dev = phy->dev; -- struct phy_meson_g12a_usb2_priv *priv = dev_get_priv(dev); -- -- if (priv->phy_supply) { -- int ret = regulator_set_enable(priv->phy_supply, false); -- if (ret) { -- pr_err("Error disabling PHY supply\n"); -- return ret; -- } -- } --#endif -- -- return 0; --} -- - static int phy_meson_g12a_usb2_init(struct phy *phy) - { - struct udevice *dev = phy->dev; -@@ -155,8 +117,6 @@ static int phy_meson_g12a_usb2_exit(struct phy *phy) - struct phy_ops meson_g12a_usb2_phy_ops = { - .init = phy_meson_g12a_usb2_init, - .exit = phy_meson_g12a_usb2_exit, -- .power_on = phy_meson_g12a_usb2_power_on, -- .power_off = phy_meson_g12a_usb2_power_off, - }; - - int meson_g12a_usb2_phy_probe(struct udevice *dev) -@@ -193,14 +153,6 @@ int meson_g12a_usb2_phy_probe(struct udevice *dev) - } - #endif - --#if CONFIG_IS_ENABLED(DM_REGULATOR) -- ret = device_get_supply_regulator(dev, "phy-supply", &priv->phy_supply); -- if (ret && ret != -ENOENT) { -- pr_err("Failed to get PHY regulator\n"); -- return ret; -- } --#endif -- - return 0; - } - -diff --git a/drivers/phy/meson-gxbb-usb2.c b/drivers/phy/meson-gxbb-usb2.c -index 7a2e3d2739..70a80b8638 100644 ---- a/drivers/phy/meson-gxbb-usb2.c -+++ b/drivers/phy/meson-gxbb-usb2.c -@@ -12,7 +12,6 @@ - #include - #include - #include --#include - #include - #include - #include -@@ -81,9 +80,6 @@ - struct phy_meson_gxbb_usb2_priv { - struct regmap *regmap; - struct reset_ctl_bulk resets; --#if CONFIG_IS_ENABLED(DM_REGULATOR) -- struct udevice *phy_supply; --#endif - }; - - static int phy_meson_gxbb_usb2_power_on(struct phy *phy) -@@ -92,15 +88,6 @@ static int phy_meson_gxbb_usb2_power_on(struct phy *phy) - struct phy_meson_gxbb_usb2_priv *priv = dev_get_priv(dev); - uint val; - --#if CONFIG_IS_ENABLED(DM_REGULATOR) -- if (priv->phy_supply) { -- int ret = regulator_set_enable(priv->phy_supply, true); -- -- if (ret) -- return ret; -- } --#endif -- - regmap_update_bits(priv->regmap, REG_CONFIG, - REG_CONFIG_CLK_32k_ALTSEL, - REG_CONFIG_CLK_32k_ALTSEL); -@@ -140,26 +127,8 @@ static int phy_meson_gxbb_usb2_power_on(struct phy *phy) - return 0; - } - --static int phy_meson_gxbb_usb2_power_off(struct phy *phy) --{ --#if CONFIG_IS_ENABLED(DM_REGULATOR) -- struct udevice *dev = phy->dev; -- struct phy_meson_gxbb_usb2_priv *priv = dev_get_priv(dev); -- -- if (priv->phy_supply) { -- int ret = regulator_set_enable(priv->phy_supply, false); -- -- if (ret) -- return ret; -- } --#endif -- -- return 0; --} -- - static struct phy_ops meson_gxbb_usb2_phy_ops = { - .power_on = phy_meson_gxbb_usb2_power_on, -- .power_off = phy_meson_gxbb_usb2_power_off, - }; - - static int meson_gxbb_usb2_phy_probe(struct udevice *dev) -@@ -192,13 +161,6 @@ static int meson_gxbb_usb2_phy_probe(struct udevice *dev) - return ret; - } - --#if CONFIG_IS_ENABLED(DM_REGULATOR) -- ret = device_get_supply_regulator(dev, "phy-supply", &priv->phy_supply); -- if (ret && ret != -ENOENT) { -- pr_err("Failed to get PHY regulator\n"); -- return ret; -- } --#endif - ret = reset_get_bulk(dev, &priv->resets); - if (!ret) { - ret = reset_deassert_bulk(&priv->resets); -diff --git a/drivers/phy/meson-gxl-usb2.c b/drivers/phy/meson-gxl-usb2.c -index 9fb376cec4..4c631310ef 100644 ---- a/drivers/phy/meson-gxl-usb2.c -+++ b/drivers/phy/meson-gxl-usb2.c -@@ -16,7 +16,6 @@ - #include - #include - #include --#include - #include - #include - -@@ -101,9 +100,6 @@ - - struct phy_meson_gxl_usb2_priv { - struct regmap *regmap; --#if CONFIG_IS_ENABLED(DM_REGULATOR) -- struct udevice *phy_supply; --#endif - #if CONFIG_IS_ENABLED(CLK) - struct clk clk; - #endif -@@ -167,14 +163,6 @@ static int phy_meson_gxl_usb2_power_on(struct phy *phy) - - phy_meson_gxl_usb2_set_mode(phy, USB_DR_MODE_HOST); - --#if CONFIG_IS_ENABLED(DM_REGULATOR) -- if (priv->phy_supply) { -- int ret = regulator_set_enable(priv->phy_supply, true); -- if (ret) -- return ret; -- } --#endif -- - return 0; - } - -@@ -189,16 +177,6 @@ static int phy_meson_gxl_usb2_power_off(struct phy *phy) - val |= U2P_R0_POWER_ON_RESET; - regmap_write(priv->regmap, U2P_R0, val); - --#if CONFIG_IS_ENABLED(DM_REGULATOR) -- if (priv->phy_supply) { -- int ret = regulator_set_enable(priv->phy_supply, false); -- if (ret) { -- pr_err("Error disabling PHY supply\n"); -- return ret; -- } -- } --#endif -- - return 0; - } - -@@ -229,14 +207,6 @@ int meson_gxl_usb2_phy_probe(struct udevice *dev) - } - #endif - --#if CONFIG_IS_ENABLED(DM_REGULATOR) -- ret = device_get_supply_regulator(dev, "phy-supply", &priv->phy_supply); -- if (ret && ret != -ENOENT) { -- pr_err("Failed to get PHY regulator\n"); -- return ret; -- } --#endif -- - return 0; - } - -diff --git a/drivers/phy/phy-mtk-tphy.c b/drivers/phy/phy-mtk-tphy.c -index 2dd964f7b2..1883f9f83e 100644 ---- a/drivers/phy/phy-mtk-tphy.c -+++ b/drivers/phy/phy-mtk-tphy.c -@@ -14,6 +14,7 @@ - #include - #include - #include -+#include - #include - #include - -@@ -43,19 +44,21 @@ - - #define U3P_USBPHYACR0 0x000 - #define PA0_RG_U2PLL_FORCE_ON BIT(15) -+#define PA0_USB20_PLL_PREDIV GENMASK(7, 6) - #define PA0_RG_USB20_INTR_EN BIT(5) - -+#define U3P_USBPHYACR2 0x008 -+#define PA2_RG_U2PLL_BW GENMASK(21, 19) -+ - #define U3P_USBPHYACR5 0x014 - #define PA5_RG_U2_HSTX_SRCAL_EN BIT(15) - #define PA5_RG_U2_HSTX_SRCTRL GENMASK(14, 12) --#define PA5_RG_U2_HSTX_SRCTRL_VAL(x) ((0x7 & (x)) << 12) - #define PA5_RG_U2_HS_100U_U3_EN BIT(11) - - #define U3P_USBPHYACR6 0x018 - #define PA6_RG_U2_BC11_SW_EN BIT(23) - #define PA6_RG_U2_OTG_VBUSCMP_EN BIT(20) - #define PA6_RG_U2_SQTH GENMASK(3, 0) --#define PA6_RG_U2_SQTH_VAL(x) (0xf & (x)) - - #define U3P_U2PHYACR4 0x020 - #define P2C_RG_USB20_GPIO_CTL BIT(9) -@@ -63,6 +66,14 @@ - #define P2C_U2_GPIO_CTR_MSK \ - (P2C_RG_USB20_GPIO_CTL | P2C_USB20_GPIO_MODE) - -+#define U3P_U2PHYA_RESV 0x030 -+#define P2R_RG_U2PLL_FBDIV_26M 0x1bb13b -+#define P2R_RG_U2PLL_FBDIV_48M 0x3c0000 -+ -+#define U3P_U2PHYA_RESV1 0x044 -+#define P2R_RG_U2PLL_REFCLK_SEL BIT(5) -+#define P2R_RG_U2PLL_FRA_EN BIT(3) -+ - #define U3P_U2PHYDTM0 0x068 - #define P2C_FORCE_UART_EN BIT(26) - #define P2C_FORCE_DATAIN BIT(23) -@@ -72,11 +83,9 @@ - #define P2C_FORCE_SUSPENDM BIT(18) - #define P2C_FORCE_TERMSEL BIT(17) - #define P2C_RG_DATAIN GENMASK(13, 10) --#define P2C_RG_DATAIN_VAL(x) ((0xf & (x)) << 10) - #define P2C_RG_DMPULLDOWN BIT(7) - #define P2C_RG_DPPULLDOWN BIT(6) - #define P2C_RG_XCVRSEL GENMASK(5, 4) --#define P2C_RG_XCVRSEL_VAL(x) ((0x3 & (x)) << 4) - #define P2C_RG_SUSPENDM BIT(3) - #define P2C_RG_TERMSEL BIT(2) - #define P2C_DTM0_PART_MASK \ -@@ -104,72 +113,53 @@ - - #define U3P_U3_PHYA_REG0 0x000 - #define P3A_RG_CLKDRV_OFF GENMASK(3, 2) --#define P3A_RG_CLKDRV_OFF_VAL(x) ((0x3 & (x)) << 2) - - #define U3P_U3_PHYA_REG1 0x004 - #define P3A_RG_CLKDRV_AMP GENMASK(31, 29) --#define P3A_RG_CLKDRV_AMP_VAL(x) ((0x7 & (x)) << 29) - - #define U3P_U3_PHYA_REG6 0x018 - #define P3A_RG_TX_EIDLE_CM GENMASK(31, 28) --#define P3A_RG_TX_EIDLE_CM_VAL(x) ((0xf & (x)) << 28) - - #define U3P_U3_PHYA_REG9 0x024 - #define P3A_RG_RX_DAC_MUX GENMASK(5, 1) --#define P3A_RG_RX_DAC_MUX_VAL(x) ((0x1f & (x)) << 1) - - #define U3P_U3_PHYA_DA_REG0 0x100 - #define P3A_RG_XTAL_EXT_PE2H GENMASK(17, 16) --#define P3A_RG_XTAL_EXT_PE2H_VAL(x) ((0x3 & (x)) << 16) - #define P3A_RG_XTAL_EXT_PE1H GENMASK(13, 12) --#define P3A_RG_XTAL_EXT_PE1H_VAL(x) ((0x3 & (x)) << 12) - #define P3A_RG_XTAL_EXT_EN_U3 GENMASK(11, 10) --#define P3A_RG_XTAL_EXT_EN_U3_VAL(x) ((0x3 & (x)) << 10) - - #define U3P_U3_PHYA_DA_REG4 0x108 - #define P3A_RG_PLL_DIVEN_PE2H GENMASK(21, 19) - #define P3A_RG_PLL_BC_PE2H GENMASK(7, 6) --#define P3A_RG_PLL_BC_PE2H_VAL(x) ((0x3 & (x)) << 6) - - #define U3P_U3_PHYA_DA_REG5 0x10c - #define P3A_RG_PLL_BR_PE2H GENMASK(29, 28) --#define P3A_RG_PLL_BR_PE2H_VAL(x) ((0x3 & (x)) << 28) - #define P3A_RG_PLL_IC_PE2H GENMASK(15, 12) --#define P3A_RG_PLL_IC_PE2H_VAL(x) ((0xf & (x)) << 12) - - #define U3P_U3_PHYA_DA_REG6 0x110 - #define P3A_RG_PLL_IR_PE2H GENMASK(19, 16) --#define P3A_RG_PLL_IR_PE2H_VAL(x) ((0xf & (x)) << 16) - - #define U3P_U3_PHYA_DA_REG7 0x114 - #define P3A_RG_PLL_BP_PE2H GENMASK(19, 16) --#define P3A_RG_PLL_BP_PE2H_VAL(x) ((0xf & (x)) << 16) - - #define U3P_U3_PHYA_DA_REG20 0x13c - #define P3A_RG_PLL_DELTA1_PE2H GENMASK(31, 16) --#define P3A_RG_PLL_DELTA1_PE2H_VAL(x) ((0xffff & (x)) << 16) - - #define U3P_U3_PHYA_DA_REG25 0x148 - #define P3A_RG_PLL_DELTA_PE2H GENMASK(15, 0) --#define P3A_RG_PLL_DELTA_PE2H_VAL(x) (0xffff & (x)) - - #define U3P_U3_PHYD_LFPS1 0x00c - #define P3D_RG_FWAKE_TH GENMASK(21, 16) --#define P3D_RG_FWAKE_TH_VAL(x) ((0x3f & (x)) << 16) - - #define U3P_U3_PHYD_CDR1 0x05c - #define P3D_RG_CDR_BIR_LTD1 GENMASK(28, 24) --#define P3D_RG_CDR_BIR_LTD1_VAL(x) ((0x1f & (x)) << 24) - #define P3D_RG_CDR_BIR_LTD0 GENMASK(12, 8) --#define P3D_RG_CDR_BIR_LTD0_VAL(x) ((0x1f & (x)) << 8) - - #define U3P_U3_PHYD_RXDET1 0x128 - #define P3D_RG_RXDET_STB2_SET GENMASK(17, 9) --#define P3D_RG_RXDET_STB2_SET_VAL(x) ((0x1ff & (x)) << 9) - - #define U3P_U3_PHYD_RXDET2 0x12c - #define P3D_RG_RXDET_STB2_SET_P3 GENMASK(8, 0) --#define P3D_RG_RXDET_STB2_SET_P3_VAL(x) (0x1ff & (x)) - - #define U3P_SPLLC_XTALCTL3 0x018 - #define XC3_RG_U3_XTAL_RX_PWD BIT(9) -@@ -179,66 +169,62 @@ - #define PHYD_CTRL_SIGNAL_MODE4 0x1c - /* CDR Charge Pump P-path current adjustment */ - #define RG_CDR_BICLTD1_GEN1_MSK GENMASK(23, 20) --#define RG_CDR_BICLTD1_GEN1_VAL(x) ((0xf & (x)) << 20) - #define RG_CDR_BICLTD0_GEN1_MSK GENMASK(11, 8) --#define RG_CDR_BICLTD0_GEN1_VAL(x) ((0xf & (x)) << 8) - - #define PHYD_DESIGN_OPTION2 0x24 - /* Symbol lock count selection */ - #define RG_LOCK_CNT_SEL_MSK GENMASK(5, 4) --#define RG_LOCK_CNT_SEL_VAL(x) ((0x3 & (x)) << 4) - - #define PHYD_DESIGN_OPTION9 0x40 - /* COMWAK GAP width window */ - #define RG_TG_MAX_MSK GENMASK(20, 16) --#define RG_TG_MAX_VAL(x) ((0x1f & (x)) << 16) - /* COMINIT GAP width window */ - #define RG_T2_MAX_MSK GENMASK(13, 8) --#define RG_T2_MAX_VAL(x) ((0x3f & (x)) << 8) - /* COMWAK GAP width window */ - #define RG_TG_MIN_MSK GENMASK(7, 5) --#define RG_TG_MIN_VAL(x) ((0x7 & (x)) << 5) - /* COMINIT GAP width window */ - #define RG_T2_MIN_MSK GENMASK(4, 0) --#define RG_T2_MIN_VAL(x) (0x1f & (x)) - - #define ANA_RG_CTRL_SIGNAL1 0x4c - /* TX driver tail current control for 0dB de-empahsis mdoe for Gen1 speed */ - #define RG_IDRV_0DB_GEN1_MSK GENMASK(13, 8) --#define RG_IDRV_0DB_GEN1_VAL(x) ((0x3f & (x)) << 8) - - #define ANA_RG_CTRL_SIGNAL4 0x58 - #define RG_CDR_BICLTR_GEN1_MSK GENMASK(23, 20) --#define RG_CDR_BICLTR_GEN1_VAL(x) ((0xf & (x)) << 20) - /* Loop filter R1 resistance adjustment for Gen1 speed */ - #define RG_CDR_BR_GEN2_MSK GENMASK(10, 8) --#define RG_CDR_BR_GEN2_VAL(x) ((0x7 & (x)) << 8) - - #define ANA_RG_CTRL_SIGNAL6 0x60 - /* I-path capacitance adjustment for Gen1 */ - #define RG_CDR_BC_GEN1_MSK GENMASK(28, 24) --#define RG_CDR_BC_GEN1_VAL(x) ((0x1f & (x)) << 24) - #define RG_CDR_BIRLTR_GEN1_MSK GENMASK(4, 0) --#define RG_CDR_BIRLTR_GEN1_VAL(x) (0x1f & (x)) - - #define ANA_EQ_EYE_CTRL_SIGNAL1 0x6c - /* RX Gen1 LEQ tuning step */ - #define RG_EQ_DLEQ_LFI_GEN1_MSK GENMASK(11, 8) --#define RG_EQ_DLEQ_LFI_GEN1_VAL(x) ((0xf & (x)) << 8) - - #define ANA_EQ_EYE_CTRL_SIGNAL4 0xd8 - #define RG_CDR_BIRLTD0_GEN1_MSK GENMASK(20, 16) --#define RG_CDR_BIRLTD0_GEN1_VAL(x) ((0x1f & (x)) << 16) - - #define ANA_EQ_EYE_CTRL_SIGNAL5 0xdc - #define RG_CDR_BIRLTD0_GEN3_MSK GENMASK(4, 0) --#define RG_CDR_BIRLTD0_GEN3_VAL(x) (0x1f & (x)) - - enum mtk_phy_version { - MTK_TPHY_V1 = 1, - MTK_TPHY_V2, - }; - -+struct tphy_pdata { -+ enum mtk_phy_version version; -+ -+ /* -+ * workaround only for mt8195: -+ * u2phy should use integer mode instead of fractional mode of -+ * 48M PLL, fix it by switching PLL to 26M from default 48M -+ */ -+ bool sw_pll_48m_to_26m; -+}; -+ - struct u2phy_banks { - void __iomem *misc; - void __iomem *fmreg; -@@ -269,11 +255,32 @@ struct mtk_phy_instance { - struct mtk_tphy { - struct udevice *dev; - void __iomem *sif_base; -- enum mtk_phy_version version; -+ const struct tphy_pdata *pdata; - struct mtk_phy_instance **phys; - int nphys; - }; - -+/* workaround only for mt8195 */ -+static void u2_phy_pll_26m_set(struct mtk_tphy *tphy, -+ struct mtk_phy_instance *instance) -+{ -+ struct u2phy_banks *u2_banks = &instance->u2_banks; -+ -+ if (!tphy->pdata->sw_pll_48m_to_26m) -+ return; -+ -+ clrsetbits_le32(u2_banks->com + U3P_USBPHYACR0, PA0_USB20_PLL_PREDIV, -+ FIELD_PREP(PA0_USB20_PLL_PREDIV, 0)); -+ -+ clrsetbits_le32(u2_banks->com + U3P_USBPHYACR2, PA2_RG_U2PLL_BW, -+ FIELD_PREP(PA2_RG_U2PLL_BW, 3)); -+ -+ writel(P2R_RG_U2PLL_FBDIV_26M, u2_banks->com + U3P_U2PHYA_RESV); -+ -+ setbits_le32(u2_banks->com + U3P_U2PHYA_RESV1, -+ P2R_RG_U2PLL_FRA_EN | P2R_RG_U2PLL_REFCLK_SEL); -+} -+ - static void u2_phy_instance_init(struct mtk_tphy *tphy, - struct mtk_phy_instance *instance) - { -@@ -282,7 +289,8 @@ static void u2_phy_instance_init(struct mtk_tphy *tphy, - /* switch to USB function, and enable usb pll */ - clrsetbits_le32(u2_banks->com + U3P_U2PHYDTM0, - P2C_FORCE_UART_EN | P2C_FORCE_SUSPENDM, -- P2C_RG_XCVRSEL_VAL(1) | P2C_RG_DATAIN_VAL(0)); -+ FIELD_PREP(P2C_RG_XCVRSEL, 1) | -+ FIELD_PREP(P2C_RG_DATAIN, 0)); - - clrbits_le32(u2_banks->com + U3P_U2PHYDTM1, P2C_RG_UART_EN); - setbits_le32(u2_banks->com + U3P_USBPHYACR0, PA0_RG_USB20_INTR_EN); -@@ -295,11 +303,14 @@ static void u2_phy_instance_init(struct mtk_tphy *tphy, - /* DP/DM BC1.1 path Disable */ - clrsetbits_le32(u2_banks->com + U3P_USBPHYACR6, - PA6_RG_U2_BC11_SW_EN | PA6_RG_U2_SQTH, -- PA6_RG_U2_SQTH_VAL(2)); -+ FIELD_PREP(PA6_RG_U2_SQTH, 2)); - - /* set HS slew rate */ - clrsetbits_le32(u2_banks->com + U3P_USBPHYACR5, -- PA5_RG_U2_HSTX_SRCTRL, PA5_RG_U2_HSTX_SRCTRL_VAL(4)); -+ PA5_RG_U2_HSTX_SRCTRL, -+ FIELD_PREP(PA5_RG_U2_HSTX_SRCTRL, 4)); -+ -+ u2_phy_pll_26m_set(tphy, instance); - - dev_dbg(tphy->dev, "%s(%d)\n", __func__, instance->index); - } -@@ -351,28 +362,31 @@ static void u3_phy_instance_init(struct mtk_tphy *tphy, - - /* gating XSQ */ - clrsetbits_le32(u3_banks->phya + U3P_U3_PHYA_DA_REG0, -- P3A_RG_XTAL_EXT_EN_U3, P3A_RG_XTAL_EXT_EN_U3_VAL(2)); -+ P3A_RG_XTAL_EXT_EN_U3, -+ FIELD_PREP(P3A_RG_XTAL_EXT_EN_U3, 2)); - - clrsetbits_le32(u3_banks->phya + U3P_U3_PHYA_REG9, -- P3A_RG_RX_DAC_MUX, P3A_RG_RX_DAC_MUX_VAL(4)); -+ P3A_RG_RX_DAC_MUX, FIELD_PREP(P3A_RG_RX_DAC_MUX, 4)); - - clrsetbits_le32(u3_banks->phya + U3P_U3_PHYA_REG6, -- P3A_RG_TX_EIDLE_CM, P3A_RG_TX_EIDLE_CM_VAL(0xe)); -+ P3A_RG_TX_EIDLE_CM, -+ FIELD_PREP(P3A_RG_TX_EIDLE_CM, 0xe)); - - clrsetbits_le32(u3_banks->phyd + U3P_U3_PHYD_CDR1, - P3D_RG_CDR_BIR_LTD0 | P3D_RG_CDR_BIR_LTD1, -- P3D_RG_CDR_BIR_LTD0_VAL(0xc) | -- P3D_RG_CDR_BIR_LTD1_VAL(0x3)); -+ FIELD_PREP(P3D_RG_CDR_BIR_LTD0, 0xc) | -+ FIELD_PREP(P3D_RG_CDR_BIR_LTD1, 0x3)); - - clrsetbits_le32(u3_banks->phyd + U3P_U3_PHYD_LFPS1, -- P3D_RG_FWAKE_TH, P3D_RG_FWAKE_TH_VAL(0x34)); -+ P3D_RG_FWAKE_TH, FIELD_PREP(P3D_RG_FWAKE_TH, 0x34)); - - clrsetbits_le32(u3_banks->phyd + U3P_U3_PHYD_RXDET1, -- P3D_RG_RXDET_STB2_SET, P3D_RG_RXDET_STB2_SET_VAL(0x10)); -+ P3D_RG_RXDET_STB2_SET, -+ FIELD_PREP(P3D_RG_RXDET_STB2_SET, 0x10)); - - clrsetbits_le32(u3_banks->phyd + U3P_U3_PHYD_RXDET2, - P3D_RG_RXDET_STB2_SET_P3, -- P3D_RG_RXDET_STB2_SET_P3_VAL(0x10)); -+ FIELD_PREP(P3D_RG_RXDET_STB2_SET_P3, 0x10)); - - dev_dbg(tphy->dev, "%s(%d)\n", __func__, instance->index); - } -@@ -382,50 +396,52 @@ static void pcie_phy_instance_init(struct mtk_tphy *tphy, - { - struct u3phy_banks *u3_banks = &instance->u3_banks; - -- if (tphy->version != MTK_TPHY_V1) -+ if (tphy->pdata->version != MTK_TPHY_V1) - return; - - clrsetbits_le32(u3_banks->phya + U3P_U3_PHYA_DA_REG0, - P3A_RG_XTAL_EXT_PE1H | P3A_RG_XTAL_EXT_PE2H, -- P3A_RG_XTAL_EXT_PE1H_VAL(0x2) | -- P3A_RG_XTAL_EXT_PE2H_VAL(0x2)); -+ FIELD_PREP(P3A_RG_XTAL_EXT_PE1H, 0x2) | -+ FIELD_PREP(P3A_RG_XTAL_EXT_PE2H, 0x2)); - - /* ref clk drive */ - clrsetbits_le32(u3_banks->phya + U3P_U3_PHYA_REG1, P3A_RG_CLKDRV_AMP, -- P3A_RG_CLKDRV_AMP_VAL(0x4)); -+ FIELD_PREP(P3A_RG_CLKDRV_AMP, 0x4)); - clrsetbits_le32(u3_banks->phya + U3P_U3_PHYA_REG0, P3A_RG_CLKDRV_OFF, -- P3A_RG_CLKDRV_OFF_VAL(0x1)); -+ FIELD_PREP(P3A_RG_CLKDRV_OFF, 0x1)); - - /* SSC delta -5000ppm */ - clrsetbits_le32(u3_banks->phya + U3P_U3_PHYA_DA_REG20, - P3A_RG_PLL_DELTA1_PE2H, -- P3A_RG_PLL_DELTA1_PE2H_VAL(0x3c)); -+ FIELD_PREP(P3A_RG_PLL_DELTA1_PE2H, 0x3c)); - - clrsetbits_le32(u3_banks->phya + U3P_U3_PHYA_DA_REG25, - P3A_RG_PLL_DELTA_PE2H, -- P3A_RG_PLL_DELTA_PE2H_VAL(0x36)); -+ FIELD_PREP(P3A_RG_PLL_DELTA_PE2H, 0x36)); - - /* change pll BW 0.6M */ - clrsetbits_le32(u3_banks->phya + U3P_U3_PHYA_DA_REG5, - P3A_RG_PLL_BR_PE2H | P3A_RG_PLL_IC_PE2H, -- P3A_RG_PLL_BR_PE2H_VAL(0x1) | -- P3A_RG_PLL_IC_PE2H_VAL(0x1)); -+ FIELD_PREP(P3A_RG_PLL_BR_PE2H, 0x1) | -+ FIELD_PREP(P3A_RG_PLL_IC_PE2H, 0x1)); - clrsetbits_le32(u3_banks->phya + U3P_U3_PHYA_DA_REG4, - P3A_RG_PLL_DIVEN_PE2H | P3A_RG_PLL_BC_PE2H, -- P3A_RG_PLL_BC_PE2H_VAL(0x3)); -+ FIELD_PREP(P3A_RG_PLL_BC_PE2H, 0x3)); - - clrsetbits_le32(u3_banks->phya + U3P_U3_PHYA_DA_REG6, -- P3A_RG_PLL_IR_PE2H, P3A_RG_PLL_IR_PE2H_VAL(0x2)); -+ P3A_RG_PLL_IR_PE2H, -+ FIELD_PREP(P3A_RG_PLL_IR_PE2H, 0x2)); - clrsetbits_le32(u3_banks->phya + U3P_U3_PHYA_DA_REG7, -- P3A_RG_PLL_BP_PE2H, P3A_RG_PLL_BP_PE2H_VAL(0xa)); -+ P3A_RG_PLL_BP_PE2H, -+ FIELD_PREP(P3A_RG_PLL_BP_PE2H, 0xa)); - - /* Tx Detect Rx Timing: 10us -> 5us */ - clrsetbits_le32(u3_banks->phyd + U3P_U3_PHYD_RXDET1, - P3D_RG_RXDET_STB2_SET, -- P3D_RG_RXDET_STB2_SET_VAL(0x10)); -+ FIELD_PREP(P3D_RG_RXDET_STB2_SET, 0x10)); - clrsetbits_le32(u3_banks->phyd + U3P_U3_PHYD_RXDET2, - P3D_RG_RXDET_STB2_SET_P3, -- P3D_RG_RXDET_STB2_SET_P3_VAL(0x10)); -+ FIELD_PREP(P3D_RG_RXDET_STB2_SET_P3, 0x10)); - - /* wait for PCIe subsys register to active */ - udelay(3000); -@@ -438,36 +454,38 @@ static void sata_phy_instance_init(struct mtk_tphy *tphy, - - clrsetbits_le32(u3_banks->phyd + ANA_RG_CTRL_SIGNAL6, - RG_CDR_BIRLTR_GEN1_MSK | RG_CDR_BC_GEN1_MSK, -- RG_CDR_BIRLTR_GEN1_VAL(0x6) | -- RG_CDR_BC_GEN1_VAL(0x1a)); -+ FIELD_PREP(RG_CDR_BIRLTR_GEN1_MSK, 0x6) | -+ FIELD_PREP(RG_CDR_BC_GEN1_MSK, 0x1a)); - clrsetbits_le32(u3_banks->phyd + ANA_EQ_EYE_CTRL_SIGNAL4, - RG_CDR_BIRLTD0_GEN1_MSK, -- RG_CDR_BIRLTD0_GEN1_VAL(0x18)); -+ FIELD_PREP(RG_CDR_BIRLTD0_GEN1_MSK, 0x18)); - clrsetbits_le32(u3_banks->phyd + ANA_EQ_EYE_CTRL_SIGNAL5, - RG_CDR_BIRLTD0_GEN3_MSK, -- RG_CDR_BIRLTD0_GEN3_VAL(0x06)); -+ FIELD_PREP(RG_CDR_BIRLTD0_GEN3_MSK, 0x06)); - clrsetbits_le32(u3_banks->phyd + ANA_RG_CTRL_SIGNAL4, - RG_CDR_BICLTR_GEN1_MSK | RG_CDR_BR_GEN2_MSK, -- RG_CDR_BICLTR_GEN1_VAL(0x0c) | -- RG_CDR_BR_GEN2_VAL(0x07)); -+ FIELD_PREP(RG_CDR_BICLTR_GEN1_MSK, 0x0c) | -+ FIELD_PREP(RG_CDR_BR_GEN2_MSK, 0x07)); - clrsetbits_le32(u3_banks->phyd + PHYD_CTRL_SIGNAL_MODE4, - RG_CDR_BICLTD0_GEN1_MSK | RG_CDR_BICLTD1_GEN1_MSK, -- RG_CDR_BICLTD0_GEN1_VAL(0x08) | -- RG_CDR_BICLTD1_GEN1_VAL(0x02)); -+ FIELD_PREP(RG_CDR_BICLTD0_GEN1_MSK, 0x08) | -+ FIELD_PREP(RG_CDR_BICLTD1_GEN1_MSK, 0x02)); - clrsetbits_le32(u3_banks->phyd + PHYD_DESIGN_OPTION2, - RG_LOCK_CNT_SEL_MSK, -- RG_LOCK_CNT_SEL_VAL(0x02)); -+ FIELD_PREP(RG_LOCK_CNT_SEL_MSK, 0x02)); - clrsetbits_le32(u3_banks->phyd + PHYD_DESIGN_OPTION9, - RG_T2_MIN_MSK | RG_TG_MIN_MSK | - RG_T2_MAX_MSK | RG_TG_MAX_MSK, -- RG_T2_MIN_VAL(0x12) | RG_TG_MIN_VAL(0x04) | -- RG_T2_MAX_VAL(0x31) | RG_TG_MAX_VAL(0x0e)); -+ FIELD_PREP(RG_T2_MIN_MSK, 0x12) | -+ FIELD_PREP(RG_TG_MIN_MSK, 0x04) | -+ FIELD_PREP(RG_T2_MAX_MSK, 0x31) | -+ FIELD_PREP(RG_TG_MAX_MSK, 0x0e)); - clrsetbits_le32(u3_banks->phyd + ANA_RG_CTRL_SIGNAL1, - RG_IDRV_0DB_GEN1_MSK, -- RG_IDRV_0DB_GEN1_VAL(0x20)); -+ FIELD_PREP(RG_IDRV_0DB_GEN1_MSK, 0x20)); - clrsetbits_le32(u3_banks->phyd + ANA_EQ_EYE_CTRL_SIGNAL1, - RG_EQ_DLEQ_LFI_GEN1_MSK, -- RG_EQ_DLEQ_LFI_GEN1_VAL(0x03)); -+ FIELD_PREP(RG_EQ_DLEQ_LFI_GEN1_MSK, 0x03)); - } - - static void pcie_phy_instance_power_on(struct mtk_tphy *tphy, -@@ -662,11 +680,14 @@ static int mtk_phy_xlate(struct phy *phy, - return -EINVAL; - } - -- if (tphy->version == MTK_TPHY_V1) { -+ switch (tphy->pdata->version) { -+ case MTK_TPHY_V1: - phy_v1_banks_init(tphy, instance); -- } else if (tphy->version == MTK_TPHY_V2) { -+ break; -+ case MTK_TPHY_V2: - phy_v2_banks_init(tphy, instance); -- } else { -+ break; -+ default: - dev_err(phy->dev, "phy version is not supported\n"); - return -EINVAL; - } -@@ -696,13 +717,12 @@ static int mtk_tphy_probe(struct udevice *dev) - return -ENOMEM; - - tphy->dev = dev; -- tphy->version = dev_get_driver_data(dev); -+ tphy->pdata = (void *)dev_get_driver_data(dev); - - /* v1 has shared banks for usb/pcie mode, */ - /* but not for sata mode */ -- if (tphy->version == MTK_TPHY_V1) { -+ if (tphy->pdata->version == MTK_TPHY_V1) - tphy->sif_base = dev_read_addr_ptr(dev); -- } - - dev_for_each_subnode(subnode, dev) { - struct mtk_phy_instance *instance; -@@ -737,9 +757,32 @@ static int mtk_tphy_probe(struct udevice *dev) - return 0; - } - -+static struct tphy_pdata tphy_v1_pdata = { -+ .version = MTK_TPHY_V1, -+}; -+ -+static struct tphy_pdata tphy_v2_pdata = { -+ .version = MTK_TPHY_V2, -+}; -+ -+static struct tphy_pdata mt8195_pdata = { -+ .version = MTK_TPHY_V2, -+ .sw_pll_48m_to_26m = true, -+}; -+ - static const struct udevice_id mtk_tphy_id_table[] = { -- { .compatible = "mediatek,generic-tphy-v1", .data = MTK_TPHY_V1, }, -- { .compatible = "mediatek,generic-tphy-v2", .data = MTK_TPHY_V2, }, -+ { -+ .compatible = "mediatek,generic-tphy-v1", -+ .data = (ulong)&tphy_v1_pdata, -+ }, -+ { -+ .compatible = "mediatek,generic-tphy-v2", -+ .data = (ulong)&tphy_v2_pdata, -+ }, -+ { -+ .compatible = "mediatek,mt8195-tphy", -+ .data = (ulong)&mt8195_pdata, -+ }, - { } - }; - -diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c -index 3fef5135a9..475ac285df 100644 ---- a/drivers/phy/phy-uclass.c -+++ b/drivers/phy/phy-uclass.c -@@ -12,6 +12,7 @@ - #include - #include - #include -+#include - - /** - * struct phy_counts - Init and power-on counts of a single PHY port -@@ -29,12 +30,14 @@ - * without a matching generic_phy_exit() afterwards - * @list: Handle for a linked list of these structures corresponding to - * ports of the same PHY provider -+ * @supply: Handle to a phy-supply device - */ - struct phy_counts { - unsigned long id; - int power_on_count; - int init_count; - struct list_head list; -+ struct udevice *supply; - }; - - static inline struct phy_ops *phy_dev_ops(struct udevice *dev) -@@ -224,6 +227,12 @@ int generic_phy_init(struct phy *phy) - return 0; - } - -+#if CONFIG_IS_ENABLED(DM_REGULATOR) -+ device_get_supply_regulator(phy->dev, "phy-supply", &counts->supply); -+ if (IS_ERR(counts->supply)) -+ dev_dbg(phy->dev, "no phy-supply property found\n"); -+#endif -+ - ret = ops->init(phy); - if (ret) - dev_err(phy->dev, "PHY: Failed to init %s: %d.\n", -@@ -272,6 +281,12 @@ int generic_phy_exit(struct phy *phy) - return 0; - } - -+#if CONFIG_IS_ENABLED(DM_REGULATOR) -+ if (!IS_ERR_OR_NULL(counts->supply)) { -+ ret = regulator_set_enable(counts->supply, false); -+ dev_dbg(phy->dev, "supply disable status: %d\n", ret); -+ } -+#endif - ret = ops->exit(phy); - if (ret) - dev_err(phy->dev, "PHY: Failed to exit %s: %d.\n", -@@ -300,6 +315,13 @@ int generic_phy_power_on(struct phy *phy) - return 0; - } - -+#if CONFIG_IS_ENABLED(DM_REGULATOR) -+ if (!IS_ERR_OR_NULL(counts->supply)) { -+ ret = regulator_set_enable(counts->supply, true); -+ dev_dbg(phy->dev, "supply enable status: %d\n", ret); -+ } -+#endif -+ - ret = ops->power_on(phy); - if (ret) - dev_err(phy->dev, "PHY: Failed to power on %s: %d.\n", -diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c -index 55e1dbcfef..22e2797eea 100644 ---- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c -+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c -@@ -201,14 +201,14 @@ static int rockchip_usb2phy_probe(struct udevice *dev) - - /* find out a proper config which can be matched with dt. */ - index = 0; -- while (phy_cfgs[index].reg) { -+ do { - if (phy_cfgs[index].reg == reg) { - priv->phy_cfg = &phy_cfgs[index]; - break; - } - - ++index; -- } -+ } while (phy_cfgs[index].reg); - - if (!priv->phy_cfg) { - dev_err(dev, "failed find proper phy-cfg\n"); -@@ -348,6 +348,58 @@ static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = { - { /* sentinel */ } - }; - -+static const struct rockchip_usb2phy_cfg rk3588_phy_cfgs[] = { -+ { -+ .reg = 0x0000, -+ .port_cfgs = { -+ [USB2PHY_PORT_OTG] = { -+ .phy_sus = { 0x000c, 11, 11, 0, 1 }, -+ .ls_det_en = { 0x0080, 0, 0, 0, 1 }, -+ .ls_det_st = { 0x0084, 0, 0, 0, 1 }, -+ .ls_det_clr = { 0x0088, 0, 0, 0, 1 }, -+ .utmi_ls = { 0x00c0, 10, 9, 0, 1 }, -+ } -+ }, -+ }, -+ { -+ .reg = 0x4000, -+ .port_cfgs = { -+ [USB2PHY_PORT_OTG] = { -+ .phy_sus = { 0x000c, 11, 11, 0, 0 }, -+ .ls_det_en = { 0x0080, 0, 0, 0, 1 }, -+ .ls_det_st = { 0x0084, 0, 0, 0, 1 }, -+ .ls_det_clr = { 0x0088, 0, 0, 0, 1 }, -+ .utmi_ls = { 0x00c0, 10, 9, 0, 1 }, -+ } -+ }, -+ }, -+ { -+ .reg = 0x8000, -+ .port_cfgs = { -+ [USB2PHY_PORT_HOST] = { -+ .phy_sus = { 0x0008, 2, 2, 0, 1 }, -+ .ls_det_en = { 0x0080, 0, 0, 0, 1 }, -+ .ls_det_st = { 0x0084, 0, 0, 0, 1 }, -+ .ls_det_clr = { 0x0088, 0, 0, 0, 1 }, -+ .utmi_ls = { 0x00c0, 10, 9, 0, 1 }, -+ } -+ }, -+ }, -+ { -+ .reg = 0xc000, -+ .port_cfgs = { -+ [USB2PHY_PORT_HOST] = { -+ .phy_sus = { 0x0008, 2, 2, 0, 1 }, -+ .ls_det_en = { 0x0080, 0, 0, 0, 1 }, -+ .ls_det_st = { 0x0084, 0, 0, 0, 1 }, -+ .ls_det_clr = { 0x0088, 0, 0, 0, 1 }, -+ .utmi_ls = { 0x00c0, 10, 9, 0, 1 }, -+ } -+ }, -+ }, -+ { /* sentinel */ } -+}; -+ - static const struct udevice_id rockchip_usb2phy_ids[] = { - { - .compatible = "rockchip,rk3399-usb2phy", -@@ -357,6 +409,10 @@ static const struct udevice_id rockchip_usb2phy_ids[] = { - .compatible = "rockchip,rk3568-usb2phy", - .data = (ulong)&rk3568_phy_cfgs, - }, -+ { -+ .compatible = "rockchip,rk3588-usb2phy", -+ .data = (ulong)&rk3588_phy_cfgs, -+ }, - { /* sentinel */ } - }; - -diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c -index 78da5fe797..d5408ccac9 100644 ---- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c -+++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c -@@ -58,6 +58,7 @@ struct rockchip_combphy_grfcfg { - struct combphy_reg con2_for_sata; - struct combphy_reg con3_for_sata; - struct combphy_reg pipe_con0_for_sata; -+ struct combphy_reg pipe_con1_for_sata; - struct combphy_reg pipe_sgmii_mac_sel; - struct combphy_reg pipe_xpcs_phy_ready; - struct combphy_reg u3otg0_port_en; -@@ -76,7 +77,7 @@ struct rockchip_combphy_priv { - struct regmap *pipe_grf; - struct regmap *phy_grf; - struct phy *phy; -- struct reset_ctl phy_rst; -+ struct reset_ctl_bulk phy_rsts; - struct clk ref_clk; - const struct rockchip_combphy_cfg *cfg; - }; -@@ -189,7 +190,7 @@ static int rockchip_combphy_init(struct phy *phy) - if (ret) - goto err_clk; - -- reset_deassert(&priv->phy_rst); -+ reset_deassert_bulk(&priv->phy_rsts); - - return 0; - -@@ -204,7 +205,7 @@ static int rockchip_combphy_exit(struct phy *phy) - struct rockchip_combphy_priv *priv = dev_get_priv(phy->dev); - - clk_disable(&priv->ref_clk); -- reset_assert(&priv->phy_rst); -+ reset_assert_bulk(&priv->phy_rsts); - - return 0; - } -@@ -255,7 +256,7 @@ static int rockchip_combphy_parse_dt(struct udevice *dev, - return PTR_ERR(&priv->ref_clk); - } - -- ret = reset_get_by_index(dev, 0, &priv->phy_rst); -+ ret = reset_get_bulk(dev, &priv->phy_rsts); - if (ret) { - dev_err(dev, "no phy reset control specified\n"); - return ret; -@@ -423,11 +424,105 @@ static const struct rockchip_combphy_cfg rk3568_combphy_cfgs = { - .combphy_cfg = rk3568_combphy_cfg, - }; - -+static int rk3588_combphy_cfg(struct rockchip_combphy_priv *priv) -+{ -+ const struct rockchip_combphy_grfcfg *cfg = priv->cfg->grfcfg; -+ u32 val; -+ -+ switch (priv->mode) { -+ case PHY_TYPE_PCIE: -+ param_write(priv->phy_grf, &cfg->con0_for_pcie, true); -+ param_write(priv->phy_grf, &cfg->con1_for_pcie, true); -+ param_write(priv->phy_grf, &cfg->con2_for_pcie, true); -+ param_write(priv->phy_grf, &cfg->con3_for_pcie, true); -+ break; -+ case PHY_TYPE_USB3: -+ param_write(priv->phy_grf, &cfg->pipe_txcomp_sel, false); -+ param_write(priv->phy_grf, &cfg->pipe_txelec_sel, false); -+ param_write(priv->phy_grf, &cfg->usb_mode_set, true); -+ break; -+ case PHY_TYPE_SATA: -+ param_write(priv->phy_grf, &cfg->con0_for_sata, true); -+ param_write(priv->phy_grf, &cfg->con1_for_sata, true); -+ param_write(priv->phy_grf, &cfg->con2_for_sata, true); -+ param_write(priv->phy_grf, &cfg->con3_for_sata, true); -+ param_write(priv->pipe_grf, &cfg->pipe_con0_for_sata, true); -+ param_write(priv->pipe_grf, &cfg->pipe_con1_for_sata, true); -+ break; -+ case PHY_TYPE_SGMII: -+ case PHY_TYPE_QSGMII: -+ default: -+ dev_err(priv->dev, "incompatible PHY type\n"); -+ return -EINVAL; -+ } -+ -+ /* 100MHz refclock signal is good */ -+ clk_set_rate(&priv->ref_clk, 100000000); -+ param_write(priv->phy_grf, &cfg->pipe_clk_100m, true); -+ if (priv->mode == PHY_TYPE_PCIE) { -+ /* PLL KVCO tuning fine */ -+ val = readl(priv->mmio + (0x20 << 2)); -+ val &= ~GENMASK(4, 2); -+ val |= 0x4 << 2; -+ writel(val, priv->mmio + (0x20 << 2)); -+ -+ /* Set up rx_trim: PLL LPF C1 85pf R1 1.25kohm */ -+ val = 0x4c; -+ writel(val, priv->mmio + (0x1b << 2)); -+ -+ /* Set up su_trim: T3 */ -+ val = 0xb0; -+ writel(val, priv->mmio + (0xa << 2)); -+ val = 0x47; -+ writel(val, priv->mmio + (0xb << 2)); -+ val = 0x57; -+ writel(val, priv->mmio + (0xd << 2)); -+ } -+ -+ return 0; -+} -+ -+static const struct rockchip_combphy_grfcfg rk3588_combphy_grfcfgs = { -+ /* pipe-phy-grf */ -+ .pcie_mode_set = { 0x0000, 5, 0, 0x00, 0x11 }, -+ .usb_mode_set = { 0x0000, 5, 0, 0x00, 0x04 }, -+ .pipe_rxterm_set = { 0x0000, 12, 12, 0x00, 0x01 }, -+ .pipe_txelec_set = { 0x0004, 1, 1, 0x00, 0x01 }, -+ .pipe_txcomp_set = { 0x0004, 4, 4, 0x00, 0x01 }, -+ .pipe_clk_25m = { 0x0004, 14, 13, 0x00, 0x01 }, -+ .pipe_clk_100m = { 0x0004, 14, 13, 0x00, 0x02 }, -+ .pipe_rxterm_sel = { 0x0008, 8, 8, 0x00, 0x01 }, -+ .pipe_txelec_sel = { 0x0008, 12, 12, 0x00, 0x01 }, -+ .pipe_txcomp_sel = { 0x0008, 15, 15, 0x00, 0x01 }, -+ .pipe_clk_ext = { 0x000c, 9, 8, 0x02, 0x01 }, -+ .pipe_phy_status = { 0x0034, 6, 6, 0x01, 0x00 }, -+ .con0_for_pcie = { 0x0000, 15, 0, 0x00, 0x1000 }, -+ .con1_for_pcie = { 0x0004, 15, 0, 0x00, 0x0000 }, -+ .con2_for_pcie = { 0x0008, 15, 0, 0x00, 0x0101 }, -+ .con3_for_pcie = { 0x000c, 15, 0, 0x00, 0x0200 }, -+ .con0_for_sata = { 0x0000, 15, 0, 0x00, 0x0129 }, -+ .con1_for_sata = { 0x0004, 15, 0, 0x00, 0x0040 }, -+ .con2_for_sata = { 0x0008, 15, 0, 0x00, 0x80c1 }, -+ .con3_for_sata = { 0x000c, 15, 0, 0x00, 0x0407 }, -+ /* pipe-grf */ -+ .pipe_con0_for_sata = { 0x0000, 11, 5, 0x00, 0x22 }, -+ .pipe_con1_for_sata = { 0x0000, 2, 0, 0x00, 0x2 }, -+}; -+ -+static const struct rockchip_combphy_cfg rk3588_combphy_cfgs = { -+ .grfcfg = &rk3588_combphy_grfcfgs, -+ .combphy_cfg = rk3588_combphy_cfg, -+}; -+ - static const struct udevice_id rockchip_combphy_ids[] = { - { - .compatible = "rockchip,rk3568-naneng-combphy", - .data = (ulong)&rk3568_combphy_cfgs - }, -+ { -+ .compatible = "rockchip,rk3588-naneng-combphy", -+ .data = (ulong)&rk3588_combphy_cfgs -+ }, - { } - }; - -diff --git a/drivers/phy/socionext/Kconfig b/drivers/phy/socionext/Kconfig -index bcd579e98e..de87d5b010 100644 ---- a/drivers/phy/socionext/Kconfig -+++ b/drivers/phy/socionext/Kconfig -@@ -10,3 +10,11 @@ config PHY_UNIPHIER_PCIE - help - Enable this to support PHY implemented in PCIe controller - on UniPhier SoCs. -+ -+config PHY_UNIPHIER_USB3 -+ bool "UniPhier USB3 PHY driver" -+ depends on PHY && ARCH_UNIPHIER -+ imply REGMAP -+ help -+ Enable this to support PHY implemented in USB3 controller -+ on UniPhier SoCs. -diff --git a/drivers/phy/socionext/Makefile b/drivers/phy/socionext/Makefile -index 5484360b70..94d3aa68cf 100644 ---- a/drivers/phy/socionext/Makefile -+++ b/drivers/phy/socionext/Makefile -@@ -4,3 +4,4 @@ - # - - obj-$(CONFIG_PHY_UNIPHIER_PCIE) += phy-uniphier-pcie.o -+obj-$(CONFIG_PHY_UNIPHIER_USB3) += phy-uniphier-usb3.o -diff --git a/drivers/phy/socionext/phy-uniphier-usb3.c b/drivers/phy/socionext/phy-uniphier-usb3.c -new file mode 100644 -index 0000000000..1d65b0b08f ---- /dev/null -+++ b/drivers/phy/socionext/phy-uniphier-usb3.c -@@ -0,0 +1,168 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * phy_uniphier_usb3.c - Socionext UniPhier Usb3 PHY driver -+ * Copyright 2019-2023 Socionext, Inc. -+ */ -+ -+#include -+#include -+#include -+ -+#include -+#include -+ -+struct uniphier_usb3phy_priv { -+ struct clk *clk_link, *clk_phy, *clk_parent, *clk_phyext; -+ struct reset_ctl *rst_link, *rst_phy, *rst_parent; -+}; -+ -+static int uniphier_usb3phy_init(struct phy *phy) -+{ -+ struct uniphier_usb3phy_priv *priv = dev_get_priv(phy->dev); -+ int ret; -+ -+ ret = clk_enable(priv->clk_phy); -+ if (ret) -+ return ret; -+ -+ ret = reset_deassert(priv->rst_phy); -+ if (ret) -+ goto out_clk; -+ -+ if (priv->clk_phyext) { -+ ret = clk_enable(priv->clk_phyext); -+ if (ret) -+ goto out_rst; -+ } -+ -+ return 0; -+ -+out_rst: -+ reset_assert(priv->rst_phy); -+out_clk: -+ clk_disable(priv->clk_phy); -+ -+ return ret; -+} -+ -+static int uniphier_usb3phy_exit(struct phy *phy) -+{ -+ struct uniphier_usb3phy_priv *priv = dev_get_priv(phy->dev); -+ -+ if (priv->clk_phyext) -+ clk_disable(priv->clk_phyext); -+ -+ reset_assert(priv->rst_phy); -+ clk_disable(priv->clk_phy); -+ -+ return 0; -+} -+ -+static int uniphier_usb3phy_probe(struct udevice *dev) -+{ -+ struct uniphier_usb3phy_priv *priv = dev_get_priv(dev); -+ int ret; -+ -+ priv->clk_link = devm_clk_get(dev, "link"); -+ if (IS_ERR(priv->clk_link)) { -+ printf("Failed to get link clock\n"); -+ return PTR_ERR(priv->clk_link); -+ } -+ -+ priv->clk_phy = devm_clk_get(dev, "phy"); -+ if (IS_ERR(priv->clk_link)) { -+ printf("Failed to get phy clock\n"); -+ return PTR_ERR(priv->clk_link); -+ } -+ -+ priv->clk_parent = devm_clk_get_optional(dev, "gio"); -+ if (IS_ERR(priv->clk_parent)) { -+ printf("Failed to get parent clock\n"); -+ return PTR_ERR(priv->clk_parent); -+ } -+ -+ priv->clk_phyext = devm_clk_get_optional(dev, "phy-ext"); -+ if (IS_ERR(priv->clk_phyext)) { -+ printf("Failed to get external phy clock\n"); -+ return PTR_ERR(priv->clk_phyext); -+ } -+ -+ priv->rst_link = devm_reset_control_get(dev, "link"); -+ if (IS_ERR(priv->rst_link)) { -+ printf("Failed to get link reset\n"); -+ return PTR_ERR(priv->rst_link); -+ } -+ -+ priv->rst_phy = devm_reset_control_get(dev, "phy"); -+ if (IS_ERR(priv->rst_phy)) { -+ printf("Failed to get phy reset\n"); -+ return PTR_ERR(priv->rst_phy); -+ } -+ -+ priv->rst_parent = devm_reset_control_get_optional(dev, "gio"); -+ if (IS_ERR(priv->rst_parent)) { -+ printf("Failed to get parent reset\n"); -+ return PTR_ERR(priv->rst_parent); -+ } -+ -+ if (priv->clk_parent) { -+ ret = clk_enable(priv->clk_parent); -+ if (ret) -+ return ret; -+ } -+ if (priv->rst_parent) { -+ ret = reset_deassert(priv->rst_parent); -+ if (ret) -+ goto out_clk_parent; -+ } -+ -+ ret = clk_enable(priv->clk_link); -+ if (ret) -+ goto out_rst_parent; -+ -+ ret = reset_deassert(priv->rst_link); -+ if (ret) -+ goto out_clk; -+ -+ return 0; -+ -+out_clk: -+ clk_disable(priv->clk_link); -+out_rst_parent: -+ if (priv->rst_parent) -+ reset_assert(priv->rst_parent); -+out_clk_parent: -+ if (priv->clk_parent) -+ clk_disable(priv->clk_parent); -+ -+ return ret; -+} -+ -+static struct phy_ops uniphier_usb3phy_ops = { -+ .init = uniphier_usb3phy_init, -+ .exit = uniphier_usb3phy_exit, -+}; -+ -+static const struct udevice_id uniphier_usb3phy_ids[] = { -+ { .compatible = "socionext,uniphier-pro4-usb3-ssphy" }, -+ { .compatible = "socionext,uniphier-pro5-usb3-hsphy" }, -+ { .compatible = "socionext,uniphier-pro5-usb3-ssphy" }, -+ { .compatible = "socionext,uniphier-pxs2-usb3-hsphy" }, -+ { .compatible = "socionext,uniphier-pxs2-usb3-ssphy" }, -+ { .compatible = "socionext,uniphier-ld20-usb3-hsphy" }, -+ { .compatible = "socionext,uniphier-ld20-usb3-ssphy" }, -+ { .compatible = "socionext,uniphier-pxs3-usb3-hsphy" }, -+ { .compatible = "socionext,uniphier-pxs3-usb3-ssphy" }, -+ { .compatible = "socionext,uniphier-nx1-usb3-hsphy" }, -+ { .compatible = "socionext,uniphier-nx1-usb3-ssphy" }, -+ { } -+}; -+ -+U_BOOT_DRIVER(uniphier_usb3_phy) = { -+ .name = "uniphier-usb3-phy", -+ .id = UCLASS_PHY, -+ .of_match = uniphier_usb3phy_ids, -+ .ops = &uniphier_usb3phy_ops, -+ .probe = uniphier_usb3phy_probe, -+ .priv_auto = sizeof(struct uniphier_usb3phy_priv), -+}; -diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c -index 6646b15d41..23397175d3 100644 ---- a/drivers/phy/ti/phy-j721e-wiz.c -+++ b/drivers/phy/ti/phy-j721e-wiz.c -@@ -39,6 +39,7 @@ - #define WIZ_DIV_NUM_CLOCKS_10G 1 - - #define WIZ_SERDES_TYPEC_LN10_SWAP BIT(30) -+#define WIZ_SERDES_TYPEC_LN23_SWAP BIT(31) - - enum wiz_lane_standard_mode { - LANE_MODE_GEN1, -@@ -65,6 +66,14 @@ enum wiz_clock_input { - WIZ_EXT_REFCLK1, - }; - -+/* -+ * List of master lanes used for lane swapping -+ */ -+enum wiz_typec_master_lane { -+ LANE0 = 0, -+ LANE2 = 2, -+}; -+ - static const struct reg_field por_en = REG_FIELD(WIZ_SERDES_CTRL, 31, 31); - static const struct reg_field phy_reset_n = REG_FIELD(WIZ_SERDES_RST, 31, 31); - static const struct reg_field pll1_refclk_mux_sel = -@@ -329,6 +338,7 @@ struct wiz { - u32 num_lanes; - struct gpio_desc *gpio_typec_dir; - u32 lane_phy_type[WIZ_MAX_LANES]; -+ u32 master_lane_num[WIZ_MAX_LANES]; - struct clk *input_clks[WIZ_MAX_INPUT_CLOCKS]; - unsigned int id; - const struct wiz_data *data; -@@ -586,14 +596,42 @@ static int wiz_reset_deassert(struct reset_ctl *reset_ctl) - return ret; - - /* if typec-dir gpio was specified, set LN10 SWAP bit based on that */ -- if (id == 0 && wiz->gpio_typec_dir) { -- if (dm_gpio_get_value(wiz->gpio_typec_dir)) { -- regmap_update_bits(wiz->regmap, WIZ_SERDES_TYPEC, -- WIZ_SERDES_TYPEC_LN10_SWAP, -- WIZ_SERDES_TYPEC_LN10_SWAP); -- } else { -- regmap_update_bits(wiz->regmap, WIZ_SERDES_TYPEC, -- WIZ_SERDES_TYPEC_LN10_SWAP, 0); -+ if (id == 0) { -+ if (wiz->gpio_typec_dir) { -+ if (dm_gpio_get_value(wiz->gpio_typec_dir)) { -+ regmap_update_bits(wiz->regmap, WIZ_SERDES_TYPEC, -+ WIZ_SERDES_TYPEC_LN10_SWAP, -+ WIZ_SERDES_TYPEC_LN10_SWAP); -+ } else { -+ regmap_update_bits(wiz->regmap, WIZ_SERDES_TYPEC, -+ WIZ_SERDES_TYPEC_LN10_SWAP, 0); -+ } -+ } -+ } else { -+ /* if no typec-dir gpio was specified and PHY type is -+ * USB3 with master lane number is '0', set LN10 SWAP -+ * bit to '1' -+ */ -+ u32 num_lanes = wiz->num_lanes; -+ int i; -+ -+ for (i = 0; i < num_lanes; i++) { -+ if (wiz->lane_phy_type[i] == PHY_TYPE_USB3) { -+ switch (wiz->master_lane_num[i]) { -+ case LANE0: -+ regmap_update_bits(wiz->regmap, WIZ_SERDES_TYPEC, -+ WIZ_SERDES_TYPEC_LN10_SWAP, -+ WIZ_SERDES_TYPEC_LN10_SWAP); -+ break; -+ case LANE2: -+ regmap_update_bits(wiz->regmap, WIZ_SERDES_TYPEC, -+ WIZ_SERDES_TYPEC_LN23_SWAP, -+ WIZ_SERDES_TYPEC_LN23_SWAP); -+ break; -+ default: -+ break; -+ } -+ } - } - } - -@@ -1100,8 +1138,10 @@ static int wiz_get_lane_phy_types(struct udevice *dev, struct wiz *wiz) - dev_dbg(dev, "%s: Lanes %u-%u have phy-type %u\n", __func__, - reg, reg + num_lanes - 1, phy_type); - -- for (i = reg; i < reg + num_lanes; i++) -+ for (i = reg; i < reg + num_lanes; i++) { - wiz->lane_phy_type[i] = phy_type; -+ wiz->master_lane_num[i] = reg; -+ } - } - - return 0; -diff --git a/drivers/pinctrl/pinctrl-uclass.c b/drivers/pinctrl/pinctrl-uclass.c -index 8837726cc1..73dd7b1038 100644 ---- a/drivers/pinctrl/pinctrl-uclass.c -+++ b/drivers/pinctrl/pinctrl-uclass.c -@@ -169,34 +169,33 @@ pinctrl_gpio_get_pinctrl_and_offset(struct udevice *dev, unsigned offset, - { - struct ofnode_phandle_args args; - unsigned gpio_offset, pfc_base, pfc_pins; -- int ret; -+ int ret = 0; -+ int i = 0; - -- ret = dev_read_phandle_with_args(dev, "gpio-ranges", NULL, 3, -- 0, &args); -- if (ret) { -- dev_dbg(dev, "%s: dev_read_phandle_with_args: err=%d\n", -- __func__, ret); -- return ret; -- } -+ while (ret == 0) { -+ ret = dev_read_phandle_with_args(dev, "gpio-ranges", NULL, 3, -+ i++, &args); -+ if (ret) { -+ dev_dbg(dev, "%s: dev_read_phandle_with_args: err=%d\n", -+ __func__, ret); -+ return ret; -+ } - -- ret = uclass_get_device_by_ofnode(UCLASS_PINCTRL, -- args.node, pctldev); -- if (ret) { -- dev_dbg(dev, -- "%s: uclass_get_device_by_of_offset failed: err=%d\n", -- __func__, ret); -- return ret; -- } -+ ret = uclass_get_device_by_ofnode(UCLASS_PINCTRL, -+ args.node, pctldev); -+ if (ret) { -+ dev_dbg(dev, -+ "%s: uclass_get_device_by_of_offset failed: err=%d\n", -+ __func__, ret); -+ return ret; -+ } - -- gpio_offset = args.args[0]; -- pfc_base = args.args[1]; -- pfc_pins = args.args[2]; -+ gpio_offset = args.args[0]; -+ pfc_base = args.args[1]; -+ pfc_pins = args.args[2]; - -- if (offset < gpio_offset || offset > gpio_offset + pfc_pins) { -- dev_dbg(dev, -- "%s: GPIO can not be mapped to pincontrol pin\n", -- __func__); -- return -EINVAL; -+ if (offset >= gpio_offset && offset <= gpio_offset + pfc_pins) -+ break; - } - - offset -= gpio_offset; -diff --git a/drivers/pinctrl/rockchip/Makefile b/drivers/pinctrl/rockchip/Makefile -index 90461ae881..c91f650b04 100644 ---- a/drivers/pinctrl/rockchip/Makefile -+++ b/drivers/pinctrl/rockchip/Makefile -@@ -15,5 +15,6 @@ obj-$(CONFIG_ROCKCHIP_RK3328) += pinctrl-rk3328.o - obj-$(CONFIG_ROCKCHIP_RK3368) += pinctrl-rk3368.o - obj-$(CONFIG_ROCKCHIP_RK3399) += pinctrl-rk3399.o - obj-$(CONFIG_ROCKCHIP_RK3568) += pinctrl-rk3568.o -+obj-$(CONFIG_ROCKCHIP_RK3588) += pinctrl-rk3588.o - obj-$(CONFIG_ROCKCHIP_RV1108) += pinctrl-rv1108.o - obj-$(CONFIG_ROCKCHIP_RV1126) += pinctrl-rv1126.o -diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3588.c b/drivers/pinctrl/rockchip/pinctrl-rk3588.c -new file mode 100644 -index 0000000000..548cf09bcc ---- /dev/null -+++ b/drivers/pinctrl/rockchip/pinctrl-rk3588.c -@@ -0,0 +1,353 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include "pinctrl-rockchip.h" -+#include -+ -+static int rk3588_set_mux(struct rockchip_pin_bank *bank, int pin, int mux) -+{ -+ struct rockchip_pinctrl_priv *priv = bank->priv; -+ struct regmap *regmap; -+ int iomux_num = (pin / 8); -+ int reg, ret, mask; -+ u8 bit; -+ u32 data; -+ -+ debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux); -+ -+ regmap = priv->regmap_base; -+ reg = bank->iomux[iomux_num].offset; -+ if ((pin % 8) >= 4) -+ reg += 0x4; -+ bit = (pin % 4) * 4; -+ mask = 0xf; -+ -+ if (bank->bank_num == 0) { -+ if (pin >= RK_PB4 && pin <= RK_PD7) { -+ if (mux < 8) { -+ reg += 0x4000 - 0xC; /* PMU2_IOC_BASE */ -+ data = (mask << (bit + 16)); -+ data |= (mux & mask) << bit; -+ ret = regmap_write(regmap, reg, data); -+ } else { -+ u32 reg0 = 0; -+ -+ reg0 = reg + 0x4000 - 0xC; /* PMU2_IOC_BASE */ -+ data = (mask << (bit + 16)); -+ data |= 8 << bit; -+ ret = regmap_write(regmap, reg0, data); -+ -+ reg0 = reg + 0x8000; /* BUS_IOC_BASE */ -+ data = (mask << (bit + 16)); -+ data |= mux << bit; -+ regmap = priv->regmap_base; -+ regmap_write(regmap, reg0, data); -+ } -+ } else { -+ data = (mask << (bit + 16)); -+ data |= (mux & mask) << bit; -+ ret = regmap_write(regmap, reg, data); -+ } -+ return ret; -+ } else if (bank->bank_num > 0) { -+ reg += 0x8000; /* BUS_IOC_BASE */ -+ } -+ -+ data = (mask << (bit + 16)); -+ data |= (mux & mask) << bit; -+ -+ return regmap_write(regmap, reg, data); -+} -+ -+#define RK3588_PMU1_IOC_REG (0x0000) -+#define RK3588_PMU2_IOC_REG (0x4000) -+#define RK3588_BUS_IOC_REG (0x8000) -+#define RK3588_VCCIO1_4_IOC_REG (0x9000) -+#define RK3588_VCCIO3_5_IOC_REG (0xA000) -+#define RK3588_VCCIO2_IOC_REG (0xB000) -+#define RK3588_VCCIO6_IOC_REG (0xC000) -+#define RK3588_EMMC_IOC_REG (0xD000) -+ -+static const u32 rk3588_ds_regs[][2] = { -+ {RK_GPIO0_A0, RK3588_PMU1_IOC_REG + 0x0010}, -+ {RK_GPIO0_A4, RK3588_PMU1_IOC_REG + 0x0014}, -+ {RK_GPIO0_B0, RK3588_PMU1_IOC_REG + 0x0018}, -+ {RK_GPIO0_B4, RK3588_PMU2_IOC_REG + 0x0014}, -+ {RK_GPIO0_C0, RK3588_PMU2_IOC_REG + 0x0018}, -+ {RK_GPIO0_C4, RK3588_PMU2_IOC_REG + 0x001C}, -+ {RK_GPIO0_D0, RK3588_PMU2_IOC_REG + 0x0020}, -+ {RK_GPIO0_D4, RK3588_PMU2_IOC_REG + 0x0024}, -+ {RK_GPIO1_A0, RK3588_VCCIO1_4_IOC_REG + 0x0020}, -+ {RK_GPIO1_A4, RK3588_VCCIO1_4_IOC_REG + 0x0024}, -+ {RK_GPIO1_B0, RK3588_VCCIO1_4_IOC_REG + 0x0028}, -+ {RK_GPIO1_B4, RK3588_VCCIO1_4_IOC_REG + 0x002C}, -+ {RK_GPIO1_C0, RK3588_VCCIO1_4_IOC_REG + 0x0030}, -+ {RK_GPIO1_C4, RK3588_VCCIO1_4_IOC_REG + 0x0034}, -+ {RK_GPIO1_D0, RK3588_VCCIO1_4_IOC_REG + 0x0038}, -+ {RK_GPIO1_D4, RK3588_VCCIO1_4_IOC_REG + 0x003C}, -+ {RK_GPIO2_A0, RK3588_EMMC_IOC_REG + 0x0040}, -+ {RK_GPIO2_A4, RK3588_VCCIO3_5_IOC_REG + 0x0044}, -+ {RK_GPIO2_B0, RK3588_VCCIO3_5_IOC_REG + 0x0048}, -+ {RK_GPIO2_B4, RK3588_VCCIO3_5_IOC_REG + 0x004C}, -+ {RK_GPIO2_C0, RK3588_VCCIO3_5_IOC_REG + 0x0050}, -+ {RK_GPIO2_C4, RK3588_VCCIO3_5_IOC_REG + 0x0054}, -+ {RK_GPIO2_D0, RK3588_EMMC_IOC_REG + 0x0058}, -+ {RK_GPIO2_D4, RK3588_EMMC_IOC_REG + 0x005C}, -+ {RK_GPIO3_A0, RK3588_VCCIO3_5_IOC_REG + 0x0060}, -+ {RK_GPIO3_A4, RK3588_VCCIO3_5_IOC_REG + 0x0064}, -+ {RK_GPIO3_B0, RK3588_VCCIO3_5_IOC_REG + 0x0068}, -+ {RK_GPIO3_B4, RK3588_VCCIO3_5_IOC_REG + 0x006C}, -+ {RK_GPIO3_C0, RK3588_VCCIO3_5_IOC_REG + 0x0070}, -+ {RK_GPIO3_C4, RK3588_VCCIO3_5_IOC_REG + 0x0074}, -+ {RK_GPIO3_D0, RK3588_VCCIO3_5_IOC_REG + 0x0078}, -+ {RK_GPIO3_D4, RK3588_VCCIO3_5_IOC_REG + 0x007C}, -+ {RK_GPIO4_A0, RK3588_VCCIO6_IOC_REG + 0x0080}, -+ {RK_GPIO4_A4, RK3588_VCCIO6_IOC_REG + 0x0084}, -+ {RK_GPIO4_B0, RK3588_VCCIO6_IOC_REG + 0x0088}, -+ {RK_GPIO4_B4, RK3588_VCCIO6_IOC_REG + 0x008C}, -+ {RK_GPIO4_C0, RK3588_VCCIO6_IOC_REG + 0x0090}, -+ {RK_GPIO4_C2, RK3588_VCCIO3_5_IOC_REG + 0x0090}, -+ {RK_GPIO4_C4, RK3588_VCCIO3_5_IOC_REG + 0x0094}, -+ {RK_GPIO4_D0, RK3588_VCCIO2_IOC_REG + 0x0098}, -+ {RK_GPIO4_D4, RK3588_VCCIO2_IOC_REG + 0x009C}, -+}; -+ -+static const u32 rk3588_p_regs[][2] = { -+ {RK_GPIO0_A0, RK3588_PMU1_IOC_REG + 0x0020}, -+ {RK_GPIO0_B0, RK3588_PMU1_IOC_REG + 0x0024}, -+ {RK_GPIO0_B5, RK3588_PMU2_IOC_REG + 0x0028}, -+ {RK_GPIO0_C0, RK3588_PMU2_IOC_REG + 0x002C}, -+ {RK_GPIO0_D0, RK3588_PMU2_IOC_REG + 0x0030}, -+ {RK_GPIO1_A0, RK3588_VCCIO1_4_IOC_REG + 0x0110}, -+ {RK_GPIO1_B0, RK3588_VCCIO1_4_IOC_REG + 0x0114}, -+ {RK_GPIO1_C0, RK3588_VCCIO1_4_IOC_REG + 0x0118}, -+ {RK_GPIO1_D0, RK3588_VCCIO1_4_IOC_REG + 0x011C}, -+ {RK_GPIO2_A0, RK3588_EMMC_IOC_REG + 0x0120}, -+ {RK_GPIO2_A6, RK3588_VCCIO3_5_IOC_REG + 0x0120}, -+ {RK_GPIO2_B0, RK3588_VCCIO3_5_IOC_REG + 0x0124}, -+ {RK_GPIO2_C0, RK3588_VCCIO3_5_IOC_REG + 0x0128}, -+ {RK_GPIO2_D0, RK3588_EMMC_IOC_REG + 0x012C}, -+ {RK_GPIO3_A0, RK3588_VCCIO3_5_IOC_REG + 0x0130}, -+ {RK_GPIO3_B0, RK3588_VCCIO3_5_IOC_REG + 0x0134}, -+ {RK_GPIO3_C0, RK3588_VCCIO3_5_IOC_REG + 0x0138}, -+ {RK_GPIO3_D0, RK3588_VCCIO3_5_IOC_REG + 0x013C}, -+ {RK_GPIO4_A0, RK3588_VCCIO6_IOC_REG + 0x0140}, -+ {RK_GPIO4_B0, RK3588_VCCIO6_IOC_REG + 0x0144}, -+ {RK_GPIO4_C0, RK3588_VCCIO6_IOC_REG + 0x0148}, -+ {RK_GPIO4_C2, RK3588_VCCIO3_5_IOC_REG + 0x0148}, -+ {RK_GPIO4_D0, RK3588_VCCIO2_IOC_REG + 0x014C}, -+}; -+ -+static const u32 rk3588_smt_regs[][2] = { -+ {RK_GPIO0_A0, RK3588_PMU1_IOC_REG + 0x0030}, -+ {RK_GPIO0_B0, RK3588_PMU1_IOC_REG + 0x0034}, -+ {RK_GPIO0_B5, RK3588_PMU2_IOC_REG + 0x0040}, -+ {RK_GPIO0_C0, RK3588_PMU2_IOC_REG + 0x0044}, -+ {RK_GPIO0_D0, RK3588_PMU2_IOC_REG + 0x0048}, -+ {RK_GPIO1_A0, RK3588_VCCIO1_4_IOC_REG + 0x0210}, -+ {RK_GPIO1_B0, RK3588_VCCIO1_4_IOC_REG + 0x0214}, -+ {RK_GPIO1_C0, RK3588_VCCIO1_4_IOC_REG + 0x0218}, -+ {RK_GPIO1_D0, RK3588_VCCIO1_4_IOC_REG + 0x021C}, -+ {RK_GPIO2_A0, RK3588_EMMC_IOC_REG + 0x0220}, -+ {RK_GPIO2_A6, RK3588_VCCIO3_5_IOC_REG + 0x0220}, -+ {RK_GPIO2_B0, RK3588_VCCIO3_5_IOC_REG + 0x0224}, -+ {RK_GPIO2_C0, RK3588_VCCIO3_5_IOC_REG + 0x0228}, -+ {RK_GPIO2_D0, RK3588_EMMC_IOC_REG + 0x022C}, -+ {RK_GPIO3_A0, RK3588_VCCIO3_5_IOC_REG + 0x0230}, -+ {RK_GPIO3_B0, RK3588_VCCIO3_5_IOC_REG + 0x0234}, -+ {RK_GPIO3_C0, RK3588_VCCIO3_5_IOC_REG + 0x0238}, -+ {RK_GPIO3_D0, RK3588_VCCIO3_5_IOC_REG + 0x023C}, -+ {RK_GPIO4_A0, RK3588_VCCIO6_IOC_REG + 0x0240}, -+ {RK_GPIO4_B0, RK3588_VCCIO6_IOC_REG + 0x0244}, -+ {RK_GPIO4_C0, RK3588_VCCIO6_IOC_REG + 0x0248}, -+ {RK_GPIO4_C2, RK3588_VCCIO3_5_IOC_REG + 0x0248}, -+ {RK_GPIO4_D0, RK3588_VCCIO2_IOC_REG + 0x024C}, -+}; -+ -+#define RK3588_PULL_BITS_PER_PIN 2 -+#define RK3588_PULL_PINS_PER_REG 8 -+ -+static void rk3588_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, -+ int pin_num, struct regmap **regmap, -+ int *reg, u8 *bit) -+{ -+ struct rockchip_pinctrl_priv *info = bank->priv; -+ u8 bank_num = bank->bank_num; -+ u32 pin = bank_num * 32 + pin_num; -+ int i; -+ -+ for (i = ARRAY_SIZE(rk3588_p_regs) - 1; i >= 0; i--) { -+ if (pin >= rk3588_p_regs[i][0]) { -+ *reg = rk3588_p_regs[i][1]; -+ break; -+ } -+ } -+ -+ assert(i >= 0); -+ -+ *regmap = info->regmap_base; -+ *bit = pin_num % RK3588_PULL_PINS_PER_REG; -+ *bit *= RK3588_PULL_BITS_PER_PIN; -+} -+ -+#define RK3588_DRV_BITS_PER_PIN 4 -+#define RK3588_DRV_PINS_PER_REG 4 -+ -+static void rk3588_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, -+ int pin_num, struct regmap **regmap, -+ int *reg, u8 *bit) -+{ -+ struct rockchip_pinctrl_priv *info = bank->priv; -+ u8 bank_num = bank->bank_num; -+ u32 pin = bank_num * 32 + pin_num; -+ int i; -+ -+ for (i = ARRAY_SIZE(rk3588_ds_regs) - 1; i >= 0; i--) { -+ if (pin >= rk3588_ds_regs[i][0]) { -+ *reg = rk3588_ds_regs[i][1]; -+ break; -+ } -+ } -+ -+ assert(i >= 0); -+ -+ *regmap = info->regmap_base; -+ *bit = pin_num % RK3588_DRV_PINS_PER_REG; -+ *bit *= RK3588_DRV_BITS_PER_PIN; -+} -+ -+#define RK3588_SMT_BITS_PER_PIN 1 -+#define RK3588_SMT_PINS_PER_REG 8 -+ -+static int rk3588_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank, -+ int pin_num, struct regmap **regmap, -+ int *reg, u8 *bit) -+{ -+ struct rockchip_pinctrl_priv *info = bank->priv; -+ u8 bank_num = bank->bank_num; -+ u32 pin = bank_num * 32 + pin_num; -+ int i; -+ -+ for (i = ARRAY_SIZE(rk3588_smt_regs) - 1; i >= 0; i--) { -+ if (pin >= rk3588_smt_regs[i][0]) { -+ *reg = rk3588_smt_regs[i][1]; -+ break; -+ } -+ } -+ -+ assert(i >= 0); -+ -+ *regmap = info->regmap_base; -+ *bit = pin_num % RK3588_SMT_PINS_PER_REG; -+ *bit *= RK3588_SMT_BITS_PER_PIN; -+ -+ return 0; -+} -+ -+static int rk3588_set_pull(struct rockchip_pin_bank *bank, -+ int pin_num, int pull) -+{ -+ struct regmap *regmap; -+ int reg, translated_pull; -+ u8 bit, type; -+ u32 data; -+ -+ rk3588_calc_pull_reg_and_bit(bank, pin_num, ®map, ®, &bit); -+ type = bank->pull_type[pin_num / 8]; -+ translated_pull = rockchip_translate_pull_value(type, pull); -+ if (translated_pull < 0) { -+ debug("unsupported pull setting %d\n", pull); -+ return -EINVAL; -+ } -+ -+ /* enable the write to the equivalent lower bits */ -+ data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16); -+ data |= (translated_pull << bit); -+ -+ return regmap_write(regmap, reg, data); -+} -+ -+static int rk3588_set_drive(struct rockchip_pin_bank *bank, -+ int pin_num, int strength) -+{ -+ struct regmap *regmap; -+ int reg; -+ u32 data; -+ u8 bit; -+ -+ rk3588_calc_drv_reg_and_bit(bank, pin_num, ®map, ®, &bit); -+ -+ /* enable the write to the equivalent lower bits */ -+ data = ((1 << RK3588_DRV_BITS_PER_PIN) - 1) << (bit + 16); -+ data |= (strength << bit); -+ -+ return regmap_write(regmap, reg, data); -+} -+ -+static int rk3588_set_schmitt(struct rockchip_pin_bank *bank, -+ int pin_num, int enable) -+{ -+ struct regmap *regmap; -+ int reg; -+ u32 data; -+ u8 bit; -+ -+ rk3588_calc_schmitt_reg_and_bit(bank, pin_num, ®map, ®, &bit); -+ -+ /* enable the write to the equivalent lower bits */ -+ data = ((1 << RK3588_SMT_BITS_PER_PIN) - 1) << (bit + 16); -+ data |= (enable << bit); -+ -+ return regmap_write(regmap, reg, data); -+} -+ -+static struct rockchip_pin_bank rk3588_pin_banks[] = { -+ RK3588_PIN_BANK_FLAGS(0, 32, "gpio0", -+ IOMUX_WIDTH_4BIT, PULL_TYPE_IO_1V8_ONLY), -+ RK3588_PIN_BANK_FLAGS(1, 32, "gpio1", -+ IOMUX_WIDTH_4BIT, PULL_TYPE_IO_1V8_ONLY), -+ RK3588_PIN_BANK_FLAGS(2, 32, "gpio2", -+ IOMUX_WIDTH_4BIT, PULL_TYPE_IO_1V8_ONLY), -+ RK3588_PIN_BANK_FLAGS(3, 32, "gpio3", -+ IOMUX_WIDTH_4BIT, PULL_TYPE_IO_1V8_ONLY), -+ RK3588_PIN_BANK_FLAGS(4, 32, "gpio4", -+ IOMUX_WIDTH_4BIT, PULL_TYPE_IO_1V8_ONLY), -+}; -+ -+static const struct rockchip_pin_ctrl rk3588_pin_ctrl = { -+ .pin_banks = rk3588_pin_banks, -+ .nr_banks = ARRAY_SIZE(rk3588_pin_banks), -+ .nr_pins = 160, -+ .set_mux = rk3588_set_mux, -+ .set_pull = rk3588_set_pull, -+ .set_drive = rk3588_set_drive, -+ .set_schmitt = rk3588_set_schmitt, -+}; -+ -+static const struct udevice_id rk3588_pinctrl_ids[] = { -+ { -+ .compatible = "rockchip,rk3588-pinctrl", -+ .data = (ulong)&rk3588_pin_ctrl -+ }, -+ { } -+}; -+ -+U_BOOT_DRIVER(pinctrl_rk3588) = { -+ .name = "rockchip_rk3588_pinctrl", -+ .id = UCLASS_PINCTRL, -+ .of_match = rk3588_pinctrl_ids, -+ .priv_auto = sizeof(struct rockchip_pinctrl_priv), -+ .ops = &rockchip_pinctrl_ops, -+#if CONFIG_IS_ENABLED(OF_REAL) -+ .bind = dm_scan_fdt_dev, -+#endif -+ .probe = rockchip_pinctrl_probe, -+}; -diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip.h b/drivers/pinctrl/rockchip/pinctrl-rockchip.h -index 8dfaba5c74..df7bc684d2 100644 ---- a/drivers/pinctrl/rockchip/pinctrl-rockchip.h -+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip.h -@@ -9,6 +9,171 @@ - #include - #include - -+#define RK_GPIO0_A0 0 -+#define RK_GPIO0_A1 1 -+#define RK_GPIO0_A2 2 -+#define RK_GPIO0_A3 3 -+#define RK_GPIO0_A4 4 -+#define RK_GPIO0_A5 5 -+#define RK_GPIO0_A6 6 -+#define RK_GPIO0_A7 7 -+#define RK_GPIO0_B0 8 -+#define RK_GPIO0_B1 9 -+#define RK_GPIO0_B2 10 -+#define RK_GPIO0_B3 11 -+#define RK_GPIO0_B4 12 -+#define RK_GPIO0_B5 13 -+#define RK_GPIO0_B6 14 -+#define RK_GPIO0_B7 15 -+#define RK_GPIO0_C0 16 -+#define RK_GPIO0_C1 17 -+#define RK_GPIO0_C2 18 -+#define RK_GPIO0_C3 19 -+#define RK_GPIO0_C4 20 -+#define RK_GPIO0_C5 21 -+#define RK_GPIO0_C6 22 -+#define RK_GPIO0_C7 23 -+#define RK_GPIO0_D0 24 -+#define RK_GPIO0_D1 25 -+#define RK_GPIO0_D2 26 -+#define RK_GPIO0_D3 27 -+#define RK_GPIO0_D4 28 -+#define RK_GPIO0_D5 29 -+#define RK_GPIO0_D6 30 -+#define RK_GPIO0_D7 31 -+ -+#define RK_GPIO1_A0 32 -+#define RK_GPIO1_A1 33 -+#define RK_GPIO1_A2 34 -+#define RK_GPIO1_A3 35 -+#define RK_GPIO1_A4 36 -+#define RK_GPIO1_A5 37 -+#define RK_GPIO1_A6 38 -+#define RK_GPIO1_A7 39 -+#define RK_GPIO1_B0 40 -+#define RK_GPIO1_B1 41 -+#define RK_GPIO1_B2 42 -+#define RK_GPIO1_B3 43 -+#define RK_GPIO1_B4 44 -+#define RK_GPIO1_B5 45 -+#define RK_GPIO1_B6 46 -+#define RK_GPIO1_B7 47 -+#define RK_GPIO1_C0 48 -+#define RK_GPIO1_C1 49 -+#define RK_GPIO1_C2 50 -+#define RK_GPIO1_C3 51 -+#define RK_GPIO1_C4 52 -+#define RK_GPIO1_C5 53 -+#define RK_GPIO1_C6 54 -+#define RK_GPIO1_C7 55 -+#define RK_GPIO1_D0 56 -+#define RK_GPIO1_D1 57 -+#define RK_GPIO1_D2 58 -+#define RK_GPIO1_D3 59 -+#define RK_GPIO1_D4 60 -+#define RK_GPIO1_D5 61 -+#define RK_GPIO1_D6 62 -+#define RK_GPIO1_D7 63 -+ -+#define RK_GPIO2_A0 64 -+#define RK_GPIO2_A1 65 -+#define RK_GPIO2_A2 66 -+#define RK_GPIO2_A3 67 -+#define RK_GPIO2_A4 68 -+#define RK_GPIO2_A5 69 -+#define RK_GPIO2_A6 70 -+#define RK_GPIO2_A7 71 -+#define RK_GPIO2_B0 72 -+#define RK_GPIO2_B1 73 -+#define RK_GPIO2_B2 74 -+#define RK_GPIO2_B3 75 -+#define RK_GPIO2_B4 76 -+#define RK_GPIO2_B5 77 -+#define RK_GPIO2_B6 78 -+#define RK_GPIO2_B7 79 -+#define RK_GPIO2_C0 80 -+#define RK_GPIO2_C1 81 -+#define RK_GPIO2_C2 82 -+#define RK_GPIO2_C3 83 -+#define RK_GPIO2_C4 84 -+#define RK_GPIO2_C5 85 -+#define RK_GPIO2_C6 86 -+#define RK_GPIO2_C7 87 -+#define RK_GPIO2_D0 88 -+#define RK_GPIO2_D1 89 -+#define RK_GPIO2_D2 90 -+#define RK_GPIO2_D3 91 -+#define RK_GPIO2_D4 92 -+#define RK_GPIO2_D5 93 -+#define RK_GPIO2_D6 94 -+#define RK_GPIO2_D7 95 -+ -+#define RK_GPIO3_A0 96 -+#define RK_GPIO3_A1 97 -+#define RK_GPIO3_A2 98 -+#define RK_GPIO3_A3 99 -+#define RK_GPIO3_A4 100 -+#define RK_GPIO3_A5 101 -+#define RK_GPIO3_A6 102 -+#define RK_GPIO3_A7 103 -+#define RK_GPIO3_B0 104 -+#define RK_GPIO3_B1 105 -+#define RK_GPIO3_B2 106 -+#define RK_GPIO3_B3 107 -+#define RK_GPIO3_B4 108 -+#define RK_GPIO3_B5 109 -+#define RK_GPIO3_B6 110 -+#define RK_GPIO3_B7 111 -+#define RK_GPIO3_C0 112 -+#define RK_GPIO3_C1 113 -+#define RK_GPIO3_C2 114 -+#define RK_GPIO3_C3 115 -+#define RK_GPIO3_C4 116 -+#define RK_GPIO3_C5 117 -+#define RK_GPIO3_C6 118 -+#define RK_GPIO3_C7 119 -+#define RK_GPIO3_D0 120 -+#define RK_GPIO3_D1 121 -+#define RK_GPIO3_D2 122 -+#define RK_GPIO3_D3 123 -+#define RK_GPIO3_D4 124 -+#define RK_GPIO3_D5 125 -+#define RK_GPIO3_D6 126 -+#define RK_GPIO3_D7 127 -+ -+#define RK_GPIO4_A0 128 -+#define RK_GPIO4_A1 129 -+#define RK_GPIO4_A2 130 -+#define RK_GPIO4_A3 131 -+#define RK_GPIO4_A4 132 -+#define RK_GPIO4_A5 133 -+#define RK_GPIO4_A6 134 -+#define RK_GPIO4_A7 135 -+#define RK_GPIO4_B0 136 -+#define RK_GPIO4_B1 137 -+#define RK_GPIO4_B2 138 -+#define RK_GPIO4_B3 139 -+#define RK_GPIO4_B4 140 -+#define RK_GPIO4_B5 141 -+#define RK_GPIO4_B6 142 -+#define RK_GPIO4_B7 143 -+#define RK_GPIO4_C0 144 -+#define RK_GPIO4_C1 145 -+#define RK_GPIO4_C2 146 -+#define RK_GPIO4_C3 147 -+#define RK_GPIO4_C4 148 -+#define RK_GPIO4_C5 149 -+#define RK_GPIO4_C6 150 -+#define RK_GPIO4_C7 151 -+#define RK_GPIO4_D0 152 -+#define RK_GPIO4_D1 153 -+#define RK_GPIO4_D2 154 -+#define RK_GPIO4_D3 155 -+#define RK_GPIO4_D4 156 -+#define RK_GPIO4_D5 157 -+#define RK_GPIO4_D6 158 -+#define RK_GPIO4_D7 159 -+ - #define RK_GENMASK_VAL(h, l, v) \ - (GENMASK(((h) + 16), ((l) + 16)) | (((v) << (l)) & GENMASK((h), (l)))) - -@@ -180,6 +345,25 @@ struct rockchip_pin_bank { - }, \ - } - -+#define PIN_BANK_IOMUX_FLAGS_PULL_FLAGS(id, pins, label, iom0, iom1, \ -+ iom2, iom3, pull0, pull1, \ -+ pull2, pull3) \ -+ { \ -+ .bank_num = id, \ -+ .nr_pins = pins, \ -+ .name = label, \ -+ .iomux = { \ -+ { .type = iom0, .offset = -1 }, \ -+ { .type = iom1, .offset = -1 }, \ -+ { .type = iom2, .offset = -1 }, \ -+ { .type = iom3, .offset = -1 }, \ -+ }, \ -+ .pull_type[0] = pull0, \ -+ .pull_type[1] = pull1, \ -+ .pull_type[2] = pull2, \ -+ .pull_type[3] = pull3, \ -+ } -+ - #define PIN_BANK_DRV_FLAGS_PULL_FLAGS(id, pins, label, drv0, drv1, \ - drv2, drv3, pull0, pull1, \ - pull2, pull3) \ -@@ -274,6 +458,9 @@ struct rockchip_pin_bank { - #define MR_PMUGRF(ID, PIN, FUNC, REG, VAL) \ - PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, ROUTE_TYPE_PMUGRF) - -+#define RK3588_PIN_BANK_FLAGS(ID, PIN, LABEL, M, P) \ -+ PIN_BANK_IOMUX_FLAGS_PULL_FLAGS(ID, PIN, LABEL, M, M, M, M, P, P, P, P) -+ - /** - * struct rockchip_mux_recalced_data: recalculate a pin iomux data. - * @num: bank number. -diff --git a/drivers/power/pmic/pca9450.c b/drivers/power/pmic/pca9450.c -index 2427abfb7a..e99ece8fb0 100644 ---- a/drivers/power/pmic/pca9450.c -+++ b/drivers/power/pmic/pca9450.c -@@ -120,6 +120,7 @@ static const struct udevice_id pca9450_ids[] = { - { .compatible = "nxp,pca9450a", .data = NXP_CHIP_TYPE_PCA9450A, }, - { .compatible = "nxp,pca9450b", .data = NXP_CHIP_TYPE_PCA9450BC, }, - { .compatible = "nxp,pca9450c", .data = NXP_CHIP_TYPE_PCA9450BC, }, -+ { .compatible = "nxp,pca9451a", .data = NXP_CHIP_TYPE_PCA9451A, }, - { } - }; - -diff --git a/drivers/power/regulator/fan53555.c b/drivers/power/regulator/fan53555.c -index 5681206bba..815f96beef 100644 ---- a/drivers/power/regulator/fan53555.c -+++ b/drivers/power/regulator/fan53555.c -@@ -101,7 +101,7 @@ struct fan53555_priv { - - static int fan53555_regulator_of_to_plat(struct udevice *dev) - { -- struct fan53555_plat *dev_pdata = dev_get_plat(dev); -+ struct fan53555_plat *plat = dev_get_plat(dev); - struct dm_regulator_uclass_plat *uc_pdata = - dev_get_uclass_plat(dev); - u32 sleep_vsel; -@@ -118,12 +118,12 @@ static int fan53555_regulator_of_to_plat(struct udevice *dev) - */ - switch (sleep_vsel) { - case FAN53555_VSEL0: -- dev_pdata->sleep_reg = FAN53555_VSEL0; -- dev_pdata->vol_reg = FAN53555_VSEL1; -+ plat->sleep_reg = FAN53555_VSEL0; -+ plat->vol_reg = FAN53555_VSEL1; - break; - case FAN53555_VSEL1: -- dev_pdata->sleep_reg = FAN53555_VSEL1; -- dev_pdata->vol_reg = FAN53555_VSEL0; -+ plat->sleep_reg = FAN53555_VSEL1; -+ plat->vol_reg = FAN53555_VSEL0; - break; - default: - pr_err("%s: invalid vsel id %d\n", dev->name, sleep_vsel); -diff --git a/drivers/power/regulator/fixed.c b/drivers/power/regulator/fixed.c -index 90004d1601..ad3b4b98d6 100644 ---- a/drivers/power/regulator/fixed.c -+++ b/drivers/power/regulator/fixed.c -@@ -24,16 +24,16 @@ struct fixed_clock_regulator_plat { - static int fixed_regulator_of_to_plat(struct udevice *dev) - { - struct dm_regulator_uclass_plat *uc_pdata; -- struct regulator_common_plat *dev_pdata; -+ struct regulator_common_plat *plat; - -- dev_pdata = dev_get_plat(dev); -+ plat = dev_get_plat(dev); - uc_pdata = dev_get_uclass_plat(dev); - if (!uc_pdata) - return -ENXIO; - - uc_pdata->type = REGULATOR_TYPE_FIXED; - -- return regulator_common_of_to_plat(dev, dev_pdata, "gpio"); -+ return regulator_common_of_to_plat(dev, plat, "gpio"); - } - - static int fixed_regulator_get_value(struct udevice *dev) -@@ -88,7 +88,7 @@ static int fixed_clock_regulator_get_enable(struct udevice *dev) - static int fixed_clock_regulator_set_enable(struct udevice *dev, bool enable) - { - struct fixed_clock_regulator_plat *priv = dev_get_priv(dev); -- struct regulator_common_plat *dev_pdata = dev_get_plat(dev); -+ struct regulator_common_plat *plat = dev_get_plat(dev); - int ret = 0; - - if (enable) { -@@ -101,11 +101,11 @@ static int fixed_clock_regulator_set_enable(struct udevice *dev, bool enable) - if (ret) - return ret; - -- if (enable && dev_pdata->startup_delay_us) -- udelay(dev_pdata->startup_delay_us); -+ if (enable && plat->startup_delay_us) -+ udelay(plat->startup_delay_us); - -- if (!enable && dev_pdata->off_on_delay_us) -- udelay(dev_pdata->off_on_delay_us); -+ if (!enable && plat->off_on_delay_us) -+ udelay(plat->off_on_delay_us); - - return ret; - } -diff --git a/drivers/power/regulator/gpio-regulator.c b/drivers/power/regulator/gpio-regulator.c -index 9c0a68aa5a..ded7be059b 100644 ---- a/drivers/power/regulator/gpio-regulator.c -+++ b/drivers/power/regulator/gpio-regulator.c -@@ -27,12 +27,12 @@ struct gpio_regulator_plat { - static int gpio_regulator_of_to_plat(struct udevice *dev) - { - struct dm_regulator_uclass_plat *uc_pdata; -- struct gpio_regulator_plat *dev_pdata; -+ struct gpio_regulator_plat *plat; - struct gpio_desc *gpio; - int ret, count, i, j; - u32 states_array[GPIO_REGULATOR_MAX_STATES * 2]; - -- dev_pdata = dev_get_plat(dev); -+ plat = dev_get_plat(dev); - uc_pdata = dev_get_uclass_plat(dev); - if (!uc_pdata) - return -ENXIO; -@@ -47,7 +47,7 @@ static int gpio_regulator_of_to_plat(struct udevice *dev) - * per gpio-regulator. As of now no instance with multiple - * gpios is presnt - */ -- gpio = &dev_pdata->gpio; -+ gpio = &plat->gpio; - ret = gpio_request_by_name(dev, "gpios", 0, gpio, GPIOD_IS_OUT); - if (ret) - debug("regulator gpio - not found! Error: %d", ret); -@@ -68,21 +68,21 @@ static int gpio_regulator_of_to_plat(struct udevice *dev) - return ret; - - for (i = 0, j = 0; i < count; i += 2) { -- dev_pdata->voltages[j] = states_array[i]; -- dev_pdata->states[j] = states_array[i + 1]; -+ plat->voltages[j] = states_array[i]; -+ plat->states[j] = states_array[i + 1]; - j++; - } - -- return regulator_common_of_to_plat(dev, &dev_pdata->common, "enable-gpios"); -+ return regulator_common_of_to_plat(dev, &plat->common, "enable-gpios"); - } - - static int gpio_regulator_get_value(struct udevice *dev) - { - struct dm_regulator_uclass_plat *uc_pdata; -- struct gpio_regulator_plat *dev_pdata = dev_get_plat(dev); -+ struct gpio_regulator_plat *plat = dev_get_plat(dev); - int enable; - -- if (!dev_pdata->gpio.dev) -+ if (!plat->gpio.dev) - return -ENOSYS; - - uc_pdata = dev_get_uclass_plat(dev); -@@ -91,30 +91,30 @@ static int gpio_regulator_get_value(struct udevice *dev) - return -EINVAL; - } - -- enable = dm_gpio_get_value(&dev_pdata->gpio); -- if (enable == dev_pdata->states[0]) -- return dev_pdata->voltages[0]; -+ enable = dm_gpio_get_value(&plat->gpio); -+ if (enable == plat->states[0]) -+ return plat->voltages[0]; - else -- return dev_pdata->voltages[1]; -+ return plat->voltages[1]; - } - - static int gpio_regulator_set_value(struct udevice *dev, int uV) - { -- struct gpio_regulator_plat *dev_pdata = dev_get_plat(dev); -+ struct gpio_regulator_plat *plat = dev_get_plat(dev); - int ret; - bool enable; - -- if (!dev_pdata->gpio.dev) -+ if (!plat->gpio.dev) - return -ENOSYS; - -- if (uV == dev_pdata->voltages[0]) -- enable = dev_pdata->states[0]; -- else if (uV == dev_pdata->voltages[1]) -- enable = dev_pdata->states[1]; -+ if (uV == plat->voltages[0]) -+ enable = plat->states[0]; -+ else if (uV == plat->voltages[1]) -+ enable = plat->states[1]; - else - return -EINVAL; - -- ret = dm_gpio_set_value(&dev_pdata->gpio, enable); -+ ret = dm_gpio_set_value(&plat->gpio, enable); - if (ret) { - pr_err("Can't set regulator : %s gpio to: %d\n", dev->name, - enable); -@@ -126,14 +126,14 @@ static int gpio_regulator_set_value(struct udevice *dev, int uV) - - static int gpio_regulator_get_enable(struct udevice *dev) - { -- struct gpio_regulator_plat *dev_pdata = dev_get_plat(dev); -- return regulator_common_get_enable(dev, &dev_pdata->common); -+ struct gpio_regulator_plat *plat = dev_get_plat(dev); -+ return regulator_common_get_enable(dev, &plat->common); - } - - static int gpio_regulator_set_enable(struct udevice *dev, bool enable) - { -- struct gpio_regulator_plat *dev_pdata = dev_get_plat(dev); -- return regulator_common_set_enable(dev, &dev_pdata->common, enable); -+ struct gpio_regulator_plat *plat = dev_get_plat(dev); -+ return regulator_common_set_enable(dev, &plat->common, enable); - } - - static const struct dm_regulator_ops gpio_regulator_ops = { -diff --git a/drivers/power/regulator/pca9450.c b/drivers/power/regulator/pca9450.c -index fe1869397c..7ca20d1f7f 100644 ---- a/drivers/power/regulator/pca9450.c -+++ b/drivers/power/regulator/pca9450.c -@@ -276,7 +276,8 @@ static int pca9450_regulator_probe(struct udevice *dev) - - type = dev_get_driver_data(dev_get_parent(dev)); - -- if (type != NXP_CHIP_TYPE_PCA9450A && type != NXP_CHIP_TYPE_PCA9450BC) { -+ if (type != NXP_CHIP_TYPE_PCA9450A && type != NXP_CHIP_TYPE_PCA9450BC && -+ type != NXP_CHIP_TYPE_PCA9451A) { - debug("Unknown PMIC type\n"); - return -EINVAL; - } -@@ -291,6 +292,14 @@ static int pca9450_regulator_probe(struct udevice *dev) - continue; - } - -+ /* PCA9451A uses BUCK3 in dual-phase and don't have LDO2 and LDO3 */ -+ if (type == NXP_CHIP_TYPE_PCA9451A && -+ (!strcmp(pca9450_reg_data[i].name, "BUCK3") || -+ !strcmp(pca9450_reg_data[i].name, "LDO2") || -+ !strcmp(pca9450_reg_data[i].name, "LDO3"))) { -+ continue; -+ } -+ - *plat = pca9450_reg_data[i]; - - return 0; -diff --git a/drivers/power/regulator/regulator_common.c b/drivers/power/regulator/regulator_common.c -index 93d8196b38..e26f5ebec3 100644 ---- a/drivers/power/regulator/regulator_common.c -+++ b/drivers/power/regulator/regulator_common.c -@@ -13,7 +13,7 @@ - #include "regulator_common.h" - - int regulator_common_of_to_plat(struct udevice *dev, -- struct regulator_common_plat *dev_pdata, -+ struct regulator_common_plat *plat, - const char *enable_gpio_name) - { - struct gpio_desc *gpio; -@@ -26,7 +26,7 @@ int regulator_common_of_to_plat(struct udevice *dev, - flags |= GPIOD_IS_OUT_ACTIVE; - - /* Get optional enable GPIO desc */ -- gpio = &dev_pdata->gpio; -+ gpio = &plat->gpio; - ret = gpio_request_by_name(dev, enable_gpio_name, 0, gpio, flags); - if (ret) { - debug("Regulator '%s' optional enable GPIO - not found! Error: %d\n", -@@ -36,12 +36,11 @@ int regulator_common_of_to_plat(struct udevice *dev, - } - - /* Get optional ramp up delay */ -- dev_pdata->startup_delay_us = dev_read_u32_default(dev, -- "startup-delay-us", 0); -- dev_pdata->off_on_delay_us = -- dev_read_u32_default(dev, "off-on-delay-us", 0); -- if (!dev_pdata->off_on_delay_us) { -- dev_pdata->off_on_delay_us = -+ plat->startup_delay_us = dev_read_u32_default(dev, -+ "startup-delay-us", 0); -+ plat->off_on_delay_us = dev_read_u32_default(dev, "off-on-delay-us", 0); -+ if (!plat->off_on_delay_us) { -+ plat->off_on_delay_us = - dev_read_u32_default(dev, "u-boot,off-on-delay-us", 0); - } - -@@ -49,43 +48,65 @@ int regulator_common_of_to_plat(struct udevice *dev, - } - - int regulator_common_get_enable(const struct udevice *dev, -- struct regulator_common_plat *dev_pdata) -+ struct regulator_common_plat *plat) - { - /* Enable GPIO is optional */ -- if (!dev_pdata->gpio.dev) -+ if (!plat->gpio.dev) - return true; - -- return dm_gpio_get_value(&dev_pdata->gpio); -+ return dm_gpio_get_value(&plat->gpio); - } - - int regulator_common_set_enable(const struct udevice *dev, -- struct regulator_common_plat *dev_pdata, bool enable) -+ struct regulator_common_plat *plat, bool enable) - { - int ret; - - debug("%s: dev='%s', enable=%d, delay=%d, has_gpio=%d\n", __func__, -- dev->name, enable, dev_pdata->startup_delay_us, -- dm_gpio_is_valid(&dev_pdata->gpio)); -+ dev->name, enable, plat->startup_delay_us, -+ dm_gpio_is_valid(&plat->gpio)); - /* Enable GPIO is optional */ -- if (!dm_gpio_is_valid(&dev_pdata->gpio)) { -+ if (!dm_gpio_is_valid(&plat->gpio)) { - if (!enable) - return -ENOSYS; - return 0; - } - -- ret = dm_gpio_set_value(&dev_pdata->gpio, enable); -+ /* If previously enabled, increase count */ -+ if (enable && plat->enable_count > 0) { -+ plat->enable_count++; -+ return -EALREADY; -+ } -+ -+ if (!enable) { -+ if (plat->enable_count > 1) { -+ /* If enabled multiple times, decrease count */ -+ plat->enable_count--; -+ return -EBUSY; -+ } else if (!plat->enable_count) { -+ /* If already disabled, do nothing */ -+ return -EALREADY; -+ } -+ } -+ -+ ret = dm_gpio_set_value(&plat->gpio, enable); - if (ret) { - pr_err("Can't set regulator : %s gpio to: %d\n", dev->name, - enable); - return ret; - } - -- if (enable && dev_pdata->startup_delay_us) -- udelay(dev_pdata->startup_delay_us); -+ if (enable && plat->startup_delay_us) -+ udelay(plat->startup_delay_us); - debug("%s: done\n", __func__); - -- if (!enable && dev_pdata->off_on_delay_us) -- udelay(dev_pdata->off_on_delay_us); -+ if (!enable && plat->off_on_delay_us) -+ udelay(plat->off_on_delay_us); -+ -+ if (enable) -+ plat->enable_count++; -+ else -+ plat->enable_count--; - - return 0; - } -diff --git a/drivers/power/regulator/regulator_common.h b/drivers/power/regulator/regulator_common.h -index c10492f016..d4962899d8 100644 ---- a/drivers/power/regulator/regulator_common.h -+++ b/drivers/power/regulator/regulator_common.h -@@ -13,14 +13,35 @@ struct regulator_common_plat { - struct gpio_desc gpio; /* GPIO for regulator enable control */ - unsigned int startup_delay_us; - unsigned int off_on_delay_us; -+ unsigned int enable_count; - }; - - int regulator_common_of_to_plat(struct udevice *dev, -- struct regulator_common_plat *dev_pdata, const -+ struct regulator_common_plat *plat, const - char *enable_gpio_name); - int regulator_common_get_enable(const struct udevice *dev, -- struct regulator_common_plat *dev_pdata); -+ struct regulator_common_plat *plat); -+/* -+ * Enable or Disable a regulator -+ * -+ * This is a reentrant function and subsequent calls that enable will -+ * increase an internal counter, and disable calls will decrease the counter. -+ * The actual resource will be enabled when the counter gets to 1 coming from 0, -+ * and disabled when it reaches 0 coming from 1. -+ * -+ * @dev: regulator device -+ * @plat: Platform data -+ * @enable: bool indicating whether to enable or disable the regulator -+ * @return: -+ * 0 on Success -+ * -EBUSY if the regulator cannot be disabled because it's requested by -+ * another device -+ * -EALREADY if the regulator has already been enabled or has already been -+ * disabled -+ * -EACCES if there is no possibility to enable/disable the regulator -+ * -ve on different error situation -+ */ - int regulator_common_set_enable(const struct udevice *dev, -- struct regulator_common_plat *dev_pdata, bool enable); -+ struct regulator_common_plat *plat, bool enable); - - #endif /* _REGULATOR_COMMON_H */ -diff --git a/drivers/ram/aspeed/sdram_ast2600.c b/drivers/ram/aspeed/sdram_ast2600.c -index 1876755412..d463933363 100644 ---- a/drivers/ram/aspeed/sdram_ast2600.c -+++ b/drivers/ram/aspeed/sdram_ast2600.c -@@ -1089,13 +1089,13 @@ static int ast2600_sdrammc_probe(struct udevice *dev) - } - - reg = readl(&priv->scu->mpll); -- reg &= ~(SCU_PLL_BYPASS | SCU_PLL_DIV_MASK | -+ reg &= ~(SCU_PLL_BYPASS | SCU_PLL_OFF | SCU_PLL_DIV_MASK | - SCU_PLL_DENUM_MASK | SCU_PLL_NUM_MASK); -- reg |= (SCU_PLL_RST | SCU_PLL_OFF | SCU_MPLL_FREQ_CFG); -+ reg |= (SCU_PLL_RST | SCU_MPLL_FREQ_CFG); - writel(reg, &priv->scu->mpll); - writel(SCU_MPLL_EXT_CFG, &priv->scu->mpll_ext); - udelay(100); -- reg &= ~(SCU_PLL_RST | SCU_PLL_OFF); -+ reg &= ~SCU_PLL_RST; - writel(reg, &priv->scu->mpll); - - while ((readl(&priv->scu->mpll_ext) & BIT(31)) == 0) -diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile -index 6c8b45ecba..163022eb0b 100644 ---- a/drivers/reset/Makefile -+++ b/drivers/reset/Makefile -@@ -16,7 +16,7 @@ obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o - obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o - obj-$(CONFIG_RESET_AST2500) += reset-ast2500.o - obj-$(CONFIG_RESET_AST2600) += reset-ast2600.o --obj-$(CONFIG_RESET_ROCKCHIP) += reset-rockchip.o -+obj-$(CONFIG_RESET_ROCKCHIP) += reset-rockchip.o rst-rk3588.o - obj-$(CONFIG_RESET_MESON) += reset-meson.o - obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o - obj-$(CONFIG_RESET_MEDIATEK) += reset-mediatek.o -diff --git a/drivers/reset/reset-rockchip.c b/drivers/reset/reset-rockchip.c -index e0a95edd80..be256bf032 100644 ---- a/drivers/reset/reset-rockchip.c -+++ b/drivers/reset/reset-rockchip.c -@@ -21,6 +21,7 @@ - - struct rockchip_reset_priv { - void __iomem *base; -+ const int *lut; - /* Rockchip reset reg locate at cru controller */ - u32 reset_reg_offset; - /* Rockchip reset reg number */ -@@ -30,11 +31,15 @@ struct rockchip_reset_priv { - static int rockchip_reset_request(struct reset_ctl *reset_ctl) - { - struct rockchip_reset_priv *priv = dev_get_priv(reset_ctl->dev); -+ unsigned long id = reset_ctl->id; -+ -+ if (priv->lut) -+ id = priv->lut[id]; - - debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_num=%d)\n", __func__, -- reset_ctl, reset_ctl->dev, reset_ctl->id, priv->reset_reg_num); -+ reset_ctl, reset_ctl->dev, id, priv->reset_reg_num); - -- if (reset_ctl->id / ROCKCHIP_RESET_NUM_IN_REG >= priv->reset_reg_num) -+ if (id / ROCKCHIP_RESET_NUM_IN_REG >= priv->reset_reg_num) - return -EINVAL; - - return 0; -@@ -43,12 +48,17 @@ static int rockchip_reset_request(struct reset_ctl *reset_ctl) - static int rockchip_reset_assert(struct reset_ctl *reset_ctl) - { - struct rockchip_reset_priv *priv = dev_get_priv(reset_ctl->dev); -- int bank = reset_ctl->id / ROCKCHIP_RESET_NUM_IN_REG; -- int offset = reset_ctl->id % ROCKCHIP_RESET_NUM_IN_REG; -+ unsigned long id = reset_ctl->id; -+ int bank, offset; -+ -+ if (priv->lut) -+ id = priv->lut[id]; -+ -+ bank = id / ROCKCHIP_RESET_NUM_IN_REG; -+ offset = id % ROCKCHIP_RESET_NUM_IN_REG; - - debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_addr=%p)\n", __func__, -- reset_ctl, reset_ctl->dev, reset_ctl->id, -- priv->base + (bank * 4)); -+ reset_ctl, reset_ctl->dev, id, priv->base + (bank * 4)); - - rk_setreg(priv->base + (bank * 4), BIT(offset)); - -@@ -58,12 +68,17 @@ static int rockchip_reset_assert(struct reset_ctl *reset_ctl) - static int rockchip_reset_deassert(struct reset_ctl *reset_ctl) - { - struct rockchip_reset_priv *priv = dev_get_priv(reset_ctl->dev); -- int bank = reset_ctl->id / ROCKCHIP_RESET_NUM_IN_REG; -- int offset = reset_ctl->id % ROCKCHIP_RESET_NUM_IN_REG; -+ unsigned long id = reset_ctl->id; -+ int bank, offset; -+ -+ if (priv->lut) -+ id = priv->lut[id]; -+ -+ bank = id / ROCKCHIP_RESET_NUM_IN_REG; -+ offset = id % ROCKCHIP_RESET_NUM_IN_REG; - - debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_addr=%p)\n", __func__, -- reset_ctl, reset_ctl->dev, reset_ctl->id, -- priv->base + (bank * 4)); -+ reset_ctl, reset_ctl->dev, id, priv->base + (bank * 4)); - - rk_clrreg(priv->base + (bank * 4), BIT(offset)); - -@@ -98,7 +113,10 @@ static int rockchip_reset_probe(struct udevice *dev) - return 0; - } - --int rockchip_reset_bind(struct udevice *pdev, u32 reg_offset, u32 reg_number) -+int rockchip_reset_bind_lut(struct udevice *pdev, -+ const int *lookup_table, -+ u32 reg_offset, -+ u32 reg_number) - { - struct udevice *rst_dev; - struct rockchip_reset_priv *priv; -@@ -113,11 +131,17 @@ int rockchip_reset_bind(struct udevice *pdev, u32 reg_offset, u32 reg_number) - priv = malloc(sizeof(struct rockchip_reset_priv)); - priv->reset_reg_offset = reg_offset; - priv->reset_reg_num = reg_number; -+ priv->lut = lookup_table; - dev_set_priv(rst_dev, priv); - - return 0; - } - -+int rockchip_reset_bind(struct udevice *pdev, u32 reg_offset, u32 reg_number) -+{ -+ return rockchip_reset_bind_lut(pdev, NULL, reg_offset, reg_number); -+} -+ - U_BOOT_DRIVER(rockchip_reset) = { - .name = "rockchip_reset", - .id = UCLASS_RESET, -diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c -index 7adae51873..35e3ccebd7 100644 ---- a/drivers/reset/reset-uniphier.c -+++ b/drivers/reset/reset-uniphier.c -@@ -2,6 +2,7 @@ - /* - * Copyright (C) 2016 Socionext Inc. - * Author: Masahiro Yamada -+ * Author: Kunihiko Hayashi - */ - - #include -@@ -9,6 +10,8 @@ - #include - #include - #include -+#include -+#include - #include - #include - #include -@@ -178,10 +181,17 @@ static const struct uniphier_reset_data uniphier_pro4_peri_reset_data[] = { - UNIPHIER_RESET_END, - }; - -+/* Glue reset data */ -+static const struct uniphier_reset_data uniphier_pro4_usb3_reset_data[] = { -+ UNIPHIER_RESETX(15, 0, 15) -+}; -+ - /* core implementaton */ - struct uniphier_reset_priv { - void __iomem *base; - const struct uniphier_reset_data *data; -+ struct clk_bulk clks; -+ struct reset_ctl_bulk rsts; - }; - - static int uniphier_reset_update(struct reset_ctl *reset_ctl, int assert) -@@ -233,10 +243,47 @@ static const struct reset_ops uniphier_reset_ops = { - .rst_deassert = uniphier_reset_deassert, - }; - -+static int uniphier_reset_rst_init(struct udevice *dev) -+{ -+ struct uniphier_reset_priv *priv = dev_get_priv(dev); -+ int ret; -+ -+ ret = reset_get_bulk(dev, &priv->rsts); -+ if (ret == -ENOSYS || ret == -ENOENT) -+ return 0; -+ else if (ret) -+ return ret; -+ -+ ret = reset_deassert_bulk(&priv->rsts); -+ if (ret) -+ reset_release_bulk(&priv->rsts); -+ -+ return ret; -+} -+ -+static int uniphier_reset_clk_init(struct udevice *dev) -+{ -+ struct uniphier_reset_priv *priv = dev_get_priv(dev); -+ int ret; -+ -+ ret = clk_get_bulk(dev, &priv->clks); -+ if (ret == -ENOSYS || ret == -ENOENT) -+ return 0; -+ if (ret) -+ return ret; -+ -+ ret = clk_enable_bulk(&priv->clks); -+ if (ret) -+ clk_release_bulk(&priv->clks); -+ -+ return ret; -+} -+ - static int uniphier_reset_probe(struct udevice *dev) - { - struct uniphier_reset_priv *priv = dev_get_priv(dev); - fdt_addr_t addr; -+ int ret; - - addr = dev_read_addr(dev->parent); - if (addr == FDT_ADDR_T_NONE) -@@ -248,7 +295,11 @@ static int uniphier_reset_probe(struct udevice *dev) - - priv->data = (void *)dev_get_driver_data(dev); - -- return 0; -+ ret = uniphier_reset_clk_init(dev); -+ if (ret) -+ return ret; -+ -+ return uniphier_reset_rst_init(dev); - } - - static const struct udevice_id uniphier_reset_match[] = { -@@ -355,6 +406,31 @@ static const struct udevice_id uniphier_reset_match[] = { - .compatible = "socionext,uniphier-pxs3-peri-reset", - .data = (ulong)uniphier_pro4_peri_reset_data, - }, -+ /* USB glue reset */ -+ { -+ .compatible = "socionext,uniphier-pro4-usb3-reset", -+ .data = (ulong)uniphier_pro4_usb3_reset_data, -+ }, -+ { -+ .compatible = "socionext,uniphier-pro5-usb3-reset", -+ .data = (ulong)uniphier_pro4_usb3_reset_data, -+ }, -+ { -+ .compatible = "socionext,uniphier-pxs2-usb3-reset", -+ .data = (ulong)uniphier_pro4_usb3_reset_data, -+ }, -+ { -+ .compatible = "socionext,uniphier-ld20-usb3-reset", -+ .data = (ulong)uniphier_pro4_usb3_reset_data, -+ }, -+ { -+ .compatible = "socionext,uniphier-pxs3-usb3-reset", -+ .data = (ulong)uniphier_pro4_usb3_reset_data, -+ }, -+ { -+ .compatible = "socionext,uniphier-nx1-usb3-reset", -+ .data = (ulong)uniphier_pro4_usb3_reset_data, -+ }, - { /* sentinel */ } - }; - -diff --git a/drivers/reset/rst-rk3588.c b/drivers/reset/rst-rk3588.c -new file mode 100644 -index 0000000000..2c524e4c40 ---- /dev/null -+++ b/drivers/reset/rst-rk3588.c -@@ -0,0 +1,854 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later -+/* -+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd. -+ * Copyright (c) 2022 Collabora Ltd. -+ * Author: Sebastian Reichel -+ */ -+ -+#include -+#include -+#include -+#include -+ -+/* 0xFD7C0000 + 0x0A00 */ -+#define RK3588_CRU_RESET_OFFSET(id, reg, bit) [id] = (0 + reg * 16 + bit) -+ -+/* 0xFD7C8000 + 0x0A00 */ -+#define RK3588_PHPTOPCRU_RESET_OFFSET(id, reg, bit) [id] = (0x8000*4 + reg * 16 + bit) -+ -+/* 0xFD7D0000 + 0x0A00 */ -+#define RK3588_SECURECRU_RESET_OFFSET(id, reg, bit) [id] = (0x10000*4 + reg * 16 + bit) -+ -+/* 0xFD7F0000 + 0x0A00 */ -+#define RK3588_PMU1CRU_RESET_OFFSET(id, reg, bit) [id] = (0x30000*4 + reg * 16 + bit) -+ -+/* mapping table for reset ID to register offset */ -+static const int rk3588_register_offset[] = { -+ /* SOFTRST_CON01 */ -+ RK3588_CRU_RESET_OFFSET(SRST_A_TOP_BIU, 1, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_P_TOP_BIU, 1, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_P_CSIPHY0, 1, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_CSIPHY0, 1, 7), // missing in TRM -+ RK3588_CRU_RESET_OFFSET(SRST_P_CSIPHY1, 1, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_CSIPHY1, 1, 9), // missing in TRM -+ RK3588_CRU_RESET_OFFSET(SRST_A_TOP_M500_BIU, 1, 15), -+ -+ /* SOFTRST_CON02 */ -+ RK3588_CRU_RESET_OFFSET(SRST_A_TOP_M400_BIU, 2, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_A_TOP_S200_BIU, 2, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_A_TOP_S400_BIU, 2, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_A_TOP_M300_BIU, 2, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_USBDP_COMBO_PHY0_INIT, 2, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_USBDP_COMBO_PHY0_CMN, 2, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_USBDP_COMBO_PHY0_LANE, 2, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_USBDP_COMBO_PHY0_PCS, 2, 11), -+ RK3588_CRU_RESET_OFFSET(SRST_USBDP_COMBO_PHY1_INIT, 2, 15), -+ -+ /* SOFTRST_CON03 */ -+ RK3588_CRU_RESET_OFFSET(SRST_USBDP_COMBO_PHY1_CMN, 3, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_USBDP_COMBO_PHY1_LANE, 3, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_USBDP_COMBO_PHY1_PCS, 3, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_DCPHY0, 3, 11), // missing in TRM -+ RK3588_CRU_RESET_OFFSET(SRST_P_MIPI_DCPHY0, 3, 14), -+ RK3588_CRU_RESET_OFFSET(SRST_P_MIPI_DCPHY0_GRF, 3, 15), -+ -+ /* SOFTRST_CON04 */ -+ RK3588_CRU_RESET_OFFSET(SRST_DCPHY1, 4, 0), // missing in TRM -+ RK3588_CRU_RESET_OFFSET(SRST_P_MIPI_DCPHY1, 4, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_P_MIPI_DCPHY1_GRF, 4, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_P_APB2ASB_SLV_CDPHY, 4, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_P_APB2ASB_SLV_CSIPHY, 4, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_P_APB2ASB_SLV_VCCIO3_5, 4, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_P_APB2ASB_SLV_VCCIO6, 4, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_P_APB2ASB_SLV_EMMCIO, 4, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_P_APB2ASB_SLV_IOC_TOP, 4, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_P_APB2ASB_SLV_IOC_RIGHT, 4, 11), -+ -+ /* SOFTRST_CON05 */ -+ RK3588_CRU_RESET_OFFSET(SRST_P_CRU, 5, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_A_CHANNEL_SECURE2VO1USB, 5, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_A_CHANNEL_SECURE2CENTER, 5, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_H_CHANNEL_SECURE2VO1USB, 5, 14), -+ RK3588_CRU_RESET_OFFSET(SRST_H_CHANNEL_SECURE2CENTER, 5, 15), -+ -+ /* SOFTRST_CON06 */ -+ RK3588_CRU_RESET_OFFSET(SRST_P_CHANNEL_SECURE2VO1USB, 6, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_P_CHANNEL_SECURE2CENTER, 6, 1), -+ -+ /* SOFTRST_CON07 */ -+ RK3588_CRU_RESET_OFFSET(SRST_H_AUDIO_BIU, 7, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_P_AUDIO_BIU, 7, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_H_I2S0_8CH, 7, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_M_I2S0_8CH_TX, 7, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_M_I2S0_8CH_RX, 7, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_P_ACDCDIG, 7, 11), -+ RK3588_CRU_RESET_OFFSET(SRST_H_I2S2_2CH, 7, 12), -+ RK3588_CRU_RESET_OFFSET(SRST_H_I2S3_2CH, 7, 13), -+ -+ /* SOFTRST_CON08 */ -+ RK3588_CRU_RESET_OFFSET(SRST_M_I2S2_2CH, 8, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_M_I2S3_2CH, 8, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_DAC_ACDCDIG, 8, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_H_SPDIF0, 8, 14), -+ -+ /* SOFTRST_CON09 */ -+ RK3588_CRU_RESET_OFFSET(SRST_M_SPDIF0, 9, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_H_SPDIF1, 9, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_M_SPDIF1, 9, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_H_PDM1, 9, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_PDM1, 9, 7), -+ -+ /* SOFTRST_CON10 */ -+ RK3588_CRU_RESET_OFFSET(SRST_A_BUS_BIU, 10, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_P_BUS_BIU, 10, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_A_GIC, 10, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_A_GIC_DBG, 10, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DMAC0, 10, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DMAC1, 10, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DMAC2, 10, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_P_I2C1, 10, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_P_I2C2, 10, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_P_I2C3, 10, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_P_I2C4, 10, 11), -+ RK3588_CRU_RESET_OFFSET(SRST_P_I2C5, 10, 12), -+ RK3588_CRU_RESET_OFFSET(SRST_P_I2C6, 10, 13), -+ RK3588_CRU_RESET_OFFSET(SRST_P_I2C7, 10, 14), -+ RK3588_CRU_RESET_OFFSET(SRST_P_I2C8, 10, 15), -+ -+ /* SOFTRST_CON11 */ -+ RK3588_CRU_RESET_OFFSET(SRST_I2C1, 11, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_I2C2, 11, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_I2C3, 11, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_I2C4, 11, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_I2C5, 11, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_I2C6, 11, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_I2C7, 11, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_I2C8, 11, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_P_CAN0, 11, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_CAN0, 11, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_P_CAN1, 11, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_CAN1, 11, 11), -+ RK3588_CRU_RESET_OFFSET(SRST_P_CAN2, 11, 12), -+ RK3588_CRU_RESET_OFFSET(SRST_CAN2, 11, 13), -+ RK3588_CRU_RESET_OFFSET(SRST_P_SARADC, 11, 14), -+ -+ /* SOFTRST_CON12 */ -+ RK3588_CRU_RESET_OFFSET(SRST_P_TSADC, 12, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_TSADC, 12, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_P_UART1, 12, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_P_UART2, 12, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_P_UART3, 12, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_P_UART4, 12, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_P_UART5, 12, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_P_UART6, 12, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_P_UART7, 12, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_P_UART8, 12, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_P_UART9, 12, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_S_UART1, 12, 13), -+ -+ /* SOFTRST_CON13 */ -+ RK3588_CRU_RESET_OFFSET(SRST_S_UART2, 13, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_S_UART3, 13, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_S_UART4, 13, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_S_UART5, 13, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_S_UART6, 13, 12), -+ RK3588_CRU_RESET_OFFSET(SRST_S_UART7, 13, 15), -+ -+ /* SOFTRST_CON14 */ -+ RK3588_CRU_RESET_OFFSET(SRST_S_UART8, 14, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_S_UART9, 14, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_P_SPI0, 14, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_P_SPI1, 14, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_P_SPI2, 14, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_P_SPI3, 14, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_P_SPI4, 14, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_SPI0, 14, 11), -+ RK3588_CRU_RESET_OFFSET(SRST_SPI1, 14, 12), -+ RK3588_CRU_RESET_OFFSET(SRST_SPI2, 14, 13), -+ RK3588_CRU_RESET_OFFSET(SRST_SPI3, 14, 14), -+ RK3588_CRU_RESET_OFFSET(SRST_SPI4, 14, 15), -+ -+ /* SOFTRST_CON15 */ -+ RK3588_CRU_RESET_OFFSET(SRST_P_WDT0, 15, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_T_WDT0, 15, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_P_SYS_GRF, 15, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_P_PWM1, 15, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_PWM1, 15, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_P_PWM2, 15, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_PWM2, 15, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_P_PWM3, 15, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_PWM3, 15, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_P_BUSTIMER0, 15, 12), -+ RK3588_CRU_RESET_OFFSET(SRST_P_BUSTIMER1, 15, 13), -+ RK3588_CRU_RESET_OFFSET(SRST_BUSTIMER0, 15, 15), -+ -+ /* SOFTRST_CON16 */ -+ RK3588_CRU_RESET_OFFSET(SRST_BUSTIMER1, 16, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_BUSTIMER2, 16, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_BUSTIMER3, 16, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_BUSTIMER4, 16, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_BUSTIMER5, 16, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_BUSTIMER6, 16, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_BUSTIMER7, 16, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_BUSTIMER8, 16, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_BUSTIMER9, 16, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_BUSTIMER10, 16, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_BUSTIMER11, 16, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_P_MAILBOX0, 16, 11), -+ RK3588_CRU_RESET_OFFSET(SRST_P_MAILBOX1, 16, 12), -+ RK3588_CRU_RESET_OFFSET(SRST_P_MAILBOX2, 16, 13), -+ RK3588_CRU_RESET_OFFSET(SRST_P_GPIO1, 16, 14), -+ RK3588_CRU_RESET_OFFSET(SRST_GPIO1, 16, 15), -+ -+ /* SOFTRST_CON17 */ -+ RK3588_CRU_RESET_OFFSET(SRST_P_GPIO2, 17, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_GPIO2, 17, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_P_GPIO3, 17, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_GPIO3, 17, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_P_GPIO4, 17, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_GPIO4, 17, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DECOM, 17, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_P_DECOM, 17, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_D_DECOM, 17, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_P_TOP, 17, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_A_GICADB_GIC2CORE_BUS, 17, 11), -+ RK3588_CRU_RESET_OFFSET(SRST_P_DFT2APB, 17, 12), -+ RK3588_CRU_RESET_OFFSET(SRST_P_APB2ASB_MST_TOP, 17, 13), -+ RK3588_CRU_RESET_OFFSET(SRST_P_APB2ASB_MST_CDPHY, 17, 14), -+ RK3588_CRU_RESET_OFFSET(SRST_P_APB2ASB_MST_BOT_RIGHT, 17, 15), -+ -+ /* SOFTRST_CON18 */ -+ RK3588_CRU_RESET_OFFSET(SRST_P_APB2ASB_MST_IOC_TOP, 18, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_P_APB2ASB_MST_IOC_RIGHT, 18, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_P_APB2ASB_MST_CSIPHY, 18, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_P_APB2ASB_MST_VCCIO3_5, 18, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_P_APB2ASB_MST_VCCIO6, 18, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_P_APB2ASB_MST_EMMCIO, 18, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_A_SPINLOCK, 18, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_P_OTPC_NS, 18, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_OTPC_NS, 18, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_OTPC_ARB, 18, 11), -+ -+ /* SOFTRST_CON19 */ -+ RK3588_CRU_RESET_OFFSET(SRST_P_BUSIOC, 19, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_P_PMUCM0_INTMUX, 19, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_P_DDRCM0_INTMUX, 19, 5), -+ -+ /* SOFTRST_CON20 */ -+ RK3588_CRU_RESET_OFFSET(SRST_P_DDR_DFICTL_CH0, 20, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_P_DDR_MON_CH0, 20, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_P_DDR_STANDBY_CH0, 20, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_P_DDR_UPCTL_CH0, 20, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_TM_DDR_MON_CH0, 20, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_P_DDR_GRF_CH01, 20, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_DFI_CH0, 20, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_SBR_CH0, 20, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_DDR_UPCTL_CH0, 20, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_DDR_DFICTL_CH0, 20, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_DDR_MON_CH0, 20, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_DDR_STANDBY_CH0, 20, 11), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR_UPCTL_CH0, 20, 12), -+ RK3588_CRU_RESET_OFFSET(SRST_P_DDR_DFICTL_CH1, 20, 13), -+ RK3588_CRU_RESET_OFFSET(SRST_P_DDR_MON_CH1, 20, 14), -+ RK3588_CRU_RESET_OFFSET(SRST_P_DDR_STANDBY_CH1, 20, 15), -+ -+ /* SOFTRST_CON21 */ -+ RK3588_CRU_RESET_OFFSET(SRST_P_DDR_UPCTL_CH1, 21, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_TM_DDR_MON_CH1, 21, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_DFI_CH1, 21, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_SBR_CH1, 21, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_DDR_UPCTL_CH1, 21, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_DDR_DFICTL_CH1, 21, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_DDR_MON_CH1, 21, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_DDR_STANDBY_CH1, 21, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR_UPCTL_CH1, 21, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR01_MSCH0, 21, 13), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR01_RS_MSCH0, 21, 14), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR01_FRS_MSCH0, 21, 15), -+ -+ /* SOFTRST_CON22 */ -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR01_SCRAMBLE0, 22, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR01_FRS_SCRAMBLE0, 22, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR01_MSCH1, 22, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR01_RS_MSCH1, 22, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR01_FRS_MSCH1, 22, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR01_SCRAMBLE1, 22, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR01_FRS_SCRAMBLE1, 22, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_P_DDR01_MSCH0, 22, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_P_DDR01_MSCH1, 22, 8), -+ -+ /* SOFTRST_CON23 */ -+ RK3588_CRU_RESET_OFFSET(SRST_P_DDR_DFICTL_CH2, 23, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_P_DDR_MON_CH2, 23, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_P_DDR_STANDBY_CH2, 23, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_P_DDR_UPCTL_CH2, 23, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_TM_DDR_MON_CH2, 23, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_P_DDR_GRF_CH23, 23, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_DFI_CH2, 23, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_SBR_CH2, 23, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_DDR_UPCTL_CH2, 23, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_DDR_DFICTL_CH2, 23, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_DDR_MON_CH2, 23, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_DDR_STANDBY_CH2, 23, 11), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR_UPCTL_CH2, 23, 12), -+ RK3588_CRU_RESET_OFFSET(SRST_P_DDR_DFICTL_CH3, 23, 13), -+ RK3588_CRU_RESET_OFFSET(SRST_P_DDR_MON_CH3, 23, 14), -+ RK3588_CRU_RESET_OFFSET(SRST_P_DDR_STANDBY_CH3, 23, 15), -+ -+ /* SOFTRST_CON24 */ -+ RK3588_CRU_RESET_OFFSET(SRST_P_DDR_UPCTL_CH3, 24, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_TM_DDR_MON_CH3, 24, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_DFI_CH3, 24, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_SBR_CH3, 24, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_DDR_UPCTL_CH3, 24, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_DDR_DFICTL_CH3, 24, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_DDR_MON_CH3, 24, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_DDR_STANDBY_CH3, 24, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR_UPCTL_CH3, 24, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR23_MSCH2, 24, 13), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR23_RS_MSCH2, 24, 14), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR23_FRS_MSCH2, 24, 15), -+ -+ /* SOFTRST_CON25 */ -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR23_SCRAMBLE2, 25, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR23_FRS_SCRAMBLE2, 25, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR23_MSCH3, 25, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR23_RS_MSCH3, 25, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR23_FRS_MSCH3, 25, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR23_SCRAMBLE3, 25, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR23_FRS_SCRAMBLE3, 25, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_P_DDR23_MSCH2, 25, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_P_DDR23_MSCH3, 25, 8), -+ -+ /* SOFTRST_CON26 */ -+ RK3588_CRU_RESET_OFFSET(SRST_ISP1, 26, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_ISP1_VICAP, 26, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_A_ISP1_BIU, 26, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_H_ISP1_BIU, 26, 8), -+ -+ /* SOFTRST_CON27 */ -+ RK3588_CRU_RESET_OFFSET(SRST_A_RKNN1, 27, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_A_RKNN1_BIU, 27, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_H_RKNN1, 27, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_H_RKNN1_BIU, 27, 3), -+ -+ /* SOFTRST_CON28 */ -+ RK3588_CRU_RESET_OFFSET(SRST_A_RKNN2, 28, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_A_RKNN2_BIU, 28, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_H_RKNN2, 28, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_H_RKNN2_BIU, 28, 3), -+ -+ /* SOFTRST_CON29 */ -+ RK3588_CRU_RESET_OFFSET(SRST_A_RKNN_DSU0, 29, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_P_NPUTOP_BIU, 29, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_P_NPU_TIMER, 29, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_NPUTIMER0, 29, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_NPUTIMER1, 29, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_P_NPU_WDT, 29, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_T_NPU_WDT, 29, 11), -+ RK3588_CRU_RESET_OFFSET(SRST_P_NPU_PVTM, 29, 12), -+ RK3588_CRU_RESET_OFFSET(SRST_P_NPU_GRF, 29, 13), -+ RK3588_CRU_RESET_OFFSET(SRST_NPU_PVTM, 29, 14), -+ -+ /* SOFTRST_CON30 */ -+ RK3588_CRU_RESET_OFFSET(SRST_NPU_PVTPLL, 30, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_H_NPU_CM0_BIU, 30, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_F_NPU_CM0_CORE, 30, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_T_NPU_CM0_JTAG, 30, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_A_RKNN0, 30, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_A_RKNN0_BIU, 30, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_H_RKNN0, 30, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_H_RKNN0_BIU, 30, 9), -+ -+ /* SOFTRST_CON31 */ -+ RK3588_CRU_RESET_OFFSET(SRST_H_NVM_BIU, 31, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_A_NVM_BIU, 31, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_H_EMMC, 31, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_A_EMMC, 31, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_C_EMMC, 31, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_B_EMMC, 31, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_T_EMMC, 31, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_S_SFC, 31, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_H_SFC, 31, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_H_SFC_XIP, 31, 11), -+ -+ /* SOFTRST_CON32 */ -+ RK3588_CRU_RESET_OFFSET(SRST_P_GRF, 32, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_P_DEC_BIU, 32, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_P_PHP_BIU, 32, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_A_PCIE_GRIDGE, 32, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_A_PHP_BIU, 32, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_A_GMAC0, 32, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_A_GMAC1, 32, 11), -+ RK3588_CRU_RESET_OFFSET(SRST_A_PCIE_BIU, 32, 12), -+ RK3588_CRU_RESET_OFFSET(SRST_PCIE0_POWER_UP, 32, 13), -+ RK3588_CRU_RESET_OFFSET(SRST_PCIE1_POWER_UP, 32, 14), -+ RK3588_CRU_RESET_OFFSET(SRST_PCIE2_POWER_UP, 32, 15), -+ -+ /* SOFTRST_CON33 */ -+ RK3588_CRU_RESET_OFFSET(SRST_PCIE3_POWER_UP, 33, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_PCIE4_POWER_UP, 33, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_P_PCIE0, 33, 12), -+ RK3588_CRU_RESET_OFFSET(SRST_P_PCIE1, 33, 13), -+ RK3588_CRU_RESET_OFFSET(SRST_P_PCIE2, 33, 14), -+ RK3588_CRU_RESET_OFFSET(SRST_P_PCIE3, 33, 15), -+ -+ /* SOFTRST_CON34 */ -+ RK3588_CRU_RESET_OFFSET(SRST_P_PCIE4, 34, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_A_PHP_GIC_ITS, 34, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_A_MMU_PCIE, 34, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_A_MMU_PHP, 34, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_A_MMU_BIU, 34, 9), -+ -+ /* SOFTRST_CON35 */ -+ RK3588_CRU_RESET_OFFSET(SRST_A_USB3OTG2, 35, 7), -+ -+ /* SOFTRST_CON37 */ -+ RK3588_CRU_RESET_OFFSET(SRST_PMALIVE0, 37, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_PMALIVE1, 37, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_PMALIVE2, 37, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_A_SATA0, 37, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_A_SATA1, 37, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_A_SATA2, 37, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_RXOOB0, 37, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_RXOOB1, 37, 11), -+ RK3588_CRU_RESET_OFFSET(SRST_RXOOB2, 37, 12), -+ RK3588_CRU_RESET_OFFSET(SRST_ASIC0, 37, 13), -+ RK3588_CRU_RESET_OFFSET(SRST_ASIC1, 37, 14), -+ RK3588_CRU_RESET_OFFSET(SRST_ASIC2, 37, 15), -+ -+ /* SOFTRST_CON40 */ -+ RK3588_CRU_RESET_OFFSET(SRST_A_RKVDEC_CCU, 40, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_H_RKVDEC0, 40, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_A_RKVDEC0, 40, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_H_RKVDEC0_BIU, 40, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_A_RKVDEC0_BIU, 40, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_RKVDEC0_CA, 40, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_RKVDEC0_HEVC_CA, 40, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_RKVDEC0_CORE, 40, 9), -+ -+ /* SOFTRST_CON41 */ -+ RK3588_CRU_RESET_OFFSET(SRST_H_RKVDEC1, 41, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_A_RKVDEC1, 41, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_H_RKVDEC1_BIU, 41, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_A_RKVDEC1_BIU, 41, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_RKVDEC1_CA, 41, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_RKVDEC1_HEVC_CA, 41, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_RKVDEC1_CORE, 41, 8), -+ -+ /* SOFTRST_CON42 */ -+ RK3588_CRU_RESET_OFFSET(SRST_A_USB_BIU, 42, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_H_USB_BIU, 42, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_A_USB3OTG0, 42, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_A_USB3OTG1, 42, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_H_HOST0, 42, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_H_HOST_ARB0, 42, 11), -+ RK3588_CRU_RESET_OFFSET(SRST_H_HOST1, 42, 12), -+ RK3588_CRU_RESET_OFFSET(SRST_H_HOST_ARB1, 42, 13), -+ RK3588_CRU_RESET_OFFSET(SRST_A_USB_GRF, 42, 14), -+ RK3588_CRU_RESET_OFFSET(SRST_C_USB2P0_HOST0, 42, 15), -+ -+ /* SOFTRST_CON43 */ -+ RK3588_CRU_RESET_OFFSET(SRST_C_USB2P0_HOST1, 43, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_HOST_UTMI0, 43, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_HOST_UTMI1, 43, 2), -+ -+ /* SOFTRST_CON44 */ -+ RK3588_CRU_RESET_OFFSET(SRST_A_VDPU_BIU, 44, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_A_VDPU_LOW_BIU, 44, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_H_VDPU_BIU, 44, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_A_JPEG_DECODER_BIU, 44, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_A_VPU, 44, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_H_VPU, 44, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_A_JPEG_ENCODER0, 44, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_H_JPEG_ENCODER0, 44, 11), -+ RK3588_CRU_RESET_OFFSET(SRST_A_JPEG_ENCODER1, 44, 12), -+ RK3588_CRU_RESET_OFFSET(SRST_H_JPEG_ENCODER1, 44, 13), -+ RK3588_CRU_RESET_OFFSET(SRST_A_JPEG_ENCODER2, 44, 14), -+ RK3588_CRU_RESET_OFFSET(SRST_H_JPEG_ENCODER2, 44, 15), -+ -+ /* SOFTRST_CON45 */ -+ RK3588_CRU_RESET_OFFSET(SRST_A_JPEG_ENCODER3, 45, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_H_JPEG_ENCODER3, 45, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_A_JPEG_DECODER, 45, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_H_JPEG_DECODER, 45, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_H_IEP2P0, 45, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_A_IEP2P0, 45, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_IEP2P0_CORE, 45, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_H_RGA2, 45, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_A_RGA2, 45, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_RGA2_CORE, 45, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_H_RGA3_0, 45, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_A_RGA3_0, 45, 11), -+ RK3588_CRU_RESET_OFFSET(SRST_RGA3_0_CORE, 45, 12), -+ -+ /* SOFTRST_CON47 */ -+ RK3588_CRU_RESET_OFFSET(SRST_H_RKVENC0_BIU, 47, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_A_RKVENC0_BIU, 47, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_H_RKVENC0, 47, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_A_RKVENC0, 47, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_RKVENC0_CORE, 47, 6), -+ -+ /* SOFTRST_CON48 */ -+ RK3588_CRU_RESET_OFFSET(SRST_H_RKVENC1_BIU, 48, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_A_RKVENC1_BIU, 48, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_H_RKVENC1, 48, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_A_RKVENC1, 48, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_RKVENC1_CORE, 48, 6), -+ -+ /* SOFTRST_CON49 */ -+ RK3588_CRU_RESET_OFFSET(SRST_A_VI_BIU, 49, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_H_VI_BIU, 49, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_P_VI_BIU, 49, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_D_VICAP, 49, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_A_VICAP, 49, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_H_VICAP, 49, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_ISP0, 49, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_ISP0_VICAP, 49, 11), -+ -+ /* SOFTRST_CON50 */ -+ RK3588_CRU_RESET_OFFSET(SRST_FISHEYE0, 50, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_FISHEYE1, 50, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_P_CSI_HOST_0, 50, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_P_CSI_HOST_1, 50, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_P_CSI_HOST_2, 50, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_P_CSI_HOST_3, 50, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_P_CSI_HOST_4, 50, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_P_CSI_HOST_5, 50, 9), -+ -+ /* SOFTRST_CON51 */ -+ RK3588_CRU_RESET_OFFSET(SRST_CSIHOST0_VICAP, 51, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_CSIHOST1_VICAP, 51, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_CSIHOST2_VICAP, 51, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_CSIHOST3_VICAP, 51, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_CSIHOST4_VICAP, 51, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_CSIHOST5_VICAP, 51, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_CIFIN, 51, 13), -+ -+ /* SOFTRST_CON52 */ -+ RK3588_CRU_RESET_OFFSET(SRST_A_VOP_BIU, 52, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_A_VOP_LOW_BIU, 52, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_H_VOP_BIU, 52, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_P_VOP_BIU, 52, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_H_VOP, 52, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_A_VOP, 52, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_D_VOP0, 52, 13), -+ RK3588_CRU_RESET_OFFSET(SRST_D_VOP2HDMI_BRIDGE0, 52, 14), -+ RK3588_CRU_RESET_OFFSET(SRST_D_VOP2HDMI_BRIDGE1, 52, 15), -+ -+ /* SOFTRST_CON53 */ -+ RK3588_CRU_RESET_OFFSET(SRST_D_VOP1, 53, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_D_VOP2, 53, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_D_VOP3, 53, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_P_VOPGRF, 53, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_P_DSIHOST0, 53, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_P_DSIHOST1, 53, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_DSIHOST0, 53, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_DSIHOST1, 53, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_VOP_PMU, 53, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_P_VOP_CHANNEL_BIU, 53, 9), -+ -+ /* SOFTRST_CON55 */ -+ RK3588_CRU_RESET_OFFSET(SRST_H_VO0_BIU, 55, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_H_VO0_S_BIU, 55, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_P_VO0_BIU, 55, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_P_VO0_S_BIU, 55, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_A_HDCP0_BIU, 55, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_P_VO0GRF, 55, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_H_HDCP_KEY0, 55, 11), -+ RK3588_CRU_RESET_OFFSET(SRST_A_HDCP0, 55, 12), -+ RK3588_CRU_RESET_OFFSET(SRST_H_HDCP0, 55, 13), -+ RK3588_CRU_RESET_OFFSET(SRST_HDCP0, 55, 15), -+ -+ /* SOFTRST_CON56 */ -+ RK3588_CRU_RESET_OFFSET(SRST_P_TRNG0, 56, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_DP0, 56, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_DP1, 56, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_H_I2S4_8CH, 56, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_M_I2S4_8CH_TX, 56, 13), -+ RK3588_CRU_RESET_OFFSET(SRST_H_I2S8_8CH, 56, 14), -+ -+ /* SOFTRST_CON57 */ -+ RK3588_CRU_RESET_OFFSET(SRST_M_I2S8_8CH_TX, 57, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_H_SPDIF2_DP0, 57, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_M_SPDIF2_DP0, 57, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_H_SPDIF5_DP1, 57, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_M_SPDIF5_DP1, 57, 11), -+ -+ /* SOFTRST_CON59 */ -+ RK3588_CRU_RESET_OFFSET(SRST_A_HDCP1_BIU, 59, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_A_VO1_BIU, 59, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_H_VOP1_BIU, 59, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_H_VOP1_S_BIU, 59, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_P_VOP1_BIU, 59, 11), -+ RK3588_CRU_RESET_OFFSET(SRST_P_VO1GRF, 59, 12), -+ RK3588_CRU_RESET_OFFSET(SRST_P_VO1_S_BIU, 59, 13), -+ -+ /* SOFTRST_CON60 */ -+ RK3588_CRU_RESET_OFFSET(SRST_H_I2S7_8CH, 60, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_M_I2S7_8CH_RX, 60, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_H_HDCP_KEY1, 60, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_A_HDCP1, 60, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_H_HDCP1, 60, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_HDCP1, 60, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_P_TRNG1, 60, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_P_HDMITX0, 60, 11), -+ -+ /* SOFTRST_CON61 */ -+ RK3588_CRU_RESET_OFFSET(SRST_HDMITX0_REF, 61, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_P_HDMITX1, 61, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_HDMITX1_REF, 61, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_A_HDMIRX, 61, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_P_HDMIRX, 61, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_HDMIRX_REF, 61, 11), -+ -+ /* SOFTRST_CON62 */ -+ RK3588_CRU_RESET_OFFSET(SRST_P_EDP0, 62, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_EDP0_24M, 62, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_P_EDP1, 62, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_EDP1_24M, 62, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_M_I2S5_8CH_TX, 62, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_H_I2S5_8CH, 62, 12), -+ RK3588_CRU_RESET_OFFSET(SRST_M_I2S6_8CH_TX, 62, 15), -+ -+ /* SOFTRST_CON63 */ -+ RK3588_CRU_RESET_OFFSET(SRST_M_I2S6_8CH_RX, 63, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_H_I2S6_8CH, 63, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_H_SPDIF3, 63, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_M_SPDIF3, 63, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_H_SPDIF4, 63, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_M_SPDIF4, 63, 11), -+ RK3588_CRU_RESET_OFFSET(SRST_H_SPDIFRX0, 63, 12), -+ RK3588_CRU_RESET_OFFSET(SRST_M_SPDIFRX0, 63, 13), -+ RK3588_CRU_RESET_OFFSET(SRST_H_SPDIFRX1, 63, 14), -+ RK3588_CRU_RESET_OFFSET(SRST_M_SPDIFRX1, 63, 15), -+ -+ /* SOFTRST_CON64 */ -+ RK3588_CRU_RESET_OFFSET(SRST_H_SPDIFRX2, 64, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_M_SPDIFRX2, 64, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_LINKSYM_HDMITXPHY0, 64, 12), -+ RK3588_CRU_RESET_OFFSET(SRST_LINKSYM_HDMITXPHY1, 64, 13), -+ RK3588_CRU_RESET_OFFSET(SRST_VO1_BRIDGE0, 64, 14), -+ RK3588_CRU_RESET_OFFSET(SRST_VO1_BRIDGE1, 64, 15), -+ -+ /* SOFTRST_CON65 */ -+ RK3588_CRU_RESET_OFFSET(SRST_H_I2S9_8CH, 65, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_M_I2S9_8CH_RX, 65, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_H_I2S10_8CH, 65, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_M_I2S10_8CH_RX, 65, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_P_S_HDMIRX, 65, 8), -+ -+ /* SOFTRST_CON66 */ -+ RK3588_CRU_RESET_OFFSET(SRST_GPU, 66, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_SYS_GPU, 66, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_A_S_GPU_BIU, 66, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_A_M0_GPU_BIU, 66, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_A_M1_GPU_BIU, 66, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_A_M2_GPU_BIU, 66, 11), -+ RK3588_CRU_RESET_OFFSET(SRST_A_M3_GPU_BIU, 66, 12), -+ RK3588_CRU_RESET_OFFSET(SRST_P_GPU_BIU, 66, 14), -+ RK3588_CRU_RESET_OFFSET(SRST_P_GPU_PVTM, 66, 15), -+ -+ /* SOFTRST_CON67 */ -+ RK3588_CRU_RESET_OFFSET(SRST_GPU_PVTM, 67, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_P_GPU_GRF, 67, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_GPU_PVTPLL, 67, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_GPU_JTAG, 67, 4), -+ -+ /* SOFTRST_CON68 */ -+ RK3588_CRU_RESET_OFFSET(SRST_A_AV1_BIU, 68, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_A_AV1, 68, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_P_AV1_BIU, 68, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_P_AV1, 68, 5), -+ -+ /* SOFTRST_CON69 */ -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR_BIU, 69, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DMA2DDR, 69, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR_SHAREMEM, 69, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_A_DDR_SHAREMEM_BIU, 69, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_A_CENTER_S200_BIU, 69, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_A_CENTER_S400_BIU, 69, 11), -+ RK3588_CRU_RESET_OFFSET(SRST_H_AHB2APB, 69, 12), -+ RK3588_CRU_RESET_OFFSET(SRST_H_CENTER_BIU, 69, 13), -+ RK3588_CRU_RESET_OFFSET(SRST_F_DDR_CM0_CORE, 69, 14), -+ -+ /* SOFTRST_CON70 */ -+ RK3588_CRU_RESET_OFFSET(SRST_DDR_TIMER0, 70, 0), -+ RK3588_CRU_RESET_OFFSET(SRST_DDR_TIMER1, 70, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_T_WDT_DDR, 70, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_T_DDR_CM0_JTAG, 70, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_P_CENTER_GRF, 70, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_P_AHB2APB, 70, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_P_WDT, 70, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_P_TIMER, 70, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_P_DMA2DDR, 70, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_P_SHAREMEM, 70, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_P_CENTER_BIU, 70, 11), -+ RK3588_CRU_RESET_OFFSET(SRST_P_CENTER_CHANNEL_BIU, 70, 12), -+ -+ /* SOFTRST_CON72 */ -+ RK3588_CRU_RESET_OFFSET(SRST_P_USBDPGRF0, 72, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_P_USBDPPHY0, 72, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_P_USBDPGRF1, 72, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_P_USBDPPHY1, 72, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_P_HDPTX0, 72, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_P_HDPTX1, 72, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_P_APB2ASB_SLV_BOT_RIGHT, 72, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_P_USB2PHY_U3_0_GRF0, 72, 8), -+ RK3588_CRU_RESET_OFFSET(SRST_P_USB2PHY_U3_1_GRF0, 72, 9), -+ RK3588_CRU_RESET_OFFSET(SRST_P_USB2PHY_U2_0_GRF0, 72, 10), -+ RK3588_CRU_RESET_OFFSET(SRST_P_USB2PHY_U2_1_GRF0, 72, 11), -+ RK3588_CRU_RESET_OFFSET(SRST_HDPTX0_ROPLL, 72, 12), // missing in TRM -+ RK3588_CRU_RESET_OFFSET(SRST_HDPTX0_LCPLL, 72, 13), // missing in TRM -+ RK3588_CRU_RESET_OFFSET(SRST_HDPTX0, 72, 14), // missing in TRM -+ RK3588_CRU_RESET_OFFSET(SRST_HDPTX1_ROPLL, 72, 15), // missing in TRM -+ -+ /* SOFTRST_CON73 */ -+ RK3588_CRU_RESET_OFFSET(SRST_HDPTX1_LCPLL, 73, 0), // missing in TRM -+ RK3588_CRU_RESET_OFFSET(SRST_HDPTX1, 73, 1), // missing in TRM -+ RK3588_CRU_RESET_OFFSET(SRST_HDPTX0_HDMIRXPHY_SET, 73, 2), // missing in TRM -+ RK3588_CRU_RESET_OFFSET(SRST_USBDP_COMBO_PHY0, 73, 3), // missing in TRM -+ RK3588_CRU_RESET_OFFSET(SRST_USBDP_COMBO_PHY0_LCPLL, 73, 4), // missing in TRM -+ RK3588_CRU_RESET_OFFSET(SRST_USBDP_COMBO_PHY0_ROPLL, 73, 5), // missing in TRM -+ RK3588_CRU_RESET_OFFSET(SRST_USBDP_COMBO_PHY0_PCS_HS, 73, 6), // missing in TRM -+ RK3588_CRU_RESET_OFFSET(SRST_USBDP_COMBO_PHY1, 73, 7), // missing in TRM -+ RK3588_CRU_RESET_OFFSET(SRST_USBDP_COMBO_PHY1_LCPLL, 73, 8), // missing in TRM -+ RK3588_CRU_RESET_OFFSET(SRST_USBDP_COMBO_PHY1_ROPLL, 73, 9), // missing in TRM -+ RK3588_CRU_RESET_OFFSET(SRST_USBDP_COMBO_PHY1_PCS_HS, 73, 10), // missing in TRM -+ RK3588_CRU_RESET_OFFSET(SRST_HDMIHDP0, 73, 12), -+ RK3588_CRU_RESET_OFFSET(SRST_HDMIHDP1, 73, 13), -+ -+ /* SOFTRST_CON74 */ -+ RK3588_CRU_RESET_OFFSET(SRST_A_VO1USB_TOP_BIU, 74, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_H_VO1USB_TOP_BIU, 74, 3), -+ -+ /* SOFTRST_CON75 */ -+ RK3588_CRU_RESET_OFFSET(SRST_H_SDIO_BIU, 75, 1), -+ RK3588_CRU_RESET_OFFSET(SRST_H_SDIO, 75, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_SDIO, 75, 3), -+ -+ /* SOFTRST_CON76 */ -+ RK3588_CRU_RESET_OFFSET(SRST_H_RGA3_BIU, 76, 2), -+ RK3588_CRU_RESET_OFFSET(SRST_A_RGA3_BIU, 76, 3), -+ RK3588_CRU_RESET_OFFSET(SRST_H_RGA3_1, 76, 4), -+ RK3588_CRU_RESET_OFFSET(SRST_A_RGA3_1, 76, 5), -+ RK3588_CRU_RESET_OFFSET(SRST_RGA3_1_CORE, 76, 6), -+ -+ /* SOFTRST_CON77 */ -+ RK3588_CRU_RESET_OFFSET(SRST_REF_PIPE_PHY0, 77, 6), -+ RK3588_CRU_RESET_OFFSET(SRST_REF_PIPE_PHY1, 77, 7), -+ RK3588_CRU_RESET_OFFSET(SRST_REF_PIPE_PHY2, 77, 8), -+ -+ /* PHPTOPCRU_SOFTRST_CON00 */ -+ RK3588_PHPTOPCRU_RESET_OFFSET(SRST_P_PHPTOP_CRU, 0, 1), -+ RK3588_PHPTOPCRU_RESET_OFFSET(SRST_P_PCIE2_GRF0, 0, 2), -+ RK3588_PHPTOPCRU_RESET_OFFSET(SRST_P_PCIE2_GRF1, 0, 3), -+ RK3588_PHPTOPCRU_RESET_OFFSET(SRST_P_PCIE2_GRF2, 0, 4), -+ RK3588_PHPTOPCRU_RESET_OFFSET(SRST_P_PCIE2_PHY0, 0, 5), -+ RK3588_PHPTOPCRU_RESET_OFFSET(SRST_P_PCIE2_PHY1, 0, 6), -+ RK3588_PHPTOPCRU_RESET_OFFSET(SRST_P_PCIE2_PHY2, 0, 7), -+ RK3588_PHPTOPCRU_RESET_OFFSET(SRST_P_PCIE3_PHY, 0, 8), -+ RK3588_PHPTOPCRU_RESET_OFFSET(SRST_P_APB2ASB_SLV_CHIP_TOP, 0, 9), -+ RK3588_PHPTOPCRU_RESET_OFFSET(SRST_PCIE30_PHY, 0, 10), -+ -+ /* PMU1CRU_SOFTRST_CON00 */ -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_H_PMU1_BIU, 0, 10), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_P_PMU1_BIU, 0, 11), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_H_PMU_CM0_BIU, 0, 12), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_F_PMU_CM0_CORE, 0, 13), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_T_PMU1_CM0_JTAG, 0, 14), -+ -+ /* PMU1CRU_SOFTRST_CON01 */ -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_DDR_FAIL_SAFE, 1, 1), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_P_CRU_PMU1, 1, 2), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_P_PMU1_GRF, 1, 4), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_P_PMU1_IOC, 1, 5), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_P_PMU1WDT, 1, 6), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_T_PMU1WDT, 1, 7), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_P_PMU1TIMER, 1, 8), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_PMU1TIMER0, 1, 10), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_PMU1TIMER1, 1, 11), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_P_PMU1PWM, 1, 12), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_PMU1PWM, 1, 13), -+ -+ /* PMU1CRU_SOFTRST_CON02 */ -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_P_I2C0, 2, 1), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_I2C0, 2, 2), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_S_UART0, 2, 5), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_P_UART0, 2, 6), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_H_I2S1_8CH, 2, 7), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_M_I2S1_8CH_TX, 2, 10), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_M_I2S1_8CH_RX, 2, 13), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_H_PDM0, 2, 14), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_PDM0, 2, 15), -+ -+ /* PMU1CRU_SOFTRST_CON03 */ -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_H_VAD, 3, 0), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_HDPTX0_INIT, 3, 11), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_HDPTX0_CMN, 3, 12), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_HDPTX0_LANE, 3, 13), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_HDPTX1_INIT, 3, 15), -+ -+ /* PMU1CRU_SOFTRST_CON04 */ -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_HDPTX1_CMN, 4, 0), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_HDPTX1_LANE, 4, 1), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_M_MIPI_DCPHY0, 4, 3), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_S_MIPI_DCPHY0, 4, 4), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_M_MIPI_DCPHY1, 4, 5), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_S_MIPI_DCPHY1, 4, 6), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_OTGPHY_U3_0, 4, 7), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_OTGPHY_U3_1, 4, 8), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_OTGPHY_U2_0, 4, 9), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_OTGPHY_U2_1, 4, 10), -+ -+ /* PMU1CRU_SOFTRST_CON05 */ -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_P_PMU0GRF, 5, 3), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_P_PMU0IOC, 5, 4), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_P_GPIO0, 5, 5), -+ RK3588_PMU1CRU_RESET_OFFSET(SRST_GPIO0, 5, 6), -+ -+ /* SECURECRU_SOFTRST_CON00 */ -+ RK3588_SECURECRU_RESET_OFFSET(SRST_A_SECURE_NS_BIU, 0, 10), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_H_SECURE_NS_BIU, 0, 11), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_A_SECURE_S_BIU, 0, 12), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_H_SECURE_S_BIU, 0, 13), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_P_SECURE_S_BIU, 0, 14), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_CRYPTO_CORE, 0, 15), -+ -+ /* SECURECRU_SOFTRST_CON01 */ -+ RK3588_SECURECRU_RESET_OFFSET(SRST_CRYPTO_PKA, 1, 0), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_CRYPTO_RNG, 1, 1), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_A_CRYPTO, 1, 2), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_H_CRYPTO, 1, 3), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_KEYLADDER_CORE, 1, 9), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_KEYLADDER_RNG, 1, 10), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_A_KEYLADDER, 1, 11), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_H_KEYLADDER, 1, 12), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_P_OTPC_S, 1, 13), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_OTPC_S, 1, 14), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_WDT_S, 1, 15), -+ -+ /* SECURECRU_SOFTRST_CON02 */ -+ RK3588_SECURECRU_RESET_OFFSET(SRST_T_WDT_S, 2, 0), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_H_BOOTROM, 2, 1), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_A_DCF, 2, 2), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_P_DCF, 2, 3), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_H_BOOTROM_NS, 2, 5), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_P_KEYLADDER, 2, 14), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_H_TRNG_S, 2, 15), -+ -+ /* SECURECRU_SOFTRST_CON03 */ -+ RK3588_SECURECRU_RESET_OFFSET(SRST_H_TRNG_NS, 3, 0), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_D_SDMMC_BUFFER, 3, 1), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_H_SDMMC, 3, 2), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_H_SDMMC_BUFFER, 3, 3), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_SDMMC, 3, 4), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_P_TRNG_CHK, 3, 5), -+ RK3588_SECURECRU_RESET_OFFSET(SRST_TRNG_S, 3, 6), -+}; -+ -+int rk3588_reset_bind_lut(struct udevice *pdev, u32 reg_offset, u32 reg_number) -+{ -+ return rockchip_reset_bind_lut(pdev, rk3588_register_offset, -+ reg_offset, reg_number); -+} -diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig -index 35b6ed4d7c..23173139e0 100644 ---- a/drivers/rtc/Kconfig -+++ b/drivers/rtc/Kconfig -@@ -134,6 +134,19 @@ config RTC_ISL1208 - This driver supports reading and writing the RTC/calendar and detects - total power failures. - -+config RTC_MAX313XX -+ bool "Analog Devices MAX313XX RTC driver" -+ depends on DM_RTC -+ depends on DM_I2C -+ help -+ If you say yes here you will get support for the -+ Analog Devices MAX313XX series RTC family. -+ -+ Chip features not currently supported: -+ - Timestamp registers as SRAM -+ - Temperature sensor -+ - CLKOUT generation -+ - config RTC_PCF8563 - tristate "Philips PCF8563" - help -@@ -231,6 +244,24 @@ config RTC_M41T62 - Enable driver for ST's M41T62 compatible RTC devices (like RV-4162). - It is a serial (I2C) real-time clock (RTC) with alarm. - -+config RTC_SANDBOX -+ bool "Enable sandbox RTC driver" -+ depends on SANDBOX && DM_RTC -+ default y -+ help -+ Enable the sandbox RTC driver. This driver connects to the RTC -+ emulator and is used to test the RTC uclasses and associated code, -+ as well as the I2C subsystem. -+ -+config SPL_RTC_SANDBOX -+ bool "Enable sandbox RTC driver (SPL)" -+ depends on SANDBOX && SPL_DM_RTC -+ default y -+ help -+ Enable the sandbox RTC driver. This driver connects to the RTC -+ emulator and is used to test the RTC uclasses and associated code, -+ as well as the I2C subsystem. -+ - config RTC_STM32 - bool "Enable STM32 RTC driver" - depends on DM_RTC -diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile -index 447551e15a..308fab8da9 100644 ---- a/drivers/rtc/Makefile -+++ b/drivers/rtc/Makefile -@@ -16,9 +16,10 @@ obj-$(CONFIG_RTC_DS3231) += ds3231.o - obj-$(CONFIG_RTC_DS3232) += ds3232.o - obj-$(CONFIG_RTC_EMULATION) += emul_rtc.o - obj-$(CONFIG_RTC_HT1380) += ht1380.o --obj-$(CONFIG_SANDBOX) += i2c_rtc_emul.o -+obj-$(CONFIG_$(SPL_TPL_)RTC_SANDBOX) += i2c_rtc_emul.o - obj-$(CONFIG_RTC_ISL1208) += isl1208.o - obj-$(CONFIG_RTC_M41T62) += m41t62.o -+obj-$(CONFIG_RTC_MAX313XX) += max313xx.o - obj-$(CONFIG_RTC_MC13XXX) += mc13xxx-rtc.o - obj-$(CONFIG_RTC_MC146818) += mc146818.o - obj-$(CONFIG_MCFRTC) += mcfrtc.o -@@ -35,6 +36,6 @@ obj-$(CONFIG_RTC_RX8025) += rx8025.o - obj-$(CONFIG_RTC_RX8010SJ) += rx8010sj.o - obj-$(CONFIG_RTC_S35392A) += s35392a.o - obj-$(CONFIG_RTC_STM32) += stm32_rtc.o --obj-$(CONFIG_SANDBOX) += sandbox_rtc.o -+obj-$(CONFIG_$(SPL_TPL_)RTC_SANDBOX) += sandbox_rtc.o - obj-$(CONFIG_RTC_ABX80X) += abx80x.o - obj-$(CONFIG_RTC_ZYNQMP) += zynqmp_rtc.o -diff --git a/drivers/rtc/m41t62.c b/drivers/rtc/m41t62.c -index 66a0faa0ec..891fe09d31 100644 ---- a/drivers/rtc/m41t62.c -+++ b/drivers/rtc/m41t62.c -@@ -283,6 +283,16 @@ static int m41t62_rtc_reset(struct udevice *dev) - return m41t62_sqw_enable(dev, true); - } - -+static int m41t62_rtc_read8(struct udevice *dev, unsigned int reg) -+{ -+ return dm_i2c_reg_read(dev, reg); -+} -+ -+static int m41t62_rtc_write8(struct udevice *dev, unsigned int reg, int val) -+{ -+ return dm_i2c_reg_write(dev, reg, val); -+} -+ - /* - * Make sure HT bit is cleared. This bit is set on entering battery backup - * mode, so do this before the first read access. -@@ -296,6 +306,8 @@ static const struct rtc_ops m41t62_rtc_ops = { - .get = m41t62_rtc_get, - .set = m41t62_rtc_set, - .reset = m41t62_rtc_reset, -+ .read8 = m41t62_rtc_read8, -+ .write8 = m41t62_rtc_write8, - }; - - static const struct udevice_id m41t62_rtc_ids[] = { -diff --git a/drivers/rtc/max313xx.c b/drivers/rtc/max313xx.c -new file mode 100644 -index 0000000000..748f3c42c3 ---- /dev/null -+++ b/drivers/rtc/max313xx.c -@@ -0,0 +1,459 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+/* -+ * Analog Devices MAX313XX series I2C RTC driver -+ * -+ * Copyright 2022 Analog Devices Inc. -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+/* common registers */ -+#define MAX313XX_INT_ALARM1 BIT(0) -+#define MAX313XX_INT_ALARM2 BIT(1) -+#define MAX313XX_HRS_F_12_24 BIT(6) -+#define MAX313XX_HRS_F_AM_PM BIT(5) -+#define MAX313XX_MONTH_CENTURY BIT(7) -+ -+#define MAX313XX_TMR_CFG_ENABLE BIT(4) -+#define MAX313XX_TMR_CFG_FREQ_MASK GENMASK(1, 0) -+#define MAX313XX_TMR_CFG_FREQ_16HZ 0x03 -+ -+#define MAX313XX_REG_MINUTE 0x01 -+#define MAX313XX_REG_HOUR 0x02 -+ -+#define MAX313XX_TIME_SIZE 0x07 -+ -+/* device specific registers */ -+#define MAX3134X_CFG2_REG 0x01 -+#define MAX3134X_CFG2_SET_RTC BIT(1) -+ -+#define MAX31341_TRICKLE_RES_MASK GENMASK(1, 0) -+#define MAX31341_TRICKLE_DIODE_EN BIT(2) -+#define MAX31341_TRICKLE_ENABLE_BIT BIT(3) -+#define MAX31341_POWER_MGMT_REG 0x56 -+#define MAX31341_POWER_MGMT_TRICKLE_BIT BIT(0) -+ -+#define MAX3133X_TRICKLE_RES_MASK GENMASK(2, 1) -+#define MAX3133X_TRICKLE_DIODE_EN BIT(3) -+#define MAX3133X_TRICKLE_ENABLE_BIT BIT(0) -+ -+#define MAX31329_TRICKLE_ENABLE_BIT BIT(7) -+#define MAX31343_TRICKLE_ENABLE_MASK GENMASK(7, 4) -+#define MAX31343_TRICKLE_ENABLE_CODE 5 -+#define MAX31329_43_TRICKLE_RES_MASK GENMASK(1, 0) -+#define MAX31329_43_TRICKLE_DIODE_EN BIT(2) -+ -+#define MAX31329_CONFIG2_REG 0x04 -+#define MAX31329_CONFIG2_CLKIN_EN BIT(2) -+#define MAX31329_CONFIG2_CLKIN_FREQ GENMASK(1, 0) -+ -+#define MAX31341_42_CONFIG1_REG 0x00 -+#define MAX31341_42_CONFIG1_CLKIN_EN BIT(7) -+#define MAX31341_42_CONFIG1_CLKIN_FREQ GENMASK(5, 4) -+#define MAX31341_42_CONFIG1_OSC_DISABLE BIT(3) -+#define MAX31341_42_CONFIG1_SWRST BIT(0) -+ -+enum max313xx_ids { -+ ID_MAX31328, -+ ID_MAX31329, -+ ID_MAX31331, -+ ID_MAX31334, -+ ID_MAX31341, -+ ID_MAX31342, -+ ID_MAX31343, -+ MAX313XX_ID_NR -+}; -+ -+/** -+ * struct chip_desc - descriptor for MAX313xx variants -+ * @sec_reg: Offset to seconds register. Used to denote the start of the -+ * current time registers. -+ * @alarm1_sec_reg: Offset to Alarm1 seconds register. Used to denote the -+ * start of the alarm registers. -+ * @int_en_reg: Offset to the interrupt enable register. -+ * @int_status_reg: Offset to the interrupt status register. -+ * @ram_reg: Offset to the timestamp RAM (which can be used as SRAM). -+ * @ram_size: Size of the timestamp RAM. -+ * @temp_reg: Offset to the temperature register (or 0 if temperature -+ * sensor is not supported). -+ * @trickle_reg: Offset to the trickle charger configuration register (or -+ * 0 if trickle charger is not supported). -+ * @rst_reg: Offset to the reset register. -+ * @rst_bit: Bit within the reset register for the software reset. -+ */ -+struct chip_desc { -+ u8 sec_reg; -+ u8 alarm1_sec_reg; -+ -+ u8 int_en_reg; -+ u8 int_status_reg; -+ -+ u8 ram_reg; -+ u8 ram_size; -+ -+ u8 temp_reg; -+ -+ u8 trickle_reg; -+ -+ u8 rst_reg; -+ u8 rst_bit; -+}; -+ -+struct max313xx_priv { -+ enum max313xx_ids id; -+ const struct chip_desc *chip; -+}; -+ -+static const struct chip_desc chip[MAX313XX_ID_NR] = { -+ [ID_MAX31328] = { -+ .int_en_reg = 0x0E, -+ .int_status_reg = 0x0F, -+ .sec_reg = 0x00, -+ .alarm1_sec_reg = 0x07, -+ .temp_reg = 0x11, -+ }, -+ [ID_MAX31329] = { -+ .int_en_reg = 0x01, -+ .int_status_reg = 0x00, -+ .sec_reg = 0x06, -+ .alarm1_sec_reg = 0x0D, -+ .ram_reg = 0x22, -+ .ram_size = 64, -+ .trickle_reg = 0x19, -+ .rst_reg = 0x02, -+ .rst_bit = BIT(0), -+ }, -+ [ID_MAX31331] = { -+ .int_en_reg = 0x01, -+ .int_status_reg = 0x00, -+ .sec_reg = 0x08, -+ .alarm1_sec_reg = 0x0F, -+ .ram_reg = 0x20, -+ .ram_size = 32, -+ .trickle_reg = 0x1B, -+ .rst_reg = 0x02, -+ .rst_bit = BIT(0), -+ }, -+ [ID_MAX31334] = { -+ .int_en_reg = 0x01, -+ .int_status_reg = 0x00, -+ .sec_reg = 0x09, -+ .alarm1_sec_reg = 0x10, -+ .ram_reg = 0x30, -+ .ram_size = 32, -+ .trickle_reg = 0x1E, -+ .rst_reg = 0x02, -+ .rst_bit = BIT(0), -+ }, -+ [ID_MAX31341] = { -+ .int_en_reg = 0x04, -+ .int_status_reg = 0x05, -+ .sec_reg = 0x06, -+ .alarm1_sec_reg = 0x0D, -+ .ram_reg = 0x16, -+ .ram_size = 64, -+ .trickle_reg = 0x57, -+ .rst_reg = 0x00, -+ .rst_bit = BIT(0), -+ }, -+ [ID_MAX31342] = { -+ .int_en_reg = 0x04, -+ .int_status_reg = 0x05, -+ .sec_reg = 0x06, -+ .alarm1_sec_reg = 0x0D, -+ .rst_reg = 0x00, -+ .rst_bit = BIT(0), -+ }, -+ [ID_MAX31343] = { -+ .int_en_reg = 0x01, -+ .int_status_reg = 0x00, -+ .sec_reg = 0x06, -+ .alarm1_sec_reg = 0x0D, -+ .ram_reg = 0x22, -+ .ram_size = 64, -+ .temp_reg = 0x1A, -+ .trickle_reg = 0x19, -+ .rst_reg = 0x02, -+ .rst_bit = BIT(0), -+ }, -+}; -+ -+static const u32 max313xx_trickle_ohms[] = { 3000, 6000, 11000 }; -+ -+static int max313xx_set_bits(struct udevice *dev, unsigned int reg, unsigned int bits) -+{ -+ int ret; -+ -+ ret = dm_i2c_reg_read(dev, reg); -+ if (ret < 0) -+ return ret; -+ -+ return dm_i2c_reg_write(dev, reg, ret | bits); -+} -+ -+static int max313xx_clear_bits(struct udevice *dev, unsigned int reg, unsigned int bits) -+{ -+ int ret; -+ -+ ret = dm_i2c_reg_read(dev, reg); -+ if (ret < 0) -+ return ret; -+ -+ return dm_i2c_reg_write(dev, reg, ret & ~bits); -+} -+ -+static int max313xx_get_hour(u8 hour_reg) -+{ -+ int hour; -+ -+ /* 24Hr mode */ -+ if (!FIELD_GET(MAX313XX_HRS_F_12_24, hour_reg)) -+ return bcd2bin(hour_reg & 0x3f); -+ -+ /* 12Hr mode */ -+ hour = bcd2bin(hour_reg & 0x1f); -+ if (hour == 12) -+ hour = 0; -+ -+ if (FIELD_GET(MAX313XX_HRS_F_AM_PM, hour_reg)) -+ hour += 12; -+ -+ return hour; -+} -+ -+static int max313xx_read_time(struct udevice *dev, struct rtc_time *t) -+{ -+ struct max313xx_priv *rtc = dev_get_priv(dev); -+ u8 regs[7]; -+ int ret; -+ -+ ret = dm_i2c_read(dev, rtc->chip->sec_reg, regs, 7); -+ if (ret) -+ return ret; -+ -+ t->tm_sec = bcd2bin(regs[0] & 0x7f); -+ t->tm_min = bcd2bin(regs[1] & 0x7f); -+ t->tm_hour = max313xx_get_hour(regs[2]); -+ t->tm_wday = bcd2bin(regs[3] & 0x07) - 1; -+ t->tm_mday = bcd2bin(regs[4] & 0x3f); -+ t->tm_mon = bcd2bin(regs[5] & 0x1f); -+ t->tm_year = bcd2bin(regs[6]) + 2000; -+ -+ if (FIELD_GET(MAX313XX_MONTH_CENTURY, regs[5])) -+ t->tm_year += 100; -+ -+ dev_dbg(dev, "read %4d-%02d-%02d (wday=%d) %2d:%02d:%02d\n", -+ t->tm_year, t->tm_mon, t->tm_mday, -+ t->tm_wday, t->tm_hour, t->tm_min, t->tm_sec); -+ -+ return 0; -+} -+ -+static int max313xx_set_time(struct udevice *dev, const struct rtc_time *t) -+{ -+ struct max313xx_priv *rtc = dev_get_priv(dev); -+ u8 regs[7]; -+ int ret; -+ -+ dev_dbg(dev, "set %4d-%02d-%02d (wday=%d) %2d:%02d:%02d\n", -+ t->tm_year, t->tm_mon, t->tm_mday, -+ t->tm_wday, t->tm_hour, t->tm_min, t->tm_sec); -+ -+ if (t->tm_year < 2000) { -+ dev_err(dev, "year %d (before 2000) not supported\n", -+ t->tm_year); -+ return -EINVAL; -+ } -+ -+ if (rtc->chip->rst_bit) { -+ ret = max313xx_clear_bits(dev, rtc->chip->rst_reg, rtc->chip->rst_bit); -+ if (ret) -+ return ret; -+ } -+ -+ regs[0] = bin2bcd(t->tm_sec); -+ regs[1] = bin2bcd(t->tm_min); -+ regs[2] = bin2bcd(t->tm_hour); -+ regs[3] = bin2bcd(t->tm_wday + 1); -+ regs[4] = bin2bcd(t->tm_mday); -+ regs[5] = bin2bcd(t->tm_mon); -+ regs[6] = bin2bcd((t->tm_year - 2000) % 100); -+ -+ if ((t->tm_year - 2000) >= 200) -+ regs[5] |= FIELD_PREP(MAX313XX_MONTH_CENTURY, 1); -+ -+ ret = dm_i2c_write(dev, rtc->chip->sec_reg, regs, 7); -+ if (ret) -+ return ret; -+ -+ switch (rtc->id) { -+ case ID_MAX31341: -+ case ID_MAX31342: -+ ret = max313xx_set_bits(dev, MAX3134X_CFG2_REG, -+ MAX3134X_CFG2_SET_RTC); -+ if (ret) -+ return ret; -+ -+ udelay(10000); -+ -+ ret = max313xx_clear_bits(dev, MAX3134X_CFG2_REG, -+ MAX3134X_CFG2_SET_RTC); -+ if (ret) -+ return ret; -+ -+ break; -+ default: -+ break; -+ } -+ -+ return ret; -+} -+ -+static int max313xx_reset(struct udevice *dev) -+{ -+ struct max313xx_priv *rtc = dev_get_priv(dev); -+ int ret = -EINVAL; -+ -+ if (rtc->chip->rst_bit) -+ ret = max313xx_set_bits(dev, rtc->chip->rst_reg, rtc->chip->rst_bit); -+ -+ return ret; -+} -+ -+static const struct rtc_ops max3133x_rtc_ops = { -+ .get = max313xx_read_time, -+ .set = max313xx_set_time, -+ .reset = max313xx_reset, -+}; -+ -+static int max313xx_init(struct udevice *dev) -+{ -+ struct max313xx_priv *rtc = dev_get_priv(dev); -+ int ret; -+ -+ switch (rtc->id) { -+ case ID_MAX31341: -+ case ID_MAX31342: -+ ret = max313xx_clear_bits(dev, MAX31341_42_CONFIG1_REG, -+ MAX31341_42_CONFIG1_OSC_DISABLE); -+ if (ret) -+ return ret; -+ -+ return max313xx_set_bits(dev, MAX31341_42_CONFIG1_REG, -+ MAX31341_42_CONFIG1_SWRST); -+ default: -+ return 0; -+ } -+} -+ -+static int max313xx_trickle_charger_setup(struct udevice *dev) -+{ -+ struct max313xx_priv *rtc = dev_get_priv(dev); -+ bool diode; -+ int index, reg; -+ u32 ohms; -+ u32 chargeable; -+ int ret; -+ -+ if (dev_read_u32(dev, "trickle-resistor-ohms", &ohms) || -+ dev_read_u32(dev, "aux-voltage-chargeable", &chargeable)) -+ return 0; -+ -+ switch (chargeable) { -+ case 0: -+ diode = false; -+ break; -+ case 1: -+ diode = true; -+ break; -+ default: -+ dev_dbg(dev, "unsupported aux-voltage-chargeable value\n"); -+ return -EINVAL; -+ } -+ -+ if (!rtc->chip->trickle_reg) { -+ dev_warn(dev, "device does not have trickle charger\n"); -+ return -ENOTSUPP; -+ } -+ -+ index = find_closest(ohms, max313xx_trickle_ohms, -+ ARRAY_SIZE(max313xx_trickle_ohms)) + 1; -+ -+ switch (rtc->id) { -+ case ID_MAX31329: -+ reg = FIELD_PREP(MAX31329_TRICKLE_ENABLE_BIT, 1) | -+ FIELD_PREP(MAX31329_43_TRICKLE_RES_MASK, index) | -+ FIELD_PREP(MAX31329_43_TRICKLE_DIODE_EN, diode); -+ break; -+ case ID_MAX31331: -+ case ID_MAX31334: -+ reg = FIELD_PREP(MAX3133X_TRICKLE_ENABLE_BIT, 1) | -+ FIELD_PREP(MAX3133X_TRICKLE_DIODE_EN, diode) | -+ FIELD_PREP(MAX3133X_TRICKLE_RES_MASK, index); -+ break; -+ case ID_MAX31341: -+ if (index == 1) -+ index = 0; -+ reg = FIELD_PREP(MAX31341_TRICKLE_ENABLE_BIT, 1) | -+ FIELD_PREP(MAX31341_TRICKLE_DIODE_EN, diode) | -+ FIELD_PREP(MAX31341_TRICKLE_RES_MASK, index); -+ -+ ret = max313xx_set_bits(dev, MAX31341_POWER_MGMT_REG, -+ MAX31341_POWER_MGMT_TRICKLE_BIT); -+ if (ret) -+ return ret; -+ -+ break; -+ case ID_MAX31343: -+ reg = FIELD_PREP(MAX31329_43_TRICKLE_RES_MASK, index) | -+ FIELD_PREP(MAX31329_43_TRICKLE_DIODE_EN, diode) | -+ FIELD_PREP(MAX31343_TRICKLE_ENABLE_MASK, -+ MAX31343_TRICKLE_ENABLE_CODE); -+ break; -+ default: -+ return -EOPNOTSUPP; -+ } -+ -+ return dm_i2c_reg_write(dev, rtc->chip->trickle_reg, reg); -+} -+ -+static int max313xx_probe(struct udevice *dev) -+{ -+ struct max313xx_priv *max313xx = dev_get_priv(dev); -+ int ret; -+ -+ max313xx->id = dev_get_driver_data(dev); -+ max313xx->chip = &chip[max313xx->id]; -+ -+ ret = max313xx_init(dev); -+ if (ret) -+ return ret; -+ -+ return max313xx_trickle_charger_setup(dev); -+} -+ -+static const struct udevice_id max313xx_of_id[] = { -+ { .compatible = "adi,max31328", .data = ID_MAX31328 }, -+ { .compatible = "adi,max31329", .data = ID_MAX31329 }, -+ { .compatible = "adi,max31331", .data = ID_MAX31331 }, -+ { .compatible = "adi,max31334", .data = ID_MAX31334 }, -+ { .compatible = "adi,max31341", .data = ID_MAX31341 }, -+ { .compatible = "adi,max31342", .data = ID_MAX31342 }, -+ { .compatible = "adi,max31343", .data = ID_MAX31343 }, -+ { } -+}; -+ -+U_BOOT_DRIVER(rtc_max313xx) = { -+ .name = "rtc-max313xx", -+ .id = UCLASS_RTC, -+ .probe = max313xx_probe, -+ .of_match = max313xx_of_id, -+ .priv_auto = sizeof(struct max313xx_priv), -+ .ops = &max3133x_rtc_ops, -+}; -diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig -index bb5083201b..10d07daf27 100644 ---- a/drivers/serial/Kconfig -+++ b/drivers/serial/Kconfig -@@ -415,6 +415,14 @@ config DEBUG_UART_SEMIHOSTING - start up driver model. The driver will be available until the real - driver model serial is running. - -+config DEBUG_UART_SCIF -+ bool "Renesas SCIF UART" -+ depends on SH || ARCH_RMOBILE -+ help -+ Select this to enable a debug UART using the serial_sh driver. You -+ will need to provide parameters to make this work. The driver will -+ be available until the real driver-model serial is running. -+ - config DEBUG_UART_SIFIVE - bool "SiFive UART" - depends on SIFIVE_SERIAL -diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c -index 4671217b59..e08bdcadc9 100644 ---- a/drivers/serial/serial_sh.c -+++ b/drivers/serial/serial_sh.c -@@ -249,9 +249,40 @@ U_BOOT_DRIVER(serial_sh) = { - #endif - .priv_auto = sizeof(struct uart_port), - }; -+#endif - --#else /* CONFIG_DM_SERIAL */ -+#if !CONFIG_IS_ENABLED(DM_SERIAL) || IS_ENABLED(CONFIG_DEBUG_UART_SCIF) - -+#if defined(CFG_SCIF_A) -+ #define SCIF_BASE_PORT PORT_SCIFA -+#elif defined(CFG_SCI) -+ #define SCIF_BASE_PORT PORT_SCI -+#else -+ #define SCIF_BASE_PORT PORT_SCIF -+#endif -+ -+static void sh_serial_init_nodm(struct uart_port *port) -+{ -+ sh_serial_init_generic(port); -+ serial_setbrg(); -+} -+ -+static void sh_serial_putc_nondm(struct uart_port *port, const char c) -+{ -+ if (c == '\n') { -+ while (1) { -+ if (serial_raw_putc(port, '\r') != -EAGAIN) -+ break; -+ } -+ } -+ while (1) { -+ if (serial_raw_putc(port, c) != -EAGAIN) -+ break; -+ } -+} -+#endif -+ -+#if !CONFIG_IS_ENABLED(DM_SERIAL) - #if defined(CONFIG_CONS_SCIF0) - # define SCIF_BASE SCIF0_BASE - #elif defined(CONFIG_CONS_SCIF1) -@@ -274,19 +305,11 @@ U_BOOT_DRIVER(serial_sh) = { - # error "Default SCIF doesn't set....." - #endif - --#if defined(CFG_SCIF_A) -- #define SCIF_BASE_PORT PORT_SCIFA --#elif defined(CONFIG_SCI) -- #define SCIF_BASE_PORT PORT_SCI --#else -- #define SCIF_BASE_PORT PORT_SCIF --#endif -- - static struct uart_port sh_sci = { - .membase = (unsigned char *)SCIF_BASE, - .mapbase = SCIF_BASE, - .type = SCIF_BASE_PORT, --#ifdef CONFIG_SCIF_USE_EXT_CLK -+#ifdef CFG_SCIF_USE_EXT_CLK - .clk_mode = EXT_CLK, - #endif - }; -@@ -301,28 +324,14 @@ static void sh_serial_setbrg(void) - - static int sh_serial_init(void) - { -- struct uart_port *port = &sh_sci; -- -- sh_serial_init_generic(port); -- serial_setbrg(); -+ sh_serial_init_nodm(&sh_sci); - - return 0; - } - - static void sh_serial_putc(const char c) - { -- struct uart_port *port = &sh_sci; -- -- if (c == '\n') { -- while (1) { -- if (serial_raw_putc(port, '\r') != -EAGAIN) -- break; -- } -- } -- while (1) { -- if (serial_raw_putc(port, c) != -EAGAIN) -- break; -- } -+ sh_serial_putc_nondm(&sh_sci, c); - } - - static int sh_serial_tstc(void) -@@ -367,3 +376,29 @@ __weak struct serial_device *default_serial_console(void) - return &sh_serial_drv; - } - #endif /* CONFIG_DM_SERIAL */ -+ -+#ifdef CONFIG_DEBUG_UART_SCIF -+#include -+ -+static struct uart_port debug_uart_sci = { -+ .membase = (unsigned char *)CONFIG_DEBUG_UART_BASE, -+ .mapbase = CONFIG_DEBUG_UART_BASE, -+ .type = SCIF_BASE_PORT, -+#ifdef CFG_SCIF_USE_EXT_CLK -+ .clk_mode = EXT_CLK, -+#endif -+}; -+ -+static inline void _debug_uart_init(void) -+{ -+ sh_serial_init_nodm(&debug_uart_sci); -+} -+ -+static inline void _debug_uart_putc(int c) -+{ -+ sh_serial_putc_nondm(&debug_uart_sci, c); -+} -+ -+DEBUG_UART_FUNCS -+ -+#endif -diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h -index 660aaab663..eb8523dde5 100644 ---- a/drivers/serial/serial_sh.h -+++ b/drivers/serial/serial_sh.h -@@ -406,13 +406,13 @@ SCIF_FNS(SCSPTR, 0, 0, 0x24, 16) - SCIF_FNS(SCLSR, 0, 0, 0x28, 16) - #else - --SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16) -+SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16) - #if defined(CONFIG_CPU_SH7722) --SCIF_FNS(SCSPTR, 0, 0, 0, 0) -+SCIF_FNS(SCSPTR, 0, 0, 0, 0) - #else --SCIF_FNS(SCSPTR, 0, 0, 0x20, 16) -+SCIF_FNS(SCSPTR, 0, 0, 0x20, 16) - #endif --SCIF_FNS(SCLSR, 0, 0, 0x24, 16) -+SCIF_FNS(SCLSR, 0, 0, 0x24, 16) - #endif - SCIF_FNS(DL, 0, 0, 0x0, 0) /* dummy */ - #endif -diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c -index 4e9115dafe..9e6255a172 100644 ---- a/drivers/spi/xilinx_spi.c -+++ b/drivers/spi/xilinx_spi.c -@@ -112,10 +112,9 @@ struct xilinx_spi_priv { - static int xilinx_spi_probe(struct udevice *bus) - { - struct xilinx_spi_priv *priv = dev_get_priv(bus); -- struct xilinx_spi_regs *regs = priv->regs; -- -- priv->regs = (struct xilinx_spi_regs *)dev_read_addr(bus); -+ struct xilinx_spi_regs *regs; - -+ regs = priv->regs = (struct xilinx_spi_regs *)dev_read_addr(bus); - priv->fifo_depth = dev_read_u32_default(bus, "fifo-size", 0); - - writel(SPISSR_RESET_VALUE, ®s->srr); -diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c -index 335b458cb9..c4aee279aa 100644 ---- a/drivers/spi/zynqmp_gqspi.c -+++ b/drivers/spi/zynqmp_gqspi.c -@@ -183,6 +183,11 @@ struct zynqmp_qspi_priv { - const struct spi_mem_op *op; - }; - -+__weak int zynqmp_mmio_write(const u32 address, const u32 mask, const u32 value) -+{ -+ return 0; -+} -+ - static int zynqmp_qspi_of_to_plat(struct udevice *bus) - { - struct zynqmp_qspi_plat *plat = dev_get_plat(bus); -diff --git a/drivers/sysinfo/gpio.c b/drivers/sysinfo/gpio.c -index 1d7f050998..82f90303bb 100644 ---- a/drivers/sysinfo/gpio.c -+++ b/drivers/sysinfo/gpio.c -@@ -57,7 +57,7 @@ static int sysinfo_gpio_get_str(struct udevice *dev, int id, size_t size, char * - int i, ret; - u32 revision; - -- for (i = 0; i < priv->gpio_num; i++) { -+ for (i = 0; ; i++) { - ret = dev_read_u32_index(dev, "revisions", i, - &revision); - if (ret) { -@@ -80,7 +80,8 @@ static int sysinfo_gpio_get_str(struct udevice *dev, int id, size_t size, char * - strncpy(val, name, size); - val[size - 1] = '\0'; - return 0; -- } default: -+ } -+ default: - return -EINVAL; - }; - } -diff --git a/drivers/sysreset/sysreset_mpc83xx.c b/drivers/sysreset/sysreset_mpc83xx.c -index c9a0326659..ca48328f7b 100644 ---- a/drivers/sysreset/sysreset_mpc83xx.c -+++ b/drivers/sysreset/sysreset_mpc83xx.c -@@ -107,7 +107,7 @@ static int print_83xx_arb_event(bool force, char *buf, int size) - if (!force && !gd->arch.arbiter_event_address) - return 0; - -- if (CONFIG_IS_ENABLED(DISPLAY_AER_FULL)) { -+ if (IS_ENABLED(CONFIG_DISPLAY_AER_FULL)) { - res = snprintf(buf, size, - "Arbiter Event Status:\n" - " %s: 0x%08lX\n" -@@ -184,7 +184,7 @@ static int mpc83xx_sysreset_get_status(struct udevice *dev, char *buf, int size) - * TODO(mario.six@gdsys.cc): Move this into a dedicated - * arbiter driver - */ -- if (CONFIG_IS_ENABLED(DISPLAY_AER_FULL) || -+ if (IS_ENABLED(CONFIG_DISPLAY_AER_FULL) || - IS_ENABLED(CONFIG_DISPLAY_AER_BRIEF)) { - /* - * If there was a bus monitor reset event, we force the arbiter -diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig -index f32bd16227..915b2af160 100644 ---- a/drivers/timer/Kconfig -+++ b/drivers/timer/Kconfig -@@ -145,6 +145,13 @@ config DESIGNWARE_APB_TIMER - Enables support for the Designware APB Timer driver. This timer is - present on Altera SoCFPGA SoCs. - -+config FTTMR010_TIMER -+ bool "Faraday Technology timer support" -+ depends on TIMER -+ help -+ Select this to enable support for the timer found on -+ devices using Faraday Technology's IP. -+ - config GXP_TIMER - bool "HPE GXP Timer" - depends on TIMER -diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile -index 3c92113fc6..cdc20f5e94 100644 ---- a/drivers/timer/Makefile -+++ b/drivers/timer/Makefile -@@ -13,6 +13,7 @@ obj-$(CONFIG_$(SPL_)ATMEL_PIT_TIMER) += atmel_pit_timer.o - obj-$(CONFIG_$(SPL_)ATMEL_TCB_TIMER) += atmel_tcb_timer.o - obj-$(CONFIG_CADENCE_TTC_TIMER) += cadence-ttc.o - obj-$(CONFIG_DESIGNWARE_APB_TIMER) += dw-apb-timer.o -+obj-$(CONFIG_FTTMR010_TIMER) += fttmr010_timer.o - obj-$(CONFIG_GXP_TIMER) += gxp-timer.o - obj-$(CONFIG_MPC83XX_TIMER) += mpc83xx_timer.o - obj-$(CONFIG_NOMADIK_MTU_TIMER) += nomadik-mtu-timer.o -diff --git a/drivers/timer/fttmr010_timer.c b/drivers/timer/fttmr010_timer.c -new file mode 100644 -index 0000000000..b6289e6461 ---- /dev/null -+++ b/drivers/timer/fttmr010_timer.c -@@ -0,0 +1,92 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * (C) Copyright 2009 Faraday Technology -+ * Po-Yu Chuang -+ * -+ * 23/08/2022 Port to DM -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define TIMER_LOAD_VAL 0xffffffff -+ -+struct fttmr010_timer_priv { -+ struct fttmr010 __iomem *regs; -+}; -+ -+static u64 fttmr010_timer_get_count(struct udevice *dev) -+{ -+ struct fttmr010_timer_priv *priv = dev_get_priv(dev); -+ struct fttmr010 *tmr = priv->regs; -+ u32 now = TIMER_LOAD_VAL - readl(&tmr->timer3_counter); -+ -+ /* increment tbu if tbl has rolled over */ -+ if (now < gd->arch.tbl) -+ gd->arch.tbu++; -+ gd->arch.tbl = now; -+ -+ return ((u64)gd->arch.tbu << 32) | gd->arch.tbl; -+} -+ -+static int fttmr010_timer_probe(struct udevice *dev) -+{ -+ struct fttmr010_timer_priv *priv = dev_get_priv(dev); -+ struct fttmr010 *tmr; -+ unsigned int cr; -+ -+ priv->regs = dev_read_addr_ptr(dev); -+ if (!priv->regs) -+ return -EINVAL; -+ tmr = priv->regs; -+ -+ debug("Faraday FTTMR010 timer revision 0x%08X\n", readl(&tmr->revision)); -+ -+ /* disable timers */ -+ writel(0, &tmr->cr); -+ -+ /* setup timer */ -+ writel(TIMER_LOAD_VAL, &tmr->timer3_load); -+ writel(TIMER_LOAD_VAL, &tmr->timer3_counter); -+ writel(0, &tmr->timer3_match1); -+ writel(0, &tmr->timer3_match2); -+ -+ /* we don't want timer to issue interrupts */ -+ writel(FTTMR010_TM3_MATCH1 | -+ FTTMR010_TM3_MATCH2 | -+ FTTMR010_TM3_OVERFLOW, -+ &tmr->interrupt_mask); -+ -+ cr = readl(&tmr->cr); -+ cr |= FTTMR010_TM3_CLOCK; /* use external clock */ -+ cr |= FTTMR010_TM3_ENABLE; -+ writel(cr, &tmr->cr); -+ -+ gd->arch.tbl = 0; -+ gd->arch.tbu = 0; -+ -+ return 0; -+} -+ -+static const struct timer_ops fttmr010_timer_ops = { -+ .get_count = fttmr010_timer_get_count, -+}; -+ -+static const struct udevice_id fttmr010_timer_ids[] = { -+ { .compatible = "faraday,fttmr010-timer" }, -+ {} -+}; -+ -+U_BOOT_DRIVER(fttmr010_timer) = { -+ .name = "fttmr010_timer", -+ .id = UCLASS_TIMER, -+ .of_match = fttmr010_timer_ids, -+ .priv_auto = sizeof(struct fttmr010_timer_priv), -+ .probe = fttmr010_timer_probe, -+ .ops = &fttmr010_timer_ops, -+}; -diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c -index 192c7b71a5..f86a0b8692 100644 ---- a/drivers/timer/tsc_timer.c -+++ b/drivers/timer/tsc_timer.c -@@ -404,6 +404,15 @@ static void tsc_timer_ensure_setup(bool early) - if (!gd->arch.clock_rate) { - unsigned long fast_calibrate; - -+ /** -+ * There is no obvious way to obtain this information from EFI -+ * boot services. This value was measured on a Framework Laptop -+ * which has a 12th Gen Intel Core -+ */ -+ if (IS_ENABLED(CONFIG_EFI_APP)) { -+ fast_calibrate = 2750; -+ goto done; -+ } - fast_calibrate = native_calibrate_tsc(); - if (fast_calibrate) - goto done; -diff --git a/drivers/tpm/tpm2_tis_sandbox.c b/drivers/tpm/tpm2_tis_sandbox.c -index dd94bdc31f..e4004cfcca 100644 ---- a/drivers/tpm/tpm2_tis_sandbox.c -+++ b/drivers/tpm/tpm2_tis_sandbox.c -@@ -810,7 +810,7 @@ static int sandbox_tpm2_open(struct udevice *dev) - struct sandbox_tpm2 *tpm = dev_get_priv(dev); - - if (tpm->init_done) -- return -EIO; -+ return -EBUSY; - - tpm->init_done = true; - -diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig -index f010291d02..c0c8c16fd9 100644 ---- a/drivers/usb/dwc3/Kconfig -+++ b/drivers/usb/dwc3/Kconfig -@@ -40,7 +40,7 @@ config SPL_USB_DWC3_GENERIC - config USB_DWC3_MESON_G12A - bool "Amlogic Meson G12A USB wrapper" - depends on DM_USB && USB_DWC3 && ARCH_MESON -- imply PHY -+ select PHY - help - Select this for Amlogic Meson G12A Platforms. - This wrapper supports Host and Peripheral operation modes. -@@ -48,14 +48,17 @@ config USB_DWC3_MESON_G12A - config USB_DWC3_MESON_GXL - bool "Amlogic Meson GXL USB wrapper" - depends on DM_USB && USB_DWC3 && ARCH_MESON -- imply PHY -+ select PHY - help - Select this for Amlogic Meson GXL and GXM Platforms. - This wrapper supports Host and Peripheral operation modes. - - config USB_DWC3_UNIPHIER - bool "DesignWare USB3 Host Support on UniPhier Platforms" -- depends on ARCH_UNIPHIER && USB_XHCI_DWC3 -+ depends on ARCH_UNIPHIER && USB_DWC3 -+ select USB_DWC3_GENERIC -+ select PHY -+ select PHY_UNIPHIER_USB3 - help - Support of USB2/3 functionality in Socionext UniPhier platforms. - Say 'Y' here if you have one such device. -diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c -index ed1b9b630e..66da5a8d6f 100644 ---- a/drivers/usb/dwc3/dwc3-generic.c -+++ b/drivers/usb/dwc3/dwc3-generic.c -@@ -28,11 +28,7 @@ - #include - #include - --struct dwc3_glue_data { -- struct clk_bulk clks; -- struct reset_ctl_bulk resets; -- fdt_addr_t regs; --}; -+#include "dwc3-generic.h" - - struct dwc3_generic_plat { - fdt_addr_t base; -@@ -68,10 +64,27 @@ static int dwc3_generic_probe(struct udevice *dev, - #if CONFIG_IS_ENABLED(OF_CONTROL) - dwc3_of_parse(dwc3); - -+ /* -+ * There are currently four disparate placement possibilities of DWC3 -+ * reference clock phandle in SoC DTs: -+ * - in top level glue node, with generic subnode without clock (ZynqMP) -+ * - in top level generic node, with no subnode (i.MX8MQ) -+ * - in generic subnode, with other clock in top level node (i.MX8MP) -+ * - in both top level node and generic subnode (Rockchip) -+ * Cover all the possibilities here by looking into both nodes, start -+ * with the top level node as that seems to be used in majority of DTs -+ * to reference the clock. -+ */ - node = dev_ofnode(dev->parent); - index = ofnode_stringlist_search(node, "clock-names", "ref"); - if (index < 0) - index = ofnode_stringlist_search(node, "clock-names", "ref_clk"); -+ if (index < 0) { -+ node = dev_ofnode(dev); -+ index = ofnode_stringlist_search(node, "clock-names", "ref"); -+ if (index < 0) -+ index = ofnode_stringlist_search(node, "clock-names", "ref_clk"); -+ } - if (index >= 0) - dwc3->ref_clk = &glue->clks.clks[index]; - #endif -@@ -258,11 +271,6 @@ U_BOOT_DRIVER(dwc3_generic_host) = { - }; - #endif - --struct dwc3_glue_ops { -- void (*glue_configure)(struct udevice *dev, int index, -- enum usb_dr_mode mode); --}; -- - void dwc3_imx8mp_glue_configure(struct udevice *dev, int index, - enum usb_dr_mode mode) - { -@@ -398,54 +406,74 @@ struct dwc3_glue_ops ti_ops = { - .glue_configure = dwc3_ti_glue_configure, - }; - --static int dwc3_glue_bind(struct udevice *parent) -+static int dwc3_glue_bind_common(struct udevice *parent, ofnode node) - { -- ofnode node; -- int ret; -+ const char *name = ofnode_get_name(node); -+ const char *driver = NULL; - enum usb_dr_mode dr_mode; -+ struct udevice *dev; -+ int ret; - -- dr_mode = usb_get_dr_mode(dev_ofnode(parent)); -- -- ofnode_for_each_subnode(node, dev_ofnode(parent)) { -- const char *name = ofnode_get_name(node); -- struct udevice *dev; -- const char *driver = NULL; -- -- debug("%s: subnode name: %s\n", __func__, name); -+ debug("%s: subnode name: %s\n", __func__, name); - -- /* if the parent node doesn't have a mode check the leaf */ -- if (!dr_mode) -- dr_mode = usb_get_dr_mode(node); -+ /* if the parent node doesn't have a mode check the leaf */ -+ dr_mode = usb_get_dr_mode(dev_ofnode(parent)); -+ if (!dr_mode) -+ dr_mode = usb_get_dr_mode(node); - -- switch (dr_mode) { -- case USB_DR_MODE_PERIPHERAL: -- case USB_DR_MODE_OTG: -+ switch (dr_mode) { -+ case USB_DR_MODE_PERIPHERAL: -+ case USB_DR_MODE_OTG: - #if CONFIG_IS_ENABLED(DM_USB_GADGET) -- debug("%s: dr_mode: OTG or Peripheral\n", __func__); -- driver = "dwc3-generic-peripheral"; -+ debug("%s: dr_mode: OTG or Peripheral\n", __func__); -+ driver = "dwc3-generic-peripheral"; - #endif -- break; -+ break; - #if defined(CONFIG_SPL_USB_HOST) || !defined(CONFIG_SPL_BUILD) -- case USB_DR_MODE_HOST: -- debug("%s: dr_mode: HOST\n", __func__); -- driver = "dwc3-generic-host"; -- break; -+ case USB_DR_MODE_HOST: -+ debug("%s: dr_mode: HOST\n", __func__); -+ driver = "dwc3-generic-host"; -+ break; - #endif -- default: -- debug("%s: unsupported dr_mode\n", __func__); -- return -ENODEV; -- }; -+ default: -+ debug("%s: unsupported dr_mode\n", __func__); -+ return -ENODEV; -+ }; - -- if (!driver) -- continue; -+ if (!driver) -+ return -ENXIO; -+ -+ ret = device_bind_driver_to_node(parent, driver, name, -+ node, &dev); -+ if (ret) { -+ debug("%s: not able to bind usb device mode\n", -+ __func__); -+ return ret; -+ } -+ -+ return 0; -+} - -- ret = device_bind_driver_to_node(parent, driver, name, -- node, &dev); -- if (ret) { -- debug("%s: not able to bind usb device mode\n", -- __func__); -+int dwc3_glue_bind(struct udevice *parent) -+{ -+ struct dwc3_glue_ops *ops = (struct dwc3_glue_ops *)dev_get_driver_data(parent); -+ ofnode node; -+ int ret; -+ -+ if (ops && ops->glue_get_ctrl_dev) { -+ ret = ops->glue_get_ctrl_dev(parent, &node); -+ if (ret) -+ return ret; -+ -+ return dwc3_glue_bind_common(parent, node); -+ } -+ -+ ofnode_for_each_subnode(node, dev_ofnode(parent)) { -+ ret = dwc3_glue_bind_common(parent, node); -+ if (ret == -ENXIO) -+ continue; -+ if (ret) - return ret; -- } - } - - return 0; -@@ -493,7 +521,7 @@ static int dwc3_glue_clk_init(struct udevice *dev, - return 0; - } - --static int dwc3_glue_probe(struct udevice *dev) -+int dwc3_glue_probe(struct udevice *dev) - { - struct dwc3_glue_ops *ops = (struct dwc3_glue_ops *)dev_get_driver_data(dev); - struct dwc3_glue_data *glue = dev_get_plat(dev); -@@ -514,7 +542,7 @@ static int dwc3_glue_probe(struct udevice *dev) - phy.dev = NULL; - } - -- glue->regs = dev_read_addr(dev); -+ glue->regs = dev_read_addr_size_index(dev, 0, &glue->size); - - ret = dwc3_glue_clk_init(dev, glue); - if (ret) -@@ -534,6 +562,12 @@ static int dwc3_glue_probe(struct udevice *dev) - if (ret) - return ret; - -+ if (glue->clks.count == 0) { -+ ret = dwc3_glue_clk_init(child, glue); -+ if (ret) -+ return ret; -+ } -+ - if (glue->resets.count == 0) { - ret = dwc3_glue_reset_init(child, glue); - if (ret) -@@ -553,7 +587,7 @@ static int dwc3_glue_probe(struct udevice *dev) - return 0; - } - --static int dwc3_glue_remove(struct udevice *dev) -+int dwc3_glue_remove(struct udevice *dev) - { - struct dwc3_glue_data *glue = dev_get_plat(dev); - -diff --git a/drivers/usb/dwc3/dwc3-generic.h b/drivers/usb/dwc3/dwc3-generic.h -new file mode 100644 -index 0000000000..40902c8923 ---- /dev/null -+++ b/drivers/usb/dwc3/dwc3-generic.h -@@ -0,0 +1,33 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * dwc3-generic.h - Generic DWC3 Glue layer header -+ * -+ * Copyright (C) 2016 - 2018 Xilinx, Inc. -+ * Copyright (C) 2023 Socionext Inc. -+ */ -+ -+#ifndef __DRIVERS_USB_DWC3_GENERIC_H -+#define __DRIVERS_USB_DWC3_GENERIC_H -+ -+#include -+#include -+#include -+ -+struct dwc3_glue_data { -+ struct clk_bulk clks; -+ struct reset_ctl_bulk resets; -+ fdt_addr_t regs; -+ fdt_size_t size; -+}; -+ -+struct dwc3_glue_ops { -+ int (*glue_get_ctrl_dev)(struct udevice *parent, ofnode *node); -+ void (*glue_configure)(struct udevice *dev, int index, -+ enum usb_dr_mode mode); -+}; -+ -+int dwc3_glue_bind(struct udevice *parent); -+int dwc3_glue_probe(struct udevice *dev); -+int dwc3_glue_remove(struct udevice *dev); -+ -+#endif -diff --git a/drivers/usb/dwc3/dwc3-uniphier.c b/drivers/usb/dwc3/dwc3-uniphier.c -index 54b52dcd66..ab85428a70 100644 ---- a/drivers/usb/dwc3/dwc3-uniphier.c -+++ b/drivers/usb/dwc3/dwc3-uniphier.c -@@ -4,14 +4,17 @@ - * - * Copyright (C) 2016-2017 Socionext Inc. - * Author: Masahiro Yamada -+ * Author: Kunihiko Hayashi - */ - - #include --#include -+#include - #include --#include --#include --#include -+#include -+ -+#include "core.h" -+#include "gadget.h" -+#include "dwc3-generic.h" - - #define UNIPHIER_PRO4_DWC3_RESET 0x40 - #define UNIPHIER_PRO4_DWC3_RESET_XIOMMU BIT(5) -@@ -27,8 +30,11 @@ - #define UNIPHIER_PXS2_DWC3_RESET 0x00 - #define UNIPHIER_PXS2_DWC3_RESET_XLINK BIT(15) - --static int uniphier_pro4_dwc3_init(void __iomem *regs) -+static void uniphier_pro4_dwc3_init(struct udevice *dev, int index, -+ enum usb_dr_mode mode) - { -+ struct dwc3_glue_data *glue = dev_get_plat(dev); -+ void *regs = map_physmem(glue->regs, glue->size, MAP_NOCACHE); - u32 tmp; - - tmp = readl(regs + UNIPHIER_PRO4_DWC3_RESET); -@@ -36,11 +42,14 @@ static int uniphier_pro4_dwc3_init(void __iomem *regs) - tmp |= UNIPHIER_PRO4_DWC3_RESET_XIOMMU | UNIPHIER_PRO4_DWC3_RESET_XLINK; - writel(tmp, regs + UNIPHIER_PRO4_DWC3_RESET); - -- return 0; -+ unmap_physmem(regs, MAP_NOCACHE); - } - --static int uniphier_pro5_dwc3_init(void __iomem *regs) -+static void uniphier_pro5_dwc3_init(struct udevice *dev, int index, -+ enum usb_dr_mode mode) - { -+ struct dwc3_glue_data *glue = dev_get_plat(dev); -+ void *regs = map_physmem(glue->regs, glue->size, MAP_NOCACHE); - u32 tmp; - - tmp = readl(regs + UNIPHIER_PRO5_DWC3_RESET); -@@ -49,72 +58,97 @@ static int uniphier_pro5_dwc3_init(void __iomem *regs) - tmp |= UNIPHIER_PRO5_DWC3_RESET_XLINK | UNIPHIER_PRO5_DWC3_RESET_XIOMMU; - writel(tmp, regs + UNIPHIER_PRO5_DWC3_RESET); - -- return 0; -+ unmap_physmem(regs, MAP_NOCACHE); - } - --static int uniphier_pxs2_dwc3_init(void __iomem *regs) -+static void uniphier_pxs2_dwc3_init(struct udevice *dev, int index, -+ enum usb_dr_mode mode) - { -+ struct dwc3_glue_data *glue = dev_get_plat(dev); -+ void *regs = map_physmem(glue->regs, glue->size, MAP_NOCACHE); - u32 tmp; - - tmp = readl(regs + UNIPHIER_PXS2_DWC3_RESET); - tmp |= UNIPHIER_PXS2_DWC3_RESET_XLINK; - writel(tmp, regs + UNIPHIER_PXS2_DWC3_RESET); - -- return 0; -+ unmap_physmem(regs, MAP_NOCACHE); - } - --static int uniphier_dwc3_probe(struct udevice *dev) -+static int dwc3_uniphier_glue_get_ctrl_dev(struct udevice *dev, ofnode *node) - { -- fdt_addr_t base; -- void __iomem *regs; -- int (*init)(void __iomem *regs); -- int ret; -+ struct udevice *child; -+ const char *name; -+ ofnode subnode; -+ -+ /* -+ * "controller reset" belongs to glue logic, and it should be -+ * accessible in .glue_configure() before access to the controller -+ * begins. -+ */ -+ ofnode_for_each_subnode(subnode, dev_ofnode(dev)) { -+ name = ofnode_get_name(subnode); -+ if (!strncmp(name, "reset", 5)) -+ device_bind_driver_to_node(dev, "uniphier-reset", -+ name, subnode, &child); -+ } -+ -+ /* Get controller node that is placed separately from the glue node */ -+ *node = ofnode_by_compatible(dev_ofnode(dev->parent), -+ "socionext,uniphier-dwc3"); - -- base = dev_read_addr(dev); -- if (base == FDT_ADDR_T_NONE) -- return -EINVAL; -- -- regs = ioremap(base, SZ_32K); -- if (!regs) -- return -ENOMEM; -+ return 0; -+} - -- init = (typeof(init))dev_get_driver_data(dev); -- ret = init(regs); -- if (ret) -- dev_err(dev, "failed to init glue layer\n"); -+static const struct dwc3_glue_ops uniphier_pro4_dwc3_ops = { -+ .glue_get_ctrl_dev = dwc3_uniphier_glue_get_ctrl_dev, -+ .glue_configure = uniphier_pro4_dwc3_init, -+}; - -- iounmap(regs); -+static const struct dwc3_glue_ops uniphier_pro5_dwc3_ops = { -+ .glue_get_ctrl_dev = dwc3_uniphier_glue_get_ctrl_dev, -+ .glue_configure = uniphier_pro5_dwc3_init, -+}; - -- return ret; --} -+static const struct dwc3_glue_ops uniphier_pxs2_dwc3_ops = { -+ .glue_get_ctrl_dev = dwc3_uniphier_glue_get_ctrl_dev, -+ .glue_configure = uniphier_pxs2_dwc3_init, -+}; - - static const struct udevice_id uniphier_dwc3_match[] = { - { -- .compatible = "socionext,uniphier-pro4-dwc3", -- .data = (ulong)uniphier_pro4_dwc3_init, -+ .compatible = "socionext,uniphier-pro4-dwc3-glue", -+ .data = (ulong)&uniphier_pro4_dwc3_ops, -+ }, -+ { -+ .compatible = "socionext,uniphier-pro5-dwc3-glue", -+ .data = (ulong)&uniphier_pro5_dwc3_ops, - }, - { -- .compatible = "socionext,uniphier-pro5-dwc3", -- .data = (ulong)uniphier_pro5_dwc3_init, -+ .compatible = "socionext,uniphier-pxs2-dwc3-glue", -+ .data = (ulong)&uniphier_pxs2_dwc3_ops, - }, - { -- .compatible = "socionext,uniphier-pxs2-dwc3", -- .data = (ulong)uniphier_pxs2_dwc3_init, -+ .compatible = "socionext,uniphier-ld20-dwc3-glue", -+ .data = (ulong)&uniphier_pxs2_dwc3_ops, - }, - { -- .compatible = "socionext,uniphier-ld20-dwc3", -- .data = (ulong)uniphier_pxs2_dwc3_init, -+ .compatible = "socionext,uniphier-pxs3-dwc3-glue", -+ .data = (ulong)&uniphier_pxs2_dwc3_ops, - }, - { -- .compatible = "socionext,uniphier-pxs3-dwc3", -- .data = (ulong)uniphier_pxs2_dwc3_init, -+ .compatible = "socionext,uniphier-nx1-dwc3-glue", -+ .data = (ulong)&uniphier_pxs2_dwc3_ops, - }, - { /* sentinel */ } - }; - --U_BOOT_DRIVER(usb_xhci) = { -+U_BOOT_DRIVER(dwc3_uniphier_wrapper) = { - .name = "uniphier-dwc3", - .id = UCLASS_SIMPLE_BUS, - .of_match = uniphier_dwc3_match, -- .probe = uniphier_dwc3_probe, -+ .bind = dwc3_glue_bind, -+ .probe = dwc3_glue_probe, -+ .remove = dwc3_glue_remove, -+ .plat_auto = sizeof(struct dwc3_glue_data), - }; -diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c -index 2a309e624e..04b8541993 100644 ---- a/drivers/usb/gadget/composite.c -+++ b/drivers/usb/gadget/composite.c -@@ -1068,7 +1068,7 @@ composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl) - if (!gadget_is_dualspeed(gadget) || - gadget->speed >= USB_SPEED_SUPER) - break; -- -+ fallthrough; - case USB_DT_CONFIG: - value = config_desc(cdev, w_value); - if (value >= 0) -diff --git a/drivers/usb/gadget/f_sdp.c b/drivers/usb/gadget/f_sdp.c -index 9ea43f29cf..4da5a160a0 100644 ---- a/drivers/usb/gadget/f_sdp.c -+++ b/drivers/usb/gadget/f_sdp.c -@@ -865,6 +865,7 @@ static int sdp_handle_in_ep(struct spl_image_info *spl_image, - struct spl_image_info spl_image = {}; - struct spl_boot_device bootdev = {}; - spl_parse_image_header(&spl_image, &bootdev, header); -+ spl_board_prepare_for_boot(); - jump_to_image_no_args(&spl_image); - #else - /* In U-Boot, allow jumps to scripts */ -diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c -index 3838a990ec..63dfb793c6 100644 ---- a/drivers/usb/host/xhci-mtk.c -+++ b/drivers/usb/host/xhci-mtk.c -@@ -14,8 +14,9 @@ - #include - #include - #include --#include -+#include - #include -+#include - #include - - /* IPPC (IP Port Control) registers */ -@@ -50,6 +51,25 @@ - #define IPPC_U3_CTRL(p) (IPPC_U3_CTRL_0P + ((p) * 0x08)) - #define IPPC_U2_CTRL(p) (IPPC_U2_CTRL_0P + ((p) * 0x08)) - -+/* xHCI CSR */ -+#define LS_EOF_CFG 0x930 -+#define LSEOF_OFFSET 0x89 -+ -+#define FS_EOF_CFG 0x934 -+#define FSEOF_OFFSET 0x2e -+ -+#define SS_GEN1_EOF_CFG 0x93c -+#define SSG1EOF_OFFSET 0x78 -+ -+#define HFCNTR_CFG 0x944 -+#define ITP_DELTA_CLK_MASK GENMASK(5, 1) -+#define FRMCNT_LEV1_RANG_MASK GENMASK(19, 8) -+ -+#define SS_GEN2_EOF_CFG 0x990 -+#define SSG2EOF_OFFSET 0x3c -+ -+#define XSEOF_OFFSET_MASK GENMASK(11, 0) -+ - struct mtk_xhci { - struct xhci_ctrl ctrl; /* Needs to come first in this struct! */ - struct xhci_hccr *hcd; -@@ -65,6 +85,30 @@ struct mtk_xhci { - u32 u2p_dis_msk; - }; - -+/* -+ * workaround for mt8195: -+ * MT8195 has 4 controllers, the controller1~3's default SOF/ITP interval -+ * is calculated from the frame counter clock 24M, but in fact, the clock -+ * is 48M. -+ */ -+static void xhci_mtk_set_frame_interval(struct mtk_xhci *mtk) -+{ -+ void __iomem *mac = (void __iomem *)mtk->hcd; -+ -+ if (!ofnode_device_is_compatible(dev_ofnode(mtk->dev), "mediatek,mt8195-xhci")) -+ return; -+ -+ clrsetbits_le32(mac + HFCNTR_CFG, -+ ITP_DELTA_CLK_MASK | FRMCNT_LEV1_RANG_MASK, -+ FIELD_PREP(ITP_DELTA_CLK_MASK, 0xa) | -+ FIELD_PREP(FRMCNT_LEV1_RANG_MASK, 0x12b)); -+ -+ clrsetbits_le32(mac + LS_EOF_CFG, XSEOF_OFFSET_MASK, LSEOF_OFFSET); -+ clrsetbits_le32(mac + FS_EOF_CFG, XSEOF_OFFSET_MASK, FSEOF_OFFSET); -+ clrsetbits_le32(mac + SS_GEN1_EOF_CFG, XSEOF_OFFSET_MASK, SSG1EOF_OFFSET); -+ clrsetbits_le32(mac + SS_GEN2_EOF_CFG, XSEOF_OFFSET_MASK, SSG2EOF_OFFSET); -+} -+ - static int xhci_mtk_host_enable(struct mtk_xhci *mtk) - { - int u3_ports_disabed = 0; -@@ -278,6 +322,8 @@ static int xhci_mtk_probe(struct udevice *dev) - if (ret) - goto ssusb_init_err; - -+ xhci_mtk_set_frame_interval(mtk); -+ - mtk->ctrl.quirks = XHCI_MTK_HOST; - hcor = (struct xhci_hcor *)((uintptr_t)mtk->hcd + - HC_LENGTH(xhci_readl(&mtk->hcd->cr_capbase))); -@@ -308,6 +354,7 @@ static int xhci_mtk_remove(struct udevice *dev) - - static const struct udevice_id xhci_mtk_ids[] = { - { .compatible = "mediatek,mtk-xhci" }, -+ { .compatible = "mediatek,mt8195-xhci" }, - { } - }; - -diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig -index 2a76d19cc8..60f4a4bf9c 100644 ---- a/drivers/video/Kconfig -+++ b/drivers/video/Kconfig -@@ -16,6 +16,35 @@ config VIDEO - - if VIDEO - -+config VIDEO_FONT_4X6 -+ bool "4 x 6 font size" -+ help -+ Font for video console driver, 4 x 6 pixels. -+ Provides character bitmap data in header file. -+ When selecting multiple fonts, you may want to enable CMD_SELECT_FONT too. -+ -+config VIDEO_FONT_8X16 -+ bool "8 x 16 font size" -+ default y -+ help -+ Font for video console driver, 8 x 16 pixels -+ Provides character bitmap data in header file. -+ When selecting multiple fonts, you may want to enable CMD_SELECT_FONT too. -+ -+config VIDEO_FONT_SUN12X22 -+ bool "12 x 22 font size" -+ help -+ Font for video console driver, 12 x 22 pixels -+ Provides character bitmap data in header file. -+ When selecting multiple fonts, you may want to enable CMD_SELECT_FONT too. -+ -+config VIDEO_FONT_16X32 -+ bool "16 x 32 font size" -+ help -+ Font for video console driver, 16 x 32 pixels -+ Provides character bitmap data in header file. -+ When selecting multiple fonts, you may want to enable CMD_SELECT_FONT too. -+ - config VIDEO_LOGO - bool "Show the U-Boot logo on the display" - default y if !SPLASH_SCREEN -@@ -150,6 +179,7 @@ config CONSOLE_ROTATION - - config CONSOLE_TRUETYPE - bool "Support a console that uses TrueType fonts" -+ select CMD_SELECT_FONT - help - TrueTrype fonts can provide outline-drawing capability rather than - needing to provide a bitmap for each font and size that is needed. -diff --git a/drivers/video/Makefile b/drivers/video/Makefile -index cdb7d9a54d..cb3f373645 100644 ---- a/drivers/video/Makefile -+++ b/drivers/video/Makefile -@@ -9,6 +9,12 @@ obj-$(CONFIG_BACKLIGHT_GPIO) += backlight_gpio.o - obj-$(CONFIG_BACKLIGHT_PWM) += pwm_backlight.o - obj-$(CONFIG_CONSOLE_NORMAL) += console_normal.o - obj-$(CONFIG_CONSOLE_ROTATION) += console_rotate.o -+ifdef CONFIG_CONSOLE_NORMAL -+obj-y += console_core.o -+else ifdef CONFIG_CONSOLE_ROTATION -+obj-y += console_core.o -+endif -+obj-$(CONFIG_CONSOLE_ROTATION) += console_core.o - obj-$(CONFIG_CONSOLE_TRUETYPE) += console_truetype.o fonts/ - obj-$(CONFIG_DISPLAY) += display-uclass.o - obj-$(CONFIG_VIDEO_MIPI_DSI) += dsi-host-uclass.o -diff --git a/drivers/video/console_core.c b/drivers/video/console_core.c -new file mode 100644 -index 0000000000..d4f79c656a ---- /dev/null -+++ b/drivers/video/console_core.c -@@ -0,0 +1,212 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (c) 2015 Google, Inc -+ * (C) Copyright 2015 -+ * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com -+ * (C) Copyright 2023 Dzmitry Sankouski -+ */ -+ -+#include -+#include -+#include -+#include -+#include "vidconsole_internal.h" -+ -+/** -+ * console_set_font() - prepare vidconsole for chosen font. -+ * -+ * @dev vidconsole device -+ * @fontdata pointer to font data struct -+ */ -+static int console_set_font(struct udevice *dev, struct video_fontdata *fontdata) -+{ -+ struct console_simple_priv *priv = dev_get_priv(dev); -+ struct vidconsole_priv *vc_priv = dev_get_uclass_priv(dev); -+ struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent); -+ -+ debug("console_simple: setting %s font\n", fontdata->name); -+ debug("width: %d\n", fontdata->width); -+ debug("byte width: %d\n", fontdata->byte_width); -+ debug("height: %d\n", fontdata->height); -+ -+ priv->fontdata = fontdata; -+ vc_priv->x_charsize = fontdata->width; -+ vc_priv->y_charsize = fontdata->height; -+ if (vid_priv->rot % 2) { -+ vc_priv->cols = vid_priv->ysize / fontdata->width; -+ vc_priv->rows = vid_priv->xsize / fontdata->height; -+ vc_priv->xsize_frac = VID_TO_POS(vid_priv->ysize); -+ } else { -+ vc_priv->cols = vid_priv->xsize / fontdata->width; -+ vc_priv->rows = vid_priv->ysize / fontdata->height; -+ } -+ -+ return 0; -+} -+ -+int check_bpix_support(int bpix) -+{ -+ if (bpix == VIDEO_BPP8 && IS_ENABLED(CONFIG_VIDEO_BPP8)) -+ return 0; -+ else if (bpix == VIDEO_BPP16 && IS_ENABLED(CONFIG_VIDEO_BPP16)) -+ return 0; -+ else if (bpix == VIDEO_BPP32 && IS_ENABLED(CONFIG_VIDEO_BPP32)) -+ return 0; -+ else -+ return -ENOSYS; -+} -+ -+inline void fill_pixel_and_goto_next(void **dstp, u32 value, int pbytes, int step) -+{ -+ u8 *dst_byte = *dstp; -+ -+ if (pbytes == 4) { -+ u32 *dst = *dstp; -+ *dst = value; -+ } -+ if (pbytes == 2) { -+ u16 *dst = *dstp; -+ *dst = value; -+ } -+ if (pbytes == 1) { -+ u8 *dst = *dstp; -+ *dst = value; -+ } -+ *dstp = dst_byte + step; -+} -+ -+int fill_char_vertically(uchar *pfont, void **line, struct video_priv *vid_priv, -+ struct video_fontdata *fontdata, bool direction) -+{ -+ int step, line_step, pbytes, bitcount, width_remainder, ret; -+ void *dst; -+ -+ ret = check_bpix_support(vid_priv->bpix); -+ if (ret) -+ return ret; -+ -+ pbytes = VNBYTES(vid_priv->bpix); -+ if (direction) { -+ step = -pbytes; -+ line_step = -vid_priv->line_length; -+ } else { -+ step = pbytes; -+ line_step = vid_priv->line_length; -+ } -+ -+ width_remainder = fontdata->width % 8; -+ for (int row = 0; row < fontdata->height; row++) { -+ uchar bits; -+ -+ bitcount = 8; -+ dst = *line; -+ for (int col = 0; col < fontdata->byte_width; col++) { -+ if (width_remainder) { -+ bool is_last_col = (fontdata->byte_width - col == 1); -+ -+ if (is_last_col) -+ bitcount = width_remainder; -+ } -+ bits = pfont[col]; -+ -+ for (int bit = 0; bit < bitcount; bit++) { -+ u32 value = (bits & 0x80) ? -+ vid_priv->colour_fg : -+ vid_priv->colour_bg; -+ -+ fill_pixel_and_goto_next(&dst, -+ value, -+ pbytes, -+ step -+ ); -+ bits <<= 1; -+ } -+ } -+ *line += line_step; -+ pfont += fontdata->byte_width; -+ } -+ return ret; -+} -+ -+int fill_char_horizontally(uchar *pfont, void **line, struct video_priv *vid_priv, -+ struct video_fontdata *fontdata, bool direction) -+{ -+ int step, line_step, pbytes, bitcount = 8, width_remainder, ret; -+ void *dst; -+ u8 mask; -+ -+ ret = check_bpix_support(vid_priv->bpix); -+ if (ret) -+ return ret; -+ -+ pbytes = VNBYTES(vid_priv->bpix); -+ if (direction) { -+ step = -pbytes; -+ line_step = vid_priv->line_length; -+ } else { -+ step = pbytes; -+ line_step = -vid_priv->line_length; -+ } -+ -+ width_remainder = fontdata->width % 8; -+ for (int col = 0; col < fontdata->byte_width; col++) { -+ mask = 0x80; -+ if (width_remainder) { -+ bool is_last_col = (fontdata->byte_width - col == 1); -+ -+ if (is_last_col) -+ bitcount = width_remainder; -+ } -+ for (int bit = 0; bit < bitcount; bit++) { -+ dst = *line; -+ for (int row = 0; row < fontdata->height; row++) { -+ u32 value = (pfont[row * fontdata->byte_width + col] -+ & mask) ? vid_priv->colour_fg : vid_priv->colour_bg; -+ -+ fill_pixel_and_goto_next(&dst, -+ value, -+ pbytes, -+ step -+ ); -+ } -+ *line += line_step; -+ mask >>= 1; -+ } -+ } -+ return ret; -+} -+ -+int console_probe(struct udevice *dev) -+{ -+ return console_set_font(dev, fonts); -+} -+ -+const char *console_simple_get_font_size(struct udevice *dev, uint *sizep) -+{ -+ struct console_simple_priv *priv = dev_get_priv(dev); -+ -+ *sizep = priv->fontdata->width; -+ -+ return priv->fontdata->name; -+} -+ -+int console_simple_get_font(struct udevice *dev, int seq, struct vidfont_info *info) -+{ -+ info->name = fonts[seq].name; -+ -+ return 0; -+} -+ -+int console_simple_select_font(struct udevice *dev, const char *name, uint size) -+{ -+ struct video_fontdata *font; -+ -+ for (font = fonts; font->name; font++) { -+ if (!strcmp(name, font->name)) { -+ console_set_font(dev, font); -+ return 0; -+ } -+ }; -+ printf("no such font: %s, make sure it's name has x format\n", name); -+ return -ENOENT; -+} -diff --git a/drivers/video/console_normal.c b/drivers/video/console_normal.c -index 04f022491e..413c7abee9 100644 ---- a/drivers/video/console_normal.c -+++ b/drivers/video/console_normal.c -@@ -1,10 +1,9 @@ - // SPDX-License-Identifier: GPL-2.0+ - /* - * Copyright (c) 2015 Google, Inc -- * (C) Copyright 2001-2015 -- * DENX Software Engineering -- wd@denx.de -- * Compulab Ltd - http://compulab.co.il/ -+ * (C) Copyright 2015 - * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com -+ * (C) Copyright 2023 Dzmitry Sankouski - */ - - #include -@@ -12,47 +11,30 @@ - #include - #include - #include /* Get font data, width and height */ -+#include "vidconsole_internal.h" - --static int console_normal_set_row(struct udevice *dev, uint row, int clr) -+static int console_set_row(struct udevice *dev, uint row, int clr) - { - struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent); -- void *line, *end; -- int pixels = VIDEO_FONT_HEIGHT * vid_priv->xsize; -+ struct console_simple_priv *priv = dev_get_priv(dev); -+ struct video_fontdata *fontdata = priv->fontdata; -+ void *line, *dst, *end; -+ int pixels = fontdata->height * vid_priv->xsize; - int ret; - int i; -+ int pbytes; -+ -+ ret = check_bpix_support(vid_priv->bpix); -+ if (ret) -+ return ret; -+ -+ line = vid_priv->fb + row * fontdata->height * vid_priv->line_length; -+ dst = line; -+ pbytes = VNBYTES(vid_priv->bpix); -+ for (i = 0; i < pixels; i++) -+ fill_pixel_and_goto_next(&dst, clr, pbytes, pbytes); -+ end = dst; - -- line = vid_priv->fb + row * VIDEO_FONT_HEIGHT * vid_priv->line_length; -- switch (vid_priv->bpix) { -- case VIDEO_BPP8: -- if (IS_ENABLED(CONFIG_VIDEO_BPP8)) { -- uint8_t *dst = line; -- -- for (i = 0; i < pixels; i++) -- *dst++ = clr; -- end = dst; -- break; -- } -- case VIDEO_BPP16: -- if (IS_ENABLED(CONFIG_VIDEO_BPP16)) { -- uint16_t *dst = line; -- -- for (i = 0; i < pixels; i++) -- *dst++ = clr; -- end = dst; -- break; -- } -- case VIDEO_BPP32: -- if (IS_ENABLED(CONFIG_VIDEO_BPP32)) { -- uint32_t *dst = line; -- -- for (i = 0; i < pixels; i++) -- *dst++ = clr; -- end = dst; -- break; -- } -- default: -- return -ENOSYS; -- } - ret = vidconsole_sync_copy(dev, line, end); - if (ret) - return ret; -@@ -60,18 +42,20 @@ static int console_normal_set_row(struct udevice *dev, uint row, int clr) - return 0; - } - --static int console_normal_move_rows(struct udevice *dev, uint rowdst, -- uint rowsrc, uint count) -+static int console_move_rows(struct udevice *dev, uint rowdst, -+ uint rowsrc, uint count) - { - struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent); -+ struct console_simple_priv *priv = dev_get_priv(dev); -+ struct video_fontdata *fontdata = priv->fontdata; - void *dst; - void *src; - int size; - int ret; - -- dst = vid_priv->fb + rowdst * VIDEO_FONT_HEIGHT * vid_priv->line_length; -- src = vid_priv->fb + rowsrc * VIDEO_FONT_HEIGHT * vid_priv->line_length; -- size = VIDEO_FONT_HEIGHT * vid_priv->line_length * count; -+ dst = vid_priv->fb + rowdst * fontdata->height * vid_priv->line_length; -+ src = vid_priv->fb + rowsrc * fontdata->height * vid_priv->line_length; -+ size = fontdata->height * vid_priv->line_length * count; - ret = vidconsole_memmove(dev, dst, src, size); - if (ret) - return ret; -@@ -79,100 +63,53 @@ static int console_normal_move_rows(struct udevice *dev, uint rowdst, - return 0; - } - --static int console_normal_putc_xy(struct udevice *dev, uint x_frac, uint y, -- char ch) -+static int console_putc_xy(struct udevice *dev, uint x_frac, uint y, char ch) - { - struct vidconsole_priv *vc_priv = dev_get_uclass_priv(dev); - struct udevice *vid = dev->parent; - struct video_priv *vid_priv = dev_get_uclass_priv(vid); -- int i, row; -- void *start; -- void *line; -- int ret; -+ struct console_simple_priv *priv = dev_get_priv(dev); -+ struct video_fontdata *fontdata = priv->fontdata; -+ int pbytes = VNBYTES(vid_priv->bpix); -+ int x, linenum, ret; -+ void *start, *line; -+ uchar *pfont = fontdata->video_fontdata + -+ (u8)ch * fontdata->char_pixel_bytes; - -- start = vid_priv->fb + y * vid_priv->line_length + -- VID_TO_PIXEL(x_frac) * VNBYTES(vid_priv->bpix); -+ if (x_frac + VID_TO_POS(vc_priv->x_charsize) > vc_priv->xsize_frac) -+ return -EAGAIN; -+ linenum = y; -+ x = VID_TO_PIXEL(x_frac); -+ start = vid_priv->fb + linenum * vid_priv->line_length + x * pbytes; - line = start; - - if (x_frac + VID_TO_POS(vc_priv->x_charsize) > vc_priv->xsize_frac) - return -EAGAIN; - -- for (row = 0; row < VIDEO_FONT_HEIGHT; row++) { -- unsigned int idx = (u8)ch * VIDEO_FONT_HEIGHT + row; -- uchar bits = video_fontdata[idx]; -- -- switch (vid_priv->bpix) { -- case VIDEO_BPP8: -- if (IS_ENABLED(CONFIG_VIDEO_BPP8)) { -- uint8_t *dst = line; -- -- for (i = 0; i < VIDEO_FONT_WIDTH; i++) { -- *dst++ = (bits & 0x80) ? -- vid_priv->colour_fg : -- vid_priv->colour_bg; -- bits <<= 1; -- } -- break; -- } -- case VIDEO_BPP16: -- if (IS_ENABLED(CONFIG_VIDEO_BPP16)) { -- uint16_t *dst = line; -- -- for (i = 0; i < VIDEO_FONT_WIDTH; i++) { -- *dst++ = (bits & 0x80) ? -- vid_priv->colour_fg : -- vid_priv->colour_bg; -- bits <<= 1; -- } -- break; -- } -- case VIDEO_BPP32: -- if (IS_ENABLED(CONFIG_VIDEO_BPP32)) { -- uint32_t *dst = line; -- -- for (i = 0; i < VIDEO_FONT_WIDTH; i++) { -- *dst++ = (bits & 0x80) ? -- vid_priv->colour_fg : -- vid_priv->colour_bg; -- bits <<= 1; -- } -- break; -- } -- default: -- return -ENOSYS; -- } -- line += vid_priv->line_length; -- } -- ret = vidconsole_sync_copy(dev, start, line); -+ ret = fill_char_vertically(pfont, &line, vid_priv, fontdata, NORMAL_DIRECTION); - if (ret) - return ret; - -- return VID_TO_POS(VIDEO_FONT_WIDTH); --} -- --static int console_normal_probe(struct udevice *dev) --{ -- struct vidconsole_priv *vc_priv = dev_get_uclass_priv(dev); -- struct udevice *vid_dev = dev->parent; -- struct video_priv *vid_priv = dev_get_uclass_priv(vid_dev); -- -- vc_priv->x_charsize = VIDEO_FONT_WIDTH; -- vc_priv->y_charsize = VIDEO_FONT_HEIGHT; -- vc_priv->cols = vid_priv->xsize / VIDEO_FONT_WIDTH; -- vc_priv->rows = vid_priv->ysize / VIDEO_FONT_HEIGHT; -+ ret = vidconsole_sync_copy(dev, start, line); -+ if (ret) -+ return ret; - -- return 0; -+ return VID_TO_POS(fontdata->width); - } - --struct vidconsole_ops console_normal_ops = { -- .putc_xy = console_normal_putc_xy, -- .move_rows = console_normal_move_rows, -- .set_row = console_normal_set_row, -+struct vidconsole_ops console_ops = { -+ .putc_xy = console_putc_xy, -+ .move_rows = console_move_rows, -+ .set_row = console_set_row, -+ .get_font_size = console_simple_get_font_size, -+ .get_font = console_simple_get_font, -+ .select_font = console_simple_select_font, - }; - - U_BOOT_DRIVER(vidconsole_normal) = { -- .name = "vidconsole0", -- .id = UCLASS_VIDEO_CONSOLE, -- .ops = &console_normal_ops, -- .probe = console_normal_probe, -+ .name = "vidconsole0", -+ .id = UCLASS_VIDEO_CONSOLE, -+ .ops = &console_ops, -+ .probe = console_probe, -+ .priv_auto = sizeof(struct console_simple_priv), - }; -diff --git a/drivers/video/console_rotate.c b/drivers/video/console_rotate.c -index 36c8d0609d..65358a1c6e 100644 ---- a/drivers/video/console_rotate.c -+++ b/drivers/video/console_rotate.c -@@ -3,6 +3,7 @@ - * Copyright (c) 2015 Google, Inc - * (C) Copyright 2015 - * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com -+ * (C) Copyright 2023 Dzmitry Sankouski - */ - - #include -@@ -10,47 +11,25 @@ - #include - #include - #include /* Get font data, width and height */ -+#include "vidconsole_internal.h" - - static int console_set_row_1(struct udevice *dev, uint row, int clr) - { - struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent); -+ struct console_simple_priv *priv = dev_get_priv(dev); -+ struct video_fontdata *fontdata = priv->fontdata; - int pbytes = VNBYTES(vid_priv->bpix); -- void *start, *line; -+ void *start, *dst, *line; - int i, j; - int ret; - - start = vid_priv->fb + vid_priv->line_length - -- (row + 1) * VIDEO_FONT_HEIGHT * pbytes; -+ (row + 1) * fontdata->height * pbytes; - line = start; - for (j = 0; j < vid_priv->ysize; j++) { -- switch (vid_priv->bpix) { -- case VIDEO_BPP8: -- if (IS_ENABLED(CONFIG_VIDEO_BPP8)) { -- uint8_t *dst = line; -- -- for (i = 0; i < VIDEO_FONT_HEIGHT; i++) -- *dst++ = clr; -- break; -- } -- case VIDEO_BPP16: -- if (IS_ENABLED(CONFIG_VIDEO_BPP16)) { -- uint16_t *dst = line; -- -- for (i = 0; i < VIDEO_FONT_HEIGHT; i++) -- *dst++ = clr; -- break; -- } -- case VIDEO_BPP32: -- if (IS_ENABLED(CONFIG_VIDEO_BPP32)) { -- uint32_t *dst = line; -- -- for (i = 0; i < VIDEO_FONT_HEIGHT; i++) -- *dst++ = clr; -- break; -- } -- default: -- return -ENOSYS; -- } -+ dst = line; -+ for (i = 0; i < fontdata->height; i++) -+ fill_pixel_and_goto_next(&dst, clr, pbytes, pbytes); - line += vid_priv->line_length; - } - ret = vidconsole_sync_copy(dev, start, line); -@@ -61,22 +40,24 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr) - } - - static int console_move_rows_1(struct udevice *dev, uint rowdst, uint rowsrc, -- uint count) -+ uint count) - { - struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent); -+ struct console_simple_priv *priv = dev_get_priv(dev); -+ struct video_fontdata *fontdata = priv->fontdata; - int pbytes = VNBYTES(vid_priv->bpix); - void *dst; - void *src; - int j, ret; - - dst = vid_priv->fb + vid_priv->line_length - -- (rowdst + count) * VIDEO_FONT_HEIGHT * pbytes; -+ (rowdst + count) * fontdata->height * pbytes; - src = vid_priv->fb + vid_priv->line_length - -- (rowsrc + count) * VIDEO_FONT_HEIGHT * pbytes; -+ (rowsrc + count) * fontdata->height * pbytes; - - for (j = 0; j < vid_priv->ysize; j++) { - ret = vidconsole_memmove(dev, dst, src, -- VIDEO_FONT_HEIGHT * pbytes * count); -+ fontdata->height * pbytes * count); - if (ret) - return ret; - src += vid_priv->line_length; -@@ -91,110 +72,51 @@ static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, char ch) - struct vidconsole_priv *vc_priv = dev_get_uclass_priv(dev); - struct udevice *vid = dev->parent; - struct video_priv *vid_priv = dev_get_uclass_priv(vid); -- uchar *pfont = video_fontdata + (u8)ch * VIDEO_FONT_HEIGHT; -+ struct console_simple_priv *priv = dev_get_priv(dev); -+ struct video_fontdata *fontdata = priv->fontdata; - int pbytes = VNBYTES(vid_priv->bpix); -- int i, col, x, linenum, ret; -- int mask = 0x80; -+ int x, linenum, ret; - void *start, *line; -+ uchar *pfont = fontdata->video_fontdata + -+ (u8)ch * fontdata->char_pixel_bytes; - -+ if (x_frac + VID_TO_POS(vc_priv->x_charsize) > vc_priv->xsize_frac) -+ return -EAGAIN; - linenum = VID_TO_PIXEL(x_frac) + 1; - x = y + 1; - start = vid_priv->fb + linenum * vid_priv->line_length - x * pbytes; - line = start; -- if (x_frac + VID_TO_POS(vc_priv->x_charsize) > vc_priv->xsize_frac) -- return -EAGAIN; - -- for (col = 0; col < VIDEO_FONT_HEIGHT; col++) { -- switch (vid_priv->bpix) { -- case VIDEO_BPP8: -- if (IS_ENABLED(CONFIG_VIDEO_BPP8)) { -- uint8_t *dst = line; -- -- for (i = 0; i < VIDEO_FONT_HEIGHT; i++) { -- *dst-- = (pfont[i] & mask) ? -- vid_priv->colour_fg : -- vid_priv->colour_bg; -- } -- break; -- } -- case VIDEO_BPP16: -- if (IS_ENABLED(CONFIG_VIDEO_BPP16)) { -- uint16_t *dst = line; -- -- for (i = 0; i < VIDEO_FONT_HEIGHT; i++) { -- *dst-- = (pfont[i] & mask) ? -- vid_priv->colour_fg : -- vid_priv->colour_bg; -- } -- break; -- } -- case VIDEO_BPP32: -- if (IS_ENABLED(CONFIG_VIDEO_BPP32)) { -- uint32_t *dst = line; -- -- for (i = 0; i < VIDEO_FONT_HEIGHT; i++) { -- *dst-- = (pfont[i] & mask) ? -- vid_priv->colour_fg : -- vid_priv->colour_bg; -- } -- break; -- } -- default: -- return -ENOSYS; -- } -- line += vid_priv->line_length; -- mask >>= 1; -- } -+ ret = fill_char_horizontally(pfont, &line, vid_priv, fontdata, FLIPPED_DIRECTION); -+ if (ret) -+ return ret; -+ - /* We draw backwards from 'start, so account for the first line */ - ret = vidconsole_sync_copy(dev, start - vid_priv->line_length, line); - if (ret) - return ret; - -- return VID_TO_POS(VIDEO_FONT_WIDTH); -+ return VID_TO_POS(fontdata->width); - } - - - static int console_set_row_2(struct udevice *dev, uint row, int clr) - { - struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent); -- void *start, *line, *end; -- int pixels = VIDEO_FONT_HEIGHT * vid_priv->xsize; -+ struct console_simple_priv *priv = dev_get_priv(dev); -+ struct video_fontdata *fontdata = priv->fontdata; -+ void *start, *line, *dst, *end; -+ int pixels = fontdata->height * vid_priv->xsize; - int i, ret; -+ int pbytes = VNBYTES(vid_priv->bpix); - - start = vid_priv->fb + vid_priv->ysize * vid_priv->line_length - -- (row + 1) * VIDEO_FONT_HEIGHT * vid_priv->line_length; -+ (row + 1) * fontdata->height * vid_priv->line_length; - line = start; -- switch (vid_priv->bpix) { -- case VIDEO_BPP8: -- if (IS_ENABLED(CONFIG_VIDEO_BPP8)) { -- uint8_t *dst = line; -- -- for (i = 0; i < pixels; i++) -- *dst++ = clr; -- end = dst; -- break; -- } -- case VIDEO_BPP16: -- if (IS_ENABLED(CONFIG_VIDEO_BPP16)) { -- uint16_t *dst = line; -- -- for (i = 0; i < pixels; i++) -- *dst++ = clr; -- end = dst; -- break; -- } -- case VIDEO_BPP32: -- if (IS_ENABLED(CONFIG_VIDEO_BPP32)) { -- uint32_t *dst = line; -- -- for (i = 0; i < pixels; i++) -- *dst++ = clr; -- end = dst; -- break; -- } -- default: -- return -ENOSYS; -- } -+ dst = line; -+ for (i = 0; i < pixels; i++) -+ fill_pixel_and_goto_next(&dst, clr, pbytes, pbytes); -+ end = dst; - ret = vidconsole_sync_copy(dev, start, end); - if (ret) - return ret; -@@ -206,17 +128,19 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc, - uint count) - { - struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent); -+ struct console_simple_priv *priv = dev_get_priv(dev); -+ struct video_fontdata *fontdata = priv->fontdata; - void *dst; - void *src; - void *end; - - end = vid_priv->fb + vid_priv->ysize * vid_priv->line_length; -- dst = end - (rowdst + count) * VIDEO_FONT_HEIGHT * -+ dst = end - (rowdst + count) * fontdata->height * - vid_priv->line_length; -- src = end - (rowsrc + count) * VIDEO_FONT_HEIGHT * -+ src = end - (rowsrc + count) * fontdata->height * - vid_priv->line_length; - vidconsole_memmove(dev, dst, src, -- VIDEO_FONT_HEIGHT * vid_priv->line_length * count); -+ fontdata->height * vid_priv->line_length * count); - - return 0; - } -@@ -226,9 +150,13 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, char ch) - struct vidconsole_priv *vc_priv = dev_get_uclass_priv(dev); - struct udevice *vid = dev->parent; - struct video_priv *vid_priv = dev_get_uclass_priv(vid); -+ struct console_simple_priv *priv = dev_get_priv(dev); -+ struct video_fontdata *fontdata = priv->fontdata; - int pbytes = VNBYTES(vid_priv->bpix); -- int i, row, x, linenum, ret; -+ int linenum, x, ret; - void *start, *line; -+ uchar *pfont = fontdata->video_fontdata + -+ (u8)ch * fontdata->char_pixel_bytes; - - if (x_frac + VID_TO_POS(vc_priv->x_charsize) > vc_priv->xsize_frac) - return -EAGAIN; -@@ -237,98 +165,33 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, char ch) - start = vid_priv->fb + linenum * vid_priv->line_length + x * pbytes; - line = start; - -- for (row = 0; row < VIDEO_FONT_HEIGHT; row++) { -- unsigned int idx = (u8)ch * VIDEO_FONT_HEIGHT + row; -- uchar bits = video_fontdata[idx]; -- -- switch (vid_priv->bpix) { -- case VIDEO_BPP8: -- if (IS_ENABLED(CONFIG_VIDEO_BPP8)) { -- uint8_t *dst = line; -- -- for (i = 0; i < VIDEO_FONT_WIDTH; i++) { -- *dst-- = (bits & 0x80) ? -- vid_priv->colour_fg : -- vid_priv->colour_bg; -- bits <<= 1; -- } -- break; -- } -- case VIDEO_BPP16: -- if (IS_ENABLED(CONFIG_VIDEO_BPP16)) { -- uint16_t *dst = line; -- -- for (i = 0; i < VIDEO_FONT_WIDTH; i++) { -- *dst-- = (bits & 0x80) ? -- vid_priv->colour_fg : -- vid_priv->colour_bg; -- bits <<= 1; -- } -- break; -- } -- case VIDEO_BPP32: -- if (IS_ENABLED(CONFIG_VIDEO_BPP32)) { -- uint32_t *dst = line; -- -- for (i = 0; i < VIDEO_FONT_WIDTH; i++) { -- *dst-- = (bits & 0x80) ? -- vid_priv->colour_fg : -- vid_priv->colour_bg; -- bits <<= 1; -- } -- break; -- } -- default: -- return -ENOSYS; -- } -- line -= vid_priv->line_length; -- } -+ ret = fill_char_vertically(pfont, &line, vid_priv, fontdata, FLIPPED_DIRECTION); -+ if (ret) -+ return ret; -+ - /* Add 4 bytes to allow for the first pixel writen */ - ret = vidconsole_sync_copy(dev, start + 4, line); - if (ret) - return ret; - -- return VID_TO_POS(VIDEO_FONT_WIDTH); -+ return VID_TO_POS(fontdata->width); - } - - static int console_set_row_3(struct udevice *dev, uint row, int clr) - { - struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent); -+ struct console_simple_priv *priv = dev_get_priv(dev); -+ struct video_fontdata *fontdata = priv->fontdata; - int pbytes = VNBYTES(vid_priv->bpix); -- void *start, *line; -+ void *start, *dst, *line; - int i, j, ret; - -- start = vid_priv->fb + row * VIDEO_FONT_HEIGHT * pbytes; -+ start = vid_priv->fb + row * fontdata->height * pbytes; - line = start; - for (j = 0; j < vid_priv->ysize; j++) { -- switch (vid_priv->bpix) { -- case VIDEO_BPP8: -- if (IS_ENABLED(CONFIG_VIDEO_BPP8)) { -- uint8_t *dst = line; -- -- for (i = 0; i < VIDEO_FONT_HEIGHT; i++) -- *dst++ = clr; -- break; -- } -- case VIDEO_BPP16: -- if (IS_ENABLED(CONFIG_VIDEO_BPP16)) { -- uint16_t *dst = line; -- -- for (i = 0; i < VIDEO_FONT_HEIGHT; i++) -- *dst++ = clr; -- break; -- } -- case VIDEO_BPP32: -- if (IS_ENABLED(CONFIG_VIDEO_BPP32)) { -- uint32_t *dst = line; -- -- for (i = 0; i < VIDEO_FONT_HEIGHT; i++) -- *dst++ = clr; -- break; -- } -- default: -- return -ENOSYS; -- } -+ dst = line; -+ for (i = 0; i < fontdata->height; i++) -+ fill_pixel_and_goto_next(&dst, clr, pbytes, pbytes); - line += vid_priv->line_length; - } - ret = vidconsole_sync_copy(dev, start, line); -@@ -342,17 +205,19 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc, - uint count) - { - struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent); -+ struct console_simple_priv *priv = dev_get_priv(dev); -+ struct video_fontdata *fontdata = priv->fontdata; - int pbytes = VNBYTES(vid_priv->bpix); - void *dst; - void *src; - int j, ret; - -- dst = vid_priv->fb + rowdst * VIDEO_FONT_HEIGHT * pbytes; -- src = vid_priv->fb + rowsrc * VIDEO_FONT_HEIGHT * pbytes; -+ dst = vid_priv->fb + rowdst * fontdata->height * pbytes; -+ src = vid_priv->fb + rowsrc * fontdata->height * pbytes; - - for (j = 0; j < vid_priv->ysize; j++) { - ret = vidconsole_memmove(dev, dst, src, -- VIDEO_FONT_HEIGHT * pbytes * count); -+ fontdata->height * pbytes * count); - if (ret) - return ret; - src += vid_priv->line_length; -@@ -367,131 +232,79 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, char ch) - struct vidconsole_priv *vc_priv = dev_get_uclass_priv(dev); - struct udevice *vid = dev->parent; - struct video_priv *vid_priv = dev_get_uclass_priv(vid); -- uchar *pfont = video_fontdata + (u8)ch * VIDEO_FONT_HEIGHT; -+ struct console_simple_priv *priv = dev_get_priv(dev); -+ struct video_fontdata *fontdata = priv->fontdata; - int pbytes = VNBYTES(vid_priv->bpix); -- int i, col, x, ret; -- int mask = 0x80; -+ int linenum, x, ret; - void *start, *line; -+ uchar *pfont = fontdata->video_fontdata + -+ (u8)ch * fontdata->char_pixel_bytes; - - if (x_frac + VID_TO_POS(vc_priv->x_charsize) > vc_priv->xsize_frac) - return -EAGAIN; -- x = vid_priv->ysize - VID_TO_PIXEL(x_frac) - 1; -- start = vid_priv->fb + x * vid_priv->line_length + y * pbytes; -+ x = y; -+ linenum = vid_priv->ysize - VID_TO_PIXEL(x_frac) - 1; -+ start = vid_priv->fb + linenum * vid_priv->line_length + y * pbytes; - line = start; -- for (col = 0; col < VIDEO_FONT_HEIGHT; col++) { -- switch (vid_priv->bpix) { -- case VIDEO_BPP8: -- if (IS_ENABLED(CONFIG_VIDEO_BPP8)) { -- uint8_t *dst = line; -- -- for (i = 0; i < VIDEO_FONT_HEIGHT; i++) { -- *dst++ = (pfont[i] & mask) ? -- vid_priv->colour_fg : -- vid_priv->colour_bg; -- } -- break; -- } -- case VIDEO_BPP16: -- if (IS_ENABLED(CONFIG_VIDEO_BPP16)) { -- uint16_t *dst = line; -- -- for (i = 0; i < VIDEO_FONT_HEIGHT; i++) { -- *dst++ = (pfont[i] & mask) ? -- vid_priv->colour_fg : -- vid_priv->colour_bg; -- } -- break; -- } -- case VIDEO_BPP32: -- if (IS_ENABLED(CONFIG_VIDEO_BPP32)) { -- uint32_t *dst = line; -- -- for (i = 0; i < VIDEO_FONT_HEIGHT; i++) { -- *dst++ = (pfont[i] & mask) ? -- vid_priv->colour_fg : -- vid_priv->colour_bg; -- } -- break; -- } -- default: -- return -ENOSYS; -- } -- line -= vid_priv->line_length; -- mask >>= 1; -- } -+ -+ ret = fill_char_horizontally(pfont, &line, vid_priv, fontdata, NORMAL_DIRECTION); -+ if (ret) -+ return ret; - /* Add a line to allow for the first pixels writen */ - ret = vidconsole_sync_copy(dev, start + vid_priv->line_length, line); - if (ret) - return ret; - -- return VID_TO_POS(VIDEO_FONT_WIDTH); --} -- -- --static int console_probe_2(struct udevice *dev) --{ -- struct vidconsole_priv *vc_priv = dev_get_uclass_priv(dev); -- struct udevice *vid_dev = dev->parent; -- struct video_priv *vid_priv = dev_get_uclass_priv(vid_dev); -- -- vc_priv->x_charsize = VIDEO_FONT_WIDTH; -- vc_priv->y_charsize = VIDEO_FONT_HEIGHT; -- vc_priv->cols = vid_priv->xsize / VIDEO_FONT_WIDTH; -- vc_priv->rows = vid_priv->ysize / VIDEO_FONT_HEIGHT; -- -- return 0; --} -- --static int console_probe_1_3(struct udevice *dev) --{ -- struct vidconsole_priv *vc_priv = dev_get_uclass_priv(dev); -- struct udevice *vid_dev = dev->parent; -- struct video_priv *vid_priv = dev_get_uclass_priv(vid_dev); -- -- vc_priv->x_charsize = VIDEO_FONT_WIDTH; -- vc_priv->y_charsize = VIDEO_FONT_HEIGHT; -- vc_priv->cols = vid_priv->ysize / VIDEO_FONT_WIDTH; -- vc_priv->rows = vid_priv->xsize / VIDEO_FONT_HEIGHT; -- vc_priv->xsize_frac = VID_TO_POS(vid_priv->ysize); -- -- return 0; -+ return VID_TO_POS(fontdata->width); - } - - struct vidconsole_ops console_ops_1 = { - .putc_xy = console_putc_xy_1, - .move_rows = console_move_rows_1, - .set_row = console_set_row_1, -+ .get_font_size = console_simple_get_font_size, -+ .get_font = console_simple_get_font, -+ .select_font = console_simple_select_font, - }; - - struct vidconsole_ops console_ops_2 = { - .putc_xy = console_putc_xy_2, - .move_rows = console_move_rows_2, - .set_row = console_set_row_2, -+ .get_font_size = console_simple_get_font_size, -+ .get_font = console_simple_get_font, -+ .select_font = console_simple_select_font, - }; - - struct vidconsole_ops console_ops_3 = { - .putc_xy = console_putc_xy_3, - .move_rows = console_move_rows_3, - .set_row = console_set_row_3, -+ .get_font_size = console_simple_get_font_size, -+ .get_font = console_simple_get_font, -+ .select_font = console_simple_select_font, - }; - - U_BOOT_DRIVER(vidconsole_1) = { - .name = "vidconsole1", - .id = UCLASS_VIDEO_CONSOLE, - .ops = &console_ops_1, -- .probe = console_probe_1_3, -+ .probe = console_probe, -+ .priv_auto = sizeof(struct console_simple_priv), - }; - - U_BOOT_DRIVER(vidconsole_2) = { - .name = "vidconsole2", - .id = UCLASS_VIDEO_CONSOLE, - .ops = &console_ops_2, -- .probe = console_probe_2, -+ .probe = console_probe, -+ .priv_auto = sizeof(struct console_simple_priv), - }; - - U_BOOT_DRIVER(vidconsole_3) = { - .name = "vidconsole3", - .id = UCLASS_VIDEO_CONSOLE, - .ops = &console_ops_3, -- .probe = console_probe_1_3, -+ .probe = console_probe, -+ .priv_auto = sizeof(struct console_simple_priv), - }; -diff --git a/drivers/video/console_truetype.c b/drivers/video/console_truetype.c -index 9cac9a6de4..6b5390136a 100644 ---- a/drivers/video/console_truetype.c -+++ b/drivers/video/console_truetype.c -@@ -724,7 +724,7 @@ static int truetype_select_font(struct udevice *dev, const char *name, - return 0; - } - --const char *vidconsole_get_font_size(struct udevice *dev, uint *sizep) -+const char *console_truetype_get_font_size(struct udevice *dev, uint *sizep) - { - struct console_tt_priv *priv = dev_get_priv(dev); - struct console_tt_metrics *met = priv->cur_met; -@@ -773,6 +773,7 @@ struct vidconsole_ops console_truetype_ops = { - .backspace = console_truetype_backspace, - .entry_start = console_truetype_entry_start, - .get_font = console_truetype_get_font, -+ .get_font_size = console_truetype_get_font_size, - .select_font = truetype_select_font, - }; - -diff --git a/drivers/video/coreboot.c b/drivers/video/coreboot.c -index d2d87c75c8..c586475e41 100644 ---- a/drivers/video/coreboot.c -+++ b/drivers/video/coreboot.c -@@ -57,7 +57,7 @@ static int coreboot_video_probe(struct udevice *dev) - goto err; - } - -- ret = vesa_setup_video_priv(vesa, uc_priv, plat); -+ ret = vesa_setup_video_priv(vesa, vesa->phys_base_ptr, uc_priv, plat); - if (ret) { - ret = log_msg_ret("setup", ret); - goto err; -diff --git a/drivers/video/efi.c b/drivers/video/efi.c -index b11e42c0eb..28ac15ff61 100644 ---- a/drivers/video/efi.c -+++ b/drivers/video/efi.c -@@ -5,6 +5,8 @@ - * EFI framebuffer driver based on GOP - */ - -+#define LOG_CATEGORY LOGC_EFI -+ - #include - #include - #include -@@ -50,7 +52,19 @@ static void efi_find_pixel_bits(u32 mask, u8 *pos, u8 *size) - *size = len; - } - --static int get_mode_info(struct vesa_mode_info *vesa) -+/** -+ * get_mode_info() - Ask EFI for the mode information -+ * -+ * Gets info from the graphics-output protocol -+ * -+ * @vesa: Place to put the mode information -+ * @fbp: Returns the address of the frame buffer -+ * @infop: Returns a pointer to the mode info -+ * Returns: 0 if OK, -ENOSYS if boot services are not available, -ENOTSUPP if -+ * the protocol is not supported by EFI -+ */ -+static int get_mode_info(struct vesa_mode_info *vesa, u64 *fbp, -+ struct efi_gop_mode_info **infop) - { - efi_guid_t efi_gop_guid = EFI_GRAPHICS_OUTPUT_PROTOCOL_GUID; - struct efi_boot_services *boot = efi_get_boot(); -@@ -63,41 +77,70 @@ static int get_mode_info(struct vesa_mode_info *vesa) - ret = boot->locate_protocol(&efi_gop_guid, NULL, (void **)&gop); - if (ret) - return log_msg_ret("prot", -ENOTSUPP); -- - mode = gop->mode; -+ log_debug("maxmode %u, mode %u, info %p, size %lx, fb %lx, fb_size %lx\n", -+ mode->max_mode, mode->mode, mode->info, mode->info_size, -+ (ulong)mode->fb_base, (ulong)mode->fb_size); -+ - vesa->phys_base_ptr = mode->fb_base; -+ *fbp = mode->fb_base; - vesa->x_resolution = mode->info->width; - vesa->y_resolution = mode->info->height; -+ *infop = mode->info; - - return 0; - } - --static int save_vesa_mode(struct vesa_mode_info *vesa) -+/** -+ * get_mode_from_entry() - Obtain fb info from the EFIET_GOP_MODE payload entry -+ * -+ * This gets the mode information provided by the stub to the payload and puts -+ * it into a vesa structure. It also returns the mode information. -+ * -+ * @vesa: Place to put the mode information -+ * @fbp: Returns the address of the frame buffer -+ * @infop: Returns a pointer to the mode info -+ * Returns: 0 if OK, -ve on error -+ */ -+static int get_mode_from_entry(struct vesa_mode_info *vesa, u64 *fbp, -+ struct efi_gop_mode_info **infop) - { -- struct efi_entry_gopmode *mode; -- const struct efi_framebuffer *fbinfo; -+ struct efi_gop_mode *mode; - int size; - int ret; - -- if (IS_ENABLED(CONFIG_EFI_APP)) { -- ret = get_mode_info(vesa); -- if (ret) { -- printf("EFI graphics output protocol not found\n"); -- return -ENXIO; -- } -- } else { -- ret = efi_info_get(EFIET_GOP_MODE, (void **)&mode, &size); -- if (ret == -ENOENT) { -- printf("EFI graphics output protocol mode not found\n"); -- return -ENXIO; -- } -- vesa->phys_base_ptr = mode->fb_base; -- vesa->x_resolution = mode->info->width; -- vesa->y_resolution = mode->info->height; -+ ret = efi_info_get(EFIET_GOP_MODE, (void **)&mode, &size); -+ if (ret) { -+ printf("EFI graphics output entry not found\n"); -+ return ret; - } -+ vesa->phys_base_ptr = mode->fb_base; -+ *fbp = mode->fb_base; -+ vesa->x_resolution = mode->info->width; -+ vesa->y_resolution = mode->info->height; -+ *infop = mode->info; - -- if (mode->info->pixel_format < EFI_GOT_BITMASK) { -- fbinfo = &efi_framebuffer_format_map[mode->info->pixel_format]; -+ return 0; -+} -+ -+static int save_vesa_mode(struct vesa_mode_info *vesa, u64 *fbp) -+{ -+ const struct efi_framebuffer *fbinfo; -+ struct efi_gop_mode_info *info; -+ int ret; -+ -+ if (IS_ENABLED(CONFIG_EFI_APP)) -+ ret = get_mode_info(vesa, fbp, &info); -+ else -+ ret = get_mode_from_entry(vesa, fbp, &info); -+ if (ret) { -+ printf("EFI graphics output protocol not found (err=%dE)\n", -+ ret); -+ return ret; -+ } -+ -+ if (info->pixel_format < EFI_GOT_BITMASK) { -+ fbinfo = &efi_framebuffer_format_map[info->pixel_format]; - vesa->red_mask_size = fbinfo->red.size; - vesa->red_mask_pos = fbinfo->red.pos; - vesa->green_mask_size = fbinfo->green.size; -@@ -108,29 +151,28 @@ static int save_vesa_mode(struct vesa_mode_info *vesa) - vesa->reserved_mask_pos = fbinfo->rsvd.pos; - - vesa->bits_per_pixel = 32; -- vesa->bytes_per_scanline = mode->info->pixels_per_scanline * 4; -- } else if (mode->info->pixel_format == EFI_GOT_BITMASK) { -- efi_find_pixel_bits(mode->info->pixel_bitmask[0], -+ vesa->bytes_per_scanline = info->pixels_per_scanline * 4; -+ } else if (info->pixel_format == EFI_GOT_BITMASK) { -+ efi_find_pixel_bits(info->pixel_bitmask[0], - &vesa->red_mask_pos, - &vesa->red_mask_size); -- efi_find_pixel_bits(mode->info->pixel_bitmask[1], -+ efi_find_pixel_bits(info->pixel_bitmask[1], - &vesa->green_mask_pos, - &vesa->green_mask_size); -- efi_find_pixel_bits(mode->info->pixel_bitmask[2], -+ efi_find_pixel_bits(info->pixel_bitmask[2], - &vesa->blue_mask_pos, - &vesa->blue_mask_size); -- efi_find_pixel_bits(mode->info->pixel_bitmask[3], -+ efi_find_pixel_bits(info->pixel_bitmask[3], - &vesa->reserved_mask_pos, - &vesa->reserved_mask_size); - vesa->bits_per_pixel = vesa->red_mask_size + - vesa->green_mask_size + - vesa->blue_mask_size + - vesa->reserved_mask_size; -- vesa->bytes_per_scanline = (mode->info->pixels_per_scanline * -+ vesa->bytes_per_scanline = (info->pixels_per_scanline * - vesa->bits_per_pixel) / 8; - } else { -- debug("efi set unknown framebuffer format: %d\n", -- mode->info->pixel_format); -+ log_err("Unknown framebuffer format: %d\n", info->pixel_format); - return -EINVAL; - } - -@@ -142,19 +184,20 @@ static int efi_video_probe(struct udevice *dev) - struct video_uc_plat *plat = dev_get_uclass_plat(dev); - struct video_priv *uc_priv = dev_get_uclass_priv(dev); - struct vesa_mode_info *vesa = &mode_info.vesa; -+ u64 fb; - int ret; - - /* Initialize vesa_mode_info structure */ -- ret = save_vesa_mode(vesa); -+ ret = save_vesa_mode(vesa, &fb); - if (ret) - goto err; - -- ret = vesa_setup_video_priv(vesa, uc_priv, plat); -+ ret = vesa_setup_video_priv(vesa, fb, uc_priv, plat); - if (ret) - goto err; - -- printf("Video: %dx%dx%d\n", uc_priv->xsize, uc_priv->ysize, -- vesa->bits_per_pixel); -+ printf("Video: %dx%dx%d @ %lx\n", uc_priv->xsize, uc_priv->ysize, -+ vesa->bits_per_pixel, (ulong)fb); - - return 0; - -@@ -163,6 +206,30 @@ err: - return ret; - } - -+static int efi_video_bind(struct udevice *dev) -+{ -+ if (IS_ENABLED(CONFIG_VIDEO_COPY)) { -+ struct video_uc_plat *plat = dev_get_uclass_plat(dev); -+ struct vesa_mode_info vesa; -+ int ret; -+ u64 fb; -+ -+ /* -+ * Initialise vesa_mode_info structure so we can figure out the -+ * required framebuffer size. If something goes wrong, just do -+ * without a copy framebuffer -+ */ -+ ret = save_vesa_mode(&vesa, &fb); -+ if (!ret) { -+ /* this is not reached if the EFI call failed */ -+ plat->copy_size = vesa.bytes_per_scanline * -+ vesa.y_resolution; -+ } -+ } -+ -+ return 0; -+} -+ - static const struct udevice_id efi_video_ids[] = { - { .compatible = "efi-fb" }, - { } -@@ -172,5 +239,6 @@ U_BOOT_DRIVER(efi_video) = { - .name = "efi_video", - .id = UCLASS_VIDEO, - .of_match = efi_video_ids, -+ .bind = efi_video_bind, - .probe = efi_video_probe, - }; -diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c -index 72a13d3052..1225de2333 100644 ---- a/drivers/video/vidconsole-uclass.c -+++ b/drivers/video/vidconsole-uclass.c -@@ -575,6 +575,17 @@ int vidconsole_get_font(struct udevice *dev, int seq, - return ops->get_font(dev, seq, info); - } - -+int vidconsole_get_font_size(struct udevice *dev, const char **name, uint *sizep) -+{ -+ struct vidconsole_ops *ops = vidconsole_get_ops(dev); -+ -+ if (!ops->get_font_size) -+ return -ENOSYS; -+ -+ *name = ops->get_font_size(dev, sizep); -+ return 0; -+} -+ - int vidconsole_select_font(struct udevice *dev, const char *name, uint size) - { - struct vidconsole_ops *ops = vidconsole_get_ops(dev); -@@ -645,6 +656,18 @@ int vidconsole_memmove(struct udevice *dev, void *dst, const void *src, - } - #endif - -+int vidconsole_clear_and_reset(struct udevice *dev) -+{ -+ int ret; -+ -+ ret = video_clear(dev_get_parent(dev)); -+ if (ret) -+ return ret; -+ vidconsole_position_cursor(dev, 0, 0); -+ -+ return 0; -+} -+ - void vidconsole_position_cursor(struct udevice *dev, unsigned col, unsigned row) - { - struct vidconsole_priv *priv = dev_get_uclass_priv(dev); -diff --git a/drivers/video/vidconsole_internal.h b/drivers/video/vidconsole_internal.h -new file mode 100644 -index 0000000000..c41edd4524 ---- /dev/null -+++ b/drivers/video/vidconsole_internal.h -@@ -0,0 +1,120 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * Copyright (c) 2015 Google, Inc -+ * (C) Copyright 2015 -+ * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com -+ * (C) Copyright 2023 Dzmitry Sankouski -+ */ -+ -+#define FLIPPED_DIRECTION 1 -+#define NORMAL_DIRECTION 0 -+ -+/** -+ * struct console_simple_priv - Private data for this driver -+ * -+ * @video_fontdata font graphical representation data -+ */ -+struct console_simple_priv { -+ struct video_fontdata *fontdata; -+}; -+ -+/** -+ * Checks if bits per pixel supported. -+ * -+ * @param bpix framebuffer bits per pixel. -+ * -+ * @returns 0, if supported, or else -ENOSYS. -+ */ -+int check_bpix_support(int bpix); -+ -+/** -+ * Fill 1 pixel in framebuffer, and go to next one. -+ * -+ * @param dstp a pointer to pointer to framebuffer. -+ * @param value value to write to framebuffer. -+ * @param pbytes framebuffer bytes per pixel. -+ * @param step framebuffer pointer increment. Usually is equal to pbytes, -+ * and may be negative to control filling direction. -+ */ -+void fill_pixel_and_goto_next(void **dstp, u32 value, int pbytes, int step); -+ -+/** -+ * Fills 1 character in framebuffer vertically. Vertically means we're filling char font data rows -+ * across the lines. -+ * -+ * @param pfont a pointer to character font data. -+ * @param line a pointer to pointer to framebuffer. It's a point for upper left char corner -+ * @param vid_priv driver private data. -+ * @fontdata font graphical representation data -+ * @param direction controls character orientation. Can be normal or flipped. -+ * When normal: When flipped: -+ *|-----------------------------------------------| -+ *| line stepping | | -+ *| | | stepping -> | -+ *| * | | * * * | -+ *| * * v | * | -+ *| * | * | -+ *| * | * * ^ | -+ *| * * * | * | | -+ *| | | | -+ *| stepping -> | line stepping | -+ *|---!!we're starting from upper left char corner| -+ *|-----------------------------------------------| -+ * -+ * @returns 0, if success, or else error code. -+ */ -+int fill_char_vertically(uchar *pfont, void **line, struct video_priv *vid_priv, -+ struct video_fontdata *fontdata, bool direction); -+ -+/** -+ * Fills 1 character in framebuffer horizontally. -+ * Horizontally means we're filling char font data columns across the lines. -+ * -+ * @param pfont a pointer to character font data. -+ * @param line a pointer to pointer to framebuffer. It's a point for upper left char corner -+ * @param vid_priv driver private data. -+ * @fontdata font graphical representation data -+ * @param direction controls character orientation. Can be normal or flipped. -+ * When normal: When flipped: -+ *|-----------------------------------------------| -+ *| * | line stepping | -+ *| ^ * * * * * | | | -+ *| | * * | v * * | -+ *| | | * * * * * | -+ *| line stepping | * | -+ *| | | -+ *| stepping -> | <- stepping | -+ *|---!!we're starting from upper left char corner| -+ *|-----------------------------------------------| -+ * -+ * @returns 0, if success, or else error code. -+ */ -+int fill_char_horizontally(uchar *pfont, void **line, struct video_priv *vid_priv, -+ struct video_fontdata *fontdata, bool direction); -+ -+/** -+ * console probe function. -+ * -+ * @param dev a pointer to device. -+ * -+ * @returns 0, if success, or else error code. -+ */ -+int console_probe(struct udevice *dev); -+ -+/** -+ * Internal function to be used in as ops. -+ * See details in video_console.h get_font_size function -+ **/ -+const char *console_simple_get_font_size(struct udevice *dev, uint *sizep); -+ -+/** -+ * Internal function to be used in as ops. -+ * See details in video_console.h get_font function -+ **/ -+int console_simple_get_font(struct udevice *dev, int seq, struct vidfont_info *info); -+ -+/** -+ * Internal function to be used in as ops. -+ * See details in video_console.h select_font function -+ **/ -+int console_simple_select_font(struct udevice *dev, const char *name, uint size); -diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index 6aaacff10d..da89f43144 100644 ---- a/drivers/video/video-uclass.c -+++ b/drivers/video/video-uclass.c -@@ -78,24 +78,40 @@ void video_set_flush_dcache(struct udevice *dev, bool flush) - priv->flush_dcache = flush; - } - -+static ulong alloc_fb_(ulong align, ulong size, ulong *addrp) -+{ -+ ulong base; -+ -+ align = align ? align : 1 << 20; -+ base = *addrp - size; -+ base &= ~(align - 1); -+ size = *addrp - base; -+ *addrp = base; -+ -+ return size; -+} -+ - static ulong alloc_fb(struct udevice *dev, ulong *addrp) - { - struct video_uc_plat *plat = dev_get_uclass_plat(dev); -- ulong base, align, size; -+ ulong size; -+ -+ if (!plat->size) { -+ if (IS_ENABLED(CONFIG_VIDEO_COPY) && plat->copy_size) { -+ size = alloc_fb_(plat->align, plat->copy_size, addrp); -+ plat->copy_base = *addrp; -+ return size; -+ } - -- if (!plat->size) - return 0; -+ } - - /* Allow drivers to allocate the frame buffer themselves */ - if (plat->base) - return 0; - -- align = plat->align ? plat->align : 1 << 20; -- base = *addrp - plat->size; -- base &= ~(align - 1); -- plat->base = base; -- size = *addrp - base; -- *addrp = base; -+ size = alloc_fb_(plat->align, plat->size, addrp); -+ plat->base = *addrp; - - return size; - } -@@ -529,8 +545,8 @@ static int video_post_bind(struct udevice *dev) - addr = uc_priv->video_ptr; - size = alloc_fb(dev, &addr); - if (addr < gd->video_bottom) { -- /* Device tree node may need the 'u-boot,dm-pre-reloc' or -- * 'u-boot,dm-pre-proper' tag -+ /* Device tree node may need the 'bootph-all' or -+ * 'bootph-some-ram' tag - */ - printf("Video device '%s' cannot allocate frame buffer memory -ensure the device is set up before relocation\n", - dev->name); -diff --git a/dts/Kconfig b/dts/Kconfig -index 44cc6bf1f6..3b7489f0f8 100644 ---- a/dts/Kconfig -+++ b/dts/Kconfig -@@ -342,6 +342,16 @@ config SPL_MULTI_DTB_FIT_USER_DEF_ADDR - at compilation time. This is the address of this area. It must be - aligned on 2-byte boundary. - -+config OF_TAG_MIGRATE -+ bool "Ease migration from old device trees with u-boot,dm- tags" -+ default y -+ help -+ U-Boot moved over to use new tags to mark device tree nodes which need -+ to be processed in SPL, before relocation, etc. Enable this option to -+ detect old tags and handle them. -+ -+ Note: This option will be removed after the 2023.07 release. -+ - config OF_SPL_REMOVE_PROPS - string "List of device tree properties to drop for SPL" - depends on SPL_OF_CONTROL -@@ -352,7 +362,7 @@ config OF_SPL_REMOVE_PROPS - help - Since SPL normally runs in a reduced memory space, the device tree - is cut down to only what is needed to load and start U-Boot. Only -- nodes marked with the property "u-boot,dm-pre-reloc" will be -+ nodes marked with the property "bootph-all" will be - included. In addition, some properties are not used by U-Boot and - can be discarded. This option defines the list of properties to - discard. -diff --git a/env/Kconfig b/env/Kconfig -index 6e24eee55f..2bbe4c466a 100644 ---- a/env/Kconfig -+++ b/env/Kconfig -@@ -860,6 +860,16 @@ config TPL_ENV_IS_IN_FLASH - - endif - -+if VPL_ENV_SUPPORT -+ -+config VPL_ENV_IS_NOWHERE -+ bool "VPL Environment is not stored" -+ default y if ENV_IS_NOWHERE -+ help -+ Similar to ENV_IS_NOWHERE, used for VPL environment. -+ -+endif # VPL_ENV_SUPPORT -+ - config USE_BOOTFILE - bool "Add a 'bootfile' environment variable" - help -diff --git a/examples/standalone/Makefile b/examples/standalone/Makefile -index 5b48a9d43c..559170dd5c 100644 ---- a/examples/standalone/Makefile -+++ b/examples/standalone/Makefile -@@ -29,6 +29,10 @@ targets += $(patsubst $(obj)/%,%,$(LIB)) $(COBJS) $(LIBOBJS-y) - LIBOBJS := $(addprefix $(obj)/,$(LIBOBJS-y)) - ELF := $(addprefix $(obj)/,$(ELF)) - -+# Disable LTO for these builds -+CFLAGS_REMOVE_hello_world.o := $(LTO_CFLAGS) -+CFLAGS_REMOVE_stubs.o := $(LTO_CFLAGS) -+ - # For PowerPC there's no need to compile standalone applications as a - # relocatable executable. The relocation data is not needed, and - # also causes the entry point of the standalone application to be -diff --git a/fs/ext4/ext4_write.c b/fs/ext4/ext4_write.c -index f22af45d1b..ea4c5d4157 100644 ---- a/fs/ext4/ext4_write.c -+++ b/fs/ext4/ext4_write.c -@@ -473,7 +473,7 @@ static int ext4fs_delete_file(int inodeno) - * special case for symlinks whose target are small enough that - *it fits in struct ext2_inode.b.symlink: no block had been allocated - */ -- if ((le16_to_cpu(inode.mode) & S_IFLNK) && -+ if (S_ISLNK(le16_to_cpu(inode.mode)) && - le32_to_cpu(inode.size) <= sizeof(inode.b.symlink)) { - no_blocks = 0; - } -diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c -index 00541ebc3a..413fc432eb 100644 ---- a/fs/fat/fat_write.c -+++ b/fs/fat/fat_write.c -@@ -141,6 +141,8 @@ static int set_name(fat_itr *itr, const char *filename, char *shortname) - if (!strcmp(buf, filename)) { - ret = 1; - goto out; -+ } else if (!strcasecmp(buf, filename)) { -+ goto out_ret; - } - - /* Construct an indexed short name */ -@@ -177,12 +179,13 @@ static int set_name(fat_itr *itr, const char *filename, char *shortname) - if (find_directory_entry(itr, buf)) - continue; - -- debug("chosen short name: %s\n", buf); -- /* Each long name directory entry takes 13 characters. */ -- ret = (strlen(filename) + 25) / 13; -- goto out; -+ goto out_ret; - } - return -EIO; -+out_ret: -+ debug("chosen short name: %s\n", buf); -+ /* Each long name directory entry takes 13 characters. */ -+ ret = (strlen(filename) + 25) / 13; - out: - memcpy(shortname, &dirent, SHORT_NAME_SIZE); - return ret; -diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h -index da17ac8cbc..987fb66c17 100644 ---- a/include/asm-generic/global_data.h -+++ b/include/asm-generic/global_data.h -@@ -650,6 +650,10 @@ enum gd_flags { - * @GD_FLG_FDT_CHANGED: Device tree change has been detected by tests - */ - GD_FLG_FDT_CHANGED = 0x100000, -+ /** -+ * @GD_FLG_OF_TAG_MIGRATE: Device tree has old u-boot,dm- tags -+ */ -+ GD_FLG_OF_TAG_MIGRATE = 0x200000, - }; - - #endif /* __ASSEMBLY__ */ -diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h -index dd0bdf2315..c4a7fd2843 100644 ---- a/include/asm-generic/gpio.h -+++ b/include/asm-generic/gpio.h -@@ -580,7 +580,8 @@ int gpio_request_by_name(struct udevice *dev, const char *list_name, - * This allows boards to implement common behaviours using GPIOs while not - * requiring specific GPIO offsets be used. - * -- * @dev: An instance of a GPIO controller udevice -+ * @dev: An instance of a GPIO controller udevice, or NULL to search -+ * all GPIO controller devices - * @line_name: The name of the GPIO (e.g. "bmc-secure-boot") - * @desc: A GPIO descriptor that is populated with the requested GPIO - * upon return -diff --git a/include/bootflow.h b/include/bootflow.h -index f516bf8dea..f20f575030 100644 ---- a/include/bootflow.h -+++ b/include/bootflow.h -@@ -36,6 +36,18 @@ enum bootflow_state_t { - BOOTFLOWST_COUNT - }; - -+/** -+ * enum bootflow_flags_t - flags for bootflows -+ * -+ * @BOOTFLOWF_USE_PRIOR_FDT: Indicates that an FDT was not found by the bootmeth -+ * and it is using the prior-stage FDT, which is the U-Boot control FDT. -+ * This is only possible with the EFI bootmeth (distro-efi) and only when -+ * CONFIG_OF_HAS_PRIOR_STAGE is enabled -+ */ -+enum bootflow_flags_t { -+ BOOTFLOWF_USE_PRIOR_FDT = 1 << 0, -+}; -+ - /** - * struct bootflow - information about a bootflow - * -@@ -68,6 +80,7 @@ enum bootflow_state_t { - * @fdt_fname: Filename of FDT file - * @fdt_size: Size of FDT file - * @fdt_addr: Address of loaded fdt -+ * @flags: Flags for the bootflow (see enum bootflow_flags_t) - */ - struct bootflow { - struct list_head bm_node; -@@ -90,39 +103,40 @@ struct bootflow { - char *fdt_fname; - int fdt_size; - ulong fdt_addr; -+ int flags; - }; - - /** -- * enum bootflow_flags_t - flags for the bootflow iterator -+ * enum bootflow_iter_flags_t - flags for the bootflow iterator - * -- * @BOOTFLOWF_FIXED: Only used fixed/internal media -- * @BOOTFLOWF_SHOW: Show each bootdev before scanning it; show each hunter -+ * @BOOTFLOWIF_FIXED: Only used fixed/internal media -+ * @BOOTFLOWIF_SHOW: Show each bootdev before scanning it; show each hunter - * before using it -- * @BOOTFLOWF_ALL: Return bootflows with errors as well -- * @BOOTFLOWF_HUNT: Hunt for new bootdevs using the bootdrv hunters -+ * @BOOTFLOWIF_ALL: Return bootflows with errors as well -+ * @BOOTFLOWIF_HUNT: Hunt for new bootdevs using the bootdrv hunters - * - * Internal flags: -- * @BOOTFLOWF_SINGLE_DEV: (internal) Just scan one bootdev -- * @BOOTFLOWF_SKIP_GLOBAL: (internal) Don't scan global bootmeths -- * @BOOTFLOWF_SINGLE_UCLASS: (internal) Keep scanning through all devices in -+ * @BOOTFLOWIF_SINGLE_DEV: (internal) Just scan one bootdev -+ * @BOOTFLOWIF_SKIP_GLOBAL: (internal) Don't scan global bootmeths -+ * @BOOTFLOWIF_SINGLE_UCLASS: (internal) Keep scanning through all devices in - * this uclass (used with things like "mmc") -- * @BOOTFLOWF_SINGLE_MEDIA: (internal) Scan one media device in the uclass (used -+ * @BOOTFLOWIF_SINGLE_MEDIA: (internal) Scan one media device in the uclass (used - * with things like "mmc1") - */ --enum bootflow_flags_t { -- BOOTFLOWF_FIXED = 1 << 0, -- BOOTFLOWF_SHOW = 1 << 1, -- BOOTFLOWF_ALL = 1 << 2, -- BOOTFLOWF_HUNT = 1 << 3, -+enum bootflow_iter_flags_t { -+ BOOTFLOWIF_FIXED = 1 << 0, -+ BOOTFLOWIF_SHOW = 1 << 1, -+ BOOTFLOWIF_ALL = 1 << 2, -+ BOOTFLOWIF_HUNT = 1 << 3, - - /* - * flags used internally by standard boot - do not set these when - * calling bootflow_scan_bootdev() etc. - */ -- BOOTFLOWF_SINGLE_DEV = 1 << 16, -- BOOTFLOWF_SKIP_GLOBAL = 1 << 17, -- BOOTFLOWF_SINGLE_UCLASS = 1 << 18, -- BOOTFLOWF_SINGLE_MEDIA = 1 << 19, -+ BOOTFLOWIF_SINGLE_DEV = 1 << 16, -+ BOOTFLOWIF_SKIP_GLOBAL = 1 << 17, -+ BOOTFLOWIF_SINGLE_UCLASS = 1 << 18, -+ BOOTFLOWIF_SINGLE_MEDIA = 1 << 19, - }; - - /** -@@ -164,9 +178,9 @@ enum bootflow_meth_flags_t { - * updated to a larger value, no less than the number of available partitions. - * This ensures that iteration works through all partitions on the bootdev. - * -- * @flags: Flags to use (see enum bootflow_flags_t). If BOOTFLOWF_GLOBAL_FIRST is -- * enabled then the global bootmeths are being scanned, otherwise we have -- * moved onto the bootdevs -+ * @flags: Flags to use (see enum bootflow_iter_flags_t). If -+ * BOOTFLOWIF_GLOBAL_FIRST is enabled then the global bootmeths are being -+ * scanned, otherwise we have moved onto the bootdevs - * @dev: Current bootdev, NULL if none. This is only ever updated in - * bootflow_iter_set_dev() - * @part: Current partition number (0 for whole device) -@@ -233,7 +247,7 @@ void bootflow_init(struct bootflow *bflow, struct udevice *bootdev, - * This sets everything to the starting point, ready for use. - * - * @iter: Place to store private info (inited by this call) -- * @flags: Flags to use (see enum bootflow_flags_t) -+ * @flags: Flags to use (see enum bootflow_iter_flags_t) - */ - void bootflow_iter_init(struct bootflow_iter *iter, int flags); - -@@ -259,15 +273,16 @@ int bootflow_iter_drop_bootmeth(struct bootflow_iter *iter, - /** - * bootflow_scan_first() - find the first bootflow for a device or label - * -- * If @flags includes BOOTFLOWF_ALL then bootflows with errors are returned too -+ * If @flags includes BOOTFLOWIF_ALL then bootflows with errors are returned too - * - * @dev: Boot device to scan, NULL to work through all of them until it - * finds one that can supply a bootflow - * @label: Label to control the scan, NULL to work through all devices - * until it finds one that can supply a bootflow - * @iter: Place to store private info (inited by this call) -- * @flags: Flags for iterator (enum bootflow_flags_t). Note that if @dev -- * is NULL, then BOOTFLOWF_SKIP_GLOBAL is set automatically by this function -+ * @flags: Flags for iterator (enum bootflow_iter_flags_t). Note that if -+ * @dev is NULL, then BOOTFLOWIF_SKIP_GLOBAL is set automatically by this -+ * function - * @bflow: Place to put the bootflow if found - * Return: 0 if found, -ENODEV if no device, other -ve on other error - * (iteration can continue) -diff --git a/include/command.h b/include/command.h -index 0db4898062..c4e3170967 100644 ---- a/include/command.h -+++ b/include/command.h -@@ -13,6 +13,8 @@ - #include - #include - -+#include -+ - #ifndef NULL - #define NULL 0 - #endif -@@ -260,12 +262,17 @@ int run_command_repeatable(const char *cmd, int flag); - /** - * run_commandf() - Run a command created by a format string - * -- * The command cannot be larger than 127 characters -- * - * @fmt: printf() format string - * @...: Arguments to use (flag is always 0) -+ * -+ * The command cannot be larger than (CONFIG_SYS_CBSIZE - 1) characters. -+ * -+ * Return: -+ * Returns 0 on success, -EIO if internal output error occurred, -ENOSPC in -+ * case of 'fmt' string truncation, or != 0 on error, specific for -+ * run_command(). - */ --int run_commandf(const char *fmt, ...); -+int run_commandf(const char *fmt, ...) __printf(1, 2); - - /** - * Run a list of commands separated by ; or even \0 -@@ -376,7 +383,7 @@ int cmd_source_script(ulong addr, const char *fit_uname, const char *confname); - U_BOOT_SUBCMDS_DO_CMD(_cmdname) \ - U_BOOT_SUBCMDS_COMPLETE(_cmdname) - --#ifdef CONFIG_CMDLINE -+#if CONFIG_IS_ENABLED(CMDLINE) - #define U_BOOT_CMDREP_MKENT_COMPLETE(_name, _maxargs, _cmd_rep, \ - _usage, _help, _comp) \ - { #_name, _maxargs, _cmd_rep, cmd_discard_repeatable, \ -diff --git a/include/configs/am62ax_evm.h b/include/configs/am62ax_evm.h -index a18b1572b1..d8ef2509a8 100644 ---- a/include/configs/am62ax_evm.h -+++ b/include/configs/am62ax_evm.h -@@ -85,9 +85,6 @@ - - /* Incorporate settings into the U-Boot environment */ - #define CFG_EXTRA_ENV_SETTINGS \ -- DEFAULT_LINUX_BOOT_ENV \ -- DEFAULT_FIT_TI_ARGS \ -- EXTRA_ENV_AM62A7_BOARD_SETTINGS \ - BOOTENV - - /* Now for the remaining common defines */ -diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h -index 33dd6cfdfa..c54957300a 100644 ---- a/include/configs/am65x_evm.h -+++ b/include/configs/am65x_evm.h -@@ -17,66 +17,6 @@ - /* DDR Configuration */ - #define CFG_SYS_SDRAM_BASE1 0x880000000 - --#define PARTS_DEFAULT \ -- /* Linux partitions */ \ -- "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" -- --/* U-Boot general configuration */ --#define EXTRA_ENV_AM65X_BOARD_SETTINGS \ -- "findfdt=" \ -- "setenv name_fdt k3-am654-base-board.dtb;" \ -- "setenv fdtfile ${name_fdt}\0" \ -- "name_kern=Image\0" \ -- "console=ttyS2,115200n8\0" \ -- "stdin=serial,usbkbd\0" \ -- "args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000 " \ -- "${mtdparts}\0" \ -- "run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0" \ -- --/* U-Boot MMC-specific configuration */ --#define EXTRA_ENV_AM65X_BOARD_SETTINGS_MMC \ -- "boot=mmc\0" \ -- "mmcdev=1\0" \ -- "bootpart=1:2\0" \ -- "bootdir=/boot\0" \ -- "rd_spec=-\0" \ -- "init_mmc=run args_all args_mmc\0" \ -- "get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0" \ -- "get_overlay_mmc=" \ -- "fdt address ${fdtaddr};" \ -- "fdt resize 0x100000;" \ -- "for overlay in $name_overlays;" \ -- "do;" \ -- "load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay};" \ -- "fdt apply ${dtboaddr};" \ -- "done;\0" \ -- "get_kern_mmc=load mmc ${bootpart} ${loadaddr} " \ -- "${bootdir}/${name_kern}\0" \ -- "get_fit_mmc=load mmc ${bootpart} ${addr_fit} " \ -- "${bootdir}/${name_fit}\0" \ -- "partitions=" PARTS_DEFAULT -- --#ifdef DEFAULT_RPROCS --#undef DEFAULT_RPROCS --#endif --#define DEFAULT_RPROCS "" \ -- "0 /lib/firmware/am65x-mcu-r5f0_0-fw " \ -- "1 /lib/firmware/am65x-mcu-r5f0_1-fw " -- --#define EXTRA_ENV_AM65X_BOARD_SETTINGS_UBI \ -- "init_ubi=run args_all args_ubi; sf probe; " \ -- "ubi part ospi.rootfs; ubifsmount ubi:rootfs;\0" \ -- "get_kern_ubi=ubifsload ${loadaddr} ${bootdir}/${name_kern}\0" \ -- "get_fdt_ubi=ubifsload ${fdtaddr} ${bootdir}/${name_fdt}\0" \ -- "args_ubi=setenv bootargs console=${console} ${optargs} " \ -- "rootfstype=ubifs root=ubi0:rootfs rw ubi.mtd=ospi.rootfs\0" -- --#define EXTRA_ENV_DFUARGS \ -- DFU_ALT_INFO_MMC \ -- DFU_ALT_INFO_RAM \ -- DFU_ALT_INFO_EMMC \ -- DFU_ALT_INFO_OSPI -- - #ifdef CONFIG_TARGET_AM654_A53_EVM - #define BOOT_TARGET_DEVICES(func) \ - func(MMC, mmc, 1) \ -@@ -89,14 +29,6 @@ - - /* Incorporate settings into the U-Boot environment */ - #define CFG_EXTRA_ENV_SETTINGS \ -- DEFAULT_LINUX_BOOT_ENV \ -- DEFAULT_MMC_TI_ARGS \ -- DEFAULT_FIT_TI_ARGS \ -- EXTRA_ENV_AM65X_BOARD_SETTINGS \ -- EXTRA_ENV_AM65X_BOARD_SETTINGS_MMC \ -- EXTRA_ENV_AM65X_BOARD_SETTINGS_UBI \ -- EXTRA_ENV_RPROC_SETTINGS \ -- EXTRA_ENV_DFUARGS \ - BOOTENV - - /* Now for the remaining common defines */ -diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h -index 3ec36aa773..042fcb8757 100644 ---- a/include/configs/colibri-imx8x.h -+++ b/include/configs/colibri-imx8x.h -@@ -8,88 +8,45 @@ - - #include - #include --#include -- --#define CFG_SYS_FSL_ESDHC_ADDR 0 --#define USDHC1_BASE_ADDR 0x5b010000 --#define USDHC2_BASE_ADDR 0x5b020000 - - #define MEM_LAYOUT_ENV_SETTINGS \ -- "fdt_addr_r=0x83000000\0" \ -- "kernel_addr_r=0x81000000\0" \ -- "ramdisk_addr_r=0x83800000\0" \ -- "scriptaddr=0x80800000\0" -- --#ifdef CONFIG_AHAB_BOOT --#define AHAB_ENV "sec_boot=yes\0" --#else --#define AHAB_ENV "sec_boot=no\0" --#endif -+ "fdt_addr_r=0x9d400000\0" \ -+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ -+ "kernel_comp_addr_r=0xb0000000\0" \ -+ "kernel_comp_size=0x08000000\0" \ -+ "ramdisk_addr_r=0x9d500000\0" \ -+ "scriptaddr=0x9d480000\0" - - /* Boot M4 */ - #define M4_BOOT_ENV \ - "m4_0_image=m4_0.bin\0" \ -- "loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} " \ -- "${m4_0_image}\0" \ -- "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \ -- --#define MFG_NAND_PARTITION "" -+ "loadm4image_0=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_0_image}\0" \ -+ "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" - -+/* Enable Distro Boot */ - #define BOOT_TARGET_DEVICES(func) \ - func(MMC, mmc, 1) \ - func(MMC, mmc, 0) \ - func(DHCP, dhcp, na) - #include --#undef BOOTENV_RUN_NET_USB_START --#define BOOTENV_RUN_NET_USB_START "" -- --#define CFG_MFG_ENV_SETTINGS \ -- "mfgtool_args=setenv bootargs ${consoleargs} " \ -- "rdinit=/linuxrc g_mass_storage.stall=0 " \ -- "g_mass_storage.removable=1 g_mass_storage.idVendor=0x066F " \ -- "g_mass_storage.idProduct=0x37FF " \ -- "g_mass_storage.iSerialNumber=\"\" " MFG_NAND_PARTITION \ -- "${vidargs} clk_ignore_unused\0" \ -- "initrd_addr=0x83800000\0" \ -- "initrd_high=0xffffffff\0" \ -- "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} " \ -- "${fdt_addr};\0" \ - - /* Initial environment variables */ - #define CFG_EXTRA_ENV_SETTINGS \ -- AHAB_ENV \ - BOOTENV \ -- CFG_MFG_ENV_SETTINGS \ - M4_BOOT_ENV \ - MEM_LAYOUT_ENV_SETTINGS \ -- "boot_file=Image\0" \ - "boot_script_dhcp=boot.scr\0" \ -- "consoleargs=console=ttyLP3,${baudrate} earlycon\0" \ -- "fdt_addr=0x83000000\0" \ -- "fdt_file=fsl-imx8qxp-colibri-dsihdmi-eval-v3.dtb\0" \ -- "fdtfile=fsl-imx8qxp-colibri-dsihdmi-eval-v3.dtb\0" \ -- "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \ -- "image=Image\0" \ -+ "console=ttyLP3\0" \ -+ "fdt_board=eval-v3\0" \ - "initrd_addr=0x83800000\0" \ - "initrd_high=0xffffffffffffffff\0" \ -- "mmcargs=setenv bootargs ${consoleargs} " \ -- "root=PARTUUID=${uuid} rootwait " \ -- "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ -- "mmcpart=1\0" \ -- "panel=NULL\0" \ -- "update_uboot=askenv confirm Did you load u-boot-dtb.imx (y/N)?; " \ -+ "setup=setenv setupargs console=tty1 console=${console},${baudrate} " \ -+ "consoleblank=0 earlycon\0" \ -+ "update_uboot=askenv confirm Did you load flash.bin resp. u-boot-dtb.imx (y/N)?; " \ - "if test \"$confirm\" = \"y\"; then " \ - "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \ - "${blkcnt} / 0x200; mmc dev 0 1; mmc write ${loadaddr} 0x0 " \ -- "${blkcnt}; fi\0" \ -- "vidargs=video=imxdpufb5:off video=imxdpufb6:off video=imxdpufb7:off\0" -- --/* Link Definitions */ -- --/* Environment in eMMC, before config block at the end of 1st "boot sector" */ -- --/* On Colibri iMX8X USDHC1 is eMMC, USDHC2 is 4-bit SD */ --#define CFG_SYS_FSL_USDHC_NUM 2 -+ "${blkcnt}; fi\0" - - #define CFG_SYS_SDRAM_BASE 0x80000000 - #define PHYS_SDRAM_1 0x80000000 -@@ -97,9 +54,4 @@ - #define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */ - #define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 GB */ - --/* Generic Timer Definitions */ -- --#define BOOTAUX_RESERVED_MEM_BASE 0x88000000 --#define BOOTAUX_RESERVED_MEM_SIZE SZ_128M /* Reserve from second 128MB */ -- - #endif /* __COLIBRI_IMX8X_H */ -diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h -index 5cf73274d5..e9b382a3b7 100644 ---- a/include/configs/dh_imx6.h -+++ b/include/configs/dh_imx6.h -@@ -58,6 +58,7 @@ - - #define BOOT_TARGET_DEVICES(func) \ - func(MMC, mmc, 0) \ -+ func(MMC, mmc, 1) \ - func(MMC, mmc, 2) \ - func(USB, usb, 1) \ - func(SATA, sata, 0) \ -diff --git a/include/configs/iot2050.h b/include/configs/iot2050.h -index cfff46ce33..82174b8678 100644 ---- a/include/configs/iot2050.h -+++ b/include/configs/iot2050.h -@@ -13,12 +13,6 @@ - - #include - --/* SPL Loader Configuration */ -- --/* U-Boot general configuration */ --#define EXTRA_ENV_IOT2050_BOARD_SETTINGS \ -- "usb_pgood_delay=900\0" -- - #if IS_ENABLED(CONFIG_CMD_USB) - # define BOOT_TARGET_USB(func) \ - func(USB, usb, 0) \ -@@ -40,11 +34,18 @@ - - #include - --#define CFG_EXTRA_ENV_SETTINGS \ -+#define CFG_EXTRA_ENV_SETTINGS \ - DEFAULT_LINUX_BOOT_ENV \ -- BOOTENV \ -- EXTRA_ENV_IOT2050_BOARD_SETTINGS -+ BOOTENV - - #include - -+#ifdef CONFIG_ENV_WRITEABLE_LIST -+#define CFG_ENV_FLAGS_LIST_STATIC \ -+ "board_uuid:sw,board_name:sw,board_serial:sw,board_a5e:sw," \ -+ "mlfb:sw,fw_version:sw,seboot_version:sw," \ -+ "m2_manuel_config:sw," \ -+ "eth1addr:mw,eth2addr:mw,watchdog_timeout_ms:dw,boot_targets:sw" -+#endif -+ - #endif /* __CONFIG_IOT2050_H */ -diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h -index 48b1cea6e3..de92cd48fb 100644 ---- a/include/configs/j721e_evm.h -+++ b/include/configs/j721e_evm.h -@@ -10,10 +10,6 @@ - #define __CONFIG_J721E_EVM_H - - #include --#include --#include --#include --#include - - /* DDR Configuration */ - #define CFG_SYS_SDRAM_BASE1 0x880000000 -@@ -28,127 +24,6 @@ - #define CFG_SYS_UBOOT_BASE 0x50080000 - #endif - --/* HyperFlash related configuration */ -- --/* U-Boot general configuration */ --#define EXTRA_ENV_J721E_BOARD_SETTINGS \ -- "default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ -- "findfdt=" \ -- "setenv name_fdt ${default_device_tree};" \ -- "if test $board_name = j721e; then " \ -- "setenv name_fdt k3-j721e-common-proc-board.dtb; fi;" \ -- "if test $board_name = j721e-eaik || test $board_name = j721e-sk; then " \ -- "setenv name_fdt k3-j721e-sk.dtb; fi;" \ -- "setenv fdtfile ${name_fdt}\0" \ -- "name_kern=Image\0" \ -- "console=ttyS2,115200n8\0" \ -- "args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000 " \ -- "${mtdparts}\0" \ -- "run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0" -- --#define PARTS_DEFAULT \ -- /* Linux partitions */ \ -- "uuid_disk=${uuid_gpt_disk};" \ -- "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" -- --#ifdef CONFIG_SYS_K3_SPL_ATF --#if defined(CONFIG_TARGET_J721E_R5_EVM) --#define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \ -- "addr_mcur5f0_0load=0x89000000\0" \ -- "name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw\0" --#elif defined(CONFIG_TARGET_J7200_R5_EVM) --#define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \ -- "addr_mcur5f0_0load=0x89000000\0" \ -- "name_mcur5f0_0fw=/lib/firmware/j7200-mcu-r5f0_0-fw\0" --#endif /* CONFIG_TARGET_J721E_R5_EVM */ --#else --#define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC "" --#endif /* CONFIG_SYS_K3_SPL_ATF */ -- --/* U-Boot MMC-specific configuration */ --#define EXTRA_ENV_J721E_BOARD_SETTINGS_MMC \ -- "boot=mmc\0" \ -- "mmcdev=1\0" \ -- "bootpart=1:2\0" \ -- "bootdir=/boot\0" \ -- EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \ -- "rd_spec=-\0" \ -- "init_mmc=run args_all args_mmc\0" \ -- "get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0" \ -- "get_overlay_mmc=" \ -- "fdt address ${fdtaddr};" \ -- "fdt resize 0x100000;" \ -- "for overlay in $name_overlays;" \ -- "do;" \ -- "load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} && " \ -- "fdt apply ${dtboaddr};" \ -- "done;\0" \ -- "partitions=" PARTS_DEFAULT \ -- "get_kern_mmc=load mmc ${bootpart} ${loadaddr} " \ -- "${bootdir}/${name_kern}\0" \ -- "get_fit_mmc=load mmc ${bootpart} ${addr_fit} " \ -- "${bootdir}/${name_fit}\0" \ -- "partitions=" PARTS_DEFAULT -- --/* Set the default list of remote processors to boot */ --#if defined(CONFIG_TARGET_J7200_A72_EVM) --#define EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY \ -- "do_main_cpsw0_qsgmii_phyinit=1\0" \ -- "init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17;" \ -- "gpio clear gpio@22_16\0" \ -- "main_cpsw0_qsgmii_phyinit=" \ -- "if test ${do_main_cpsw0_qsgmii_phyinit} -eq 1 && test ${dorprocboot} -eq 1 && " \ -- "test ${boot} = mmc; then " \ -- "run init_main_cpsw0_qsgmii_phy;" \ -- "fi;\0" --#ifdef DEFAULT_RPROCS --#undef DEFAULT_RPROCS --#endif --#elif defined(CONFIG_TARGET_J721E_A72_EVM) --#define EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY \ -- "init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17;" \ -- "gpio clear gpio@22_16\0" \ -- "main_cpsw0_qsgmii_phyinit=" \ -- "if test $board_name = J721EX-PM1-SOM || test $board_name = J721EX-PM2-SOM " \ -- "|| test $board_name = j721e; then " \ -- "do_main_cpsw0_qsgmii_phyinit=1; else " \ -- "do_main_cpsw0_qsgmii_phyinit=0; fi;" \ -- "if test ${do_main_cpsw0_qsgmii_phyinit} -eq 1 && test ${dorprocboot} -eq 1 && " \ -- "test ${boot} = mmc; then " \ -- "run init_main_cpsw0_qsgmii_phy;" \ -- "fi;\0" --#ifdef DEFAULT_RPROCS --#undef DEFAULT_RPROCS --#endif --#endif -- --#ifdef CONFIG_TARGET_J721E_A72_EVM --#define DEFAULT_RPROCS "" \ -- "2 /lib/firmware/j7-main-r5f0_0-fw " \ -- "3 /lib/firmware/j7-main-r5f0_1-fw " \ -- "4 /lib/firmware/j7-main-r5f1_0-fw " \ -- "5 /lib/firmware/j7-main-r5f1_1-fw " \ -- "6 /lib/firmware/j7-c66_0-fw " \ -- "7 /lib/firmware/j7-c66_1-fw " \ -- "8 /lib/firmware/j7-c71_0-fw " --#endif /* CONFIG_TARGET_J721E_A72_EVM */ -- --#ifdef CONFIG_TARGET_J7200_A72_EVM --#define DEFAULT_RPROCS "" \ -- "2 /lib/firmware/j7200-main-r5f0_0-fw " \ -- "3 /lib/firmware/j7200-main-r5f0_1-fw " --#endif /* CONFIG_TARGET_J7200_A72_EVM */ -- --#ifndef EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY --#define EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY --#endif -- --#define EXTRA_ENV_DFUARGS \ -- DFU_ALT_INFO_MMC \ -- DFU_ALT_INFO_EMMC \ -- DFU_ALT_INFO_RAM \ -- DFU_ALT_INFO_OSPI -- - #if CONFIG_IS_ENABLED(CMD_PXE) - # define BOOT_TARGET_PXE(func) func(PXE, pxe, na) - #else -@@ -178,15 +53,6 @@ - - /* Incorporate settings into the U-Boot environment */ - #define CFG_EXTRA_ENV_SETTINGS \ -- DEFAULT_LINUX_BOOT_ENV \ -- DEFAULT_MMC_TI_ARGS \ -- DEFAULT_FIT_TI_ARGS \ -- EXTRA_ENV_J721E_BOARD_SETTINGS \ -- EXTRA_ENV_J721E_BOARD_SETTINGS_MMC \ -- EXTRA_ENV_RPROC_SETTINGS \ -- EXTRA_ENV_DFUARGS \ -- DEFAULT_UFS_TI_ARGS \ -- EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY \ - BOOTENV - - /* Now for the remaining common defines */ -diff --git a/include/configs/j721s2_evm.h b/include/configs/j721s2_evm.h -index bfada9eebc..2fa93b7961 100644 ---- a/include/configs/j721s2_evm.h -+++ b/include/configs/j721s2_evm.h -@@ -11,10 +11,6 @@ - - #include - #include --#include --#include --#include --#include - - /* DDR Configuration */ - #define CFG_SYS_SDRAM_BASE1 0x880000000 -@@ -27,120 +23,8 @@ - #define CFG_SYS_UBOOT_BASE 0x50080000 - #endif - --/* U-Boot general configuration */ --#define EXTRA_ENV_J721S2_BOARD_SETTINGS \ -- "default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ -- "findfdt=" \ -- "setenv name_fdt ${default_device_tree};" \ -- "if test $board_name = j721s2; then " \ -- "setenv name_fdt k3-j721s2-common-proc-board.dtb; fi;" \ -- "if test $board_name = am68-sk; then " \ -- "setenv name_fdt k3-am68-sk-base-board.dtb; fi;"\ -- "setenv fdtfile ${name_fdt}\0" \ -- "name_kern=Image\0" \ -- "console=ttyS2,115200n8\0" \ -- "args_all=setenv optargs earlycon=ns16550a,mmio32,0x02880000 " \ -- "${mtdparts}\0" \ -- "run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0" -- --#define PARTS_DEFAULT \ -- /* Linux partitions */ \ -- "uuid_disk=${uuid_gpt_disk};" \ -- "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" -- --#ifdef CONFIG_SYS_K3_SPL_ATF --#if defined(CONFIG_TARGET_J721S2_R5_EVM) --#define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \ -- "addr_mcur5f0_0load=0x89000000\0" \ -- "name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw\0" --#elif defined(CONFIG_TARGET_J7200_R5_EVM) --#define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \ -- "addr_mcur5f0_0load=0x89000000\0" \ -- "name_mcur5f0_0fw=/lib/firmware/j7200-mcu-r5f0_0-fw\0" --#endif /* CONFIG_TARGET_J721S2_R5_EVM */ --#else --#define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC "" --#endif /* CONFIG_SYS_K3_SPL_ATF */ -- --/* U-Boot MMC-specific configuration */ --#define EXTRA_ENV_J721S2_BOARD_SETTINGS_MMC \ -- "boot=mmc\0" \ -- "mmcdev=1\0" \ -- "bootpart=1:2\0" \ -- "bootdir=/boot\0" \ -- EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \ -- "rd_spec=-\0" \ -- "init_mmc=run args_all args_mmc\0" \ -- "get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0" \ -- "get_overlay_mmc=" \ -- "fdt address ${fdtaddr};" \ -- "fdt resize 0x100000;" \ -- "for overlay in $name_overlays;" \ -- "do;" \ -- "load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} && " \ -- "fdt apply ${dtboaddr};" \ -- "done;\0" \ -- "partitions=" PARTS_DEFAULT \ -- "get_kern_mmc=load mmc ${bootpart} ${loadaddr} " \ -- "${bootdir}/${name_kern}\0" \ -- "get_fit_mmc=load mmc ${bootpart} ${addr_fit} " \ -- "${bootdir}/${name_fit}\0" \ -- "partitions=" PARTS_DEFAULT -- --/* Set the default list of remote processors to boot */ --#if defined(CONFIG_TARGET_J721S2_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM) --#ifdef DEFAULT_RPROCS --#undef DEFAULT_RPROCS --#endif --#endif -- --#ifdef CONFIG_TARGET_J721S2_A72_EVM --#define DEFAULT_RPROCS "" \ -- "2 /lib/firmware/j721s2-main-r5f0_0-fw " \ -- "3 /lib/firmware/j721s2-main-r5f0_1-fw " \ -- "4 /lib/firmware/j721s2-main-r5f1_0-fw " \ -- "5 /lib/firmware/j721s2-main-r5f1_1-fw " \ -- "6 /lib/firmware/j721s2-c71_0-fw " \ -- "7 /lib/firmware/j721s2-c71_1-fw " --#endif /* CONFIG_TARGET_J721S2_A72_EVM */ -- --#ifdef CONFIG_TARGET_J7200_A72_EVM --#define EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY \ -- "do_main_cpsw0_qsgmii_phyinit=1\0" \ -- "init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17;" \ -- "gpio clear gpio@22_16\0" \ -- "main_cpsw0_qsgmii_phyinit=" \ -- "if test ${do_main_cpsw0_qsgmii_phyinit} -eq 1 && test ${dorprocboot} -eq 1 && " \ -- "test ${boot} = mmc; then " \ -- "run init_main_cpsw0_qsgmii_phy;" \ -- "fi;\0" --#define DEFAULT_RPROCS "" \ -- "2 /lib/firmware/j7200-main-r5f0_0-fw " \ -- "3 /lib/firmware/j7200-main-r5f0_1-fw " --#endif /* CONFIG_TARGET_J7200_A72_EVM */ -- --#ifndef EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY --#define EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY --#endif -- --/* set default dfu_bufsiz to 128KB (sector size of OSPI) */ --#define EXTRA_ENV_DFUARGS \ -- DFU_ALT_INFO_MMC \ -- DFU_ALT_INFO_EMMC \ -- DFU_ALT_INFO_RAM \ -- DFU_ALT_INFO_OSPI -- - /* Incorporate settings into the U-Boot environment */ --#define CFG_EXTRA_ENV_SETTINGS \ -- DEFAULT_LINUX_BOOT_ENV \ -- DEFAULT_MMC_TI_ARGS \ -- DEFAULT_FIT_TI_ARGS \ -- EXTRA_ENV_J721S2_BOARD_SETTINGS \ -- EXTRA_ENV_J721S2_BOARD_SETTINGS_MMC \ -- EXTRA_ENV_RPROC_SETTINGS \ -- EXTRA_ENV_DFUARGS \ -- DEFAULT_UFS_TI_ARGS \ -- EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY -+#define CFG_EXTRA_ENV_SETTINGS - - /* Now for the remaining common defines */ - #include -diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h -index 05ae2fce1f..91544c8a0e 100644 ---- a/include/configs/mx6sabreauto.h -+++ b/include/configs/mx6sabreauto.h -@@ -35,7 +35,4 @@ - - /* DMA stuff, needed for GPMI/MXS NAND support */ - --/* PMIC */ --#define CFG_POWER_PFUZE100_I2C_ADDR 0x08 -- - #endif /* __MX6SABREAUTO_CONFIG_H */ -diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h -index 30d3b9d930..844f10e422 100644 ---- a/include/configs/mx6sabresd.h -+++ b/include/configs/mx6sabresd.h -@@ -24,9 +24,6 @@ - #define CFG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19) - #endif - --/* PMIC */ --#define CFG_POWER_PFUZE100_I2C_ADDR 0x08 -- - /* USB Configs */ - #ifdef CONFIG_CMD_USB - #define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h -index a5e1dde508..d6b5e7d890 100644 ---- a/include/configs/rk3568_common.h -+++ b/include/configs/rk3568_common.h -@@ -17,10 +17,15 @@ - - #define ENV_MEM_LAYOUT_SETTINGS \ - "scriptaddr=0x00c00000\0" \ -+ "script_offset_f=0xffe000\0" \ -+ "script_size_f=0x2000\0" \ - "pxefile_addr_r=0x00e00000\0" \ - "fdt_addr_r=0x0a100000\0" \ -+ "fdtoverlay_addr_r=0x02000000\0" \ - "kernel_addr_r=0x02080000\0" \ -- "ramdisk_addr_r=0x0a200000\0" -+ "ramdisk_addr_r=0x0a200000\0" \ -+ "kernel_comp_addr_r=0x08000000\0" \ -+ "kernel_comp_size=0x2000000\0" - - #include - #define CFG_EXTRA_ENV_SETTINGS \ -diff --git a/include/configs/rk3588_common.h b/include/configs/rk3588_common.h -index abd20139aa..b9f42717b7 100644 ---- a/include/configs/rk3588_common.h -+++ b/include/configs/rk3588_common.h -@@ -16,10 +16,15 @@ - - #define ENV_MEM_LAYOUT_SETTINGS \ - "scriptaddr=0x00c00000\0" \ -+ "script_offset_f=0xffe000\0" \ -+ "script_size_f=0x2000\0" \ - "pxefile_addr_r=0x00e00000\0" \ - "fdt_addr_r=0x0a100000\0" \ -+ "fdtoverlay_addr_r=0x02000000\0" \ - "kernel_addr_r=0x02080000\0" \ -- "ramdisk_addr_r=0x0a200000\0" -+ "ramdisk_addr_r=0x0a200000\0" \ -+ "kernel_comp_addr_r=0x08000000\0" \ -+ "kernel_comp_size=0x2000000\0" - - #include - #define CFG_EXTRA_ENV_SETTINGS \ -diff --git a/include/dm/device.h b/include/dm/device.h -index e9460386ca..b86bf90609 100644 ---- a/include/dm/device.h -+++ b/include/dm/device.h -@@ -1070,7 +1070,7 @@ static inline bool device_is_on_pci_bus(const struct udevice *dev) - * sub-nodes and binds drivers for each node where a driver can be found. - * - * If this is called prior to relocation, only pre-relocation devices will be -- * bound (those marked with u-boot,dm-pre-reloc in the device tree, or where -+ * bound (those marked with bootph-all in the device tree, or where - * the driver has the DM_FLAG_PRE_RELOC flag set). Otherwise, all devices will - * be bound. - * -diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h -index 3f6b0843c5..c00677275e 100644 ---- a/include/dm/ofnode.h -+++ b/include/dm/ofnode.h -@@ -1188,12 +1188,12 @@ int ofnode_read_simple_size_cells(ofnode node); - * determine if a node was bound in one of SPL/TPL stages. - * - * There are 4 settings currently in use -- * - u-boot,dm-pre-proper: U-Boot proper pre-relocation only -- * - u-boot,dm-pre-reloc: legacy and indicates any of TPL or SPL -+ * - bootph-some-ram: U-Boot proper pre-relocation only -+ * - bootph-all: all phases - * Existing platforms only use it to indicate nodes needed in -- * SPL. Should probably be replaced by u-boot,dm-spl for new platforms. -- * - u-boot,dm-spl: SPL and U-Boot pre-relocation -- * - u-boot,dm-tpl: TPL and U-Boot pre-relocation -+ * SPL. Should probably be replaced by bootph-pre-ram for new platforms. -+ * - bootph-pre-ram: SPL and U-Boot pre-relocation -+ * - bootph-pre-sram: TPL and U-Boot pre-relocation - * - * @node: node to check - * Return: true if node is needed in SPL/TL, false otherwise -diff --git a/include/efi.h b/include/efi.h -index c3087d3da2..f0e5faa754 100644 ---- a/include/efi.h -+++ b/include/efi.h -@@ -52,7 +52,18 @@ - #define EFI32_LOADER_SIGNATURE "EL32" - #define EFI64_LOADER_SIGNATURE "EL64" - --struct efi_device_path; -+/** -+ * struct efi_device_path - device path protocol -+ * -+ * @type: device path type -+ * @sub_type: device path sub-type -+ * @length: length of the device path node including the header -+ */ -+struct efi_device_path { -+ u8 type; -+ u8 sub_type; -+ u16 length; -+} __packed; - - /* - * The EFI spec defines the EFI_GUID as -@@ -637,4 +648,13 @@ int efi_call_exit_boot_services(void); - int efi_get_mmap(struct efi_mem_desc **descp, int *sizep, uint *keyp, - int *desc_sizep, uint *versionp); - -+/** -+ * efi_show_tables() - Show a list of available tables -+ * -+ * Shows the address, GUID (and name where known) for each table -+ * -+ * @systab: System table containing the list of tables -+ */ -+void efi_show_tables(struct efi_system_table *systab); -+ - #endif /* _LINUX_EFI_H */ -diff --git a/include/efi_api.h b/include/efi_api.h -index 404e9a1171..dc6e5ce236 100644 ---- a/include/efi_api.h -+++ b/include/efi_api.h -@@ -557,12 +557,6 @@ struct efi_loaded_image { - # define DEVICE_PATH_SUB_TYPE_INSTANCE_END 0x01 - # define DEVICE_PATH_SUB_TYPE_END 0xff - --struct efi_device_path { -- u8 type; -- u8 sub_type; -- u16 length; --} __packed; -- - struct efi_mac_addr { - u8 addr[32]; - } __packed; -@@ -1916,6 +1910,25 @@ struct efi_system_resource_table { - EFI_GUID(0x4aafd29d, 0x68df, 0x49ee, 0x8a, 0xa9, \ - 0x34, 0x7d, 0x37, 0x56, 0x65, 0xa7) - -+#define EFI_LZMA_COMPRESSED \ -+ EFI_GUID(0xee4e5898, 0x3914, 0x4259, 0x9d, 0x6e, \ -+ 0xdc, 0x7b, 0xd7, 0x94, 0x03, 0xcf) -+#define EFI_DXE_SERVICES \ -+ EFI_GUID(0x05ad34ba, 0x6f02, 0x4214, 0x95, 0x2e, \ -+ 0x4d, 0xa0, 0x39, 0x8e, 0x2b, 0xb9) -+#define EFI_HOB_LIST \ -+ EFI_GUID(0x7739f24c, 0x93d7, 0x11d4, 0x9a, 0x3a, \ -+ 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d) -+#define EFI_MEMORY_TYPE \ -+ EFI_GUID(0x4c19049f, 0x4137, 0x4dd3, 0x9c, 0x10, \ -+ 0x8b, 0x97, 0xa8, 0x3f, 0xfd, 0xfa) -+#define EFI_MEM_STATUS_CODE_REC \ -+ EFI_GUID(0x060cc026, 0x4c0d, 0x4dda, 0x8f, 0x41, \ -+ 0x59, 0x5f, 0xef, 0x00, 0xa5, 0x02) -+#define EFI_GUID_EFI_ACPI1 \ -+ EFI_GUID(0xeb9d2d30, 0x2d88, 0x11d3, 0x9a, 0x16, \ -+ 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d) -+ - /** - * struct win_certificate_uefi_guid - A certificate that encapsulates - * a GUID-specific signature -diff --git a/include/efi_loader.h b/include/efi_loader.h -index 1542b4b625..cee04cbb9d 100644 ---- a/include/efi_loader.h -+++ b/include/efi_loader.h -@@ -724,8 +724,8 @@ efi_status_t efi_next_variable_name(efi_uintn_t *size, u16 **buf, - * Return: size in pages - */ - #define efi_size_in_pages(size) (((size) + EFI_PAGE_MASK) >> EFI_PAGE_SHIFT) --/* Generic EFI memory allocator, call this to get memory */ --void *efi_alloc(uint64_t len, int memory_type); -+/* Allocate boot service data pool memory */ -+void *efi_alloc(size_t len); - /* Allocate pages on the specified alignment */ - void *efi_alloc_aligned_pages(u64 len, int memory_type, size_t align); - /* More specific EFI memory allocator, called by EFI payloads */ -diff --git a/include/environment/ti/k3_dfu.env b/include/environment/ti/k3_dfu.env -new file mode 100644 -index 0000000000..201529636c ---- /dev/null -+++ b/include/environment/ti/k3_dfu.env -@@ -0,0 +1,30 @@ -+dfu_alt_info_mmc= -+ boot part 1 1; -+ rootfs part 1 2; -+ tiboot3.bin fat 1 1; -+ tispl.bin fat 1 1; -+ u-boot.img fat 1 1; -+ uEnv.txt fat 1 1; -+ sysfw.itb fat 1 1 -+ -+dfu_alt_info_emmc= -+ rawemmc raw 0 0x800000 mmcpart 1; -+ rootfs part 0 1 mmcpart 0; -+ tiboot3.bin.raw raw 0x0 0x400 mmcpart 1; -+ tispl.bin.raw raw 0x400 0x1000 mmcpart 1; -+ u-boot.img.raw raw 0x1400 0x2000 mmcpart 1; -+ u-env.raw raw 0x3400 0x100 mmcpart 1; -+ sysfw.itb.raw raw 0x3600 0x800 mmcpart 1 -+ -+dfu_alt_info_ospi= -+ tiboot3.bin raw 0x0 0x080000; -+ tispl.bin raw 0x080000 0x200000; -+ u-boot.img raw 0x280000 0x400000; -+ u-boot-env raw 0x680000 0x020000; -+ sysfw.itb raw 0x6c0000 0x100000; -+ rootfs raw 0x800000 0x3800000 -+ -+dfu_alt_info_ram= -+ tispl.bin ram 0x80080000 0x200000; -+ u-boot.img ram 0x81000000 0x400000 -+ -diff --git a/include/environment/ti/k3_rproc.env b/include/environment/ti/k3_rproc.env -new file mode 100644 -index 0000000000..21dad7b241 ---- /dev/null -+++ b/include/environment/ti/k3_rproc.env -@@ -0,0 +1,26 @@ -+dorprocboot=0 -+boot_rprocs= -+ if test ${dorprocboot} -eq 1 && test ${boot} = mmc; then -+ rproc init; -+ run boot_rprocs_mmc; -+ fi; -+rproc_load_and_boot_one= -+ if load mmc ${bootpart} $loadaddr ${rproc_fw}; then -+ if rproc load ${rproc_id} ${loadaddr} ${filesize}; then -+ rproc start ${rproc_id} -+ fi; -+ fi -+boot_rprocs_mmc= -+ env set rproc_id; -+ env set rproc_fw; -+ for i in ${rproc_fw_binaries} ; do -+ if test -z ${rproc_id} ; then -+ env set rproc_id $i; -+ else -+ env set rproc_fw $i; -+ run rproc_load_and_boot_one; -+ env set rproc_id; -+ env set rproc_fw; -+ fi; -+ done -+ -diff --git a/include/environment/ti/mmc.env b/include/environment/ti/mmc.env -new file mode 100644 -index 0000000000..5677d057d8 ---- /dev/null -+++ b/include/environment/ti/mmc.env -@@ -0,0 +1,61 @@ -+mmcdev=0 -+mmcrootfstype=ext4 rootwait -+finduuid=part uuid ${boot} ${bootpart} uuid -+args_mmc=run finduuid;setenv bootargs console=${console} -+ ${optargs} -+ root=PARTUUID=${uuid} rw -+ rootfstype=${mmcrootfstype} -+loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr -+bootscript=echo Running bootscript from mmc${mmcdev} ...; -+ source ${loadaddr} -+bootenvfile=uEnv.txt -+importbootenv=echo Importing environment from mmc${mmcdev} ...; -+ env import -t ${loadaddr} ${filesize} -+loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile} -+loadimage=load ${devtype} ${bootpart} ${loadaddr} ${bootdir}/${bootfile} -+loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile} -+envboot=mmc dev ${mmcdev}; -+ if mmc rescan; then -+ echo SD/MMC found on device ${mmcdev}; -+ if run loadbootscript; then -+ run bootscript; -+ else -+ if run loadbootenv; then -+ echo Loaded env from ${bootenvfile}; -+ run importbootenv; -+ fi; -+ if test -n $uenvcmd; then -+ echo Running uenvcmd ...; -+ run uenvcmd; -+ fi; -+ fi; -+ fi; -+mmcloados= -+ if test ${boot_fdt} = yes || test ${boot_fdt} = try; then -+ if run loadfdt; then -+ bootz ${loadaddr} - ${fdtaddr}; -+ else -+ if test ${boot_fdt} = try; then -+ bootz; -+ else -+ echo WARN: Cannot load the DT; -+ fi; -+ fi; -+ else -+ bootz; -+ fi; -+mmcboot=mmc dev ${mmcdev}; -+ devnum=${mmcdev}; -+ devtype=mmc; -+ if mmc rescan; then -+ echo SD/MMC found on device ${mmcdev}; -+ if run loadimage; then -+ run args_mmc; -+ if test ${boot_fit} -eq 1; then -+ run run_fit; -+ else -+ run mmcloados; -+ fi; -+ fi; -+fi; -+ -diff --git a/include/environment/ti/nand.env b/include/environment/ti/nand.env -new file mode 100644 -index 0000000000..4e185c1b5f ---- /dev/null -+++ b/include/environment/ti/nand.env -@@ -0,0 +1,14 @@ -+mtdids=nor0=47040000.spi.0,nor0=47034000.hyperbus -+mtdparts=mtdparts=47040000.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),256k(ospi.env),256k(ospi.env.backup),57088k@8m(ospi.rootfs),256k(ospi.phypattern);47034000.hyperbus:512k(hbmc.tiboot3),2m(hbmc.tispl),4m(hbmc.u-boot),256k(hbmc.env),-@8m(hbmc.rootfs) -+nandargs=setenv bootargs console=${console} -+ ${optargs} -+ root=${nandroot} -+ rootfstype=${nandrootfstype} -+nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,2048 -+nandrootfstype=ubifs rootwait -+nandboot=echo Booting from nand ...; -+ run nandargs; -+ nand read ${fdtaddr} NAND.u-boot-spl-os; -+ nand read ${loadaddr} NAND.kernel; -+ bootz ${loadaddr} - ${fdtaddr} -+ -diff --git a/include/environment/ti/ti_armv7_common.env b/include/environment/ti/ti_armv7_common.env -new file mode 100644 -index 0000000000..4d334648c0 ---- /dev/null -+++ b/include/environment/ti/ti_armv7_common.env -@@ -0,0 +1,24 @@ -+loadaddr=0x82000000 -+kernel_addr_r=0x82000000 -+fdtaddr=0x88000000 -+dtboaddr=0x89000000 -+fdt_addr_r=0x88000000 -+fdtoverlay_addr_r=0x89000000 -+rdaddr=0x88080000 -+ramdisk_addr_r=0x88080000 -+scriptaddr=0x80000000 -+pxefile_addr_r=0x80100000 -+bootm_size=0x10000000 -+boot_fdt=try -+ -+boot_fit=0 -+addr_fit=0x90000000 -+name_fit=fitImage -+update_to_fit=setenv loadaddr ${addr_fit}; setenv bootfile ${name_fit} -+get_overlaystring= -+ for overlay in $name_overlays; -+ do; -+ setenv overlaystring ${overlaystring}'#'${overlay}; -+ done; -+run_fit=bootm ${addr_fit}#conf-${fdtfile}${overlaystring} -+ -diff --git a/include/environment/ti/ufs.env b/include/environment/ti/ufs.env -new file mode 100644 -index 0000000000..509a87b89e ---- /dev/null -+++ b/include/environment/ti/ufs.env -@@ -0,0 +1,22 @@ -+scsirootfstype=ext4 rootwait -+ufs_finduuid=part uuid scsi ${bootpart} uuid -+args_ufs=setenv devtype scsi;setenv bootpart 1:1; -+ run ufs_finduuid; -+ setenv bootargs console = ${console} -+ ${optargs} -+ root=PARTUUID=${uuid} rw -+ rootfstype=${scsirootfstype}; -+ setenv devtype scsi; -+ setenv bootpart 1:1 -+init_ufs=ufs init; scsi scan; run args_ufs -+get_kern_ufs=load ${devtype} ${bootpart} ${loadaddr} ${bootdir}/${name_kern} -+get_fdt_ufs=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile} -+get_overlay_ufs= -+ fdt address ${fdtaddr}; -+ fdt resize 0x100000; -+ for overlay in $name_overlays; -+ do; -+ load scsi ${bootpart} ${dtboaddr} ${bootdir}/${overlay} && -+ fdt apply ${dtboaddr}; -+ done; -+ -diff --git a/include/faraday/fttmr010.h b/include/faraday/fttmr010.h -index ec1c9895f5..5b1bef38c7 100644 ---- a/include/faraday/fttmr010.h -+++ b/include/faraday/fttmr010.h -@@ -26,6 +26,7 @@ struct fttmr010 { - unsigned int cr; /* 0x30 */ - unsigned int interrupt_state; /* 0x34 */ - unsigned int interrupt_mask; /* 0x38 */ -+ unsigned int revision; /* 0x3c */ - }; - - /* -diff --git a/include/init.h b/include/init.h -index 699dc2482c..8873081685 100644 ---- a/include/init.h -+++ b/include/init.h -@@ -353,6 +353,9 @@ void relocate_code(ulong start_addr_sp, struct global_data *new_gd, - void bdinfo_print_num_l(const char *name, ulong value); - void bdinfo_print_num_ll(const char *name, unsigned long long value); - -+/* Print a string value (for use in arch_print_bdinfo()) */ -+void bdinfo_print_str(const char *name, const char *str); -+ - /* Print a clock speed in MHz */ - void bdinfo_print_mhz(const char *name, unsigned long hz); - -diff --git a/include/linux/kernel.h b/include/linux/kernel.h -index 3e71d61074..5cd6c9dc82 100644 ---- a/include/linux/kernel.h -+++ b/include/linux/kernel.h -@@ -284,4 +284,28 @@ - offsetof(struct structure, member) == (offset), \ - "`struct " #structure "` offset for `" #member "` is not " #offset) - -+#define __find_closest(x, a, as, op) \ -+({ \ -+ typeof(as) __fc_i, __fc_as = (as) - 1; \ -+ typeof(x) __fc_x = (x); \ -+ typeof(*a) const *__fc_a = (a); \ -+ for (__fc_i = 0; __fc_i < __fc_as; __fc_i++) { \ -+ if (__fc_x op DIV_ROUND_CLOSEST(__fc_a[__fc_i] + \ -+ __fc_a[__fc_i + 1], 2)) \ -+ break; \ -+ } \ -+ (__fc_i); \ -+}) -+ -+/** -+ * find_closest - locate the closest element in a sorted array -+ * @x: The reference value. -+ * @a: The array in which to look for the closest element. Must be sorted -+ * in ascending order. -+ * @as: Size of 'a'. -+ * -+ * Returns the index of the element closest to 'x'. -+ */ -+#define find_closest(x, a, as) __find_closest(x, a, as, <=) -+ - #endif -diff --git a/include/mux.h b/include/mux.h -index 9f80991274..c92d887591 100644 ---- a/include/mux.h -+++ b/include/mux.h -@@ -23,7 +23,7 @@ - struct udevice; - struct mux_control; - --#if CONFIG_IS_ENABLED(MULTIPLEXER) -+#if IS_ENABLED(CONFIG_MULTIPLEXER) - /** - * mux_control_states() - Query the number of multiplexer states. - * @mux: The mux-control to query. -diff --git a/include/pci.h b/include/pci.h -index c55d6107a4..2f5eb30b83 100644 ---- a/include/pci.h -+++ b/include/pci.h -@@ -360,6 +360,13 @@ - #define PCI_EXP_TYPE_PCIE_BRIDGE 0x8 /* PCI/PCI-X to PCIe Bridge */ - #define PCI_EXP_DEVCAP 4 /* Device capabilities */ - #define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */ -+#define PCI_EXP_DEVCAP_PAYLOAD 0x0007 /* Max payload size supported */ -+#define PCI_EXP_DEVCAP_PAYLOAD_128B 0x0000 /* 128 Bytes */ -+#define PCI_EXP_DEVCAP_PAYLOAD_256B 0x0001 /* 256 Bytes */ -+#define PCI_EXP_DEVCAP_PAYLOAD_512B 0x0002 /* 512 Bytes */ -+#define PCI_EXP_DEVCAP_PAYLOAD_1024B 0x0003 /* 1024 Bytes */ -+#define PCI_EXP_DEVCAP_PAYLOAD_2048B 0x0004 /* 2048 Bytes */ -+#define PCI_EXP_DEVCAP_PAYLOAD_4096B 0x0005 /* 4096 Bytes */ - #define PCI_EXP_DEVCTL 8 /* Device Control */ - #define PCI_EXP_DEVCTL_PAYLOAD 0x00e0 /* Max_Payload_Size */ - #define PCI_EXP_DEVCTL_PAYLOAD_128B 0x0000 /* 128 Bytes */ -diff --git a/include/power/pca9450.h b/include/power/pca9450.h -index 6efecee96c..b8219d535a 100644 ---- a/include/power/pca9450.h -+++ b/include/power/pca9450.h -@@ -59,6 +59,7 @@ int power_pca9450_init(unsigned char bus, unsigned char addr); - enum { - NXP_CHIP_TYPE_PCA9450A = 0, - NXP_CHIP_TYPE_PCA9450BC, -+ NXP_CHIP_TYPE_PCA9451A, - NXP_CHIP_TYPE_AMOUNT - }; - -diff --git a/include/spl.h b/include/spl.h -index 827bd25c88..7e0f5ac63b 100644 ---- a/include/spl.h -+++ b/include/spl.h -@@ -466,6 +466,19 @@ int spl_mmc_emmc_boot_partition(struct mmc *mmc); - - void spl_set_bd(void); - -+/** -+ * spl_mmc_get_uboot_raw_sector() - Provide raw sector of the start of U-Boot -+ * -+ * This is a weak function which by default will provide the raw sector that is -+ * where the start of the U-Boot image has been written to. -+ * -+ * @mmc: struct mmc that describes the devie where U-Boot resides -+ * @raw_sect: The raw sector number where U-Boot is by default. -+ * Return: The raw sector location that U-Boot resides at -+ */ -+unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc, -+ unsigned long raw_sect); -+ - /** - * spl_set_header_raw_uboot() - Set up a standard SPL image structure - * -@@ -884,5 +897,6 @@ void spl_perform_fixups(struct spl_image_info *spl_image); - */ - struct legacy_img_hdr *spl_get_load_buffer(ssize_t offset, size_t size); - -+void board_boot_order(u32 *spl_boot_list); - void spl_save_restore_data(void); - #endif -diff --git a/include/test/suites.h b/include/test/suites.h -index 7c4960c004..7349ce5aa6 100644 ---- a/include/test/suites.h -+++ b/include/test/suites.h -@@ -48,6 +48,8 @@ int do_ut_mem(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); - int do_ut_optee(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); - int do_ut_overlay(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[]); -+int do_ut_pci_mps(struct cmd_tbl *cmdtp, int flag, int argc, -+ char *const argv[]); - int do_ut_print(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); - int do_ut_seama(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); - int do_ut_setexpr(struct cmd_tbl *cmdtp, int flag, int argc, -diff --git a/include/test/ut.h b/include/test/ut.h -index 2b0dab32f6..dddf9ad241 100644 ---- a/include/test/ut.h -+++ b/include/test/ut.h -@@ -125,36 +125,47 @@ int ut_check_console_dump(struct unit_test_state *uts, int total_bytes); - fmt, ##args) - - /* Assert that a condition is non-zero */ --#define ut_assert(cond) \ -+#define ut_assert(cond) ({ \ -+ int __ret = 0; \ -+ \ - if (!(cond)) { \ - ut_fail(uts, __FILE__, __LINE__, __func__, #cond); \ -- return CMD_RET_FAILURE; \ -- } -+ __ret = CMD_RET_FAILURE; \ -+ } \ -+ __ret; \ -+}) - - /* Assert that a condition is non-zero, with printf() string */ --#define ut_assertf(cond, fmt, args...) \ -+#define ut_assertf(cond, fmt, args...) ({ \ -+ int __ret = 0; \ -+ \ - if (!(cond)) { \ - ut_failf(uts, __FILE__, __LINE__, __func__, #cond, \ - fmt, ##args); \ -- return CMD_RET_FAILURE; \ -- } -+ __ret = CMD_RET_FAILURE; \ -+ } \ -+ __ret; \ -+}) - - /* Assert that two int expressions are equal */ --#define ut_asserteq(expr1, expr2) { \ -+#define ut_asserteq(expr1, expr2) ({ \ - unsigned int _val1 = (expr1), _val2 = (expr2); \ -+ int __ret = 0; \ - \ - if (_val1 != _val2) { \ - ut_failf(uts, __FILE__, __LINE__, __func__, \ - #expr1 " == " #expr2, \ - "Expected %#x (%d), got %#x (%d)", \ - _val1, _val1, _val2, _val2); \ -- return CMD_RET_FAILURE; \ -+ __ret = CMD_RET_FAILURE; \ - } \ --} -+ __ret; \ -+}) - - /* Assert that two 64 int expressions are equal */ --#define ut_asserteq_64(expr1, expr2) { \ -+#define ut_asserteq_64(expr1, expr2) ({ \ - u64 _val1 = (expr1), _val2 = (expr2); \ -+ int __ret = 0; \ - \ - if (_val1 != _val2) { \ - ut_failf(uts, __FILE__, __LINE__, __func__, \ -@@ -164,43 +175,49 @@ int ut_check_console_dump(struct unit_test_state *uts, int total_bytes); - (unsigned long long)_val1, \ - (unsigned long long)_val2, \ - (unsigned long long)_val2); \ -- return CMD_RET_FAILURE; \ -+ __ret = CMD_RET_FAILURE; \ - } \ --} -+ __ret; \ -+}) - - /* Assert that two string expressions are equal */ --#define ut_asserteq_str(expr1, expr2) { \ -+#define ut_asserteq_str(expr1, expr2) ({ \ - const char *_val1 = (expr1), *_val2 = (expr2); \ -+ int __ret = 0; \ - \ - if (strcmp(_val1, _val2)) { \ - ut_failf(uts, __FILE__, __LINE__, __func__, \ - #expr1 " = " #expr2, \ - "Expected \"%s\", got \"%s\"", _val1, _val2); \ -- return CMD_RET_FAILURE; \ -+ __ret = CMD_RET_FAILURE; \ - } \ --} -+ __ret; \ -+}) - - /* - * Assert that two string expressions are equal, up to length of the - * first - */ --#define ut_asserteq_strn(expr1, expr2) { \ -+#define ut_asserteq_strn(expr1, expr2) ({ \ - const char *_val1 = (expr1), *_val2 = (expr2); \ - int _len = strlen(_val1); \ -+ int __ret = 0; \ - \ - if (memcmp(_val1, _val2, _len)) { \ - ut_failf(uts, __FILE__, __LINE__, __func__, \ - #expr1 " = " #expr2, \ - "Expected \"%.*s\", got \"%.*s\"", \ - _len, _val1, _len, _val2); \ -- return CMD_RET_FAILURE; \ -+ __ret = CMD_RET_FAILURE; \ - } \ --} -+ __ret; \ -+}) - - /* Assert that two memory areas are equal */ --#define ut_asserteq_mem(expr1, expr2, len) { \ -+#define ut_asserteq_mem(expr1, expr2, len) ({ \ - const u8 *_val1 = (u8 *)(expr1), *_val2 = (u8 *)(expr2); \ - const uint __len = len; \ -+ int __ret = 0; \ - \ - if (memcmp(_val1, _val2, __len)) { \ - char __buf1[64 + 1] = "\0"; \ -@@ -211,128 +228,163 @@ int ut_check_console_dump(struct unit_test_state *uts, int total_bytes); - #expr1 " = " #expr2, \ - "Expected \"%s\", got \"%s\"", \ - __buf1, __buf2); \ -- return CMD_RET_FAILURE; \ -+ __ret = CMD_RET_FAILURE; \ - } \ --} -+ __ret; \ -+}) - - /* Assert that two pointers are equal */ --#define ut_asserteq_ptr(expr1, expr2) { \ -+#define ut_asserteq_ptr(expr1, expr2) ({ \ - const void *_val1 = (expr1), *_val2 = (expr2); \ -+ int __ret = 0; \ - \ - if (_val1 != _val2) { \ - ut_failf(uts, __FILE__, __LINE__, __func__, \ - #expr1 " = " #expr2, \ - "Expected %p, got %p", _val1, _val2); \ -- return CMD_RET_FAILURE; \ -+ __ret = CMD_RET_FAILURE; \ - } \ --} -+ __ret; \ -+}) - - /* Assert that two addresses (converted from pointers) are equal */ --#define ut_asserteq_addr(expr1, expr2) { \ -+#define ut_asserteq_addr(expr1, expr2) ({ \ - ulong _val1 = map_to_sysmem(expr1); \ - ulong _val2 = map_to_sysmem(expr2); \ -+ int __ret = 0; \ - \ - if (_val1 != _val2) { \ - ut_failf(uts, __FILE__, __LINE__, __func__, \ - #expr1 " = " #expr2, \ - "Expected %lx, got %lx", _val1, _val2); \ -- return CMD_RET_FAILURE; \ -+ __ret = CMD_RET_FAILURE; \ - } \ --} -+ __ret; \ -+}) - - /* Assert that a pointer is NULL */ --#define ut_assertnull(expr) { \ -+#define ut_assertnull(expr) ({ \ - const void *_val = (expr); \ -+ int __ret = 0; \ - \ -- if (_val) { \ -+ if (_val) { \ - ut_failf(uts, __FILE__, __LINE__, __func__, \ - #expr " != NULL", \ - "Expected NULL, got %p", _val); \ -- return CMD_RET_FAILURE; \ -+ __ret = CMD_RET_FAILURE; \ - } \ --} -+ __ret; \ -+}) - - /* Assert that a pointer is not NULL */ --#define ut_assertnonnull(expr) { \ -+#define ut_assertnonnull(expr) ({ \ - const void *_val = (expr); \ -+ int __ret = 0; \ - \ -- if (!_val) { \ -+ if (!_val) { \ - ut_failf(uts, __FILE__, __LINE__, __func__, \ - #expr " = NULL", \ - "Expected non-null, got NULL"); \ -- return CMD_RET_FAILURE; \ -+ __ret = CMD_RET_FAILURE; \ - } \ --} -+ __ret; \ -+}) - - /* Assert that a pointer is not an error pointer */ --#define ut_assertok_ptr(expr) { \ -+#define ut_assertok_ptr(expr) ({ \ - const void *_val = (expr); \ -+ int __ret = 0; \ - \ - if (IS_ERR(_val)) { \ - ut_failf(uts, __FILE__, __LINE__, __func__, \ - #expr " = NULL", \ - "Expected pointer, got error %ld", \ - PTR_ERR(_val)); \ -- return CMD_RET_FAILURE; \ -+ __ret = CMD_RET_FAILURE; \ - } \ --} -+ __ret; \ -+}) - - /* Assert that an operation succeeds (returns 0) */ - #define ut_assertok(cond) ut_asserteq(0, cond) - - /* Assert that the next console output line matches */ --#define ut_assert_nextline(fmt, args...) \ -+#define ut_assert_nextline(fmt, args...) ({ \ -+ int __ret = 0; \ -+ \ - if (ut_check_console_line(uts, fmt, ##args)) { \ - ut_failf(uts, __FILE__, __LINE__, __func__, \ - "console", "\nExpected '%s',\n got '%s'", \ - uts->expect_str, uts->actual_str); \ -- return CMD_RET_FAILURE; \ -+ __ret = CMD_RET_FAILURE; \ - } \ -+ __ret; \ -+}) - - /* Assert that the next console output line matches up to the length */ --#define ut_assert_nextlinen(fmt, args...) \ -+#define ut_assert_nextlinen(fmt, args...) ({ \ -+ int __ret = 0; \ -+ \ - if (ut_check_console_linen(uts, fmt, ##args)) { \ - ut_failf(uts, __FILE__, __LINE__, __func__, \ - "console", "\nExpected '%s',\n got '%s'", \ - uts->expect_str, uts->actual_str); \ -- return CMD_RET_FAILURE; \ -+ __ret = CMD_RET_FAILURE; \ - } \ -+ __ret; \ -+}) - - /* Assert that there is a 'next' console output line, and skip it */ --#define ut_assert_skipline() \ -+#define ut_assert_skipline() ({ \ -+ int __ret = 0; \ -+ \ - if (ut_check_skipline(uts)) { \ - ut_failf(uts, __FILE__, __LINE__, __func__, \ - "console", "\nExpected a line, got end"); \ -- return CMD_RET_FAILURE; \ -+ __ret = CMD_RET_FAILURE; \ - } \ -+ __ret; \ -+}) - - /* Assert that a following console output line matches */ --#define ut_assert_skip_to_line(fmt, args...) \ -+#define ut_assert_skip_to_line(fmt, args...) ({ \ -+ int __ret = 0; \ -+ \ - if (ut_check_skip_to_line(uts, fmt, ##args)) { \ - ut_failf(uts, __FILE__, __LINE__, __func__, \ - "console", "\nExpected '%s',\n got to '%s'", \ - uts->expect_str, uts->actual_str); \ -- return CMD_RET_FAILURE; \ -+ __ret = CMD_RET_FAILURE; \ - } \ -+ __ret; \ -+}) - - /* Assert that there is no more console output */ --#define ut_assert_console_end() \ -+#define ut_assert_console_end() ({ \ -+ int __ret = 0; \ -+ \ - if (ut_check_console_end(uts)) { \ - ut_failf(uts, __FILE__, __LINE__, __func__, \ - "console", "Expected no more output, got '%s'",\ - uts->actual_str); \ -- return CMD_RET_FAILURE; \ -+ __ret = CMD_RET_FAILURE; \ - } \ -+ __ret; \ -+}) - - /* Assert that the next lines are print_buffer() dump at an address */ --#define ut_assert_nextlines_are_dump(total_bytes) \ -+#define ut_assert_nextlines_are_dump(total_bytes) ({ \ -+ int __ret = 0; \ -+ \ - if (ut_check_console_dump(uts, total_bytes)) { \ - ut_failf(uts, __FILE__, __LINE__, __func__, \ - "console", \ - "Expected dump of length %x bytes, got '%s'", \ - total_bytes, uts->actual_str); \ -- return CMD_RET_FAILURE; \ -+ __ret = CMD_RET_FAILURE; \ - } \ -+ __ret; \ -+}) - - /* Assert that the next console output line is empty */ - #define ut_assert_nextline_empty() \ -diff --git a/include/tpm-common.h b/include/tpm-common.h -index b2c5404430..1ba81386ce 100644 ---- a/include/tpm-common.h -+++ b/include/tpm-common.h -@@ -94,7 +94,7 @@ struct tpm_ops { - * close(). - * - * @dev: Device to open -- * @return 0 ok OK, -ve on error -+ * @return 0 ok OK, -EBUSY if already opened, other -ve on other error - */ - int (*open)(struct udevice *dev); - -diff --git a/include/tpm-v1.h b/include/tpm-v1.h -index 33d53fb695..60b71e2a4b 100644 ---- a/include/tpm-v1.h -+++ b/include/tpm-v1.h -@@ -591,4 +591,15 @@ u32 tpm_set_global_lock(struct udevice *dev); - */ - u32 tpm1_resume(struct udevice *dev); - -+/** -+ * tpm1_auto_start() - start up the TPM -+ * -+ * This does not do a self test. -+ * -+ * @dev TPM device -+ * Return: TPM2_RC_SUCCESS, on success, or when the TPM returns -+ * TPM_INVALID_POSTINIT; TPM_FAILEDSELFTEST, if the TPM is in failure state -+ */ -+u32 tpm1_auto_start(struct udevice *dev); -+ - #endif /* __TPM_V1_H */ -diff --git a/include/tpm-v2.h b/include/tpm-v2.h -index 2df3dad553..2b6980e441 100644 ---- a/include/tpm-v2.h -+++ b/include/tpm-v2.h -@@ -690,4 +690,20 @@ u32 tpm2_report_state(struct udevice *dev, uint vendor_cmd, uint vendor_subcmd, - u32 tpm2_enable_nvcommits(struct udevice *dev, uint vendor_cmd, - uint vendor_subcmd); - -+/** -+ * tpm2_auto_start() - start up the TPM and perform selftests. -+ * If a testable function has not been tested and is -+ * requested the TPM2 will return TPM_RC_NEEDS_TEST. -+ * -+ * @param dev TPM device -+ * Return: TPM2_RC_TESTING, if TPM2 self-test is in progress. -+ * TPM2_RC_SUCCESS, if testing of all functions is complete without -+ * functional failures. -+ * TPM2_RC_FAILURE, if any test failed. -+ * TPM2_RC_INITIALIZE, if the TPM has not gone through the Startup -+ * sequence -+ -+ */ -+u32 tpm2_auto_start(struct udevice *dev); -+ - #endif /* __TPM_V2_H */ -diff --git a/include/tpm_api.h b/include/tpm_api.h -index 8979d9d6df..022a8bbaec 100644 ---- a/include/tpm_api.h -+++ b/include/tpm_api.h -@@ -331,4 +331,12 @@ static inline bool tpm_is_v2(struct udevice *dev) - return IS_ENABLED(CONFIG_TPM_V2) && tpm_get_version(dev) == TPM_V2; - } - -+/** -+ * tpm_auto_start() - start up the TPM and perform selftests -+ * -+ * @param dev TPM device -+ * Return: return code of the operation (0 = success) -+ */ -+u32 tpm_auto_start(struct udevice *dev); -+ - #endif /* __TPM_API_H */ -diff --git a/include/vesa.h b/include/vesa.h -index a42c179686..9285bfa921 100644 ---- a/include/vesa.h -+++ b/include/vesa.h -@@ -108,7 +108,21 @@ extern struct vesa_state mode_info; - - struct video_priv; - struct video_uc_plat; --int vesa_setup_video_priv(struct vesa_mode_info *vesa, -+ -+/** -+ * vesa_setup_video_priv() - Set up a video device using VESA information -+ * -+ * The vesa struct is used by various x86 drivers, so this is a common function -+ * to use it to set up the video. -+ * -+ * @vesa: Vesa information to use (vesa->phys_base_ptr is ignored) -+ * @fb: Frame buffer address (since vesa->phys_base_ptr is only 32 bits) -+ * @uc_priv: Video device's uclass-private information -+ * @plat: Video devices's uclass-private platform data -+ * Returns: 0 if OK, -ENXIO if the x resolution is 0, -EEPROTONOSUPPORT if the -+ * pixel format is not supported -+ */ -+int vesa_setup_video_priv(struct vesa_mode_info *vesa, u64 fb, - struct video_priv *uc_priv, - struct video_uc_plat *plat); - int vesa_setup_video(struct udevice *dev, int (*int15_handler)(void)); -diff --git a/include/video.h b/include/video.h -index 3f67a93bc9..4d99e5dc27 100644 ---- a/include/video.h -+++ b/include/video.h -@@ -24,6 +24,7 @@ struct udevice; - * @base: Base address of frame buffer, 0 if not yet known - * @copy_base: Base address of a hardware copy of the frame buffer. See - * CONFIG_VIDEO_COPY. -+ * @copy_size: Size of copy framebuffer, used if @size is 0 - * @hide_logo: Hide the logo (used for testing) - */ - struct video_uc_plat { -@@ -31,6 +32,7 @@ struct video_uc_plat { - uint size; - ulong base; - ulong copy_base; -+ ulong copy_size; - bool hide_logo; - }; - -diff --git a/include/video_console.h b/include/video_console.h -index 9d2c0f210e..3db9a7e1fb 100644 ---- a/include/video_console.h -+++ b/include/video_console.h -@@ -160,6 +160,15 @@ struct vidconsole_ops { - int (*get_font)(struct udevice *dev, int seq, - struct vidfont_info *info); - -+ /** -+ * get_font_size() - get the current font name and size -+ * -+ * @dev: vidconsole device -+ * @sizep: Place to put the font size (nominal height in pixels) -+ * Returns: Current font name -+ */ -+ const char *(*get_font_size)(struct udevice *dev, uint *sizep); -+ - /** - * select_font() - Select a particular font by name / size - * -@@ -276,6 +285,15 @@ int vidconsole_put_string(struct udevice *dev, const char *str); - void vidconsole_position_cursor(struct udevice *dev, unsigned col, - unsigned row); - -+/** -+ * vidconsole_clear_and_reset() - Clear the console and reset the cursor -+ * -+ * The cursor is placed at the start of the console -+ * -+ * @dev: vidconsole device to adjust -+ */ -+int vidconsole_clear_and_reset(struct udevice *dev); -+ - /** - * vidconsole_set_cursor_pos() - set cursor position - * -@@ -303,9 +321,10 @@ void vidconsole_list_fonts(struct udevice *dev); - * - * @dev: vidconsole device - * @sizep: Place to put the font size (nominal height in pixels) -- * Returns: Current font name -+ * @name: pointer to font name, a placeholder for result -+ * Return: 0 if OK, -ENOSYS if not implemented in driver - */ --const char *vidconsole_get_font_size(struct udevice *dev, uint *sizep); -+int vidconsole_get_font_size(struct udevice *dev, const char **name, uint *sizep); - - #ifdef CONFIG_VIDEO_COPY - /** -@@ -340,6 +359,9 @@ int vidconsole_sync_copy(struct udevice *dev, void *from, void *to); - int vidconsole_memmove(struct udevice *dev, void *dst, const void *src, - int size); - #else -+ -+#include -+ - static inline int vidconsole_sync_copy(struct udevice *dev, void *from, - void *to) - { -diff --git a/include/video_font.h b/include/video_font.h -index 5e23f70f85..05d3f989a7 100644 ---- a/include/video_font.h -+++ b/include/video_font.h -@@ -7,10 +7,35 @@ - #ifndef _VIDEO_FONT_ - #define _VIDEO_FONT_ - --#ifdef CONFIG_VIDEO_FONT_4X6 --#include --#else - #include -+ -+#if defined(CONFIG_VIDEO_FONT_4X6) -+#include -+#endif -+#if defined(CONFIG_VIDEO_FONT_8X16) -+#include -+#endif -+#if defined(CONFIG_VIDEO_FONT_SUN12X22) -+#include -+#endif -+#if defined(CONFIG_VIDEO_FONT_16X32) -+#include -+#endif -+ -+static struct video_fontdata __maybe_unused fonts[] = { -+#if defined(CONFIG_VIDEO_FONT_8X16) -+ FONT_ENTRY(8, 16, 8x16), -+#endif -+#if defined(CONFIG_VIDEO_FONT_4X6) -+ FONT_ENTRY(4, 6, 4x6), -+#endif -+#if defined(CONFIG_VIDEO_FONT_SUN12X22) -+ FONT_ENTRY(12, 22, 12x22), -+#endif -+#if defined(CONFIG_VIDEO_FONT_16X32) -+ FONT_ENTRY(16, 32, 16x32), - #endif -+ {/* list terminator */} -+}; - - #endif /* _VIDEO_FONT_ */ -diff --git a/include/video_font_4x6.h b/include/video_font_4x6.h -index c7e6351b64..1b8c02510b 100644 ---- a/include/video_font_4x6.h -+++ b/include/video_font_4x6.h -@@ -38,15 +38,12 @@ __END__; - MSBit to LSBit = left to right. - */ - --#ifndef _VIDEO_FONT_DATA_ --#define _VIDEO_FONT_DATA_ -+#ifndef _VIDEO_FONT_4X6_ -+#define _VIDEO_FONT_4X6_ - --#define VIDEO_FONT_CHARS 256 --#define VIDEO_FONT_WIDTH 4 --#define VIDEO_FONT_HEIGHT 6 --#define VIDEO_FONT_SIZE (VIDEO_FONT_CHARS * VIDEO_FONT_HEIGHT) -+#include - --static unsigned char video_fontdata[VIDEO_FONT_SIZE] = { -+static unsigned char video_fontdata_4x6[VIDEO_FONT_SIZE(256, 4, 6)] = { - - /*{*/ - /* Char 0: ' ' */ -diff --git a/include/video_font_8x16.h b/include/video_font_8x16.h -new file mode 100644 -index 0000000000..d8a1d90cee ---- /dev/null -+++ b/include/video_font_8x16.h -@@ -0,0 +1,4624 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * (C) Copyright 2000 -+ * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it -+ * -+ * This file contains an 8x16 bitmap font for code page 437. -+ */ -+ -+#ifndef _VIDEO_FONT_8X16 -+#define _VIDEO_FONT_8X16 -+ -+#include -+ -+static unsigned char video_fontdata_8x16[VIDEO_FONT_SIZE(256, 8, 16)] = { -+ /* 0 0x00 '^@' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 1 0x01 '^A' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7e, /* 01111110 */ -+ 0x81, /* 10000001 */ -+ 0xa5, /* 10100101 */ -+ 0x81, /* 10000001 */ -+ 0x81, /* 10000001 */ -+ 0xbd, /* 10111101 */ -+ 0x99, /* 10011001 */ -+ 0x81, /* 10000001 */ -+ 0x81, /* 10000001 */ -+ 0x7e, /* 01111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 2 0x02 '^B' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7e, /* 01111110 */ -+ 0xff, /* 11111111 */ -+ 0xdb, /* 11011011 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xc3, /* 11000011 */ -+ 0xe7, /* 11100111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0x7e, /* 01111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 3 0x03 '^C' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x6c, /* 01101100 */ -+ 0xfe, /* 11111110 */ -+ 0xfe, /* 11111110 */ -+ 0xfe, /* 11111110 */ -+ 0xfe, /* 11111110 */ -+ 0x7c, /* 01111100 */ -+ 0x38, /* 00111000 */ -+ 0x10, /* 00010000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 4 0x04 '^D' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x10, /* 00010000 */ -+ 0x38, /* 00111000 */ -+ 0x7c, /* 01111100 */ -+ 0xfe, /* 11111110 */ -+ 0x7c, /* 01111100 */ -+ 0x38, /* 00111000 */ -+ 0x10, /* 00010000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 5 0x05 '^E' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x3c, /* 00111100 */ -+ 0x3c, /* 00111100 */ -+ 0xe7, /* 11100111 */ -+ 0xe7, /* 11100111 */ -+ 0xe7, /* 11100111 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x3c, /* 00111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 6 0x06 '^F' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x3c, /* 00111100 */ -+ 0x7e, /* 01111110 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0x7e, /* 01111110 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x3c, /* 00111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 7 0x07 '^G' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x3c, /* 00111100 */ -+ 0x3c, /* 00111100 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 8 0x08 '^H' */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xe7, /* 11100111 */ -+ 0xc3, /* 11000011 */ -+ 0xc3, /* 11000011 */ -+ 0xe7, /* 11100111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ -+ /* 9 0x09 '^I' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x3c, /* 00111100 */ -+ 0x66, /* 01100110 */ -+ 0x42, /* 01000010 */ -+ 0x42, /* 01000010 */ -+ 0x66, /* 01100110 */ -+ 0x3c, /* 00111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 10 0x0a '^J' */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xc3, /* 11000011 */ -+ 0x99, /* 10011001 */ -+ 0xbd, /* 10111101 */ -+ 0xbd, /* 10111101 */ -+ 0x99, /* 10011001 */ -+ 0xc3, /* 11000011 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ -+ /* 11 0x0b '^K' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x1e, /* 00011110 */ -+ 0x0e, /* 00001110 */ -+ 0x1a, /* 00011010 */ -+ 0x32, /* 00110010 */ -+ 0x78, /* 01111000 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0x78, /* 01111000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 12 0x0c '^L' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x3c, /* 00111100 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x3c, /* 00111100 */ -+ 0x18, /* 00011000 */ -+ 0x7e, /* 01111110 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 13 0x0d '^M' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x3f, /* 00111111 */ -+ 0x33, /* 00110011 */ -+ 0x3f, /* 00111111 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x70, /* 01110000 */ -+ 0xf0, /* 11110000 */ -+ 0xe0, /* 11100000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 14 0x0e '^N' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7f, /* 01111111 */ -+ 0x63, /* 01100011 */ -+ 0x7f, /* 01111111 */ -+ 0x63, /* 01100011 */ -+ 0x63, /* 01100011 */ -+ 0x63, /* 01100011 */ -+ 0x63, /* 01100011 */ -+ 0x67, /* 01100111 */ -+ 0xe7, /* 11100111 */ -+ 0xe6, /* 11100110 */ -+ 0xc0, /* 11000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 15 0x0f '^O' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0xdb, /* 11011011 */ -+ 0x3c, /* 00111100 */ -+ 0xe7, /* 11100111 */ -+ 0x3c, /* 00111100 */ -+ 0xdb, /* 11011011 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 16 0x10 '^P' */ -+ 0x00, /* 00000000 */ -+ 0x80, /* 10000000 */ -+ 0xc0, /* 11000000 */ -+ 0xe0, /* 11100000 */ -+ 0xf0, /* 11110000 */ -+ 0xf8, /* 11111000 */ -+ 0xfe, /* 11111110 */ -+ 0xf8, /* 11111000 */ -+ 0xf0, /* 11110000 */ -+ 0xe0, /* 11100000 */ -+ 0xc0, /* 11000000 */ -+ 0x80, /* 10000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 17 0x11 '^Q' */ -+ 0x00, /* 00000000 */ -+ 0x02, /* 00000010 */ -+ 0x06, /* 00000110 */ -+ 0x0e, /* 00001110 */ -+ 0x1e, /* 00011110 */ -+ 0x3e, /* 00111110 */ -+ 0xfe, /* 11111110 */ -+ 0x3e, /* 00111110 */ -+ 0x1e, /* 00011110 */ -+ 0x0e, /* 00001110 */ -+ 0x06, /* 00000110 */ -+ 0x02, /* 00000010 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 18 0x12 '^R' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x3c, /* 00111100 */ -+ 0x7e, /* 01111110 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x7e, /* 01111110 */ -+ 0x3c, /* 00111100 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 19 0x13 '^S' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x00, /* 00000000 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 20 0x14 '^T' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7f, /* 01111111 */ -+ 0xdb, /* 11011011 */ -+ 0xdb, /* 11011011 */ -+ 0xdb, /* 11011011 */ -+ 0x7b, /* 01111011 */ -+ 0x1b, /* 00011011 */ -+ 0x1b, /* 00011011 */ -+ 0x1b, /* 00011011 */ -+ 0x1b, /* 00011011 */ -+ 0x1b, /* 00011011 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 21 0x15 '^U' */ -+ 0x00, /* 00000000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0x60, /* 01100000 */ -+ 0x38, /* 00111000 */ -+ 0x6c, /* 01101100 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x6c, /* 01101100 */ -+ 0x38, /* 00111000 */ -+ 0x0c, /* 00001100 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 22 0x16 '^V' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xfe, /* 11111110 */ -+ 0xfe, /* 11111110 */ -+ 0xfe, /* 11111110 */ -+ 0xfe, /* 11111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 23 0x17 '^W' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x3c, /* 00111100 */ -+ 0x7e, /* 01111110 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x7e, /* 01111110 */ -+ 0x3c, /* 00111100 */ -+ 0x18, /* 00011000 */ -+ 0x7e, /* 01111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 24 0x18 '^X' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x3c, /* 00111100 */ -+ 0x7e, /* 01111110 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 25 0x19 '^Y' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x7e, /* 01111110 */ -+ 0x3c, /* 00111100 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 26 0x1a '^Z' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x0c, /* 00001100 */ -+ 0xfe, /* 11111110 */ -+ 0x0c, /* 00001100 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 27 0x1b '^[' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x30, /* 00110000 */ -+ 0x60, /* 01100000 */ -+ 0xfe, /* 11111110 */ -+ 0x60, /* 01100000 */ -+ 0x30, /* 00110000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 28 0x1c '^\' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xfe, /* 11111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 29 0x1d '^]' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x28, /* 00101000 */ -+ 0x6c, /* 01101100 */ -+ 0xfe, /* 11111110 */ -+ 0x6c, /* 01101100 */ -+ 0x28, /* 00101000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 30 0x1e '^^' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x10, /* 00010000 */ -+ 0x38, /* 00111000 */ -+ 0x38, /* 00111000 */ -+ 0x7c, /* 01111100 */ -+ 0x7c, /* 01111100 */ -+ 0xfe, /* 11111110 */ -+ 0xfe, /* 11111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 31 0x1f '^_' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xfe, /* 11111110 */ -+ 0xfe, /* 11111110 */ -+ 0x7c, /* 01111100 */ -+ 0x7c, /* 01111100 */ -+ 0x38, /* 00111000 */ -+ 0x38, /* 00111000 */ -+ 0x10, /* 00010000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 32 0x20 ' ' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 33 0x21 '!' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x3c, /* 00111100 */ -+ 0x3c, /* 00111100 */ -+ 0x3c, /* 00111100 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 34 0x22 '"' */ -+ 0x00, /* 00000000 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x24, /* 00100100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 35 0x23 '#' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x6c, /* 01101100 */ -+ 0x6c, /* 01101100 */ -+ 0xfe, /* 11111110 */ -+ 0x6c, /* 01101100 */ -+ 0x6c, /* 01101100 */ -+ 0x6c, /* 01101100 */ -+ 0xfe, /* 11111110 */ -+ 0x6c, /* 01101100 */ -+ 0x6c, /* 01101100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 36 0x24 '$' */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0xc2, /* 11000010 */ -+ 0xc0, /* 11000000 */ -+ 0x7c, /* 01111100 */ -+ 0x06, /* 00000110 */ -+ 0x06, /* 00000110 */ -+ 0x86, /* 10000110 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 37 0x25 '%' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xc2, /* 11000010 */ -+ 0xc6, /* 11000110 */ -+ 0x0c, /* 00001100 */ -+ 0x18, /* 00011000 */ -+ 0x30, /* 00110000 */ -+ 0x60, /* 01100000 */ -+ 0xc6, /* 11000110 */ -+ 0x86, /* 10000110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 38 0x26 '&' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x38, /* 00111000 */ -+ 0x6c, /* 01101100 */ -+ 0x6c, /* 01101100 */ -+ 0x38, /* 00111000 */ -+ 0x76, /* 01110110 */ -+ 0xdc, /* 11011100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0x76, /* 01110110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 39 0x27 ''' */ -+ 0x00, /* 00000000 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x60, /* 01100000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 40 0x28 '(' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x0c, /* 00001100 */ -+ 0x18, /* 00011000 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x18, /* 00011000 */ -+ 0x0c, /* 00001100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 41 0x29 ')' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x30, /* 00110000 */ -+ 0x18, /* 00011000 */ -+ 0x0c, /* 00001100 */ -+ 0x0c, /* 00001100 */ -+ 0x0c, /* 00001100 */ -+ 0x0c, /* 00001100 */ -+ 0x0c, /* 00001100 */ -+ 0x0c, /* 00001100 */ -+ 0x18, /* 00011000 */ -+ 0x30, /* 00110000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 42 0x2a '*' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x66, /* 01100110 */ -+ 0x3c, /* 00111100 */ -+ 0xff, /* 11111111 */ -+ 0x3c, /* 00111100 */ -+ 0x66, /* 01100110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 43 0x2b '+' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x7e, /* 01111110 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 44 0x2c ',' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x30, /* 00110000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 45 0x2d '-' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xfe, /* 11111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 46 0x2e '.' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 47 0x2f '/' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x02, /* 00000010 */ -+ 0x06, /* 00000110 */ -+ 0x0c, /* 00001100 */ -+ 0x18, /* 00011000 */ -+ 0x30, /* 00110000 */ -+ 0x60, /* 01100000 */ -+ 0xc0, /* 11000000 */ -+ 0x80, /* 10000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 48 0x30 '0' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x38, /* 00111000 */ -+ 0x6c, /* 01101100 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xd6, /* 11010110 */ -+ 0xd6, /* 11010110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x6c, /* 01101100 */ -+ 0x38, /* 00111000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 49 0x31 '1' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x38, /* 00111000 */ -+ 0x78, /* 01111000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x7e, /* 01111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 50 0x32 '2' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0x06, /* 00000110 */ -+ 0x0c, /* 00001100 */ -+ 0x18, /* 00011000 */ -+ 0x30, /* 00110000 */ -+ 0x60, /* 01100000 */ -+ 0xc0, /* 11000000 */ -+ 0xc6, /* 11000110 */ -+ 0xfe, /* 11111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 51 0x33 '3' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0x06, /* 00000110 */ -+ 0x06, /* 00000110 */ -+ 0x3c, /* 00111100 */ -+ 0x06, /* 00000110 */ -+ 0x06, /* 00000110 */ -+ 0x06, /* 00000110 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 52 0x34 '4' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x0c, /* 00001100 */ -+ 0x1c, /* 00011100 */ -+ 0x3c, /* 00111100 */ -+ 0x6c, /* 01101100 */ -+ 0xcc, /* 11001100 */ -+ 0xfe, /* 11111110 */ -+ 0x0c, /* 00001100 */ -+ 0x0c, /* 00001100 */ -+ 0x0c, /* 00001100 */ -+ 0x1e, /* 00011110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 53 0x35 '5' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xfe, /* 11111110 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xfc, /* 11111100 */ -+ 0x06, /* 00000110 */ -+ 0x06, /* 00000110 */ -+ 0x06, /* 00000110 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 54 0x36 '6' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x38, /* 00111000 */ -+ 0x60, /* 01100000 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xfc, /* 11111100 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 55 0x37 '7' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xfe, /* 11111110 */ -+ 0xc6, /* 11000110 */ -+ 0x06, /* 00000110 */ -+ 0x06, /* 00000110 */ -+ 0x0c, /* 00001100 */ -+ 0x18, /* 00011000 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 56 0x38 '8' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 57 0x39 '9' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x7e, /* 01111110 */ -+ 0x06, /* 00000110 */ -+ 0x06, /* 00000110 */ -+ 0x06, /* 00000110 */ -+ 0x0c, /* 00001100 */ -+ 0x78, /* 01111000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 58 0x3a ':' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 59 0x3b ';' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x30, /* 00110000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 60 0x3c '<' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x06, /* 00000110 */ -+ 0x0c, /* 00001100 */ -+ 0x18, /* 00011000 */ -+ 0x30, /* 00110000 */ -+ 0x60, /* 01100000 */ -+ 0x30, /* 00110000 */ -+ 0x18, /* 00011000 */ -+ 0x0c, /* 00001100 */ -+ 0x06, /* 00000110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 61 0x3d '=' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7e, /* 01111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7e, /* 01111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 62 0x3e '>' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x60, /* 01100000 */ -+ 0x30, /* 00110000 */ -+ 0x18, /* 00011000 */ -+ 0x0c, /* 00001100 */ -+ 0x06, /* 00000110 */ -+ 0x0c, /* 00001100 */ -+ 0x18, /* 00011000 */ -+ 0x30, /* 00110000 */ -+ 0x60, /* 01100000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 63 0x3f '?' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x0c, /* 00001100 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 64 0x40 '@' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xde, /* 11011110 */ -+ 0xde, /* 11011110 */ -+ 0xde, /* 11011110 */ -+ 0xdc, /* 11011100 */ -+ 0xc0, /* 11000000 */ -+ 0x7c, /* 01111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 65 0x41 'A' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x10, /* 00010000 */ -+ 0x38, /* 00111000 */ -+ 0x6c, /* 01101100 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xfe, /* 11111110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 66 0x42 'B' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xfc, /* 11111100 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x7c, /* 01111100 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0xfc, /* 11111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 67 0x43 'C' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x3c, /* 00111100 */ -+ 0x66, /* 01100110 */ -+ 0xc2, /* 11000010 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc2, /* 11000010 */ -+ 0x66, /* 01100110 */ -+ 0x3c, /* 00111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 68 0x44 'D' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xf8, /* 11111000 */ -+ 0x6c, /* 01101100 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x6c, /* 01101100 */ -+ 0xf8, /* 11111000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 69 0x45 'E' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xfe, /* 11111110 */ -+ 0x66, /* 01100110 */ -+ 0x62, /* 01100010 */ -+ 0x68, /* 01101000 */ -+ 0x78, /* 01111000 */ -+ 0x68, /* 01101000 */ -+ 0x60, /* 01100000 */ -+ 0x62, /* 01100010 */ -+ 0x66, /* 01100110 */ -+ 0xfe, /* 11111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 70 0x46 'F' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xfe, /* 11111110 */ -+ 0x66, /* 01100110 */ -+ 0x62, /* 01100010 */ -+ 0x68, /* 01101000 */ -+ 0x78, /* 01111000 */ -+ 0x68, /* 01101000 */ -+ 0x60, /* 01100000 */ -+ 0x60, /* 01100000 */ -+ 0x60, /* 01100000 */ -+ 0xf0, /* 11110000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 71 0x47 'G' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x3c, /* 00111100 */ -+ 0x66, /* 01100110 */ -+ 0xc2, /* 11000010 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xde, /* 11011110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x66, /* 01100110 */ -+ 0x3a, /* 00111010 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 72 0x48 'H' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xfe, /* 11111110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 73 0x49 'I' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x3c, /* 00111100 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x3c, /* 00111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 74 0x4a 'J' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x1e, /* 00011110 */ -+ 0x0c, /* 00001100 */ -+ 0x0c, /* 00001100 */ -+ 0x0c, /* 00001100 */ -+ 0x0c, /* 00001100 */ -+ 0x0c, /* 00001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0x78, /* 01111000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 75 0x4b 'K' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xe6, /* 11100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x6c, /* 01101100 */ -+ 0x78, /* 01111000 */ -+ 0x78, /* 01111000 */ -+ 0x6c, /* 01101100 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0xe6, /* 11100110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 76 0x4c 'L' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xf0, /* 11110000 */ -+ 0x60, /* 01100000 */ -+ 0x60, /* 01100000 */ -+ 0x60, /* 01100000 */ -+ 0x60, /* 01100000 */ -+ 0x60, /* 01100000 */ -+ 0x60, /* 01100000 */ -+ 0x62, /* 01100010 */ -+ 0x66, /* 01100110 */ -+ 0xfe, /* 11111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 77 0x4d 'M' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xc6, /* 11000110 */ -+ 0xee, /* 11101110 */ -+ 0xfe, /* 11111110 */ -+ 0xfe, /* 11111110 */ -+ 0xd6, /* 11010110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 78 0x4e 'N' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xc6, /* 11000110 */ -+ 0xe6, /* 11100110 */ -+ 0xf6, /* 11110110 */ -+ 0xfe, /* 11111110 */ -+ 0xde, /* 11011110 */ -+ 0xce, /* 11001110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 79 0x4f 'O' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 80 0x50 'P' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xfc, /* 11111100 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x7c, /* 01111100 */ -+ 0x60, /* 01100000 */ -+ 0x60, /* 01100000 */ -+ 0x60, /* 01100000 */ -+ 0x60, /* 01100000 */ -+ 0xf0, /* 11110000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 81 0x51 'Q' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xd6, /* 11010110 */ -+ 0xde, /* 11011110 */ -+ 0x7c, /* 01111100 */ -+ 0x0c, /* 00001100 */ -+ 0x0e, /* 00001110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 82 0x52 'R' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xfc, /* 11111100 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x7c, /* 01111100 */ -+ 0x6c, /* 01101100 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0xe6, /* 11100110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 83 0x53 'S' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x60, /* 01100000 */ -+ 0x38, /* 00111000 */ -+ 0x0c, /* 00001100 */ -+ 0x06, /* 00000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 84 0x54 'T' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7e, /* 01111110 */ -+ 0x7e, /* 01111110 */ -+ 0x5a, /* 01011010 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x3c, /* 00111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 85 0x55 'U' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 86 0x56 'V' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x6c, /* 01101100 */ -+ 0x38, /* 00111000 */ -+ 0x10, /* 00010000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 87 0x57 'W' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xd6, /* 11010110 */ -+ 0xd6, /* 11010110 */ -+ 0xd6, /* 11010110 */ -+ 0xfe, /* 11111110 */ -+ 0xee, /* 11101110 */ -+ 0x6c, /* 01101100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 88 0x58 'X' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x6c, /* 01101100 */ -+ 0x7c, /* 01111100 */ -+ 0x38, /* 00111000 */ -+ 0x38, /* 00111000 */ -+ 0x7c, /* 01111100 */ -+ 0x6c, /* 01101100 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 89 0x59 'Y' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x3c, /* 00111100 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x3c, /* 00111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 90 0x5a 'Z' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xfe, /* 11111110 */ -+ 0xc6, /* 11000110 */ -+ 0x86, /* 10000110 */ -+ 0x0c, /* 00001100 */ -+ 0x18, /* 00011000 */ -+ 0x30, /* 00110000 */ -+ 0x60, /* 01100000 */ -+ 0xc2, /* 11000010 */ -+ 0xc6, /* 11000110 */ -+ 0xfe, /* 11111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 91 0x5b '[' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x3c, /* 00111100 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x3c, /* 00111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 92 0x5c '\' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x80, /* 10000000 */ -+ 0xc0, /* 11000000 */ -+ 0xe0, /* 11100000 */ -+ 0x70, /* 01110000 */ -+ 0x38, /* 00111000 */ -+ 0x1c, /* 00011100 */ -+ 0x0e, /* 00001110 */ -+ 0x06, /* 00000110 */ -+ 0x02, /* 00000010 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 93 0x5d ']' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x3c, /* 00111100 */ -+ 0x0c, /* 00001100 */ -+ 0x0c, /* 00001100 */ -+ 0x0c, /* 00001100 */ -+ 0x0c, /* 00001100 */ -+ 0x0c, /* 00001100 */ -+ 0x0c, /* 00001100 */ -+ 0x0c, /* 00001100 */ -+ 0x0c, /* 00001100 */ -+ 0x3c, /* 00111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 94 0x5e '^' */ -+ 0x10, /* 00010000 */ -+ 0x38, /* 00111000 */ -+ 0x6c, /* 01101100 */ -+ 0xc6, /* 11000110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 95 0x5f '_' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xff, /* 11111111 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 96 0x60 '`' */ -+ 0x00, /* 00000000 */ -+ 0x30, /* 00110000 */ -+ 0x18, /* 00011000 */ -+ 0x0c, /* 00001100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 97 0x61 'a' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x78, /* 01111000 */ -+ 0x0c, /* 00001100 */ -+ 0x7c, /* 01111100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0x76, /* 01110110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 98 0x62 'b' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xe0, /* 11100000 */ -+ 0x60, /* 01100000 */ -+ 0x60, /* 01100000 */ -+ 0x78, /* 01111000 */ -+ 0x6c, /* 01101100 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x7c, /* 01111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 99 0x63 'c' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 100 0x64 'd' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x1c, /* 00011100 */ -+ 0x0c, /* 00001100 */ -+ 0x0c, /* 00001100 */ -+ 0x3c, /* 00111100 */ -+ 0x6c, /* 01101100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0x76, /* 01110110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 101 0x65 'e' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0xfe, /* 11111110 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 102 0x66 'f' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x1c, /* 00011100 */ -+ 0x36, /* 00110110 */ -+ 0x32, /* 00110010 */ -+ 0x30, /* 00110000 */ -+ 0x78, /* 01111000 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x78, /* 01111000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 103 0x67 'g' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x76, /* 01110110 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0x7c, /* 01111100 */ -+ 0x0c, /* 00001100 */ -+ 0xcc, /* 11001100 */ -+ 0x78, /* 01111000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 104 0x68 'h' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xe0, /* 11100000 */ -+ 0x60, /* 01100000 */ -+ 0x60, /* 01100000 */ -+ 0x6c, /* 01101100 */ -+ 0x76, /* 01110110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0xe6, /* 11100110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 105 0x69 'i' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x38, /* 00111000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x3c, /* 00111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 106 0x6a 'j' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x06, /* 00000110 */ -+ 0x06, /* 00000110 */ -+ 0x00, /* 00000000 */ -+ 0x0e, /* 00001110 */ -+ 0x06, /* 00000110 */ -+ 0x06, /* 00000110 */ -+ 0x06, /* 00000110 */ -+ 0x06, /* 00000110 */ -+ 0x06, /* 00000110 */ -+ 0x06, /* 00000110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x3c, /* 00111100 */ -+ 0x00, /* 00000000 */ -+ -+ /* 107 0x6b 'k' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xe0, /* 11100000 */ -+ 0x60, /* 01100000 */ -+ 0x60, /* 01100000 */ -+ 0x66, /* 01100110 */ -+ 0x6c, /* 01101100 */ -+ 0x78, /* 01111000 */ -+ 0x78, /* 01111000 */ -+ 0x6c, /* 01101100 */ -+ 0x66, /* 01100110 */ -+ 0xe6, /* 11100110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 108 0x6c 'l' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x38, /* 00111000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x3c, /* 00111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 109 0x6d 'm' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xec, /* 11101100 */ -+ 0xfe, /* 11111110 */ -+ 0xd6, /* 11010110 */ -+ 0xd6, /* 11010110 */ -+ 0xd6, /* 11010110 */ -+ 0xd6, /* 11010110 */ -+ 0xc6, /* 11000110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 110 0x6e 'n' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xdc, /* 11011100 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 111 0x6f 'o' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 112 0x70 'p' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xdc, /* 11011100 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x7c, /* 01111100 */ -+ 0x60, /* 01100000 */ -+ 0x60, /* 01100000 */ -+ 0xf0, /* 11110000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 113 0x71 'q' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x76, /* 01110110 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0x7c, /* 01111100 */ -+ 0x0c, /* 00001100 */ -+ 0x0c, /* 00001100 */ -+ 0x1e, /* 00011110 */ -+ 0x00, /* 00000000 */ -+ -+ /* 114 0x72 'r' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xdc, /* 11011100 */ -+ 0x76, /* 01110110 */ -+ 0x66, /* 01100110 */ -+ 0x60, /* 01100000 */ -+ 0x60, /* 01100000 */ -+ 0x60, /* 01100000 */ -+ 0xf0, /* 11110000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 115 0x73 's' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0x60, /* 01100000 */ -+ 0x38, /* 00111000 */ -+ 0x0c, /* 00001100 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 116 0x74 't' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x10, /* 00010000 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0xfc, /* 11111100 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x36, /* 00110110 */ -+ 0x1c, /* 00011100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 117 0x75 'u' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0x76, /* 01110110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 118 0x76 'v' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x6c, /* 01101100 */ -+ 0x38, /* 00111000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 119 0x77 'w' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xd6, /* 11010110 */ -+ 0xd6, /* 11010110 */ -+ 0xd6, /* 11010110 */ -+ 0xfe, /* 11111110 */ -+ 0x6c, /* 01101100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 120 0x78 'x' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xc6, /* 11000110 */ -+ 0x6c, /* 01101100 */ -+ 0x38, /* 00111000 */ -+ 0x38, /* 00111000 */ -+ 0x38, /* 00111000 */ -+ 0x6c, /* 01101100 */ -+ 0xc6, /* 11000110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 121 0x79 'y' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x7e, /* 01111110 */ -+ 0x06, /* 00000110 */ -+ 0x0c, /* 00001100 */ -+ 0xf8, /* 11111000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 122 0x7a 'z' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xfe, /* 11111110 */ -+ 0xcc, /* 11001100 */ -+ 0x18, /* 00011000 */ -+ 0x30, /* 00110000 */ -+ 0x60, /* 01100000 */ -+ 0xc6, /* 11000110 */ -+ 0xfe, /* 11111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 123 0x7b '{' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x0e, /* 00001110 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x70, /* 01110000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x0e, /* 00001110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 124 0x7c '|' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 125 0x7d '}' */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x70, /* 01110000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x0e, /* 00001110 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x70, /* 01110000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 126 0x7e '~' */ -+ 0x00, /* 00000000 */ -+ 0x76, /* 01110110 */ -+ 0xdc, /* 11011100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 127 0x7f */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x10, /* 00010000 */ -+ 0x38, /* 00111000 */ -+ 0x6c, /* 01101100 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xfe, /* 11111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 128 0x80 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x3c, /* 00111100 */ -+ 0x66, /* 01100110 */ -+ 0xc2, /* 11000010 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc2, /* 11000010 */ -+ 0x66, /* 01100110 */ -+ 0x3c, /* 00111100 */ -+ 0x18, /* 00011000 */ -+ 0x70, /* 01110000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 129 0x81 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xcc, /* 11001100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0x76, /* 01110110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 130 0x82 */ -+ 0x00, /* 00000000 */ -+ 0x0c, /* 00001100 */ -+ 0x18, /* 00011000 */ -+ 0x30, /* 00110000 */ -+ 0x00, /* 00000000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0xfe, /* 11111110 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 131 0x83 */ -+ 0x00, /* 00000000 */ -+ 0x10, /* 00010000 */ -+ 0x38, /* 00111000 */ -+ 0x6c, /* 01101100 */ -+ 0x00, /* 00000000 */ -+ 0x78, /* 01111000 */ -+ 0x0c, /* 00001100 */ -+ 0x7c, /* 01111100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0x76, /* 01110110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 132 0x84 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xcc, /* 11001100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x78, /* 01111000 */ -+ 0x0c, /* 00001100 */ -+ 0x7c, /* 01111100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0x76, /* 01110110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 133 0x85 */ -+ 0x00, /* 00000000 */ -+ 0x60, /* 01100000 */ -+ 0x30, /* 00110000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x78, /* 01111000 */ -+ 0x0c, /* 00001100 */ -+ 0x7c, /* 01111100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0x76, /* 01110110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 134 0x86 */ -+ 0x00, /* 00000000 */ -+ 0x38, /* 00111000 */ -+ 0x6c, /* 01101100 */ -+ 0x38, /* 00111000 */ -+ 0x00, /* 00000000 */ -+ 0x78, /* 01111000 */ -+ 0x0c, /* 00001100 */ -+ 0x7c, /* 01111100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0x76, /* 01110110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 135 0x87 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0x18, /* 00011000 */ -+ 0x70, /* 01110000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 136 0x88 */ -+ 0x00, /* 00000000 */ -+ 0x10, /* 00010000 */ -+ 0x38, /* 00111000 */ -+ 0x6c, /* 01101100 */ -+ 0x00, /* 00000000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0xfe, /* 11111110 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 137 0x89 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xc6, /* 11000110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0xfe, /* 11111110 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 138 0x8a */ -+ 0x00, /* 00000000 */ -+ 0x60, /* 01100000 */ -+ 0x30, /* 00110000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0xfe, /* 11111110 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 139 0x8b */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x66, /* 01100110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x38, /* 00111000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x3c, /* 00111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 140 0x8c */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x3c, /* 00111100 */ -+ 0x66, /* 01100110 */ -+ 0x00, /* 00000000 */ -+ 0x38, /* 00111000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x3c, /* 00111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 141 0x8d */ -+ 0x00, /* 00000000 */ -+ 0x60, /* 01100000 */ -+ 0x30, /* 00110000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x38, /* 00111000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x3c, /* 00111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 142 0x8e */ -+ 0x00, /* 00000000 */ -+ 0xc6, /* 11000110 */ -+ 0x00, /* 00000000 */ -+ 0x10, /* 00010000 */ -+ 0x38, /* 00111000 */ -+ 0x6c, /* 01101100 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xfe, /* 11111110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 143 0x8f */ -+ 0x38, /* 00111000 */ -+ 0x6c, /* 01101100 */ -+ 0x38, /* 00111000 */ -+ 0x10, /* 00010000 */ -+ 0x38, /* 00111000 */ -+ 0x6c, /* 01101100 */ -+ 0xc6, /* 11000110 */ -+ 0xfe, /* 11111110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 144 0x90 */ -+ 0x0c, /* 00001100 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0xfe, /* 11111110 */ -+ 0x66, /* 01100110 */ -+ 0x62, /* 01100010 */ -+ 0x68, /* 01101000 */ -+ 0x78, /* 01111000 */ -+ 0x68, /* 01101000 */ -+ 0x62, /* 01100010 */ -+ 0x66, /* 01100110 */ -+ 0xfe, /* 11111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 145 0x91 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xec, /* 11101100 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x7e, /* 01111110 */ -+ 0xd8, /* 11011000 */ -+ 0xd8, /* 11011000 */ -+ 0x6e, /* 01101110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 146 0x92 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x3e, /* 00111110 */ -+ 0x6c, /* 01101100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xfe, /* 11111110 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xce, /* 11001110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 147 0x93 */ -+ 0x00, /* 00000000 */ -+ 0x10, /* 00010000 */ -+ 0x38, /* 00111000 */ -+ 0x6c, /* 01101100 */ -+ 0x00, /* 00000000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 148 0x94 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xc6, /* 11000110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 149 0x95 */ -+ 0x00, /* 00000000 */ -+ 0x60, /* 01100000 */ -+ 0x30, /* 00110000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 150 0x96 */ -+ 0x00, /* 00000000 */ -+ 0x30, /* 00110000 */ -+ 0x78, /* 01111000 */ -+ 0xcc, /* 11001100 */ -+ 0x00, /* 00000000 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0x76, /* 01110110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 151 0x97 */ -+ 0x00, /* 00000000 */ -+ 0x60, /* 01100000 */ -+ 0x30, /* 00110000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0x76, /* 01110110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 152 0x98 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xc6, /* 11000110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x7e, /* 01111110 */ -+ 0x06, /* 00000110 */ -+ 0x0c, /* 00001100 */ -+ 0x78, /* 01111000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 153 0x99 */ -+ 0x00, /* 00000000 */ -+ 0xc6, /* 11000110 */ -+ 0x00, /* 00000000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 154 0x9a */ -+ 0x00, /* 00000000 */ -+ 0xc6, /* 11000110 */ -+ 0x00, /* 00000000 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 155 0x9b */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 156 0x9c */ -+ 0x00, /* 00000000 */ -+ 0x38, /* 00111000 */ -+ 0x6c, /* 01101100 */ -+ 0x64, /* 01100100 */ -+ 0x60, /* 01100000 */ -+ 0xf0, /* 11110000 */ -+ 0x60, /* 01100000 */ -+ 0x60, /* 01100000 */ -+ 0x60, /* 01100000 */ -+ 0x60, /* 01100000 */ -+ 0xe6, /* 11100110 */ -+ 0xfc, /* 11111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 157 0x9d */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x3c, /* 00111100 */ -+ 0x18, /* 00011000 */ -+ 0x7e, /* 01111110 */ -+ 0x18, /* 00011000 */ -+ 0x7e, /* 01111110 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 158 0x9e */ -+ 0x00, /* 00000000 */ -+ 0xf8, /* 11111000 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xf8, /* 11111000 */ -+ 0xc4, /* 11000100 */ -+ 0xcc, /* 11001100 */ -+ 0xde, /* 11011110 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xc6, /* 11000110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 159 0x9f */ -+ 0x00, /* 00000000 */ -+ 0x0e, /* 00001110 */ -+ 0x1b, /* 00011011 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x7e, /* 01111110 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0xd8, /* 11011000 */ -+ 0x70, /* 01110000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 160 0xa0 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x30, /* 00110000 */ -+ 0x60, /* 01100000 */ -+ 0x00, /* 00000000 */ -+ 0x78, /* 01111000 */ -+ 0x0c, /* 00001100 */ -+ 0x7c, /* 01111100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0x76, /* 01110110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 161 0xa1 */ -+ 0x00, /* 00000000 */ -+ 0x0c, /* 00001100 */ -+ 0x18, /* 00011000 */ -+ 0x30, /* 00110000 */ -+ 0x00, /* 00000000 */ -+ 0x38, /* 00111000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x3c, /* 00111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 162 0xa2 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x30, /* 00110000 */ -+ 0x60, /* 01100000 */ -+ 0x00, /* 00000000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 163 0xa3 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x30, /* 00110000 */ -+ 0x60, /* 01100000 */ -+ 0x00, /* 00000000 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0x76, /* 01110110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 164 0xa4 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x76, /* 01110110 */ -+ 0xdc, /* 11011100 */ -+ 0x00, /* 00000000 */ -+ 0xdc, /* 11011100 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 165 0xa5 */ -+ 0x76, /* 01110110 */ -+ 0xdc, /* 11011100 */ -+ 0x00, /* 00000000 */ -+ 0xc6, /* 11000110 */ -+ 0xe6, /* 11100110 */ -+ 0xf6, /* 11110110 */ -+ 0xfe, /* 11111110 */ -+ 0xde, /* 11011110 */ -+ 0xce, /* 11001110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 166 0xa6 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x3c, /* 00111100 */ -+ 0x6c, /* 01101100 */ -+ 0x6c, /* 01101100 */ -+ 0x3e, /* 00111110 */ -+ 0x00, /* 00000000 */ -+ 0x7e, /* 01111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 167 0xa7 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x38, /* 00111000 */ -+ 0x6c, /* 01101100 */ -+ 0x6c, /* 01101100 */ -+ 0x38, /* 00111000 */ -+ 0x00, /* 00000000 */ -+ 0x7c, /* 01111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 168 0xa8 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x00, /* 00000000 */ -+ 0x30, /* 00110000 */ -+ 0x30, /* 00110000 */ -+ 0x60, /* 01100000 */ -+ 0xc0, /* 11000000 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x7c, /* 01111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 169 0xa9 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xfe, /* 11111110 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 170 0xaa */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xfe, /* 11111110 */ -+ 0x06, /* 00000110 */ -+ 0x06, /* 00000110 */ -+ 0x06, /* 00000110 */ -+ 0x06, /* 00000110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 171 0xab */ -+ 0x00, /* 00000000 */ -+ 0x60, /* 01100000 */ -+ 0xe0, /* 11100000 */ -+ 0x62, /* 01100010 */ -+ 0x66, /* 01100110 */ -+ 0x6c, /* 01101100 */ -+ 0x18, /* 00011000 */ -+ 0x30, /* 00110000 */ -+ 0x60, /* 01100000 */ -+ 0xdc, /* 11011100 */ -+ 0x86, /* 10000110 */ -+ 0x0c, /* 00001100 */ -+ 0x18, /* 00011000 */ -+ 0x3e, /* 00111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 172 0xac */ -+ 0x00, /* 00000000 */ -+ 0x60, /* 01100000 */ -+ 0xe0, /* 11100000 */ -+ 0x62, /* 01100010 */ -+ 0x66, /* 01100110 */ -+ 0x6c, /* 01101100 */ -+ 0x18, /* 00011000 */ -+ 0x30, /* 00110000 */ -+ 0x66, /* 01100110 */ -+ 0xce, /* 11001110 */ -+ 0x9a, /* 10011010 */ -+ 0x3f, /* 00111111 */ -+ 0x06, /* 00000110 */ -+ 0x06, /* 00000110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 173 0xad */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x3c, /* 00111100 */ -+ 0x3c, /* 00111100 */ -+ 0x3c, /* 00111100 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 174 0xae */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x36, /* 00110110 */ -+ 0x6c, /* 01101100 */ -+ 0xd8, /* 11011000 */ -+ 0x6c, /* 01101100 */ -+ 0x36, /* 00110110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 175 0xaf */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xd8, /* 11011000 */ -+ 0x6c, /* 01101100 */ -+ 0x36, /* 00110110 */ -+ 0x6c, /* 01101100 */ -+ 0xd8, /* 11011000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 176 0xb0 */ -+ 0x11, /* 00010001 */ -+ 0x44, /* 01000100 */ -+ 0x11, /* 00010001 */ -+ 0x44, /* 01000100 */ -+ 0x11, /* 00010001 */ -+ 0x44, /* 01000100 */ -+ 0x11, /* 00010001 */ -+ 0x44, /* 01000100 */ -+ 0x11, /* 00010001 */ -+ 0x44, /* 01000100 */ -+ 0x11, /* 00010001 */ -+ 0x44, /* 01000100 */ -+ 0x11, /* 00010001 */ -+ 0x44, /* 01000100 */ -+ 0x11, /* 00010001 */ -+ 0x44, /* 01000100 */ -+ -+ /* 177 0xb1 */ -+ 0x55, /* 01010101 */ -+ 0xaa, /* 10101010 */ -+ 0x55, /* 01010101 */ -+ 0xaa, /* 10101010 */ -+ 0x55, /* 01010101 */ -+ 0xaa, /* 10101010 */ -+ 0x55, /* 01010101 */ -+ 0xaa, /* 10101010 */ -+ 0x55, /* 01010101 */ -+ 0xaa, /* 10101010 */ -+ 0x55, /* 01010101 */ -+ 0xaa, /* 10101010 */ -+ 0x55, /* 01010101 */ -+ 0xaa, /* 10101010 */ -+ 0x55, /* 01010101 */ -+ 0xaa, /* 10101010 */ -+ -+ /* 178 0xb2 */ -+ 0xdd, /* 11011101 */ -+ 0x77, /* 01110111 */ -+ 0xdd, /* 11011101 */ -+ 0x77, /* 01110111 */ -+ 0xdd, /* 11011101 */ -+ 0x77, /* 01110111 */ -+ 0xdd, /* 11011101 */ -+ 0x77, /* 01110111 */ -+ 0xdd, /* 11011101 */ -+ 0x77, /* 01110111 */ -+ 0xdd, /* 11011101 */ -+ 0x77, /* 01110111 */ -+ 0xdd, /* 11011101 */ -+ 0x77, /* 01110111 */ -+ 0xdd, /* 11011101 */ -+ 0x77, /* 01110111 */ -+ -+ /* 179 0xb3 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ -+ /* 180 0xb4 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0xf8, /* 11111000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ -+ /* 181 0xb5 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0xf8, /* 11111000 */ -+ 0x18, /* 00011000 */ -+ 0xf8, /* 11111000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ -+ /* 182 0xb6 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0xf6, /* 11110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ -+ /* 183 0xb7 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xfe, /* 11111110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ -+ /* 184 0xb8 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xf8, /* 11111000 */ -+ 0x18, /* 00011000 */ -+ 0xf8, /* 11111000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ -+ /* 185 0xb9 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0xf6, /* 11110110 */ -+ 0x06, /* 00000110 */ -+ 0xf6, /* 11110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ -+ /* 186 0xba */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ -+ /* 187 0xbb */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xfe, /* 11111110 */ -+ 0x06, /* 00000110 */ -+ 0xf6, /* 11110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ -+ /* 188 0xbc */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0xf6, /* 11110110 */ -+ 0x06, /* 00000110 */ -+ 0xfe, /* 11111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 189 0xbd */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0xfe, /* 11111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 190 0xbe */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0xf8, /* 11111000 */ -+ 0x18, /* 00011000 */ -+ 0xf8, /* 11111000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 191 0xbf */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xf8, /* 11111000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ -+ /* 192 0xc0 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x1f, /* 00011111 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 193 0xc1 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0xff, /* 11111111 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 194 0xc2 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xff, /* 11111111 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ -+ /* 195 0xc3 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x1f, /* 00011111 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ -+ /* 196 0xc4 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xff, /* 11111111 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 197 0xc5 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0xff, /* 11111111 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ -+ /* 198 0xc6 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x1f, /* 00011111 */ -+ 0x18, /* 00011000 */ -+ 0x1f, /* 00011111 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ -+ /* 199 0xc7 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x37, /* 00110111 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ -+ /* 200 0xc8 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x37, /* 00110111 */ -+ 0x30, /* 00110000 */ -+ 0x3f, /* 00111111 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 201 0xc9 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x3f, /* 00111111 */ -+ 0x30, /* 00110000 */ -+ 0x37, /* 00110111 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ -+ /* 202 0xca */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0xf7, /* 11110111 */ -+ 0x00, /* 00000000 */ -+ 0xff, /* 11111111 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 203 0xcb */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xff, /* 11111111 */ -+ 0x00, /* 00000000 */ -+ 0xf7, /* 11110111 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ -+ /* 204 0xcc */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x37, /* 00110111 */ -+ 0x30, /* 00110000 */ -+ 0x37, /* 00110111 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ -+ /* 205 0xcd */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xff, /* 11111111 */ -+ 0x00, /* 00000000 */ -+ 0xff, /* 11111111 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 206 0xce */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0xf7, /* 11110111 */ -+ 0x00, /* 00000000 */ -+ 0xf7, /* 11110111 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ -+ /* 207 0xcf */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0xff, /* 11111111 */ -+ 0x00, /* 00000000 */ -+ 0xff, /* 11111111 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 208 0xd0 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0xff, /* 11111111 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 209 0xd1 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xff, /* 11111111 */ -+ 0x00, /* 00000000 */ -+ 0xff, /* 11111111 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ -+ /* 210 0xd2 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xff, /* 11111111 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ -+ /* 211 0xd3 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x3f, /* 00111111 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 212 0xd4 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x1f, /* 00011111 */ -+ 0x18, /* 00011000 */ -+ 0x1f, /* 00011111 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 213 0xd5 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x1f, /* 00011111 */ -+ 0x18, /* 00011000 */ -+ 0x1f, /* 00011111 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ -+ /* 214 0xd6 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x3f, /* 00111111 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ -+ /* 215 0xd7 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0xff, /* 11111111 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ -+ /* 216 0xd8 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0xff, /* 11111111 */ -+ 0x18, /* 00011000 */ -+ 0xff, /* 11111111 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ -+ /* 217 0xd9 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0xf8, /* 11111000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 218 0xda */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x1f, /* 00011111 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ -+ /* 219 0xdb */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ -+ /* 220 0xdc */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ -+ /* 221 0xdd */ -+ 0xf0, /* 11110000 */ -+ 0xf0, /* 11110000 */ -+ 0xf0, /* 11110000 */ -+ 0xf0, /* 11110000 */ -+ 0xf0, /* 11110000 */ -+ 0xf0, /* 11110000 */ -+ 0xf0, /* 11110000 */ -+ 0xf0, /* 11110000 */ -+ 0xf0, /* 11110000 */ -+ 0xf0, /* 11110000 */ -+ 0xf0, /* 11110000 */ -+ 0xf0, /* 11110000 */ -+ 0xf0, /* 11110000 */ -+ 0xf0, /* 11110000 */ -+ 0xf0, /* 11110000 */ -+ 0xf0, /* 11110000 */ -+ -+ /* 222 0xde */ -+ 0x0f, /* 00001111 */ -+ 0x0f, /* 00001111 */ -+ 0x0f, /* 00001111 */ -+ 0x0f, /* 00001111 */ -+ 0x0f, /* 00001111 */ -+ 0x0f, /* 00001111 */ -+ 0x0f, /* 00001111 */ -+ 0x0f, /* 00001111 */ -+ 0x0f, /* 00001111 */ -+ 0x0f, /* 00001111 */ -+ 0x0f, /* 00001111 */ -+ 0x0f, /* 00001111 */ -+ 0x0f, /* 00001111 */ -+ 0x0f, /* 00001111 */ -+ 0x0f, /* 00001111 */ -+ 0x0f, /* 00001111 */ -+ -+ /* 223 0xdf */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0xff, /* 11111111 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 224 0xe0 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x76, /* 01110110 */ -+ 0xdc, /* 11011100 */ -+ 0xd8, /* 11011000 */ -+ 0xd8, /* 11011000 */ -+ 0xd8, /* 11011000 */ -+ 0xdc, /* 11011100 */ -+ 0x76, /* 01110110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 225 0xe1 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x78, /* 01111000 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xcc, /* 11001100 */ -+ 0xd8, /* 11011000 */ -+ 0xcc, /* 11001100 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xcc, /* 11001100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 226 0xe2 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xfe, /* 11111110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0xc0, /* 11000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 227 0xe3 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xfe, /* 11111110 */ -+ 0x6c, /* 01101100 */ -+ 0x6c, /* 01101100 */ -+ 0x6c, /* 01101100 */ -+ 0x6c, /* 01101100 */ -+ 0x6c, /* 01101100 */ -+ 0x6c, /* 01101100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 228 0xe4 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xfe, /* 11111110 */ -+ 0xc6, /* 11000110 */ -+ 0x60, /* 01100000 */ -+ 0x30, /* 00110000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x30, /* 00110000 */ -+ 0x60, /* 01100000 */ -+ 0xc6, /* 11000110 */ -+ 0xfe, /* 11111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 229 0xe5 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7e, /* 01111110 */ -+ 0xd8, /* 11011000 */ -+ 0xd8, /* 11011000 */ -+ 0xd8, /* 11011000 */ -+ 0xd8, /* 11011000 */ -+ 0xd8, /* 11011000 */ -+ 0x70, /* 01110000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 230 0xe6 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x7c, /* 01111100 */ -+ 0x60, /* 01100000 */ -+ 0x60, /* 01100000 */ -+ 0xc0, /* 11000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 231 0xe7 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x76, /* 01110110 */ -+ 0xdc, /* 11011100 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 232 0xe8 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7e, /* 01111110 */ -+ 0x18, /* 00011000 */ -+ 0x3c, /* 00111100 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x3c, /* 00111100 */ -+ 0x18, /* 00011000 */ -+ 0x7e, /* 01111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 233 0xe9 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x38, /* 00111000 */ -+ 0x6c, /* 01101100 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xfe, /* 11111110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x6c, /* 01101100 */ -+ 0x38, /* 00111000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 234 0xea */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x38, /* 00111000 */ -+ 0x6c, /* 01101100 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x6c, /* 01101100 */ -+ 0x6c, /* 01101100 */ -+ 0x6c, /* 01101100 */ -+ 0x6c, /* 01101100 */ -+ 0xee, /* 11101110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 235 0xeb */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x1e, /* 00011110 */ -+ 0x30, /* 00110000 */ -+ 0x18, /* 00011000 */ -+ 0x0c, /* 00001100 */ -+ 0x3e, /* 00111110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x66, /* 01100110 */ -+ 0x3c, /* 00111100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 236 0xec */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7e, /* 01111110 */ -+ 0xdb, /* 11011011 */ -+ 0xdb, /* 11011011 */ -+ 0xdb, /* 11011011 */ -+ 0x7e, /* 01111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 237 0xed */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x03, /* 00000011 */ -+ 0x06, /* 00000110 */ -+ 0x7e, /* 01111110 */ -+ 0xdb, /* 11011011 */ -+ 0xdb, /* 11011011 */ -+ 0xf3, /* 11110011 */ -+ 0x7e, /* 01111110 */ -+ 0x60, /* 01100000 */ -+ 0xc0, /* 11000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 238 0xee */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x1c, /* 00011100 */ -+ 0x30, /* 00110000 */ -+ 0x60, /* 01100000 */ -+ 0x60, /* 01100000 */ -+ 0x7c, /* 01111100 */ -+ 0x60, /* 01100000 */ -+ 0x60, /* 01100000 */ -+ 0x60, /* 01100000 */ -+ 0x30, /* 00110000 */ -+ 0x1c, /* 00011100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 239 0xef */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7c, /* 01111100 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0xc6, /* 11000110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 240 0xf0 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xfe, /* 11111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xfe, /* 11111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0xfe, /* 11111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 241 0xf1 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x7e, /* 01111110 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7e, /* 01111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 242 0xf2 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x30, /* 00110000 */ -+ 0x18, /* 00011000 */ -+ 0x0c, /* 00001100 */ -+ 0x06, /* 00000110 */ -+ 0x0c, /* 00001100 */ -+ 0x18, /* 00011000 */ -+ 0x30, /* 00110000 */ -+ 0x00, /* 00000000 */ -+ 0x7e, /* 01111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 243 0xf3 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x0c, /* 00001100 */ -+ 0x18, /* 00011000 */ -+ 0x30, /* 00110000 */ -+ 0x60, /* 01100000 */ -+ 0x30, /* 00110000 */ -+ 0x18, /* 00011000 */ -+ 0x0c, /* 00001100 */ -+ 0x00, /* 00000000 */ -+ 0x7e, /* 01111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 244 0xf4 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x0e, /* 00001110 */ -+ 0x1b, /* 00011011 */ -+ 0x1b, /* 00011011 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ -+ /* 245 0xf5 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0xd8, /* 11011000 */ -+ 0xd8, /* 11011000 */ -+ 0xd8, /* 11011000 */ -+ 0x70, /* 01110000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 246 0xf6 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x7e, /* 01111110 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 247 0xf7 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x76, /* 01110110 */ -+ 0xdc, /* 11011100 */ -+ 0x00, /* 00000000 */ -+ 0x76, /* 01110110 */ -+ 0xdc, /* 11011100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 248 0xf8 */ -+ 0x00, /* 00000000 */ -+ 0x38, /* 00111000 */ -+ 0x6c, /* 01101100 */ -+ 0x6c, /* 01101100 */ -+ 0x38, /* 00111000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 249 0xf9 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 250 0xfa */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x18, /* 00011000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 251 0xfb */ -+ 0x00, /* 00000000 */ -+ 0x0f, /* 00001111 */ -+ 0x0c, /* 00001100 */ -+ 0x0c, /* 00001100 */ -+ 0x0c, /* 00001100 */ -+ 0x0c, /* 00001100 */ -+ 0x0c, /* 00001100 */ -+ 0xec, /* 11101100 */ -+ 0x6c, /* 01101100 */ -+ 0x6c, /* 01101100 */ -+ 0x3c, /* 00111100 */ -+ 0x1c, /* 00011100 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 252 0xfc */ -+ 0x00, /* 00000000 */ -+ 0x6c, /* 01101100 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x36, /* 00110110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 253 0xfd */ -+ 0x00, /* 00000000 */ -+ 0x3c, /* 00111100 */ -+ 0x66, /* 01100110 */ -+ 0x0c, /* 00001100 */ -+ 0x18, /* 00011000 */ -+ 0x32, /* 00110010 */ -+ 0x7e, /* 01111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 254 0xfe */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x7e, /* 01111110 */ -+ 0x7e, /* 01111110 */ -+ 0x7e, /* 01111110 */ -+ 0x7e, /* 01111110 */ -+ 0x7e, /* 01111110 */ -+ 0x7e, /* 01111110 */ -+ 0x7e, /* 01111110 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ -+ /* 255 0xff */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+ 0x00, /* 00000000 */ -+}; -+ -+#endif -diff --git a/include/video_font_data.h b/include/video_font_data.h -index 6e64198d1a..37c3e00336 100644 ---- a/include/video_font_data.h -+++ b/include/video_font_data.h -@@ -1,4629 +1,31 @@ - /* SPDX-License-Identifier: GPL-2.0+ */ - /* -- * (C) Copyright 2000 -- * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it -- * -- * This file contains an 8x16 bitmap font for code page 437. -+ * (C) Copyright 2023 Dzmitry Sankouski - */ - - #ifndef _VIDEO_FONT_DATA_ - #define _VIDEO_FONT_DATA_ -- --#define VIDEO_FONT_CHARS 256 --#define VIDEO_FONT_WIDTH 8 --#define VIDEO_FONT_HEIGHT 16 --#define VIDEO_FONT_SIZE (VIDEO_FONT_CHARS * VIDEO_FONT_HEIGHT) -- --static unsigned char __maybe_unused video_fontdata[VIDEO_FONT_SIZE] = { -- -- /* 0 0x00 '^@' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 1 0x01 '^A' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7e, /* 01111110 */ -- 0x81, /* 10000001 */ -- 0xa5, /* 10100101 */ -- 0x81, /* 10000001 */ -- 0x81, /* 10000001 */ -- 0xbd, /* 10111101 */ -- 0x99, /* 10011001 */ -- 0x81, /* 10000001 */ -- 0x81, /* 10000001 */ -- 0x7e, /* 01111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 2 0x02 '^B' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7e, /* 01111110 */ -- 0xff, /* 11111111 */ -- 0xdb, /* 11011011 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xc3, /* 11000011 */ -- 0xe7, /* 11100111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0x7e, /* 01111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 3 0x03 '^C' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x6c, /* 01101100 */ -- 0xfe, /* 11111110 */ -- 0xfe, /* 11111110 */ -- 0xfe, /* 11111110 */ -- 0xfe, /* 11111110 */ -- 0x7c, /* 01111100 */ -- 0x38, /* 00111000 */ -- 0x10, /* 00010000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 4 0x04 '^D' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x10, /* 00010000 */ -- 0x38, /* 00111000 */ -- 0x7c, /* 01111100 */ -- 0xfe, /* 11111110 */ -- 0x7c, /* 01111100 */ -- 0x38, /* 00111000 */ -- 0x10, /* 00010000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 5 0x05 '^E' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x3c, /* 00111100 */ -- 0x3c, /* 00111100 */ -- 0xe7, /* 11100111 */ -- 0xe7, /* 11100111 */ -- 0xe7, /* 11100111 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x3c, /* 00111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 6 0x06 '^F' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x3c, /* 00111100 */ -- 0x7e, /* 01111110 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0x7e, /* 01111110 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x3c, /* 00111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 7 0x07 '^G' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x3c, /* 00111100 */ -- 0x3c, /* 00111100 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 8 0x08 '^H' */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xe7, /* 11100111 */ -- 0xc3, /* 11000011 */ -- 0xc3, /* 11000011 */ -- 0xe7, /* 11100111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- -- /* 9 0x09 '^I' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x3c, /* 00111100 */ -- 0x66, /* 01100110 */ -- 0x42, /* 01000010 */ -- 0x42, /* 01000010 */ -- 0x66, /* 01100110 */ -- 0x3c, /* 00111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 10 0x0a '^J' */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xc3, /* 11000011 */ -- 0x99, /* 10011001 */ -- 0xbd, /* 10111101 */ -- 0xbd, /* 10111101 */ -- 0x99, /* 10011001 */ -- 0xc3, /* 11000011 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- -- /* 11 0x0b '^K' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x1e, /* 00011110 */ -- 0x0e, /* 00001110 */ -- 0x1a, /* 00011010 */ -- 0x32, /* 00110010 */ -- 0x78, /* 01111000 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0x78, /* 01111000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 12 0x0c '^L' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x3c, /* 00111100 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x3c, /* 00111100 */ -- 0x18, /* 00011000 */ -- 0x7e, /* 01111110 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 13 0x0d '^M' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x3f, /* 00111111 */ -- 0x33, /* 00110011 */ -- 0x3f, /* 00111111 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x70, /* 01110000 */ -- 0xf0, /* 11110000 */ -- 0xe0, /* 11100000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 14 0x0e '^N' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7f, /* 01111111 */ -- 0x63, /* 01100011 */ -- 0x7f, /* 01111111 */ -- 0x63, /* 01100011 */ -- 0x63, /* 01100011 */ -- 0x63, /* 01100011 */ -- 0x63, /* 01100011 */ -- 0x67, /* 01100111 */ -- 0xe7, /* 11100111 */ -- 0xe6, /* 11100110 */ -- 0xc0, /* 11000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 15 0x0f '^O' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0xdb, /* 11011011 */ -- 0x3c, /* 00111100 */ -- 0xe7, /* 11100111 */ -- 0x3c, /* 00111100 */ -- 0xdb, /* 11011011 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 16 0x10 '^P' */ -- 0x00, /* 00000000 */ -- 0x80, /* 10000000 */ -- 0xc0, /* 11000000 */ -- 0xe0, /* 11100000 */ -- 0xf0, /* 11110000 */ -- 0xf8, /* 11111000 */ -- 0xfe, /* 11111110 */ -- 0xf8, /* 11111000 */ -- 0xf0, /* 11110000 */ -- 0xe0, /* 11100000 */ -- 0xc0, /* 11000000 */ -- 0x80, /* 10000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 17 0x11 '^Q' */ -- 0x00, /* 00000000 */ -- 0x02, /* 00000010 */ -- 0x06, /* 00000110 */ -- 0x0e, /* 00001110 */ -- 0x1e, /* 00011110 */ -- 0x3e, /* 00111110 */ -- 0xfe, /* 11111110 */ -- 0x3e, /* 00111110 */ -- 0x1e, /* 00011110 */ -- 0x0e, /* 00001110 */ -- 0x06, /* 00000110 */ -- 0x02, /* 00000010 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 18 0x12 '^R' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x3c, /* 00111100 */ -- 0x7e, /* 01111110 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x7e, /* 01111110 */ -- 0x3c, /* 00111100 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 19 0x13 '^S' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x00, /* 00000000 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 20 0x14 '^T' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7f, /* 01111111 */ -- 0xdb, /* 11011011 */ -- 0xdb, /* 11011011 */ -- 0xdb, /* 11011011 */ -- 0x7b, /* 01111011 */ -- 0x1b, /* 00011011 */ -- 0x1b, /* 00011011 */ -- 0x1b, /* 00011011 */ -- 0x1b, /* 00011011 */ -- 0x1b, /* 00011011 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 21 0x15 '^U' */ -- 0x00, /* 00000000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0x60, /* 01100000 */ -- 0x38, /* 00111000 */ -- 0x6c, /* 01101100 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x6c, /* 01101100 */ -- 0x38, /* 00111000 */ -- 0x0c, /* 00001100 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 22 0x16 '^V' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xfe, /* 11111110 */ -- 0xfe, /* 11111110 */ -- 0xfe, /* 11111110 */ -- 0xfe, /* 11111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 23 0x17 '^W' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x3c, /* 00111100 */ -- 0x7e, /* 01111110 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x7e, /* 01111110 */ -- 0x3c, /* 00111100 */ -- 0x18, /* 00011000 */ -- 0x7e, /* 01111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 24 0x18 '^X' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x3c, /* 00111100 */ -- 0x7e, /* 01111110 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 25 0x19 '^Y' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x7e, /* 01111110 */ -- 0x3c, /* 00111100 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 26 0x1a '^Z' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x0c, /* 00001100 */ -- 0xfe, /* 11111110 */ -- 0x0c, /* 00001100 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 27 0x1b '^[' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x30, /* 00110000 */ -- 0x60, /* 01100000 */ -- 0xfe, /* 11111110 */ -- 0x60, /* 01100000 */ -- 0x30, /* 00110000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 28 0x1c '^\' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xfe, /* 11111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 29 0x1d '^]' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x28, /* 00101000 */ -- 0x6c, /* 01101100 */ -- 0xfe, /* 11111110 */ -- 0x6c, /* 01101100 */ -- 0x28, /* 00101000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 30 0x1e '^^' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x10, /* 00010000 */ -- 0x38, /* 00111000 */ -- 0x38, /* 00111000 */ -- 0x7c, /* 01111100 */ -- 0x7c, /* 01111100 */ -- 0xfe, /* 11111110 */ -- 0xfe, /* 11111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 31 0x1f '^_' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xfe, /* 11111110 */ -- 0xfe, /* 11111110 */ -- 0x7c, /* 01111100 */ -- 0x7c, /* 01111100 */ -- 0x38, /* 00111000 */ -- 0x38, /* 00111000 */ -- 0x10, /* 00010000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 32 0x20 ' ' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 33 0x21 '!' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x3c, /* 00111100 */ -- 0x3c, /* 00111100 */ -- 0x3c, /* 00111100 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 34 0x22 '"' */ -- 0x00, /* 00000000 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x24, /* 00100100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 35 0x23 '#' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x6c, /* 01101100 */ -- 0x6c, /* 01101100 */ -- 0xfe, /* 11111110 */ -- 0x6c, /* 01101100 */ -- 0x6c, /* 01101100 */ -- 0x6c, /* 01101100 */ -- 0xfe, /* 11111110 */ -- 0x6c, /* 01101100 */ -- 0x6c, /* 01101100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 36 0x24 '$' */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0xc2, /* 11000010 */ -- 0xc0, /* 11000000 */ -- 0x7c, /* 01111100 */ -- 0x06, /* 00000110 */ -- 0x06, /* 00000110 */ -- 0x86, /* 10000110 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 37 0x25 '%' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xc2, /* 11000010 */ -- 0xc6, /* 11000110 */ -- 0x0c, /* 00001100 */ -- 0x18, /* 00011000 */ -- 0x30, /* 00110000 */ -- 0x60, /* 01100000 */ -- 0xc6, /* 11000110 */ -- 0x86, /* 10000110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 38 0x26 '&' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x38, /* 00111000 */ -- 0x6c, /* 01101100 */ -- 0x6c, /* 01101100 */ -- 0x38, /* 00111000 */ -- 0x76, /* 01110110 */ -- 0xdc, /* 11011100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0x76, /* 01110110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 39 0x27 ''' */ -- 0x00, /* 00000000 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x60, /* 01100000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 40 0x28 '(' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x0c, /* 00001100 */ -- 0x18, /* 00011000 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x18, /* 00011000 */ -- 0x0c, /* 00001100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 41 0x29 ')' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x30, /* 00110000 */ -- 0x18, /* 00011000 */ -- 0x0c, /* 00001100 */ -- 0x0c, /* 00001100 */ -- 0x0c, /* 00001100 */ -- 0x0c, /* 00001100 */ -- 0x0c, /* 00001100 */ -- 0x0c, /* 00001100 */ -- 0x18, /* 00011000 */ -- 0x30, /* 00110000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 42 0x2a '*' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x66, /* 01100110 */ -- 0x3c, /* 00111100 */ -- 0xff, /* 11111111 */ -- 0x3c, /* 00111100 */ -- 0x66, /* 01100110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 43 0x2b '+' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x7e, /* 01111110 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 44 0x2c ',' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x30, /* 00110000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 45 0x2d '-' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xfe, /* 11111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 46 0x2e '.' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 47 0x2f '/' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x02, /* 00000010 */ -- 0x06, /* 00000110 */ -- 0x0c, /* 00001100 */ -- 0x18, /* 00011000 */ -- 0x30, /* 00110000 */ -- 0x60, /* 01100000 */ -- 0xc0, /* 11000000 */ -- 0x80, /* 10000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 48 0x30 '0' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x38, /* 00111000 */ -- 0x6c, /* 01101100 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xd6, /* 11010110 */ -- 0xd6, /* 11010110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x6c, /* 01101100 */ -- 0x38, /* 00111000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 49 0x31 '1' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x38, /* 00111000 */ -- 0x78, /* 01111000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x7e, /* 01111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 50 0x32 '2' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0x06, /* 00000110 */ -- 0x0c, /* 00001100 */ -- 0x18, /* 00011000 */ -- 0x30, /* 00110000 */ -- 0x60, /* 01100000 */ -- 0xc0, /* 11000000 */ -- 0xc6, /* 11000110 */ -- 0xfe, /* 11111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 51 0x33 '3' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0x06, /* 00000110 */ -- 0x06, /* 00000110 */ -- 0x3c, /* 00111100 */ -- 0x06, /* 00000110 */ -- 0x06, /* 00000110 */ -- 0x06, /* 00000110 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 52 0x34 '4' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x0c, /* 00001100 */ -- 0x1c, /* 00011100 */ -- 0x3c, /* 00111100 */ -- 0x6c, /* 01101100 */ -- 0xcc, /* 11001100 */ -- 0xfe, /* 11111110 */ -- 0x0c, /* 00001100 */ -- 0x0c, /* 00001100 */ -- 0x0c, /* 00001100 */ -- 0x1e, /* 00011110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 53 0x35 '5' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xfe, /* 11111110 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xfc, /* 11111100 */ -- 0x06, /* 00000110 */ -- 0x06, /* 00000110 */ -- 0x06, /* 00000110 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 54 0x36 '6' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x38, /* 00111000 */ -- 0x60, /* 01100000 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xfc, /* 11111100 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 55 0x37 '7' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xfe, /* 11111110 */ -- 0xc6, /* 11000110 */ -- 0x06, /* 00000110 */ -- 0x06, /* 00000110 */ -- 0x0c, /* 00001100 */ -- 0x18, /* 00011000 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 56 0x38 '8' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 57 0x39 '9' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x7e, /* 01111110 */ -- 0x06, /* 00000110 */ -- 0x06, /* 00000110 */ -- 0x06, /* 00000110 */ -- 0x0c, /* 00001100 */ -- 0x78, /* 01111000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 58 0x3a ':' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 59 0x3b ';' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x30, /* 00110000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 60 0x3c '<' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x06, /* 00000110 */ -- 0x0c, /* 00001100 */ -- 0x18, /* 00011000 */ -- 0x30, /* 00110000 */ -- 0x60, /* 01100000 */ -- 0x30, /* 00110000 */ -- 0x18, /* 00011000 */ -- 0x0c, /* 00001100 */ -- 0x06, /* 00000110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 61 0x3d '=' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7e, /* 01111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7e, /* 01111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 62 0x3e '>' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x60, /* 01100000 */ -- 0x30, /* 00110000 */ -- 0x18, /* 00011000 */ -- 0x0c, /* 00001100 */ -- 0x06, /* 00000110 */ -- 0x0c, /* 00001100 */ -- 0x18, /* 00011000 */ -- 0x30, /* 00110000 */ -- 0x60, /* 01100000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 63 0x3f '?' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x0c, /* 00001100 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 64 0x40 '@' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xde, /* 11011110 */ -- 0xde, /* 11011110 */ -- 0xde, /* 11011110 */ -- 0xdc, /* 11011100 */ -- 0xc0, /* 11000000 */ -- 0x7c, /* 01111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 65 0x41 'A' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x10, /* 00010000 */ -- 0x38, /* 00111000 */ -- 0x6c, /* 01101100 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xfe, /* 11111110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 66 0x42 'B' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xfc, /* 11111100 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x7c, /* 01111100 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0xfc, /* 11111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 67 0x43 'C' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x3c, /* 00111100 */ -- 0x66, /* 01100110 */ -- 0xc2, /* 11000010 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xc2, /* 11000010 */ -- 0x66, /* 01100110 */ -- 0x3c, /* 00111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 68 0x44 'D' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xf8, /* 11111000 */ -- 0x6c, /* 01101100 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x6c, /* 01101100 */ -- 0xf8, /* 11111000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 69 0x45 'E' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xfe, /* 11111110 */ -- 0x66, /* 01100110 */ -- 0x62, /* 01100010 */ -- 0x68, /* 01101000 */ -- 0x78, /* 01111000 */ -- 0x68, /* 01101000 */ -- 0x60, /* 01100000 */ -- 0x62, /* 01100010 */ -- 0x66, /* 01100110 */ -- 0xfe, /* 11111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 70 0x46 'F' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xfe, /* 11111110 */ -- 0x66, /* 01100110 */ -- 0x62, /* 01100010 */ -- 0x68, /* 01101000 */ -- 0x78, /* 01111000 */ -- 0x68, /* 01101000 */ -- 0x60, /* 01100000 */ -- 0x60, /* 01100000 */ -- 0x60, /* 01100000 */ -- 0xf0, /* 11110000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 71 0x47 'G' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x3c, /* 00111100 */ -- 0x66, /* 01100110 */ -- 0xc2, /* 11000010 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xde, /* 11011110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x66, /* 01100110 */ -- 0x3a, /* 00111010 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 72 0x48 'H' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xfe, /* 11111110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 73 0x49 'I' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x3c, /* 00111100 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x3c, /* 00111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 74 0x4a 'J' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x1e, /* 00011110 */ -- 0x0c, /* 00001100 */ -- 0x0c, /* 00001100 */ -- 0x0c, /* 00001100 */ -- 0x0c, /* 00001100 */ -- 0x0c, /* 00001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0x78, /* 01111000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 75 0x4b 'K' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xe6, /* 11100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x6c, /* 01101100 */ -- 0x78, /* 01111000 */ -- 0x78, /* 01111000 */ -- 0x6c, /* 01101100 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0xe6, /* 11100110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 76 0x4c 'L' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xf0, /* 11110000 */ -- 0x60, /* 01100000 */ -- 0x60, /* 01100000 */ -- 0x60, /* 01100000 */ -- 0x60, /* 01100000 */ -- 0x60, /* 01100000 */ -- 0x60, /* 01100000 */ -- 0x62, /* 01100010 */ -- 0x66, /* 01100110 */ -- 0xfe, /* 11111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 77 0x4d 'M' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xc6, /* 11000110 */ -- 0xee, /* 11101110 */ -- 0xfe, /* 11111110 */ -- 0xfe, /* 11111110 */ -- 0xd6, /* 11010110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 78 0x4e 'N' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xc6, /* 11000110 */ -- 0xe6, /* 11100110 */ -- 0xf6, /* 11110110 */ -- 0xfe, /* 11111110 */ -- 0xde, /* 11011110 */ -- 0xce, /* 11001110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 79 0x4f 'O' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 80 0x50 'P' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xfc, /* 11111100 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x7c, /* 01111100 */ -- 0x60, /* 01100000 */ -- 0x60, /* 01100000 */ -- 0x60, /* 01100000 */ -- 0x60, /* 01100000 */ -- 0xf0, /* 11110000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 81 0x51 'Q' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xd6, /* 11010110 */ -- 0xde, /* 11011110 */ -- 0x7c, /* 01111100 */ -- 0x0c, /* 00001100 */ -- 0x0e, /* 00001110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 82 0x52 'R' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xfc, /* 11111100 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x7c, /* 01111100 */ -- 0x6c, /* 01101100 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0xe6, /* 11100110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 83 0x53 'S' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x60, /* 01100000 */ -- 0x38, /* 00111000 */ -- 0x0c, /* 00001100 */ -- 0x06, /* 00000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 84 0x54 'T' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7e, /* 01111110 */ -- 0x7e, /* 01111110 */ -- 0x5a, /* 01011010 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x3c, /* 00111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 85 0x55 'U' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 86 0x56 'V' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x6c, /* 01101100 */ -- 0x38, /* 00111000 */ -- 0x10, /* 00010000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 87 0x57 'W' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xd6, /* 11010110 */ -- 0xd6, /* 11010110 */ -- 0xd6, /* 11010110 */ -- 0xfe, /* 11111110 */ -- 0xee, /* 11101110 */ -- 0x6c, /* 01101100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 88 0x58 'X' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x6c, /* 01101100 */ -- 0x7c, /* 01111100 */ -- 0x38, /* 00111000 */ -- 0x38, /* 00111000 */ -- 0x7c, /* 01111100 */ -- 0x6c, /* 01101100 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 89 0x59 'Y' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x3c, /* 00111100 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x3c, /* 00111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 90 0x5a 'Z' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xfe, /* 11111110 */ -- 0xc6, /* 11000110 */ -- 0x86, /* 10000110 */ -- 0x0c, /* 00001100 */ -- 0x18, /* 00011000 */ -- 0x30, /* 00110000 */ -- 0x60, /* 01100000 */ -- 0xc2, /* 11000010 */ -- 0xc6, /* 11000110 */ -- 0xfe, /* 11111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 91 0x5b '[' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x3c, /* 00111100 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x3c, /* 00111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 92 0x5c '\' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x80, /* 10000000 */ -- 0xc0, /* 11000000 */ -- 0xe0, /* 11100000 */ -- 0x70, /* 01110000 */ -- 0x38, /* 00111000 */ -- 0x1c, /* 00011100 */ -- 0x0e, /* 00001110 */ -- 0x06, /* 00000110 */ -- 0x02, /* 00000010 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 93 0x5d ']' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x3c, /* 00111100 */ -- 0x0c, /* 00001100 */ -- 0x0c, /* 00001100 */ -- 0x0c, /* 00001100 */ -- 0x0c, /* 00001100 */ -- 0x0c, /* 00001100 */ -- 0x0c, /* 00001100 */ -- 0x0c, /* 00001100 */ -- 0x0c, /* 00001100 */ -- 0x3c, /* 00111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 94 0x5e '^' */ -- 0x10, /* 00010000 */ -- 0x38, /* 00111000 */ -- 0x6c, /* 01101100 */ -- 0xc6, /* 11000110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 95 0x5f '_' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xff, /* 11111111 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 96 0x60 '`' */ -- 0x00, /* 00000000 */ -- 0x30, /* 00110000 */ -- 0x18, /* 00011000 */ -- 0x0c, /* 00001100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 97 0x61 'a' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x78, /* 01111000 */ -- 0x0c, /* 00001100 */ -- 0x7c, /* 01111100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0x76, /* 01110110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 98 0x62 'b' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xe0, /* 11100000 */ -- 0x60, /* 01100000 */ -- 0x60, /* 01100000 */ -- 0x78, /* 01111000 */ -- 0x6c, /* 01101100 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x7c, /* 01111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 99 0x63 'c' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 100 0x64 'd' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x1c, /* 00011100 */ -- 0x0c, /* 00001100 */ -- 0x0c, /* 00001100 */ -- 0x3c, /* 00111100 */ -- 0x6c, /* 01101100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0x76, /* 01110110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 101 0x65 'e' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0xfe, /* 11111110 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 102 0x66 'f' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x1c, /* 00011100 */ -- 0x36, /* 00110110 */ -- 0x32, /* 00110010 */ -- 0x30, /* 00110000 */ -- 0x78, /* 01111000 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x78, /* 01111000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 103 0x67 'g' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x76, /* 01110110 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0x7c, /* 01111100 */ -- 0x0c, /* 00001100 */ -- 0xcc, /* 11001100 */ -- 0x78, /* 01111000 */ -- 0x00, /* 00000000 */ -- -- /* 104 0x68 'h' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xe0, /* 11100000 */ -- 0x60, /* 01100000 */ -- 0x60, /* 01100000 */ -- 0x6c, /* 01101100 */ -- 0x76, /* 01110110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0xe6, /* 11100110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 105 0x69 'i' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x38, /* 00111000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x3c, /* 00111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 106 0x6a 'j' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x06, /* 00000110 */ -- 0x06, /* 00000110 */ -- 0x00, /* 00000000 */ -- 0x0e, /* 00001110 */ -- 0x06, /* 00000110 */ -- 0x06, /* 00000110 */ -- 0x06, /* 00000110 */ -- 0x06, /* 00000110 */ -- 0x06, /* 00000110 */ -- 0x06, /* 00000110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x3c, /* 00111100 */ -- 0x00, /* 00000000 */ -- -- /* 107 0x6b 'k' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xe0, /* 11100000 */ -- 0x60, /* 01100000 */ -- 0x60, /* 01100000 */ -- 0x66, /* 01100110 */ -- 0x6c, /* 01101100 */ -- 0x78, /* 01111000 */ -- 0x78, /* 01111000 */ -- 0x6c, /* 01101100 */ -- 0x66, /* 01100110 */ -- 0xe6, /* 11100110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 108 0x6c 'l' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x38, /* 00111000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x3c, /* 00111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 109 0x6d 'm' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xec, /* 11101100 */ -- 0xfe, /* 11111110 */ -- 0xd6, /* 11010110 */ -- 0xd6, /* 11010110 */ -- 0xd6, /* 11010110 */ -- 0xd6, /* 11010110 */ -- 0xc6, /* 11000110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 110 0x6e 'n' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xdc, /* 11011100 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 111 0x6f 'o' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 112 0x70 'p' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xdc, /* 11011100 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x7c, /* 01111100 */ -- 0x60, /* 01100000 */ -- 0x60, /* 01100000 */ -- 0xf0, /* 11110000 */ -- 0x00, /* 00000000 */ -- -- /* 113 0x71 'q' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x76, /* 01110110 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0x7c, /* 01111100 */ -- 0x0c, /* 00001100 */ -- 0x0c, /* 00001100 */ -- 0x1e, /* 00011110 */ -- 0x00, /* 00000000 */ -- -- /* 114 0x72 'r' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xdc, /* 11011100 */ -- 0x76, /* 01110110 */ -- 0x66, /* 01100110 */ -- 0x60, /* 01100000 */ -- 0x60, /* 01100000 */ -- 0x60, /* 01100000 */ -- 0xf0, /* 11110000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 115 0x73 's' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0x60, /* 01100000 */ -- 0x38, /* 00111000 */ -- 0x0c, /* 00001100 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 116 0x74 't' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x10, /* 00010000 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0xfc, /* 11111100 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x36, /* 00110110 */ -- 0x1c, /* 00011100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 117 0x75 'u' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0x76, /* 01110110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 118 0x76 'v' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x6c, /* 01101100 */ -- 0x38, /* 00111000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 119 0x77 'w' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xd6, /* 11010110 */ -- 0xd6, /* 11010110 */ -- 0xd6, /* 11010110 */ -- 0xfe, /* 11111110 */ -- 0x6c, /* 01101100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 120 0x78 'x' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xc6, /* 11000110 */ -- 0x6c, /* 01101100 */ -- 0x38, /* 00111000 */ -- 0x38, /* 00111000 */ -- 0x38, /* 00111000 */ -- 0x6c, /* 01101100 */ -- 0xc6, /* 11000110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 121 0x79 'y' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x7e, /* 01111110 */ -- 0x06, /* 00000110 */ -- 0x0c, /* 00001100 */ -- 0xf8, /* 11111000 */ -- 0x00, /* 00000000 */ -- -- /* 122 0x7a 'z' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xfe, /* 11111110 */ -- 0xcc, /* 11001100 */ -- 0x18, /* 00011000 */ -- 0x30, /* 00110000 */ -- 0x60, /* 01100000 */ -- 0xc6, /* 11000110 */ -- 0xfe, /* 11111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 123 0x7b '{' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x0e, /* 00001110 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x70, /* 01110000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x0e, /* 00001110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 124 0x7c '|' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 125 0x7d '}' */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x70, /* 01110000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x0e, /* 00001110 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x70, /* 01110000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 126 0x7e '~' */ -- 0x00, /* 00000000 */ -- 0x76, /* 01110110 */ -- 0xdc, /* 11011100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 127 0x7f */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x10, /* 00010000 */ -- 0x38, /* 00111000 */ -- 0x6c, /* 01101100 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xfe, /* 11111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 128 0x80 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x3c, /* 00111100 */ -- 0x66, /* 01100110 */ -- 0xc2, /* 11000010 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xc2, /* 11000010 */ -- 0x66, /* 01100110 */ -- 0x3c, /* 00111100 */ -- 0x18, /* 00011000 */ -- 0x70, /* 01110000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 129 0x81 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xcc, /* 11001100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0x76, /* 01110110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 130 0x82 */ -- 0x00, /* 00000000 */ -- 0x0c, /* 00001100 */ -- 0x18, /* 00011000 */ -- 0x30, /* 00110000 */ -- 0x00, /* 00000000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0xfe, /* 11111110 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 131 0x83 */ -- 0x00, /* 00000000 */ -- 0x10, /* 00010000 */ -- 0x38, /* 00111000 */ -- 0x6c, /* 01101100 */ -- 0x00, /* 00000000 */ -- 0x78, /* 01111000 */ -- 0x0c, /* 00001100 */ -- 0x7c, /* 01111100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0x76, /* 01110110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 132 0x84 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xcc, /* 11001100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x78, /* 01111000 */ -- 0x0c, /* 00001100 */ -- 0x7c, /* 01111100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0x76, /* 01110110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 133 0x85 */ -- 0x00, /* 00000000 */ -- 0x60, /* 01100000 */ -- 0x30, /* 00110000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x78, /* 01111000 */ -- 0x0c, /* 00001100 */ -- 0x7c, /* 01111100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0x76, /* 01110110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 134 0x86 */ -- 0x00, /* 00000000 */ -- 0x38, /* 00111000 */ -- 0x6c, /* 01101100 */ -- 0x38, /* 00111000 */ -- 0x00, /* 00000000 */ -- 0x78, /* 01111000 */ -- 0x0c, /* 00001100 */ -- 0x7c, /* 01111100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0x76, /* 01110110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 135 0x87 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0x18, /* 00011000 */ -- 0x70, /* 01110000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 136 0x88 */ -- 0x00, /* 00000000 */ -- 0x10, /* 00010000 */ -- 0x38, /* 00111000 */ -- 0x6c, /* 01101100 */ -- 0x00, /* 00000000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0xfe, /* 11111110 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 137 0x89 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xc6, /* 11000110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0xfe, /* 11111110 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 138 0x8a */ -- 0x00, /* 00000000 */ -- 0x60, /* 01100000 */ -- 0x30, /* 00110000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0xfe, /* 11111110 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 139 0x8b */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x66, /* 01100110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x38, /* 00111000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x3c, /* 00111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 140 0x8c */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x3c, /* 00111100 */ -- 0x66, /* 01100110 */ -- 0x00, /* 00000000 */ -- 0x38, /* 00111000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x3c, /* 00111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 141 0x8d */ -- 0x00, /* 00000000 */ -- 0x60, /* 01100000 */ -- 0x30, /* 00110000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x38, /* 00111000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x3c, /* 00111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 142 0x8e */ -- 0x00, /* 00000000 */ -- 0xc6, /* 11000110 */ -- 0x00, /* 00000000 */ -- 0x10, /* 00010000 */ -- 0x38, /* 00111000 */ -- 0x6c, /* 01101100 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xfe, /* 11111110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 143 0x8f */ -- 0x38, /* 00111000 */ -- 0x6c, /* 01101100 */ -- 0x38, /* 00111000 */ -- 0x10, /* 00010000 */ -- 0x38, /* 00111000 */ -- 0x6c, /* 01101100 */ -- 0xc6, /* 11000110 */ -- 0xfe, /* 11111110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 144 0x90 */ -- 0x0c, /* 00001100 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0xfe, /* 11111110 */ -- 0x66, /* 01100110 */ -- 0x62, /* 01100010 */ -- 0x68, /* 01101000 */ -- 0x78, /* 01111000 */ -- 0x68, /* 01101000 */ -- 0x62, /* 01100010 */ -- 0x66, /* 01100110 */ -- 0xfe, /* 11111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 145 0x91 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xec, /* 11101100 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x7e, /* 01111110 */ -- 0xd8, /* 11011000 */ -- 0xd8, /* 11011000 */ -- 0x6e, /* 01101110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 146 0x92 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x3e, /* 00111110 */ -- 0x6c, /* 01101100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xfe, /* 11111110 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xce, /* 11001110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 147 0x93 */ -- 0x00, /* 00000000 */ -- 0x10, /* 00010000 */ -- 0x38, /* 00111000 */ -- 0x6c, /* 01101100 */ -- 0x00, /* 00000000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 148 0x94 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xc6, /* 11000110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 149 0x95 */ -- 0x00, /* 00000000 */ -- 0x60, /* 01100000 */ -- 0x30, /* 00110000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 150 0x96 */ -- 0x00, /* 00000000 */ -- 0x30, /* 00110000 */ -- 0x78, /* 01111000 */ -- 0xcc, /* 11001100 */ -- 0x00, /* 00000000 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0x76, /* 01110110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 151 0x97 */ -- 0x00, /* 00000000 */ -- 0x60, /* 01100000 */ -- 0x30, /* 00110000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0x76, /* 01110110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 152 0x98 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xc6, /* 11000110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x7e, /* 01111110 */ -- 0x06, /* 00000110 */ -- 0x0c, /* 00001100 */ -- 0x78, /* 01111000 */ -- 0x00, /* 00000000 */ -- -- /* 153 0x99 */ -- 0x00, /* 00000000 */ -- 0xc6, /* 11000110 */ -- 0x00, /* 00000000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 154 0x9a */ -- 0x00, /* 00000000 */ -- 0xc6, /* 11000110 */ -- 0x00, /* 00000000 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 155 0x9b */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 156 0x9c */ -- 0x00, /* 00000000 */ -- 0x38, /* 00111000 */ -- 0x6c, /* 01101100 */ -- 0x64, /* 01100100 */ -- 0x60, /* 01100000 */ -- 0xf0, /* 11110000 */ -- 0x60, /* 01100000 */ -- 0x60, /* 01100000 */ -- 0x60, /* 01100000 */ -- 0x60, /* 01100000 */ -- 0xe6, /* 11100110 */ -- 0xfc, /* 11111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 157 0x9d */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x3c, /* 00111100 */ -- 0x18, /* 00011000 */ -- 0x7e, /* 01111110 */ -- 0x18, /* 00011000 */ -- 0x7e, /* 01111110 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 158 0x9e */ -- 0x00, /* 00000000 */ -- 0xf8, /* 11111000 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xf8, /* 11111000 */ -- 0xc4, /* 11000100 */ -- 0xcc, /* 11001100 */ -- 0xde, /* 11011110 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xc6, /* 11000110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 159 0x9f */ -- 0x00, /* 00000000 */ -- 0x0e, /* 00001110 */ -- 0x1b, /* 00011011 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x7e, /* 01111110 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0xd8, /* 11011000 */ -- 0x70, /* 01110000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 160 0xa0 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x30, /* 00110000 */ -- 0x60, /* 01100000 */ -- 0x00, /* 00000000 */ -- 0x78, /* 01111000 */ -- 0x0c, /* 00001100 */ -- 0x7c, /* 01111100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0x76, /* 01110110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 161 0xa1 */ -- 0x00, /* 00000000 */ -- 0x0c, /* 00001100 */ -- 0x18, /* 00011000 */ -- 0x30, /* 00110000 */ -- 0x00, /* 00000000 */ -- 0x38, /* 00111000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x3c, /* 00111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 162 0xa2 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x30, /* 00110000 */ -- 0x60, /* 01100000 */ -- 0x00, /* 00000000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 163 0xa3 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x30, /* 00110000 */ -- 0x60, /* 01100000 */ -- 0x00, /* 00000000 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0x76, /* 01110110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 164 0xa4 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x76, /* 01110110 */ -- 0xdc, /* 11011100 */ -- 0x00, /* 00000000 */ -- 0xdc, /* 11011100 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 165 0xa5 */ -- 0x76, /* 01110110 */ -- 0xdc, /* 11011100 */ -- 0x00, /* 00000000 */ -- 0xc6, /* 11000110 */ -- 0xe6, /* 11100110 */ -- 0xf6, /* 11110110 */ -- 0xfe, /* 11111110 */ -- 0xde, /* 11011110 */ -- 0xce, /* 11001110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 166 0xa6 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x3c, /* 00111100 */ -- 0x6c, /* 01101100 */ -- 0x6c, /* 01101100 */ -- 0x3e, /* 00111110 */ -- 0x00, /* 00000000 */ -- 0x7e, /* 01111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 167 0xa7 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x38, /* 00111000 */ -- 0x6c, /* 01101100 */ -- 0x6c, /* 01101100 */ -- 0x38, /* 00111000 */ -- 0x00, /* 00000000 */ -- 0x7c, /* 01111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 168 0xa8 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x00, /* 00000000 */ -- 0x30, /* 00110000 */ -- 0x30, /* 00110000 */ -- 0x60, /* 01100000 */ -- 0xc0, /* 11000000 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x7c, /* 01111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 169 0xa9 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xfe, /* 11111110 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 170 0xaa */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xfe, /* 11111110 */ -- 0x06, /* 00000110 */ -- 0x06, /* 00000110 */ -- 0x06, /* 00000110 */ -- 0x06, /* 00000110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 171 0xab */ -- 0x00, /* 00000000 */ -- 0x60, /* 01100000 */ -- 0xe0, /* 11100000 */ -- 0x62, /* 01100010 */ -- 0x66, /* 01100110 */ -- 0x6c, /* 01101100 */ -- 0x18, /* 00011000 */ -- 0x30, /* 00110000 */ -- 0x60, /* 01100000 */ -- 0xdc, /* 11011100 */ -- 0x86, /* 10000110 */ -- 0x0c, /* 00001100 */ -- 0x18, /* 00011000 */ -- 0x3e, /* 00111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 172 0xac */ -- 0x00, /* 00000000 */ -- 0x60, /* 01100000 */ -- 0xe0, /* 11100000 */ -- 0x62, /* 01100010 */ -- 0x66, /* 01100110 */ -- 0x6c, /* 01101100 */ -- 0x18, /* 00011000 */ -- 0x30, /* 00110000 */ -- 0x66, /* 01100110 */ -- 0xce, /* 11001110 */ -- 0x9a, /* 10011010 */ -- 0x3f, /* 00111111 */ -- 0x06, /* 00000110 */ -- 0x06, /* 00000110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 173 0xad */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x3c, /* 00111100 */ -- 0x3c, /* 00111100 */ -- 0x3c, /* 00111100 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 174 0xae */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x36, /* 00110110 */ -- 0x6c, /* 01101100 */ -- 0xd8, /* 11011000 */ -- 0x6c, /* 01101100 */ -- 0x36, /* 00110110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 175 0xaf */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xd8, /* 11011000 */ -- 0x6c, /* 01101100 */ -- 0x36, /* 00110110 */ -- 0x6c, /* 01101100 */ -- 0xd8, /* 11011000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 176 0xb0 */ -- 0x11, /* 00010001 */ -- 0x44, /* 01000100 */ -- 0x11, /* 00010001 */ -- 0x44, /* 01000100 */ -- 0x11, /* 00010001 */ -- 0x44, /* 01000100 */ -- 0x11, /* 00010001 */ -- 0x44, /* 01000100 */ -- 0x11, /* 00010001 */ -- 0x44, /* 01000100 */ -- 0x11, /* 00010001 */ -- 0x44, /* 01000100 */ -- 0x11, /* 00010001 */ -- 0x44, /* 01000100 */ -- 0x11, /* 00010001 */ -- 0x44, /* 01000100 */ -- -- /* 177 0xb1 */ -- 0x55, /* 01010101 */ -- 0xaa, /* 10101010 */ -- 0x55, /* 01010101 */ -- 0xaa, /* 10101010 */ -- 0x55, /* 01010101 */ -- 0xaa, /* 10101010 */ -- 0x55, /* 01010101 */ -- 0xaa, /* 10101010 */ -- 0x55, /* 01010101 */ -- 0xaa, /* 10101010 */ -- 0x55, /* 01010101 */ -- 0xaa, /* 10101010 */ -- 0x55, /* 01010101 */ -- 0xaa, /* 10101010 */ -- 0x55, /* 01010101 */ -- 0xaa, /* 10101010 */ -- -- /* 178 0xb2 */ -- 0xdd, /* 11011101 */ -- 0x77, /* 01110111 */ -- 0xdd, /* 11011101 */ -- 0x77, /* 01110111 */ -- 0xdd, /* 11011101 */ -- 0x77, /* 01110111 */ -- 0xdd, /* 11011101 */ -- 0x77, /* 01110111 */ -- 0xdd, /* 11011101 */ -- 0x77, /* 01110111 */ -- 0xdd, /* 11011101 */ -- 0x77, /* 01110111 */ -- 0xdd, /* 11011101 */ -- 0x77, /* 01110111 */ -- 0xdd, /* 11011101 */ -- 0x77, /* 01110111 */ -- -- /* 179 0xb3 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- -- /* 180 0xb4 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0xf8, /* 11111000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- -- /* 181 0xb5 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0xf8, /* 11111000 */ -- 0x18, /* 00011000 */ -- 0xf8, /* 11111000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- -- /* 182 0xb6 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0xf6, /* 11110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- -- /* 183 0xb7 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xfe, /* 11111110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- -- /* 184 0xb8 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xf8, /* 11111000 */ -- 0x18, /* 00011000 */ -- 0xf8, /* 11111000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- -- /* 185 0xb9 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0xf6, /* 11110110 */ -- 0x06, /* 00000110 */ -- 0xf6, /* 11110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- -- /* 186 0xba */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- -- /* 187 0xbb */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xfe, /* 11111110 */ -- 0x06, /* 00000110 */ -- 0xf6, /* 11110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- -- /* 188 0xbc */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0xf6, /* 11110110 */ -- 0x06, /* 00000110 */ -- 0xfe, /* 11111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 189 0xbd */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0xfe, /* 11111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 190 0xbe */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0xf8, /* 11111000 */ -- 0x18, /* 00011000 */ -- 0xf8, /* 11111000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 191 0xbf */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xf8, /* 11111000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- -- /* 192 0xc0 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x1f, /* 00011111 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 193 0xc1 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0xff, /* 11111111 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 194 0xc2 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xff, /* 11111111 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- -- /* 195 0xc3 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x1f, /* 00011111 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- -- /* 196 0xc4 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xff, /* 11111111 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 197 0xc5 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0xff, /* 11111111 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- -- /* 198 0xc6 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x1f, /* 00011111 */ -- 0x18, /* 00011000 */ -- 0x1f, /* 00011111 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- -- /* 199 0xc7 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x37, /* 00110111 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- -- /* 200 0xc8 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x37, /* 00110111 */ -- 0x30, /* 00110000 */ -- 0x3f, /* 00111111 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 201 0xc9 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x3f, /* 00111111 */ -- 0x30, /* 00110000 */ -- 0x37, /* 00110111 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- -- /* 202 0xca */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0xf7, /* 11110111 */ -- 0x00, /* 00000000 */ -- 0xff, /* 11111111 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 203 0xcb */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xff, /* 11111111 */ -- 0x00, /* 00000000 */ -- 0xf7, /* 11110111 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- -- /* 204 0xcc */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x37, /* 00110111 */ -- 0x30, /* 00110000 */ -- 0x37, /* 00110111 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- -- /* 205 0xcd */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xff, /* 11111111 */ -- 0x00, /* 00000000 */ -- 0xff, /* 11111111 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 206 0xce */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0xf7, /* 11110111 */ -- 0x00, /* 00000000 */ -- 0xf7, /* 11110111 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- -- /* 207 0xcf */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0xff, /* 11111111 */ -- 0x00, /* 00000000 */ -- 0xff, /* 11111111 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 208 0xd0 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0xff, /* 11111111 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 209 0xd1 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xff, /* 11111111 */ -- 0x00, /* 00000000 */ -- 0xff, /* 11111111 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- -- /* 210 0xd2 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xff, /* 11111111 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- -- /* 211 0xd3 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x3f, /* 00111111 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 212 0xd4 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x1f, /* 00011111 */ -- 0x18, /* 00011000 */ -- 0x1f, /* 00011111 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 213 0xd5 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x1f, /* 00011111 */ -- 0x18, /* 00011000 */ -- 0x1f, /* 00011111 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- -- /* 214 0xd6 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x3f, /* 00111111 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- -- /* 215 0xd7 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0xff, /* 11111111 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- -- /* 216 0xd8 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0xff, /* 11111111 */ -- 0x18, /* 00011000 */ -- 0xff, /* 11111111 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- -- /* 217 0xd9 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0xf8, /* 11111000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 218 0xda */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x1f, /* 00011111 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- -- /* 219 0xdb */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- -- /* 220 0xdc */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- -- /* 221 0xdd */ -- 0xf0, /* 11110000 */ -- 0xf0, /* 11110000 */ -- 0xf0, /* 11110000 */ -- 0xf0, /* 11110000 */ -- 0xf0, /* 11110000 */ -- 0xf0, /* 11110000 */ -- 0xf0, /* 11110000 */ -- 0xf0, /* 11110000 */ -- 0xf0, /* 11110000 */ -- 0xf0, /* 11110000 */ -- 0xf0, /* 11110000 */ -- 0xf0, /* 11110000 */ -- 0xf0, /* 11110000 */ -- 0xf0, /* 11110000 */ -- 0xf0, /* 11110000 */ -- 0xf0, /* 11110000 */ -- -- /* 222 0xde */ -- 0x0f, /* 00001111 */ -- 0x0f, /* 00001111 */ -- 0x0f, /* 00001111 */ -- 0x0f, /* 00001111 */ -- 0x0f, /* 00001111 */ -- 0x0f, /* 00001111 */ -- 0x0f, /* 00001111 */ -- 0x0f, /* 00001111 */ -- 0x0f, /* 00001111 */ -- 0x0f, /* 00001111 */ -- 0x0f, /* 00001111 */ -- 0x0f, /* 00001111 */ -- 0x0f, /* 00001111 */ -- 0x0f, /* 00001111 */ -- 0x0f, /* 00001111 */ -- 0x0f, /* 00001111 */ -- -- /* 223 0xdf */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0xff, /* 11111111 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 224 0xe0 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x76, /* 01110110 */ -- 0xdc, /* 11011100 */ -- 0xd8, /* 11011000 */ -- 0xd8, /* 11011000 */ -- 0xd8, /* 11011000 */ -- 0xdc, /* 11011100 */ -- 0x76, /* 01110110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 225 0xe1 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x78, /* 01111000 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xcc, /* 11001100 */ -- 0xd8, /* 11011000 */ -- 0xcc, /* 11001100 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xcc, /* 11001100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 226 0xe2 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xfe, /* 11111110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0xc0, /* 11000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 227 0xe3 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xfe, /* 11111110 */ -- 0x6c, /* 01101100 */ -- 0x6c, /* 01101100 */ -- 0x6c, /* 01101100 */ -- 0x6c, /* 01101100 */ -- 0x6c, /* 01101100 */ -- 0x6c, /* 01101100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 228 0xe4 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xfe, /* 11111110 */ -- 0xc6, /* 11000110 */ -- 0x60, /* 01100000 */ -- 0x30, /* 00110000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x30, /* 00110000 */ -- 0x60, /* 01100000 */ -- 0xc6, /* 11000110 */ -- 0xfe, /* 11111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 229 0xe5 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7e, /* 01111110 */ -- 0xd8, /* 11011000 */ -- 0xd8, /* 11011000 */ -- 0xd8, /* 11011000 */ -- 0xd8, /* 11011000 */ -- 0xd8, /* 11011000 */ -- 0x70, /* 01110000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 230 0xe6 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x7c, /* 01111100 */ -- 0x60, /* 01100000 */ -- 0x60, /* 01100000 */ -- 0xc0, /* 11000000 */ -- 0x00, /* 00000000 */ -- -- /* 231 0xe7 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x76, /* 01110110 */ -- 0xdc, /* 11011100 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 232 0xe8 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7e, /* 01111110 */ -- 0x18, /* 00011000 */ -- 0x3c, /* 00111100 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x3c, /* 00111100 */ -- 0x18, /* 00011000 */ -- 0x7e, /* 01111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 233 0xe9 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x38, /* 00111000 */ -- 0x6c, /* 01101100 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xfe, /* 11111110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x6c, /* 01101100 */ -- 0x38, /* 00111000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 234 0xea */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x38, /* 00111000 */ -- 0x6c, /* 01101100 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x6c, /* 01101100 */ -- 0x6c, /* 01101100 */ -- 0x6c, /* 01101100 */ -- 0x6c, /* 01101100 */ -- 0xee, /* 11101110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 235 0xeb */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x1e, /* 00011110 */ -- 0x30, /* 00110000 */ -- 0x18, /* 00011000 */ -- 0x0c, /* 00001100 */ -- 0x3e, /* 00111110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x66, /* 01100110 */ -- 0x3c, /* 00111100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 236 0xec */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7e, /* 01111110 */ -- 0xdb, /* 11011011 */ -- 0xdb, /* 11011011 */ -- 0xdb, /* 11011011 */ -- 0x7e, /* 01111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 237 0xed */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x03, /* 00000011 */ -- 0x06, /* 00000110 */ -- 0x7e, /* 01111110 */ -- 0xdb, /* 11011011 */ -- 0xdb, /* 11011011 */ -- 0xf3, /* 11110011 */ -- 0x7e, /* 01111110 */ -- 0x60, /* 01100000 */ -- 0xc0, /* 11000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 238 0xee */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x1c, /* 00011100 */ -- 0x30, /* 00110000 */ -- 0x60, /* 01100000 */ -- 0x60, /* 01100000 */ -- 0x7c, /* 01111100 */ -- 0x60, /* 01100000 */ -- 0x60, /* 01100000 */ -- 0x60, /* 01100000 */ -- 0x30, /* 00110000 */ -- 0x1c, /* 00011100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 239 0xef */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7c, /* 01111100 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0xc6, /* 11000110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 240 0xf0 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xfe, /* 11111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xfe, /* 11111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0xfe, /* 11111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 241 0xf1 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x7e, /* 01111110 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7e, /* 01111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 242 0xf2 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x30, /* 00110000 */ -- 0x18, /* 00011000 */ -- 0x0c, /* 00001100 */ -- 0x06, /* 00000110 */ -- 0x0c, /* 00001100 */ -- 0x18, /* 00011000 */ -- 0x30, /* 00110000 */ -- 0x00, /* 00000000 */ -- 0x7e, /* 01111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 243 0xf3 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x0c, /* 00001100 */ -- 0x18, /* 00011000 */ -- 0x30, /* 00110000 */ -- 0x60, /* 01100000 */ -- 0x30, /* 00110000 */ -- 0x18, /* 00011000 */ -- 0x0c, /* 00001100 */ -- 0x00, /* 00000000 */ -- 0x7e, /* 01111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 244 0xf4 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x0e, /* 00001110 */ -- 0x1b, /* 00011011 */ -- 0x1b, /* 00011011 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- -- /* 245 0xf5 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0xd8, /* 11011000 */ -- 0xd8, /* 11011000 */ -- 0xd8, /* 11011000 */ -- 0x70, /* 01110000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 246 0xf6 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x7e, /* 01111110 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 247 0xf7 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x76, /* 01110110 */ -- 0xdc, /* 11011100 */ -- 0x00, /* 00000000 */ -- 0x76, /* 01110110 */ -- 0xdc, /* 11011100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 248 0xf8 */ -- 0x00, /* 00000000 */ -- 0x38, /* 00111000 */ -- 0x6c, /* 01101100 */ -- 0x6c, /* 01101100 */ -- 0x38, /* 00111000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 249 0xf9 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 250 0xfa */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x18, /* 00011000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 251 0xfb */ -- 0x00, /* 00000000 */ -- 0x0f, /* 00001111 */ -- 0x0c, /* 00001100 */ -- 0x0c, /* 00001100 */ -- 0x0c, /* 00001100 */ -- 0x0c, /* 00001100 */ -- 0x0c, /* 00001100 */ -- 0xec, /* 11101100 */ -- 0x6c, /* 01101100 */ -- 0x6c, /* 01101100 */ -- 0x3c, /* 00111100 */ -- 0x1c, /* 00011100 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 252 0xfc */ -- 0x00, /* 00000000 */ -- 0x6c, /* 01101100 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x36, /* 00110110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 253 0xfd */ -- 0x00, /* 00000000 */ -- 0x3c, /* 00111100 */ -- 0x66, /* 01100110 */ -- 0x0c, /* 00001100 */ -- 0x18, /* 00011000 */ -- 0x32, /* 00110010 */ -- 0x7e, /* 01111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 254 0xfe */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x7e, /* 01111110 */ -- 0x7e, /* 01111110 */ -- 0x7e, /* 01111110 */ -- 0x7e, /* 01111110 */ -- 0x7e, /* 01111110 */ -- 0x7e, /* 01111110 */ -- 0x7e, /* 01111110 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -- /* 255 0xff */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- 0x00, /* 00000000 */ -- -+#define VIDEO_FONT_BYTE_WIDTH(width) ((width / 8) + (width % 8 > 0)) -+#define VIDEO_FONT_CHAR_PIXEL_BYTES(width, height) (height * VIDEO_FONT_BYTE_WIDTH(width)) -+#define VIDEO_FONT_SIZE(chars, width, height) (chars * VIDEO_FONT_CHAR_PIXEL_BYTES(width, height)) -+ -+struct video_fontdata { -+ const char *name; -+ int width; -+ int height; -+ int byte_width; -+ int char_pixel_bytes; -+ unsigned char *video_fontdata; - }; - --#endif -+#define FONT_ENTRY(_font_width, _font_height, _width_x_height) \ -+{ \ -+ .name = #_width_x_height, \ -+ .width = _font_width, \ -+ .height = _font_height, \ -+ .byte_width = VIDEO_FONT_BYTE_WIDTH(_font_width), \ -+ .char_pixel_bytes = VIDEO_FONT_CHAR_PIXEL_BYTES(_font_width, _font_height), \ -+ .video_fontdata = video_fontdata_##_width_x_height, \ -+} -+ -+#endif /* _VIDEO_FONT_DATA_ */ -diff --git a/include/video_font_sun12x22.h b/include/video_font_sun12x22.h -new file mode 100644 -index 0000000000..47d3b798a8 ---- /dev/null -+++ b/include/video_font_sun12x22.h -@@ -0,0 +1,6158 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Legacy 12x22 font resembling the font used on old Sun workstations. -+ * Copied from Linux' lib/fonts/font_sun12x22.c. -+ */ -+ -+#ifndef _VIDEO_FONT_DATA_SUN12X22_ -+#define _VIDEO_FONT_DATA_SUN12X22_ -+ -+#include -+ -+static unsigned char __maybe_unused video_fontdata_12x22[VIDEO_FONT_SIZE(256, 12, 22)] = { -+ /* 0 0x00 '^@' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 1 0x01 '^A' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1f, 0xc0, /* 000111111100 */ -+ 0x30, 0x60, /* 001100000110 */ -+ 0x65, 0x30, /* 011001010011 */ -+ 0x6d, 0xb0, /* 011011011011 */ -+ 0x60, 0x30, /* 011000000011 */ -+ 0x62, 0x30, /* 011000100011 */ -+ 0x62, 0x30, /* 011000100011 */ -+ 0x60, 0x30, /* 011000000011 */ -+ 0x6f, 0xb0, /* 011011111011 */ -+ 0x67, 0x30, /* 011001110011 */ -+ 0x30, 0x60, /* 001100000110 */ -+ 0x1f, 0xc0, /* 000111111100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 2 0x02 '^B' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1f, 0xc0, /* 000111111100 */ -+ 0x3f, 0xe0, /* 001111111110 */ -+ 0x7a, 0xf0, /* 011110101111 */ -+ 0x72, 0x70, /* 011100100111 */ -+ 0x7f, 0xf0, /* 011111111111 */ -+ 0x7d, 0xf0, /* 011111011111 */ -+ 0x7d, 0xf0, /* 011111011111 */ -+ 0x7f, 0xf0, /* 011111111111 */ -+ 0x70, 0x70, /* 011100000111 */ -+ 0x78, 0xf0, /* 011110001111 */ -+ 0x3f, 0xe0, /* 001111111110 */ -+ 0x1f, 0xc0, /* 000111111100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 3 0x03 '^C' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 4 0x04 '^D' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x02, 0x00, /* 000000100000 */ -+ 0x07, 0x00, /* 000001110000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x1f, 0xc0, /* 000111111100 */ -+ 0x1f, 0xc0, /* 000111111100 */ -+ 0x3f, 0xe0, /* 001111111110 */ -+ 0x1f, 0xc0, /* 000111111100 */ -+ 0x1f, 0xc0, /* 000111111100 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x07, 0x00, /* 000001110000 */ -+ 0x02, 0x00, /* 000000100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 5 0x05 '^E' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x02, 0x00, /* 000000100000 */ -+ 0x07, 0x00, /* 000001110000 */ -+ 0x07, 0x00, /* 000001110000 */ -+ 0x02, 0x00, /* 000000100000 */ -+ 0x18, 0xc0, /* 000110001100 */ -+ 0x3d, 0xe0, /* 001111011110 */ -+ 0x3d, 0xe0, /* 001111011110 */ -+ 0x1a, 0xc0, /* 000110101100 */ -+ 0x02, 0x00, /* 000000100000 */ -+ 0x07, 0x00, /* 000001110000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x1f, 0xc0, /* 000111111100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 6 0x06 '^F' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x36, 0xc0, /* 001101101100 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 7 0x07 '^G' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 8 0x08 '^H' */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xf9, 0xf0, /* 111110011111 */ -+ 0xf0, 0xf0, /* 111100001111 */ -+ 0xf0, 0xf0, /* 111100001111 */ -+ 0xe0, 0x70, /* 111000000111 */ -+ 0xe0, 0x70, /* 111000000111 */ -+ 0xc0, 0x30, /* 110000000011 */ -+ 0xc0, 0x30, /* 110000000011 */ -+ 0xe0, 0x70, /* 111000000111 */ -+ 0xe0, 0x70, /* 111000000111 */ -+ 0xf0, 0xf0, /* 111100001111 */ -+ 0xf0, 0xf0, /* 111100001111 */ -+ 0xf9, 0xf0, /* 111110011111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ -+ /* 9 0x09 '^I' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 10 0x0a '^J' */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xf9, 0xf0, /* 111110011111 */ -+ 0xf0, 0xf0, /* 111100001111 */ -+ 0xf0, 0xf0, /* 111100001111 */ -+ 0xe6, 0x70, /* 111001100111 */ -+ 0xe6, 0x70, /* 111001100111 */ -+ 0xcf, 0x30, /* 110011110011 */ -+ 0xcf, 0x30, /* 110011110011 */ -+ 0xe6, 0x70, /* 111001100111 */ -+ 0xe6, 0x70, /* 111001100111 */ -+ 0xf0, 0xf0, /* 111100001111 */ -+ 0xf0, 0xf0, /* 111100001111 */ -+ 0xf9, 0xf0, /* 111110011111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ -+ /* 11 0x0b '^K' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0xe0, /* 000011111110 */ -+ 0x0f, 0xe0, /* 000011111110 */ -+ 0x01, 0xe0, /* 000000011110 */ -+ 0x03, 0x60, /* 000000110110 */ -+ 0x06, 0x60, /* 000001100110 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x33, 0x00, /* 001100110000 */ -+ 0x33, 0x00, /* 001100110000 */ -+ 0x61, 0x80, /* 011000011000 */ -+ 0x61, 0x80, /* 011000011000 */ -+ 0x33, 0x00, /* 001100110000 */ -+ 0x33, 0x00, /* 001100110000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 12 0x0c '^L' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 13 0x0d '^M' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0xe0, /* 000011111110 */ -+ 0x0c, 0x60, /* 000011000110 */ -+ 0x0c, 0x60, /* 000011000110 */ -+ 0x0f, 0xe0, /* 000011111110 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x3c, 0x00, /* 001111000000 */ -+ 0x7c, 0x00, /* 011111000000 */ -+ 0x78, 0x00, /* 011110000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 14 0x0e '^N' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1f, 0xe0, /* 000111111110 */ -+ 0x18, 0x60, /* 000110000110 */ -+ 0x18, 0x60, /* 000110000110 */ -+ 0x1f, 0xe0, /* 000111111110 */ -+ 0x18, 0x60, /* 000110000110 */ -+ 0x18, 0x60, /* 000110000110 */ -+ 0x18, 0x60, /* 000110000110 */ -+ 0x18, 0x60, /* 000110000110 */ -+ 0x18, 0x60, /* 000110000110 */ -+ 0x18, 0x60, /* 000110000110 */ -+ 0x19, 0xe0, /* 000110011110 */ -+ 0x1b, 0xe0, /* 000110111110 */ -+ 0x1b, 0xc0, /* 000110111100 */ -+ 0x79, 0x80, /* 011110011000 */ -+ 0xf8, 0x00, /* 111110000000 */ -+ 0xf0, 0x00, /* 111100000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 15 0x0f '^O' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x18, 0xc0, /* 000110001100 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x6d, 0xb0, /* 011011011011 */ -+ 0x3d, 0xe0, /* 001111011110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x3d, 0xe0, /* 001111011110 */ -+ 0x6d, 0xb0, /* 011011011011 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x18, 0xc0, /* 000110001100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 16 0x10 '^P' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x20, /* 000000000010 */ -+ 0x00, 0x60, /* 000000000110 */ -+ 0x00, 0xe0, /* 000000001110 */ -+ 0x01, 0xe0, /* 000000011110 */ -+ 0x03, 0xe0, /* 000000111110 */ -+ 0x07, 0xe0, /* 000001111110 */ -+ 0x0f, 0xe0, /* 000011111110 */ -+ 0x1f, 0xe0, /* 000111111110 */ -+ 0x3f, 0xe0, /* 001111111110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x3f, 0xe0, /* 001111111110 */ -+ 0x1f, 0xe0, /* 000111111110 */ -+ 0x0f, 0xe0, /* 000011111110 */ -+ 0x07, 0xe0, /* 000001111110 */ -+ 0x03, 0xe0, /* 000000111110 */ -+ 0x01, 0xe0, /* 000000011110 */ -+ 0x00, 0xe0, /* 000000001110 */ -+ 0x00, 0x60, /* 000000000110 */ -+ 0x00, 0x20, /* 000000000010 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 17 0x11 '^Q' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x40, 0x00, /* 010000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x70, 0x00, /* 011100000000 */ -+ 0x78, 0x00, /* 011110000000 */ -+ 0x7c, 0x00, /* 011111000000 */ -+ 0x7e, 0x00, /* 011111100000 */ -+ 0x7f, 0x00, /* 011111110000 */ -+ 0x7f, 0x80, /* 011111111000 */ -+ 0x7f, 0xc0, /* 011111111100 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x7f, 0xc0, /* 011111111100 */ -+ 0x7f, 0x80, /* 011111111000 */ -+ 0x7f, 0x00, /* 011111110000 */ -+ 0x7e, 0x00, /* 011111100000 */ -+ 0x7c, 0x00, /* 011111000000 */ -+ 0x78, 0x00, /* 011110000000 */ -+ 0x70, 0x00, /* 011100000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x40, 0x00, /* 010000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 18 0x12 '^R' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x04, 0x00, /* 000001000000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x3f, 0x80, /* 001111111000 */ -+ 0x7f, 0xc0, /* 011111111100 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x7f, 0xc0, /* 011111111100 */ -+ 0x3f, 0x80, /* 001111111000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x04, 0x00, /* 000001000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 19 0x13 '^S' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 20 0x14 '^T' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1f, 0xf0, /* 000111111111 */ -+ 0x3c, 0xc0, /* 001111001100 */ -+ 0x7c, 0xc0, /* 011111001100 */ -+ 0x7c, 0xc0, /* 011111001100 */ -+ 0x7c, 0xc0, /* 011111001100 */ -+ 0x3c, 0xc0, /* 001111001100 */ -+ 0x1c, 0xc0, /* 000111001100 */ -+ 0x0c, 0xc0, /* 000011001100 */ -+ 0x0c, 0xc0, /* 000011001100 */ -+ 0x0c, 0xc0, /* 000011001100 */ -+ 0x0c, 0xc0, /* 000011001100 */ -+ 0x0c, 0xc0, /* 000011001100 */ -+ 0x0c, 0xc0, /* 000011001100 */ -+ 0x1c, 0xe0, /* 000111001110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 21 0x15 '^U' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 22 0x16 '^V' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 23 0x17 '^W' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x04, 0x00, /* 000001000000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x3f, 0x80, /* 001111111000 */ -+ 0x7f, 0xc0, /* 011111111100 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x7f, 0xc0, /* 011111111100 */ -+ 0x3f, 0x80, /* 001111111000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x04, 0x00, /* 000001000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 24 0x18 '^X' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x04, 0x00, /* 000001000000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x3f, 0x80, /* 001111111000 */ -+ 0x7f, 0xc0, /* 011111111100 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 25 0x19 '^Y' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x7f, 0xc0, /* 011111111100 */ -+ 0x3f, 0x80, /* 001111111000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x04, 0x00, /* 000001000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 26 0x1a '^Z' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x08, 0x00, /* 000010000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x38, 0x00, /* 001110000000 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0xff, 0xe0, /* 111111111110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x38, 0x00, /* 001110000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x08, 0x00, /* 000010000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 27 0x1b '^[' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x01, 0x00, /* 000000010000 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x01, 0xc0, /* 000000011100 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x7f, 0xf0, /* 011111111111 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x01, 0xc0, /* 000000011100 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x01, 0x00, /* 000000010000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 28 0x1c '^\' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x3f, 0xe0, /* 001111111110 */ -+ 0x3f, 0xe0, /* 001111111110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 29 0x1d '^]' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x09, 0x00, /* 000010010000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x39, 0xc0, /* 001110011100 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x39, 0xc0, /* 001110011100 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x09, 0x00, /* 000010010000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 30 0x1e '^^' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x04, 0x00, /* 000001000000 */ -+ 0x04, 0x00, /* 000001000000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x3f, 0x80, /* 001111111000 */ -+ 0x3f, 0x80, /* 001111111000 */ -+ 0x7f, 0xc0, /* 011111111100 */ -+ 0x7f, 0xc0, /* 011111111100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 31 0x1f '^_' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x7f, 0xc0, /* 011111111100 */ -+ 0x7f, 0xc0, /* 011111111100 */ -+ 0x3f, 0x80, /* 001111111000 */ -+ 0x3f, 0x80, /* 001111111000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x04, 0x00, /* 000001000000 */ -+ 0x04, 0x00, /* 000001000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 32 0x20 ' ' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 33 0x21 '!' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 34 0x22 '"' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 35 0x23 '#' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x03, 0x30, /* 000000110011 */ -+ 0x03, 0x30, /* 000000110011 */ -+ 0x03, 0x30, /* 000000110011 */ -+ 0x06, 0x60, /* 000001100110 */ -+ 0x1f, 0xf0, /* 000111111111 */ -+ 0x1f, 0xf0, /* 000111111111 */ -+ 0x0c, 0xc0, /* 000011001100 */ -+ 0x0c, 0xc0, /* 000011001100 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x7f, 0xc0, /* 011111111100 */ -+ 0x7f, 0xc0, /* 011111111100 */ -+ 0x33, 0x00, /* 001100110000 */ -+ 0x66, 0x00, /* 011001100000 */ -+ 0x66, 0x00, /* 011001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 36 0x24 '$' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x66, 0xe0, /* 011001101110 */ -+ 0x66, 0x60, /* 011001100110 */ -+ 0x66, 0x00, /* 011001100000 */ -+ 0x3e, 0x00, /* 001111100000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x07, 0xc0, /* 000001111100 */ -+ 0x06, 0x60, /* 000001100110 */ -+ 0x06, 0x60, /* 000001100110 */ -+ 0x66, 0x60, /* 011001100110 */ -+ 0x7f, 0xc0, /* 011111111100 */ -+ 0x3f, 0x80, /* 001111111000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 37 0x25 '%' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x38, 0xc0, /* 001110001100 */ -+ 0x4c, 0xc0, /* 010011001100 */ -+ 0x45, 0x80, /* 010001011000 */ -+ 0x65, 0x80, /* 011001011000 */ -+ 0x3b, 0x00, /* 001110110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0d, 0xc0, /* 000011011100 */ -+ 0x1a, 0x60, /* 000110100110 */ -+ 0x1a, 0x20, /* 000110100010 */ -+ 0x33, 0x20, /* 001100110010 */ -+ 0x31, 0xc0, /* 001100011100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 38 0x26 '&' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x07, 0x00, /* 000001110000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x18, 0xc0, /* 000110001100 */ -+ 0x18, 0xc0, /* 000110001100 */ -+ 0x18, 0xc0, /* 000110001100 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x3e, 0x00, /* 001111100000 */ -+ 0x77, 0x00, /* 011101110000 */ -+ 0x63, 0x60, /* 011000110110 */ -+ 0x61, 0xe0, /* 011000011110 */ -+ 0x61, 0xc0, /* 011000011100 */ -+ 0x61, 0x80, /* 011000011000 */ -+ 0x3f, 0xe0, /* 001111111110 */ -+ 0x1e, 0x60, /* 000111100110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 39 0x27 ''' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x10, 0x00, /* 000100000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 40 0x28 '(' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 41 0x29 ')' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 42 0x2a '*' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x66, 0x60, /* 011001100110 */ -+ 0x76, 0xe0, /* 011101101110 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x76, 0xe0, /* 011101101110 */ -+ 0x66, 0x60, /* 011001100110 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 43 0x2b '+' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 44 0x2c ',' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x10, 0x00, /* 000100000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 45 0x2d '-' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 46 0x2e '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 47 0x2f '/' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x60, /* 000000000110 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 48 0x30 '0' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x07, 0x00, /* 000001110000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x11, 0x80, /* 000100011000 */ -+ 0x10, 0xc0, /* 000100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0x80, /* 001100001000 */ -+ 0x18, 0x80, /* 000110001000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 49 0x31 '1' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x02, 0x00, /* 000000100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x36, 0x00, /* 001101100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 50 0x32 '2' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x3f, 0x80, /* 001111111000 */ -+ 0x61, 0xc0, /* 011000011100 */ -+ 0x40, 0xc0, /* 010000001100 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x30, 0x20, /* 001100000010 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 51 0x33 '3' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x1f, 0xc0, /* 000111111100 */ -+ 0x20, 0xe0, /* 001000001110 */ -+ 0x40, 0x60, /* 010000000110 */ -+ 0x00, 0x60, /* 000000000110 */ -+ 0x00, 0xe0, /* 000000001110 */ -+ 0x07, 0xc0, /* 000001111100 */ -+ 0x0f, 0xc0, /* 000011111100 */ -+ 0x00, 0xe0, /* 000000001110 */ -+ 0x00, 0x60, /* 000000000110 */ -+ 0x00, 0x60, /* 000000000110 */ -+ 0x40, 0x60, /* 010000000110 */ -+ 0x60, 0x40, /* 011000000100 */ -+ 0x3f, 0x80, /* 001111111000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 52 0x34 '4' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x03, 0x80, /* 000000111000 */ -+ 0x03, 0x80, /* 000000111000 */ -+ 0x05, 0x80, /* 000001011000 */ -+ 0x05, 0x80, /* 000001011000 */ -+ 0x09, 0x80, /* 000010011000 */ -+ 0x09, 0x80, /* 000010011000 */ -+ 0x11, 0x80, /* 000100011000 */ -+ 0x11, 0x80, /* 000100011000 */ -+ 0x21, 0x80, /* 001000011000 */ -+ 0x3f, 0xe0, /* 001111111110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 53 0x35 '5' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0xc0, /* 000011111100 */ -+ 0x0f, 0xc0, /* 000011111100 */ -+ 0x10, 0x00, /* 000100000000 */ -+ 0x10, 0x00, /* 000100000000 */ -+ 0x20, 0x00, /* 001000000000 */ -+ 0x3f, 0x80, /* 001111111000 */ -+ 0x31, 0xc0, /* 001100011100 */ -+ 0x00, 0xe0, /* 000000001110 */ -+ 0x00, 0x60, /* 000000000110 */ -+ 0x00, 0x60, /* 000000000110 */ -+ 0x00, 0x60, /* 000000000110 */ -+ 0x40, 0x60, /* 010000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 54 0x36 '6' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x07, 0x00, /* 000001110000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x67, 0x80, /* 011001111000 */ -+ 0x6f, 0xc0, /* 011011111100 */ -+ 0x70, 0xe0, /* 011100001110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x70, 0x40, /* 011100000100 */ -+ 0x3f, 0x80, /* 001111111000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 55 0x37 '7' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1f, 0xe0, /* 000111111110 */ -+ 0x3f, 0xe0, /* 001111111110 */ -+ 0x60, 0x40, /* 011000000100 */ -+ 0x00, 0x40, /* 000000000100 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x00, 0x80, /* 000000001000 */ -+ 0x00, 0x80, /* 000000001000 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x01, 0x00, /* 000000010000 */ -+ 0x01, 0x00, /* 000000010000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x02, 0x00, /* 000000100000 */ -+ 0x02, 0x00, /* 000000100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x04, 0x00, /* 000001000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 56 0x38 '8' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x11, 0x80, /* 000100011000 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x18, 0x80, /* 000110001000 */ -+ 0x0d, 0x00, /* 000011010000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0b, 0x00, /* 000010110000 */ -+ 0x11, 0x80, /* 000100011000 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x18, 0x80, /* 000110001000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 57 0x39 '9' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x11, 0xc0, /* 000100011100 */ -+ 0x20, 0xe0, /* 001000001110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x70, 0xe0, /* 011100001110 */ -+ 0x3f, 0x60, /* 001111110110 */ -+ 0x1e, 0x60, /* 000111100110 */ -+ 0x00, 0x60, /* 000000000110 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x07, 0x00, /* 000001110000 */ -+ 0x3c, 0x00, /* 001111000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 58 0x3a ':' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 59 0x3b ';' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x10, 0x00, /* 000100000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 60 0x3c '<' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x60, /* 000000000110 */ -+ 0x01, 0xc0, /* 000000011100 */ -+ 0x07, 0x00, /* 000001110000 */ -+ 0x1c, 0x00, /* 000111000000 */ -+ 0x70, 0x00, /* 011100000000 */ -+ 0x70, 0x00, /* 011100000000 */ -+ 0x1c, 0x00, /* 000111000000 */ -+ 0x07, 0x00, /* 000001110000 */ -+ 0x01, 0xc0, /* 000000011100 */ -+ 0x00, 0x60, /* 000000000110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 61 0x3d '=' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 62 0x3e '>' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x38, 0x00, /* 001110000000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x03, 0x80, /* 000000111000 */ -+ 0x00, 0xe0, /* 000000001110 */ -+ 0x00, 0xe0, /* 000000001110 */ -+ 0x03, 0x80, /* 000000111000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x38, 0x00, /* 001110000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 63 0x3f '?' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x39, 0xc0, /* 001110011100 */ -+ 0x20, 0xc0, /* 001000001100 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 64 0x40 '@' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x30, 0x60, /* 001100000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x67, 0x20, /* 011001110010 */ -+ 0x6f, 0xa0, /* 011011111010 */ -+ 0x6c, 0xa0, /* 011011001010 */ -+ 0x6c, 0xa0, /* 011011001010 */ -+ 0x67, 0xe0, /* 011001111110 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x3f, 0xe0, /* 001111111110 */ -+ 0x0f, 0xe0, /* 000011111110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 65 0x41 'A' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0b, 0x00, /* 000010110000 */ -+ 0x0b, 0x00, /* 000010110000 */ -+ 0x09, 0x00, /* 000010010000 */ -+ 0x11, 0x80, /* 000100011000 */ -+ 0x11, 0x80, /* 000100011000 */ -+ 0x10, 0x80, /* 000100001000 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x20, 0xc0, /* 001000001100 */ -+ 0x20, 0x40, /* 001000000100 */ -+ 0x40, 0x60, /* 010000000110 */ -+ 0x40, 0x60, /* 010000000110 */ -+ 0xe0, 0xf0, /* 111000001111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 66 0x42 'B' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xff, 0x00, /* 111111110000 */ -+ 0x60, 0x80, /* 011000001000 */ -+ 0x60, 0xc0, /* 011000001100 */ -+ 0x60, 0xc0, /* 011000001100 */ -+ 0x60, 0xc0, /* 011000001100 */ -+ 0x61, 0x80, /* 011000011000 */ -+ 0x7f, 0x80, /* 011111111000 */ -+ 0x60, 0xc0, /* 011000001100 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0xc0, /* 011000001100 */ -+ 0xff, 0x80, /* 111111111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 67 0x43 'C' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0xc0, /* 000011111100 */ -+ 0x10, 0x60, /* 000100000110 */ -+ 0x20, 0x20, /* 001000000010 */ -+ 0x20, 0x00, /* 001000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x20, 0x00, /* 001000000000 */ -+ 0x30, 0x20, /* 001100000010 */ -+ 0x18, 0x40, /* 000110000100 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 68 0x44 'D' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xff, 0x00, /* 111111110000 */ -+ 0x61, 0xc0, /* 011000011100 */ -+ 0x60, 0xc0, /* 011000001100 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x40, /* 011000000100 */ -+ 0x61, 0x80, /* 011000011000 */ -+ 0xfe, 0x00, /* 111111100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 69 0x45 'E' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x7f, 0xc0, /* 011111111100 */ -+ 0x30, 0x40, /* 001100000100 */ -+ 0x30, 0x40, /* 001100000100 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x80, /* 001100001000 */ -+ 0x3f, 0x80, /* 001111111000 */ -+ 0x30, 0x80, /* 001100001000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x20, /* 001100000010 */ -+ 0x30, 0x20, /* 001100000010 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 70 0x46 'F' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x7f, 0xc0, /* 011111111100 */ -+ 0x30, 0x40, /* 001100000100 */ -+ 0x30, 0x40, /* 001100000100 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x80, /* 001100001000 */ -+ 0x3f, 0x80, /* 001111111000 */ -+ 0x30, 0x80, /* 001100001000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x78, 0x00, /* 011110000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 71 0x47 'G' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0xc0, /* 000011111100 */ -+ 0x10, 0x60, /* 000100000110 */ -+ 0x20, 0x20, /* 001000000010 */ -+ 0x20, 0x00, /* 001000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x61, 0xf0, /* 011000011111 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x20, 0x60, /* 001000000110 */ -+ 0x30, 0x60, /* 001100000110 */ -+ 0x18, 0x60, /* 000110000110 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 72 0x48 'H' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xf0, 0xf0, /* 111100001111 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0xf0, 0xf0, /* 111100001111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 73 0x49 'I' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 74 0x4a 'J' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x04, 0x00, /* 000001000000 */ -+ 0x38, 0x00, /* 001110000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 75 0x4b 'K' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xf0, 0xe0, /* 111100001110 */ -+ 0x61, 0x80, /* 011000011000 */ -+ 0x63, 0x00, /* 011000110000 */ -+ 0x66, 0x00, /* 011001100000 */ -+ 0x6c, 0x00, /* 011011000000 */ -+ 0x78, 0x00, /* 011110000000 */ -+ 0x78, 0x00, /* 011110000000 */ -+ 0x7c, 0x00, /* 011111000000 */ -+ 0x6e, 0x00, /* 011011100000 */ -+ 0x67, 0x00, /* 011001110000 */ -+ 0x63, 0x80, /* 011000111000 */ -+ 0x61, 0xc0, /* 011000011100 */ -+ 0x60, 0xe0, /* 011000001110 */ -+ 0xf0, 0x70, /* 111100000111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 76 0x4c 'L' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x78, 0x00, /* 011110000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x20, /* 001100000010 */ -+ 0x30, 0x20, /* 001100000010 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 77 0x4d 'M' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xe0, 0x70, /* 111000000111 */ -+ 0x60, 0xe0, /* 011000001110 */ -+ 0x70, 0xe0, /* 011100001110 */ -+ 0x70, 0xe0, /* 011100001110 */ -+ 0x70, 0xe0, /* 011100001110 */ -+ 0x59, 0x60, /* 010110010110 */ -+ 0x59, 0x60, /* 010110010110 */ -+ 0x59, 0x60, /* 010110010110 */ -+ 0x4d, 0x60, /* 010011010110 */ -+ 0x4e, 0x60, /* 010011100110 */ -+ 0x4e, 0x60, /* 010011100110 */ -+ 0x44, 0x60, /* 010001000110 */ -+ 0x44, 0x60, /* 010001000110 */ -+ 0xe4, 0xf0, /* 111001001111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 78 0x4e 'N' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xc0, 0x70, /* 110000000111 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x70, 0x20, /* 011100000010 */ -+ 0x78, 0x20, /* 011110000010 */ -+ 0x58, 0x20, /* 010110000010 */ -+ 0x4c, 0x20, /* 010011000010 */ -+ 0x46, 0x20, /* 010001100010 */ -+ 0x47, 0x20, /* 010001110010 */ -+ 0x43, 0x20, /* 010000110010 */ -+ 0x41, 0xa0, /* 010000011010 */ -+ 0x40, 0xe0, /* 010000001110 */ -+ 0x40, 0xe0, /* 010000001110 */ -+ 0x40, 0x60, /* 010000000110 */ -+ 0xe0, 0x30, /* 111000000011 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 79 0x4f 'O' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x11, 0xc0, /* 000100011100 */ -+ 0x20, 0xc0, /* 001000001100 */ -+ 0x20, 0x60, /* 001000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x20, 0x40, /* 001000000100 */ -+ 0x30, 0x40, /* 001100000100 */ -+ 0x18, 0x80, /* 000110001000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 80 0x50 'P' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x7f, 0x80, /* 011111111000 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0x60, /* 001100000110 */ -+ 0x30, 0x60, /* 001100000110 */ -+ 0x30, 0x60, /* 001100000110 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x37, 0x80, /* 001101111000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x78, 0x00, /* 011110000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 81 0x51 'Q' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x11, 0xc0, /* 000100011100 */ -+ 0x20, 0xc0, /* 001000001100 */ -+ 0x20, 0x60, /* 001000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x30, 0x40, /* 001100000100 */ -+ 0x38, 0x40, /* 001110000100 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x23, 0x90, /* 001000111001 */ -+ 0x01, 0xe0, /* 000000011110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 82 0x52 'R' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xff, 0x00, /* 111111110000 */ -+ 0x61, 0x80, /* 011000011000 */ -+ 0x60, 0xc0, /* 011000001100 */ -+ 0x60, 0xc0, /* 011000001100 */ -+ 0x60, 0xc0, /* 011000001100 */ -+ 0x60, 0x80, /* 011000001000 */ -+ 0x7f, 0x00, /* 011111110000 */ -+ 0x7c, 0x00, /* 011111000000 */ -+ 0x6e, 0x00, /* 011011100000 */ -+ 0x67, 0x00, /* 011001110000 */ -+ 0x63, 0x80, /* 011000111000 */ -+ 0x61, 0xc0, /* 011000011100 */ -+ 0x60, 0xe0, /* 011000001110 */ -+ 0xf0, 0x70, /* 111100000111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 83 0x53 'S' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1f, 0xe0, /* 000111111110 */ -+ 0x30, 0x60, /* 001100000110 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x70, 0x00, /* 011100000000 */ -+ 0x3c, 0x00, /* 001111000000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x07, 0x80, /* 000001111000 */ -+ 0x01, 0xc0, /* 000000011100 */ -+ 0x00, 0xe0, /* 000000001110 */ -+ 0x40, 0x60, /* 010000000110 */ -+ 0x40, 0x60, /* 010000000110 */ -+ 0x60, 0xc0, /* 011000001100 */ -+ 0x7f, 0x80, /* 011111111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 84 0x54 'T' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x46, 0x20, /* 010001100010 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 85 0x55 'U' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xf0, 0x70, /* 111100000111 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x70, 0x40, /* 011100000100 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 86 0x56 'V' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xe0, 0xe0, /* 111000001110 */ -+ 0x60, 0x40, /* 011000000100 */ -+ 0x30, 0x80, /* 001100001000 */ -+ 0x30, 0x80, /* 001100001000 */ -+ 0x30, 0x80, /* 001100001000 */ -+ 0x19, 0x00, /* 000110010000 */ -+ 0x19, 0x00, /* 000110010000 */ -+ 0x19, 0x00, /* 000110010000 */ -+ 0x0a, 0x00, /* 000010100000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x04, 0x00, /* 000001000000 */ -+ 0x04, 0x00, /* 000001000000 */ -+ 0x04, 0x00, /* 000001000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 87 0x57 'W' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xfe, 0xf0, /* 111111101111 */ -+ 0x66, 0x20, /* 011001100010 */ -+ 0x66, 0x20, /* 011001100010 */ -+ 0x66, 0x20, /* 011001100010 */ -+ 0x76, 0x20, /* 011101100010 */ -+ 0x77, 0x40, /* 011101110100 */ -+ 0x33, 0x40, /* 001100110100 */ -+ 0x37, 0x40, /* 001101110100 */ -+ 0x3b, 0xc0, /* 001110111100 */ -+ 0x3b, 0x80, /* 001110111000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 88 0x58 'X' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xf0, 0x70, /* 111100000111 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x30, 0x40, /* 001100000100 */ -+ 0x38, 0x80, /* 001110001000 */ -+ 0x18, 0x80, /* 000110001000 */ -+ 0x0d, 0x00, /* 000011010000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0b, 0x00, /* 000010110000 */ -+ 0x11, 0x80, /* 000100011000 */ -+ 0x11, 0xc0, /* 000100011100 */ -+ 0x20, 0xc0, /* 001000001100 */ -+ 0x40, 0x60, /* 010000000110 */ -+ 0xe0, 0xf0, /* 111000001111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 89 0x59 'Y' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xf0, 0x70, /* 111100000111 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x30, 0x40, /* 001100000100 */ -+ 0x18, 0x80, /* 000110001000 */ -+ 0x18, 0x80, /* 000110001000 */ -+ 0x0d, 0x00, /* 000011010000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 90 0x5a 'Z' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x3f, 0xe0, /* 001111111110 */ -+ 0x20, 0xc0, /* 001000001100 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x18, 0x20, /* 000110000010 */ -+ 0x3f, 0xe0, /* 001111111110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 91 0x5b '[' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 92 0x5c '\' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x00, 0x60, /* 000000000110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 93 0x5d ']' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 94 0x5e '^' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x04, 0x00, /* 000001000000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x1b, 0x00, /* 000110110000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x60, 0xc0, /* 011000001100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 95 0x5f '_' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 96 0x60 '`' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x01, 0x00, /* 000000010000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x07, 0x80, /* 000001111000 */ -+ 0x07, 0x80, /* 000001111000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 97 0x61 'a' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x18, 0xc0, /* 000110001100 */ -+ 0x10, 0xc0, /* 000100001100 */ -+ 0x03, 0xc0, /* 000000111100 */ -+ 0x1c, 0xc0, /* 000111001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x39, 0xc0, /* 001110011100 */ -+ 0x1e, 0xe0, /* 000111101110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 98 0x62 'b' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x20, 0x00, /* 001000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0xe0, 0x00, /* 111000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x67, 0x80, /* 011001111000 */ -+ 0x6f, 0xc0, /* 011011111100 */ -+ 0x70, 0xe0, /* 011100001110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x70, 0x60, /* 011100000110 */ -+ 0x78, 0xc0, /* 011110001100 */ -+ 0x4f, 0x80, /* 010011111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 99 0x63 'c' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x31, 0xc0, /* 001100011100 */ -+ 0x20, 0xc0, /* 001000001100 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x70, 0x40, /* 011100000100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 100 0x64 'd' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x60, /* 000000000110 */ -+ 0x00, 0xe0, /* 000000001110 */ -+ 0x00, 0x60, /* 000000000110 */ -+ 0x00, 0x60, /* 000000000110 */ -+ 0x00, 0x60, /* 000000000110 */ -+ 0x0f, 0x60, /* 000011110110 */ -+ 0x31, 0xe0, /* 001100011110 */ -+ 0x20, 0xe0, /* 001000001110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x70, 0xe0, /* 011100001110 */ -+ 0x39, 0x60, /* 001110010110 */ -+ 0x1e, 0x70, /* 000111100111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 101 0x65 'e' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x18, 0x60, /* 000110000110 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 102 0x66 'f' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x03, 0x80, /* 000000111000 */ -+ 0x04, 0xc0, /* 000001001100 */ -+ 0x04, 0xc0, /* 000001001100 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x3f, 0x80, /* 001111111000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 103 0x67 'g' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1f, 0x20, /* 000111110010 */ -+ 0x31, 0xe0, /* 001100011110 */ -+ 0x60, 0xc0, /* 011000001100 */ -+ 0x60, 0xc0, /* 011000001100 */ -+ 0x60, 0xc0, /* 011000001100 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x3f, 0x00, /* 001111110000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x7f, 0xc0, /* 011111111100 */ -+ 0x3f, 0xe0, /* 001111111110 */ -+ 0x20, 0x60, /* 001000000110 */ -+ 0x40, 0x20, /* 010000000010 */ -+ 0x40, 0x20, /* 010000000010 */ -+ 0x7f, 0xc0, /* 011111111100 */ -+ 0x3f, 0x80, /* 001111111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 104 0x68 'h' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x10, 0x00, /* 000100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x70, 0x00, /* 011100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x37, 0x80, /* 001101111000 */ -+ 0x39, 0xc0, /* 001110011100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x79, 0xe0, /* 011110011110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 105 0x69 'i' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 106 0x6a 'j' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x03, 0xc0, /* 000000111100 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x20, 0xc0, /* 001000001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x38, 0x80, /* 001110001000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 107 0x6b 'k' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0xe0, 0x00, /* 111000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x61, 0xc0, /* 011000011100 */ -+ 0x63, 0x00, /* 011000110000 */ -+ 0x66, 0x00, /* 011001100000 */ -+ 0x7c, 0x00, /* 011111000000 */ -+ 0x78, 0x00, /* 011110000000 */ -+ 0x7c, 0x00, /* 011111000000 */ -+ 0x6e, 0x00, /* 011011100000 */ -+ 0x67, 0x00, /* 011001110000 */ -+ 0x63, 0x80, /* 011000111000 */ -+ 0xf1, 0xe0, /* 111100011110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 108 0x6c 'l' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 109 0x6d 'm' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xdd, 0xc0, /* 110111011100 */ -+ 0x6e, 0xe0, /* 011011101110 */ -+ 0x66, 0x60, /* 011001100110 */ -+ 0x66, 0x60, /* 011001100110 */ -+ 0x66, 0x60, /* 011001100110 */ -+ 0x66, 0x60, /* 011001100110 */ -+ 0x66, 0x60, /* 011001100110 */ -+ 0x66, 0x60, /* 011001100110 */ -+ 0x66, 0x60, /* 011001100110 */ -+ 0xef, 0x70, /* 111011110111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 110 0x6e 'n' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x27, 0x80, /* 001001111000 */ -+ 0x79, 0xc0, /* 011110011100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x79, 0xe0, /* 011110011110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 111 0x6f 'o' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x11, 0xc0, /* 000100011100 */ -+ 0x20, 0xe0, /* 001000001110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x70, 0x40, /* 011100000100 */ -+ 0x38, 0x80, /* 001110001000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 112 0x70 'p' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xef, 0x80, /* 111011111000 */ -+ 0x71, 0xc0, /* 011100011100 */ -+ 0x60, 0xe0, /* 011000001110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x40, /* 011000000100 */ -+ 0x70, 0x80, /* 011100001000 */ -+ 0x7f, 0x00, /* 011111110000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0xf0, 0x00, /* 111100000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 113 0x71 'q' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x20, /* 000011110010 */ -+ 0x11, 0xe0, /* 000100011110 */ -+ 0x20, 0xe0, /* 001000001110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x70, 0x60, /* 011100000110 */ -+ 0x38, 0xe0, /* 001110001110 */ -+ 0x1f, 0xe0, /* 000111111110 */ -+ 0x00, 0x60, /* 000000000110 */ -+ 0x00, 0x60, /* 000000000110 */ -+ 0x00, 0x60, /* 000000000110 */ -+ 0x00, 0x60, /* 000000000110 */ -+ 0x00, 0xf0, /* 000000001111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 114 0x72 'r' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x73, 0x80, /* 011100111000 */ -+ 0x34, 0xc0, /* 001101001100 */ -+ 0x38, 0xc0, /* 001110001100 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x78, 0x00, /* 011110000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 115 0x73 's' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1f, 0xc0, /* 000111111100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0x40, /* 001100000100 */ -+ 0x38, 0x00, /* 001110000000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x07, 0x80, /* 000001111000 */ -+ 0x01, 0xc0, /* 000000011100 */ -+ 0x20, 0xc0, /* 001000001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x3f, 0x80, /* 001111111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 116 0x74 't' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x04, 0x00, /* 000001000000 */ -+ 0x04, 0x00, /* 000001000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x7f, 0xc0, /* 011111111100 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x20, /* 000011000010 */ -+ 0x0e, 0x40, /* 000011100100 */ -+ 0x07, 0x80, /* 000001111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 117 0x75 'u' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x79, 0xe0, /* 011110011110 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x39, 0xc0, /* 001110011100 */ -+ 0x1e, 0x60, /* 000111100110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 118 0x76 'v' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xf0, 0x70, /* 111100000111 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x30, 0x40, /* 001100000100 */ -+ 0x30, 0x40, /* 001100000100 */ -+ 0x18, 0x80, /* 000110001000 */ -+ 0x18, 0x80, /* 000110001000 */ -+ 0x0d, 0x00, /* 000011010000 */ -+ 0x0d, 0x00, /* 000011010000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 119 0x77 'w' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xff, 0x70, /* 111111110111 */ -+ 0x66, 0x20, /* 011001100010 */ -+ 0x66, 0x20, /* 011001100010 */ -+ 0x66, 0x20, /* 011001100010 */ -+ 0x37, 0x40, /* 001101110100 */ -+ 0x3b, 0x40, /* 001110110100 */ -+ 0x3b, 0x40, /* 001110110100 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 120 0x78 'x' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xf8, 0xf0, /* 111110001111 */ -+ 0x70, 0x40, /* 011100000100 */ -+ 0x38, 0x80, /* 001110001000 */ -+ 0x1d, 0x00, /* 000111010000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x07, 0x00, /* 000001110000 */ -+ 0x0b, 0x80, /* 000010111000 */ -+ 0x11, 0xc0, /* 000100011100 */ -+ 0x20, 0xe0, /* 001000001110 */ -+ 0xf1, 0xf0, /* 111100011111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 121 0x79 'y' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xf0, 0xf0, /* 111100001111 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x30, 0x40, /* 001100000100 */ -+ 0x30, 0x40, /* 001100000100 */ -+ 0x18, 0x80, /* 000110001000 */ -+ 0x18, 0x80, /* 000110001000 */ -+ 0x0d, 0x00, /* 000011010000 */ -+ 0x0d, 0x00, /* 000011010000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x04, 0x00, /* 000001000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x08, 0x00, /* 000010000000 */ -+ 0x78, 0x00, /* 011110000000 */ -+ 0x70, 0x00, /* 011100000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 122 0x7a 'z' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x60, 0xe0, /* 011000001110 */ -+ 0x41, 0xc0, /* 010000011100 */ -+ 0x03, 0x80, /* 000000111000 */ -+ 0x07, 0x00, /* 000001110000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x1c, 0x00, /* 000111000000 */ -+ 0x38, 0x20, /* 001110000010 */ -+ 0x70, 0x60, /* 011100000110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 123 0x7b '{' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x03, 0x80, /* 000000111000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x38, 0x00, /* 001110000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x03, 0x80, /* 000000111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 124 0x7c '|' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 125 0x7d '}' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1c, 0x00, /* 000111000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x01, 0xc0, /* 000000011100 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x1c, 0x00, /* 000111000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 126 0x7e '~' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1c, 0x20, /* 000111000010 */ -+ 0x3e, 0x60, /* 001111100110 */ -+ 0x67, 0xc0, /* 011001111100 */ -+ 0x43, 0x80, /* 010000111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 127 0x7f '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 128 0x80 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0xc0, /* 000011111100 */ -+ 0x10, 0x60, /* 000100000110 */ -+ 0x20, 0x20, /* 001000000010 */ -+ 0x20, 0x00, /* 001000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x20, 0x00, /* 001000000000 */ -+ 0x30, 0x20, /* 001100000010 */ -+ 0x18, 0x40, /* 000110000100 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 129 0x81 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x79, 0xe0, /* 011110011110 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x39, 0xc0, /* 001110011100 */ -+ 0x1e, 0x60, /* 000111100110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 130 0x82 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x18, 0x60, /* 000110000110 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 131 0x83 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x02, 0x00, /* 000000100000 */ -+ 0x07, 0x00, /* 000001110000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x18, 0xc0, /* 000110001100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x18, 0xc0, /* 000110001100 */ -+ 0x10, 0xc0, /* 000100001100 */ -+ 0x03, 0xc0, /* 000000111100 */ -+ 0x1c, 0xc0, /* 000111001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x39, 0xc0, /* 001110011100 */ -+ 0x1e, 0xe0, /* 000111101110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 132 0x84 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x18, 0xc0, /* 000110001100 */ -+ 0x10, 0xc0, /* 000100001100 */ -+ 0x03, 0xc0, /* 000000111100 */ -+ 0x1c, 0xc0, /* 000111001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x39, 0xc0, /* 001110011100 */ -+ 0x1e, 0xe0, /* 000111101110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 133 0x85 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x18, 0xc0, /* 000110001100 */ -+ 0x10, 0xc0, /* 000100001100 */ -+ 0x03, 0xc0, /* 000000111100 */ -+ 0x1c, 0xc0, /* 000111001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x39, 0xc0, /* 001110011100 */ -+ 0x1e, 0xe0, /* 000111101110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 134 0x86 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x07, 0x00, /* 000001110000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x07, 0x00, /* 000001110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x18, 0xc0, /* 000110001100 */ -+ 0x10, 0xc0, /* 000100001100 */ -+ 0x03, 0xc0, /* 000000111100 */ -+ 0x1c, 0xc0, /* 000111001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x39, 0xc0, /* 001110011100 */ -+ 0x1e, 0xe0, /* 000111101110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 135 0x87 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x31, 0xc0, /* 001100011100 */ -+ 0x20, 0xc0, /* 001000001100 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x70, 0x40, /* 011100000100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 136 0x88 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x02, 0x00, /* 000000100000 */ -+ 0x07, 0x00, /* 000001110000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x18, 0xc0, /* 000110001100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x18, 0x60, /* 000110000110 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 137 0x89 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x18, 0x60, /* 000110000110 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 138 0x8a '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x18, 0x60, /* 000110000110 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 139 0x8b '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 140 0x8c '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x04, 0x00, /* 000001000000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x1b, 0x00, /* 000110110000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 141 0x8d '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 142 0x8e '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x04, 0x00, /* 000001000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0b, 0x00, /* 000010110000 */ -+ 0x0b, 0x00, /* 000010110000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x11, 0x80, /* 000100011000 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x20, 0xc0, /* 001000001100 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x40, 0x60, /* 010000000110 */ -+ 0xe0, 0xf0, /* 111000001111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 143 0x8f '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x04, 0x00, /* 000001000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0b, 0x00, /* 000010110000 */ -+ 0x0b, 0x00, /* 000010110000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x11, 0x80, /* 000100011000 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x20, 0xc0, /* 001000001100 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x40, 0x60, /* 010000000110 */ -+ 0xe0, 0xf0, /* 111000001111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 144 0x90 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x08, 0x00, /* 000010000000 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x30, 0x20, /* 001100000010 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x80, /* 001100001000 */ -+ 0x3f, 0x80, /* 001111111000 */ -+ 0x30, 0x80, /* 001100001000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x20, /* 001100000010 */ -+ 0x30, 0x20, /* 001100000010 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 145 0x91 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x3d, 0xe0, /* 001111011110 */ -+ 0x66, 0x30, /* 011001100011 */ -+ 0x46, 0x30, /* 010001100011 */ -+ 0x06, 0x30, /* 000001100011 */ -+ 0x3f, 0xf0, /* 001111111111 */ -+ 0x66, 0x00, /* 011001100000 */ -+ 0xc6, 0x00, /* 110001100000 */ -+ 0xc6, 0x00, /* 110001100000 */ -+ 0xe7, 0x30, /* 111001110011 */ -+ 0x7d, 0xe0, /* 011111011110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 146 0x92 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x03, 0xf0, /* 000000111111 */ -+ 0x07, 0x10, /* 000001110001 */ -+ 0x07, 0x10, /* 000001110001 */ -+ 0x0b, 0x00, /* 000010110000 */ -+ 0x0b, 0x00, /* 000010110000 */ -+ 0x0b, 0x20, /* 000010110010 */ -+ 0x13, 0xe0, /* 000100111110 */ -+ 0x13, 0x20, /* 000100110010 */ -+ 0x3f, 0x00, /* 001111110000 */ -+ 0x23, 0x00, /* 001000110000 */ -+ 0x23, 0x00, /* 001000110000 */ -+ 0x43, 0x10, /* 010000110001 */ -+ 0x43, 0x10, /* 010000110001 */ -+ 0xe7, 0xf0, /* 111001111111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 147 0x93 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x02, 0x00, /* 000000100000 */ -+ 0x07, 0x00, /* 000001110000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x18, 0xc0, /* 000110001100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x11, 0xc0, /* 000100011100 */ -+ 0x20, 0xe0, /* 001000001110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x70, 0x40, /* 011100000100 */ -+ 0x38, 0x80, /* 001110001000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 148 0x94 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x11, 0xc0, /* 000100011100 */ -+ 0x20, 0xe0, /* 001000001110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x70, 0x40, /* 011100000100 */ -+ 0x38, 0x80, /* 001110001000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 149 0x95 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x11, 0xc0, /* 000100011100 */ -+ 0x20, 0xe0, /* 001000001110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x70, 0x40, /* 011100000100 */ -+ 0x38, 0x80, /* 001110001000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 150 0x96 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x02, 0x00, /* 000000100000 */ -+ 0x07, 0x00, /* 000001110000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x18, 0xc0, /* 000110001100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x79, 0xe0, /* 011110011110 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x39, 0xc0, /* 001110011100 */ -+ 0x1e, 0x60, /* 000111100110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 151 0x97 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x79, 0xe0, /* 011110011110 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x39, 0xc0, /* 001110011100 */ -+ 0x1e, 0x60, /* 000111100110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 152 0x98 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xf0, 0xf0, /* 111100001111 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x30, 0x40, /* 001100000100 */ -+ 0x30, 0x40, /* 001100000100 */ -+ 0x18, 0x80, /* 000110001000 */ -+ 0x18, 0x80, /* 000110001000 */ -+ 0x0d, 0x00, /* 000011010000 */ -+ 0x0d, 0x00, /* 000011010000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x04, 0x00, /* 000001000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x08, 0x00, /* 000010000000 */ -+ 0x78, 0x00, /* 011110000000 */ -+ 0x70, 0x00, /* 011100000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 153 0x99 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x11, 0xc0, /* 000100011100 */ -+ 0x20, 0xc0, /* 001000001100 */ -+ 0x20, 0x60, /* 001000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x20, 0x40, /* 001000000100 */ -+ 0x30, 0x40, /* 001100000100 */ -+ 0x18, 0x80, /* 000110001000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 154 0x9a '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0xe0, 0x30, /* 111000000011 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x70, 0x40, /* 011100000100 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 155 0x9b '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x36, 0xc0, /* 001101101100 */ -+ 0x26, 0xc0, /* 001001101100 */ -+ 0x66, 0x00, /* 011001100000 */ -+ 0x66, 0x00, /* 011001100000 */ -+ 0x66, 0x00, /* 011001100000 */ -+ 0x66, 0x00, /* 011001100000 */ -+ 0x76, 0x40, /* 011101100100 */ -+ 0x36, 0xc0, /* 001101101100 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 156 0x9c '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x1c, 0xc0, /* 000111001100 */ -+ 0x18, 0xc0, /* 000110001100 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x7e, 0x00, /* 011111100000 */ -+ 0x7e, 0x00, /* 011111100000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x3e, 0x20, /* 001111100010 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x61, 0xc0, /* 011000011100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 157 0x9d '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 158 0x9e '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x7f, 0x80, /* 011111111000 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0x60, /* 001100000110 */ -+ 0x30, 0x60, /* 001100000110 */ -+ 0x30, 0x60, /* 001100000110 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x37, 0x80, /* 001101111000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x33, 0x00, /* 001100110000 */ -+ 0x37, 0x80, /* 001101111000 */ -+ 0x33, 0x00, /* 001100110000 */ -+ 0x33, 0x00, /* 001100110000 */ -+ 0x33, 0x30, /* 001100110011 */ -+ 0x31, 0xe0, /* 001100011110 */ -+ 0x78, 0xc0, /* 011110001100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 159 0x9f '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x01, 0xe0, /* 000000011110 */ -+ 0x03, 0x30, /* 000000110011 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x3f, 0xe0, /* 001111111110 */ -+ 0x7f, 0xc0, /* 011111111100 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0xcc, 0x00, /* 110011000000 */ -+ 0x78, 0x00, /* 011110000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 160 0xa0 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x18, 0xc0, /* 000110001100 */ -+ 0x10, 0xc0, /* 000100001100 */ -+ 0x03, 0xc0, /* 000000111100 */ -+ 0x1c, 0xc0, /* 000111001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x39, 0xc0, /* 001110011100 */ -+ 0x1e, 0xe0, /* 000111101110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 161 0xa1 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 162 0xa2 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x11, 0xc0, /* 000100011100 */ -+ 0x20, 0xe0, /* 001000001110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x70, 0x40, /* 011100000100 */ -+ 0x38, 0x80, /* 001110001000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 163 0xa3 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x79, 0xe0, /* 011110011110 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x39, 0xc0, /* 001110011100 */ -+ 0x1e, 0x60, /* 000111100110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 164 0xa4 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1c, 0x40, /* 000111000100 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x23, 0x80, /* 001000111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x27, 0x80, /* 001001111000 */ -+ 0x79, 0xc0, /* 011110011100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x79, 0xe0, /* 011110011110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 165 0xa5 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1c, 0x40, /* 000111000100 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x23, 0x80, /* 001000111000 */ -+ 0xc0, 0x70, /* 110000000111 */ -+ 0x60, 0x20, /* 011000000010 */ -+ 0x70, 0x20, /* 011100000010 */ -+ 0x78, 0x20, /* 011110000010 */ -+ 0x5c, 0x20, /* 010111000010 */ -+ 0x4e, 0x20, /* 010011100010 */ -+ 0x47, 0x20, /* 010001110010 */ -+ 0x43, 0xa0, /* 010000111010 */ -+ 0x41, 0xe0, /* 010000011110 */ -+ 0x40, 0xe0, /* 010000001110 */ -+ 0x40, 0x60, /* 010000000110 */ -+ 0xe0, 0x30, /* 111000000011 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 166 0xa6 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x07, 0x80, /* 000001111000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x33, 0x80, /* 001100111000 */ -+ 0x1d, 0xc0, /* 000111011100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 167 0xa7 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x07, 0x00, /* 000001110000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x10, 0xc0, /* 000100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0x80, /* 001100001000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 168 0xa8 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x40, /* 001100000100 */ -+ 0x39, 0xc0, /* 001110011100 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 169 0xa9 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 170 0xaa '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 171 0xab '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x10, 0x00, /* 000100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x10, 0x00, /* 000100000000 */ -+ 0x10, 0x40, /* 000100000100 */ -+ 0x10, 0x80, /* 000100001000 */ -+ 0x11, 0x00, /* 000100010000 */ -+ 0x3a, 0x00, /* 001110100000 */ -+ 0x05, 0xc0, /* 000001011100 */ -+ 0x0a, 0x20, /* 000010100010 */ -+ 0x10, 0x20, /* 000100000010 */ -+ 0x20, 0xc0, /* 001000001100 */ -+ 0x41, 0x00, /* 010000010000 */ -+ 0x02, 0x00, /* 000000100000 */ -+ 0x03, 0xe0, /* 000000111110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 172 0xac '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x10, 0x00, /* 000100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x10, 0x00, /* 000100000000 */ -+ 0x10, 0x40, /* 000100000100 */ -+ 0x10, 0x80, /* 000100001000 */ -+ 0x11, 0x00, /* 000100010000 */ -+ 0x3a, 0x40, /* 001110100100 */ -+ 0x04, 0xc0, /* 000001001100 */ -+ 0x09, 0x40, /* 000010010100 */ -+ 0x12, 0x40, /* 000100100100 */ -+ 0x24, 0x40, /* 001001000100 */ -+ 0x47, 0xe0, /* 010001111110 */ -+ 0x00, 0x40, /* 000000000100 */ -+ 0x00, 0x40, /* 000000000100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 173 0xad '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 174 0xae '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x06, 0x60, /* 000001100110 */ -+ 0x0c, 0xc0, /* 000011001100 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x33, 0x00, /* 001100110000 */ -+ 0x66, 0x00, /* 011001100000 */ -+ 0x33, 0x00, /* 001100110000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x0c, 0xc0, /* 000011001100 */ -+ 0x06, 0x60, /* 000001100110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 175 0xaf '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x66, 0x00, /* 011001100000 */ -+ 0x33, 0x00, /* 001100110000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x0c, 0xc0, /* 000011001100 */ -+ 0x06, 0x60, /* 000001100110 */ -+ 0x0c, 0xc0, /* 000011001100 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x33, 0x00, /* 001100110000 */ -+ 0x66, 0x00, /* 011001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 176 0xb0 '.' */ -+ 0x0c, 0x30, /* 000011000011 */ -+ 0x08, 0x20, /* 000010000010 */ -+ 0x61, 0x80, /* 011000011000 */ -+ 0x20, 0x80, /* 001000001000 */ -+ 0x0c, 0x30, /* 000011000011 */ -+ 0x08, 0x20, /* 000010000010 */ -+ 0x61, 0x80, /* 011000011000 */ -+ 0x20, 0x80, /* 001000001000 */ -+ 0x0c, 0x30, /* 000011000011 */ -+ 0x08, 0x20, /* 000010000010 */ -+ 0x61, 0x80, /* 011000011000 */ -+ 0x20, 0x80, /* 001000001000 */ -+ 0x0c, 0x30, /* 000011000011 */ -+ 0x08, 0x20, /* 000010000010 */ -+ 0x61, 0x80, /* 011000011000 */ -+ 0x20, 0x80, /* 001000001000 */ -+ 0x0c, 0x30, /* 000011000011 */ -+ 0x08, 0x20, /* 000010000010 */ -+ 0x61, 0x80, /* 011000011000 */ -+ 0x20, 0x80, /* 001000001000 */ -+ 0x0c, 0x30, /* 000011000011 */ -+ 0x08, 0x20, /* 000010000010 */ -+ -+ /* 177 0xb1 '.' */ -+ 0x77, 0x70, /* 011101110111 */ -+ 0x22, 0x20, /* 001000100010 */ -+ 0x88, 0x80, /* 100010001000 */ -+ 0xdd, 0xd0, /* 110111011101 */ -+ 0x88, 0x80, /* 100010001000 */ -+ 0x22, 0x20, /* 001000100010 */ -+ 0x77, 0x70, /* 011101110111 */ -+ 0x22, 0x20, /* 001000100010 */ -+ 0x88, 0x80, /* 100010001000 */ -+ 0xdd, 0xd0, /* 110111011101 */ -+ 0x88, 0x80, /* 100010001000 */ -+ 0x22, 0x20, /* 001000100010 */ -+ 0x77, 0x70, /* 011101110111 */ -+ 0x22, 0x20, /* 001000100010 */ -+ 0x88, 0x80, /* 100010001000 */ -+ 0xdd, 0xd0, /* 110111011101 */ -+ 0x88, 0x80, /* 100010001000 */ -+ 0x22, 0x20, /* 001000100010 */ -+ 0x77, 0x70, /* 011101110111 */ -+ 0x22, 0x20, /* 001000100010 */ -+ 0x88, 0x80, /* 100010001000 */ -+ 0xdd, 0xd0, /* 110111011101 */ -+ -+ /* 178 0xb2 '.' */ -+ 0xf3, 0xc0, /* 111100111100 */ -+ 0xf7, 0xd0, /* 111101111101 */ -+ 0x9e, 0x70, /* 100111100111 */ -+ 0xdf, 0x70, /* 110111110111 */ -+ 0xf3, 0xc0, /* 111100111100 */ -+ 0xf7, 0xd0, /* 111101111101 */ -+ 0x9e, 0x70, /* 100111100111 */ -+ 0xdf, 0x70, /* 110111110111 */ -+ 0xf3, 0xc0, /* 111100111100 */ -+ 0xf7, 0xd0, /* 111101111101 */ -+ 0x9e, 0x70, /* 100111100111 */ -+ 0xdf, 0x70, /* 110111110111 */ -+ 0xf3, 0xc0, /* 111100111100 */ -+ 0xf7, 0xd0, /* 111101111101 */ -+ 0x9e, 0x70, /* 100111100111 */ -+ 0xdf, 0x70, /* 110111110111 */ -+ 0xf3, 0xc0, /* 111100111100 */ -+ 0xf7, 0xd0, /* 111101111101 */ -+ 0x9e, 0x70, /* 100111100111 */ -+ 0xdf, 0x70, /* 110111110111 */ -+ 0xf3, 0xc0, /* 111100111100 */ -+ 0xf7, 0xd0, /* 111101111101 */ -+ -+ /* 179 0xb3 '.' */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ -+ /* 180 0xb4 '.' */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0xfe, 0x00, /* 111111100000 */ -+ 0xfe, 0x00, /* 111111100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ -+ /* 181 0xb5 '.' */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0xfe, 0x00, /* 111111100000 */ -+ 0xfe, 0x00, /* 111111100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0xfe, 0x00, /* 111111100000 */ -+ 0xfe, 0x00, /* 111111100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ -+ /* 182 0xb6 '.' */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0xfd, 0x80, /* 111111011000 */ -+ 0xfd, 0x80, /* 111111011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ -+ /* 183 0xb7 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xff, 0x80, /* 111111111000 */ -+ 0xff, 0x80, /* 111111111000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ -+ /* 184 0xb8 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xfe, 0x00, /* 111111100000 */ -+ 0xfe, 0x00, /* 111111100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0xfe, 0x00, /* 111111100000 */ -+ 0xfe, 0x00, /* 111111100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ -+ /* 185 0xb9 '.' */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0xfd, 0x80, /* 111111011000 */ -+ 0xfd, 0x80, /* 111111011000 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0xfd, 0x80, /* 111111011000 */ -+ 0xfd, 0x80, /* 111111011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ -+ /* 186 0xba '.' */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ -+ /* 187 0xbb '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xff, 0x80, /* 111111111000 */ -+ 0xff, 0x80, /* 111111111000 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0xfd, 0x80, /* 111111011000 */ -+ 0xfd, 0x80, /* 111111011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ -+ /* 188 0xbc '.' */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0xfd, 0x80, /* 111111011000 */ -+ 0xfd, 0x80, /* 111111011000 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0xff, 0x80, /* 111111111000 */ -+ 0xff, 0x80, /* 111111111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 189 0xbd '.' */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0xff, 0x80, /* 111111111000 */ -+ 0xff, 0x80, /* 111111111000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 190 0xbe '.' */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0xfe, 0x00, /* 111111100000 */ -+ 0xfe, 0x00, /* 111111100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0xfe, 0x00, /* 111111100000 */ -+ 0xfe, 0x00, /* 111111100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 191 0xbf '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xfe, 0x00, /* 111111100000 */ -+ 0xfe, 0x00, /* 111111100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ -+ /* 192 0xc0 '.' */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x07, 0xf0, /* 000001111111 */ -+ 0x07, 0xf0, /* 000001111111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 193 0xc1 '.' */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 194 0xc2 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ -+ /* 195 0xc3 '.' */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x07, 0xf0, /* 000001111111 */ -+ 0x07, 0xf0, /* 000001111111 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ -+ /* 196 0xc4 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 197 0xc5 '.' */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ -+ /* 198 0xc6 '.' */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x07, 0xf0, /* 000001111111 */ -+ 0x07, 0xf0, /* 000001111111 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x07, 0xf0, /* 000001111111 */ -+ 0x07, 0xf0, /* 000001111111 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ -+ /* 199 0xc7 '.' */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0xf0, /* 000011011111 */ -+ 0x0d, 0xf0, /* 000011011111 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ -+ /* 200 0xc8 '.' */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0xf0, /* 000011011111 */ -+ 0x0d, 0xf0, /* 000011011111 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0f, 0xf0, /* 000011111111 */ -+ 0x0f, 0xf0, /* 000011111111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 201 0xc9 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0xf0, /* 000011111111 */ -+ 0x0f, 0xf0, /* 000011111111 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0d, 0xf0, /* 000011011111 */ -+ 0x0d, 0xf0, /* 000011011111 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ -+ /* 202 0xca '.' */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0xfd, 0xf0, /* 111111011111 */ -+ 0xfd, 0xf0, /* 111111011111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 203 0xcb '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xfd, 0xf0, /* 111111011111 */ -+ 0xfd, 0xf0, /* 111111011111 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ -+ /* 204 0xcc '.' */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0xf0, /* 000011011111 */ -+ 0x0d, 0xf0, /* 000011011111 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0d, 0xf0, /* 000011011111 */ -+ 0x0d, 0xf0, /* 000011011111 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ -+ /* 205 0xcd '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 206 0xce '.' */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0xfd, 0xf0, /* 111111011111 */ -+ 0xfd, 0xf0, /* 111111011111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xfd, 0xf0, /* 111111011111 */ -+ 0xfd, 0xf0, /* 111111011111 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ -+ /* 207 0xcf '.' */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 208 0xd0 '.' */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 209 0xd1 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ -+ /* 210 0xd2 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ -+ /* 211 0xd3 '.' */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0f, 0xf0, /* 000011111111 */ -+ 0x0f, 0xf0, /* 000011111111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 212 0xd4 '.' */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x07, 0xf0, /* 000001111111 */ -+ 0x07, 0xf0, /* 000001111111 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x07, 0xf0, /* 000001111111 */ -+ 0x07, 0xf0, /* 000001111111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 213 0xd5 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x07, 0xf0, /* 000001111111 */ -+ 0x07, 0xf0, /* 000001111111 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x07, 0xf0, /* 000001111111 */ -+ 0x07, 0xf0, /* 000001111111 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ -+ /* 214 0xd6 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0xf0, /* 000011111111 */ -+ 0x0f, 0xf0, /* 000011111111 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ -+ /* 215 0xd7 '.' */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ 0x0d, 0x80, /* 000011011000 */ -+ -+ /* 216 0xd8 '.' */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ -+ /* 217 0xd9 '.' */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0xfe, 0x00, /* 111111100000 */ -+ 0xfe, 0x00, /* 111111100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 218 0xda '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x07, 0xf0, /* 000001111111 */ -+ 0x07, 0xf0, /* 000001111111 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ -+ /* 219 0xdb '.' */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ -+ /* 220 0xdc '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ -+ /* 221 0xdd '.' */ -+ 0xfc, 0x00, /* 111111000000 */ -+ 0xfc, 0x00, /* 111111000000 */ -+ 0xfc, 0x00, /* 111111000000 */ -+ 0xfc, 0x00, /* 111111000000 */ -+ 0xfc, 0x00, /* 111111000000 */ -+ 0xfc, 0x00, /* 111111000000 */ -+ 0xfc, 0x00, /* 111111000000 */ -+ 0xfc, 0x00, /* 111111000000 */ -+ 0xfc, 0x00, /* 111111000000 */ -+ 0xfc, 0x00, /* 111111000000 */ -+ 0xfc, 0x00, /* 111111000000 */ -+ 0xfc, 0x00, /* 111111000000 */ -+ 0xfc, 0x00, /* 111111000000 */ -+ 0xfc, 0x00, /* 111111000000 */ -+ 0xfc, 0x00, /* 111111000000 */ -+ 0xfc, 0x00, /* 111111000000 */ -+ 0xfc, 0x00, /* 111111000000 */ -+ 0xfc, 0x00, /* 111111000000 */ -+ 0xfc, 0x00, /* 111111000000 */ -+ 0xfc, 0x00, /* 111111000000 */ -+ 0xfc, 0x00, /* 111111000000 */ -+ 0xfc, 0x00, /* 111111000000 */ -+ -+ /* 222 0xde '.' */ -+ 0x03, 0xf0, /* 000000111111 */ -+ 0x03, 0xf0, /* 000000111111 */ -+ 0x03, 0xf0, /* 000000111111 */ -+ 0x03, 0xf0, /* 000000111111 */ -+ 0x03, 0xf0, /* 000000111111 */ -+ 0x03, 0xf0, /* 000000111111 */ -+ 0x03, 0xf0, /* 000000111111 */ -+ 0x03, 0xf0, /* 000000111111 */ -+ 0x03, 0xf0, /* 000000111111 */ -+ 0x03, 0xf0, /* 000000111111 */ -+ 0x03, 0xf0, /* 000000111111 */ -+ 0x03, 0xf0, /* 000000111111 */ -+ 0x03, 0xf0, /* 000000111111 */ -+ 0x03, 0xf0, /* 000000111111 */ -+ 0x03, 0xf0, /* 000000111111 */ -+ 0x03, 0xf0, /* 000000111111 */ -+ 0x03, 0xf0, /* 000000111111 */ -+ 0x03, 0xf0, /* 000000111111 */ -+ 0x03, 0xf0, /* 000000111111 */ -+ 0x03, 0xf0, /* 000000111111 */ -+ 0x03, 0xf0, /* 000000111111 */ -+ 0x03, 0xf0, /* 000000111111 */ -+ -+ /* 223 0xdf '.' */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0xff, 0xf0, /* 111111111111 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 224 0xe0 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x60, /* 000011110110 */ -+ 0x13, 0xe0, /* 000100111110 */ -+ 0x21, 0xc0, /* 001000011100 */ -+ 0x60, 0xc0, /* 011000001100 */ -+ 0x60, 0xc0, /* 011000001100 */ -+ 0x60, 0xc0, /* 011000001100 */ -+ 0x60, 0xc0, /* 011000001100 */ -+ 0x70, 0x80, /* 011100001000 */ -+ 0x39, 0xc0, /* 001110011100 */ -+ 0x1f, 0x60, /* 000111110110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 225 0xe1 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x37, 0x80, /* 001101111000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x77, 0x00, /* 011101110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 226 0xe2 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x3f, 0xe0, /* 001111111110 */ -+ 0x3f, 0xe0, /* 001111111110 */ -+ 0x30, 0x60, /* 001100000110 */ -+ 0x30, 0x60, /* 001100000110 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 227 0xe3 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 228 0xe4 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x30, 0x60, /* 001100000110 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x60, /* 001100000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 229 0xe5 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x07, 0xe0, /* 000001111110 */ -+ 0x0f, 0xe0, /* 000011111110 */ -+ 0x13, 0x80, /* 000100111000 */ -+ 0x21, 0xc0, /* 001000011100 */ -+ 0x60, 0xc0, /* 011000001100 */ -+ 0x60, 0xc0, /* 011000001100 */ -+ 0x60, 0xc0, /* 011000001100 */ -+ 0x60, 0xc0, /* 011000001100 */ -+ 0x70, 0x80, /* 011100001000 */ -+ 0x39, 0x00, /* 001110010000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 230 0xe6 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x39, 0xc0, /* 001110011100 */ -+ 0x36, 0xe0, /* 001101101110 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 231 0xe7 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x66, 0x60, /* 011001100110 */ -+ 0x66, 0x60, /* 011001100110 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 232 0xe8 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 233 0xe9 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 234 0xea '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0xd9, 0xb0, /* 110110011011 */ -+ 0x79, 0xe0, /* 011110011110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 235 0xeb '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x07, 0x80, /* 000001111000 */ -+ 0x0c, 0xc0, /* 000011001100 */ -+ 0x18, 0x60, /* 000110000110 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x0f, 0x80, /* 000011111000 */ -+ 0x11, 0xc0, /* 000100011100 */ -+ 0x20, 0xe0, /* 001000001110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x60, 0x60, /* 011000000110 */ -+ 0x70, 0x40, /* 011100000100 */ -+ 0x38, 0x80, /* 001110001000 */ -+ 0x1f, 0x00, /* 000111110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 236 0xec '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x39, 0xc0, /* 001110011100 */ -+ 0x6f, 0x60, /* 011011110110 */ -+ 0x66, 0x60, /* 011001100110 */ -+ 0xc6, 0x30, /* 110001100011 */ -+ 0xc6, 0x30, /* 110001100011 */ -+ 0x66, 0x60, /* 011001100110 */ -+ 0x6f, 0x60, /* 011011110110 */ -+ 0x39, 0xc0, /* 001110011100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 237 0xed '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x00, 0xc0, /* 000000001100 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x01, 0x80, /* 000000011000 */ -+ 0x3b, 0xc0, /* 001110111100 */ -+ 0x6f, 0x60, /* 011011110110 */ -+ 0x66, 0x60, /* 011001100110 */ -+ 0xc6, 0x30, /* 110001100011 */ -+ 0xc6, 0x30, /* 110001100011 */ -+ 0x66, 0x60, /* 011001100110 */ -+ 0x6f, 0x60, /* 011011110110 */ -+ 0x3d, 0xc0, /* 001111011100 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x30, 0x00, /* 001100000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 238 0xee '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x01, 0xc0, /* 000000011100 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x1f, 0xc0, /* 000111111100 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x01, 0xc0, /* 000000011100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 239 0xef '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x39, 0xc0, /* 001110011100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x30, 0xc0, /* 001100001100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 240 0xf0 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 241 0xf1 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 242 0xf2 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x38, 0x00, /* 001110000000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x03, 0x80, /* 000000111000 */ -+ 0x00, 0xe0, /* 000000001110 */ -+ 0x00, 0xe0, /* 000000001110 */ -+ 0x03, 0x80, /* 000000111000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x38, 0x00, /* 001110000000 */ -+ 0x60, 0x00, /* 011000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 243 0xf3 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x60, /* 000000000110 */ -+ 0x01, 0xc0, /* 000000011100 */ -+ 0x07, 0x00, /* 000001110000 */ -+ 0x1c, 0x00, /* 000111000000 */ -+ 0x70, 0x00, /* 011100000000 */ -+ 0x70, 0x00, /* 011100000000 */ -+ 0x1c, 0x00, /* 000111000000 */ -+ 0x07, 0x00, /* 000001110000 */ -+ 0x01, 0xc0, /* 000000011100 */ -+ 0x00, 0x60, /* 000000000110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 244 0xf4 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x03, 0x80, /* 000000111000 */ -+ 0x07, 0xc0, /* 000001111100 */ -+ 0x0c, 0x60, /* 000011000110 */ -+ 0x0c, 0x60, /* 000011000110 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ -+ /* 245 0xf5 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1c, 0x00, /* 000111000000 */ -+ 0x3e, 0x00, /* 001111100000 */ -+ 0x63, 0x00, /* 011000110000 */ -+ 0x63, 0x00, /* 011000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ -+ /* 246 0xf6 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x7f, 0xe0, /* 011111111110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 247 0xf7 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x38, 0x00, /* 001110000000 */ -+ 0x6c, 0x00, /* 011011000000 */ -+ 0x06, 0x30, /* 000001100011 */ -+ 0x03, 0x60, /* 000000110110 */ -+ 0x39, 0xc0, /* 001110011100 */ -+ 0x6c, 0x00, /* 011011000000 */ -+ 0x06, 0x30, /* 000001100011 */ -+ 0x03, 0x60, /* 000000110110 */ -+ 0x01, 0xc0, /* 000000011100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 248 0xf8 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x19, 0x80, /* 000110011000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 249 0xf9 '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x1c, 0x00, /* 000111000000 */ -+ 0x3e, 0x00, /* 001111100000 */ -+ 0x3e, 0x00, /* 001111100000 */ -+ 0x3e, 0x00, /* 001111100000 */ -+ 0x1c, 0x00, /* 000111000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 250 0xfa '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x3c, 0x00, /* 001111000000 */ -+ 0x3c, 0x00, /* 001111000000 */ -+ 0x18, 0x00, /* 000110000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 251 0xfb '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x07, 0xe0, /* 000001111110 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0xc6, 0x00, /* 110001100000 */ -+ 0x66, 0x00, /* 011001100000 */ -+ 0x36, 0x00, /* 001101100000 */ -+ 0x1e, 0x00, /* 000111100000 */ -+ 0x0e, 0x00, /* 000011100000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x02, 0x00, /* 000000100000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 252 0xfc '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x13, 0x80, /* 000100111000 */ -+ 0x3d, 0xc0, /* 001111011100 */ -+ 0x18, 0xc0, /* 000110001100 */ -+ 0x18, 0xc0, /* 000110001100 */ -+ 0x18, 0xc0, /* 000110001100 */ -+ 0x18, 0xc0, /* 000110001100 */ -+ 0x3d, 0xe0, /* 001111011110 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 253 0xfd '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x0f, 0x00, /* 000011110000 */ -+ 0x1f, 0x80, /* 000111111000 */ -+ 0x31, 0x80, /* 001100011000 */ -+ 0x21, 0x80, /* 001000011000 */ -+ 0x03, 0x00, /* 000000110000 */ -+ 0x06, 0x00, /* 000001100000 */ -+ 0x0c, 0x00, /* 000011000000 */ -+ 0x18, 0x40, /* 000110000100 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 254 0xfe '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x3f, 0xc0, /* 001111111100 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ -+ /* 255 0xff '.' */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+ 0x00, 0x00, /* 000000000000 */ -+}; -+ -+#endif -diff --git a/include/video_font_ter16x32.h b/include/video_font_ter16x32.h -new file mode 100644 -index 0000000000..bcf3d4b123 ---- /dev/null -+++ b/include/video_font_ter16x32.h -@@ -0,0 +1,2062 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copied from linux. -+ */ -+ -+#ifndef _VIDEO_FONT_TER_16X32_ -+#define _VIDEO_FONT_TER_16X32_ -+ -+#include -+ -+static unsigned char video_fontdata_16x32[VIDEO_FONT_SIZE(256, 16, 32)] = { -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x7f, 0xfc, 0x7f, 0xfc, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x7f, 0xfc, 0x7f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x3f, 0xf8, 0x7f, 0xfc, -+ 0xf0, 0x1e, 0xe0, 0x0e, 0xe0, 0x0e, 0xe0, 0x0e, -+ 0xee, 0xee, 0xee, 0xee, 0xe0, 0x0e, 0xe0, 0x0e, -+ 0xe0, 0x0e, 0xe0, 0x0e, 0xef, 0xee, 0xe7, 0xce, -+ 0xe0, 0x0e, 0xe0, 0x0e, 0xe0, 0x0e, 0xf0, 0x1e, -+ 0x7f, 0xfc, 0x3f, 0xf8, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 1 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x3f, 0xf8, 0x7f, 0xfc, -+ 0xff, 0xfe, 0xff, 0xfe, 0xff, 0xfe, 0xff, 0xfe, -+ 0xe3, 0x8e, 0xe3, 0x8e, 0xff, 0xfe, 0xff, 0xfe, -+ 0xff, 0xfe, 0xff, 0xfe, 0xe0, 0x0e, 0xf0, 0x1e, -+ 0xf8, 0x3e, 0xff, 0xfe, 0xff, 0xfe, 0xff, 0xfe, -+ 0x7f, 0xfc, 0x3f, 0xf8, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 2 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x78, 0x3c, 0xfc, 0x7e, 0xfe, 0xfe, 0xff, 0xfe, -+ 0xff, 0xfe, 0xff, 0xfe, 0xff, 0xfe, 0xff, 0xfe, -+ 0x7f, 0xfc, 0x7f, 0xfc, 0x3f, 0xf8, 0x1f, 0xf0, -+ 0x0f, 0xe0, 0x07, 0xc0, 0x03, 0x80, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 3 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x03, 0x80, 0x07, 0xc0, 0x0f, 0xe0, -+ 0x1f, 0xf0, 0x3f, 0xf8, 0x7f, 0xfc, 0xff, 0xfe, -+ 0xff, 0xfe, 0x7f, 0xfc, 0x3f, 0xf8, 0x1f, 0xf0, -+ 0x0f, 0xe0, 0x07, 0xc0, 0x03, 0x80, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 4 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x07, 0xc0, 0x0f, 0xe0, -+ 0x0f, 0xe0, 0x0f, 0xe0, 0x0f, 0xe0, 0x0f, 0xe0, -+ 0x07, 0xc0, 0x03, 0x80, 0x3b, 0xb8, 0x7f, 0xfc, -+ 0xff, 0xfe, 0xff, 0xfe, 0xff, 0xfe, 0xff, 0xfe, -+ 0x7f, 0xfc, 0x3b, 0xb8, 0x03, 0x80, 0x03, 0x80, -+ 0x0f, 0xe0, 0x0f, 0xe0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 5 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x03, 0x80, -+ 0x07, 0xc0, 0x0f, 0xe0, 0x1f, 0xf0, 0x3f, 0xf8, -+ 0x7f, 0xfc, 0x7f, 0xfc, 0xff, 0xfe, 0xff, 0xfe, -+ 0xff, 0xfe, 0xff, 0xfe, 0xff, 0xfe, 0x7b, 0xbc, -+ 0x3b, 0xb8, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x0f, 0xe0, 0x0f, 0xe0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 6 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x03, 0xc0, 0x07, 0xe0, 0x0f, 0xf0, 0x0f, 0xf0, -+ 0x0f, 0xf0, 0x0f, 0xf0, 0x07, 0xe0, 0x03, 0xc0, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 7 */ -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0xfc, 0x3f, 0xf8, 0x1f, 0xf0, 0x0f, 0xf0, 0x0f, -+ 0xf0, 0x0f, 0xf0, 0x0f, 0xf8, 0x1f, 0xfc, 0x3f, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 8 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x03, 0xc0, 0x07, 0xe0, 0x0e, 0x70, 0x0c, 0x30, -+ 0x0c, 0x30, 0x0e, 0x70, 0x07, 0xe0, 0x03, 0xc0, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 9 */ -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0xfc, 0x3f, 0xf8, 0x1f, 0xf1, 0x8f, 0xf3, 0xcf, -+ 0xf3, 0xcf, 0xf1, 0x8f, 0xf8, 0x1f, 0xfc, 0x3f, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 10 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0xfe, 0x03, 0xfe, -+ 0x00, 0x1e, 0x00, 0x3e, 0x00, 0x76, 0x00, 0xe6, -+ 0x01, 0xc6, 0x03, 0x86, 0x3f, 0xe0, 0x7f, 0xf0, -+ 0xf0, 0x78, 0xe0, 0x38, 0xe0, 0x38, 0xe0, 0x38, -+ 0xe0, 0x38, 0xe0, 0x38, 0xe0, 0x38, 0xf0, 0x78, -+ 0x7f, 0xf0, 0x3f, 0xe0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 11 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1f, 0xf0, 0x3f, 0xf8, -+ 0x78, 0x3c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x3c, 0x3f, 0xf8, -+ 0x1f, 0xf0, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x7f, 0xfc, 0x7f, 0xfc, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 12 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x3f, 0xfc, 0x3f, 0xfc, -+ 0x38, 0x1c, 0x38, 0x1c, 0x38, 0x1c, 0x38, 0x1c, -+ 0x3f, 0xfc, 0x3f, 0xfc, 0x38, 0x00, 0x38, 0x00, -+ 0x38, 0x00, 0x38, 0x00, 0x38, 0x00, 0x38, 0x00, -+ 0x38, 0x00, 0x38, 0x00, 0x38, 0x00, 0x38, 0x00, -+ 0xf8, 0x00, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 13 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x7f, 0xfe, 0x7f, 0xfe, -+ 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, -+ 0x7f, 0xfe, 0x7f, 0xfe, 0x70, 0x0e, 0x70, 0x0e, -+ 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, -+ 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x3e, -+ 0xf0, 0x3c, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 14 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x73, 0x9c, 0x73, 0x9c, -+ 0x3b, 0xb8, 0x1f, 0xf0, 0x0f, 0xe0, 0x7c, 0x7c, -+ 0x7c, 0x7c, 0x0f, 0xe0, 0x1f, 0xf0, 0x3b, 0xb8, -+ 0x73, 0x9c, 0x73, 0x9c, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 15 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0xc0, 0x00, 0xf0, 0x00, 0xfc, 0x00, 0xff, 0x00, -+ 0xff, 0xc0, 0xff, 0xf0, 0xff, 0xfc, 0xff, 0xff, -+ 0xff, 0xff, 0xff, 0xfc, 0xff, 0xf0, 0xff, 0xc0, -+ 0xff, 0x00, 0xfc, 0x00, 0xf0, 0x00, 0xc0, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 16 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x03, 0x00, 0x0f, 0x00, 0x3f, 0x00, 0xff, -+ 0x03, 0xff, 0x0f, 0xff, 0x3f, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0x3f, 0xff, 0x0f, 0xff, 0x03, 0xff, -+ 0x00, 0xff, 0x00, 0x3f, 0x00, 0x0f, 0x00, 0x03, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 17 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x07, 0xc0, -+ 0x0f, 0xe0, 0x1f, 0xf0, 0x3b, 0xb8, 0x73, 0x9c, -+ 0x63, 0x8c, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x63, 0x8c, -+ 0x73, 0x9c, 0x3b, 0xb8, 0x1f, 0xf0, 0x0f, 0xe0, -+ 0x07, 0xc0, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 18 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1c, 0x70, 0x1c, 0x70, -+ 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, -+ 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, -+ 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1c, 0x70, 0x1c, 0x70, -+ 0x1c, 0x70, 0x1c, 0x70, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 19 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1f, 0xfe, 0x3f, 0xfe, -+ 0x79, 0xce, 0x71, 0xce, 0x71, 0xce, 0x71, 0xce, -+ 0x71, 0xce, 0x71, 0xce, 0x79, 0xce, 0x3f, 0xce, -+ 0x1f, 0xce, 0x01, 0xce, 0x01, 0xce, 0x01, 0xce, -+ 0x01, 0xce, 0x01, 0xce, 0x01, 0xce, 0x01, 0xce, -+ 0x01, 0xce, 0x01, 0xce, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 20 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x07, 0xe0, 0x0f, 0xf0, 0x1e, 0x78, 0x1c, 0x38, -+ 0x1c, 0x00, 0x1e, 0x00, 0x0f, 0xc0, 0x0f, 0xe0, -+ 0x1c, 0xf0, 0x1c, 0x78, 0x1c, 0x38, 0x1c, 0x38, -+ 0x1c, 0x38, 0x1e, 0x38, 0x0f, 0x38, 0x07, 0xf0, -+ 0x03, 0xf0, 0x00, 0x78, 0x00, 0x38, 0x1c, 0x38, -+ 0x1e, 0x78, 0x0f, 0xf0, 0x07, 0xe0, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 21 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x7f, 0xfe, 0x7f, 0xfe, -+ 0x7f, 0xfe, 0x7f, 0xfe, 0x7f, 0xfe, 0x7f, 0xfe, -+ 0x7f, 0xfe, 0x7f, 0xfe, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 22 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x07, 0xc0, -+ 0x0f, 0xe0, 0x1f, 0xf0, 0x3b, 0xb8, 0x73, 0x9c, -+ 0x63, 0x8c, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x63, 0x8c, 0x73, 0x9c, 0x3b, 0xb8, -+ 0x1f, 0xf0, 0x0f, 0xe0, 0x07, 0xc0, 0x03, 0x80, -+ 0x7f, 0xfc, 0x7f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 23 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x07, 0xc0, -+ 0x0f, 0xe0, 0x1f, 0xf0, 0x3b, 0xb8, 0x73, 0x9c, -+ 0x63, 0x8c, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 24 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x63, 0x8c, -+ 0x73, 0x9c, 0x3b, 0xb8, 0x1f, 0xf0, 0x0f, 0xe0, -+ 0x07, 0xc0, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 25 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0xc0, 0x00, 0xe0, 0x00, 0x70, -+ 0x00, 0x38, 0x00, 0x1c, 0x7f, 0xfe, 0x7f, 0xfe, -+ 0x7f, 0xfe, 0x00, 0x1c, 0x00, 0x38, 0x00, 0x70, -+ 0x00, 0xe0, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 26 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x03, 0x00, 0x07, 0x00, 0x0e, 0x00, -+ 0x1c, 0x00, 0x38, 0x00, 0x7f, 0xfe, 0x7f, 0xfe, -+ 0x7f, 0xfe, 0x38, 0x00, 0x1c, 0x00, 0x0e, 0x00, -+ 0x07, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 27 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x7f, 0xfc, 0x7f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 28 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x06, 0x60, 0x0e, 0x70, 0x1c, 0x38, -+ 0x38, 0x1c, 0x70, 0x0e, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0x70, 0x0e, 0x38, 0x1c, 0x1c, 0x38, -+ 0x0e, 0x70, 0x06, 0x60, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 29 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x01, 0x80, 0x01, 0x80, 0x03, 0xc0, 0x03, 0xc0, -+ 0x07, 0xe0, 0x07, 0xe0, 0x0f, 0xf0, 0x0f, 0xf0, -+ 0x1f, 0xf8, 0x1f, 0xf8, 0x3f, 0xfc, 0x3f, 0xfc, -+ 0x7f, 0xfe, 0x7f, 0xfe, 0xff, 0xff, 0xff, 0xff, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 30 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0xff, 0xff, 0xff, 0xff, 0x7f, 0xfe, 0x7f, 0xfe, -+ 0x3f, 0xfc, 0x3f, 0xfc, 0x1f, 0xf8, 0x1f, 0xf8, -+ 0x0f, 0xf0, 0x0f, 0xf0, 0x07, 0xe0, 0x07, 0xe0, -+ 0x03, 0xc0, 0x03, 0xc0, 0x01, 0x80, 0x01, 0x80, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 31 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 32 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 33 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, -+ 0x1c, 0x70, 0x1c, 0x70, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 34 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1c, 0x70, 0x1c, 0x70, -+ 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x7f, 0xfc, -+ 0x7f, 0xfc, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, -+ 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x7f, 0xfc, -+ 0x7f, 0xfc, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, -+ 0x1c, 0x70, 0x1c, 0x70, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 35 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x1f, 0xf0, -+ 0x3f, 0xf8, 0x7b, 0xbc, 0x73, 0x9c, 0x73, 0x80, -+ 0x73, 0x80, 0x73, 0x80, 0x7b, 0x80, 0x3f, 0xf0, -+ 0x1f, 0xf8, 0x03, 0xbc, 0x03, 0x9c, 0x03, 0x9c, -+ 0x03, 0x9c, 0x73, 0x9c, 0x7b, 0xbc, 0x3f, 0xf8, -+ 0x1f, 0xf0, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 36 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1f, 0x1c, 0x3f, 0x9c, -+ 0x3b, 0xb8, 0x3b, 0xb8, 0x3f, 0xf0, 0x1f, 0x70, -+ 0x00, 0xe0, 0x00, 0xe0, 0x01, 0xc0, 0x01, 0xc0, -+ 0x03, 0x80, 0x03, 0x80, 0x07, 0x00, 0x07, 0x00, -+ 0x0e, 0xf8, 0x0f, 0xfc, 0x1d, 0xdc, 0x1d, 0xdc, -+ 0x39, 0xfc, 0x38, 0xf8, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 37 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x0f, 0xc0, 0x1f, 0xe0, -+ 0x38, 0x70, 0x38, 0x70, 0x38, 0x70, 0x38, 0x70, -+ 0x38, 0x70, 0x1c, 0xe0, 0x0f, 0xc0, 0x0f, 0x80, -+ 0x1f, 0xce, 0x38, 0xee, 0x70, 0x7c, 0x70, 0x38, -+ 0x70, 0x38, 0x70, 0x38, 0x70, 0x38, 0x78, 0x7c, -+ 0x3f, 0xee, 0x1f, 0xce, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 38 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 39 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x01, 0xc0, -+ 0x03, 0x80, 0x07, 0x00, 0x07, 0x00, 0x0e, 0x00, -+ 0x0e, 0x00, 0x0e, 0x00, 0x0e, 0x00, 0x0e, 0x00, -+ 0x0e, 0x00, 0x0e, 0x00, 0x0e, 0x00, 0x0e, 0x00, -+ 0x0e, 0x00, 0x07, 0x00, 0x07, 0x00, 0x03, 0x80, -+ 0x01, 0xc0, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 40 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x0e, 0x00, 0x07, 0x00, -+ 0x03, 0x80, 0x01, 0xc0, 0x01, 0xc0, 0x00, 0xe0, -+ 0x00, 0xe0, 0x00, 0xe0, 0x00, 0xe0, 0x00, 0xe0, -+ 0x00, 0xe0, 0x00, 0xe0, 0x00, 0xe0, 0x00, 0xe0, -+ 0x00, 0xe0, 0x01, 0xc0, 0x01, 0xc0, 0x03, 0x80, -+ 0x07, 0x00, 0x0e, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 41 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x38, 0x38, 0x1c, 0x70, -+ 0x0e, 0xe0, 0x07, 0xc0, 0x03, 0x80, 0x7f, 0xfc, -+ 0x7f, 0xfc, 0x03, 0x80, 0x07, 0xc0, 0x0e, 0xe0, -+ 0x1c, 0x70, 0x38, 0x38, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 42 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x7f, 0xfc, -+ 0x7f, 0xfc, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 43 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x07, 0x00, 0x0e, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 44 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f, 0xfc, -+ 0x7f, 0xfc, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 45 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 46 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, 0x00, 0x1c, -+ 0x00, 0x38, 0x00, 0x38, 0x00, 0x70, 0x00, 0x70, -+ 0x00, 0xe0, 0x00, 0xe0, 0x01, 0xc0, 0x01, 0xc0, -+ 0x03, 0x80, 0x03, 0x80, 0x07, 0x00, 0x07, 0x00, -+ 0x0e, 0x00, 0x0e, 0x00, 0x1c, 0x00, 0x1c, 0x00, -+ 0x38, 0x00, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 47 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1f, 0xf0, 0x3f, 0xf8, -+ 0x78, 0x3c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x3c, -+ 0x70, 0x7c, 0x70, 0xfc, 0x71, 0xdc, 0x73, 0x9c, -+ 0x77, 0x1c, 0x7e, 0x1c, 0x7c, 0x1c, 0x78, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x3c, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 48 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x07, 0x80, -+ 0x0f, 0x80, 0x1f, 0x80, 0x1f, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x1f, 0xf0, 0x1f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 49 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1f, 0xf0, 0x3f, 0xf8, -+ 0x78, 0x3c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x00, 0x1c, 0x00, 0x38, 0x00, 0x70, -+ 0x00, 0xe0, 0x01, 0xc0, 0x03, 0x80, 0x07, 0x00, -+ 0x0e, 0x00, 0x1c, 0x00, 0x38, 0x00, 0x70, 0x00, -+ 0x7f, 0xfc, 0x7f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 50 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1f, 0xf0, 0x3f, 0xf8, -+ 0x78, 0x3c, 0x70, 0x1c, 0x70, 0x1c, 0x00, 0x1c, -+ 0x00, 0x1c, 0x00, 0x1c, 0x00, 0x3c, 0x0f, 0xf8, -+ 0x0f, 0xf8, 0x00, 0x3c, 0x00, 0x1c, 0x00, 0x1c, -+ 0x00, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x3c, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 51 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, 0x00, 0x3c, -+ 0x00, 0x7c, 0x00, 0xfc, 0x01, 0xdc, 0x03, 0x9c, -+ 0x07, 0x1c, 0x0e, 0x1c, 0x1c, 0x1c, 0x38, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x7f, 0xfc, -+ 0x7f, 0xfc, 0x00, 0x1c, 0x00, 0x1c, 0x00, 0x1c, -+ 0x00, 0x1c, 0x00, 0x1c, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 52 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x7f, 0xfc, 0x7f, 0xfc, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x7f, 0xf0, 0x7f, 0xf8, -+ 0x00, 0x3c, 0x00, 0x1c, 0x00, 0x1c, 0x00, 0x1c, -+ 0x00, 0x1c, 0x00, 0x1c, 0x70, 0x1c, 0x78, 0x1c, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 53 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1f, 0xf8, 0x3f, 0xf8, -+ 0x78, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x7f, 0xf0, 0x7f, 0xf8, -+ 0x70, 0x3c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x3c, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 54 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x7f, 0xfc, 0x7f, 0xfc, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x38, -+ 0x00, 0x38, 0x00, 0x70, 0x00, 0x70, 0x00, 0xe0, -+ 0x00, 0xe0, 0x01, 0xc0, 0x01, 0xc0, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 55 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1f, 0xf0, 0x3f, 0xf8, -+ 0x78, 0x3c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x3c, 0x3f, 0xf8, -+ 0x3f, 0xf8, 0x78, 0x3c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x3c, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 56 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1f, 0xf0, 0x3f, 0xf8, -+ 0x78, 0x3c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x1c, -+ 0x3f, 0xfc, 0x1f, 0xfc, 0x00, 0x1c, 0x00, 0x1c, -+ 0x00, 0x1c, 0x00, 0x1c, 0x00, 0x1c, 0x00, 0x3c, -+ 0x3f, 0xf8, 0x3f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 57 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 58 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x07, 0x00, 0x0e, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 59 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, 0x00, 0x38, -+ 0x00, 0x70, 0x00, 0xe0, 0x01, 0xc0, 0x03, 0x80, -+ 0x07, 0x00, 0x0e, 0x00, 0x1c, 0x00, 0x38, 0x00, -+ 0x38, 0x00, 0x1c, 0x00, 0x0e, 0x00, 0x07, 0x00, -+ 0x03, 0x80, 0x01, 0xc0, 0x00, 0xe0, 0x00, 0x70, -+ 0x00, 0x38, 0x00, 0x1c, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 60 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x7f, 0xfc, 0x7f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x7f, 0xfc, 0x7f, 0xfc, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 61 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x38, 0x00, 0x1c, 0x00, -+ 0x0e, 0x00, 0x07, 0x00, 0x03, 0x80, 0x01, 0xc0, -+ 0x00, 0xe0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1c, -+ 0x00, 0x1c, 0x00, 0x38, 0x00, 0x70, 0x00, 0xe0, -+ 0x01, 0xc0, 0x03, 0x80, 0x07, 0x00, 0x0e, 0x00, -+ 0x1c, 0x00, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 62 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1f, 0xf0, 0x3f, 0xf8, -+ 0x78, 0x3c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x00, 0x38, 0x00, 0x70, 0x00, 0xe0, -+ 0x01, 0xc0, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 63 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1f, 0xf8, 0x3f, 0xfc, -+ 0x78, 0x0e, 0x70, 0x06, 0x71, 0xfe, 0x73, 0xfe, -+ 0x77, 0x8e, 0x77, 0x0e, 0x77, 0x0e, 0x77, 0x0e, -+ 0x77, 0x0e, 0x77, 0x0e, 0x77, 0x0e, 0x77, 0x9e, -+ 0x73, 0xfe, 0x71, 0xf6, 0x70, 0x00, 0x78, 0x00, -+ 0x3f, 0xfe, 0x1f, 0xfe, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 64 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1f, 0xf0, 0x3f, 0xf8, -+ 0x78, 0x3c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x7f, 0xfc, 0x7f, 0xfc, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 65 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x7f, 0xf0, 0x7f, 0xf8, -+ 0x70, 0x3c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x38, 0x7f, 0xf0, 0x7f, 0xf0, -+ 0x70, 0x38, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x3c, -+ 0x7f, 0xf8, 0x7f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 66 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1f, 0xf0, 0x3f, 0xf8, -+ 0x78, 0x3c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x3c, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 67 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x7f, 0xc0, 0x7f, 0xf0, -+ 0x70, 0x78, 0x70, 0x38, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x38, 0x70, 0x78, -+ 0x7f, 0xf0, 0x7f, 0xc0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 68 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x7f, 0xfc, 0x7f, 0xfc, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x7f, 0xe0, -+ 0x7f, 0xe0, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x7f, 0xfc, 0x7f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 69 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x7f, 0xfc, 0x7f, 0xfc, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x7f, 0xe0, -+ 0x7f, 0xe0, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 70 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1f, 0xf0, 0x3f, 0xf8, -+ 0x78, 0x3c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x71, 0xfc, -+ 0x71, 0xfc, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x3c, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 71 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x7f, 0xfc, -+ 0x7f, 0xfc, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 72 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x0f, 0xe0, 0x0f, 0xe0, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x0f, 0xe0, 0x0f, 0xe0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 73 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x00, 0xfe, -+ 0x00, 0x38, 0x00, 0x38, 0x00, 0x38, 0x00, 0x38, -+ 0x00, 0x38, 0x00, 0x38, 0x00, 0x38, 0x00, 0x38, -+ 0x00, 0x38, 0x00, 0x38, 0x00, 0x38, 0x00, 0x38, -+ 0x70, 0x38, 0x70, 0x38, 0x70, 0x38, 0x78, 0x78, -+ 0x3f, 0xf0, 0x1f, 0xe0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 74 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x70, 0x0c, 0x70, 0x1c, -+ 0x70, 0x38, 0x70, 0x70, 0x70, 0xe0, 0x71, 0xc0, -+ 0x73, 0x80, 0x77, 0x00, 0x7e, 0x00, 0x7c, 0x00, -+ 0x7c, 0x00, 0x7e, 0x00, 0x77, 0x00, 0x73, 0x80, -+ 0x71, 0xc0, 0x70, 0xe0, 0x70, 0x70, 0x70, 0x38, -+ 0x70, 0x1c, 0x70, 0x0c, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 75 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x7f, 0xfc, 0x7f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 76 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x70, 0x0e, 0x70, 0x0e, -+ 0x78, 0x1e, 0x7c, 0x3e, 0x7e, 0x7e, 0x7e, 0x7e, -+ 0x77, 0xee, 0x73, 0xce, 0x73, 0xce, 0x71, 0x8e, -+ 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, -+ 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, -+ 0x70, 0x0e, 0x70, 0x0e, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 77 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x1c, -+ 0x7c, 0x1c, 0x7e, 0x1c, 0x77, 0x1c, 0x73, 0x9c, -+ 0x71, 0xdc, 0x70, 0xfc, 0x70, 0x7c, 0x70, 0x3c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 78 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1f, 0xf0, 0x3f, 0xf8, -+ 0x78, 0x3c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x3c, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 79 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x7f, 0xf0, 0x7f, 0xf8, -+ 0x70, 0x3c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x3c, -+ 0x7f, 0xf8, 0x7f, 0xf0, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 80 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1f, 0xf0, 0x3f, 0xf8, -+ 0x78, 0x3c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x73, 0x9c, 0x79, 0xfc, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x00, 0x38, 0x00, 0x1c, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 81 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x7f, 0xf0, 0x7f, 0xf8, -+ 0x70, 0x3c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x3c, -+ 0x7f, 0xf8, 0x7f, 0xf0, 0x7e, 0x00, 0x77, 0x00, -+ 0x73, 0x80, 0x71, 0xc0, 0x70, 0xe0, 0x70, 0x70, -+ 0x70, 0x38, 0x70, 0x1c, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 82 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1f, 0xf0, 0x3f, 0xf8, -+ 0x78, 0x3c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x78, 0x00, 0x3f, 0xf0, -+ 0x1f, 0xf8, 0x00, 0x3c, 0x00, 0x1c, 0x00, 0x1c, -+ 0x00, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x3c, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 83 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x7f, 0xfc, 0x7f, 0xfc, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 84 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x3c, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 85 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x38, 0x38, -+ 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, -+ 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, -+ 0x0e, 0xe0, 0x0e, 0xe0, 0x0e, 0xe0, 0x07, 0xc0, -+ 0x07, 0xc0, 0x07, 0xc0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 86 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x70, 0x0e, 0x70, 0x0e, -+ 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, -+ 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, -+ 0x71, 0x8e, 0x73, 0xce, 0x73, 0xce, 0x77, 0xee, -+ 0x7e, 0x7e, 0x7e, 0x7e, 0x7c, 0x3e, 0x78, 0x1e, -+ 0x70, 0x0e, 0x70, 0x0e, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 87 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x70, 0x1c, 0x70, 0x1c, -+ 0x38, 0x38, 0x38, 0x38, 0x1c, 0x70, 0x1c, 0x70, -+ 0x0e, 0xe0, 0x0e, 0xe0, 0x07, 0xc0, 0x07, 0xc0, -+ 0x07, 0xc0, 0x07, 0xc0, 0x0e, 0xe0, 0x0e, 0xe0, -+ 0x1c, 0x70, 0x1c, 0x70, 0x38, 0x38, 0x38, 0x38, -+ 0x70, 0x1c, 0x70, 0x1c, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 88 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x38, 0x38, 0x38, 0x38, 0x1c, 0x70, -+ 0x1c, 0x70, 0x0e, 0xe0, 0x0e, 0xe0, 0x07, 0xc0, -+ 0x07, 0xc0, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 89 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x7f, 0xfc, 0x7f, 0xfc, -+ 0x00, 0x1c, 0x00, 0x1c, 0x00, 0x1c, 0x00, 0x38, -+ 0x00, 0x70, 0x00, 0xe0, 0x01, 0xc0, 0x03, 0x80, -+ 0x07, 0x00, 0x0e, 0x00, 0x1c, 0x00, 0x38, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x7f, 0xfc, 0x7f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 90 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x0f, 0xf0, 0x0f, 0xf0, -+ 0x0e, 0x00, 0x0e, 0x00, 0x0e, 0x00, 0x0e, 0x00, -+ 0x0e, 0x00, 0x0e, 0x00, 0x0e, 0x00, 0x0e, 0x00, -+ 0x0e, 0x00, 0x0e, 0x00, 0x0e, 0x00, 0x0e, 0x00, -+ 0x0e, 0x00, 0x0e, 0x00, 0x0e, 0x00, 0x0e, 0x00, -+ 0x0f, 0xf0, 0x0f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 91 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x38, 0x00, 0x38, 0x00, -+ 0x1c, 0x00, 0x1c, 0x00, 0x0e, 0x00, 0x0e, 0x00, -+ 0x07, 0x00, 0x07, 0x00, 0x03, 0x80, 0x03, 0x80, -+ 0x01, 0xc0, 0x01, 0xc0, 0x00, 0xe0, 0x00, 0xe0, -+ 0x00, 0x70, 0x00, 0x70, 0x00, 0x38, 0x00, 0x38, -+ 0x00, 0x1c, 0x00, 0x1c, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 92 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x0f, 0xf0, 0x0f, 0xf0, -+ 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, -+ 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, -+ 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, -+ 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, -+ 0x0f, 0xf0, 0x0f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 93 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x03, 0x80, 0x07, 0xc0, 0x0e, 0xe0, 0x1c, 0x70, -+ 0x38, 0x38, 0x70, 0x1c, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 94 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f, 0xfc, -+ 0x7f, 0xfc, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 95 */ -+ 0x00, 0x00, 0x00, 0x00, 0x1c, 0x00, 0x0e, 0x00, -+ 0x07, 0x00, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 96 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x3f, 0xf0, 0x3f, 0xf8, 0x00, 0x3c, 0x00, 0x1c, -+ 0x00, 0x1c, 0x1f, 0xfc, 0x3f, 0xfc, 0x78, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x1c, -+ 0x3f, 0xfc, 0x1f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 97 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x7f, 0xf0, 0x7f, 0xf8, 0x70, 0x3c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x3c, -+ 0x7f, 0xf8, 0x7f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 98 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x1f, 0xf0, 0x3f, 0xf8, 0x78, 0x3c, 0x70, 0x1c, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x1c, 0x78, 0x3c, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 99 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, 0x00, 0x1c, -+ 0x00, 0x1c, 0x00, 0x1c, 0x00, 0x1c, 0x00, 0x1c, -+ 0x1f, 0xfc, 0x3f, 0xfc, 0x78, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x1c, -+ 0x3f, 0xfc, 0x1f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 100 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x1f, 0xf0, 0x3f, 0xf8, 0x78, 0x3c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x7f, 0xfc, 0x7f, 0xfc, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x78, 0x1c, -+ 0x3f, 0xfc, 0x1f, 0xf8, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 101 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x01, 0xfe, -+ 0x03, 0xc0, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x3f, 0xf8, 0x3f, 0xf8, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 102 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x1f, 0xfc, 0x3f, 0xfc, 0x78, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x1c, -+ 0x3f, 0xfc, 0x1f, 0xfc, 0x00, 0x1c, 0x00, 0x1c, -+ 0x00, 0x3c, 0x3f, 0xf8, 0x3f, 0xf0, 0x00, 0x00, /* 103 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x7f, 0xf0, 0x7f, 0xf8, 0x70, 0x3c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 104 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x0f, 0x80, 0x0f, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x0f, 0xe0, 0x0f, 0xe0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 105 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x00, 0x38, -+ 0x00, 0x38, 0x00, 0x38, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0xf8, 0x00, 0xf8, 0x00, 0x38, 0x00, 0x38, -+ 0x00, 0x38, 0x00, 0x38, 0x00, 0x38, 0x00, 0x38, -+ 0x00, 0x38, 0x00, 0x38, 0x00, 0x38, 0x00, 0x38, -+ 0x00, 0x38, 0x00, 0x38, 0x38, 0x38, 0x38, 0x38, -+ 0x3c, 0x78, 0x1f, 0xf0, 0x0f, 0xe0, 0x00, 0x00, /* 106 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x38, 0x00, 0x38, 0x00, -+ 0x38, 0x00, 0x38, 0x00, 0x38, 0x00, 0x38, 0x00, -+ 0x38, 0x1c, 0x38, 0x38, 0x38, 0x70, 0x38, 0xe0, -+ 0x39, 0xc0, 0x3b, 0x80, 0x3f, 0x00, 0x3f, 0x00, -+ 0x3b, 0x80, 0x39, 0xc0, 0x38, 0xe0, 0x38, 0x70, -+ 0x38, 0x38, 0x38, 0x1c, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 107 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x0f, 0x80, 0x0f, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x0f, 0xe0, 0x0f, 0xe0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 108 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x7f, 0xf0, 0x7f, 0xf8, 0x73, 0xbc, 0x73, 0x9c, -+ 0x73, 0x9c, 0x73, 0x9c, 0x73, 0x9c, 0x73, 0x9c, -+ 0x73, 0x9c, 0x73, 0x9c, 0x73, 0x9c, 0x73, 0x9c, -+ 0x73, 0x9c, 0x73, 0x9c, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 109 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x7f, 0xf0, 0x7f, 0xf8, 0x70, 0x3c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 110 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x1f, 0xf0, 0x3f, 0xf8, 0x78, 0x3c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x3c, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 111 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x7f, 0xf0, 0x7f, 0xf8, 0x70, 0x3c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x3c, -+ 0x7f, 0xf8, 0x7f, 0xf0, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x00, 0x00, /* 112 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x1f, 0xfc, 0x3f, 0xfc, 0x78, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x1c, -+ 0x3f, 0xfc, 0x1f, 0xfc, 0x00, 0x1c, 0x00, 0x1c, -+ 0x00, 0x1c, 0x00, 0x1c, 0x00, 0x1c, 0x00, 0x00, /* 113 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x73, 0xfc, 0x77, 0xfc, 0x7e, 0x00, 0x7c, 0x00, -+ 0x78, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 114 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x1f, 0xf0, 0x3f, 0xf8, 0x78, 0x3c, 0x70, 0x00, -+ 0x70, 0x00, 0x78, 0x00, 0x3f, 0xf0, 0x1f, 0xf8, -+ 0x00, 0x3c, 0x00, 0x1c, 0x00, 0x1c, 0x78, 0x3c, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 115 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x07, 0x00, 0x07, 0x00, -+ 0x07, 0x00, 0x07, 0x00, 0x07, 0x00, 0x07, 0x00, -+ 0x7f, 0xf0, 0x7f, 0xf0, 0x07, 0x00, 0x07, 0x00, -+ 0x07, 0x00, 0x07, 0x00, 0x07, 0x00, 0x07, 0x00, -+ 0x07, 0x00, 0x07, 0x00, 0x07, 0x00, 0x07, 0x80, -+ 0x03, 0xfc, 0x01, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 116 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x1c, -+ 0x3f, 0xfc, 0x1f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 117 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x38, 0x38, -+ 0x38, 0x38, 0x38, 0x38, 0x1c, 0x70, 0x1c, 0x70, -+ 0x1c, 0x70, 0x0e, 0xe0, 0x0e, 0xe0, 0x07, 0xc0, -+ 0x07, 0xc0, 0x07, 0xc0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 118 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x73, 0x9c, 0x73, 0x9c, 0x73, 0x9c, 0x73, 0x9c, -+ 0x73, 0x9c, 0x73, 0x9c, 0x73, 0x9c, 0x7b, 0xbc, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 119 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x38, 0x38, -+ 0x1c, 0x70, 0x0e, 0xe0, 0x07, 0xc0, 0x07, 0xc0, -+ 0x0e, 0xe0, 0x1c, 0x70, 0x38, 0x38, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 120 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x1c, -+ 0x3f, 0xfc, 0x1f, 0xfc, 0x00, 0x1c, 0x00, 0x1c, -+ 0x00, 0x3c, 0x3f, 0xf8, 0x3f, 0xf0, 0x00, 0x00, /* 121 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x7f, 0xfc, 0x7f, 0xfc, 0x00, 0x38, 0x00, 0x70, -+ 0x00, 0xe0, 0x01, 0xc0, 0x03, 0x80, 0x07, 0x00, -+ 0x0e, 0x00, 0x1c, 0x00, 0x38, 0x00, 0x70, 0x00, -+ 0x7f, 0xfc, 0x7f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 122 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x01, 0xf0, 0x03, 0xf0, -+ 0x07, 0x80, 0x07, 0x00, 0x07, 0x00, 0x07, 0x00, -+ 0x07, 0x00, 0x07, 0x00, 0x07, 0x00, 0x3e, 0x00, -+ 0x3e, 0x00, 0x07, 0x00, 0x07, 0x00, 0x07, 0x00, -+ 0x07, 0x00, 0x07, 0x00, 0x07, 0x00, 0x07, 0x80, -+ 0x03, 0xf0, 0x01, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 123 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 124 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x3e, 0x00, 0x3f, 0x00, -+ 0x07, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x01, 0xf0, -+ 0x01, 0xf0, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x07, 0x80, -+ 0x3f, 0x00, 0x3e, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 125 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x1e, 0x1c, 0x3f, 0x1c, 0x77, 0x9c, 0x73, 0xdc, -+ 0x71, 0xf8, 0x70, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 126 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x07, 0xc0, -+ 0x0f, 0xe0, 0x1e, 0xf0, 0x3c, 0x78, 0x78, 0x3c, -+ 0xf0, 0x1e, 0xe0, 0x0e, 0xe0, 0x0e, 0xe0, 0x0e, -+ 0xe0, 0x0e, 0xe0, 0x0e, 0xe0, 0x0e, 0xe0, 0x0e, -+ 0xff, 0xfe, 0xff, 0xfe, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 127 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1f, 0xf0, 0x3f, 0xf8, -+ 0x78, 0x3c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x3c, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x07, 0x00, 0x0e, 0x00, 0x00, 0x00, /* 128 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1c, 0x70, 0x1c, 0x70, -+ 0x1c, 0x70, 0x1c, 0x70, 0x00, 0x00, 0x00, 0x00, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x1c, -+ 0x3f, 0xfc, 0x1f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 129 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0xe0, -+ 0x01, 0xc0, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x1f, 0xf0, 0x3f, 0xf8, 0x78, 0x3c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x7f, 0xfc, 0x7f, 0xfc, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x78, 0x1c, -+ 0x3f, 0xfc, 0x1f, 0xf8, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 130 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x07, 0xc0, -+ 0x0e, 0xe0, 0x1c, 0x70, 0x00, 0x00, 0x00, 0x00, -+ 0x3f, 0xf0, 0x3f, 0xf8, 0x00, 0x3c, 0x00, 0x1c, -+ 0x00, 0x1c, 0x1f, 0xfc, 0x3f, 0xfc, 0x78, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x1c, -+ 0x3f, 0xfc, 0x1f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 131 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1c, 0x70, 0x1c, 0x70, -+ 0x1c, 0x70, 0x1c, 0x70, 0x00, 0x00, 0x00, 0x00, -+ 0x3f, 0xf0, 0x3f, 0xf8, 0x00, 0x3c, 0x00, 0x1c, -+ 0x00, 0x1c, 0x1f, 0xfc, 0x3f, 0xfc, 0x78, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x1c, -+ 0x3f, 0xfc, 0x1f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 132 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1c, 0x00, 0x0e, 0x00, -+ 0x07, 0x00, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x3f, 0xf0, 0x3f, 0xf8, 0x00, 0x3c, 0x00, 0x1c, -+ 0x00, 0x1c, 0x1f, 0xfc, 0x3f, 0xfc, 0x78, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x1c, -+ 0x3f, 0xfc, 0x1f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 133 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x07, 0xc0, 0x0e, 0xe0, -+ 0x0e, 0xe0, 0x0e, 0xe0, 0x07, 0xc0, 0x00, 0x00, -+ 0x3f, 0xf0, 0x3f, 0xf8, 0x00, 0x3c, 0x00, 0x1c, -+ 0x00, 0x1c, 0x1f, 0xfc, 0x3f, 0xfc, 0x78, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x1c, -+ 0x3f, 0xfc, 0x1f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 134 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x1f, 0xf0, 0x3f, 0xf8, 0x78, 0x3c, 0x70, 0x1c, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x1c, 0x78, 0x3c, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x07, 0x00, 0x0e, 0x00, 0x00, 0x00, /* 135 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x07, 0xc0, -+ 0x0e, 0xe0, 0x1c, 0x70, 0x00, 0x00, 0x00, 0x00, -+ 0x1f, 0xf0, 0x3f, 0xf8, 0x78, 0x3c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x7f, 0xfc, 0x7f, 0xfc, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x78, 0x1c, -+ 0x3f, 0xfc, 0x1f, 0xf8, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 136 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1c, 0x70, 0x1c, 0x70, -+ 0x1c, 0x70, 0x1c, 0x70, 0x00, 0x00, 0x00, 0x00, -+ 0x1f, 0xf0, 0x3f, 0xf8, 0x78, 0x3c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x7f, 0xfc, 0x7f, 0xfc, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x78, 0x1c, -+ 0x3f, 0xfc, 0x1f, 0xf8, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 137 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1c, 0x00, 0x0e, 0x00, -+ 0x07, 0x00, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x1f, 0xf0, 0x3f, 0xf8, 0x78, 0x3c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x7f, 0xfc, 0x7f, 0xfc, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x78, 0x1c, -+ 0x3f, 0xfc, 0x1f, 0xf8, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 138 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1c, 0x70, 0x1c, 0x70, -+ 0x1c, 0x70, 0x1c, 0x70, 0x00, 0x00, 0x00, 0x00, -+ 0x0f, 0x80, 0x0f, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x0f, 0xe0, 0x0f, 0xe0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 139 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x07, 0xc0, -+ 0x0e, 0xe0, 0x1c, 0x70, 0x00, 0x00, 0x00, 0x00, -+ 0x0f, 0x80, 0x0f, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x0f, 0xe0, 0x0f, 0xe0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 140 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1c, 0x00, 0x0e, 0x00, -+ 0x07, 0x00, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x0f, 0x80, 0x0f, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x0f, 0xe0, 0x0f, 0xe0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 141 */ -+ 0x00, 0x00, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, -+ 0x1c, 0x70, 0x00, 0x00, 0x1f, 0xf0, 0x3f, 0xf8, -+ 0x78, 0x3c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x7f, 0xfc, 0x7f, 0xfc, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 142 */ -+ 0x00, 0x00, 0x07, 0xc0, 0x0e, 0xe0, 0x0e, 0xe0, -+ 0x0e, 0xe0, 0x07, 0xc0, 0x1f, 0xf0, 0x3f, 0xf8, -+ 0x78, 0x3c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x7f, 0xfc, 0x7f, 0xfc, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 143 */ -+ 0x00, 0x00, 0x00, 0x70, 0x00, 0xe0, 0x01, 0xc0, -+ 0x03, 0x80, 0x00, 0x00, 0x7f, 0xfc, 0x7f, 0xfc, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x7f, 0xe0, -+ 0x7f, 0xe0, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x7f, 0xfc, 0x7f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 144 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x7e, 0xf8, 0x7f, 0xfc, 0x03, 0x9e, 0x03, 0x8e, -+ 0x03, 0x8e, 0x3f, 0x8e, 0x7f, 0xfe, 0xf3, 0xfe, -+ 0xe3, 0x80, 0xe3, 0x80, 0xe3, 0x80, 0xf3, 0xce, -+ 0x7f, 0xfe, 0x3e, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 145 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x3f, 0xfe, 0x7f, 0xfe, -+ 0xf1, 0xc0, 0xe1, 0xc0, 0xe1, 0xc0, 0xe1, 0xc0, -+ 0xe1, 0xc0, 0xe1, 0xc0, 0xe1, 0xc0, 0xff, 0xfe, -+ 0xff, 0xfe, 0xe1, 0xc0, 0xe1, 0xc0, 0xe1, 0xc0, -+ 0xe1, 0xc0, 0xe1, 0xc0, 0xe1, 0xc0, 0xe1, 0xc0, -+ 0xe1, 0xfe, 0xe1, 0xfe, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 146 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x07, 0xc0, -+ 0x0e, 0xe0, 0x1c, 0x70, 0x00, 0x00, 0x00, 0x00, -+ 0x1f, 0xf0, 0x3f, 0xf8, 0x78, 0x3c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x3c, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 147 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1c, 0x70, 0x1c, 0x70, -+ 0x1c, 0x70, 0x1c, 0x70, 0x00, 0x00, 0x00, 0x00, -+ 0x1f, 0xf0, 0x3f, 0xf8, 0x78, 0x3c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x3c, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 148 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1c, 0x00, 0x0e, 0x00, -+ 0x07, 0x00, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x1f, 0xf0, 0x3f, 0xf8, 0x78, 0x3c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x3c, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 149 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x07, 0xc0, -+ 0x0e, 0xe0, 0x1c, 0x70, 0x00, 0x00, 0x00, 0x00, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x1c, -+ 0x3f, 0xfc, 0x1f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 150 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1c, 0x00, 0x0e, 0x00, -+ 0x07, 0x00, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x1c, -+ 0x3f, 0xfc, 0x1f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 151 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1c, 0x70, 0x1c, 0x70, -+ 0x1c, 0x70, 0x1c, 0x70, 0x00, 0x00, 0x00, 0x00, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x1c, -+ 0x3f, 0xfc, 0x1f, 0xfc, 0x00, 0x1c, 0x00, 0x1c, -+ 0x00, 0x3c, 0x3f, 0xf8, 0x3f, 0xf0, 0x00, 0x00, /* 152 */ -+ 0x00, 0x00, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, -+ 0x1c, 0x70, 0x00, 0x00, 0x1f, 0xf0, 0x3f, 0xf8, -+ 0x78, 0x3c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x3c, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 153 */ -+ 0x00, 0x00, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, -+ 0x1c, 0x70, 0x00, 0x00, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x3c, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 154 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x1f, 0xf0, 0x3f, 0xf8, 0x7b, 0xbc, 0x73, 0x9c, -+ 0x73, 0x80, 0x73, 0x80, 0x73, 0x80, 0x73, 0x80, -+ 0x73, 0x80, 0x73, 0x80, 0x73, 0x9c, 0x7b, 0xbc, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 155 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x07, 0xe0, 0x0f, 0xf0, -+ 0x1e, 0x78, 0x1c, 0x38, 0x1c, 0x00, 0x1c, 0x00, -+ 0x1c, 0x00, 0x1c, 0x00, 0x1c, 0x00, 0x7f, 0xe0, -+ 0x7f, 0xe0, 0x1c, 0x00, 0x1c, 0x00, 0x1c, 0x00, -+ 0x1c, 0x00, 0x1c, 0x00, 0x1c, 0x1c, 0x1c, 0x1c, -+ 0x7f, 0xfc, 0x7f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 156 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x70, 0x1c, 0x70, 0x1c, -+ 0x38, 0x38, 0x38, 0x38, 0x1c, 0x70, 0x1c, 0x70, -+ 0x0e, 0xe0, 0x0e, 0xe0, 0x07, 0xc0, 0x07, 0xc0, -+ 0x03, 0x80, 0x03, 0x80, 0x3f, 0xf8, 0x3f, 0xf8, -+ 0x03, 0x80, 0x03, 0x80, 0x3f, 0xf8, 0x3f, 0xf8, -+ 0x03, 0x80, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 157 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0xff, 0x00, 0xff, 0x80, -+ 0xe3, 0xc0, 0xe1, 0xc0, 0xe1, 0xc0, 0xe1, 0xc0, -+ 0xe1, 0xc0, 0xe1, 0xc0, 0xe3, 0xc0, 0xff, 0xf0, -+ 0xff, 0x70, 0xe0, 0x70, 0xe3, 0xfe, 0xe3, 0xfe, -+ 0xe0, 0x70, 0xe0, 0x70, 0xe0, 0x70, 0xe0, 0x70, -+ 0xe0, 0x7e, 0xe0, 0x3e, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 158 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x01, 0xf8, 0x03, 0xfc, -+ 0x03, 0x9c, 0x03, 0x9c, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x1f, 0xf0, 0x1f, 0xf0, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x73, 0x80, 0x73, 0x80, -+ 0x7f, 0x80, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, /* 159 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0xe0, -+ 0x01, 0xc0, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x3f, 0xf0, 0x3f, 0xf8, 0x00, 0x3c, 0x00, 0x1c, -+ 0x00, 0x1c, 0x1f, 0xfc, 0x3f, 0xfc, 0x78, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x1c, -+ 0x3f, 0xfc, 0x1f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 160 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0xe0, -+ 0x01, 0xc0, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x0f, 0x80, 0x0f, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x0f, 0xe0, 0x0f, 0xe0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 161 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0xe0, -+ 0x01, 0xc0, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x1f, 0xf0, 0x3f, 0xf8, 0x78, 0x3c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x3c, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 162 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0xe0, -+ 0x01, 0xc0, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x1c, -+ 0x3f, 0xfc, 0x1f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 163 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1f, 0x38, 0x3b, 0xb8, -+ 0x3b, 0xb8, 0x39, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x7f, 0xf0, 0x7f, 0xf8, 0x70, 0x3c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 164 */ -+ 0x00, 0x00, 0x1f, 0x38, 0x3b, 0xb8, 0x3b, 0xb8, -+ 0x39, 0xf0, 0x00, 0x00, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x1c, -+ 0x7c, 0x1c, 0x7e, 0x1c, 0x77, 0x1c, 0x73, 0x9c, -+ 0x71, 0xdc, 0x70, 0xfc, 0x70, 0x7c, 0x70, 0x3c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 165 */ -+ 0x00, 0x00, 0x00, 0x00, 0x1f, 0xe0, 0x1f, 0xf0, -+ 0x00, 0x38, 0x00, 0x38, 0x0f, 0xf8, 0x1f, 0xf8, -+ 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x1f, 0xf8, -+ 0x0f, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x3f, 0xf8, -+ 0x3f, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 166 */ -+ 0x00, 0x00, 0x00, 0x00, 0x0f, 0xe0, 0x1f, 0xf0, -+ 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, -+ 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x1f, 0xf0, -+ 0x0f, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x3f, 0xf8, -+ 0x3f, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 167 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x07, 0x00, -+ 0x0e, 0x00, 0x1c, 0x00, 0x38, 0x00, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x3c, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 168 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x7f, 0xfc, 0x7f, 0xfc, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 169 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x7f, 0xfc, 0x7f, 0xfc, 0x00, 0x1c, 0x00, 0x1c, -+ 0x00, 0x1c, 0x00, 0x1c, 0x00, 0x1c, 0x00, 0x1c, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 170 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1c, 0x00, 0x3c, 0x00, -+ 0x7c, 0x06, 0x1c, 0x0e, 0x1c, 0x1c, 0x1c, 0x38, -+ 0x1c, 0x70, 0x1c, 0xe0, 0x1d, 0xc0, 0x03, 0x80, -+ 0x07, 0x00, 0x0e, 0xfc, 0x1d, 0xfe, 0x39, 0xce, -+ 0x71, 0xce, 0x60, 0x1c, 0x00, 0x38, 0x00, 0x70, -+ 0x00, 0xfe, 0x01, 0xfe, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 171 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x0e, 0x00, 0x1e, 0x00, -+ 0x3e, 0x00, 0x0e, 0x00, 0x0e, 0x06, 0x0e, 0x0e, -+ 0x0e, 0x1c, 0x0e, 0x38, 0x0e, 0x70, 0x00, 0xe0, -+ 0x01, 0xce, 0x03, 0x9e, 0x07, 0x3e, 0x0e, 0x7e, -+ 0x1c, 0xee, 0x39, 0xce, 0x73, 0xfe, 0x63, 0xfe, -+ 0x00, 0x0e, 0x00, 0x0e, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 172 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 173 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x01, 0xce, 0x03, 0x9c, 0x07, 0x38, 0x0e, 0x70, -+ 0x1c, 0xe0, 0x39, 0xc0, 0x73, 0x80, 0x73, 0x80, -+ 0x39, 0xc0, 0x1c, 0xe0, 0x0e, 0x70, 0x07, 0x38, -+ 0x03, 0x9c, 0x01, 0xce, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 174 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x73, 0x80, 0x39, 0xc0, 0x1c, 0xe0, 0x0e, 0x70, -+ 0x07, 0x38, 0x03, 0x9c, 0x01, 0xce, 0x01, 0xce, -+ 0x03, 0x9c, 0x07, 0x38, 0x0e, 0x70, 0x1c, 0xe0, -+ 0x39, 0xc0, 0x73, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 175 */ -+ 0xaa, 0xaa, 0x00, 0x00, 0xaa, 0xaa, 0x00, 0x00, -+ 0xaa, 0xaa, 0x00, 0x00, 0xaa, 0xaa, 0x00, 0x00, -+ 0xaa, 0xaa, 0x00, 0x00, 0xaa, 0xaa, 0x00, 0x00, -+ 0xaa, 0xaa, 0x00, 0x00, 0xaa, 0xaa, 0x00, 0x00, -+ 0xaa, 0xaa, 0x00, 0x00, 0xaa, 0xaa, 0x00, 0x00, -+ 0xaa, 0xaa, 0x00, 0x00, 0xaa, 0xaa, 0x00, 0x00, -+ 0xaa, 0xaa, 0x00, 0x00, 0xaa, 0xaa, 0x00, 0x00, -+ 0xaa, 0xaa, 0x00, 0x00, 0xaa, 0xaa, 0x00, 0x00, /* 176 */ -+ 0xaa, 0xaa, 0x55, 0x55, 0xaa, 0xaa, 0x55, 0x55, -+ 0xaa, 0xaa, 0x55, 0x55, 0xaa, 0xaa, 0x55, 0x55, -+ 0xaa, 0xaa, 0x55, 0x55, 0xaa, 0xaa, 0x55, 0x55, -+ 0xaa, 0xaa, 0x55, 0x55, 0xaa, 0xaa, 0x55, 0x55, -+ 0xaa, 0xaa, 0x55, 0x55, 0xaa, 0xaa, 0x55, 0x55, -+ 0xaa, 0xaa, 0x55, 0x55, 0xaa, 0xaa, 0x55, 0x55, -+ 0xaa, 0xaa, 0x55, 0x55, 0xaa, 0xaa, 0x55, 0x55, -+ 0xaa, 0xaa, 0x55, 0x55, 0xaa, 0xaa, 0x55, 0x55, /* 177 */ -+ 0xff, 0xff, 0xaa, 0xaa, 0xff, 0xff, 0xaa, 0xaa, -+ 0xff, 0xff, 0xaa, 0xaa, 0xff, 0xff, 0xaa, 0xaa, -+ 0xff, 0xff, 0xaa, 0xaa, 0xff, 0xff, 0xaa, 0xaa, -+ 0xff, 0xff, 0xaa, 0xaa, 0xff, 0xff, 0xaa, 0xaa, -+ 0xff, 0xff, 0xaa, 0xaa, 0xff, 0xff, 0xaa, 0xaa, -+ 0xff, 0xff, 0xaa, 0xaa, 0xff, 0xff, 0xaa, 0xaa, -+ 0xff, 0xff, 0xaa, 0xaa, 0xff, 0xff, 0xaa, 0xaa, -+ 0xff, 0xff, 0xaa, 0xaa, 0xff, 0xff, 0xaa, 0xaa, /* 178 */ -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, /* 179 */ -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0xff, 0x80, 0xff, 0x80, -+ 0xff, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, /* 180 */ -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0xff, 0x80, 0xff, 0x80, 0xff, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0xff, 0x80, 0xff, 0x80, 0xff, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, /* 181 */ -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0xfe, 0x70, 0xfe, 0x70, -+ 0xfe, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, /* 182 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0xff, 0xf0, 0xff, 0xf0, -+ 0xff, 0xf0, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, /* 183 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0xff, 0x80, 0xff, 0x80, 0xff, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0xff, 0x80, 0xff, 0x80, 0xff, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, /* 184 */ -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0xfe, 0x70, 0xfe, 0x70, 0xfe, 0x70, 0x00, 0x70, -+ 0x00, 0x70, 0xfe, 0x70, 0xfe, 0x70, 0xfe, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, /* 185 */ -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, /* 186 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0xff, 0xf0, 0xff, 0xf0, 0xff, 0xf0, 0x00, 0x70, -+ 0x00, 0x70, 0xfe, 0x70, 0xfe, 0x70, 0xfe, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, /* 187 */ -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0xfe, 0x70, 0xfe, 0x70, 0xfe, 0x70, 0x00, 0x70, -+ 0x00, 0x70, 0xff, 0xf0, 0xff, 0xf0, 0xff, 0xf0, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 188 */ -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0xff, 0xf0, 0xff, 0xf0, -+ 0xff, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 189 */ -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0xff, 0x80, 0xff, 0x80, 0xff, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0xff, 0x80, 0xff, 0x80, 0xff, 0x80, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 190 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0xff, 0x80, 0xff, 0x80, -+ 0xff, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, /* 191 */ -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0xff, 0x03, 0xff, -+ 0x03, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 192 */ -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 193 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, /* 194 */ -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0xff, 0x03, 0xff, -+ 0x03, 0xff, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, /* 195 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 196 */ -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, /* 197 */ -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0xff, 0x03, 0xff, 0x03, 0xff, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0xff, 0x03, 0xff, 0x03, 0xff, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, /* 198 */ -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x7f, 0x0e, 0x7f, -+ 0x0e, 0x7f, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, /* 199 */ -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x7f, 0x0e, 0x7f, 0x0e, 0x7f, 0x0e, 0x00, -+ 0x0e, 0x00, 0x0f, 0xff, 0x0f, 0xff, 0x0f, 0xff, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 200 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x0f, 0xff, 0x0f, 0xff, 0x0f, 0xff, 0x0e, 0x00, -+ 0x0e, 0x00, 0x0e, 0x7f, 0x0e, 0x7f, 0x0e, 0x7f, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, /* 201 */ -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0xfe, 0x7f, 0xfe, 0x7f, 0xfe, 0x7f, 0x00, 0x00, -+ 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 202 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, -+ 0x00, 0x00, 0xfe, 0x7f, 0xfe, 0x7f, 0xfe, 0x7f, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, /* 203 */ -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x7f, 0x0e, 0x7f, 0x0e, 0x7f, 0x0e, 0x00, -+ 0x0e, 0x00, 0x0e, 0x7f, 0x0e, 0x7f, 0x0e, 0x7f, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, /* 204 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, -+ 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 205 */ -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0xfe, 0x7f, 0xfe, 0x7f, 0xfe, 0x7f, 0x00, 0x00, -+ 0x00, 0x00, 0xfe, 0x7f, 0xfe, 0x7f, 0xfe, 0x7f, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, /* 206 */ -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, -+ 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 207 */ -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 208 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, -+ 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, /* 209 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, /* 210 */ -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0f, 0xff, 0x0f, 0xff, -+ 0x0f, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 211 */ -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0xff, 0x03, 0xff, 0x03, 0xff, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0xff, 0x03, 0xff, 0x03, 0xff, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 212 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x03, 0xff, 0x03, 0xff, 0x03, 0xff, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0xff, 0x03, 0xff, 0x03, 0xff, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, /* 213 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x0f, 0xff, 0x0f, 0xff, -+ 0x0f, 0xff, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, /* 214 */ -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, -+ 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, 0x0e, 0x70, /* 215 */ -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x03, 0x80, -+ 0x03, 0x80, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, /* 216 */ -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0xff, 0x80, 0xff, 0x80, -+ 0xff, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 217 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0xff, 0x03, 0xff, -+ 0x03, 0xff, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, /* 218 */ -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 219 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 220 */ -+ 0xff, 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, 0x00, -+ 0xff, 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, 0x00, -+ 0xff, 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, 0x00, -+ 0xff, 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, 0x00, -+ 0xff, 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, 0x00, -+ 0xff, 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, 0x00, -+ 0xff, 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, 0x00, -+ 0xff, 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, 0x00, /* 221 */ -+ 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, -+ 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, -+ 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, -+ 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, -+ 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, -+ 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, -+ 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, -+ 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, /* 222 */ -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 223 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x1f, 0xee, 0x3f, 0xfe, 0x78, 0x3c, 0x70, 0x38, -+ 0x70, 0x38, 0x70, 0x38, 0x70, 0x38, 0x70, 0x38, -+ 0x70, 0x38, 0x70, 0x38, 0x70, 0x38, 0x78, 0x3c, -+ 0x3f, 0xfe, 0x1f, 0xee, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 224 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x3f, 0xe0, 0x7f, 0xf0, -+ 0x70, 0x78, 0x70, 0x38, 0x70, 0x38, 0x70, 0x38, -+ 0x70, 0x38, 0x70, 0x70, 0x7f, 0xf0, 0x7f, 0xf0, -+ 0x70, 0x38, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x3c, -+ 0x7f, 0xf8, 0x7f, 0xf0, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x00, 0x00, /* 225 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x7f, 0xfc, 0x7f, 0xfc, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 226 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x7f, 0xfc, 0x7f, 0xfc, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 227 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x7f, 0xfc, 0x7f, 0xfc, -+ 0x70, 0x00, 0x38, 0x00, 0x1c, 0x00, 0x0e, 0x00, -+ 0x07, 0x00, 0x03, 0x80, 0x01, 0xc0, 0x00, 0xe0, -+ 0x00, 0xe0, 0x01, 0xc0, 0x03, 0x80, 0x07, 0x00, -+ 0x0e, 0x00, 0x1c, 0x00, 0x38, 0x00, 0x70, 0x00, -+ 0x7f, 0xfc, 0x7f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 228 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x1f, 0xfe, 0x3f, 0xfe, 0x78, 0xf0, 0x70, 0x78, -+ 0x70, 0x3c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x3c, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 229 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x3c, 0x70, 0x7c, 0x70, 0xfc, -+ 0x7f, 0xdc, 0x7f, 0x9c, 0x70, 0x00, 0x70, 0x00, -+ 0x70, 0x00, 0x70, 0x00, 0x70, 0x00, 0x00, 0x00, /* 230 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x7f, 0xfc, 0x7f, 0xfc, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0xc0, -+ 0x01, 0xf8, 0x00, 0xf8, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 231 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x03, 0x80, -+ 0x1f, 0xf0, 0x3f, 0xf8, 0x7b, 0xbc, 0x73, 0x9c, -+ 0x73, 0x9c, 0x73, 0x9c, 0x73, 0x9c, 0x73, 0x9c, -+ 0x73, 0x9c, 0x73, 0x9c, 0x73, 0x9c, 0x73, 0x9c, -+ 0x73, 0x9c, 0x7b, 0xbc, 0x3f, 0xf8, 0x1f, 0xf0, -+ 0x03, 0x80, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 232 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1f, 0xf0, 0x3f, 0xf8, -+ 0x78, 0x3c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x77, 0xdc, -+ 0x77, 0xdc, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x3c, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 233 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1f, 0xf0, 0x3f, 0xf8, -+ 0x78, 0x3c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x38, 0x38, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, -+ 0x7c, 0x7c, 0x7c, 0x7c, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 234 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1f, 0xf0, 0x1f, 0xf0, -+ 0x0e, 0x00, 0x07, 0x00, 0x03, 0x80, 0x01, 0xc0, -+ 0x0f, 0xe0, 0x1f, 0xf0, 0x38, 0x38, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x78, 0x3c, -+ 0x3f, 0xf8, 0x1f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 235 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, 0xf8, -+ 0x7f, 0xfc, 0xe7, 0xce, 0xe3, 0x8e, 0xe3, 0x8e, -+ 0xe3, 0x8e, 0xe3, 0x8e, 0xe7, 0xce, 0x7f, 0xfc, -+ 0x3e, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 236 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, 0x00, 0x1c, -+ 0x00, 0x38, 0x00, 0x38, 0x0f, 0xf0, 0x1f, 0xf8, -+ 0x38, 0xfc, 0x38, 0xfc, 0x39, 0xdc, 0x39, 0xdc, -+ 0x3b, 0x9c, 0x3b, 0x9c, 0x3f, 0x1c, 0x3f, 0x1c, -+ 0x1f, 0xf8, 0x0f, 0xf0, 0x1c, 0x00, 0x1c, 0x00, -+ 0x38, 0x00, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 237 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x07, 0xfc, 0x1f, 0xfc, 0x3c, 0x00, -+ 0x38, 0x00, 0x70, 0x00, 0x70, 0x00, 0x7f, 0xfc, -+ 0x7f, 0xfc, 0x70, 0x00, 0x70, 0x00, 0x38, 0x00, -+ 0x3c, 0x00, 0x1f, 0xfc, 0x07, 0xfc, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 238 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x07, 0xc0, 0x1f, 0xf0, -+ 0x3c, 0x78, 0x38, 0x38, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, -+ 0x70, 0x1c, 0x70, 0x1c, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 239 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x7f, 0xfc, 0x7f, 0xfc, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f, 0xfc, -+ 0x7f, 0xfc, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x7f, 0xfc, 0x7f, 0xfc, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 240 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x7f, 0xfc, -+ 0x7f, 0xfc, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x7f, 0xfc, 0x7f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 241 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1c, 0x00, 0x0e, 0x00, -+ 0x07, 0x00, 0x03, 0x80, 0x01, 0xc0, 0x00, 0xe0, -+ 0x00, 0x70, 0x00, 0x38, 0x00, 0x38, 0x00, 0x70, -+ 0x00, 0xe0, 0x01, 0xc0, 0x03, 0x80, 0x07, 0x00, -+ 0x0e, 0x00, 0x1c, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x3f, 0xfc, 0x3f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 242 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x00, 0x70, -+ 0x00, 0xe0, 0x01, 0xc0, 0x03, 0x80, 0x07, 0x00, -+ 0x0e, 0x00, 0x1c, 0x00, 0x1c, 0x00, 0x0e, 0x00, -+ 0x07, 0x00, 0x03, 0x80, 0x01, 0xc0, 0x00, 0xe0, -+ 0x00, 0x70, 0x00, 0x38, 0x00, 0x00, 0x00, 0x00, -+ 0x3f, 0xfc, 0x3f, 0xfc, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 243 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x01, 0xf8, 0x03, 0xfc, -+ 0x03, 0x9c, 0x03, 0x9c, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, /* 244 */ -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x73, 0x80, 0x73, 0x80, -+ 0x7f, 0x80, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 245 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, 0x7f, 0xfc, -+ 0x7f, 0xfc, 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 246 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, 0x1c, -+ 0x7f, 0xbc, 0x7b, 0xfc, 0x70, 0xf8, 0x00, 0x00, -+ 0x00, 0x00, 0x3e, 0x1c, 0x7f, 0xbc, 0x7b, 0xfc, -+ 0x70, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 247 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x0f, 0xe0, 0x1f, 0xf0, 0x1c, 0x70, 0x1c, 0x70, -+ 0x1c, 0x70, 0x1c, 0x70, 0x1f, 0xf0, 0x0f, 0xe0, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 248 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x03, 0xc0, 0x07, 0xe0, 0x07, 0xe0, -+ 0x07, 0xe0, 0x07, 0xe0, 0x03, 0xc0, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 249 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x03, 0x80, -+ 0x03, 0x80, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 250 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, -+ 0x00, 0x3e, 0x00, 0x38, 0x00, 0x38, 0x00, 0x38, -+ 0x00, 0x38, 0x00, 0x38, 0x00, 0x38, 0x00, 0x38, -+ 0x00, 0x38, 0x00, 0x38, 0x00, 0x38, 0x70, 0x38, -+ 0x70, 0x38, 0x70, 0x38, 0x78, 0x38, 0x3c, 0x38, -+ 0x1e, 0x38, 0x0f, 0x38, 0x07, 0xb8, 0x03, 0xf8, -+ 0x01, 0xf8, 0x00, 0xf8, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 251 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x1f, 0xe0, 0x1f, 0xf0, 0x1c, 0x38, 0x1c, 0x38, -+ 0x1c, 0x38, 0x1c, 0x38, 0x1c, 0x38, 0x1c, 0x38, -+ 0x1c, 0x38, 0x1c, 0x38, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 252 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 0xe0, -+ 0x1f, 0xf0, 0x1c, 0x70, 0x1c, 0x70, 0x00, 0xe0, -+ 0x01, 0xc0, 0x03, 0x80, 0x07, 0x00, 0x0e, 0x00, -+ 0x1f, 0xf0, 0x1f, 0xf0, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 253 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1f, 0xf8, 0x1f, 0xf8, -+ 0x1f, 0xf8, 0x1f, 0xf8, 0x1f, 0xf8, 0x1f, 0xf8, -+ 0x1f, 0xf8, 0x1f, 0xf8, 0x1f, 0xf8, 0x1f, 0xf8, -+ 0x1f, 0xf8, 0x1f, 0xf8, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 254 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 255 */ -+}; -+ -+#endif -diff --git a/lib/Kconfig b/lib/Kconfig -index 83e5edd73b..202a34ab41 100644 ---- a/lib/Kconfig -+++ b/lib/Kconfig -@@ -16,7 +16,7 @@ config SYS_NUM_ADDR_MAP - Sets the number of entries in the virtual-physical mapping table. - - config SYS_TIMER_COUNTS_DOWN -- bool "System timer counts down rathe than up" -+ bool "System timer counts down rather than up" - - config PHYSMEM - bool "Access to physical memory region (> 4G)" -@@ -74,6 +74,10 @@ config HAVE_PRIVATE_LIBGCC - config LIB_UUID - bool - -+config SPL_LIB_UUID -+ depends on SPL -+ bool -+ - config SEMIHOSTING - bool "Support semihosting" - depends on ARM || RISCV -@@ -579,6 +583,26 @@ config SPL_SHA_PROG_HW_ACCEL - - endif - -+config VPL_SHA1 -+ bool "Enable SHA1 support in VPL" -+ depends on VPL -+ default y if SHA1 -+ help -+ This option enables support of hashing using SHA1 algorithm. -+ The hash is calculated in software. -+ The SHA1 algorithm produces a 160-bit (20-byte) hash value -+ (digest). -+ -+config VPL_SHA256 -+ bool "Enable SHA256 support in VPL" -+ depends on VPL -+ default y if SHA256 -+ help -+ This option enables support of hashing using SHA256 algorithm. -+ The hash is calculated in software. -+ The SHA256 algorithm produces a 256-bit (32-byte) hash value -+ (digest). -+ - if SHA_HW_ACCEL - - config SHA512_HW_ACCEL -@@ -727,6 +751,12 @@ config ZSTD_LIB_MINIFY - - endif - -+config SPL_BZIP2 -+ bool "Enable bzip2 decompression support for SPL build" -+ depends on SPL -+ help -+ This enables support for bzip2 compression algorithm for SPL boot. -+ - config SPL_LZ4 - bool "Enable LZ4 decompression support in SPL" - depends on SPL -diff --git a/lib/Makefile b/lib/Makefile -index a282e40258..10aa7ac029 100644 ---- a/lib/Makefile -+++ b/lib/Makefile -@@ -127,7 +127,7 @@ obj-$(CONFIG_LIB_UUID) += uuid.o - obj-$(CONFIG_LIB_RAND) += rand.o - obj-y += panic.o - --ifeq ($(CONFIG_$(SPL_TPL_)BUILD),y) -+ifeq ($(CONFIG_SPL_BUILD),y) - # SPL U-Boot may use full-printf, tiny-printf or none at all - ifdef CONFIG_$(SPL_TPL_)USE_TINY_PRINTF - obj-$(CONFIG_$(SPL_TPL_)SPRINTF) += tiny-printf.o -diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c -index 8a65dda883..ea097839db 100644 ---- a/lib/efi_loader/efi_device_path.c -+++ b/lib/efi_loader/efi_device_path.c -@@ -63,20 +63,6 @@ static bool is_sd(struct blk_desc *desc) - } - #endif - --static void *dp_alloc(size_t sz) --{ -- void *buf; -- -- if (efi_allocate_pool(EFI_BOOT_SERVICES_DATA, sz, &buf) != -- EFI_SUCCESS) { -- debug("EFI: ERROR: out of memory in %s\n", __func__); -- return NULL; -- } -- -- memset(buf, 0, sz); -- return buf; --} -- - /* - * Iterate to next block in device-path, terminating (returning NULL) - * at /End* node. -@@ -293,7 +279,7 @@ struct efi_device_path *efi_dp_dup(const struct efi_device_path *dp) - if (!dp) - return NULL; - -- ndp = dp_alloc(sz); -+ ndp = efi_alloc(sz); - if (!ndp) - return NULL; - memcpy(ndp, dp, sz); -@@ -337,7 +323,7 @@ efi_device_path *efi_dp_append_or_concatenate(const struct efi_device_path *dp1, - /* both dp1 and dp2 are non-null */ - unsigned sz1 = efi_dp_size(dp1); - unsigned sz2 = efi_dp_size(dp2); -- void *p = dp_alloc(sz1 + sz2 + end_size); -+ void *p = efi_alloc(sz1 + sz2 + end_size); - if (!p) - return NULL; - ret = p; -@@ -400,7 +386,7 @@ struct efi_device_path *efi_dp_append_node(const struct efi_device_path *dp, - ret = efi_dp_dup(dp); - } else if (!dp) { - size_t sz = node->length; -- void *p = dp_alloc(sz + sizeof(END)); -+ void *p = efi_alloc(sz + sizeof(END)); - if (!p) - return NULL; - memcpy(p, node, sz); -@@ -409,7 +395,7 @@ struct efi_device_path *efi_dp_append_node(const struct efi_device_path *dp, - } else { - /* both dp and node are non-null */ - size_t sz = efi_dp_size(dp); -- void *p = dp_alloc(sz + node->length + sizeof(END)); -+ void *p = efi_alloc(sz + node->length + sizeof(END)); - if (!p) - return NULL; - memcpy(p, dp, sz); -@@ -430,7 +416,7 @@ struct efi_device_path *efi_dp_create_device_node(const u8 type, - if (length < sizeof(struct efi_device_path)) - return NULL; - -- ret = dp_alloc(length); -+ ret = efi_alloc(length); - if (!ret) - return ret; - ret->type = type; -@@ -452,7 +438,7 @@ struct efi_device_path *efi_dp_append_instance( - return efi_dp_dup(dpi); - sz = efi_dp_size(dp); - szi = efi_dp_instance_size(dpi); -- p = dp_alloc(sz + szi + 2 * sizeof(END)); -+ p = efi_alloc(sz + szi + 2 * sizeof(END)); - if (!p) - return NULL; - ret = p; -@@ -477,7 +463,7 @@ struct efi_device_path *efi_dp_get_next_instance(struct efi_device_path **dp, - if (!dp || !*dp) - return NULL; - sz = efi_dp_instance_size(*dp); -- p = dp_alloc(sz + sizeof(END)); -+ p = efi_alloc(sz + sizeof(END)); - if (!p) - return NULL; - memcpy(p, *dp, sz + sizeof(END)); -@@ -918,7 +904,7 @@ struct efi_device_path *efi_dp_from_part(struct blk_desc *desc, int part) - { - void *buf, *start; - -- start = buf = dp_alloc(dp_part_size(desc, part) + sizeof(END)); -+ start = buf = efi_alloc(dp_part_size(desc, part) + sizeof(END)); - if (!buf) - return NULL; - -@@ -945,7 +931,7 @@ struct efi_device_path *efi_dp_part_node(struct blk_desc *desc, int part) - dpsize = sizeof(struct efi_device_path_cdrom_path); - else - dpsize = sizeof(struct efi_device_path_hard_drive_path); -- buf = dp_alloc(dpsize); -+ buf = efi_alloc(dpsize); - - if (buf) - dp_part_node(buf, desc, part); -@@ -1019,7 +1005,7 @@ struct efi_device_path *efi_dp_from_file(struct blk_desc *desc, int part, - - dpsize += fpsize; - -- start = buf = dp_alloc(dpsize + sizeof(END)); -+ start = buf = efi_alloc(dpsize + sizeof(END)); - if (!buf) - return NULL; - -@@ -1047,7 +1033,7 @@ struct efi_device_path *efi_dp_from_uart(void) - struct efi_device_path_uart *uart; - size_t dpsize = sizeof(ROOT) + sizeof(*uart) + sizeof(END); - -- buf = dp_alloc(dpsize); -+ buf = efi_alloc(dpsize); - if (!buf) - return NULL; - pos = buf; -@@ -1073,7 +1059,7 @@ struct efi_device_path *efi_dp_from_eth(void) - - dpsize += dp_size(eth_get_dev()); - -- start = buf = dp_alloc(dpsize + sizeof(END)); -+ start = buf = efi_alloc(dpsize + sizeof(END)); - if (!buf) - return NULL; - -@@ -1093,7 +1079,7 @@ struct efi_device_path *efi_dp_from_mem(uint32_t memory_type, - struct efi_device_path_memory *mdp; - void *buf, *start; - -- start = buf = dp_alloc(sizeof(*mdp) + sizeof(END)); -+ start = buf = efi_alloc(sizeof(*mdp) + sizeof(END)); - if (!buf) - return NULL; - -diff --git a/lib/efi_loader/efi_device_path_to_text.c b/lib/efi_loader/efi_device_path_to_text.c -index 4b2ade3803..8c76d8be60 100644 ---- a/lib/efi_loader/efi_device_path_to_text.c -+++ b/lib/efi_loader/efi_device_path_to_text.c -@@ -32,11 +32,10 @@ static u16 *efi_str_to_u16(char *str) - { - efi_uintn_t len; - u16 *out, *dst; -- efi_status_t ret; - - len = sizeof(u16) * (utf8_utf16_strlen(str) + 1); -- ret = efi_allocate_pool(EFI_BOOT_SERVICES_DATA, len, (void **)&out); -- if (ret != EFI_SUCCESS) -+ out = efi_alloc(len); -+ if (!out) - return NULL; - dst = out; - utf8_utf16_strcpy(&dst, str); -diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c -index b7bee98f79..8f82496740 100644 ---- a/lib/efi_loader/efi_memory.c -+++ b/lib/efi_loader/efi_memory.c -@@ -5,9 +5,12 @@ - * Copyright (c) 2016 Alexander Graf - */ - -+#define LOG_CATEGORY LOGC_EFI -+ - #include - #include - #include -+#include - #include - #include - #include -@@ -533,27 +536,6 @@ efi_status_t efi_allocate_pages(enum efi_allocate_type type, - return EFI_SUCCESS; - } - --/** -- * efi_alloc() - allocate memory pages -- * -- * @len: size of the memory to be allocated -- * @memory_type: usage type of the allocated memory -- * Return: pointer to the allocated memory area or NULL -- */ --void *efi_alloc(uint64_t len, int memory_type) --{ -- uint64_t ret = 0; -- uint64_t pages = efi_size_in_pages(len); -- efi_status_t r; -- -- r = efi_allocate_pages(EFI_ALLOCATE_ANY_PAGES, memory_type, pages, -- &ret); -- if (r == EFI_SUCCESS) -- return (void*)(uintptr_t)ret; -- -- return NULL; --} -- - /** - * efi_free_pages() - free memory pages - * -@@ -672,6 +654,28 @@ efi_status_t efi_allocate_pool(enum efi_memory_type pool_type, efi_uintn_t size, - return r; - } - -+/** -+ * efi_alloc() - allocate boot services data pool memory -+ * -+ * Allocate memory from pool and zero it out. -+ * -+ * @size: number of bytes to allocate -+ * Return: pointer to allocated memory or NULL -+ */ -+void *efi_alloc(size_t size) -+{ -+ void *buf; -+ -+ if (efi_allocate_pool(EFI_BOOT_SERVICES_DATA, size, &buf) != -+ EFI_SUCCESS) { -+ log_err("out of memory"); -+ return NULL; -+ } -+ memset(buf, 0, size); -+ -+ return buf; -+} -+ - /** - * efi_free_pool() - free memory from pool - * -diff --git a/lib/efi_loader/efi_tcg2.c b/lib/efi_loader/efi_tcg2.c -index 2dcc317157..a83ae7a46c 100644 ---- a/lib/efi_loader/efi_tcg2.c -+++ b/lib/efi_loader/efi_tcg2.c -@@ -2495,7 +2495,7 @@ efi_status_t efi_tcg2_register(void) - } - - /* initialize the TPM as early as possible. */ -- err = tpm_startup(dev, TPM_ST_CLEAR); -+ err = tpm_auto_start(dev); - if (err) { - log_err("TPM startup failed\n"); - goto fail; -diff --git a/lib/libavb/avb_cmdline.c b/lib/libavb/avb_cmdline.c -index cb54e658c4..a58ce6c48c 100644 ---- a/lib/libavb/avb_cmdline.c -+++ b/lib/libavb/avb_cmdline.c -@@ -394,7 +394,7 @@ out: - return ret; - } - --AvbCmdlineSubstList* avb_new_cmdline_subst_list() { -+AvbCmdlineSubstList* avb_new_cmdline_subst_list(void) { - return (AvbCmdlineSubstList*)avb_calloc(sizeof(AvbCmdlineSubstList)); - } - -diff --git a/lib/tpm-v1.c b/lib/tpm-v1.c -index d0e3ab1b21..60a18ca504 100644 ---- a/lib/tpm-v1.c -+++ b/lib/tpm-v1.c -@@ -69,6 +69,20 @@ u32 tpm1_continue_self_test(struct udevice *dev) - return tpm_sendrecv_command(dev, command, NULL, NULL); - } - -+u32 tpm1_auto_start(struct udevice *dev) -+{ -+ u32 rc; -+ -+ rc = tpm1_startup(dev, TPM_ST_CLEAR); -+ /* continue on if the TPM is already inited */ -+ if (rc && rc != TPM_INVALID_POSTINIT) -+ return rc; -+ -+ rc = tpm1_self_test_full(dev); -+ -+ return rc; -+} -+ - u32 tpm1_clear_and_reenable(struct udevice *dev) - { - u32 ret; -diff --git a/lib/tpm-v2.c b/lib/tpm-v2.c -index 697b982e07..9ab5b46df1 100644 ---- a/lib/tpm-v2.c -+++ b/lib/tpm-v2.c -@@ -44,6 +44,23 @@ u32 tpm2_self_test(struct udevice *dev, enum tpm2_yes_no full_test) - return tpm_sendrecv_command(dev, command_v2, NULL, NULL); - } - -+u32 tpm2_auto_start(struct udevice *dev) -+{ -+ u32 rc; -+ -+ rc = tpm2_self_test(dev, TPMI_YES); -+ -+ if (rc == TPM2_RC_INITIALIZE) { -+ rc = tpm2_startup(dev, TPM2_SU_CLEAR); -+ if (rc) -+ return rc; -+ -+ rc = tpm2_self_test(dev, TPMI_YES); -+ } -+ -+ return rc; -+} -+ - u32 tpm2_clear(struct udevice *dev, u32 handle, const char *pw, - const ssize_t pw_sz) - { -diff --git a/lib/tpm_api.c b/lib/tpm_api.c -index 7e8df8795e..3ef5e81179 100644 ---- a/lib/tpm_api.c -+++ b/lib/tpm_api.c -@@ -35,6 +35,27 @@ u32 tpm_startup(struct udevice *dev, enum tpm_startup_type mode) - } - } - -+u32 tpm_auto_start(struct udevice *dev) -+{ -+ u32 rc; -+ -+ /* -+ * the tpm_init() will return -EBUSY if the init has already happened -+ * The selftest and startup code can run multiple times with no side -+ * effects -+ */ -+ rc = tpm_init(dev); -+ if (rc && rc != -EBUSY) -+ return rc; -+ -+ if (tpm_is_v1(dev)) -+ return tpm1_auto_start(dev); -+ else if (tpm_is_v2(dev)) -+ return tpm2_auto_start(dev); -+ else -+ return -ENOSYS; -+} -+ - u32 tpm_resume(struct udevice *dev) - { - if (tpm_is_v1(dev)) -diff --git a/lib/uuid.c b/lib/uuid.c -index 465e1ac38f..96e1af3c8b 100644 ---- a/lib/uuid.c -+++ b/lib/uuid.c -@@ -102,7 +102,7 @@ static const struct { - {"lvm", PARTITION_LINUX_LVM_GUID}, - {"u-boot-env", PARTITION_U_BOOT_ENVIRONMENT}, - #endif --#ifdef CONFIG_CMD_EFIDEBUG -+#if defined(CONFIG_CMD_EFIDEBUG) || defined(CONFIG_EFI) - { - "Device Path", - EFI_DEVICE_PATH_PROTOCOL_GUID, -@@ -255,6 +255,14 @@ static const struct { - EFI_CERT_TYPE_PKCS7_GUID, - }, - #endif -+#ifdef CONFIG_EFI -+ { "EFI_LZMA_COMPRESSED", EFI_LZMA_COMPRESSED }, -+ { "EFI_DXE_SERVICES", EFI_DXE_SERVICES }, -+ { "EFI_HOB_LIST", EFI_HOB_LIST }, -+ { "EFI_MEMORY_TYPE", EFI_MEMORY_TYPE }, -+ { "EFI_MEM_STATUS_CODE_REC", EFI_MEM_STATUS_CODE_REC }, -+ { "EFI_GUID_EFI_ACPI1", EFI_GUID_EFI_ACPI1 }, -+#endif - }; - - /* -diff --git a/lib/zlib/trees.c b/lib/zlib/trees.c -index 970bc5dbc6..e040617686 100644 ---- a/lib/zlib/trees.c -+++ b/lib/zlib/trees.c -@@ -237,7 +237,7 @@ local void send_bits(s, value, length) - /* =========================================================================== - * Initialize the various 'constant' tables. - */ --local void tr_static_init() -+local void tr_static_init(void) - { - #if defined(GEN_TREES_H) || !defined(STDC) - static int static_init_done = 0; -diff --git a/net/eth-uclass.c b/net/eth-uclass.c -index b01a910938..c393600fab 100644 ---- a/net/eth-uclass.c -+++ b/net/eth-uclass.c -@@ -49,6 +49,13 @@ struct eth_uclass_priv { - /* eth_errno - This stores the most recent failure code from DM functions */ - static int eth_errno; - -+/* board-specific Ethernet Interface initializations. */ -+__weak int board_interface_eth_init(struct udevice *dev, -+ phy_interface_t interface_type) -+{ -+ return 0; -+} -+ - static struct eth_uclass_priv *eth_get_uclass_priv(void) - { - struct uclass *uc; -diff --git a/net/mdio-uclass.c b/net/mdio-uclass.c -index d80037d0ac..e758cc66d7 100644 ---- a/net/mdio-uclass.c -+++ b/net/mdio-uclass.c -@@ -175,7 +175,7 @@ static struct phy_device *dm_eth_connect_phy_handle(struct udevice *ethdev, - struct phy_device *phy; - ofnode phynode; - -- if (CONFIG_IS_ENABLED(PHY_FIXED) && -+ if (IS_ENABLED(CONFIG_PHY_FIXED) && - ofnode_phy_is_fixed_link(dev_ofnode(ethdev), &phynode)) { - phy = phy_connect(NULL, 0, ethdev, interface); - goto out; -diff --git a/rock5b-rk3588.ini b/rock5b-rk3588.ini -new file mode 100755 -index 0000000000..bdf1f38a45 ---- /dev/null -+++ b/rock5b-rk3588.ini -@@ -0,0 +1,36 @@ -+[CHIP_NAME] -+NAME=RK3588 -+[VERSION] -+MAJOR=1 -+MINOR=11 -+[CODE471_OPTION] -+NUM=1 -+Path1=../rkbin/bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2736MHz_v1.08.bin -+Sleep=1 -+[CODE472_OPTION] -+NUM=1 -+Path1=spl/u-boot-spl.bin -+[LOADER_OPTION] -+NUM=2 -+LOADER1=FlashData -+LOADER2=FlashBoot -+FlashData=../rkbin/bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2736MHz_v1.08.bin -+FlashBoot=spl/u-boot-spl.bin -+[OUTPUT] -+PATH=rock5b-rk3588.bin -+[SYSTEM] -+NEWIDB=true -+[FLAG] -+471_RC4_OFF=true -+RC4_OFF=true -+[BOOT1_PARAM] -+WORD_0=0x0 -+WORD_1=0x0 -+WORD_2=0x0 -+WORD_3=0x0 -+WORD_4=0x0 -+WORD_5=0x0 -+WORD_6=0x0 -+WORD_7=0x0 -+ -+ -diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib -index ac45a88478..7b27224b5d 100644 ---- a/scripts/Makefile.lib -+++ b/scripts/Makefile.lib -@@ -585,24 +585,35 @@ cmd_mkimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -d $< $@ \ - # --------------------------------------------------------------------------- - # Pass the original device tree file through fdtgrep twice. The first pass - # removes any unwanted nodes (i.e. those which don't have the --# 'u-boot,dm-pre-reloc' property and thus are not needed by SPL. The second -+# 'bootph-all' property and thus are not needed by SPL. The second - # pass removes various unused properties from the remaining nodes. - # The output is typically a much smaller device tree file. -+ -+ifdef CONFIG_OF_TAG_MIGRATE -+# Support the old tags for a migration period -+migrate_tpl := -b u-boot,dm-pre-reloc -b u-boot,dm-tpl -+migrate_vpl := -b u-boot,dm-pre-reloc -b u-boot,dm-vpl -+migrate_spl := -b u-boot,dm-pre-reloc -b u-boot,dm-spl -+migrate_all := -P u-boot,dm-pre-reloc \ -+ -P u-boot,dm-spl -P u-boot,dm-tpl -P u-boot,dm-vpl -+endif -+ - ifeq ($(CONFIG_VPL_BUILD),y) --fdtgrep_props := -b u-boot,dm-pre-reloc -b u-boot,dm-vpl -+fdtgrep_props := -b bootph-all -b bootph-verify $(migrate_vpl) - else - ifeq ($(CONFIG_TPL_BUILD),y) --fdtgrep_props := -b u-boot,dm-pre-reloc -b u-boot,dm-tpl -+fdtgrep_props := -b bootph-all -b bootph-pre-sram $(migrate_tpl) - else --fdtgrep_props := -b u-boot,dm-pre-reloc -b u-boot,dm-spl -+fdtgrep_props := -b bootph-all -b bootph-pre-ram $(migrate_spl) - endif - endif - quiet_cmd_fdtgrep = FDTGREP $@ - cmd_fdtgrep = $(objtree)/tools/fdtgrep $(fdtgrep_props) -RT $< \ - -n /chosen -n /config -O dtb | \ - $(objtree)/tools/fdtgrep -r -O dtb - -o $@ \ -- -P u-boot,dm-pre-reloc -P u-boot,dm-spl -P u-boot,dm-tpl \ -- -P u-boot,dm-vpl \ -+ -P bootph-all -P bootph-pre-ram -P bootph-pre-sram \ -+ -P bootph-verify \ -+ $(migrate_all) \ - $(addprefix -P ,$(subst $\",,$(CONFIG_OF_SPL_REMOVE_PROPS))) - - # fdt_rm_props -diff --git a/scripts/build-efi.sh b/scripts/build-efi.sh -index bc9aeebbf4..6b7df2e9bf 100755 ---- a/scripts/build-efi.sh -+++ b/scripts/build-efi.sh -@@ -18,12 +18,15 @@ - # OVMF-pure-efi.x64.fd at - # https://drive.google.com/file/d/1c39YI9QtpByGQ4V0UNNQtGqttEzS-eFV/view?usp=sharing - -+bzimage_fname=/tmp/kernel/arch/x86/boot/bzImage -+ - set -e - - usage() { - echo "Usage: $0 [-a | -p] [other opts]" 1>&2 - echo 1>&2 - echo " -a - Package up the app" 1>&2 -+ echo " -k - Add a kernel" 1>&2 - echo " -o - Use old EFI app build (before 32/64 split)" 1>&2 - echo " -p - Package up the payload" 1>&2 - echo " -P - Create a partition table" 1>&2 -@@ -52,11 +55,14 @@ serial= - # before the 32/64 split of the app - old= - -+# package up a kernel as well -+kernel= -+ - # Set ubdir to the build directory where you build U-Boot out-of-tree - # We avoid in-tree build because it gets confusing trying different builds - ubdir=/tmp/b/ - --while getopts "aopPrsw" opt; do -+while getopts "akopPrsw" opt; do - case "${opt}" in - a) - type=app -@@ -64,6 +70,9 @@ while getopts "aopPrsw" opt; do - p) - type=payload - ;; -+ k) -+ kernel=1 -+ ;; - r) - run=1 - ;; -@@ -96,6 +105,8 @@ run_qemu() { - fi - if [[ -n "${serial}" ]]; then - extra="-display none -serial mon:stdio" -+ else -+ extra="-serial mon:stdio" - fi - echo "Running ${qemu}" - # Use 512MB since U-Boot EFI likes to have 256MB to play with -@@ -122,6 +133,9 @@ EOF - # Copy files into the filesystem - copy_files() { - sudo cp $TMP/* $MNT -+ if [[ -n "${kernel}" ]]; then -+ sudo cp ${bzimage_fname} $MNT/vmlinuz -+ fi - } - - # Create a filesystem on a raw device and copy in the files -diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl -index ccfcbb3e12..62b764f6c3 100755 ---- a/scripts/checkpatch.pl -+++ b/scripts/checkpatch.pl -@@ -2680,6 +2680,12 @@ sub u_boot_line { - "DEVICE_PRIV_AUTO", $herecurr); - u_boot_struct_name($line, "per_device_plat_auto", "_plat", - "DEVICE_PLAT_AUTO", $herecurr); -+ -+ # Avoid using the pre-schema driver model tags -+ if ($line =~ /^\+.*u-boot,dm-.*/) { -+ ERROR("PRE_SCHEMA", -+ "Driver model schema uses 'bootph-...' tags now\n" . $herecurr); -+ } - } - - sub exclude_global_initialisers { -diff --git a/scripts/event_dump.py b/scripts/event_dump.py -index d87823f374..0117457526 100755 ---- a/scripts/event_dump.py -+++ b/scripts/event_dump.py -@@ -15,7 +15,7 @@ src_path = os.path.dirname(our_path) - sys.path.insert(1, os.path.join(our_path, '../tools')) - - from binman import elf --from patman import tools -+from u_boot_pylib import tools - - # A typical symbol looks like this: - # _u_boot_list_2_evspy_info_2_EVT_MISC_INIT_F_3_sandbox_misc_init_f -diff --git a/scripts/make_pip.sh b/scripts/make_pip.sh -new file mode 100755 -index 0000000000..4602dcf61c ---- /dev/null -+++ b/scripts/make_pip.sh -@@ -0,0 +1,117 @@ -+#!/bin/bash -+# SPDX-License-Identifier: GPL-2.0+ -+ -+# Packages a U-Boot tool -+# -+# Usage: make_pip.sh [--real] -+# -+# Where tool_name is one of patman, buildman, dtoc, binman, u_boot_pylib -+# -+# and --real means to upload to the real server (otherwise the test one is used) -+# -+# The username for upload is always __token__ so set TWINE_PASSWORD to your -+# password before running this script: -+# -+# export TWINE_PASSWORD=pypi-xxx -+# -+# To test your new packages: -+# -+# pip install -i https://test.pypi.org/simple/ -+# -+ -+# DO NOT use patman or binman -+ -+set -xe -+ -+# Repo to upload to -+repo="--repository testpypi" -+ -+# Non-empty to do the actual upload -+upload=1 -+ -+tool="$1" -+shift -+flags="$*" -+ -+if [[ "${tool}" =~ ^(patman|buildman|dtoc|binman|u_boot_pylib)$ ]]; then -+ echo "Building dist package for tool ${tool}" -+else -+ echo "Unknown tool ${tool}: use patman, buildman, dtoc or binman" -+ exit 1 -+fi -+ -+for flag in "${flags}"; do -+ if [ "${flag}" == "--real" ]; then -+ echo "Using real server" -+ repo= -+ fi -+ if [ "${flag}" == "-n" ]; then -+ echo "Doing dry run" -+ upload= -+ fi -+done -+ -+if [ -n "${upload}" ]; then -+ if [ -z "${TWINE_PASSWORD}" ]; then -+ echo "Please set TWINE_PASSWORD to your password and retry" -+ exit 1 -+ fi -+fi -+ -+# Create a temp dir to work in -+dir=$(mktemp -d) -+ -+# Copy in some basic files -+cp -v tools/${tool}/pyproject.toml ${dir} -+cp -v Licenses/gpl-2.0.txt ${dir}/LICENSE -+readme="tools/${tool}/README.*" -+ -+# Copy in the README, dropping some Sphinx constructs that PyPi doesn't like -+cat ${readme} | sed -E 's/:(doc|ref):`.*`//; /sectionauthor/d; /toctree::/d' \ -+ > ${dir}/$(basename ${readme}) -+ -+# Copy the top-level Python and doc files -+dest=${dir}/src/${tool} -+mkdir -p ${dest} -+cp -v tools/$tool/{*.py,*.rst} ${dest} -+ -+# Copy over the subdirectories, including any sub files. Drop any cache files -+# and other such things -+pushd tools/${tool} -+for subdir in $(find . -maxdepth 1 -type d | \ -+ grep -vE "(__pycache__|home|usr|scratch|\.$|pyproject)"); do -+ pathname="${dest}/${subdir}" -+ echo "Copy ${pathname}" -+ cp -a ${subdir} ${pathname} -+done -+popd -+ -+# Remove cache files that accidentally made it through -+find ${dest} -name __pycache__ -type f -exec rm {} \; -+find ${dest} -depth -name __pycache__ -exec rmdir 112 \; -+ -+# Remove test files -+rm -rf ${dest}/*test* -+ -+mkdir ${dir}/tests -+cd ${dir} -+ -+# Make sure the tools are up to date -+python3 -m pip install --upgrade build -+python3 -m pip install --upgrade twine -+ -+# Build the PyPi package -+python3 -m build -+ -+echo "Completed build of ${tool}" -+ -+# Use --skip-existing to work even if the version is already present -+if [ -n "${upload}" ]; then -+ echo "Uploading from ${dir}" -+ python3 -m twine upload ${repo} -u __token__ dist/* -+ echo "Completed upload of ${tool}" -+fi -+ -+rm -rf "${dir}" -+ -+echo -e "done\n\n" -diff --git a/test/boot/bootdev.c b/test/boot/bootdev.c -index e1eb8ccd9a..4fe9fd7220 100644 ---- a/test/boot/bootdev.c -+++ b/test/boot/bootdev.c -@@ -289,7 +289,7 @@ static int bootdev_test_prio(struct unit_test_state *uts) - - /* try again but enable hunting, which brings in SCSI */ - bootflow_iter_uninit(&iter); -- ut_assertok(bootflow_scan_first(NULL, NULL, &iter, BOOTFLOWF_HUNT, -+ ut_assertok(bootflow_scan_first(NULL, NULL, &iter, BOOTFLOWIF_HUNT, - &bflow)); - ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow)); - ut_asserteq(7, iter.num_devs); -@@ -427,8 +427,8 @@ static int bootdev_test_hunt_scan(struct unit_test_state *uts) - - ut_assertok(bootstd_test_drop_bootdev_order(uts)); - ut_assertok(bootflow_scan_first(NULL, NULL, &iter, -- BOOTFLOWF_SHOW | BOOTFLOWF_HUNT | -- BOOTFLOWF_SKIP_GLOBAL, &bflow)); -+ BOOTFLOWIF_SHOW | BOOTFLOWIF_HUNT | -+ BOOTFLOWIF_SKIP_GLOBAL, &bflow)); - ut_asserteq(BIT(MMC_HUNTER) | BIT(1), std->hunters_used); - - return 0; -@@ -649,7 +649,7 @@ static int bootdev_test_next_prio(struct unit_test_state *uts) - iter.part = 0; - uclass_first_device(UCLASS_BOOTMETH, &bflow.method); - iter.cur_prio = 0; -- iter.flags = BOOTFLOWF_SHOW; -+ iter.flags = BOOTFLOWIF_SHOW; - - dev = NULL; - console_record_reset_enable(); -@@ -662,7 +662,7 @@ static int bootdev_test_next_prio(struct unit_test_state *uts) - ut_assert_console_end(); - - /* now try again with hunting enabled */ -- iter.flags = BOOTFLOWF_SHOW | BOOTFLOWF_HUNT; -+ iter.flags = BOOTFLOWIF_SHOW | BOOTFLOWIF_HUNT; - iter.cur_prio = 0; - iter.part = 0; - -diff --git a/test/boot/bootflow.c b/test/boot/bootflow.c -index b9284fc464..fd0e1d6243 100644 ---- a/test/boot/bootflow.c -+++ b/test/boot/bootflow.c -@@ -277,7 +277,7 @@ static int bootflow_iter(struct unit_test_state *uts) - /* The first device is mmc2.bootdev which has no media */ - ut_asserteq(-EPROTONOSUPPORT, - bootflow_scan_first(NULL, NULL, &iter, -- BOOTFLOWF_ALL | BOOTFLOWF_SKIP_GLOBAL, &bflow)); -+ BOOTFLOWIF_ALL | BOOTFLOWIF_SKIP_GLOBAL, &bflow)); - ut_asserteq(2, iter.num_methods); - ut_asserteq(0, iter.cur_method); - ut_asserteq(0, iter.part); -diff --git a/test/cmd/Makefile b/test/cmd/Makefile -index 2ffde8703a..055adc65a2 100644 ---- a/test/cmd/Makefile -+++ b/test/cmd/Makefile -@@ -14,10 +14,14 @@ obj-$(CONFIG_CMD_FDT) += fdt.o - obj-$(CONFIG_CONSOLE_TRUETYPE) += font.o - obj-$(CONFIG_CMD_LOADM) += loadm.o - obj-$(CONFIG_CMD_MEM_SEARCH) += mem_search.o -+ifdef CONFIG_CMD_PCI -+obj-$(CONFIG_CMD_PCI_MPS) += pci_mps.o -+endif - obj-$(CONFIG_CMD_PINMUX) += pinmux.o - obj-$(CONFIG_CMD_PWM) += pwm.o - obj-$(CONFIG_CMD_SEAMA) += seama.o - ifdef CONFIG_SANDBOX -+obj-$(CONFIG_CMD_READ) += rw.o - obj-$(CONFIG_CMD_SETEXPR) += setexpr.o - endif - obj-$(CONFIG_CMD_TEMPERATURE) += temperature.o -diff --git a/test/cmd/exit.c b/test/cmd/exit.c -index ca34abef89..7e160f7e4b 100644 ---- a/test/cmd/exit.c -+++ b/test/cmd/exit.c -@@ -60,20 +60,20 @@ static int cmd_exit_test(struct unit_test_state *uts) - - /* Validate that 'exit' behaves the same way as 'exit 0' */ - ut_assertok(console_record_reset_enable()); -- ut_assertok(run_commandf("setenv foo 'echo bar ; exit ; echo baz' ; run foo ; echo $?", i)); -+ ut_assertok(run_commandf("setenv foo 'echo bar ; exit ; echo baz' ; run foo ; echo $?")); - ut_assert_nextline("bar"); - ut_assert_nextline("0"); - ut_assertok(ut_check_console_end(uts)); - - ut_assertok(console_record_reset_enable()); -- ut_assertok(run_commandf("setenv foo 'echo bar ; exit ; echo baz' ; run foo && echo quux ; echo $?", i)); -+ ut_assertok(run_commandf("setenv foo 'echo bar ; exit ; echo baz' ; run foo && echo quux ; echo $?")); - ut_assert_nextline("bar"); - ut_assert_nextline("quux"); - ut_assert_nextline("0"); - ut_assertok(ut_check_console_end(uts)); - - ut_assertok(console_record_reset_enable()); -- ut_assertok(run_commandf("setenv foo 'echo bar ; exit ; echo baz' ; run foo || echo quux ; echo $?", i)); -+ ut_assertok(run_commandf("setenv foo 'echo bar ; exit ; echo baz' ; run foo || echo quux ; echo $?")); - ut_assert_nextline("bar"); - /* Either 'exit' returns 0, or 'echo quux' returns 0 */ - ut_assert_nextline("0"); -@@ -81,39 +81,39 @@ static int cmd_exit_test(struct unit_test_state *uts) - - /* Validate that return value still propagates from 'run' command */ - ut_assertok(console_record_reset_enable()); -- ut_assertok(run_commandf("setenv foo 'echo bar ; true' ; run foo ; echo $?", i)); -+ ut_assertok(run_commandf("setenv foo 'echo bar ; true' ; run foo ; echo $?")); - ut_assert_nextline("bar"); - ut_assert_nextline("0"); - ut_assertok(ut_check_console_end(uts)); - - ut_assertok(console_record_reset_enable()); -- ut_assertok(run_commandf("setenv foo 'echo bar ; true' ; run foo && echo quux ; echo $?", i)); -+ ut_assertok(run_commandf("setenv foo 'echo bar ; true' ; run foo && echo quux ; echo $?")); - ut_assert_nextline("bar"); - ut_assert_nextline("quux"); - ut_assert_nextline("0"); - ut_assertok(ut_check_console_end(uts)); - - ut_assertok(console_record_reset_enable()); -- ut_assertok(run_commandf("setenv foo 'echo bar ; true' ; run foo || echo quux ; echo $?", i)); -+ ut_assertok(run_commandf("setenv foo 'echo bar ; true' ; run foo || echo quux ; echo $?")); - ut_assert_nextline("bar"); - /* The 'true' returns 0 */ - ut_assert_nextline("0"); - ut_assertok(ut_check_console_end(uts)); - - ut_assertok(console_record_reset_enable()); -- ut_assertok(run_commandf("setenv foo 'echo bar ; false' ; run foo ; echo $?", i)); -+ ut_assertok(run_commandf("setenv foo 'echo bar ; false' ; run foo ; echo $?")); - ut_assert_nextline("bar"); - ut_assert_nextline("1"); - ut_assertok(ut_check_console_end(uts)); - - ut_assertok(console_record_reset_enable()); -- ut_assertok(run_commandf("setenv foo 'echo bar ; false' ; run foo && echo quux ; echo $?", i)); -+ ut_assertok(run_commandf("setenv foo 'echo bar ; false' ; run foo && echo quux ; echo $?")); - ut_assert_nextline("bar"); - ut_assert_nextline("1"); - ut_assertok(ut_check_console_end(uts)); - - ut_assertok(console_record_reset_enable()); -- ut_assertok(run_commandf("setenv foo 'echo bar ; false' ; run foo || echo quux ; echo $?", i)); -+ ut_assertok(run_commandf("setenv foo 'echo bar ; false' ; run foo || echo quux ; echo $?")); - ut_assert_nextline("bar"); - ut_assert_nextline("quux"); - /* The 'echo quux' returns 0 */ -diff --git a/test/cmd/fdt.c b/test/cmd/fdt.c -index cdbaf8c425..7835da232d 100644 ---- a/test/cmd/fdt.c -+++ b/test/cmd/fdt.c -@@ -15,6 +15,13 @@ - #include - - DECLARE_GLOBAL_DATA_PTR; -+/* -+ * Missing tests: -+ * fdt boardsetup - Do board-specific set up -+ * fdt checksign [] - check FIT signature -+ * - address of key blob -+ * default gd->fdt_blob -+ */ - - /* Declare a new fdt test */ - #define FDT_TEST(_name, _flags) UNIT_TEST(_name, _flags, fdt_test) -@@ -168,7 +175,7 @@ static int fdt_test_addr(struct unit_test_state *uts) - /* Set the working FDT */ - set_working_fdt_addr(0); - ut_assert_nextline("Working FDT set to 0"); -- ut_assertok(run_commandf("fdt addr %08x", addr)); -+ ut_assertok(run_commandf("fdt addr %08lx", addr)); - ut_assert_nextline("Working FDT set to %lx", addr); - ut_asserteq(addr, map_to_sysmem(working_fdt)); - ut_assertok(ut_check_console_end(uts)); -@@ -178,7 +185,7 @@ static int fdt_test_addr(struct unit_test_state *uts) - /* Set the control FDT */ - fdt_blob = gd->fdt_blob; - gd->fdt_blob = NULL; -- ret = run_commandf("fdt addr -c %08x", addr); -+ ret = run_commandf("fdt addr -c %08lx", addr); - new_fdt = gd->fdt_blob; - gd->fdt_blob = fdt_blob; - ut_assertok(ret); -@@ -187,7 +194,7 @@ static int fdt_test_addr(struct unit_test_state *uts) - - /* Test setting an invalid FDT */ - fdt[0] = 123; -- ut_asserteq(1, run_commandf("fdt addr %08x", addr)); -+ ut_asserteq(1, run_commandf("fdt addr %08lx", addr)); - ut_assert_nextline("libfdt fdt_check_header(): FDT_ERR_BADMAGIC"); - ut_assertok(ut_check_console_end(uts)); - -@@ -216,20 +223,19 @@ static int fdt_test_addr_resize(struct unit_test_state *uts) - - /* Test setting and resizing the working FDT to a larger size */ - ut_assertok(console_record_reset_enable()); -- ut_assertok(run_commandf("fdt addr %08x %x", addr, newsize)); -+ ut_assertok(run_commandf("fdt addr %08lx %x", addr, newsize)); - ut_assert_nextline("Working FDT set to %lx", addr); - ut_assertok(ut_check_console_end(uts)); - - /* Try shrinking it */ -- ut_assertok(run_commandf("fdt addr %08x %x", addr, sizeof(fdt) / 4)); -+ ut_assertok(run_commandf("fdt addr %08lx %zx", addr, sizeof(fdt) / 4)); - ut_assert_nextline("Working FDT set to %lx", addr); - ut_assert_nextline("New length %d < existing length %d, ignoring", - (int)sizeof(fdt) / 4, newsize); - ut_assertok(ut_check_console_end(uts)); - - /* ...quietly */ -- ut_assertok(run_commandf("fdt addr -q %08x %x", addr, sizeof(fdt) / 4)); -- ut_assert_nextline("Working FDT set to %lx", addr); -+ ut_assertok(run_commandf("fdt addr -q %08lx %zx", addr, sizeof(fdt) / 4)); - ut_assertok(ut_check_console_end(uts)); - - /* We cannot easily provoke errors in fdt_open_into(), so ignore that */ -@@ -258,13 +264,13 @@ static int fdt_test_move(struct unit_test_state *uts) - - /* Test moving the working FDT to a new location */ - ut_assertok(console_record_reset_enable()); -- ut_assertok(run_commandf("fdt move %08x %08x %x", addr, newaddr, ts)); -+ ut_assertok(run_commandf("fdt move %08lx %08lx %x", addr, newaddr, ts)); - ut_assert_nextline("Working FDT set to %lx", newaddr); - ut_assertok(ut_check_console_end(uts)); - - /* Compare the source and destination DTs */ - ut_assertok(console_record_reset_enable()); -- ut_assertok(run_commandf("cmp.b %08x %08x %x", addr, newaddr, ts)); -+ ut_assertok(run_commandf("cmp.b %08lx %08lx %x", addr, newaddr, ts)); - ut_assert_nextline("Total of %d byte(s) were the same", ts); - ut_assertok(ut_check_console_end(uts)); - -@@ -296,6 +302,149 @@ static int fdt_test_resize(struct unit_test_state *uts) - } - FDT_TEST(fdt_test_resize, UT_TESTF_CONSOLE_REC); - -+static int fdt_test_print_list_common(struct unit_test_state *uts, -+ const char *opc, const char *node) -+{ -+ /* -+ * Test printing/listing the working FDT -+ * subnode $node/subnode -+ */ -+ ut_assertok(console_record_reset_enable()); -+ ut_assertok(run_commandf("fdt %s %s/subnode", opc, node)); -+ ut_assert_nextline("subnode {"); -+ ut_assert_nextline("\t#address-cells = <0x00000000>;"); -+ ut_assert_nextline("\t#size-cells = <0x00000000>;"); -+ ut_assert_nextline("\tcompatible = \"u-boot,fdt-subnode-test-device\";"); -+ ut_assert_nextline("};"); -+ ut_assertok(ut_check_console_end(uts)); -+ -+ /* -+ * Test printing/listing the working FDT -+ * path / string property model -+ */ -+ ut_assertok(console_record_reset_enable()); -+ ut_assertok(run_commandf("fdt %s / model", opc)); -+ ut_assert_nextline("model = \"U-Boot FDT test\""); -+ ut_assertok(ut_check_console_end(uts)); -+ -+ /* -+ * Test printing/listing the working FDT -+ * path $node string property compatible -+ */ -+ ut_assertok(console_record_reset_enable()); -+ ut_assertok(run_commandf("fdt %s %s compatible", opc, node)); -+ ut_assert_nextline("compatible = \"u-boot,fdt-test-device1\""); -+ ut_assertok(ut_check_console_end(uts)); -+ -+ /* -+ * Test printing/listing the working FDT -+ * path $node stringlist property clock-names -+ */ -+ ut_assertok(console_record_reset_enable()); -+ ut_assertok(run_commandf("fdt %s %s clock-names", opc, node)); -+ ut_assert_nextline("clock-names = \"fixed\", \"i2c\", \"spi\", \"uart2\", \"uart1\""); -+ ut_assertok(ut_check_console_end(uts)); -+ -+ /* -+ * Test printing/listing the working FDT -+ * path $node u32 property clock-frequency -+ */ -+ ut_assertok(console_record_reset_enable()); -+ ut_assertok(run_commandf("fdt %s %s clock-frequency", opc, node)); -+ ut_assert_nextline("clock-frequency = <0x00fde800>"); -+ ut_assertok(ut_check_console_end(uts)); -+ -+ /* -+ * Test printing/listing the working FDT -+ * path $node empty property u-boot,empty-property -+ */ -+ ut_assertok(console_record_reset_enable()); -+ ut_assertok(run_commandf("fdt %s %s u-boot,empty-property", opc, node)); -+ /* -+ * This is the only 'fdt print' / 'fdt list' incantation which -+ * prefixes the property with node path. This has been in U-Boot -+ * since the beginning of the command 'fdt', keep it. -+ */ -+ ut_assert_nextline("%s u-boot,empty-property", node); -+ ut_assertok(ut_check_console_end(uts)); -+ -+ /* -+ * Test printing/listing the working FDT -+ * path $node prop-encoded array property regs -+ */ -+ ut_assertok(console_record_reset_enable()); -+ ut_assertok(run_commandf("fdt %s %s regs", opc, node)); -+ ut_assert_nextline("regs = <0x00001234 0x00001000>"); -+ ut_assertok(ut_check_console_end(uts)); -+ -+ return 0; -+} -+ -+static int fdt_test_print_list(struct unit_test_state *uts, bool print) -+{ -+ const char *opc = print ? "print" : "list"; -+ char fdt[4096]; -+ ulong addr; -+ int ret; -+ -+ /* Original source DT */ -+ ut_assertok(make_fuller_fdt(uts, fdt, sizeof(fdt))); -+ addr = map_to_sysmem(fdt); -+ set_working_fdt_addr(addr); -+ -+ /* Test printing/listing the working FDT -- node / */ -+ ut_assertok(console_record_reset_enable()); -+ ut_assertok(run_commandf("fdt %s", opc)); -+ ut_assert_nextline("/ {"); -+ ut_assert_nextline("\t#address-cells = <0x00000001>;"); -+ ut_assert_nextline("\t#size-cells = <0x00000001>;"); -+ ut_assert_nextline("\tcompatible = \"u-boot,fdt-test\";"); -+ ut_assert_nextline("\tmodel = \"U-Boot FDT test\";"); -+ ut_assert_nextline("\taliases {"); -+ if (print) { -+ ut_assert_nextline("\t\tbadalias = \"/bad/alias\";"); -+ ut_assert_nextline("\t\tsubnodealias = \"/test-node@1234/subnode\";"); -+ ut_assert_nextline("\t\ttestnodealias = \"/test-node@1234\";"); -+ } -+ ut_assert_nextline("\t};"); -+ ut_assert_nextline("\ttest-node@1234 {"); -+ if (print) { -+ ut_assert_nextline("\t\t#address-cells = <0x00000000>;"); -+ ut_assert_nextline("\t\t#size-cells = <0x00000000>;"); -+ ut_assert_nextline("\t\tcompatible = \"u-boot,fdt-test-device1\";"); -+ ut_assert_nextline("\t\tclock-names = \"fixed\", \"i2c\", \"spi\", \"uart2\", \"uart1\";"); -+ ut_assert_nextline("\t\tu-boot,empty-property;"); -+ ut_assert_nextline("\t\tclock-frequency = <0x00fde800>;"); -+ ut_assert_nextline("\t\tregs = <0x00001234 0x00001000>;"); -+ ut_assert_nextline("\t\tsubnode {"); -+ ut_assert_nextline("\t\t\t#address-cells = <0x00000000>;"); -+ ut_assert_nextline("\t\t\t#size-cells = <0x00000000>;"); -+ ut_assert_nextline("\t\t\tcompatible = \"u-boot,fdt-subnode-test-device\";"); -+ ut_assert_nextline("\t\t};"); -+ } -+ ut_assert_nextline("\t};"); -+ ut_assert_nextline("};"); -+ ut_assertok(ut_check_console_end(uts)); -+ -+ ret = fdt_test_print_list_common(uts, opc, "/test-node@1234"); -+ if (!ret) -+ ret = fdt_test_print_list_common(uts, opc, "testnodealias"); -+ -+ return 0; -+} -+ -+static int fdt_test_print(struct unit_test_state *uts) -+{ -+ return fdt_test_print_list(uts, true); -+} -+FDT_TEST(fdt_test_print, UT_TESTF_CONSOLE_REC); -+ -+static int fdt_test_list(struct unit_test_state *uts) -+{ -+ return fdt_test_print_list(uts, false); -+} -+FDT_TEST(fdt_test_list, UT_TESTF_CONSOLE_REC); -+ - /* Test 'fdt get value' reading an fdt */ - static int fdt_test_get_value_string(struct unit_test_state *uts, - const char *node, const char *prop, -@@ -646,23 +795,21 @@ static int fdt_test_set_single(struct unit_test_state *uts, - * => fdt set /path property - */ - ut_assertok(console_record_reset_enable()); -- if (sval) { -+ if (sval) - ut_assertok(run_commandf("fdt set %s %s %s", path, prop, sval)); -- } else if (integer) { -+ else if (integer) - ut_assertok(run_commandf("fdt set %s %s <%d>", path, prop, ival)); -- } else { -+ else - ut_assertok(run_commandf("fdt set %s %s", path, prop)); -- } - - /* Validate the property is present and has correct value. */ - ut_assertok(run_commandf("fdt get value svar %s %s", path, prop)); -- if (sval) { -+ if (sval) - ut_asserteq_str(sval, env_get("svar")); -- } else if (integer) { -+ else if (integer) - ut_asserteq(ival, env_get_hex("svar", 0x1234)); -- } else { -+ else - ut_assertnull(env_get("svar")); -- } - ut_assertok(ut_check_console_end(uts)); - - return 0; -@@ -964,6 +1111,411 @@ static int fdt_test_bootcpu(struct unit_test_state *uts) - } - FDT_TEST(fdt_test_bootcpu, UT_TESTF_CONSOLE_REC); - -+static int fdt_test_header_get(struct unit_test_state *uts, -+ const char *field, const unsigned long val) -+{ -+ /* Test getting valid header entry */ -+ ut_assertok(console_record_reset_enable()); -+ ut_assertok(run_commandf("fdt header get fvar %s", field)); -+ ut_asserteq(val, env_get_hex("fvar", 0x1234)); -+ ut_assertok(ut_check_console_end(uts)); -+ -+ /* Test getting malformed header entry */ -+ ut_assertok(console_record_reset_enable()); -+ ut_asserteq(1, run_commandf("fdt header get fvar typo%stypo", field)); -+ ut_assertok(ut_check_console_end(uts)); -+ -+ return 0; -+} -+ -+static int fdt_test_header(struct unit_test_state *uts) -+{ -+ char fdt[256]; -+ ulong addr; -+ -+ ut_assertok(make_test_fdt(uts, fdt, sizeof(fdt))); -+ addr = map_to_sysmem(fdt); -+ set_working_fdt_addr(addr); -+ -+ /* Test header print */ -+ ut_assertok(console_record_reset_enable()); -+ ut_assertok(run_commandf("fdt header")); -+ ut_assert_nextline("magic:\t\t\t0x%x", fdt_magic(fdt)); -+ ut_assert_nextline("totalsize:\t\t0x%x (%d)", fdt_totalsize(fdt), fdt_totalsize(fdt)); -+ ut_assert_nextline("off_dt_struct:\t\t0x%x", fdt_off_dt_struct(fdt)); -+ ut_assert_nextline("off_dt_strings:\t\t0x%x", fdt_off_dt_strings(fdt)); -+ ut_assert_nextline("off_mem_rsvmap:\t\t0x%x", fdt_off_mem_rsvmap(fdt)); -+ ut_assert_nextline("version:\t\t%d", fdt_version(fdt)); -+ ut_assert_nextline("last_comp_version:\t%d", fdt_last_comp_version(fdt)); -+ ut_assert_nextline("boot_cpuid_phys:\t0x%x", fdt_boot_cpuid_phys(fdt)); -+ ut_assert_nextline("size_dt_strings:\t0x%x", fdt_size_dt_strings(fdt)); -+ ut_assert_nextline("size_dt_struct:\t\t0x%x", fdt_size_dt_struct(fdt)); -+ ut_assert_nextline("number mem_rsv:\t\t0x%x", fdt_num_mem_rsv(fdt)); -+ ut_assert_nextline_empty(); -+ ut_assertok(ut_check_console_end(uts)); -+ -+ /* Test header get */ -+ fdt_test_header_get(uts, "magic", fdt_magic(fdt)); -+ fdt_test_header_get(uts, "totalsize", fdt_totalsize(fdt)); -+ fdt_test_header_get(uts, "off_dt_struct", fdt_off_dt_struct(fdt)); -+ fdt_test_header_get(uts, "off_dt_strings", fdt_off_dt_strings(fdt)); -+ fdt_test_header_get(uts, "off_mem_rsvmap", fdt_off_mem_rsvmap(fdt)); -+ fdt_test_header_get(uts, "version", fdt_version(fdt)); -+ fdt_test_header_get(uts, "last_comp_version", fdt_last_comp_version(fdt)); -+ fdt_test_header_get(uts, "boot_cpuid_phys", fdt_boot_cpuid_phys(fdt)); -+ fdt_test_header_get(uts, "size_dt_strings", fdt_size_dt_strings(fdt)); -+ fdt_test_header_get(uts, "size_dt_struct", fdt_size_dt_struct(fdt)); -+ -+ return 0; -+} -+FDT_TEST(fdt_test_header, UT_TESTF_CONSOLE_REC); -+ -+static int fdt_test_memory_cells(struct unit_test_state *uts, -+ const unsigned int cells) -+{ -+ unsigned char *pada, *pads; -+ unsigned char *seta, *sets; -+ char fdt[8192]; -+ const int size = sizeof(fdt); -+ fdt32_t *regs; -+ ulong addr; -+ char *spc; -+ int i; -+ -+ /* Create DT with node /memory { regs = <0x100 0x200>; } and #*cells */ -+ ut_assertnonnull(regs = calloc(2 * cells, sizeof(*regs))); -+ ut_assertnonnull(pada = calloc(12, cells)); -+ ut_assertnonnull(pads = calloc(12, cells)); -+ ut_assertnonnull(seta = calloc(12, cells)); -+ ut_assertnonnull(sets = calloc(12, cells)); -+ for (i = cells; i >= 1; i--) { -+ regs[cells - 1] = cpu_to_fdt32(i * 0x10000); -+ regs[(cells * 2) - 1] = cpu_to_fdt32(~i); -+ snprintf(seta + (8 * (cells - i)), 9, "%08x", i * 0x10000); -+ snprintf(sets + (8 * (cells - i)), 9, "%08x", ~i); -+ spc = (i != 1) ? " " : ""; -+ snprintf(pada + (11 * (cells - i)), 12, "0x%08x%s", i * 0x10000, spc); -+ snprintf(pads + (11 * (cells - i)), 12, "0x%08x%s", ~i, spc); -+ } -+ -+ ut_assertok(fdt_create(fdt, size)); -+ ut_assertok(fdt_finish_reservemap(fdt)); -+ ut_assert(fdt_begin_node(fdt, "") >= 0); -+ ut_assertok(fdt_property_u32(fdt, "#address-cells", cells)); -+ ut_assertok(fdt_property_u32(fdt, "#size-cells", cells)); -+ ut_assert(fdt_begin_node(fdt, "memory") >= 0); -+ ut_assertok(fdt_property_string(fdt, "device_type", "memory")); -+ ut_assertok(fdt_property(fdt, "reg", ®s, cells * 2)); -+ ut_assertok(fdt_end_node(fdt)); -+ ut_assertok(fdt_end_node(fdt)); -+ ut_assertok(fdt_finish(fdt)); -+ fdt_shrink_to_minimum(fdt, 4096); /* Resize with 4096 extra bytes */ -+ addr = map_to_sysmem(fdt); -+ set_working_fdt_addr(addr); -+ -+ /* Test updating the memory node */ -+ ut_assertok(console_record_reset_enable()); -+ ut_assertok(run_commandf("fdt memory 0x%s 0x%s", seta, sets)); -+ ut_assertok(run_commandf("fdt print /memory")); -+ ut_assert_nextline("memory {"); -+ ut_assert_nextline("\tdevice_type = \"memory\";"); -+ ut_assert_nextline("\treg = <%s %s>;", pada, pads); -+ ut_assert_nextline("};"); -+ ut_assertok(ut_check_console_end(uts)); -+ -+ free(sets); -+ free(seta); -+ free(pads); -+ free(pada); -+ free(regs); -+ -+ return 0; -+} -+ -+static int fdt_test_memory(struct unit_test_state *uts) -+{ -+ /* -+ * Test memory fixup for 32 and 64 bit systems, anything bigger is -+ * so far unsupported and fails because of simple_stroull() being -+ * 64bit tops in the 'fdt memory' command implementation. -+ */ -+ fdt_test_memory_cells(uts, 1); -+ fdt_test_memory_cells(uts, 2); -+ -+ /* -+ * The 'fdt memory' command is limited to /memory node, it does -+ * not support any other valid DT memory node format, which is -+ * either one or multiple /memory@adresss nodes. Therefore, this -+ * DT variant is not tested here. -+ */ -+ -+ return 0; -+} -+FDT_TEST(fdt_test_memory, UT_TESTF_CONSOLE_REC); -+ -+static int fdt_test_rsvmem(struct unit_test_state *uts) -+{ -+ char fdt[8192]; -+ ulong addr; -+ -+ ut_assertok(make_test_fdt(uts, fdt, sizeof(fdt))); -+ fdt_shrink_to_minimum(fdt, 4096); /* Resize with 4096 extra bytes */ -+ fdt_add_mem_rsv(fdt, 0x42, 0x1701); -+ fdt_add_mem_rsv(fdt, 0x74656, 0x9); -+ addr = map_to_sysmem(fdt); -+ set_working_fdt_addr(addr); -+ -+ /* Test default reserved memory node presence */ -+ ut_assertok(console_record_reset_enable()); -+ ut_assertok(run_commandf("fdt rsvmem print")); -+ ut_assert_nextline("index\t\t start\t\t size"); -+ ut_assert_nextline("------------------------------------------------"); -+ ut_assert_nextline(" %x\t%016x\t%016x", 0, 0x42, 0x1701); -+ ut_assert_nextline(" %x\t%016x\t%016x", 1, 0x74656, 0x9); -+ ut_assertok(ut_check_console_end(uts)); -+ -+ /* Test add new reserved memory node */ -+ ut_assertok(console_record_reset_enable()); -+ ut_assertok(run_commandf("fdt rsvmem add 0x1234 0x5678")); -+ ut_assertok(run_commandf("fdt rsvmem print")); -+ ut_assert_nextline("index\t\t start\t\t size"); -+ ut_assert_nextline("------------------------------------------------"); -+ ut_assert_nextline(" %x\t%016x\t%016x", 0, 0x42, 0x1701); -+ ut_assert_nextline(" %x\t%016x\t%016x", 1, 0x74656, 0x9); -+ ut_assert_nextline(" %x\t%016x\t%016x", 2, 0x1234, 0x5678); -+ ut_assertok(ut_check_console_end(uts)); -+ -+ /* Test delete reserved memory node */ -+ ut_assertok(console_record_reset_enable()); -+ ut_assertok(run_commandf("fdt rsvmem delete 0")); -+ ut_assertok(run_commandf("fdt rsvmem print")); -+ ut_assert_nextline("index\t\t start\t\t size"); -+ ut_assert_nextline("------------------------------------------------"); -+ ut_assert_nextline(" %x\t%016x\t%016x", 0, 0x74656, 0x9); -+ ut_assert_nextline(" %x\t%016x\t%016x", 1, 0x1234, 0x5678); -+ ut_assertok(ut_check_console_end(uts)); -+ -+ /* Test re-add new reserved memory node */ -+ ut_assertok(console_record_reset_enable()); -+ ut_assertok(run_commandf("fdt rsvmem add 0x42 0x1701")); -+ ut_assertok(run_commandf("fdt rsvmem print")); -+ ut_assert_nextline("index\t\t start\t\t size"); -+ ut_assert_nextline("------------------------------------------------"); -+ ut_assert_nextline(" %x\t%016x\t%016x", 0, 0x74656, 0x9); -+ ut_assert_nextline(" %x\t%016x\t%016x", 1, 0x1234, 0x5678); -+ ut_assert_nextline(" %x\t%016x\t%016x", 2, 0x42, 0x1701); -+ ut_assertok(ut_check_console_end(uts)); -+ -+ /* Test delete nonexistent reserved memory node */ -+ ut_assertok(console_record_reset_enable()); -+ ut_asserteq(1, run_commandf("fdt rsvmem delete 10")); -+ ut_assert_nextline("libfdt fdt_del_mem_rsv(): FDT_ERR_NOTFOUND"); -+ ut_assertok(ut_check_console_end(uts)); -+ -+ return 0; -+} -+FDT_TEST(fdt_test_rsvmem, UT_TESTF_CONSOLE_REC); -+ -+static int fdt_test_chosen(struct unit_test_state *uts) -+{ -+ const char *env_bootargs = env_get("bootargs"); -+ char fdt[8192]; -+ ulong addr; -+ -+ ut_assertok(make_test_fdt(uts, fdt, sizeof(fdt))); -+ fdt_shrink_to_minimum(fdt, 4096); /* Resize with 4096 extra bytes */ -+ addr = map_to_sysmem(fdt); -+ set_working_fdt_addr(addr); -+ -+ /* Test default chosen node presence, fail as there is no /chosen node */ -+ ut_assertok(console_record_reset_enable()); -+ ut_asserteq(1, run_commandf("fdt print /chosen")); -+ ut_assert_nextline("libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND"); -+ ut_assertok(ut_check_console_end(uts)); -+ -+ /* Test add new chosen node without initrd */ -+ ut_assertok(console_record_reset_enable()); -+ ut_assertok(run_commandf("fdt chosen")); -+ ut_assertok(run_commandf("fdt print /chosen")); -+ ut_assert_nextline("chosen {"); -+ ut_assert_nextlinen("\tu-boot,version = "); /* Ignore the version string */ -+ if (env_bootargs) -+ ut_assert_nextline("\tbootargs = \"%s\";", env_bootargs); -+ ut_assert_nextline("};"); -+ ut_assertok(ut_check_console_end(uts)); -+ -+ /* Test add new chosen node with initrd */ -+ ut_assertok(console_record_reset_enable()); -+ ut_assertok(run_commandf("fdt chosen 0x1234 0x5678")); -+ ut_assertok(run_commandf("fdt print /chosen")); -+ ut_assert_nextline("chosen {"); -+ ut_assert_nextline("\tlinux,initrd-end = <0x%08x 0x%08x>;", -+ upper_32_bits(0x1234 + 0x5678 - 1), -+ lower_32_bits(0x1234 + 0x5678 - 1)); -+ ut_assert_nextline("\tlinux,initrd-start = <0x%08x 0x%08x>;", -+ upper_32_bits(0x1234), lower_32_bits(0x1234)); -+ ut_assert_nextlinen("\tu-boot,version = "); /* Ignore the version string */ -+ if (env_bootargs) -+ ut_assert_nextline("\tbootargs = \"%s\";", env_bootargs); -+ ut_assert_nextline("};"); -+ ut_assertok(ut_check_console_end(uts)); -+ -+ return 0; -+} -+FDT_TEST(fdt_test_chosen, UT_TESTF_CONSOLE_REC); -+ -+static int fdt_test_apply(struct unit_test_state *uts) -+{ -+ char fdt[8192], fdto[8192]; -+ ulong addr, addro; -+ -+ /* Create base DT with __symbols__ node */ -+ ut_assertok(fdt_create(fdt, sizeof(fdt))); -+ ut_assertok(fdt_finish_reservemap(fdt)); -+ ut_assert(fdt_begin_node(fdt, "") >= 0); -+ ut_assert(fdt_begin_node(fdt, "__symbols__") >= 0); -+ ut_assertok(fdt_end_node(fdt)); -+ ut_assertok(fdt_end_node(fdt)); -+ ut_assertok(fdt_finish(fdt)); -+ fdt_shrink_to_minimum(fdt, 4096); /* Resize with 4096 extra bytes */ -+ addr = map_to_sysmem(fdt); -+ set_working_fdt_addr(addr); -+ -+ /* Create DTO which adds single property to root node / */ -+ ut_assertok(fdt_create(fdto, sizeof(fdto))); -+ ut_assertok(fdt_finish_reservemap(fdto)); -+ ut_assert(fdt_begin_node(fdto, "") >= 0); -+ ut_assert(fdt_begin_node(fdto, "fragment") >= 0); -+ ut_assertok(fdt_property_string(fdto, "target-path", "/")); -+ ut_assert(fdt_begin_node(fdto, "__overlay__") >= 0); -+ ut_assertok(fdt_property_string(fdto, "newstring", "newvalue")); -+ ut_assertok(fdt_end_node(fdto)); -+ ut_assertok(fdt_end_node(fdto)); -+ ut_assertok(fdt_finish(fdto)); -+ addro = map_to_sysmem(fdto); -+ -+ /* Test default DT print */ -+ ut_assertok(console_record_reset_enable()); -+ ut_assertok(run_commandf("fdt print /")); -+ ut_assert_nextline("/ {"); -+ ut_assert_nextline("\t__symbols__ {"); -+ ut_assert_nextline("\t};"); -+ ut_assert_nextline("};"); -+ ut_assertok(ut_check_console_end(uts)); -+ -+ /* Test simple DTO application */ -+ ut_assertok(console_record_reset_enable()); -+ ut_assertok(run_commandf("fdt apply 0x%08lx", addro)); -+ ut_assertok(run_commandf("fdt print /")); -+ ut_assert_nextline("/ {"); -+ ut_assert_nextline("\tnewstring = \"newvalue\";"); -+ ut_assert_nextline("\t__symbols__ {"); -+ ut_assert_nextline("\t};"); -+ ut_assert_nextline("};"); -+ ut_assertok(ut_check_console_end(uts)); -+ -+ /* -+ * Create complex DTO which: -+ * - modifies newstring property in root node / -+ * - adds new properties to root node / -+ * - adds new subnode with properties to root node / -+ * - adds phandle to the subnode and therefore __symbols__ node -+ */ -+ ut_assertok(fdt_create(fdto, sizeof(fdto))); -+ ut_assertok(fdt_finish_reservemap(fdto)); -+ ut_assert(fdt_begin_node(fdto, "") >= 0); -+ ut_assertok(fdt_property_cell(fdto, "#address-cells", 1)); -+ ut_assertok(fdt_property_cell(fdto, "#size-cells", 0)); -+ -+ ut_assert(fdt_begin_node(fdto, "fragment@0") >= 0); -+ ut_assertok(fdt_property_string(fdto, "target-path", "/")); -+ ut_assert(fdt_begin_node(fdto, "__overlay__") >= 0); -+ ut_assertok(fdt_property_string(fdto, "newstring", "newervalue")); -+ ut_assertok(fdt_property_u32(fdto, "newu32", 0x12345678)); -+ ut_assertok(fdt_property(fdto, "empty-property", NULL, 0)); -+ ut_assert(fdt_begin_node(fdto, "subnode") >= 0); -+ ut_assertok(fdt_property_string(fdto, "subnewstring", "newervalue")); -+ ut_assertok(fdt_property_u32(fdto, "subnewu32", 0x12345678)); -+ ut_assertok(fdt_property(fdto, "subempty-property", NULL, 0)); -+ ut_assertok(fdt_property_u32(fdto, "phandle", 0x01)); -+ ut_assertok(fdt_end_node(fdto)); -+ ut_assertok(fdt_end_node(fdto)); -+ ut_assertok(fdt_end_node(fdto)); -+ -+ ut_assert(fdt_begin_node(fdto, "__symbols__") >= 0); -+ ut_assertok(fdt_property_string(fdto, "subnodephandle", "/fragment@0/__overlay__/subnode")); -+ ut_assertok(fdt_end_node(fdto)); -+ ut_assertok(fdt_finish(fdto)); -+ addro = map_to_sysmem(fdto); -+ -+ /* Test complex DTO application */ -+ ut_assertok(console_record_reset_enable()); -+ ut_assertok(run_commandf("fdt apply 0x%08lx", addro)); -+ ut_assertok(run_commandf("fdt print /")); -+ ut_assert_nextline("/ {"); -+ ut_assert_nextline("\tempty-property;"); -+ ut_assert_nextline("\tnewu32 = <0x12345678>;"); -+ ut_assert_nextline("\tnewstring = \"newervalue\";"); -+ ut_assert_nextline("\tsubnode {"); -+ ut_assert_nextline("\t\tphandle = <0x00000001>;"); -+ ut_assert_nextline("\t\tsubempty-property;"); -+ ut_assert_nextline("\t\tsubnewu32 = <0x12345678>;"); -+ ut_assert_nextline("\t\tsubnewstring = \"newervalue\";"); -+ ut_assert_nextline("\t};"); -+ ut_assert_nextline("\t__symbols__ {"); -+ ut_assert_nextline("\t\tsubnodephandle = \"/subnode\";"); -+ ut_assert_nextline("\t};"); -+ ut_assert_nextline("};"); -+ ut_assertok(ut_check_console_end(uts)); -+ -+ /* -+ * Create complex DTO which: -+ * - modifies subnewu32 property in subnode via phandle and uses __fixups__ node -+ */ -+ ut_assertok(fdt_create(fdto, sizeof(fdto))); -+ ut_assertok(fdt_finish_reservemap(fdto)); -+ ut_assert(fdt_begin_node(fdto, "") >= 0); -+ ut_assertok(fdt_property_cell(fdto, "#address-cells", 1)); -+ ut_assertok(fdt_property_cell(fdto, "#size-cells", 0)); -+ -+ ut_assert(fdt_begin_node(fdto, "fragment@0") >= 0); -+ ut_assertok(fdt_property_u32(fdto, "target", 0xffffffff)); -+ ut_assert(fdt_begin_node(fdto, "__overlay__") >= 0); -+ ut_assertok(fdt_property_u32(fdto, "subnewu32", 0xabcdef01)); -+ ut_assertok(fdt_end_node(fdto)); -+ ut_assertok(fdt_end_node(fdto)); -+ -+ ut_assert(fdt_begin_node(fdto, "__fixups__") >= 0); -+ ut_assertok(fdt_property_string(fdto, "subnodephandle", "/fragment@0:target:0")); -+ ut_assertok(fdt_end_node(fdto)); -+ ut_assertok(fdt_end_node(fdto)); -+ ut_assertok(fdt_finish(fdto)); -+ addro = map_to_sysmem(fdto); -+ -+ /* Test complex DTO application */ -+ ut_assertok(console_record_reset_enable()); -+ ut_assertok(run_commandf("fdt apply 0x%08lx", addro)); -+ ut_assertok(run_commandf("fdt print /")); -+ ut_assert_nextline("/ {"); -+ ut_assert_nextline("\tempty-property;"); -+ ut_assert_nextline("\tnewu32 = <0x12345678>;"); -+ ut_assert_nextline("\tnewstring = \"newervalue\";"); -+ ut_assert_nextline("\tsubnode {"); -+ ut_assert_nextline("\t\tphandle = <0x00000001>;"); -+ ut_assert_nextline("\t\tsubempty-property;"); -+ ut_assert_nextline("\t\tsubnewu32 = <0xabcdef01>;"); -+ ut_assert_nextline("\t\tsubnewstring = \"newervalue\";"); -+ ut_assert_nextline("\t};"); -+ ut_assert_nextline("\t__symbols__ {"); -+ ut_assert_nextline("\t\tsubnodephandle = \"/subnode\";"); -+ ut_assert_nextline("\t};"); -+ ut_assert_nextline("};"); -+ ut_assertok(ut_check_console_end(uts)); -+ -+ return 0; -+} -+FDT_TEST(fdt_test_apply, UT_TESTF_CONSOLE_REC); -+ - int do_ut_fdt(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) - { - struct unit_test *tests = UNIT_TEST_SUITE_START(fdt_test); -diff --git a/test/cmd/font.c b/test/cmd/font.c -index adb353965a..40682e5ce4 100644 ---- a/test/cmd/font.c -+++ b/test/cmd/font.c -@@ -19,6 +19,7 @@ - static int font_test_base(struct unit_test_state *uts) - { - struct udevice *dev; -+ const char *name; - int max_metrics; - uint size; - int ret; -@@ -32,8 +33,8 @@ static int font_test_base(struct unit_test_state *uts) - ut_assert_nextline("cantoraone_regular"); - ut_assertok(ut_check_console_end(uts)); - -- ut_asserteq_str("nimbus_sans_l_regular", -- vidconsole_get_font_size(dev, &size)); -+ ut_assertok(vidconsole_get_font_size(dev, &name, &size)); -+ ut_asserteq_str("nimbus_sans_l_regular", name); - ut_asserteq(18, size); - - max_metrics = 1; -@@ -52,15 +53,15 @@ static int font_test_base(struct unit_test_state *uts) - ut_assertok(ret); - ut_assertok(ut_check_console_end(uts)); - -- ut_asserteq_str("cantoraone_regular", -- vidconsole_get_font_size(dev, &size)); -+ ut_assertok(vidconsole_get_font_size(dev, &name, &size)); -+ ut_asserteq_str("cantoraone_regular", name); - ut_asserteq(40, size); - - ut_assertok(run_command("font size 30", 0)); - ut_assertok(ut_check_console_end(uts)); - -- ut_asserteq_str("cantoraone_regular", -- vidconsole_get_font_size(dev, &size)); -+ ut_assertok(vidconsole_get_font_size(dev, &name, &size)); -+ ut_asserteq_str("cantoraone_regular", name); - ut_asserteq(30, size); - - return 0; -diff --git a/test/cmd/pci_mps.c b/test/cmd/pci_mps.c -new file mode 100644 -index 0000000000..fd96f4fba6 ---- /dev/null -+++ b/test/cmd/pci_mps.c -@@ -0,0 +1,42 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Tests that the PCI Maximum Payload Size (MPS) command can set the sandbox -+ * PCI Express device to safe mode and determine the correct payload size. -+ * -+ * Copyright 2023 Microsoft -+ * Written by Stephen Carlson -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#define PCI_MPS_TEST(_name, _flags) UNIT_TEST(_name, _flags, pci_mps_test) -+ -+/* Test "pci_mps" command in safe "s" mode */ -+static int test_pci_mps_safe(struct unit_test_state *uts) -+{ -+ /* Enumerate PCI Express first */ -+ ut_assertok(run_command("pci e", 0)); -+ ut_assert_console_end(); -+ -+ /* Test pci_mps s */ -+ ut_assertok(run_command("pci_mps s", 0)); -+ ut_assert_nextline("Setting MPS of all devices to 256B"); -+ ut_assert_console_end(); -+ -+ return 0; -+} -+ -+PCI_MPS_TEST(test_pci_mps_safe, UT_TESTF_CONSOLE_REC); -+ -+int do_ut_pci_mps(struct cmd_tbl *cmdtp, int flag, int argc, -+ char * const argv[]) -+{ -+ struct unit_test *tests = UNIT_TEST_SUITE_START(pci_mps_test); -+ const int n = UNIT_TEST_SUITE_COUNT(pci_mps_test); -+ -+ return cmd_ut_category("cmd_pci_mps", "pci_mps_test_", tests, n, -+ argc, argv); -+} -diff --git a/test/cmd/pwm.c b/test/cmd/pwm.c -index 2fc0b5e407..cf7ee0e0e6 100644 ---- a/test/cmd/pwm.c -+++ b/test/cmd/pwm.c -@@ -27,11 +27,11 @@ static int dm_test_pwm_cmd(struct unit_test_state *uts) - /* pwm */ - /* cros-ec-pwm doesn't support invert */ - ut_asserteq(1, run_command("pwm invert 0 0 1", 0)); -- ut_assert_nextline("error(-38)") -+ ut_assert_nextline("error(-38)"); - ut_assert_console_end(); - - ut_asserteq(1, run_command("pwm invert 0 0 0", 0)); -- ut_assert_nextline("error(-38)") -+ ut_assert_nextline("error(-38)"); - ut_assert_console_end(); - - /* pwm */ -diff --git a/test/cmd/rw.c b/test/cmd/rw.c -new file mode 100644 -index 0000000000..98302bf047 ---- /dev/null -+++ b/test/cmd/rw.c -@@ -0,0 +1,104 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later -+/* -+ * Tests for read and write commands -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+static int setup_partitions(struct unit_test_state *uts, struct blk_desc **mmc_dev_desc) -+{ -+ char str_disk_guid[UUID_STR_LEN + 1]; -+ struct disk_partition parts[2] = { -+ { -+ .start = 48, /* GPT data takes up the first 34 blocks or so */ -+ .size = 4, -+ .name = "data", -+ }, -+ { -+ .start = 52, -+ .size = 10, -+ .name = "log", -+ }, -+ }; -+ -+ ut_asserteq(2, blk_get_device_by_str("mmc", "2", mmc_dev_desc)); -+ if (CONFIG_IS_ENABLED(RANDOM_UUID)) { -+ gen_rand_uuid_str(parts[0].uuid, UUID_STR_FORMAT_STD); -+ gen_rand_uuid_str(parts[1].uuid, UUID_STR_FORMAT_STD); -+ gen_rand_uuid_str(str_disk_guid, UUID_STR_FORMAT_STD); -+ } -+ ut_assertok(gpt_restore(*mmc_dev_desc, str_disk_guid, parts, -+ ARRAY_SIZE(parts))); -+ return 0; -+} -+ -+/* Fill the write buffer with pseudo-random data, clear the read buffer. */ -+static void init_buffers(char *rb, char *wb, size_t size, unsigned seed) -+{ -+ memset(rb, 0, size); -+ while (size--) { -+ *wb++ = seed; -+ seed *= 43; -+ seed += 17 + size/4; -+ } -+} -+ -+static int dm_test_read_write(struct unit_test_state *uts) -+{ -+ struct blk_desc *dev_desc; -+ char wbuf[1024], rbuf[1024]; -+ ulong wa, ra; -+ -+#define INIT_BUFFERS() init_buffers(rbuf, wbuf, sizeof(rbuf), __LINE__) -+ -+ ut_assertok(setup_partitions(uts, &dev_desc)); -+ -+ wa = map_to_sysmem(wbuf); -+ ra = map_to_sysmem(rbuf); -+ -+ /* Simple test, write to/read from same partition. */ -+ INIT_BUFFERS(); -+ ut_assertok(run_commandf("write mmc 2:1 0x%lx 0 2", wa)); -+ ut_assertok(run_commandf("read mmc 2:1 0x%lx 0 2", ra)); -+ ut_assertok(memcmp(wbuf, rbuf, sizeof(wbuf))); -+ ut_assertok(run_commandf("read mmc 2:1 0x%lx 1 1", ra)); -+ ut_assertok(memcmp(&wbuf[512], rbuf, 512)); -+ -+ /* Use name for write, number for read. */ -+ INIT_BUFFERS(); -+ ut_assertok(run_commandf("write mmc 2#log 0x%lx 0 2", wa)); -+ ut_assertok(run_commandf("read mmc 2:2 0x%lx 0 2", ra)); -+ ut_assertok(memcmp(wbuf, rbuf, sizeof(wbuf))); -+ -+ /* Use full device for write, name for read. */ -+ INIT_BUFFERS(); -+ ut_assertok(run_commandf("write mmc 2:0 0x%lx 0x30 2", wa)); -+ ut_assertok(run_commandf("read mmc 2#data 0x%lx 0 2", ra)); -+ ut_assertok(memcmp(wbuf, rbuf, sizeof(wbuf))); -+ -+ /* Use name for write, full device for read */ -+ INIT_BUFFERS(); -+ ut_assertok(run_commandf("write mmc 2#log 0x%lx 1 2", wa)); -+ ut_assertok(run_commandf("read mmc 2:0 0x%lx 0x35 2", ra)); -+ ut_assertok(memcmp(wbuf, rbuf, sizeof(wbuf))); -+ -+ /* Read/write outside partition bounds should be rejected upfront. */ -+ console_record_reset_enable(); -+ ut_asserteq(1, run_commandf("read mmc 2#data 0x%lx 3 2", ra)); -+ ut_assert_nextlinen("read out of range"); -+ ut_assert_console_end(); -+ -+ console_record_reset_enable(); -+ ut_asserteq(1, run_commandf("write mmc 2#log 0x%lx 9 2", wa)); -+ ut_assert_nextlinen("write out of range"); -+ ut_assert_console_end(); -+ -+ return 0; -+} -+ -+DM_TEST(dm_test_read_write, UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC); -diff --git a/test/cmd_ut.c b/test/cmd_ut.c -index 409c22bfd2..d440da833a 100644 ---- a/test/cmd_ut.c -+++ b/test/cmd_ut.c -@@ -110,6 +110,9 @@ static struct cmd_tbl cmd_ut_sub[] = { - #ifdef CONFIG_CMD_LOADM - U_BOOT_CMD_MKENT(loadm, CONFIG_SYS_MAXARGS, 1, do_ut_loadm, "", ""), - #endif -+#ifdef CONFIG_CMD_PCI_MPS -+ U_BOOT_CMD_MKENT(pci_mps, CONFIG_SYS_MAXARGS, 1, do_ut_pci_mps, "", ""), -+#endif - #ifdef CONFIG_CMD_SEAMA - U_BOOT_CMD_MKENT(seama, CONFIG_SYS_MAXARGS, 1, do_ut_seama, "", ""), - #endif -@@ -209,6 +212,9 @@ static char ut_help_text[] = - #endif - #ifdef CONFIG_UT_OVERLAY - "\noverlay - device tree overlays" -+#endif -+#ifdef CONFIG_CMD_PCI_MPS -+ "\npci_mps - PCI Express Maximum Payload Size" - #endif - "\nprint - printing things to the console" - "\nsetexpr - setexpr command" -diff --git a/test/command_ut.c b/test/command_ut.c -index 9837d10eb5..a74bd109e1 100644 ---- a/test/command_ut.c -+++ b/test/command_ut.c -@@ -9,6 +9,8 @@ - #include - #include - #include -+#include -+#include - - static const char test_cmd[] = "setenv list 1\n setenv list ${list}2; " - "setenv list ${list}3\0" -@@ -17,6 +19,8 @@ static const char test_cmd[] = "setenv list 1\n setenv list ${list}2; " - static int do_ut_cmd(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[]) - { -+ char long_str[CONFIG_SYS_CBSIZE + 42]; -+ - printf("%s: Testing commands\n", __func__); - run_command("env default -f -a", 0); - -@@ -60,6 +64,36 @@ static int do_ut_cmd(struct cmd_tbl *cmdtp, int flag, int argc, - - assert(run_command("'", 0) == 1); - -+ /* Variadic function test-cases */ -+#pragma GCC diagnostic push -+#pragma GCC diagnostic ignored "-Wformat-zero-length" -+ assert(run_commandf("") == 0); -+#pragma GCC diagnostic pop -+ assert(run_commandf(" ") == 0); -+ assert(run_commandf("'") == 1); -+ -+ assert(run_commandf("env %s %s", "delete -f", "list") == 0); -+ /* Expected: "Error: "list" not defined" */ -+ assert(run_commandf("printenv list") == 1); -+ -+ memset(long_str, 'x', sizeof(long_str)); -+ assert(run_commandf("Truncation case: %s", long_str) == -ENOSPC); -+ -+ if (IS_ENABLED(CONFIG_HUSH_PARSER)) { -+ assert(run_commandf("env %s %s %s %s", "delete -f", "adder", -+ "black", "foo") == 0); -+ assert(run_commandf("setenv foo 'setenv %s 1\nsetenv %s 2'", -+ "black", "adder") == 0); -+ run_command("run foo", 0); -+ assert(env_get("black")); -+ assert(!strcmp("1", env_get("black"))); -+ assert(env_get("adder")); -+ assert(!strcmp("2", env_get("adder"))); -+ } -+ -+ /* Clean up before exit */ -+ run_command("env default -f -a", 0); -+ - printf("%s: Everything went swimmingly\n", __func__); - return 0; - } -diff --git a/test/dm/acpigen.c b/test/dm/acpigen.c -index 3ec2743af9..15b2b6f64a 100644 ---- a/test/dm/acpigen.c -+++ b/test/dm/acpigen.c -@@ -1083,7 +1083,7 @@ static int dm_test_acpi_write_name(struct unit_test_state *uts) - ut_asserteq(NAME_OP, *ptr++); - ptr += 10; - ut_asserteq(STRING_PREFIX, *ptr++); -- ut_asserteq_str("baldrick", (char *)ptr) -+ ut_asserteq_str("baldrick", (char *)ptr); - ptr += 9; - - ut_asserteq(NAME_OP, *ptr++); -diff --git a/test/dm/misc.c b/test/dm/misc.c -index 1506fdefe3..8bdd8c64bc 100644 ---- a/test/dm/misc.c -+++ b/test/dm/misc.c -@@ -51,13 +51,13 @@ static int dm_test_misc(struct unit_test_state *uts) - /* Read back last issued ioctl */ - ut_assertok(misc_call(dev, 2, NULL, 0, &last_ioctl, - sizeof(last_ioctl))); -- ut_asserteq(6, last_ioctl) -+ ut_asserteq(6, last_ioctl); - - ut_assertok(misc_ioctl(dev, 23, NULL)); - /* Read back last issued ioctl */ - ut_assertok(misc_call(dev, 2, NULL, 0, &last_ioctl, - sizeof(last_ioctl))); -- ut_asserteq(23, last_ioctl) -+ ut_asserteq(23, last_ioctl); - - /* Enable / disable tests */ - -diff --git a/test/dm/phy.c b/test/dm/phy.c -index df4c73fc70..4d4a083dd0 100644 ---- a/test/dm/phy.c -+++ b/test/dm/phy.c -@@ -28,22 +28,22 @@ static int dm_test_phy_base(struct unit_test_state *uts) - /* - * Get the same phy port in 2 different ways and compare. - */ -- ut_assertok(generic_phy_get_by_name(parent, "phy1", &phy1_method1)) -- ut_assertok(generic_phy_get_by_index(parent, 0, &phy1_method2)) -+ ut_assertok(generic_phy_get_by_name(parent, "phy1", &phy1_method1)); -+ ut_assertok(generic_phy_get_by_index(parent, 0, &phy1_method2)); - ut_asserteq(phy1_method1.id, phy1_method2.id); - - /* - * Get the second phy port. Check that the same phy provider (device) - * provides this 2nd phy port, but that the IDs are different - */ -- ut_assertok(generic_phy_get_by_name(parent, "phy2", &phy2)) -+ ut_assertok(generic_phy_get_by_name(parent, "phy2", &phy2)); - ut_asserteq_ptr(phy1_method2.dev, phy2.dev); - ut_assert(phy1_method1.id != phy2.id); - - /* - * Get the third phy port. Check that the phy provider is different - */ -- ut_assertok(generic_phy_get_by_name(parent, "phy3", &phy3)) -+ ut_assertok(generic_phy_get_by_name(parent, "phy3", &phy3)); - ut_assert(phy2.dev != phy3.dev); - - /* Try to get a non-existing phy */ -diff --git a/test/dm/scmi.c b/test/dm/scmi.c -index 93c7d08f43..d87e2731ce 100644 ---- a/test/dm/scmi.c -+++ b/test/dm/scmi.c -@@ -187,10 +187,10 @@ static int dm_test_scmi_resets(struct unit_test_state *uts) - ut_assertnonnull(agent); - - /* Test SCMI resect controller manipulation */ -- ut_assert(!agent->reset[0].asserted) -+ ut_assert(!agent->reset[0].asserted); - - ut_assertok(reset_assert(&scmi_devices->reset[0])); -- ut_assert(agent->reset[0].asserted) -+ ut_assert(agent->reset[0].asserted); - - ut_assertok(reset_deassert(&scmi_devices->reset[0])); - ut_assert(!agent->reset[0].asserted); -diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c -index 1d2af94f56..8e6e42e46b 100644 ---- a/test/dm/test-fdt.c -+++ b/test/dm/test-fdt.c -@@ -215,7 +215,7 @@ static int dm_test_fdt_pre_reloc(struct unit_test_state *uts) - - /* - * These are 2 pre-reloc devices: -- * one with "u-boot,dm-pre-reloc" property (a-test node), and the other -+ * one with "bootph-all" property (a-test node), and the other - * one whose driver marked with DM_FLAG_PRE_RELOC flag (h-test node). - */ - ut_asserteq(2, list_count_items(&uc->dev_head)); -diff --git a/test/dm/tpm.c b/test/dm/tpm.c -index 0b46f79959..3defb3c3da 100644 ---- a/test/dm/tpm.c -+++ b/test/dm/tpm.c -@@ -11,24 +11,116 @@ - #include - #include - --/* Basic test of the TPM uclass */ -+/* -+ * get_tpm_version() - Get a TPM of the given version -+ * -+ * @version: Version to get -+ * @devp: Returns the TPM device -+ * Returns: 0 if OK, -ENODEV if not found -+ */ -+static int get_tpm_version(enum tpm_version version, struct udevice **devp) -+{ -+ struct udevice *dev; -+ -+ /* -+ * For now we have to probe each TPM, since the version is set up in -+ * of_to_plat(). We could require TPMs to declare their version when -+ * probed, to avoid this -+ */ -+ uclass_foreach_dev_probe(UCLASS_TPM, dev) { -+ if (tpm_get_version(dev) == version) { -+ *devp = dev; -+ return 0; -+ } -+ } -+ -+ return -ENODEV; -+} -+ -+/* Basic test of initing a TPM */ -+static int test_tpm_init(struct unit_test_state *uts, enum tpm_version version) -+{ -+ struct udevice *dev; -+ -+ /* check probe success */ -+ ut_assertok(get_tpm_version(version, &dev)); -+ -+ ut_assertok(tpm_init(dev)); -+ -+ return 0; -+} -+ - static int dm_test_tpm(struct unit_test_state *uts) -+{ -+ ut_assertok(test_tpm_init(uts, TPM_V1)); -+ ut_assertok(test_tpm_init(uts, TPM_V2)); -+ -+ return 0; -+} -+DM_TEST(dm_test_tpm, UT_TESTF_SCAN_FDT); -+ -+/* Test report_state */ -+static int dm_test_tpm_report_state(struct unit_test_state *uts) - { - struct udevice *dev; - char buf[50]; - - /* check probe success */ -- ut_assertok(uclass_first_device_err(UCLASS_TPM, &dev)); -- ut_assert(tpm_is_v2(dev)); -+ ut_assertok(get_tpm_version(TPM_V2, &dev)); - - ut_assert(tpm_report_state(dev, buf, sizeof(buf))); - ut_asserteq_str("init_done=0", buf); - -- ut_assertok(tpm_init(dev)); -+ ut_assertok(tpm_auto_start(dev)); - - ut_assert(tpm_report_state(dev, buf, sizeof(buf))); - ut_asserteq_str("init_done=1", buf); - - return 0; - } --DM_TEST(dm_test_tpm, UT_TESTF_SCAN_FDT); -+DM_TEST(dm_test_tpm_report_state, UT_TESTF_SCAN_FDT); -+ -+/** -+ * test_tpm_autostart() - check the tpm_auto_start() call -+ * -+ * @uts: Unit test state -+ * @version: TPM version to use -+ * @reinit: true to call tpm_init() first -+ * Returns 0 if OK, non-zero on failure -+ */ -+static int test_tpm_autostart(struct unit_test_state *uts, -+ enum tpm_version version, bool reinit) -+{ -+ struct udevice *dev; -+ -+ /* check probe success */ -+ ut_assertok(get_tpm_version(version, &dev)); -+ -+ if (reinit) -+ ut_assertok(tpm_init(dev)); -+ /* -+ * tpm_auto_start will rerun tpm_init() if reinit, but handles the -+ * -EBUSY return code internally. -+ */ -+ ut_assertok(tpm_auto_start(dev)); -+ -+ return 0; -+} -+ -+static int dm_test_tpm_autostart(struct unit_test_state *uts) -+{ -+ ut_assertok(test_tpm_autostart(uts, TPM_V1, false)); -+ ut_assertok(test_tpm_autostart(uts, TPM_V2, false)); -+ -+ return 0; -+} -+DM_TEST(dm_test_tpm_autostart, UT_TESTF_SCAN_FDT); -+ -+static int dm_test_tpm_autostart_reinit(struct unit_test_state *uts) -+{ -+ ut_assertok(test_tpm_autostart(uts, TPM_V1, true)); -+ ut_assertok(test_tpm_autostart(uts, TPM_V2, true)); -+ -+ return 0; -+} -+DM_TEST(dm_test_tpm_autostart_reinit, UT_TESTF_SCAN_FDT); -diff --git a/test/dm/video.c b/test/dm/video.c -index 17a33cc7af..30778157d9 100644 ---- a/test/dm/video.c -+++ b/test/dm/video.c -@@ -151,6 +151,8 @@ static int dm_test_video_text(struct unit_test_state *uts) - - ut_assertok(select_vidconsole(uts, "vidconsole0")); - ut_assertok(video_get_nologo(uts, &dev)); -+ ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); -+ ut_assertok(vidconsole_select_font(con, "8x16", 0)); - ut_asserteq(46, compress_frame_buffer(uts, dev)); - - ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); -@@ -175,6 +177,42 @@ static int dm_test_video_text(struct unit_test_state *uts) - } - DM_TEST(dm_test_video_text, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); - -+static int dm_test_video_text_12x22(struct unit_test_state *uts) -+{ -+ struct udevice *dev, *con; -+ int i; -+ -+#define WHITE 0xffff -+#define SCROLL_LINES 100 -+ -+ ut_assertok(select_vidconsole(uts, "vidconsole0")); -+ ut_assertok(video_get_nologo(uts, &dev)); -+ ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); -+ ut_assertok(vidconsole_select_font(con, "12x22", 0)); -+ ut_asserteq(46, compress_frame_buffer(uts, dev)); -+ -+ ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); -+ vidconsole_putc_xy(con, 0, 0, 'a'); -+ ut_asserteq(89, compress_frame_buffer(uts, dev)); -+ -+ vidconsole_putc_xy(con, 0, 0, ' '); -+ ut_asserteq(46, compress_frame_buffer(uts, dev)); -+ -+ for (i = 0; i < 20; i++) -+ vidconsole_putc_xy(con, VID_TO_POS(i * 8), 0, ' ' + i); -+ ut_asserteq(363, compress_frame_buffer(uts, dev)); -+ -+ vidconsole_set_row(con, 0, WHITE); -+ ut_asserteq(46, compress_frame_buffer(uts, dev)); -+ -+ for (i = 0; i < 20; i++) -+ vidconsole_putc_xy(con, VID_TO_POS(i * 8), 0, ' ' + i); -+ ut_asserteq(363, compress_frame_buffer(uts, dev)); -+ -+ return 0; -+} -+DM_TEST(dm_test_video_text_12x22, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); -+ - /* Test handling of special characters in the console */ - static int dm_test_video_chars(struct unit_test_state *uts) - { -@@ -184,6 +222,7 @@ static int dm_test_video_chars(struct unit_test_state *uts) - ut_assertok(select_vidconsole(uts, "vidconsole0")); - ut_assertok(video_get_nologo(uts, &dev)); - ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); -+ ut_assertok(vidconsole_select_font(con, "8x16", 0)); - vidconsole_put_string(con, test_string); - ut_asserteq(466, compress_frame_buffer(uts, dev)); - -@@ -201,6 +240,7 @@ static int dm_test_video_ansi(struct unit_test_state *uts) - ut_assertok(select_vidconsole(uts, "vidconsole0")); - ut_assertok(video_get_nologo(uts, &dev)); - ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); -+ ut_assertok(vidconsole_select_font(con, "8x16", 0)); - - /* reference clear: */ - video_clear(con->parent); -@@ -249,6 +289,7 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot, - - ut_assertok(video_get_nologo(uts, &dev)); - ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); -+ ut_assertok(vidconsole_select_font(con, "8x16", 0)); - ut_asserteq(46, compress_frame_buffer(uts, dev)); - - /* Check display wrap */ -diff --git a/test/lib/kconfig.c b/test/lib/kconfig.c -index 472d2c5728..76225ba8ff 100644 ---- a/test/lib/kconfig.c -+++ b/test/lib/kconfig.c -@@ -15,12 +15,12 @@ static int lib_test_is_enabled(struct unit_test_state *uts) - { - ulong val; - -- ut_asserteq(1, IS_ENABLED(CONFIG_CMDLINE)) -- ut_asserteq(0, IS_ENABLED(CONFIG__UNDEFINED)) -+ ut_asserteq(1, IS_ENABLED(CONFIG_CMDLINE)); -+ ut_asserteq(0, IS_ENABLED(CONFIG__UNDEFINED)); - -- ut_asserteq(1, CONFIG_IS_ENABLED(CMDLINE)) -- ut_asserteq(0, CONFIG_IS_ENABLED(OF_PLATDATA)) -- ut_asserteq(0, CONFIG_IS_ENABLED(_UNDEFINED)) -+ ut_asserteq(1, CONFIG_IS_ENABLED(CMDLINE)); -+ ut_asserteq(0, CONFIG_IS_ENABLED(OF_PLATDATA)); -+ ut_asserteq(0, CONFIG_IS_ENABLED(_UNDEFINED)); - - ut_asserteq(0xc000, - IF_ENABLED_INT(CONFIG_BLOBLIST_FIXED, CONFIG_BLOBLIST_ADDR)); -diff --git a/test/lib/kconfig_spl.c b/test/lib/kconfig_spl.c -index c89ceaec66..8f8a3411b1 100644 ---- a/test/lib/kconfig_spl.c -+++ b/test/lib/kconfig_spl.c -@@ -15,9 +15,9 @@ static int lib_test_spl_is_enabled(struct unit_test_state *uts) - { - ulong val; - -- ut_asserteq(0, CONFIG_IS_ENABLED(CMDLINE)) -- ut_asserteq(1, CONFIG_IS_ENABLED(OF_PLATDATA)) -- ut_asserteq(0, CONFIG_IS_ENABLED(_UNDEFINED)) -+ ut_asserteq(0, CONFIG_IS_ENABLED(CMDLINE)); -+ ut_asserteq(1, CONFIG_IS_ENABLED(OF_PLATDATA)); -+ ut_asserteq(0, CONFIG_IS_ENABLED(_UNDEFINED)); - - /* - * This fails if CONFIG_TEST_KCONFIG_ENABLE is not enabled, since the -diff --git a/test/nokia_rx51_test.sh b/test/nokia_rx51_test.sh -index a516ec2967..dca9ef3027 100755 ---- a/test/nokia_rx51_test.sh -+++ b/test/nokia_rx51_test.sh -@@ -83,8 +83,10 @@ echo - - # Download qflasher and nolo images - # This is proprietary qemu flasher tool with first stage images, but license allows non-commercial redistribution --wget -c http://repository.maemo.org/qemu-n900/qemu-n900.tar.gz --tar -xf qemu-n900.tar.gz -+if ! test -f qflasher || ! test -f xloader-qemu.bin || ! test -f secondary-qemu.bin; then -+ test -f qemu-n900.tar.gz || wget -c http://repository.maemo.org/qemu-n900/qemu-n900.tar.gz -+ tar -xf qemu-n900.tar.gz -+fi - - # Download Maemo script u-boot-gen-combined - if ! test -f u-boot-gen-combined; then -@@ -94,16 +96,22 @@ if ! test -f u-boot-gen-combined; then - fi - - # Download Maemo fiasco kernel --wget -c http://repository.maemo.org/pool/maemo5.0/free/k/kernel/kernel_2.6.28-20103103+0m5_armel.deb --dpkg -x kernel_2.6.28-20103103+0m5_armel.deb kernel_2.6.28 -+if ! test -d kernel_2.6.28; then -+ test -f kernel_2.6.28-20103103+0m5_armel.deb || wget -c http://repository.maemo.org/pool/maemo5.0/free/k/kernel/kernel_2.6.28-20103103+0m5_armel.deb -+ dpkg -x kernel_2.6.28-20103103+0m5_armel.deb kernel_2.6.28 -+fi - - # Download Maemo libc --wget -c http://repository.maemo.org/pool/maemo5.0/free/g/glibc/libc6_2.5.1-1eglibc27+0m5_armel.deb --dpkg -x libc6_2.5.1-1eglibc27+0m5_armel.deb libc6_2.5.1 -+if ! test -d libc6_2.5.1; then -+ test -f libc6_2.5.1-1eglibc27+0m5_armel.deb || wget -c http://repository.maemo.org/pool/maemo5.0/free/g/glibc/libc6_2.5.1-1eglibc27+0m5_armel.deb -+ dpkg -x libc6_2.5.1-1eglibc27+0m5_armel.deb libc6_2.5.1 -+fi - - # Download Maemo busybox --wget -c http://repository.maemo.org/pool/maemo5.0/free/b/busybox/busybox_1.10.2.legal-1osso30+0m5_armel.deb --dpkg -x busybox_1.10.2.legal-1osso30+0m5_armel.deb busybox_1.10.2 -+if ! test -d busybox_1.10.2; then -+ test -f busybox_1.10.2.legal-1osso30+0m5_armel.deb || wget -c http://repository.maemo.org/pool/maemo5.0/free/b/busybox/busybox_1.10.2.legal-1osso30+0m5_armel.deb -+ dpkg -x busybox_1.10.2.legal-1osso30+0m5_armel.deb busybox_1.10.2 -+fi - - echo - echo "=======================================" -diff --git a/test/py/multiplexed_log.py b/test/py/multiplexed_log.py -index 5e79075f2e..63237594bb 100644 ---- a/test/py/multiplexed_log.py -+++ b/test/py/multiplexed_log.py -@@ -111,7 +111,7 @@ class RunAndLog(object): - """Clean up any resources managed by this object.""" - pass - -- def run(self, cmd, cwd=None, ignore_errors=False, stdin=None): -+ def run(self, cmd, cwd=None, ignore_errors=False, stdin=None, env=None): - """Run a command as a sub-process, and log the results. - - The output is available at self.output which can be useful if there is -@@ -126,6 +126,7 @@ class RunAndLog(object): - or exits with an error code, otherwise an exception will be - raised if such problems occur. - stdin: Input string to pass to the command as stdin (or None) -+ env: Environment to use, or None to use the current one - - Returns: - The output as a string. -@@ -139,7 +140,7 @@ class RunAndLog(object): - try: - p = subprocess.Popen(cmd, cwd=cwd, - stdin=subprocess.PIPE if stdin else None, -- stdout=subprocess.PIPE, stderr=subprocess.STDOUT) -+ stdout=subprocess.PIPE, stderr=subprocess.STDOUT, env=env) - (stdout, stderr) = p.communicate(input=stdin) - if stdout is not None: - stdout = stdout.decode('utf-8') -diff --git a/test/py/requirements.txt b/test/py/requirements.txt -index fae8b59caf..e241780f92 100644 ---- a/test/py/requirements.txt -+++ b/test/py/requirements.txt -@@ -1,5 +1,6 @@ - atomicwrites==1.4.1 - attrs==19.3.0 -+concurrencytest==0.1.2 - coverage==4.5.4 - extras==1.0.0 - filelock==3.0.12 -diff --git a/test/py/tests/test_fs/test_ext.py b/test/py/tests/test_fs/test_ext.py -index dba874fc59..05fefa53a0 100644 ---- a/test/py/tests/test_fs/test_ext.py -+++ b/test/py/tests/test_fs/test_ext.py -@@ -8,11 +8,24 @@ - This test verifies extended write operation on file system. - """ - -+import os.path - import pytest - import re -+from subprocess import check_output - from fstest_defs import * - from fstest_helpers import assert_fs_integrity - -+PLAIN_FILE='abcdefgh.txt' -+MANGLE_FILE='abcdefghi.txt' -+ -+def str2fat(long_filename): -+ splitext = os.path.splitext(long_filename.upper()) -+ name = splitext[0] -+ ext = splitext[1][1:] -+ if len(name) > 8: -+ name = '%s~1' % name[:6] -+ return '%-8s %s' % (name, ext) -+ - @pytest.mark.boardspec('sandbox') - @pytest.mark.slow - class TestFsExt(object): -@@ -317,3 +330,26 @@ class TestFsExt(object): - assert('FILE0123456789_79' in output) - - assert_fs_integrity(fs_type, fs_img) -+ -+ def test_fs_ext12(self, u_boot_console, fs_obj_ext): -+ """ -+ Test Case 12 - write plain and mangle file -+ """ -+ fs_type,fs_img,md5val = fs_obj_ext -+ with u_boot_console.log.section('Test Case 12 - write plain and mangle file'): -+ # Test Case 12a - Check if command successfully returned -+ output = u_boot_console.run_command_list([ -+ 'host bind 0 %s' % fs_img, -+ '%swrite host 0:0 %x /%s 0' -+ % (fs_type, ADDR, PLAIN_FILE), -+ '%swrite host 0:0 %x /%s 0' -+ % (fs_type, ADDR, MANGLE_FILE)]) -+ assert('0 bytes written' in ''.join(output)) -+ # Test Case 12b - Read file system content -+ output = check_output('mdir -i %s' % fs_img, shell=True).decode() -+ # Test Case 12c - Check if short filename is not mangled -+ assert(str2fat(PLAIN_FILE) in ''.join(output)) -+ # Test Case 12d - Check if long filename is mangled -+ assert(str2fat(MANGLE_FILE) in ''.join(output)) -+ -+ assert_fs_integrity(fs_type, fs_img) -diff --git a/test/py/tests/test_of_migrate.py b/test/py/tests/test_of_migrate.py -new file mode 100644 -index 0000000000..910f7c0551 ---- /dev/null -+++ b/test/py/tests/test_of_migrate.py -@@ -0,0 +1,108 @@ -+# SPDX-License-Identifier: GPL-2.0 -+# Copyright 2023 Google LLC -+# Written by Simon Glass -+ -+"""Test handling of unmigrated u-boot,dm- tags""" -+ -+import os -+import pytest -+ -+import u_boot_utils as util -+ -+# This is needed for Azure, since the default '..' directory is not writeable -+TMPDIR1 = '/tmp/test_no_migrate' -+TMPDIR2 = '/tmp/test_no_migrate_spl' -+TMPDIR3 = '/tmp/test_migrate' -+ -+def build_for_migrate(cons, replace_pair, board, tmpdir, disable_migrate=True): -+ """Build an updated U-Boot with a slightly modified device tree -+ -+ Args: -+ cons (ConsoleBase): U-Boot console -+ replace_pair (tuple): -+ String to find -+ String to replace it with -+ board (str): Board to build -+ tmpdir (str): Temporary directory to use -+ disable_migrate (bool): True to disable CONFIG_OF_TAG_MIGRATE in build -+ """ -+ srcdir = cons.config.source_dir -+ build_dir = cons.config.build_dir -+ -+ # Get the source for the existing dts -+ dt_dir = os.path.join(build_dir, 'arch', 'sandbox', 'dts') -+ orig_fname = os.path.join(dt_dir, 'sandbox.dtb') -+ out_dts = os.path.join(dt_dir, 'sandbox_out.dts') -+ util.run_and_log(cons, ['dtc', orig_fname, '-I', 'dtb', '-O', 'dts', -+ '-o', out_dts]) -+ -+ # Update it to use an old tag -+ with open(out_dts) as inf: -+ data = inf.read() -+ data = data.replace(*replace_pair) -+ -+ dts_fname = os.path.join(dt_dir, 'sandbox_oldtag.dts') -+ with open(dts_fname, 'w') as outf: -+ print(data, file=outf) -+ dtb_fname = os.path.join(dt_dir, 'sandbox_oldtag.dtb') -+ util.run_and_log(cons, ['dtc', dts_fname, '-o', dtb_fname]) -+ -+ migrate = ['-a', '~CONFIG_OF_TAG_MIGRATE'] if disable_migrate else [] -+ -+ # Build sandbox with this new dtb, turning off OF_TAG_MIGRATE -+ env = dict(os.environ) -+ env['EXT_DTB'] = dtb_fname -+ env['DEVICE_TREE'] = 'sandbox_new' -+ env['NO_LTO'] = '1' # Speed up build -+ out = util.run_and_log( -+ cons, ['./tools/buildman/buildman', '-m', '--board', board, -+ *migrate, '-w', '-o', tmpdir], ignore_errors=True, env=env) -+ return out -+ -+@pytest.mark.slow -+@pytest.mark.boardspec('sandbox') -+def test_of_no_migrate(u_boot_console): -+ """Test sandbox with old boot phase tags like u-boot,dm-pre-proper""" -+ cons = u_boot_console -+ -+ build_for_migrate(cons, ['bootph-some-ram', 'u-boot,dm-pre-proper'], -+ 'sandbox', TMPDIR1) -+ -+ # It should fail to run, since the lcd device will not be bound before -+ # relocation. so won't get its frame-buffer memory -+ out = util.run_and_log( -+ cons, [os.path.join(TMPDIR1, 'u-boot'), '-D', '-c', 'help'], -+ ignore_errors=True) -+ assert "Video device 'lcd' cannot allocate frame buffer memory" in out -+ -+ -+@pytest.mark.slow -+@pytest.mark.boardspec('sandbox_spl') -+@pytest.mark.boardspec('spl_of_platdata_inst') -+@pytest.mark.boardspec('!sandbox_tpl') -+def test_of_no_migrate_spl(u_boot_console): -+ """Test sandbox with old boot phase tags like u-boot,dm-spl""" -+ cons = u_boot_console -+ -+ out = build_for_migrate(cons, ['bootph-pre-ram', 'u-boot,dm-spl'], -+ 'sandbox_spl', TMPDIR2) -+ -+ # It should fail to build, since the SPL DT will not include 'spl-test' -+ # node, among others -+ assert "undefined type ‘struct dtd_sandbox_spl_test’" in out -+ -+ -+@pytest.mark.slow -+@pytest.mark.boardspec('sandbox') -+def test_of_migrate(u_boot_console): -+ """Test sandbox shows a message when tags were migrated""" -+ cons = u_boot_console -+ -+ build_for_migrate(cons, ['bootph-some-ram', 'u-boot,dm-pre-proper'], -+ 'sandbox', TMPDIR3, disable_migrate=False) -+ -+ # It should show a migration message -+ out = util.run_and_log( -+ cons, [os.path.join(TMPDIR3, 'u-boot'), '-D', '-c', 'help'], -+ ignore_errors=True) -+ assert "Warning: Device tree includes old 'u-boot,dm-' tags" in out -diff --git a/test/py/tests/test_ofplatdata.py b/test/py/tests/test_ofplatdata.py -index e9cce4daf4..51a188454f 100644 ---- a/test/py/tests/test_ofplatdata.py -+++ b/test/py/tests/test_ofplatdata.py -@@ -13,10 +13,10 @@ def test_spl_devicetree(u_boot_console): - fdtgrep = cons.config.build_dir + '/tools/fdtgrep' - output = util.run_and_log(cons, [fdtgrep, '-l', dtb]) - -- assert "u-boot,dm-pre-reloc" not in output -- assert "u-boot,dm-pre-proper" not in output -- assert "u-boot,dm-spl" not in output -- assert "u-boot,dm-tpl" not in output -+ assert "bootph-all" not in output -+ assert "bootph-some-ram" not in output -+ assert "bootph-pre-ram" not in output -+ assert "bootph-pre-sram" not in output - - assert "spl-test5" not in output - assert "spl-test6" not in output -diff --git a/test/py/tests/test_vbe_vpl.py b/test/py/tests/test_vbe_vpl.py -index d1c9d0548a..ed12d3a461 100644 ---- a/test/py/tests/test_vbe_vpl.py -+++ b/test/py/tests/test_vbe_vpl.py -@@ -15,6 +15,7 @@ def test_vbe_vpl(u_boot_console): - #cmd = [cons.config.build_dir + fname, '-v'] - ram = os.path.join(cons.config.build_dir, 'ram.bin') - fdt = os.path.join(cons.config.build_dir, 'arch/sandbox/dts/test.dtb') -+ image_fname = os.path.join(cons.config.build_dir, 'image.bin') - - # Enable firmware1 and the mmc that it uses. These are needed for the full - # VBE flow. -@@ -24,12 +25,13 @@ def test_vbe_vpl(u_boot_console): - cons, f'fdtput -t s {fdt} /bootstd/firmware1 status okay') - u_boot_utils.run_and_log( - cons, f'fdtput -t s {fdt} /mmc3 status okay') -+ u_boot_utils.run_and_log( -+ cons, f'fdtput -t s {fdt} /mmc3 filename {image_fname}') - - # Remove any existing RAM file, so we don't have old data present - if os.path.exists(ram): - os.remove(ram) -- flags = ['-p', os.path.join(cons.config.build_dir, 'image.bin'), '-w', -- '-s', 'state.dtb'] -+ flags = ['-p', image_fname, '-w', '-s', 'state.dtb'] - cons.restart_uboot_with_flags(flags) - - # Make sure that VBE was used in both VPL (to load SPL) and SPL (to load -diff --git a/test/py/tests/test_vboot.py b/test/py/tests/test_vboot.py -index e3e7ca4b21..04fa59f98b 100644 ---- a/test/py/tests/test_vboot.py -+++ b/test/py/tests/test_vboot.py -@@ -30,6 +30,12 @@ For pre-load header verification: - - Check that image verification fails - - Tests run with both SHA1 and SHA256 hashing. -+ -+This also tests fdt_add_pubkey utility in the simple way: -+- Create DTB and FIT files -+- Add keys with fdt_add_pubkey to DTB -+- Sign FIT image -+- Check with fit_check_sign that keys properly added to DTB file - """ - - import os -@@ -40,6 +46,41 @@ import u_boot_utils as util - import vboot_forge - import vboot_evil - -+# Common helper functions -+def dtc(dts, cons, dtc_args, datadir, tmpdir, dtb): -+ """Run the device tree compiler to compile a .dts file -+ -+ The output file will be the same as the input file but with a .dtb -+ extension. -+ -+ Args: -+ dts: Device tree file to compile. -+ cons: U-Boot console. -+ dtc_args: DTC arguments. -+ datadir: Path to data directory. -+ tmpdir: Path to temp directory. -+ dtb: Resulting DTB file. -+ """ -+ dtb = dts.replace('.dts', '.dtb') -+ util.run_and_log(cons, 'dtc %s %s%s -O dtb ' -+ '-o %s%s' % (dtc_args, datadir, dts, tmpdir, dtb)) -+ -+def make_fit(its, cons, mkimage, dtc_args, datadir, fit): -+ """Make a new FIT from the .its source file. -+ -+ This runs 'mkimage -f' to create a new FIT. -+ -+ Args: -+ its: Filename containing .its source. -+ cons: U-Boot console. -+ mkimage: Path to mkimage utility. -+ dtc_args: DTC arguments. -+ datadir: Path to data directory. -+ fit: Resulting FIT file. -+ """ -+ util.run_and_log(cons, [mkimage, '-D', dtc_args, '-f', -+ '%s%s' % (datadir, its), fit]) -+ - # Only run the full suite on a few combinations, since it doesn't add any more - # test coverage. - TESTDATA_IN = [ -@@ -82,19 +123,6 @@ def test_vboot(u_boot_console, name, sha_algo, padding, sign_options, required, - The SHA1 and SHA256 tests are combined into a single test since the - key-generation process is quite slow and we want to avoid doing it twice. - """ -- def dtc(dts): -- """Run the device tree compiler to compile a .dts file -- -- The output file will be the same as the input file but with a .dtb -- extension. -- -- Args: -- dts: Device tree file to compile. -- """ -- dtb = dts.replace('.dts', '.dtb') -- util.run_and_log(cons, 'dtc %s %s%s -O dtb ' -- '-o %s%s' % (dtc_args, datadir, dts, tmpdir, dtb)) -- - def dtc_options(dts, options): - """Run the device tree compiler to compile a .dts file - -@@ -152,17 +180,6 @@ def test_vboot(u_boot_console, name, sha_algo, padding, sign_options, required, - assert('sandbox: continuing, as we cannot run' - not in ''.join(output)) - -- def make_fit(its): -- """Make a new FIT from the .its source file. -- -- This runs 'mkimage -f' to create a new FIT. -- -- Args: -- its: Filename containing .its source. -- """ -- util.run_and_log(cons, [mkimage, '-D', dtc_args, '-f', -- '%s%s' % (datadir, its), fit]) -- - def sign_fit(sha_algo, options): - """Sign the FIT - -@@ -286,12 +303,12 @@ def test_vboot(u_boot_console, name, sha_algo, padding, sign_options, required, - # Compile our device tree files for kernel and U-Boot. These are - # regenerated here since mkimage will modify them (by adding a - # public key) below. -- dtc('sandbox-kernel.dts') -- dtc('sandbox-u-boot.dts') -+ dtc('sandbox-kernel.dts', cons, dtc_args, datadir, tmpdir, dtb) -+ dtc('sandbox-u-boot.dts', cons, dtc_args, datadir, tmpdir, dtb) - - # Build the FIT, but don't sign anything yet - cons.log.action('%s: Test FIT with signed images' % sha_algo) -- make_fit('sign-images-%s%s.its' % (sha_algo, padding)) -+ make_fit('sign-images-%s%s.its' % (sha_algo, padding), cons, mkimage, dtc_args, datadir, fit) - run_bootm(sha_algo, 'unsigned images', ' - OK' if algo_arg else 'dev-', True) - - # Sign images with our dev keys -@@ -299,10 +316,10 @@ def test_vboot(u_boot_console, name, sha_algo, padding, sign_options, required, - run_bootm(sha_algo, 'signed images', 'dev+', True) - - # Create a fresh .dtb without the public keys -- dtc('sandbox-u-boot.dts') -+ dtc('sandbox-u-boot.dts', cons, dtc_args, datadir, tmpdir, dtb) - - cons.log.action('%s: Test FIT with signed configuration' % sha_algo) -- make_fit('sign-configs-%s%s.its' % (sha_algo, padding)) -+ make_fit('sign-configs-%s%s.its' % (sha_algo, padding), cons, mkimage, dtc_args, datadir, fit) - run_bootm(sha_algo, 'unsigned config', '%s+ OK' % ('sha256' if algo_arg else sha_algo), True) - - # Sign images with our dev keys -@@ -352,7 +369,7 @@ def test_vboot(u_boot_console, name, sha_algo, padding, sign_options, required, - run_bootm(sha_algo, 'evil kernel@', msg, False, efit) - - # Create a new properly signed fit and replace header bytes -- make_fit('sign-configs-%s%s.its' % (sha_algo, padding)) -+ make_fit('sign-configs-%s%s.its' % (sha_algo, padding), cons, mkimage, dtc_args, datadir, fit) - sign_fit(sha_algo, sign_options) - bcfg = u_boot_console.config.buildconfig - max_size = int(bcfg.get('config_fit_signature_max_size', 0x10000000), 0) -@@ -399,19 +416,19 @@ def test_vboot(u_boot_console, name, sha_algo, padding, sign_options, required, - # Compile our device tree files for kernel and U-Boot. These are - # regenerated here since mkimage will modify them (by adding a - # public key) below. -- dtc('sandbox-kernel.dts') -- dtc('sandbox-u-boot.dts') -+ dtc('sandbox-kernel.dts', cons, dtc_args, datadir, tmpdir, dtb) -+ dtc('sandbox-u-boot.dts', cons, dtc_args, datadir, tmpdir, dtb) - - cons.log.action('%s: Test FIT with configs images' % sha_algo) - - # Build the FIT with prod key (keys required) and sign it. This puts the - # signature into sandbox-u-boot.dtb, marked 'required' -- make_fit('sign-configs-%s%s-prod.its' % (sha_algo, padding)) -+ make_fit('sign-configs-%s%s-prod.its' % (sha_algo, padding), cons, mkimage, dtc_args, datadir, fit) - sign_fit(sha_algo, sign_options) - - # Build the FIT with dev key (keys NOT required). This adds the - # signature into sandbox-u-boot.dtb, NOT marked 'required'. -- make_fit('sign-configs-%s%s.its' % (sha_algo, padding)) -+ make_fit('sign-configs-%s%s.its' % (sha_algo, padding), cons, mkimage, dtc_args, datadir, fit) - sign_fit_norequire(sha_algo, sign_options) - - # So now sandbox-u-boot.dtb two signatures, for the prod and dev keys. -@@ -423,7 +440,7 @@ def test_vboot(u_boot_console, name, sha_algo, padding, sign_options, required, - - # Build the FIT with dev key (keys required) and sign it. This puts the - # signature into sandbox-u-boot.dtb, marked 'required'. -- make_fit('sign-configs-%s%s.its' % (sha_algo, padding)) -+ make_fit('sign-configs-%s%s.its' % (sha_algo, padding), cons, mkimage, dtc_args, datadir, fit) - sign_fit(sha_algo, sign_options) - - # Set the required-mode policy to "any". -@@ -461,17 +478,17 @@ def test_vboot(u_boot_console, name, sha_algo, padding, sign_options, required, - # Compile our device tree files for kernel and U-Boot. These are - # regenerated here since mkimage will modify them (by adding a - # public key) below. -- dtc('sandbox-kernel.dts') -+ dtc('sandbox-kernel.dts', cons, dtc_args, datadir, tmpdir, dtb) - dtc_options('sandbox-u-boot-global%s.dts' % padding, '-p 1024') - - # Build the FIT with dev key (keys NOT required). This adds the - # signature into sandbox-u-boot.dtb, NOT marked 'required'. -- make_fit('simple-images.its') -+ make_fit('simple-images.its', cons, mkimage, dtc_args, datadir, fit) - sign_fit_dtb(sha_algo, '', dtb) - - # Build the dtb for binman that define the pre-load header - # with the global sigature. -- dtc('sandbox-binman%s.dts' % padding) -+ dtc('sandbox-binman%s.dts' % padding, cons, dtc_args, datadir, tmpdir, dtb) - - # Run binman to create the final image with the not signed fit - # and the pre-load header that contains the global signature. -@@ -531,3 +548,96 @@ def test_vboot(u_boot_console, name, sha_algo, padding, sign_options, required, - # Go back to the original U-Boot with the correct dtb. - cons.config.dtb = old_dtb - cons.restart_uboot() -+ -+ -+TESTDATA_IN = [ -+ ['sha1-basic', 'sha1', '', None, False], -+ ['sha1-pad', 'sha1', '', '-E -p 0x10000', False], -+ ['sha1-pss', 'sha1', '-pss', None, False], -+ ['sha1-pss-pad', 'sha1', '-pss', '-E -p 0x10000', False], -+ ['sha256-basic', 'sha256', '', None, False], -+ ['sha256-pad', 'sha256', '', '-E -p 0x10000', False], -+ ['sha256-pss', 'sha256', '-pss', None, False], -+ ['sha256-pss-pad', 'sha256', '-pss', '-E -p 0x10000', False], -+ ['sha256-pss-required', 'sha256', '-pss', None, False], -+ ['sha256-pss-pad-required', 'sha256', '-pss', '-E -p 0x10000', False], -+ ['sha384-basic', 'sha384', '', None, False], -+ ['sha384-pad', 'sha384', '', '-E -p 0x10000', False], -+ ['algo-arg', 'algo-arg', '', '-o sha256,rsa2048', True], -+ ['sha256-global-sign', 'sha256', '', '', False], -+ ['sha256-global-sign-pss', 'sha256', '-pss', '', False], -+] -+ -+# Mark all but the first test as slow, so they are not run with '-k not slow' -+TESTDATA = [TESTDATA_IN[0]] -+TESTDATA += [pytest.param(*v, marks=pytest.mark.slow) for v in TESTDATA_IN[1:]] -+ -+@pytest.mark.boardspec('sandbox') -+@pytest.mark.buildconfigspec('fit_signature') -+@pytest.mark.requiredtool('dtc') -+@pytest.mark.requiredtool('openssl') -+@pytest.mark.parametrize("name,sha_algo,padding,sign_options,algo_arg", TESTDATA) -+def test_fdt_add_pubkey(u_boot_console, name, sha_algo, padding, sign_options, algo_arg): -+ """Test fdt_add_pubkey utility with bunch of different algo options.""" -+ -+ def sign_fit(sha_algo, options): -+ """Sign the FIT -+ -+ Signs the FIT and writes the signature into it. -+ -+ Args: -+ sha_algo: Either 'sha1' or 'sha256', to select the algorithm to -+ use. -+ options: Options to provide to mkimage. -+ """ -+ args = [mkimage, '-F', '-k', tmpdir, fit] -+ if options: -+ args += options.split(' ') -+ cons.log.action('%s: Sign images' % sha_algo) -+ util.run_and_log(cons, args) -+ -+ def test_add_pubkey(sha_algo, padding, sign_options): -+ """Test fdt_add_pubkey utility with given hash algorithm and padding. -+ -+ This function tests if fdt_add_pubkey utility may add public keys into dtb. -+ -+ Args: -+ sha_algo: Either 'sha1' or 'sha256', to select the algorithm to use -+ padding: Either '' or '-pss', to select the padding to use for the -+ rsa signature algorithm. -+ sign_options: Options to mkimage when signing a fit image. -+ """ -+ -+ # Create a fresh .dtb without the public keys -+ dtc('sandbox-u-boot.dts', cons, dtc_args, datadir, tmpdir, dtb) -+ -+ cons.log.action('%s: Test fdt_add_pubkey with signed configuration' % sha_algo) -+ # Then add the dev key via the fdt_add_pubkey tool -+ util.run_and_log(cons, [fdt_add_pubkey, '-a', '%s,%s' % ('sha256' if algo_arg else sha_algo, \ -+ 'rsa3072' if sha_algo == 'sha384' else 'rsa2048'), -+ '-k', tmpdir, '-n', 'dev', '-r', 'conf', dtb]) -+ -+ make_fit('sign-configs-%s%s.its' % (sha_algo, padding), cons, mkimage, dtc_args, datadir, fit) -+ -+ # Sign images with our dev keys -+ sign_fit(sha_algo, sign_options) -+ -+ # Check with fit_check_sign that FIT is signed with key -+ util.run_and_log(cons, [fit_check_sign, '-f', fit, '-k', dtb]) -+ -+ cons = u_boot_console -+ tmpdir = os.path.join(cons.config.result_dir, name) + '/' -+ if not os.path.exists(tmpdir): -+ os.mkdir(tmpdir) -+ datadir = cons.config.source_dir + '/test/py/tests/vboot/' -+ fit = '%stest.fit' % tmpdir -+ mkimage = cons.config.build_dir + '/tools/mkimage' -+ binman = cons.config.source_dir + '/tools/binman/binman' -+ fit_check_sign = cons.config.build_dir + '/tools/fit_check_sign' -+ fdt_add_pubkey = cons.config.build_dir + '/tools/fdt_add_pubkey' -+ dtc_args = '-I dts -O dtb -i %s' % tmpdir -+ dtb = '%ssandbox-u-boot.dtb' % tmpdir -+ -+ # keys created in test_vboot test -+ -+ test_add_pubkey(sha_algo, padding, sign_options) -diff --git a/test/py/u_boot_utils.py b/test/py/u_boot_utils.py -index c4fc23aeda..9e161fbc23 100644 ---- a/test/py/u_boot_utils.py -+++ b/test/py/u_boot_utils.py -@@ -157,7 +157,7 @@ def wait_until_file_open_fails(fn, ignore_errors): - return - raise Exception('File can still be opened') - --def run_and_log(u_boot_console, cmd, ignore_errors=False, stdin=None): -+def run_and_log(u_boot_console, cmd, ignore_errors=False, stdin=None, env=None): - """Run a command and log its output. - - Args: -@@ -170,6 +170,7 @@ def run_and_log(u_boot_console, cmd, ignore_errors=False, stdin=None): - an error code, otherwise an exception will be raised if such - problems occur. - stdin: Input string to pass to the command as stdin (or None) -+ env: Environment to use, or None to use the current one - - Returns: - The output as a string. -@@ -177,7 +178,7 @@ def run_and_log(u_boot_console, cmd, ignore_errors=False, stdin=None): - if isinstance(cmd, str): - cmd = cmd.split() - runner = u_boot_console.log.get_runner(cmd[0], sys.stdout) -- output = runner.run(cmd, ignore_errors=ignore_errors, stdin=stdin) -+ output = runner.run(cmd, ignore_errors=ignore_errors, stdin=stdin, env=env) - runner.close() - return output - -diff --git a/test/run b/test/run -index c4ab046ce8..768b22577c 100755 ---- a/test/run -+++ b/test/run -@@ -56,6 +56,11 @@ echo "${prompt}" - run_test "sandbox_noinst" ./test/py/test.py --bd sandbox_noinst --build ${para} \ - -k 'test_ofplatdata or test_handoff or test_spl' - -+# Run tests which require sandbox_vpl -+echo "${prompt}" -+run_test "sandbox_vpl" ./test/py/test.py --bd sandbox_vpl --build ${para} \ -+ -k 'vpl or test_spl' -+ - if [ -z "$tools_only" ]; then - # Run tests for the flat-device-tree version of sandbox. This is a special - # build which does not enable CONFIG_OF_LIVE for the live device tree, so we can -@@ -76,6 +81,7 @@ TOOLS_DIR=build-sandbox_spl/tools - - run_test "binman" ./tools/binman/binman --toolpath ${TOOLS_DIR} test - run_test "patman" ./tools/patman/patman test -+run_test "u_boot_pylib" ./tools/u_boot_pylib/u_boot_pylib - - run_test "buildman" ./tools/buildman/buildman -t ${skip} - run_test "fdt" ./tools/dtoc/test_fdt -t -diff --git a/test/test-main.c b/test/test-main.c -index ea959f4e85..b3c30d9293 100644 ---- a/test/test-main.c -+++ b/test/test-main.c -@@ -46,14 +46,14 @@ enum fdtchk_t { - */ - static enum fdtchk_t fdt_action(void) - { -- /* Do a copy for sandbox (but only the U-Boot build, not SPL) */ -- if (CONFIG_IS_ENABLED(SANDBOX)) -- return FDTCHK_COPY; -- - /* For sandbox SPL builds, do nothing */ -- if (IS_ENABLED(CONFIG_SANDBOX)) -+ if (IS_ENABLED(CONFIG_SANDBOX) && IS_ENABLED(CONFIG_SPL_BUILD)) - return FDTCHK_NONE; - -+ /* Do a copy for sandbox (but only the U-Boot build, not SPL) */ -+ if (IS_ENABLED(CONFIG_SANDBOX)) -+ return FDTCHK_COPY; -+ - /* For all other boards, do a checksum */ - return FDTCHK_CHECKSUM; - } -diff --git a/test/unicode_ut.c b/test/unicode_ut.c -index 382b796516..b27d7116b9 100644 ---- a/test/unicode_ut.c -+++ b/test/unicode_ut.c -@@ -192,7 +192,7 @@ static int unicode_test_utf8_get(struct unit_test_state *uts) - if (!code) - break; - } -- ut_asserteq_ptr(s, d2 + 9) -+ ut_asserteq_ptr(s, d2 + 9); - - /* Check characters less than 0x10000 */ - s = d3; -@@ -203,7 +203,7 @@ static int unicode_test_utf8_get(struct unit_test_state *uts) - if (!code) - break; - } -- ut_asserteq_ptr(s, d3 + 9) -+ ut_asserteq_ptr(s, d3 + 9); - - /* Check character greater 0xffff */ - s = d4; -@@ -228,7 +228,7 @@ static int unicode_test_utf8_put(struct unit_test_state *uts) - - /* Commercial at, translates to one character */ - pos = buffer; -- ut_assert(!utf8_put('@', &pos)) -+ ut_assert(!utf8_put('@', &pos)); - ut_asserteq(1, pos - buffer); - ut_asserteq('@', buffer[0]); - ut_assert(!buffer[1]); -diff --git a/tools/.gitignore b/tools/.gitignore -index 788ea260a0..cda3ea628c 100644 ---- a/tools/.gitignore -+++ b/tools/.gitignore -@@ -6,6 +6,7 @@ - /dumpimage - /easylogo/easylogo - /envcrc -+/fdt_add_pubkey - /fdtgrep - /file2include - /fit_check_sign -diff --git a/tools/Makefile b/tools/Makefile -index e13effbb66..38699b069d 100644 ---- a/tools/Makefile -+++ b/tools/Makefile -@@ -65,6 +65,7 @@ mkenvimage-objs := mkenvimage.o os_support.o lib/crc32.o - - hostprogs-y += dumpimage mkimage - hostprogs-$(CONFIG_TOOLS_LIBCRYPTO) += fit_info fit_check_sign -+hostprogs-$(CONFIG_TOOLS_LIBCRYPTO) += fdt_add_pubkey - - ifneq ($(CONFIG_CMD_BOOTEFI_SELFTEST)$(CONFIG_FWU_MDATA_GPT_BLK),) - hostprogs-y += file2include -@@ -150,6 +151,7 @@ dumpimage-objs := $(dumpimage-mkimage-objs) dumpimage.o - mkimage-objs := $(dumpimage-mkimage-objs) mkimage.o - fit_info-objs := $(dumpimage-mkimage-objs) fit_info.o - fit_check_sign-objs := $(dumpimage-mkimage-objs) fit_check_sign.o -+fdt_add_pubkey-objs := $(dumpimage-mkimage-objs) fdt_add_pubkey.o - file2include-objs := file2include.o - - ifneq ($(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_TOOLS_LIBCRYPTO),) -@@ -187,6 +189,7 @@ HOSTCFLAGS_fit_image.o += -DMKIMAGE_DTC=\"$(CONFIG_MKIMAGE_DTC_PATH)\" - HOSTLDLIBS_dumpimage := $(HOSTLDLIBS_mkimage) - HOSTLDLIBS_fit_info := $(HOSTLDLIBS_mkimage) - HOSTLDLIBS_fit_check_sign := $(HOSTLDLIBS_mkimage) -+HOSTLDLIBS_fdt_add_pubkey := $(HOSTLDLIBS_mkimage) - - hostprogs-$(CONFIG_EXYNOS5250) += mkexynosspl - hostprogs-$(CONFIG_EXYNOS5420) += mkexynosspl -diff --git a/tools/binman/binman.rst b/tools/binman/binman.rst -index 0921e31878..23cbb99b4b 100644 ---- a/tools/binman/binman.rst -+++ b/tools/binman/binman.rst -@@ -95,6 +95,19 @@ Binman uses the following terms: - - binary - an input binary that goes into the image - - -+Installation -+------------ -+ -+You can install binman using:: -+ -+ pip install binary-manager -+ -+The name is chosen since binman conflicts with an existing package. -+ -+If you are using binman within the U-Boot tree, it may be easiest to add a -+symlink from your local `~/.bin` directory to `/path/to/tools/binman/binman`. -+ -+ - Relationship to FIT - ------------------- - -@@ -838,6 +851,14 @@ offset-from-elf: - is the symbol to lookup (relative to elf-base-sym) and is an offset - to add to that value. - -+preserve: -+ Indicates that this entry should be preserved by any firmware updates. This -+ flag should be checked by the updater when it is deciding which entries to -+ update. This flag is normally attached to sections but can be attached to -+ a single entry in a section if the updater supports it. Not that binman -+ itself has no control over the updater's behaviour, so this is just a -+ signal. It is not enforced by binman. -+ - Examples of the above options can be found in the tests. See the - tools/binman/test directory. - -@@ -1122,8 +1143,7 @@ It is sometimes inconvenient to add a 'binman' node to the .dts file for each - board. This can be done by using #include to bring in a common file. Another - approach supported by the U-Boot build system is to automatically include - a common header. You can then put the binman node (and anything else that is --specific to U-Boot, such as u-boot,dm-pre-reloc properies) in that header --file. -+specific to U-Boot, such as bootph-all properies) in that header file. - - Binman will search for the following files in arch//dts:: - -@@ -1327,9 +1347,43 @@ You can also replace just a selection of entries:: - - $ binman replace -i image.bin "*u-boot*" -I indir - -+It is possible to replace whole sections as well, but in that case any -+information about entries within the section may become outdated. This is -+because Binman cannot know whether things have moved around or resized within -+the section, once you have updated its data. -+ -+Technical note: With 'allow-repack', Binman writes information about the -+original offset and size properties of each entry, if any were specified, in -+the 'orig-offset' and 'orig-size' properties. This allows Binman to distinguish -+between an entry which ended up being packed at an offset (or assigned a size) -+and an entry which had a particular offset / size requested in the Binman -+configuration. Where are particular offset / size was requested, this is treated -+as set in stone, so Binman will ensure it doesn't change. Without this feature, -+repacking an entry might cause it to disobey the original constraints provided -+when it was created. -+ -+ Repacking an image involves - - .. _`BinmanLogging`: - -+Signing FIT container with private key in an image -+-------------------------------------------------- -+ -+You can sign FIT container with private key in your image. -+For example:: -+ -+ $ binman sign -i image.bin -k privatekey -a sha256,rsa4096 fit -+ -+binman will extract FIT container, sign and replace it immediately. -+ -+If you want to sign and replace FIT container in place:: -+ -+ $ binman sign -i image.bin -k privatekey -a sha256,rsa4096 -f fit.fit fit -+ -+which will sign FIT container with private key and replace it immediately -+inside your image. -+ -+ - Logging - ------- - -@@ -1408,6 +1462,16 @@ You can also use `--fetch all` to fetch all tools or `--fetch ` to fetch - a particular tool. Some tools are built from source code, in which case you will - need to have at least the `build-essential` and `git` packages installed. - -+Tools are fetched into the `~/.binman-tools` directory. This directory is -+automatically added to the toolpath so there is no need to use `--toolpath` to -+specify it. If you want to use these tools outside binman, you may want to -+add this directory to your `PATH`. For example, if you use bash, add this to -+the end of `.bashrc`:: -+ -+ PATH="$HOME/.binman-tools:$PATH" -+ -+To select a custom directory, use the `--tooldir` option. -+ - Bintool Documentation - ===================== - -@@ -1426,8 +1490,9 @@ Binman commands and arguments - - Usage:: - -- binman [-h] [-B BUILD_DIR] [-D] [-H] [--toolpath TOOLPATH] [-T THREADS] -- [--test-section-timeout] [-v VERBOSITY] [-V] -+ binman [-h] [-B BUILD_DIR] [-D] [--tooldir TOOLDIR] [-H] -+ [--toolpath TOOLPATH] [-T THREADS] [--test-section-timeout] -+ [-v VERBOSITY] [-V] - {build,bintool-docs,entry-docs,ls,extract,replace,test,tool} ... - - Binman provides the following commands: -@@ -1452,11 +1517,13 @@ Options: - -D, --debug - Enabling debugging (provides a full traceback on error) - -+--tooldir TOOLDIR Set the directory to store tools -+ - -H, --full-help - Display the README file - - --toolpath TOOLPATH -- Add a path to the directories containing tools -+ Add a path to the list of directories containing tools - - -T THREADS, --threads THREADS - Number of threads to use (0=single-thread). Note that -T0 is useful for -@@ -1664,6 +1731,12 @@ Options: - -m, --map - Output a map file for the updated image - -+-O OUTDIR, --outdir OUTDIR -+ Path to directory to use for intermediate and output files -+ -+-p, --preserve -+ Preserve temporary output directory even if option -O is not given -+ - This replaces one or more entries in an existing image. See - `Replacing files in an image`_. - -@@ -1696,6 +1769,35 @@ Options: - output directory if a single test is run (pass test name at the end of the - command line - -+binman sign -+----------- -+ -+Usage:: -+ -+ binman sign [-h] -a ALGO [-f FILE] -i IMAGE -k KEY [paths ...] -+ -+positional arguments: -+ -+paths -+ Paths within file to sign (wildcard) -+ -+options: -+ -+-h, --help -+ show this help message and exit -+ -+-a ALGO, --algo ALGO -+ Hash algorithm e.g. sha256,rsa4096 -+ -+-f FILE, --file FILE -+ Input filename to sign -+ -+-i IMAGE, --image IMAGE -+ Image filename to update -+ -+-k KEY, --key KEY -+ Private key file for signing -+ - binman tool - ----------- - -diff --git a/tools/binman/bintool.py b/tools/binman/bintool.py -index 8fda13ff01..81629683df 100644 ---- a/tools/binman/bintool.py -+++ b/tools/binman/bintool.py -@@ -18,10 +18,10 @@ import shutil - import tempfile - import urllib.error - --from patman import command --from patman import terminal --from patman import tools --from patman import tout -+from u_boot_pylib import command -+from u_boot_pylib import terminal -+from u_boot_pylib import tools -+from u_boot_pylib import tout - - BINMAN_DIR = os.path.dirname(os.path.realpath(__file__)) - -@@ -43,8 +43,6 @@ FETCH_NAMES = { - # Status of tool fetching - FETCHED, FAIL, PRESENT, STATUS_COUNT = range(4) - --DOWNLOAD_DESTDIR = os.path.join(os.getenv('HOME'), 'bin') -- - class Bintool: - """Tool which operates on binaries to help produce entry contents - -@@ -53,6 +51,10 @@ class Bintool: - # List of bintools to regard as missing - missing_list = [] - -+ # Directory to store tools. Note that this set up by set_tool_dir() which -+ # must be called before this class is used. -+ tooldir = '' -+ - def __init__(self, name, desc, version_regex=None, version_args='-V'): - self.name = name - self.desc = desc -@@ -112,6 +114,11 @@ class Bintool: - obj = cls(name) - return obj - -+ @classmethod -+ def set_tool_dir(cls, pathname): -+ """Set the path to use to store and find tools""" -+ cls.tooldir = pathname -+ - def show(self): - """Show a line of information about a bintool""" - if self.is_present(): -@@ -208,7 +215,8 @@ class Bintool: - return FAIL - if result is not True: - fname, tmpdir = result -- dest = os.path.join(DOWNLOAD_DESTDIR, self.name) -+ dest = os.path.join(self.tooldir, self.name) -+ os.makedirs(self.tooldir, exist_ok=True) - print(f"- writing to '{dest}'") - shutil.move(fname, dest) - if tmpdir: -@@ -389,7 +397,7 @@ class Bintool: - - @classmethod - def apt_install(cls, package): -- """Install a bintool using the 'aot' tool -+ """Install a bintool using the 'apt' tool - - This requires use of servo so may request a password - -diff --git a/tools/binman/bintool_test.py b/tools/binman/bintool_test.py -index 7efb8391db..f9b16d4c73 100644 ---- a/tools/binman/bintool_test.py -+++ b/tools/binman/bintool_test.py -@@ -16,10 +16,10 @@ import urllib.error - from binman import bintool - from binman.bintool import Bintool - --from patman import command --from patman import terminal --from patman import test_util --from patman import tools -+from u_boot_pylib import command -+from u_boot_pylib import terminal -+from u_boot_pylib import test_util -+from u_boot_pylib import tools - - # pylint: disable=R0904 - class TestBintool(unittest.TestCase): -@@ -134,12 +134,14 @@ class TestBintool(unittest.TestCase): - dirname = os.path.join(self._indir, 'download_dir') - os.mkdir(dirname) - fname = os.path.join(dirname, 'downloaded') -+ -+ # Rely on bintool to create this directory - destdir = os.path.join(self._indir, 'dest_dir') -- os.mkdir(destdir) -+ - dest_fname = os.path.join(destdir, '_testing') - self.seq = 0 - -- with unittest.mock.patch.object(bintool, 'DOWNLOAD_DESTDIR', destdir): -+ with unittest.mock.patch.object(bintool.Bintool, 'tooldir', destdir): - with unittest.mock.patch.object(tools, 'download', - side_effect=handle_download): - with test_util.capture_sys_output() as (stdout, _): -@@ -250,7 +252,7 @@ class TestBintool(unittest.TestCase): - btest = Bintool.create('_testing') - col = terminal.Color() - self.fname = None -- with unittest.mock.patch.object(bintool, 'DOWNLOAD_DESTDIR', -+ with unittest.mock.patch.object(bintool.Bintool, 'tooldir', - self._indir): - with unittest.mock.patch.object(tools, 'run', side_effect=fake_run): - with test_util.capture_sys_output() as (stdout, _): -@@ -344,8 +346,11 @@ class TestBintool(unittest.TestCase): - - def test_failed_command(self): - """Check that running a command that does not exist returns None""" -- btool = Bintool.create('_testing') -- result = btool.run_cmd_result('fred') -+ destdir = os.path.join(self._indir, 'dest_dir') -+ os.mkdir(destdir) -+ with unittest.mock.patch.object(bintool.Bintool, 'tooldir', destdir): -+ btool = Bintool.create('_testing') -+ result = btool.run_cmd_result('fred') - self.assertIsNone(result) - - -diff --git a/tools/binman/bintools.rst b/tools/binman/bintools.rst -index edb373ab59..c30e7eb9ff 100644 ---- a/tools/binman/bintools.rst -+++ b/tools/binman/bintools.rst -@@ -10,6 +10,20 @@ binaries. It is fairly easy to create new bintools. Just add a new file to the - - - -+Bintool: bzip2: Compression/decompression using the bzip2 algorithm -+------------------------------------------------------------------- -+ -+This bintool supports running `bzip2` to compress and decompress data, as -+used by binman. -+ -+It is also possible to fetch the tool, which uses `apt` to install it. -+ -+Documentation is available via:: -+ -+ man bzip2 -+ -+ -+ - Bintool: cbfstool: Coreboot filesystem (CBFS) tool - -------------------------------------------------- - -@@ -58,6 +72,20 @@ See `Chromium OS vboot documentation`_ for more information. - - - -+Bintool: gzip: Compression/decompression using the gzip algorithm -+----------------------------------------------------------------- -+ -+This bintool supports running `gzip` to compress and decompress data, as -+used by binman. -+ -+It is also possible to fetch the tool, which uses `apt` to install it. -+ -+Documentation is available via:: -+ -+ man gzip -+ -+ -+ - Bintool: ifwitool: Handles the 'ifwitool' tool - ---------------------------------------------- - -@@ -101,6 +129,20 @@ Documentation is available via:: - - - -+Bintool: lzop: Compression/decompression using the lzop algorithm -+----------------------------------------------------------------- -+ -+This bintool supports running `lzop` to compress and decompress data, as -+used by binman. -+ -+It is also possible to fetch the tool, which uses `apt` to install it. -+ -+Documentation is available via:: -+ -+ man lzop -+ -+ -+ - Bintool: mkimage: Image generation for U-Boot - --------------------------------------------- - -@@ -113,3 +155,31 @@ Support is provided for fetching this on Debian-like systems, using apt. - - - -+Bintool: xz: Compression/decompression using the xz algorithm -+------------------------------------------------------------- -+ -+This bintool supports running `xz` to compress and decompress data, as -+used by binman. -+ -+It is also possible to fetch the tool, which uses `apt` to install it. -+ -+Documentation is available via:: -+ -+ man xz -+ -+ -+ -+Bintool: zstd: Compression/decompression using the zstd algorithm -+----------------------------------------------------------------- -+ -+This bintool supports running `zstd` to compress and decompress data, as -+used by binman. -+ -+It is also possible to fetch the tool, which uses `apt` to install it. -+ -+Documentation is available via:: -+ -+ man zstd -+ -+ -+ -diff --git a/tools/binman/btool/lz4.py b/tools/binman/btool/lz4.py -index dc9e37921a..fd520d13a5 100644 ---- a/tools/binman/btool/lz4.py -+++ b/tools/binman/btool/lz4.py -@@ -60,7 +60,7 @@ import re - import tempfile - - from binman import bintool --from patman import tools -+from u_boot_pylib import tools - - # pylint: disable=C0103 - class Bintoollz4(bintool.Bintool): -diff --git a/tools/binman/btool/lzma_alone.py b/tools/binman/btool/lzma_alone.py -index 52a960fd2f..1fda2f68c7 100644 ---- a/tools/binman/btool/lzma_alone.py -+++ b/tools/binman/btool/lzma_alone.py -@@ -37,7 +37,7 @@ import re - import tempfile - - from binman import bintool --from patman import tools -+from u_boot_pylib import tools - - # pylint: disable=C0103 - class Bintoollzma_alone(bintool.Bintool): -diff --git a/tools/binman/btool/openssl.py b/tools/binman/btool/openssl.py -new file mode 100644 -index 0000000000..3a4dbdd6d7 ---- /dev/null -+++ b/tools/binman/btool/openssl.py -@@ -0,0 +1,94 @@ -+# SPDX-License-Identifier: GPL-2.0+ -+# Copyright 2022 Google LLC -+# -+"""Bintool implementation for openssl -+ -+openssl provides a number of features useful for signing images -+ -+Documentation is at https://www.coreboot.org/CBFS -+ -+Source code is at https://www.openssl.org/ -+""" -+ -+import hashlib -+ -+from binman import bintool -+from u_boot_pylib import tools -+ -+class Bintoolopenssl(bintool.Bintool): -+ """openssl tool -+ -+ This bintool supports creating new openssl certificates. -+ -+ It also supports fetching a binary openssl -+ -+ Documentation about openssl is at https://www.openssl.org/ -+ """ -+ def __init__(self, name): -+ super().__init__( -+ name, 'openssl cryptography toolkit', -+ version_regex=r'OpenSSL (.*) \(', version_args='version') -+ -+ def x509_cert(self, cert_fname, input_fname, key_fname, cn, revision, -+ config_fname): -+ """Create a certificate -+ -+ Args: -+ cert_fname (str): Filename of certificate to create -+ input_fname (str): Filename containing data to sign -+ key_fname (str): Filename of .pem file -+ cn (str): Common name -+ revision (int): Revision number -+ config_fname (str): Filename to write fconfig into -+ -+ Returns: -+ str: Tool output -+ """ -+ indata = tools.read_file(input_fname) -+ hashval = hashlib.sha512(indata).hexdigest() -+ with open(config_fname, 'w', encoding='utf-8') as outf: -+ print(f'''[ req ] -+distinguished_name = req_distinguished_name -+x509_extensions = v3_ca -+prompt = no -+dirstring_type = nobmp -+ -+[ req_distinguished_name ] -+CN = {cert_fname} -+ -+[ v3_ca ] -+basicConstraints = CA:true -+1.3.6.1.4.1.294.1.3 = ASN1:SEQUENCE:swrv -+1.3.6.1.4.1.294.1.34 = ASN1:SEQUENCE:sysfw_image_integrity -+ -+[ swrv ] -+swrv = INTEGER:{revision} -+ -+[ sysfw_image_integrity ] -+shaType = OID:2.16.840.1.101.3.4.2.3 -+shaValue = FORMAT:HEX,OCT:{hashval} -+imageSize = INTEGER:{len(indata)} -+''', file=outf) -+ args = ['req', '-new', '-x509', '-key', key_fname, '-nodes', -+ '-outform', 'DER', '-out', cert_fname, '-config', config_fname, -+ '-sha512'] -+ return self.run_cmd(*args) -+ -+ def fetch(self, method): -+ """Fetch handler for openssl -+ -+ This installs the openssl package using the apt utility. -+ -+ Args: -+ method (FETCH_...): Method to use -+ -+ Returns: -+ True if the file was fetched and now installed, None if a method -+ other than FETCH_BIN was requested -+ -+ Raises: -+ Valuerror: Fetching could not be completed -+ """ -+ if method != bintool.FETCH_BIN: -+ return None -+ return self.apt_install('openssl') -diff --git a/tools/binman/cbfs_util.py b/tools/binman/cbfs_util.py -index 7bd3d89798..fc56b40b75 100644 ---- a/tools/binman/cbfs_util.py -+++ b/tools/binman/cbfs_util.py -@@ -22,8 +22,8 @@ import sys - - from binman import bintool - from binman import elf --from patman import command --from patman import tools -+from u_boot_pylib import command -+from u_boot_pylib import tools - - # Set to True to enable printing output while working - DEBUG = False -diff --git a/tools/binman/cbfs_util_test.py b/tools/binman/cbfs_util_test.py -index e0f792fd34..ee951d10cf 100755 ---- a/tools/binman/cbfs_util_test.py -+++ b/tools/binman/cbfs_util_test.py -@@ -20,8 +20,8 @@ from binman import bintool - from binman import cbfs_util - from binman.cbfs_util import CbfsWriter - from binman import elf --from patman import test_util --from patman import tools -+from u_boot_pylib import test_util -+from u_boot_pylib import tools - - U_BOOT_DATA = b'1234' - U_BOOT_DTB_DATA = b'udtb' -diff --git a/tools/binman/cmdline.py b/tools/binman/cmdline.py -index 986d6f1a31..4b875a9dcd 100644 ---- a/tools/binman/cmdline.py -+++ b/tools/binman/cmdline.py -@@ -7,7 +7,13 @@ - - import argparse - from argparse import ArgumentParser -+import os - from binman import state -+import os -+import pathlib -+ -+BINMAN_DIR = pathlib.Path(__file__).parent -+HAS_TESTS = (BINMAN_DIR / "ftest.py").exists() - - def make_extract_parser(subparsers): - """make_extract_parser: Make a subparser for the 'extract' command -@@ -67,6 +73,14 @@ def ParseArgs(argv): - options provides access to the options (e.g. option.debug) - args is a list of string arguments - """ -+ def _AddPreserve(pars): -+ pars.add_argument('-O', '--outdir', type=str, -+ action='store', help='Path to directory to use for intermediate ' -+ 'and output files') -+ pars.add_argument('-p', '--preserve', action='store_true',\ -+ help='Preserve temporary output directory even if option -O is not ' -+ 'given') -+ - if '-H' in argv: - argv.append('build') - -@@ -80,8 +94,11 @@ controlled by a description in the board device tree.''' - help='Enabling debugging (provides a full traceback on error)') - parser.add_argument('-H', '--full-help', action='store_true', - default=False, help='Display the README file') -+ parser.add_argument('--tooldir', type=str, -+ default=os.path.join(os.getenv('HOME'), '.binman-tools'), -+ help='Set the directory to store tools') - parser.add_argument('--toolpath', type=str, action='append', -- help='Add a path to the directories containing tools') -+ help='Add a path to the list of directories containing tools') - parser.add_argument('-T', '--threads', type=int, - default=None, help='Number of threads to use (0=single-thread)') - parser.add_argument('--test-section-timeout', action='store_true', -@@ -118,12 +135,7 @@ controlled by a description in the board device tree.''' - build_parser.add_argument('-n', '--no-expanded', action='store_true', - help="Don't use 'expanded' versions of entries where available; " - "normally 'u-boot' becomes 'u-boot-expanded', for example") -- build_parser.add_argument('-O', '--outdir', type=str, -- action='store', help='Path to directory to use for intermediate and ' -- 'output files') -- build_parser.add_argument('-p', '--preserve', action='store_true',\ -- help='Preserve temporary output directory even if option -O is not ' -- 'given') -+ _AddPreserve(build_parser) - build_parser.add_argument('-u', '--update-fdt', action='store_true', - default=False, help='Update the binman node with offset/size info') - build_parser.add_argument('--update-fdt-in-elf', type=str, -@@ -160,26 +172,43 @@ controlled by a description in the board device tree.''' - help='Path to directory to use for input files') - replace_parser.add_argument('-m', '--map', action='store_true', - default=False, help='Output a map file for the updated image') -+ _AddPreserve(replace_parser) - replace_parser.add_argument('paths', type=str, nargs='*', - help='Paths within file to replace (wildcard)') - -- test_parser = subparsers.add_parser('test', help='Run tests') -- test_parser.add_argument('-P', '--processes', type=int, -- help='set number of processes to use for running tests') -- test_parser.add_argument('-T', '--test-coverage', action='store_true', -- default=False, help='run tests and check for 100%% coverage') -- test_parser.add_argument('-X', '--test-preserve-dirs', action='store_true', -- help='Preserve and display test-created input directories; also ' -- 'preserve the output directory if a single test is run (pass test ' -- 'name at the end of the command line') -- test_parser.add_argument('tests', nargs='*', -- help='Test names to run (omit for all)') -+ sign_parser = subparsers.add_parser('sign', -+ help='Sign entries in image') -+ sign_parser.add_argument('-a', '--algo', type=str, required=True, -+ help='Hash algorithm e.g. sha256,rsa4096') -+ sign_parser.add_argument('-f', '--file', type=str, required=False, -+ help='Input filename to sign') -+ sign_parser.add_argument('-i', '--image', type=str, required=True, -+ help='Image filename to update') -+ sign_parser.add_argument('-k', '--key', type=str, required=True, -+ help='Private key file for signing') -+ sign_parser.add_argument('paths', type=str, nargs='*', -+ help='Paths within file to sign (wildcard)') -+ -+ if HAS_TESTS: -+ test_parser = subparsers.add_parser('test', help='Run tests') -+ test_parser.add_argument('-P', '--processes', type=int, -+ help='set number of processes to use for running tests') -+ test_parser.add_argument('-T', '--test-coverage', action='store_true', -+ default=False, help='run tests and check for 100%% coverage') -+ test_parser.add_argument( -+ '-X', '--test-preserve-dirs', action='store_true', -+ help='Preserve and display test-created input directories; also ' -+ 'preserve the output directory if a single test is run (pass ' -+ 'test name at the end of the command line') -+ test_parser.add_argument('tests', nargs='*', -+ help='Test names to run (omit for all)') - - tool_parser = subparsers.add_parser('tool', help='Check bintools') - tool_parser.add_argument('-l', '--list', action='store_true', - help='List all known bintools') -- tool_parser.add_argument('-f', '--fetch', action='store_true', -- help='fetch a bintool from a known location (or: all/missing)') -+ tool_parser.add_argument( -+ '-f', '--fetch', action='store_true', -+ help='fetch a bintool from a known location (or: all/missing)') - tool_parser.add_argument('bintools', type=str, nargs='*') - - return parser.parse_args(argv) -diff --git a/tools/binman/control.py b/tools/binman/control.py -index e64740094f..0febcb79a6 100644 ---- a/tools/binman/control.py -+++ b/tools/binman/control.py -@@ -7,19 +7,20 @@ - - from collections import OrderedDict - import glob -+import importlib.resources - import os - import pkg_resources - import re - - import sys --from patman import tools - - from binman import bintool - from binman import cbfs_util --from patman import command - from binman import elf - from binman import entry --from patman import tout -+from u_boot_pylib import command -+from u_boot_pylib import tools -+from u_boot_pylib import tout - - # These are imported if needed since they import libfdt - state = None -@@ -402,6 +403,8 @@ def ReplaceEntries(image_fname, input_fname, indir, entry_paths, - image_fname = os.path.abspath(image_fname) - image = Image.FromFile(image_fname) - -+ image.mark_build_done() -+ - # Replace an entry from a single file, as a special case - if input_fname: - if not entry_paths: -@@ -445,6 +448,31 @@ def ReplaceEntries(image_fname, input_fname, indir, entry_paths, - AfterReplace(image, allow_resize=allow_resize, write_map=write_map) - return image - -+def SignEntries(image_fname, input_fname, privatekey_fname, algo, entry_paths, -+ write_map=False): -+ """Sign and replace the data from one or more entries from input files -+ -+ Args: -+ image_fname: Image filename to process -+ input_fname: Single input filename to use if replacing one file, None -+ otherwise -+ algo: Hashing algorithm -+ entry_paths: List of entry paths to sign -+ privatekey_fname: Private key filename -+ write_map (bool): True to write the map file -+ """ -+ image_fname = os.path.abspath(image_fname) -+ image = Image.FromFile(image_fname) -+ -+ image.mark_build_done() -+ -+ BeforeReplace(image, allow_resize=True) -+ -+ for entry_path in entry_paths: -+ entry = image.FindEntryPath(entry_path) -+ entry.UpdateSignatures(privatekey_fname, algo, input_fname) -+ -+ AfterReplace(image, allow_resize=True, write_map=write_map) - - def PrepareImagesAndDtbs(dtb_fname, select_images, update_fdt, use_expanded): - """Prepare the images to be processed and select the device tree -@@ -641,19 +669,29 @@ def Binman(args): - global state - - if args.full_help: -- tools.print_full_help( -- os.path.join(os.path.dirname(os.path.realpath(sys.argv[0])), 'README.rst') -- ) -+ with importlib.resources.path('binman', 'README.rst') as readme: -+ tools.print_full_help(str(readme)) - return 0 - - # Put these here so that we can import this module without libfdt - from binman.image import Image - from binman import state - -- if args.cmd in ['ls', 'extract', 'replace', 'tool']: -+ tool_paths = [] -+ if args.toolpath: -+ tool_paths += args.toolpath -+ if args.tooldir: -+ tool_paths.append(args.tooldir) -+ tools.set_tool_paths(tool_paths or None) -+ bintool.Bintool.set_tool_dir(args.tooldir) -+ -+ if args.cmd in ['ls', 'extract', 'replace', 'tool', 'sign']: - try: - tout.init(args.verbosity) -- tools.prepare_output_dir(None) -+ if args.cmd == 'replace': -+ tools.prepare_output_dir(args.outdir, args.preserve) -+ else: -+ tools.prepare_output_dir(None) - if args.cmd == 'ls': - ListEntries(args.image, args.paths) - -@@ -666,8 +704,10 @@ def Binman(args): - do_compress=not args.compressed, - allow_resize=not args.fix_size, write_map=args.map) - -+ if args.cmd == 'sign': -+ SignEntries(args.image, args.file, args.key, args.algo, args.paths) -+ - if args.cmd == 'tool': -- tools.set_tool_paths(args.toolpath) - if args.list: - bintool.Bintool.list_all() - elif args.fetch: -@@ -719,7 +759,6 @@ def Binman(args): - try: - tools.set_input_dirs(args.indir) - tools.prepare_output_dir(args.outdir, args.preserve) -- tools.set_tool_paths(args.toolpath) - state.SetEntryArgs(args.entry_arg) - state.SetThreads(args.threads) - -diff --git a/tools/binman/elf.py b/tools/binman/elf.py -index 3cc8a38449..5816284c32 100644 ---- a/tools/binman/elf.py -+++ b/tools/binman/elf.py -@@ -13,9 +13,9 @@ import shutil - import struct - import tempfile - --from patman import command --from patman import tools --from patman import tout -+from u_boot_pylib import command -+from u_boot_pylib import tools -+from u_boot_pylib import tout - - ELF_TOOLS = True - try: -diff --git a/tools/binman/elf_test.py b/tools/binman/elf_test.py -index 8cb55ebb81..c98083961b 100644 ---- a/tools/binman/elf_test.py -+++ b/tools/binman/elf_test.py -@@ -12,10 +12,10 @@ import tempfile - import unittest - - from binman import elf --from patman import command --from patman import test_util --from patman import tools --from patman import tout -+from u_boot_pylib import command -+from u_boot_pylib import test_util -+from u_boot_pylib import tools -+from u_boot_pylib import tout - - binman_dir = os.path.dirname(os.path.realpath(sys.argv[0])) - -diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst -index e177860a6a..b71af801fd 100644 ---- a/tools/binman/entries.rst -+++ b/tools/binman/entries.rst -@@ -887,6 +887,11 @@ before its contents, so that it is possible to reconstruct the hierarchy - from the FMAP by using the offset information. This convention does not - seem to be documented, but is used in Chromium OS. - -+To mark an area as preserved, use the normal 'preserved' flag in the entry. -+This will result in the corresponding FMAP area having the -+FMAP_AREA_PRESERVE flag. This flag does not automatically propagate down to -+child entries. -+ - CBFS entries appear as a single entry, i.e. the sub-entries are ignored. - - -@@ -2285,6 +2290,24 @@ and kernel are genuine. - - - -+.. _etype_x509_cert: -+ -+Entry: x509-cert: An entry which contains an X509 certificate -+------------------------------------------------------------- -+ -+Properties / Entry arguments: -+ - content: List of phandles to entries to sign -+ -+Output files: -+ - input. - input file passed to openssl -+ - cert. - output file generated by openssl (which is -+ used as the entry contents) -+ -+openssl signs the provided data, writing the signature in this entry. This -+allows verification that the data is genuine -+ -+ -+ - .. _etype_x86_reset16: - - Entry: x86-reset16: x86 16-bit reset code for U-Boot -diff --git a/tools/binman/entry.py b/tools/binman/entry.py -index 5eacc5fa6c..39456906a4 100644 ---- a/tools/binman/entry.py -+++ b/tools/binman/entry.py -@@ -14,9 +14,9 @@ import time - from binman import bintool - from binman import elf - from dtoc import fdt_util --from patman import tools --from patman.tools import to_hex, to_hex_size --from patman import tout -+from u_boot_pylib import tools -+from u_boot_pylib.tools import to_hex, to_hex_size -+from u_boot_pylib import tout - - modules = {} - -@@ -100,6 +100,14 @@ class Entry(object): - appear in the map - optional (bool): True if this entry contains an optional external blob - overlap (bool): True if this entry overlaps with others -+ preserve (bool): True if this entry should be preserved when updating -+ firmware. This means that it will not be changed by the update. -+ This is just a signal: enforcement of this is up to the updater. -+ This flag does not automatically propagate down to child entries. -+ build_done (bool): Indicates that the entry data has been built and does -+ not need to be done again. This is only used with 'binman replace', -+ to stop sections from being rebuilt if their entries have not been -+ replaced - """ - fake_dir = None - -@@ -148,6 +156,8 @@ class Entry(object): - self.overlap = False - self.elf_base_sym = None - self.offset_from_elf = None -+ self.preserve = False -+ self.build_done = False - - @staticmethod - def FindEntryClass(etype, expanded): -@@ -310,6 +320,8 @@ class Entry(object): - self.offset_from_elf = fdt_util.GetPhandleNameOffset(self._node, - 'offset-from-elf') - -+ self.preserve = fdt_util.GetBool(self._node, 'preserve') -+ - def GetDefaultFilename(self): - return None - -@@ -1006,6 +1018,7 @@ features to produce new behaviours. - else: - self.contents_size = self.pre_reset_size - ok = self.ProcessContentsUpdate(data) -+ self.build_done = False - self.Detail('WriteData: size=%x, ok=%s' % (len(data), ok)) - section_ok = self.section.WriteChildData(self) - return ok and section_ok -@@ -1027,6 +1040,14 @@ features to produce new behaviours. - True if the section could be updated successfully, False if the - data is such that the section could not update - """ -+ self.build_done = False -+ entry = self.section -+ -+ # Now we must rebuild all sections above this one -+ while entry and entry != entry.section: -+ self.build_done = False -+ entry = entry.section -+ - return True - - def GetSiblingOrder(self): -@@ -1104,7 +1125,7 @@ features to produce new behaviours. - If there are faked blobs, the entries are added to the list - - Args: -- fake_blobs_list: List of Entry objects to be added to -+ faked_blobs_list: List of Entry objects to be added to - """ - # This is meaningless for anything other than blobs - pass -@@ -1349,3 +1370,14 @@ features to produce new behaviours. - val = elf.GetSymbolOffset(entry.elf_fname, sym_name, - entry.elf_base_sym) - return val + offset -+ -+ def mark_build_done(self): -+ """Mark an entry as already built""" -+ self.build_done = True -+ entries = self.GetEntries() -+ if entries: -+ for entry in entries.values(): -+ entry.mark_build_done() -+ -+ def UpdateSignatures(self, privatekey_fname, algo, input_fname): -+ self.Raise('Updating signatures is not supported with this entry type') -diff --git a/tools/binman/entry_test.py b/tools/binman/entry_test.py -index a6fbf62731..ac6582cf86 100644 ---- a/tools/binman/entry_test.py -+++ b/tools/binman/entry_test.py -@@ -14,7 +14,7 @@ from binman import entry - from binman.etype.blob import Entry_blob - from dtoc import fdt - from dtoc import fdt_util --from patman import tools -+from u_boot_pylib import tools - - class TestEntry(unittest.TestCase): - def setUp(self): -diff --git a/tools/binman/etype/_testing.py b/tools/binman/etype/_testing.py -index 1c1efb21a4..e092d98ce1 100644 ---- a/tools/binman/etype/_testing.py -+++ b/tools/binman/etype/_testing.py -@@ -9,7 +9,7 @@ from collections import OrderedDict - - from binman.entry import Entry, EntryArg - from dtoc import fdt_util --from patman import tools -+from u_boot_pylib import tools - - - class Entry__testing(Entry): -diff --git a/tools/binman/etype/atf_fip.py b/tools/binman/etype/atf_fip.py -index 6ecd95b71f..73a3f85b9f 100644 ---- a/tools/binman/etype/atf_fip.py -+++ b/tools/binman/etype/atf_fip.py -@@ -11,7 +11,7 @@ from binman.entry import Entry - from binman.etype.section import Entry_section - from binman.fip_util import FIP_TYPES, FipReader, FipWriter, UUID_LEN - from dtoc import fdt_util --from patman import tools -+from u_boot_pylib import tools - - class Entry_atf_fip(Entry_section): - """ARM Trusted Firmware's Firmware Image Package (FIP) -@@ -270,4 +270,4 @@ class Entry_atf_fip(Entry_section): - # Recreate the data structure, leaving the data for this child alone, - # so that child.data is used to pack into the FIP. - self.ObtainContents(skip_entry=child) -- return True -+ return super().WriteChildData(child) -diff --git a/tools/binman/etype/blob.py b/tools/binman/etype/blob.py -index c7ddcedffb..064fae5036 100644 ---- a/tools/binman/etype/blob.py -+++ b/tools/binman/etype/blob.py -@@ -8,8 +8,8 @@ - from binman.entry import Entry - from binman import state - from dtoc import fdt_util --from patman import tools --from patman import tout -+from u_boot_pylib import tools -+from u_boot_pylib import tout - - class Entry_blob(Entry): - """Arbitrary binary blob -@@ -102,7 +102,7 @@ class Entry_blob(Entry): - If there are faked blobs, the entries are added to the list - - Args: -- fake_blobs_list: List of Entry objects to be added to -+ faked_blobs_list: List of Entry objects to be added to - """ - if self.faked: - faked_blobs_list.append(self) -diff --git a/tools/binman/etype/blob_ext.py b/tools/binman/etype/blob_ext.py -index fba6271de2..ca26530738 100644 ---- a/tools/binman/etype/blob_ext.py -+++ b/tools/binman/etype/blob_ext.py -@@ -9,8 +9,8 @@ import os - - from binman.etype.blob import Entry_blob - from dtoc import fdt_util --from patman import tools --from patman import tout -+from u_boot_pylib import tools -+from u_boot_pylib import tout - - class Entry_blob_ext(Entry_blob): - """Externally built binary blob -@@ -26,11 +26,3 @@ class Entry_blob_ext(Entry_blob): - def __init__(self, section, etype, node): - Entry_blob.__init__(self, section, etype, node) - self.external = True -- -- def SetAllowFakeBlob(self, allow_fake): -- """Set whether the entry allows to create a fake blob -- -- Args: -- allow_fake_blob: True if allowed, False if not allowed -- """ -- self.allow_fake = allow_fake -diff --git a/tools/binman/etype/blob_ext_list.py b/tools/binman/etype/blob_ext_list.py -index f00202e9eb..1bfcf6733a 100644 ---- a/tools/binman/etype/blob_ext_list.py -+++ b/tools/binman/etype/blob_ext_list.py -@@ -9,8 +9,8 @@ import os - - from binman.etype.blob import Entry_blob - from dtoc import fdt_util --from patman import tools --from patman import tout -+from u_boot_pylib import tools -+from u_boot_pylib import tout - - class Entry_blob_ext_list(Entry_blob): - """List of externally built binary blobs -diff --git a/tools/binman/etype/cbfs.py b/tools/binman/etype/cbfs.py -index 832f8d038f..575aa624f6 100644 ---- a/tools/binman/etype/cbfs.py -+++ b/tools/binman/etype/cbfs.py -@@ -295,7 +295,7 @@ class Entry_cbfs(Entry): - # Recreate the data structure, leaving the data for this child alone, - # so that child.data is used to pack into the FIP. - self.ObtainContents(skip_entry=child) -- return True -+ return super().WriteChildData(child) - - def AddBintools(self, btools): - super().AddBintools(btools) -diff --git a/tools/binman/etype/fdtmap.py b/tools/binman/etype/fdtmap.py -index 33c9d039a9..f1f6217940 100644 ---- a/tools/binman/etype/fdtmap.py -+++ b/tools/binman/etype/fdtmap.py -@@ -9,8 +9,8 @@ image. - """ - - from binman.entry import Entry --from patman import tools --from patman import tout -+from u_boot_pylib import tools -+from u_boot_pylib import tout - - FDTMAP_MAGIC = b'_FDTMAP_' - FDTMAP_HDR_LEN = 16 -diff --git a/tools/binman/etype/files.py b/tools/binman/etype/files.py -index 2081bc727b..c8757eafab 100644 ---- a/tools/binman/etype/files.py -+++ b/tools/binman/etype/files.py -@@ -11,7 +11,7 @@ import os - - from binman.etype.section import Entry_section - from dtoc import fdt_util --from patman import tools -+from u_boot_pylib import tools - - # This is imported if needed - state = None -diff --git a/tools/binman/etype/fill.py b/tools/binman/etype/fill.py -index c91d0152a8..7c93d4e268 100644 ---- a/tools/binman/etype/fill.py -+++ b/tools/binman/etype/fill.py -@@ -5,7 +5,7 @@ - - from binman.entry import Entry - from dtoc import fdt_util --from patman import tools -+from u_boot_pylib import tools - - class Entry_fill(Entry): - """An entry which is filled to a particular byte value -diff --git a/tools/binman/etype/fit.py b/tools/binman/etype/fit.py -index cd2943533c..c395706ece 100644 ---- a/tools/binman/etype/fit.py -+++ b/tools/binman/etype/fit.py -@@ -12,7 +12,7 @@ from binman.etype.section import Entry_section - from binman import elf - from dtoc import fdt_util - from dtoc.fdt import Fdt --from patman import tools -+from u_boot_pylib import tools - - # Supported operations, with the fit,operation property - OP_GEN_FDT_NODES, OP_SPLIT_ELF = range(2) -@@ -453,6 +453,8 @@ class Entry_fit(Entry_section): - args.update({'align': fdt_util.fdt32_to_cpu(align.value)}) - if self.mkimage.run(reset_timestamp=True, output_fname=output_fname, - **args) is None: -+ if not self.GetAllowMissing(): -+ self.Raise("Missing tool: 'mkimage'") - # Bintool is missing; just use empty data as the output - self.record_missing_bintool(self.mkimage) - return tools.get_bytes(0, 1024) -@@ -775,6 +777,8 @@ class Entry_fit(Entry_section): - Args: - image_pos (int): Position of this entry in the image - """ -+ if self.build_done: -+ return - super().SetImagePos(image_pos) - - # If mkimage is missing we'll have empty data, -@@ -823,8 +827,27 @@ class Entry_fit(Entry_section): - self.mkimage = self.AddBintool(btools, 'mkimage') - - def CheckMissing(self, missing_list): -- # We must use our private entry list for this since generator notes -+ # We must use our private entry list for this since generator nodes - # which are removed from self._entries will otherwise not show up as - # missing - for entry in self._priv_entries.values(): - entry.CheckMissing(missing_list) -+ -+ def CheckEntries(self): -+ pass -+ -+ def UpdateSignatures(self, privatekey_fname, algo, input_fname): -+ uniq = self.GetUniqueName() -+ args = [ '-G', privatekey_fname, '-r', '-o', algo, '-F' ] -+ if input_fname: -+ fname = input_fname -+ else: -+ fname = tools.get_output_filename('%s.fit' % uniq) -+ tools.write_file(fname, self.GetData()) -+ args.append(fname) -+ -+ if self.mkimage.run_cmd(*args) is None: -+ self.Raise("Missing tool: 'mkimage'") -+ -+ data = tools.read_file(fname) -+ self.WriteData(data) -diff --git a/tools/binman/etype/fmap.py b/tools/binman/etype/fmap.py -index 0c576202a4..3669d91a0b 100644 ---- a/tools/binman/etype/fmap.py -+++ b/tools/binman/etype/fmap.py -@@ -7,9 +7,9 @@ - - from binman.entry import Entry - from binman import fmap_util --from patman import tools --from patman.tools import to_hex_size --from patman import tout -+from u_boot_pylib import tools -+from u_boot_pylib.tools import to_hex_size -+from u_boot_pylib import tout - - - class Entry_fmap(Entry): -@@ -33,6 +33,11 @@ class Entry_fmap(Entry): - from the FMAP by using the offset information. This convention does not - seem to be documented, but is used in Chromium OS. - -+ To mark an area as preserved, use the normal 'preserved' flag in the entry. -+ This will result in the corresponding FMAP area having the -+ FMAP_AREA_PRESERVE flag. This flag does not automatically propagate down to -+ child entries. -+ - CBFS entries appear as a single entry, i.e. the sub-entries are ignored. - """ - def __init__(self, section, etype, node): -@@ -48,6 +53,12 @@ class Entry_fmap(Entry): - entries = entry.GetEntries() - tout.debug("fmap: Add entry '%s' type '%s' (%s subentries)" % - (entry.GetPath(), entry.etype, to_hex_size(entries))) -+ -+ # Collect any flag (separate lines to ensure code coverage) -+ flags = 0 -+ if entry.preserve: -+ flags = fmap_util.FMAP_AREA_PRESERVE -+ - if entries and entry.etype != 'cbfs': - # Create an area for the section, which encompasses all entries - # within it -@@ -59,7 +70,7 @@ class Entry_fmap(Entry): - # Drop @ symbols in name - name = entry.name.replace('@', '') - areas.append( -- fmap_util.FmapArea(pos, entry.size or 0, name, 0)) -+ fmap_util.FmapArea(pos, entry.size or 0, name, flags)) - for subentry in entries.values(): - _AddEntries(areas, subentry) - else: -@@ -67,7 +78,7 @@ class Entry_fmap(Entry): - if pos is not None: - pos -= entry.section.GetRootSkipAtStart() - areas.append(fmap_util.FmapArea(pos or 0, entry.size or 0, -- entry.name, 0)) -+ entry.name, flags)) - - entries = self.GetImage().GetEntries() - areas = [] -diff --git a/tools/binman/etype/gbb.py b/tools/binman/etype/gbb.py -index ba2a362bb5..cca18af6e2 100644 ---- a/tools/binman/etype/gbb.py -+++ b/tools/binman/etype/gbb.py -@@ -8,11 +8,11 @@ - - from collections import OrderedDict - --from patman import command -+from u_boot_pylib import command - from binman.entry import Entry, EntryArg - - from dtoc import fdt_util --from patman import tools -+from u_boot_pylib import tools - - # Build GBB flags. - # (src/platform/vboot_reference/firmware/include/gbb_header.h) -diff --git a/tools/binman/etype/intel_ifwi.py b/tools/binman/etype/intel_ifwi.py -index 04fad401ee..6513b97c3e 100644 ---- a/tools/binman/etype/intel_ifwi.py -+++ b/tools/binman/etype/intel_ifwi.py -@@ -10,7 +10,7 @@ from collections import OrderedDict - from binman.entry import Entry - from binman.etype.blob_ext import Entry_blob_ext - from dtoc import fdt_util --from patman import tools -+from u_boot_pylib import tools - - class Entry_intel_ifwi(Entry_blob_ext): - """Intel Integrated Firmware Image (IFWI) file -diff --git a/tools/binman/etype/mkimage.py b/tools/binman/etype/mkimage.py -index 8a13d5ea8d..e028c44070 100644 ---- a/tools/binman/etype/mkimage.py -+++ b/tools/binman/etype/mkimage.py -@@ -9,7 +9,7 @@ from collections import OrderedDict - - from binman.entry import Entry - from dtoc import fdt_util --from patman import tools -+from u_boot_pylib import tools - - class Entry_mkimage(Entry): - """Binary produced by mkimage -diff --git a/tools/binman/etype/null.py b/tools/binman/etype/null.py -index c10d482447..263fb5244d 100644 ---- a/tools/binman/etype/null.py -+++ b/tools/binman/etype/null.py -@@ -5,7 +5,7 @@ - - from binman.entry import Entry - from dtoc import fdt_util --from patman import tools -+from u_boot_pylib import tools - - class Entry_null(Entry): - """An entry which has no contents of its own -diff --git a/tools/binman/etype/pre_load.py b/tools/binman/etype/pre_load.py -index b622281159..bd3545bffc 100644 ---- a/tools/binman/etype/pre_load.py -+++ b/tools/binman/etype/pre_load.py -@@ -8,7 +8,7 @@ - import os - import struct - from dtoc import fdt_util --from patman import tools -+from u_boot_pylib import tools - - from binman.entry import Entry - from binman.etype.collection import Entry_collection -diff --git a/tools/binman/etype/section.py b/tools/binman/etype/section.py -index 57b91ff726..c36edd1350 100644 ---- a/tools/binman/etype/section.py -+++ b/tools/binman/etype/section.py -@@ -16,9 +16,9 @@ import sys - from binman.entry import Entry - from binman import state - from dtoc import fdt_util --from patman import tools --from patman import tout --from patman.tools import to_hex_size -+from u_boot_pylib import tools -+from u_boot_pylib import tout -+from u_boot_pylib.tools import to_hex_size - - - class Entry_section(Entry): -@@ -172,7 +172,7 @@ class Entry_section(Entry): - def IsSpecialSubnode(self, node): - """Check if a node is a special one used by the section itself - -- Some notes are used for hashing / signatures and do not add entries to -+ Some nodes are used for hashing / signatures and do not add entries to - the actual section. - - Returns: -@@ -397,10 +397,13 @@ class Entry_section(Entry): - This excludes any padding. If the section is compressed, the - compressed data is returned - """ -- data = self.BuildSectionData(required) -- if data is None: -- return None -- self.SetContents(data) -+ if not self.build_done: -+ data = self.BuildSectionData(required) -+ if data is None: -+ return None -+ self.SetContents(data) -+ else: -+ data = self.data - if self._filename: - tools.write_file(tools.get_output_filename(self._filename), data) - return data -@@ -427,8 +430,11 @@ class Entry_section(Entry): - self._SortEntries() - self._extend_entries() - -- data = self.BuildSectionData(True) -- self.SetContents(data) -+ if self.build_done: -+ self.size = None -+ else: -+ data = self.BuildSectionData(True) -+ self.SetContents(data) - - self.CheckSize() - -@@ -810,6 +816,9 @@ class Entry_section(Entry): - def LoadData(self, decomp=True): - for entry in self._entries.values(): - entry.LoadData(decomp) -+ data = self.ReadData(decomp) -+ self.contents_size = len(data) -+ self.ProcessContentsUpdate(data) - self.Detail('Loaded data') - - def GetImage(self): -@@ -866,10 +875,15 @@ class Entry_section(Entry): - return data - - def WriteData(self, data, decomp=True): -- self.Raise("Replacing sections is not implemented yet") -+ ok = super().WriteData(data, decomp) -+ -+ # The section contents are now fixed and cannot be rebuilt from the -+ # containing entries. -+ self.mark_build_done() -+ return ok - - def WriteChildData(self, child): -- return True -+ return super().WriteChildData(child) - - def SetAllowMissing(self, allow_missing): - """Set whether a section allows missing external blobs -@@ -885,7 +899,7 @@ class Entry_section(Entry): - """Set whether a section allows to create a fake blob - - Args: -- allow_fake_blob: True if allowed, False if not allowed -+ allow_fake: True if allowed, False if not allowed - """ - super().SetAllowFakeBlob(allow_fake) - for entry in self._entries.values(): -@@ -909,7 +923,7 @@ class Entry_section(Entry): - If there are faked blobs, the entries are added to the list - - Args: -- fake_blobs_list: List of Entry objects to be added to -+ faked_blobs_list: List of Entry objects to be added to - """ - for entry in self._entries.values(): - entry.CheckFakedBlobs(faked_blobs_list) -diff --git a/tools/binman/etype/text.py b/tools/binman/etype/text.py -index c55e0233b1..e4deb4abac 100644 ---- a/tools/binman/etype/text.py -+++ b/tools/binman/etype/text.py -@@ -7,7 +7,7 @@ from collections import OrderedDict - - from binman.entry import Entry, EntryArg - from dtoc import fdt_util --from patman import tools -+from u_boot_pylib import tools - - - class Entry_text(Entry): -diff --git a/tools/binman/etype/u_boot_dtb_with_ucode.py b/tools/binman/etype/u_boot_dtb_with_ucode.py -index 047d310cdf..f7225cecc1 100644 ---- a/tools/binman/etype/u_boot_dtb_with_ucode.py -+++ b/tools/binman/etype/u_boot_dtb_with_ucode.py -@@ -7,7 +7,7 @@ - - from binman.entry import Entry - from binman.etype.blob_dtb import Entry_blob_dtb --from patman import tools -+from u_boot_pylib import tools - - # This is imported if needed - state = None -diff --git a/tools/binman/etype/u_boot_elf.py b/tools/binman/etype/u_boot_elf.py -index 3ec774f38a..f4d86aa176 100644 ---- a/tools/binman/etype/u_boot_elf.py -+++ b/tools/binman/etype/u_boot_elf.py -@@ -9,7 +9,7 @@ from binman.entry import Entry - from binman.etype.blob import Entry_blob - - from dtoc import fdt_util --from patman import tools -+from u_boot_pylib import tools - - class Entry_u_boot_elf(Entry_blob): - """U-Boot ELF image -diff --git a/tools/binman/etype/u_boot_env.py b/tools/binman/etype/u_boot_env.py -index c38340b256..c027e93d42 100644 ---- a/tools/binman/etype/u_boot_env.py -+++ b/tools/binman/etype/u_boot_env.py -@@ -8,7 +8,7 @@ import zlib - - from binman.etype.blob import Entry_blob - from dtoc import fdt_util --from patman import tools -+from u_boot_pylib import tools - - class Entry_u_boot_env(Entry_blob): - """An entry which contains a U-Boot environment -diff --git a/tools/binman/etype/u_boot_spl_bss_pad.py b/tools/binman/etype/u_boot_spl_bss_pad.py -index 680d198305..1ffeb3911f 100644 ---- a/tools/binman/etype/u_boot_spl_bss_pad.py -+++ b/tools/binman/etype/u_boot_spl_bss_pad.py -@@ -10,7 +10,7 @@ - from binman import elf - from binman.entry import Entry - from binman.etype.blob import Entry_blob --from patman import tools -+from u_boot_pylib import tools - - class Entry_u_boot_spl_bss_pad(Entry_blob): - """U-Boot SPL binary padded with a BSS region -diff --git a/tools/binman/etype/u_boot_spl_expanded.py b/tools/binman/etype/u_boot_spl_expanded.py -index 319f6708fe..fcd0dd19ac 100644 ---- a/tools/binman/etype/u_boot_spl_expanded.py -+++ b/tools/binman/etype/u_boot_spl_expanded.py -@@ -5,7 +5,7 @@ - # Entry-type module for expanded U-Boot SPL binary - # - --from patman import tout -+from u_boot_pylib import tout - - from binman import state - from binman.etype.blob_phase import Entry_blob_phase -diff --git a/tools/binman/etype/u_boot_tpl_bss_pad.py b/tools/binman/etype/u_boot_tpl_bss_pad.py -index 47f4b23f35..29c6a95412 100644 ---- a/tools/binman/etype/u_boot_tpl_bss_pad.py -+++ b/tools/binman/etype/u_boot_tpl_bss_pad.py -@@ -10,7 +10,7 @@ - from binman import elf - from binman.entry import Entry - from binman.etype.blob import Entry_blob --from patman import tools -+from u_boot_pylib import tools - - class Entry_u_boot_tpl_bss_pad(Entry_blob): - """U-Boot TPL binary padded with a BSS region -diff --git a/tools/binman/etype/u_boot_tpl_expanded.py b/tools/binman/etype/u_boot_tpl_expanded.py -index 55fde3c8e6..58db4f3755 100644 ---- a/tools/binman/etype/u_boot_tpl_expanded.py -+++ b/tools/binman/etype/u_boot_tpl_expanded.py -@@ -5,7 +5,7 @@ - # Entry-type module for expanded U-Boot TPL binary - # - --from patman import tout -+from u_boot_pylib import tout - - from binman import state - from binman.etype.blob_phase import Entry_blob_phase -diff --git a/tools/binman/etype/u_boot_tpl_with_ucode_ptr.py b/tools/binman/etype/u_boot_tpl_with_ucode_ptr.py -index c7f3f9dedb..86f9578b71 100644 ---- a/tools/binman/etype/u_boot_tpl_with_ucode_ptr.py -+++ b/tools/binman/etype/u_boot_tpl_with_ucode_ptr.py -@@ -7,11 +7,11 @@ - - import struct - --from patman import command - from binman.entry import Entry - from binman.etype.blob import Entry_blob - from binman.etype.u_boot_with_ucode_ptr import Entry_u_boot_with_ucode_ptr --from patman import tools -+from u_boot_pylib import command -+from u_boot_pylib import tools - - class Entry_u_boot_tpl_with_ucode_ptr(Entry_u_boot_with_ucode_ptr): - """U-Boot TPL with embedded microcode pointer -diff --git a/tools/binman/etype/u_boot_ucode.py b/tools/binman/etype/u_boot_ucode.py -index 6945411cf9..97ed7d7eb1 100644 ---- a/tools/binman/etype/u_boot_ucode.py -+++ b/tools/binman/etype/u_boot_ucode.py -@@ -7,7 +7,7 @@ - - from binman.entry import Entry - from binman.etype.blob import Entry_blob --from patman import tools -+from u_boot_pylib import tools - - class Entry_u_boot_ucode(Entry_blob): - """U-Boot microcode block -diff --git a/tools/binman/etype/u_boot_vpl_bss_pad.py b/tools/binman/etype/u_boot_vpl_bss_pad.py -index b2ce2a3135..bba38ccf9e 100644 ---- a/tools/binman/etype/u_boot_vpl_bss_pad.py -+++ b/tools/binman/etype/u_boot_vpl_bss_pad.py -@@ -10,7 +10,7 @@ - from binman import elf - from binman.entry import Entry - from binman.etype.blob import Entry_blob --from patman import tools -+from u_boot_pylib import tools - - class Entry_u_boot_vpl_bss_pad(Entry_blob): - """U-Boot VPL binary padded with a BSS region -diff --git a/tools/binman/etype/u_boot_vpl_expanded.py b/tools/binman/etype/u_boot_vpl_expanded.py -index 92c64f0a65..deff5a3f8c 100644 ---- a/tools/binman/etype/u_boot_vpl_expanded.py -+++ b/tools/binman/etype/u_boot_vpl_expanded.py -@@ -5,7 +5,7 @@ - # Entry-type module for expanded U-Boot VPL binary - # - --from patman import tout -+from u_boot_pylib import tout - - from binman import state - from binman.etype.blob_phase import Entry_blob_phase -diff --git a/tools/binman/etype/u_boot_with_ucode_ptr.py b/tools/binman/etype/u_boot_with_ucode_ptr.py -index e275698ceb..41731fd0e1 100644 ---- a/tools/binman/etype/u_boot_with_ucode_ptr.py -+++ b/tools/binman/etype/u_boot_with_ucode_ptr.py -@@ -11,8 +11,8 @@ from binman import elf - from binman.entry import Entry - from binman.etype.blob import Entry_blob - from dtoc import fdt_util --from patman import tools --from patman import command -+from u_boot_pylib import tools -+from u_boot_pylib import command - - class Entry_u_boot_with_ucode_ptr(Entry_blob): - """U-Boot with embedded microcode pointer -diff --git a/tools/binman/etype/vblock.py b/tools/binman/etype/vblock.py -index 04cb7228aa..4adb9a4e9b 100644 ---- a/tools/binman/etype/vblock.py -+++ b/tools/binman/etype/vblock.py -@@ -13,7 +13,7 @@ from binman.entry import EntryArg - from binman.etype.collection import Entry_collection - - from dtoc import fdt_util --from patman import tools -+from u_boot_pylib import tools - - class Entry_vblock(Entry_collection): - """An entry which contains a Chromium OS verified boot block -diff --git a/tools/binman/etype/x509_cert.py b/tools/binman/etype/x509_cert.py -new file mode 100644 -index 0000000000..f80a6ec2d1 ---- /dev/null -+++ b/tools/binman/etype/x509_cert.py -@@ -0,0 +1,92 @@ -+# SPDX-License-Identifier: GPL-2.0+ -+# Copyright 2023 Google LLC -+# Written by Simon Glass -+# -+ -+# Support for an X509 certificate, used to sign a set of entries -+ -+from collections import OrderedDict -+import os -+ -+from binman.entry import EntryArg -+from binman.etype.collection import Entry_collection -+ -+from dtoc import fdt_util -+from u_boot_pylib import tools -+ -+class Entry_x509_cert(Entry_collection): -+ """An entry which contains an X509 certificate -+ -+ Properties / Entry arguments: -+ - content: List of phandles to entries to sign -+ -+ Output files: -+ - input. - input file passed to openssl -+ - cert. - output file generated by openssl (which is -+ used as the entry contents) -+ -+ openssl signs the provided data, writing the signature in this entry. This -+ allows verification that the data is genuine -+ """ -+ def __init__(self, section, etype, node): -+ super().__init__(section, etype, node) -+ self.openssl = None -+ -+ def ReadNode(self): -+ super().ReadNode() -+ self._cert_ca = fdt_util.GetString(self._node, 'cert-ca') -+ self._cert_rev = fdt_util.GetInt(self._node, 'cert-revision-int', 0) -+ self.key_fname = self.GetEntryArgsOrProps([ -+ EntryArg('keyfile', str)], required=True)[0] -+ -+ def GetCertificate(self, required): -+ """Get the contents of this entry -+ -+ Args: -+ required: True if the data must be present, False if it is OK to -+ return None -+ -+ Returns: -+ bytes content of the entry, which is the signed vblock for the -+ provided data -+ """ -+ # Join up the data files to be signed -+ input_data = self.GetContents(required) -+ if input_data is None: -+ return None -+ -+ uniq = self.GetUniqueName() -+ output_fname = tools.get_output_filename('cert.%s' % uniq) -+ input_fname = tools.get_output_filename('input.%s' % uniq) -+ config_fname = tools.get_output_filename('config.%s' % uniq) -+ tools.write_file(input_fname, input_data) -+ stdout = self.openssl.x509_cert( -+ cert_fname=output_fname, -+ input_fname=input_fname, -+ key_fname=self.key_fname, -+ cn=self._cert_ca, -+ revision=self._cert_rev, -+ config_fname=config_fname) -+ if stdout is not None: -+ data = tools.read_file(output_fname) -+ else: -+ # Bintool is missing; just use 4KB of zero data -+ self.record_missing_bintool(self.openssl) -+ data = tools.get_bytes(0, 4096) -+ return data -+ -+ def ObtainContents(self): -+ data = self.GetCertificate(False) -+ if data is None: -+ return False -+ self.SetContents(data) -+ return True -+ -+ def ProcessContents(self): -+ # The blob may have changed due to WriteSymbols() -+ data = self.GetCertificate(True) -+ return self.ProcessContentsUpdate(data) -+ -+ def AddBintools(self, btools): -+ super().AddBintools(btools) -+ self.openssl = self.AddBintool(btools, 'openssl') -diff --git a/tools/binman/fdt_test.py b/tools/binman/fdt_test.py -index 94347b1a1e..7ef8729546 100644 ---- a/tools/binman/fdt_test.py -+++ b/tools/binman/fdt_test.py -@@ -12,7 +12,7 @@ import unittest - from dtoc import fdt - from dtoc import fdt_util - from dtoc.fdt import FdtScan --from patman import tools -+from u_boot_pylib import tools - - class TestFdt(unittest.TestCase): - @classmethod -diff --git a/tools/binman/fip_util.py b/tools/binman/fip_util.py -index 95eee32bc0..b5caab2d37 100755 ---- a/tools/binman/fip_util.py -+++ b/tools/binman/fip_util.py -@@ -37,8 +37,8 @@ OUR_PATH = os.path.dirname(OUR_FILE) - sys.path.insert(2, os.path.join(OUR_PATH, '..')) - - # pylint: disable=C0413 --from patman import command --from patman import tools -+from u_boot_pylib import command -+from u_boot_pylib import tools - - # The TOC header, at the start of the FIP - HEADER_FORMAT = '=61.0"] -+build-backend = "setuptools.build_meta" -+ -+[project] -+name = "binary-manager" -+version = "0.0.2" -+authors = [ -+ { name="Simon Glass", email="sjg@chromium.org" }, -+] -+dependencies = ["pylibfdt", "u_boot_pylib", "dtoc"] -+description = "Binman firmware-packaging tool" -+readme = "README.rst" -+requires-python = ">=3.7" -+classifiers = [ -+ "Programming Language :: Python :: 3", -+ "License :: OSI Approved :: GNU General Public License v2 or later (GPLv2+)", -+ "Operating System :: OS Independent", -+] -+ -+[project.urls] -+"Homepage" = "https://u-boot.readthedocs.io/en/latest/develop/package/index.html" -+"Bug Tracker" = "https://source.denx.de/groups/u-boot/-/issues" -+ -+[project.scripts] -+binman = "binman.main:start_binman" -+ -+[tool.setuptools.package-data] -+patman = ["*.rst"] -diff --git a/tools/binman/state.py b/tools/binman/state.py -index 56e5bf8bc1..3e78cf3430 100644 ---- a/tools/binman/state.py -+++ b/tools/binman/state.py -@@ -13,8 +13,8 @@ import threading - - from dtoc import fdt - import os --from patman import tools --from patman import tout -+from u_boot_pylib import tools -+from u_boot_pylib import tout - - OUR_PATH = os.path.dirname(os.path.realpath(__file__)) - -@@ -306,7 +306,7 @@ def GetUpdateNodes(node, for_repack=False): - """Yield all the nodes that need to be updated in all device trees - - The property referenced by this node is added to any device trees which -- have the given node. Due to removable of unwanted notes, SPL and TPL may -+ have the given node. Due to removable of unwanted nodes, SPL and TPL may - not have this node. - - Args: -diff --git a/tools/binman/test/067_fmap.dts b/tools/binman/test/067_fmap.dts -index 9c0e293ac8..24fa6351ec 100644 ---- a/tools/binman/test/067_fmap.dts -+++ b/tools/binman/test/067_fmap.dts -@@ -11,6 +11,7 @@ - name-prefix = "ro-"; - size = <0x10>; - pad-byte = <0x21>; -+ preserve; - - u-boot { - }; -diff --git a/tools/binman/test/277_replace_fit_sibling.dts b/tools/binman/test/277_replace_fit_sibling.dts -new file mode 100644 -index 0000000000..fc941a8081 ---- /dev/null -+++ b/tools/binman/test/277_replace_fit_sibling.dts -@@ -0,0 +1,61 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/dts-v1/; -+ -+/ { -+ binman { -+ allow-repack; -+ -+ u-boot { -+ }; -+ -+ blob { -+ filename = "compress"; -+ }; -+ -+ fit { -+ description = "test-desc"; -+ #address-cells = <1>; -+ -+ images { -+ kernel { -+ description = "Vanilla Linux kernel"; -+ type = "kernel"; -+ arch = "ppc"; -+ os = "linux"; -+ compression = "gzip"; -+ load = <00000000>; -+ entry = <00000000>; -+ hash-1 { -+ algo = "crc32"; -+ }; -+ blob-ext { -+ filename = "once"; -+ }; -+ }; -+ fdt-1 { -+ description = "Flattened Device Tree blob"; -+ type = "flat_dt"; -+ arch = "ppc"; -+ compression = "none"; -+ hash-1 { -+ algo = "crc32"; -+ }; -+ u-boot-spl-dtb { -+ }; -+ }; -+ }; -+ -+ configurations { -+ default = "conf-1"; -+ conf-1 { -+ description = "Boot Linux kernel with FDT blob"; -+ kernel = "kernel"; -+ fdt = "fdt-1"; -+ }; -+ }; -+ }; -+ -+ fdtmap { -+ }; -+ }; -+}; -diff --git a/tools/binman/test/278_replace_section_deep.dts b/tools/binman/test/278_replace_section_deep.dts -new file mode 100644 -index 0000000000..fba2d7dcf2 ---- /dev/null -+++ b/tools/binman/test/278_replace_section_deep.dts -@@ -0,0 +1,25 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/dts-v1/; -+ -+/ { -+ binman { -+ allow-repack; -+ -+ u-boot-dtb { -+ }; -+ -+ section { -+ section { -+ blob { -+ filename = "compress"; -+ }; -+ }; -+ -+ u-boot { -+ }; -+ }; -+ -+ fdtmap { -+ }; -+ }; -+}; -diff --git a/tools/binman/test/279_x509_cert.dts b/tools/binman/test/279_x509_cert.dts -new file mode 100644 -index 0000000000..7123817271 ---- /dev/null -+++ b/tools/binman/test/279_x509_cert.dts -@@ -0,0 +1,19 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+ -+/dts-v1/; -+ -+/ { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ binman { -+ x509-cert { -+ cert-ca = "IOT2050 Firmware Signature"; -+ cert-revision-int = <0>; -+ content = <&u_boot>; -+ }; -+ -+ u_boot: u-boot { -+ }; -+ }; -+}; -diff --git a/tools/binman/test/280_fit_sign.dts b/tools/binman/test/280_fit_sign.dts -new file mode 100644 -index 0000000000..b9f17dc5c0 ---- /dev/null -+++ b/tools/binman/test/280_fit_sign.dts -@@ -0,0 +1,63 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+ -+/dts-v1/; -+ -+/ { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ binman { -+ size = <0x100000>; -+ allow-repack; -+ -+ fit { -+ description = "U-Boot"; -+ offset = <0x10000>; -+ images { -+ u-boot-1 { -+ description = "U-Boot"; -+ type = "standalone"; -+ arch = "arm64"; -+ os = "u-boot"; -+ compression = "none"; -+ hash-1 { -+ algo = "sha256"; -+ }; -+ u-boot { -+ }; -+ }; -+ -+ fdt-1 { -+ description = "test.dtb"; -+ type = "flat_dt"; -+ arch = "arm64"; -+ compression = "none"; -+ hash-1 { -+ algo = "sha256"; -+ }; -+ u-boot-spl-dtb { -+ }; -+ }; -+ -+ }; -+ -+ configurations { -+ default = "conf-1"; -+ conf-1 { -+ description = "u-boot with fdt"; -+ firmware = "u-boot-1"; -+ fdt = "fdt-1"; -+ signature-1 { -+ algo = "sha256,rsa4096"; -+ key-name-hint = "test_key"; -+ sign-images = "firmware", "fdt"; -+ }; -+ -+ }; -+ }; -+ }; -+ -+ fdtmap { -+ }; -+ }; -+}; -diff --git a/tools/binman/test/281_sign_non_fit.dts b/tools/binman/test/281_sign_non_fit.dts -new file mode 100644 -index 0000000000..e16c954246 ---- /dev/null -+++ b/tools/binman/test/281_sign_non_fit.dts -@@ -0,0 +1,65 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+ -+/dts-v1/; -+ -+/ { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ binman { -+ size = <0x100000>; -+ allow-repack; -+ -+ u-boot { -+ }; -+ fit { -+ description = "U-Boot"; -+ offset = <0x10000>; -+ images { -+ u-boot-1 { -+ description = "U-Boot"; -+ type = "standalone"; -+ arch = "arm64"; -+ os = "u-boot"; -+ compression = "none"; -+ hash-1 { -+ algo = "sha256"; -+ }; -+ u-boot { -+ }; -+ }; -+ -+ fdt-1 { -+ description = "test.dtb"; -+ type = "flat_dt"; -+ arch = "arm64"; -+ compression = "none"; -+ hash-1 { -+ algo = "sha256"; -+ }; -+ u-boot-spl-dtb { -+ }; -+ }; -+ -+ }; -+ -+ configurations { -+ default = "conf-1"; -+ conf-1 { -+ description = "u-boot with fdt"; -+ firmware = "u-boot-1"; -+ fdt = "fdt-1"; -+ signature-1 { -+ algo = "sha256,rsa4096"; -+ key-name-hint = "test_key"; -+ sign-images = "firmware", "fdt"; -+ }; -+ -+ }; -+ }; -+ }; -+ -+ fdtmap { -+ }; -+ }; -+}; -diff --git a/tools/binman/test/key.key b/tools/binman/test/key.key -new file mode 100644 -index 0000000000..9de3be14da ---- /dev/null -+++ b/tools/binman/test/key.key -@@ -0,0 +1,52 @@ -+-----BEGIN PRIVATE KEY----- -+MIIJQgIBADANBgkqhkiG9w0BAQEFAASCCSwwggkoAgEAAoICAQCSDLMHq1Jw3U+G -+H2wutSGrT4Xhs5Yy7uhR/rDOiuKTW3zkVdfSIliye3Nnwrl/nNUFzEJ+4t/AiDaJ -+Qk5KddTAJnOkw5SYBvFsTDhMR4HH6AyfzaaVl+AAGOg4LXwZzGYKncgOY5u6ZyMB -+SzHxozJmmoqYaCIi4Iv2VZRZw1YPBoT6sv38RQSET5ci/g+89Sfb85ZPHPu6PLlz -+ZTufG+yzAhIDsIvNpt2YlCnQ1TqoZxXsztxN1bKIP68xvlAQHSAB8+x4y0tYPE1I -+UT1DK22FMgz5iyBp6ksFaqI06fITtJjPKG13z8sXXgb4/rJ5I0lhsn1ySsHQ0zLw -+/CX4La2/VMA0Bw6GLFRhu/rOycqKfmwLm25bExV8xL6lwFohxbzBQgYr93ujGFyQ -+AXBDOphvZcdXP3CHAcEViVRjrsBWNz8wyf7X8h2FIU16kAd30WuspjmnGuvRZ6Gn -+SNDVO2tbEKvwkg6liYWy4IXtWcvooMtkhYyvFudcxRPgxEUTQ00biYfJ59ukqD7I -+hyT7pq1bZDCVnAt6dUUPWZutrbBacsyITs01hyiPxvAAQ7XRoInmW1DLqHZ+gCJU -+YJ0TaiAI8AmnjypMWRUo19l0zIgPdva8EJ+mz+kKFsZszo1nwuxQL7oUSUCb0hfB -+2k3WxNthBi3QpspUKPtKweIg9ITtIwIDAQABAoICAA9dS6ZGZTVfauLKwnhFcOXT -+R1vfpzDzhjg+CX6pCL4E1WY2C67dEySvrQvg5d/hcV2bR/GOT4izK72T3qWhsMCI -+KwlN0/+MV3CTsiaALUyJAm77VQeOwy9vb1qdml0ibie2wpmU7AiXmgykSvxHNWGq -+52KyLckqgz7mcOVikdah0nKHSwXzgs6iit1RCfnQdqGChjELdQX6Jm5X24ZZCzUn -+xhpiQ8reP5iyGZYRIIsf0SQo/O8pSI9h173tbgHL9paOATYR+Pqu2Vh+x2meE3b8 -+NXY5Jy9NSRgoSCk15VQiXyMH90Av+YcbSrN+I+tvhWREQUM5Txt3ZHgKprntoEYE -+XLHAr9cvmIzLNeApt2z/g4t80xFBpIvTG3+SV/rthmq0KGCLW2kPkdujOiIwdNFF -+6fJ6ikphKAbx2NgUY+6AM5AoOh5QPMqvCdsPwO21YG1WoxmiUpNTaYMlR1fDofr/ -+A/z2bFH4SiJPkHXRT2KBiJh4ZZWNzP6hOqGy+jreOpWh5IAyn7cKx6t3I28Q9df0 -+tK/1PLgR8WWu6G4uHtF5lKL+LgqFCTbSu9JtLQVQntD7Qyd98sF5o23QQWyA19uU -+TVGxtkVaP1y7v+gtC+xMTW9MbGIeJiqMZuZ3xXJVvUNg1/2BDd+VAfPCOq6xGHC7 -+s9MFqwUsLCAFFebXC8oVAoIBAQDKGc/o21Ags2t61IJaJjU7YwrsRywhZR+vUz5F -+xtqH4jt9AkdWpDkKbO7xNMQ2OFdnobq5mkM+iW6Jvc1fi4gm1HDyP296nPKZdFrJ -+UgGfTxOhxFLp7gsJ2F0GX5eDJYvqUTBeYB3wrQkCc+t7fLg2oS+gKGIIn2CP07Mx -+Bist3eCcDvL6QIxYS43u+ptTyAItyUYn8KwvCxlIEfjxowsxfhRWuU+Mr4A4hfGB -+64xSI1YU1AYZLMucOtK/mmlscfO8isdcyfea0GJn4VLRnNvAKL5g627IdErWHs3u -+KgYWAXtVKzHrf4hO8dpVgIzO69wAsqZEvKYGmTJhfyvBN9DdAoIBAQC5AA7s2XOX -+raVymhPwEy4I/2w9NuMFmTavOREBp/gA9uaWBdqAWn1rRJiJ5plgdcnOBFPSGBnc -+thkuWBRqkklQ0YPKhNBT48CZGBN7VUsvyTZD1+IXLW1TmY5UGT0p6/dAYkoJHnvX -+TAHl1tfmeHxVCJWV6Shf5LfJJwsAiykxzetkzmeaycy2s9GKCnkc2uFxyhKnfM0/ -+SLwTuXQIJvHuErTYA4jjVOG9EGYW2/uKScPBLpB1YTliAUIvByDy6suCN5pVZGT8 -+xVLTYec9lXjhfyhysOAjhD3w77Jh7Exft91fEK50k2ZkqYYnh+mYZcnR52msVSBS -+3YL9kK/9dNX/AoIBABcEaZFzqOSQiqUqns31nApvdUcDtBr5kWo+aNE5nJntQiky -+oT1U5soxLeV6xP4H3KyI1uNcllwA+v3lCAbhtVf2ygZNAz1LsrWXct+K33RtZSb/ -+XRIXclpksfOP34moNQ8yv/d/qulGS8hju2YNBk3yfaIX91JUFINM8ROcSD6pDnO3 -+oCSwRUupDzkwgZBBLz5Xtg3Gc1XIRdDXeyrKDvRMD7Tw1gaH1mqZlq/dS9XvAFbO -+7wLe/zGD4YzA4VDgiYnnpF0FA5Y2NX7vQqds3fo8qbIQHkXmOL+6Mmn1j0viT1Gb -+4cuYcsXK9brXMTI/2oaZ0iXx9la6C+reuPUAjmECggEBAInEvlips0hgW1ZV4cUm -+M2El/dA0YKoZqDyjDcQi9zCYra1JXKe7O603XzVK0iugbBGM7XMG2bOgtG3r0ABx -+QkH6VN/rOk1OzW31HQT6xswmVs/9I/TIsqLQNsrwJLlkbTO4PpQ97FGv27Xy4cNT -+NJwKkYMbKCMJa8hT2ACmoZ3iUIs4nrUJ1Pa2QLRBCmJvqfYYWv35lcur+cvijsNH -+ZWE68wvuzfEllBo87RnW5qLcPfhOGewf5CDU+RmWgHYGXllx2PAAnKgUtpKOVStq -+daPQEyoeCDzKzWnwxvHfjBy4CxYxkQllf5o1GJ+1ukLwgnRbljltB25OYa89IaJp -+cLcCggEAa5vbegzMKYPjR3zcVjnvhRsLXQi1vMtbUqOQ5wYMwGIef4v3QHNoF7EA -+aNpWQ/qgCTQUzl3qoQCkRiVmVBBr60Fs5y7sfA92eBxQIV5hxJftH3vmiKqeWeqm -+ila9DNw84MNAIqI2u6R3K/ur9fkSswDr3nzvFjuheW5V/M/6zAUtJZXr4iUih929 -+uhf2dn6pSLR+epJ5023CVaI2zwz+U6PDEATKy9HjeKab3tQMHxQkT/5IWcLqrVTs -+0rMobIgONzQqYDi2sO05YvgNBxvX3pUvqNlthcOtauT8BoE6wxLYm7ZcWYLPn15A -+wR0+2mDpx+HDyu76q3M+KxXG2U8sJg== -+-----END PRIVATE KEY----- -diff --git a/tools/binman/test/key.pem b/tools/binman/test/key.pem -new file mode 100644 -index 0000000000..7a7b84a8bb ---- /dev/null -+++ b/tools/binman/test/key.pem -@@ -0,0 +1,32 @@ -+-----BEGIN CERTIFICATE----- -+MIIFcTCCA1kCFB/17qhcvpyKhG+jfS2c0qG1yjruMA0GCSqGSIb3DQEBCwUAMHUx -+CzAJBgNVBAYTAk5aMRMwEQYDVQQIDApDYW50ZXJidXJ5MRUwEwYDVQQHDAxDaHJp -+c3RjaHVyY2gxITAfBgNVBAoMGEludGVybmV0IFdpZGdpdHMgUHR5IEx0ZDEXMBUG -+A1UEAwwOTXkgQ29tbW9uIE5hbWUwHhcNMjMwMjEzMDM1MzMzWhcNMjQwMjEzMDM1 -+MzMzWjB1MQswCQYDVQQGEwJOWjETMBEGA1UECAwKQ2FudGVyYnVyeTEVMBMGA1UE -+BwwMQ2hyaXN0Y2h1cmNoMSEwHwYDVQQKDBhJbnRlcm5ldCBXaWRnaXRzIFB0eSBM -+dGQxFzAVBgNVBAMMDk15IENvbW1vbiBOYW1lMIICIjANBgkqhkiG9w0BAQEFAAOC -+Ag8AMIICCgKCAgEAkgyzB6tScN1Phh9sLrUhq0+F4bOWMu7oUf6wzorik1t85FXX -+0iJYsntzZ8K5f5zVBcxCfuLfwIg2iUJOSnXUwCZzpMOUmAbxbEw4TEeBx+gMn82m -+lZfgABjoOC18GcxmCp3IDmObumcjAUsx8aMyZpqKmGgiIuCL9lWUWcNWDwaE+rL9 -+/EUEhE+XIv4PvPUn2/OWTxz7ujy5c2U7nxvsswISA7CLzabdmJQp0NU6qGcV7M7c -+TdWyiD+vMb5QEB0gAfPseMtLWDxNSFE9QytthTIM+YsgaepLBWqiNOnyE7SYzyht -+d8/LF14G+P6yeSNJYbJ9ckrB0NMy8Pwl+C2tv1TANAcOhixUYbv6zsnKin5sC5tu -+WxMVfMS+pcBaIcW8wUIGK/d7oxhckAFwQzqYb2XHVz9whwHBFYlUY67AVjc/MMn+ -+1/IdhSFNepAHd9FrrKY5pxrr0Wehp0jQ1TtrWxCr8JIOpYmFsuCF7VnL6KDLZIWM -+rxbnXMUT4MRFE0NNG4mHyefbpKg+yIck+6atW2QwlZwLenVFD1mbra2wWnLMiE7N -+NYcoj8bwAEO10aCJ5ltQy6h2foAiVGCdE2ogCPAJp48qTFkVKNfZdMyID3b2vBCf -+ps/pChbGbM6NZ8LsUC+6FElAm9IXwdpN1sTbYQYt0KbKVCj7SsHiIPSE7SMCAwEA -+ATANBgkqhkiG9w0BAQsFAAOCAgEAJAJoia6Vq4vXP/0bCgW3o9TOMmFYhI/xPxoh -+Gd7was9R7BOrMGO+/3E7DZtjycZYL0r9nOtr9S/BBreuZ4vkk/PSoGaSnG8ST4jC -+Ajk7ew/32RGOgA/oIzgKj1SPkBtvW+x+76sjUkGKsxmABBUhycIY7K0U8McTTfJ7 -+gJ164VXmdG7qFMWmRy4Ry9QGXkDsbMSOZ485X7zbphjK5OZXEujP7GMUgg1lP479 -+NqC1g+1m/A3PIB767lVYA7APQsrckHdRqOTkK9TYRQ3mvyE2wruhqE6lx8G/UyFh -+RZjZ3lh2bx07UWIlyMabnGDMrM4FCnesqVyVAc8VAbkdXkeJI9r6DdFw+dzIY0P1 -+il+MlYpZNwRyNv2W5SCPilyuhuPOSrSnsSHx64puCIvwG/4xA30Jw8nviJuyGSef -+7uE+W7SD9E/hQHi/S9KRsYVoo7a6X9ADiwNsRNzVnuqc7K3mv/C5E9s6uFTNoObe -+fUBA7pL3Fmvc5pYatxTFI85ajBpe/la6AA+7HX/8PXEphmp6GhFCcfsq+DL03vTM -+DqIJL1i/JXggwqvvdcfaSeMDIOIzO89yUGGwwuj9rqMeEY99qDtljgy1EljjrB5i -+0j4Jg4O0OEd2KIOD7nz4do1tLNlRcpysDZeXIiwAI7Dd3wWMsgpOQxs0zqWyqDVq -+mCKa5Tw= -+-----END CERTIFICATE----- -diff --git a/tools/buildman/builder.py b/tools/buildman/builder.py -index c2a69027f8..d81752e994 100644 ---- a/tools/buildman/builder.py -+++ b/tools/buildman/builder.py -@@ -19,10 +19,10 @@ import time - - from buildman import builderthread - from buildman import toolchain --from patman import command - from patman import gitutil --from patman import terminal --from patman.terminal import tprint -+from u_boot_pylib import command -+from u_boot_pylib import terminal -+from u_boot_pylib.terminal import tprint - - # This indicates an new int or hex Kconfig property with no default - # It hangs the build since the 'conf' tool cannot proceed without valid input. -@@ -194,6 +194,8 @@ class Builder: - work_in_output: Use the output directory as the work directory and - don't write to a separate output directory. - thread_exceptions: List of exceptions raised by thread jobs -+ no_lto (bool): True to set the NO_LTO flag when building -+ reproducible_builds (bool): True to set SOURCE_DATE_EPOCH=0 for builds - - Private members: - _base_board_dict: Last-summarised Dict of boards -@@ -253,7 +255,7 @@ class Builder: - config_only=False, squash_config_y=False, - warnings_as_errors=False, work_in_output=False, - test_thread_exceptions=False, adjust_cfg=None, -- allow_missing=False): -+ allow_missing=False, no_lto=False, reproducible_builds=False): - """Create a new Builder object - - Args: -@@ -292,6 +294,7 @@ class Builder: - C=val to set the value of C (val must have quotes if C is - a string Kconfig - allow_missing: Run build with BINMAN_ALLOW_MISSING=1 -+ no_lto (bool): True to set the NO_LTO flag when building - - """ - self.toolchains = toolchains -@@ -331,6 +334,8 @@ class Builder: - self.adjust_cfg = adjust_cfg - self.allow_missing = allow_missing - self._ide = False -+ self.no_lto = no_lto -+ self.reproducible_builds = reproducible_builds - - if not self.squash_config_y: - self.config_filenames += EXTRA_CONFIG_FILENAMES -diff --git a/tools/buildman/builderthread.py b/tools/buildman/builderthread.py -index 680efae02d..879ff138ad 100644 ---- a/tools/buildman/builderthread.py -+++ b/tools/buildman/builderthread.py -@@ -10,8 +10,8 @@ import sys - import threading - - from buildman import cfgutil --from patman import command - from patman import gitutil -+from u_boot_pylib import command - - RETURN_CODE_RETRY = -1 - BASE_ELF_FILENAMES = ['u-boot', 'spl/u-boot-spl', 'tpl/u-boot-tpl'] -@@ -255,6 +255,10 @@ class BuilderThread(threading.Thread): - args.append('KCFLAGS=-Werror') - if self.builder.allow_missing: - args.append('BINMAN_ALLOW_MISSING=1') -+ if self.builder.no_lto: -+ args.append('NO_LTO=1') -+ if self.builder.reproducible_builds: -+ args.append('SOURCE_DATE_EPOCH=0') - config_args = ['%s_defconfig' % brd.target] - config_out = '' - args.extend(self.builder.toolchains.GetMakeArguments(brd)) -@@ -273,14 +277,19 @@ class BuilderThread(threading.Thread): - - # If we need to reconfigure, do that now - cfg_file = os.path.join(out_dir, '.config') -+ cmd_list = [] - if do_config or adjust_cfg: - config_out = '' - if self.mrproper: - result = self.Make(commit, brd, 'mrproper', cwd, - 'mrproper', *args, env=env) - config_out += result.combined -+ cmd_list.append([self.builder.gnu_make, 'mrproper', -+ *args]) - result = self.Make(commit, brd, 'config', cwd, - *(args + config_args), env=env) -+ cmd_list.append([self.builder.gnu_make] + args + -+ config_args) - config_out += result.combined - do_config = False # No need to configure next time - if adjust_cfg: -@@ -290,6 +299,7 @@ class BuilderThread(threading.Thread): - args.append('cfg') - result = self.Make(commit, brd, 'build', cwd, *args, - env=env) -+ cmd_list.append([self.builder.gnu_make] + args) - if (result.return_code == 2 and - ('Some images are invalid' in result.stderr)): - # This is handled later by the check for output in -@@ -303,6 +313,7 @@ class BuilderThread(threading.Thread): - result.stderr = result.stderr.replace(src_dir + '/', '') - if self.builder.verbose_build: - result.stdout = config_out + result.stdout -+ result.cmd_list = cmd_list - else: - result.return_code = 1 - result.stderr = 'No tool chain for %s\n' % brd.arch -@@ -378,6 +389,12 @@ class BuilderThread(threading.Thread): - with open(os.path.join(build_dir, 'out-env'), 'wb') as fd: - for var in sorted(env.keys()): - fd.write(b'%s="%s"' % (var, env[var])) -+ -+ with open(os.path.join(build_dir, 'out-cmd'), 'w', -+ encoding='utf-8') as fd: -+ for cmd in result.cmd_list: -+ print(' '.join(cmd), file=fd) -+ - lines = [] - for fname in BASE_ELF_FILENAMES: - cmd = ['%snm' % self.toolchain.cross, '--size-sort', fname] -diff --git a/tools/buildman/buildman.rst b/tools/buildman/buildman.rst -index 2a83cb7e4f..c8b0db3d8b 100644 ---- a/tools/buildman/buildman.rst -+++ b/tools/buildman/buildman.rst -@@ -1023,14 +1023,15 @@ U-Boot's build system embeds information such as a build timestamp into the - final binary. This information varies each time U-Boot is built. This causes - various files to be rebuilt even if no source changes are made, which in turn - requires that the final U-Boot binary be re-linked. This unnecessary work can --be avoided by turning off the timestamp feature. This can be achieved by --setting the SOURCE_DATE_EPOCH environment variable to 0. -+be avoided by turning off the timestamp feature. This can be achieved using -+the `-r` flag, which enables reproducible builds by setting -+`SOURCE_DATE_EPOCH=0` when building. - - Combining all of these options together yields the command-line shown below. - This will provide the quickest possible feedback regarding the current content - of the source tree, thus allowing rapid tested evolution of the code:: - -- SOURCE_DATE_EPOCH=0 ./tools/buildman/buildman -P tegra -+ ./tools/buildman/buildman -Pr tegra - - - Checking configuration -@@ -1108,6 +1109,8 @@ and 'brppt1_spi', removing a trailing semicolon. 'brppt1_nand' gained an a - value for 'altbootcmd', but lost one for ' altbootcmd'. - - The -U option uses the u-boot.env files which are produced by a build. -+Internally, buildman writes out an out-env file into the build directory for -+later comparison. - - - Building with clang -@@ -1121,6 +1124,20 @@ toolchain. For example: - buildman -O clang-7 --board sandbox - - -+Building without LTO -+-------------------- -+ -+Link-time optimisation (LTO) is designed to reduce code size by globally -+optimising the U-Boot build. Unfortunately this can dramatically slow down -+builds. This is particularly noticeable when running a lot of builds. -+ -+Use the -L (--no-lto) flag to disable LTO. -+ -+.. code-block:: bash -+ -+ buildman -L --board sandbox -+ -+ - Doing a simple build - -------------------- - -@@ -1298,6 +1315,14 @@ You should use 'buildman -nv ' instead of greoing the boards.cfg file, - since it may be dropped altogether in future. - - -+Checking the command -+-------------------- -+ -+Buildman writes out the toolchain information to a `toolchain` file within the -+output directory. It also writes the commands used to build U-Boot in an -+`out-cmd` file. You can check these if you suspect something strange is -+happening. -+ - TODO - ---- - -diff --git a/tools/buildman/cfgutil.py b/tools/buildman/cfgutil.py -index ab74a8ef06..a340e01cb6 100644 ---- a/tools/buildman/cfgutil.py -+++ b/tools/buildman/cfgutil.py -@@ -7,7 +7,7 @@ - - import re - --from patman import tools -+from u_boot_pylib import tools - - RE_LINE = re.compile(r'(# )?CONFIG_([A-Z0-9_]+)(=(.*)| is not set)') - RE_CFG = re.compile(r'(~?)(CONFIG_)?([A-Z0-9_]+)(=.*)?') -diff --git a/tools/buildman/cmdline.py b/tools/buildman/cmdline.py -index c485994e9f..a9cda24957 100644 ---- a/tools/buildman/cmdline.py -+++ b/tools/buildman/cmdline.py -@@ -3,6 +3,11 @@ - # - - from optparse import OptionParser -+import os -+import pathlib -+ -+BUILDMAN_DIR = pathlib.Path(__file__).parent -+HAS_TESTS = os.path.exists(BUILDMAN_DIR / "test.py") - - def ParseArgs(): - """Parse command line arguments from sys.argv[] -@@ -71,6 +76,8 @@ def ParseArgs(): - default=False, help="Don't convert y to 1 in configs") - parser.add_option('-l', '--list-error-boards', action='store_true', - default=False, help='Show a list of boards next to each error/warning') -+ parser.add_option('-L', '--no-lto', action='store_true', -+ default=False, help='Disable Link-time Optimisation (LTO) for builds') - parser.add_option('--list-tool-chains', action='store_true', default=False, - help='List available tool chains (use -v to see probing detail)') - parser.add_option('-m', '--mrproper', action='store_true', -@@ -95,18 +102,21 @@ def ParseArgs(): - default=False, help="Use full toolchain path in CROSS_COMPILE") - parser.add_option('-P', '--per-board-out-dir', action='store_true', - default=False, help="Use an O= (output) directory per board rather than per thread") -+ parser.add_option('-r', '--reproducible-builds', action='store_true', -+ help='Set SOURCE_DATE_EPOCH=0 to suuport a reproducible build') - parser.add_option('-R', '--regen-board-list', action='store_true', - help='Force regeneration of the list of boards, like the old boards.cfg file') - parser.add_option('-s', '--summary', action='store_true', - default=False, help='Show a build summary') - parser.add_option('-S', '--show-sizes', action='store_true', - default=False, help='Show image size variation in summary') -- parser.add_option('--skip-net-tests', action='store_true', default=False, -- help='Skip tests which need the network') - parser.add_option('--step', type='int', - default=1, help='Only build every n commits (0=just first and last)') -- parser.add_option('-t', '--test', action='store_true', dest='test', -- default=False, help='run tests') -+ if HAS_TESTS: -+ parser.add_option('--skip-net-tests', action='store_true', default=False, -+ help='Skip tests which need the network') -+ parser.add_option('-t', '--test', action='store_true', dest='test', -+ default=False, help='run tests') - parser.add_option('-T', '--threads', type='int', - default=None, - help='Number of builder threads to use (0=single-thread)') -diff --git a/tools/buildman/control.py b/tools/buildman/control.py -index 87e7d0e201..35f44c0cf3 100644 ---- a/tools/buildman/control.py -+++ b/tools/buildman/control.py -@@ -3,6 +3,7 @@ - # - - import multiprocessing -+import importlib.resources - import os - import shutil - import subprocess -@@ -13,12 +14,12 @@ from buildman import bsettings - from buildman import cfgutil - from buildman import toolchain - from buildman.builder import Builder --from patman import command - from patman import gitutil - from patman import patchstream --from patman import terminal --from patman import tools --from patman.terminal import tprint -+from u_boot_pylib import command -+from u_boot_pylib import terminal -+from u_boot_pylib import tools -+from u_boot_pylib.terminal import tprint - - def GetPlural(count): - """Returns a plural 's' if count is not 1""" -@@ -152,9 +153,8 @@ def DoBuildman(options, args, toolchains=None, make_func=None, brds=None, - global builder - - if options.full_help: -- tools.print_full_help( -- os.path.join(os.path.dirname(os.path.realpath(sys.argv[0])), -- 'README.rst')) -+ with importlib.resources.path('buildman', 'README.rst') as readme: -+ tools.print_full_help(str(readme)) - return 0 - - gitutil.setup() -@@ -261,9 +261,9 @@ def DoBuildman(options, args, toolchains=None, make_func=None, brds=None, - count += 1 # Build upstream commit also - - if not count: -- str = ("No commits found to process in branch '%s': " -+ msg = ("No commits found to process in branch '%s': " - "set branch's upstream or use -c flag" % options.branch) -- sys.exit(col.build(col.RED, str)) -+ sys.exit(col.build(col.RED, msg)) - if options.work_in_output: - if len(selected) != 1: - sys.exit(col.build(col.RED, -@@ -338,6 +338,14 @@ def DoBuildman(options, args, toolchains=None, make_func=None, brds=None, - shutil.rmtree(output_dir) - adjust_cfg = cfgutil.convert_list_to_dict(options.adjust_cfg) - -+ # Drop LOCALVERSION_AUTO since it changes the version string on every commit -+ if options.reproducible_builds: -+ # If these are mentioned, leave the local version alone -+ if 'LOCALVERSION' in adjust_cfg or 'LOCALVERSION_AUTO' in adjust_cfg: -+ print('Not dropping LOCALVERSION_AUTO for reproducible build') -+ else: -+ adjust_cfg['LOCALVERSION_AUTO'] = '~' -+ - builder = Builder(toolchains, output_dir, options.git_dir, - options.threads, options.jobs, gnu_make=gnu_make, checkout=True, - show_unknown=options.show_unknown, step=options.step, -@@ -351,7 +359,8 @@ def DoBuildman(options, args, toolchains=None, make_func=None, brds=None, - work_in_output=options.work_in_output, - test_thread_exceptions=test_thread_exceptions, - adjust_cfg=adjust_cfg, -- allow_missing=allow_missing) -+ allow_missing=allow_missing, no_lto=options.no_lto, -+ reproducible_builds=options.reproducible_builds) - builder.force_config_on_failure = not options.quick - if make_func: - builder.do_make = make_func -diff --git a/tools/buildman/func_test.py b/tools/buildman/func_test.py -index 559e4edf74..ebd78f225e 100644 ---- a/tools/buildman/func_test.py -+++ b/tools/buildman/func_test.py -@@ -14,11 +14,11 @@ from buildman import bsettings - from buildman import cmdline - from buildman import control - from buildman import toolchain --from patman import command - from patman import gitutil --from patman import terminal --from patman import test_util --from patman import tools -+from u_boot_pylib import command -+from u_boot_pylib import terminal -+from u_boot_pylib import test_util -+from u_boot_pylib import tools - - settings_data = ''' - # Buildman settings file -@@ -415,17 +415,19 @@ class TestFunctional(unittest.TestCase): - kwargs: Arguments to pass to command.run_pipe() - """ - self._make_calls += 1 -+ out_dir = '' -+ for arg in args: -+ if arg.startswith('O='): -+ out_dir = arg[2:] - if stage == 'mrproper': - return command.CommandResult(return_code=0) - elif stage == 'config': -+ fname = os.path.join(cwd or '', out_dir, '.config') -+ tools.write_file(fname, b'CONFIG_SOMETHING=1') - return command.CommandResult(return_code=0, - combined='Test configuration complete') - elif stage == 'build': - stderr = '' -- out_dir = '' -- for arg in args: -- if arg.startswith('O='): -- out_dir = arg[2:] - fname = os.path.join(cwd or '', out_dir, 'u-boot') - tools.write_file(fname, b'U-Boot') - -@@ -723,3 +725,57 @@ Some images are invalid''' - control.get_allow_missing(False, False, 2, True)) - self.assertEqual(False, - control.get_allow_missing(False, True, 2, True)) -+ -+ def check_command(self, *extra_args): -+ """Run a command with the extra arguments and return the commands used -+ -+ Args: -+ extra_args (list of str): List of extra arguments -+ -+ Returns: -+ list of str: Lines returned in the out-cmd file -+ """ -+ self._RunControl('-o', self._output_dir, *extra_args) -+ board0_dir = os.path.join(self._output_dir, 'current', 'board0') -+ self.assertTrue(os.path.exists(os.path.join(board0_dir, 'done'))) -+ cmd_fname = os.path.join(board0_dir, 'out-cmd') -+ self.assertTrue(os.path.exists(cmd_fname)) -+ data = tools.read_file(cmd_fname) -+ -+ config_fname = os.path.join(board0_dir, '.config') -+ self.assertTrue(os.path.exists(config_fname)) -+ cfg_data = tools.read_file(config_fname) -+ -+ return data.splitlines(), cfg_data -+ -+ def testCmdFile(self): -+ """Test that the -cmd-out file is produced""" -+ lines = self.check_command()[0] -+ self.assertEqual(2, len(lines)) -+ self.assertRegex(lines[0], b'make O=/.*board0_defconfig') -+ self.assertRegex(lines[0], b'make O=/.*-s.*') -+ -+ def testNoLto(self): -+ """Test that the --no-lto flag works""" -+ lines = self.check_command('-L')[0] -+ self.assertIn(b'NO_LTO=1', lines[0]) -+ -+ def testReproducible(self): -+ """Test that the -r flag works""" -+ lines, cfg_data = self.check_command('-r') -+ self.assertIn(b'SOURCE_DATE_EPOCH=0', lines[0]) -+ -+ # We should see CONFIG_LOCALVERSION_AUTO unset -+ self.assertEqual(b'''CONFIG_SOMETHING=1 -+# CONFIG_LOCALVERSION_AUTO is not set -+''', cfg_data) -+ -+ with test_util.capture_sys_output() as (stdout, stderr): -+ lines, cfg_data = self.check_command('-r', '-a', 'LOCALVERSION') -+ self.assertIn(b'SOURCE_DATE_EPOCH=0', lines[0]) -+ -+ # We should see CONFIG_LOCALVERSION_AUTO unset -+ self.assertEqual(b'''CONFIG_SOMETHING=1 -+CONFIG_LOCALVERSION=y -+''', cfg_data) -+ self.assertIn('Not dropping LOCALVERSION_AUTO', stdout.getvalue()) -diff --git a/tools/buildman/main.py b/tools/buildman/main.py -index 67c560c48d..5e1f68d823 100755 ---- a/tools/buildman/main.py -+++ b/tools/buildman/main.py -@@ -25,8 +25,8 @@ from buildman import control - from buildman import toolchain - from patman import patchstream - from patman import gitutil --from patman import terminal --from patman import test_util -+from u_boot_pylib import terminal -+from u_boot_pylib import test_util - - def RunTests(skip_net_tests, verboose, args): - from buildman import func_test -@@ -46,17 +46,22 @@ def RunTests(skip_net_tests, verboose, args): - - return (0 if result.wasSuccessful() else 1) - --options, args = cmdline.ParseArgs() -+def run_buildman(): -+ options, args = cmdline.ParseArgs() - --if not options.debug: -- sys.tracebacklimit = 0 -+ if not options.debug: -+ sys.tracebacklimit = 0 - --# Run our meagre tests --if options.test: -- RunTests(options.skip_net_tests, options.verbose, args) -+ # Run our meagre tests -+ if cmdline.HAS_TESTS and options.test: -+ RunTests(options.skip_net_tests, options.verbose, args) - --# Build selected commits for selected boards --else: -- bsettings.Setup(options.config_file) -- ret_code = control.DoBuildman(options, args) -- sys.exit(ret_code) -+ # Build selected commits for selected boards -+ else: -+ bsettings.Setup(options.config_file) -+ ret_code = control.DoBuildman(options, args) -+ sys.exit(ret_code) -+ -+ -+if __name__ == "__main__": -+ run_buildman() -diff --git a/tools/buildman/pyproject.toml b/tools/buildman/pyproject.toml -new file mode 100644 -index 0000000000..4d75e772ee ---- /dev/null -+++ b/tools/buildman/pyproject.toml -@@ -0,0 +1,29 @@ -+[build-system] -+requires = ["setuptools>=61.0"] -+build-backend = "setuptools.build_meta" -+ -+[project] -+name = "buildman" -+version = "0.0.2" -+authors = [ -+ { name="Simon Glass", email="sjg@chromium.org" }, -+] -+dependencies = ["u_boot_pylib", "patch-manager"] -+description = "Buildman build tool for U-Boot" -+readme = "README.rst" -+requires-python = ">=3.7" -+classifiers = [ -+ "Programming Language :: Python :: 3", -+ "License :: OSI Approved :: GNU General Public License v2 or later (GPLv2+)", -+ "Operating System :: OS Independent", -+] -+ -+[project.urls] -+"Homepage" = "https://u-boot.readthedocs.io/en/latest/build/buildman.html" -+"Bug Tracker" = "https://source.denx.de/groups/u-boot/-/issues" -+ -+[project.scripts] -+buildman = "buildman.main:run_buildman" -+ -+[tool.setuptools.package-data] -+buildman = ["*.rst"] -diff --git a/tools/buildman/test.py b/tools/buildman/test.py -index daf5467503..9fa6445b79 100644 ---- a/tools/buildman/test.py -+++ b/tools/buildman/test.py -@@ -17,10 +17,10 @@ from buildman import cfgutil - from buildman import control - from buildman import toolchain - from patman import commit --from patman import command --from patman import terminal --from patman import test_util --from patman import tools -+from u_boot_pylib import command -+from u_boot_pylib import terminal -+from u_boot_pylib import test_util -+from u_boot_pylib import tools - - use_network = True - -diff --git a/tools/buildman/toolchain.py b/tools/buildman/toolchain.py -index 6bae913197..0ecd8458b9 100644 ---- a/tools/buildman/toolchain.py -+++ b/tools/buildman/toolchain.py -@@ -11,9 +11,9 @@ import tempfile - import urllib.request, urllib.error, urllib.parse - - from buildman import bsettings --from patman import command --from patman import terminal --from patman import tools -+from u_boot_pylib import command -+from u_boot_pylib import terminal -+from u_boot_pylib import tools - - (PRIORITY_FULL_PREFIX, PRIORITY_PREFIX_GCC, PRIORITY_PREFIX_GCC_PATH, - PRIORITY_CALC) = list(range(4)) -@@ -156,9 +156,10 @@ class Toolchain: - Returns: - Value of that environment variable or arguments - """ -- wrapper = self.GetWrapper() - if which == VAR_CROSS_COMPILE: -- return wrapper + os.path.join(self.path, self.cross) -+ wrapper = self.GetWrapper() -+ base = '' if self.arch == 'sandbox' else self.path -+ return wrapper + os.path.join(base, self.cross) - elif which == VAR_PATH: - return self.path - elif which == VAR_ARCH: -diff --git a/tools/concurrencytest/.gitignore b/tools/concurrencytest/.gitignore -deleted file mode 100644 -index 0d20b6487c..0000000000 ---- a/tools/concurrencytest/.gitignore -+++ /dev/null -@@ -1 +0,0 @@ --*.pyc -diff --git a/tools/concurrencytest/README.md b/tools/concurrencytest/README.md -deleted file mode 100644 -index 2d7fe75df5..0000000000 ---- a/tools/concurrencytest/README.md -+++ /dev/null -@@ -1,74 +0,0 @@ --concurrencytest --=============== -- --![testing goats](https://raw.github.com/cgoldberg/concurrencytest/master/testing-goats.png "testing goats") -- --Python testtools extension for running unittest suites concurrently. -- ------ -- --Install from PyPI: --``` --pip install concurrencytest --``` -- ------ -- --Requires: -- --* [testtools](https://pypi.python.org/pypi/testtools) : `pip install testtools` --* [python-subunit](https://pypi.python.org/pypi/python-subunit) : `pip install python-subunit` -- ------ -- --Example: -- --```python --import time --import unittest -- --from concurrencytest import ConcurrentTestSuite, fork_for_tests -- -- --class SampleTestCase(unittest.TestCase): -- """Dummy tests that sleep for demo.""" -- -- def test_me_1(self): -- time.sleep(0.5) -- -- def test_me_2(self): -- time.sleep(0.5) -- -- def test_me_3(self): -- time.sleep(0.5) -- -- def test_me_4(self): -- time.sleep(0.5) -- -- --# Load tests from SampleTestCase defined above --suite = unittest.TestLoader().loadTestsFromTestCase(SampleTestCase) --runner = unittest.TextTestRunner() -- --# Run tests sequentially --runner.run(suite) -- --# Run same tests across 4 processes --suite = unittest.TestLoader().loadTestsFromTestCase(SampleTestCase) --concurrent_suite = ConcurrentTestSuite(suite, fork_for_tests(4)) --runner.run(concurrent_suite) --``` --Output: -- --``` --.... ------------------------------------------------------------------------ --Ran 4 tests in 2.003s -- --OK --.... ------------------------------------------------------------------------ --Ran 4 tests in 0.504s -- --OK --``` -diff --git a/tools/concurrencytest/__init__.py b/tools/concurrencytest/__init__.py -deleted file mode 100644 -index e69de29bb2..0000000000 -diff --git a/tools/concurrencytest/concurrencytest.py b/tools/concurrencytest/concurrencytest.py -deleted file mode 100644 -index 1c4f03f37e..0000000000 ---- a/tools/concurrencytest/concurrencytest.py -+++ /dev/null -@@ -1,221 +0,0 @@ --#!/usr/bin/env python --# SPDX-License-Identifier: GPL-2.0+ --# --# Modified by: Corey Goldberg, 2013 --# --# Original code from: --# Bazaar (bzrlib.tests.__init__.py, v2.6, copied Jun 01 2013) --# Copyright (C) 2005-2011 Canonical Ltd -- --"""Python testtools extension for running unittest suites concurrently. -- --The `testtools` project provides a ConcurrentTestSuite class, but does --not provide a `make_tests` implementation needed to use it. -- --This allows you to parallelize a test run across a configurable number --of worker processes. While this can speed up CPU-bound test runs, it is --mainly useful for IO-bound tests that spend most of their time waiting for --data to arrive from someplace else and can benefit from cocncurrency. -- --Unix only. --""" -- --import os --import sys --import traceback --import unittest --from itertools import cycle --from multiprocessing import cpu_count -- --from subunit import ProtocolTestCase, TestProtocolClient --from subunit.test_results import AutoTimingTestResultDecorator -- --from testtools import ConcurrentTestSuite, iterate_tests --from testtools.content import TracebackContent, text_content -- -- --_all__ = [ -- 'ConcurrentTestSuite', -- 'fork_for_tests', -- 'partition_tests', --] -- -- --CPU_COUNT = cpu_count() -- -- --class BufferingTestProtocolClient(TestProtocolClient): -- """A TestProtocolClient which can buffer the test outputs -- -- This class captures the stdout and stderr output streams of the -- tests as it runs them, and includes the output texts in the subunit -- stream as additional details. -- -- Args: -- stream: A file-like object to write a subunit stream to -- buffer (bool): True to capture test stdout/stderr outputs and -- include them in the test details -- """ -- def __init__(self, stream, buffer=True): -- super().__init__(stream) -- self.buffer = buffer -- -- def _addOutcome(self, outcome, test, error=None, details=None, -- error_permitted=True): -- """Report a test outcome to the subunit stream -- -- The parent class uses this function as a common implementation -- for various methods that report successes, errors, failures, etc. -- -- This version automatically upgrades the error tracebacks to the -- new 'details' format by wrapping them in a Content object, so -- that we can include the captured test output in the test result -- details. -- -- Args: -- outcome: A string describing the outcome - used as the -- event name in the subunit stream. -- test: The test case whose outcome is to be reported -- error: Standard unittest positional argument form - an -- exc_info tuple. -- details: New Testing-in-python drafted API; a dict from -- string to subunit.Content objects. -- error_permitted: If True then one and only one of error or -- details must be supplied. If False then error must not -- be supplied and details is still optional. -- """ -- if details is None: -- details = {} -- -- # Parent will raise an exception if error_permitted is False but -- # error is not None. We want that exception in that case, so -- # don't touch error when error_permitted is explicitly False. -- if error_permitted and error is not None: -- # Parent class prefers error over details -- details['traceback'] = TracebackContent(error, test) -- error_permitted = False -- error = None -- -- if self.buffer: -- stdout = sys.stdout.getvalue() -- if stdout: -- details['stdout'] = text_content(stdout) -- -- stderr = sys.stderr.getvalue() -- if stderr: -- details['stderr'] = text_content(stderr) -- -- return super()._addOutcome(outcome, test, error=error, -- details=details, error_permitted=error_permitted) -- -- --def fork_for_tests(concurrency_num=CPU_COUNT, buffer=False): -- """Implementation of `make_tests` used to construct `ConcurrentTestSuite`. -- -- :param concurrency_num: number of processes to use. -- """ -- if buffer: -- test_protocol_client_class = BufferingTestProtocolClient -- else: -- test_protocol_client_class = TestProtocolClient -- -- def do_fork(suite): -- """Take suite and start up multiple runners by forking (Unix only). -- -- :param suite: TestSuite object. -- -- :return: An iterable of TestCase-like objects which can each have -- run(result) called on them to feed tests to result. -- """ -- result = [] -- test_blocks = partition_tests(suite, concurrency_num) -- # Clear the tests from the original suite so it doesn't keep them alive -- suite._tests[:] = [] -- for process_tests in test_blocks: -- process_suite = unittest.TestSuite(process_tests) -- # Also clear each split list so new suite has only reference -- process_tests[:] = [] -- c2pread, c2pwrite = os.pipe() -- pid = os.fork() -- if pid == 0: -- try: -- stream = os.fdopen(c2pwrite, 'wb') -- os.close(c2pread) -- # Leave stderr and stdout open so we can see test noise -- # Close stdin so that the child goes away if it decides to -- # read from stdin (otherwise its a roulette to see what -- # child actually gets keystrokes for pdb etc). -- sys.stdin.close() -- subunit_result = AutoTimingTestResultDecorator( -- test_protocol_client_class(stream) -- ) -- process_suite.run(subunit_result) -- except: -- # Try and report traceback on stream, but exit with error -- # even if stream couldn't be created or something else -- # goes wrong. The traceback is formatted to a string and -- # written in one go to avoid interleaving lines from -- # multiple failing children. -- try: -- stream.write(traceback.format_exc()) -- finally: -- os._exit(1) -- os._exit(0) -- else: -- os.close(c2pwrite) -- stream = os.fdopen(c2pread, 'rb') -- # If we don't pass the second argument here, it defaults -- # to sys.stdout.buffer down the line. But if we don't -- # pass it *now*, it may be resolved after sys.stdout is -- # replaced with a StringIO (to capture tests' outputs) -- # which doesn't have a buffer attribute and can end up -- # occasionally causing a 'broken-runner' error. -- test = ProtocolTestCase(stream, sys.stdout.buffer) -- result.append(test) -- return result -- return do_fork -- -- --def partition_tests(suite, count): -- """Partition suite into count lists of tests.""" -- # This just assigns tests in a round-robin fashion. On one hand this -- # splits up blocks of related tests that might run faster if they shared -- # resources, but on the other it avoids assigning blocks of slow tests to -- # just one partition. So the slowest partition shouldn't be much slower -- # than the fastest. -- partitions = [list() for _ in range(count)] -- tests = iterate_tests(suite) -- for partition, test in zip(cycle(partitions), tests): -- partition.append(test) -- return partitions -- -- --if __name__ == '__main__': -- import time -- -- class SampleTestCase(unittest.TestCase): -- """Dummy tests that sleep for demo.""" -- -- def test_me_1(self): -- time.sleep(0.5) -- -- def test_me_2(self): -- time.sleep(0.5) -- -- def test_me_3(self): -- time.sleep(0.5) -- -- def test_me_4(self): -- time.sleep(0.5) -- -- # Load tests from SampleTestCase defined above -- suite = unittest.TestLoader().loadTestsFromTestCase(SampleTestCase) -- runner = unittest.TextTestRunner() -- -- # Run tests sequentially -- runner.run(suite) -- -- # Run same tests across 4 processes -- suite = unittest.TestLoader().loadTestsFromTestCase(SampleTestCase) -- concurrent_suite = ConcurrentTestSuite(suite, fork_for_tests(4)) -- runner.run(concurrent_suite) -diff --git a/tools/docker/Dockerfile b/tools/docker/Dockerfile -index 33e2bd2add..bd02531be2 100644 ---- a/tools/docker/Dockerfile -+++ b/tools/docker/Dockerfile -@@ -2,7 +2,7 @@ - # This Dockerfile is used to build an image containing basic stuff to be used - # to build U-Boot and run our test suites. - --FROM ubuntu:jammy-20230126 -+FROM ubuntu:jammy-20230308 - MAINTAINER Tom Rini - LABEL Description=" This image is for building U-Boot inside a container" - -@@ -182,10 +182,31 @@ RUN git clone https://gitlab.com/qemu-project/qemu.git /tmp/qemu && \ - git config user.email u-boot@denx.de && \ - # manually apply the bug fix for QEMU 6.1.0 Xilinx Zynq UART emulation codes - wget -O - http://patchwork.ozlabs.org/project/qemu-devel/patch/20210823020813.25192-2-bmeng.cn@gmail.com/mbox/ | git am && \ -- ./configure --prefix=/opt/qemu --target-list="aarch64-softmmu,arm-softmmu,i386-softmmu,mips-softmmu,mips64-softmmu,mips64el-softmmu,mipsel-softmmu,ppc-softmmu,riscv32-softmmu,riscv64-softmmu,sh4-softmmu,x86_64-softmmu,xtensa-softmmu" && \ -+ ./configure --prefix=/opt/qemu --target-list="aarch64-softmmu,arm-softmmu,i386-softmmu,m68k-softmmu,mips-softmmu,mips64-softmmu,mips64el-softmmu,mipsel-softmmu,ppc-softmmu,riscv32-softmmu,riscv64-softmmu,sh4-softmmu,x86_64-softmmu,xtensa-softmmu" && \ - make -j$(nproc) all install && \ - rm -rf /tmp/qemu - -+# Build QEMU supporting Nokia n900 emulation -+RUN mkdir -p /opt/nokia && \ -+ cd /tmp && \ -+ git clone https://git.linaro.org/qemu/qemu-linaro.git && \ -+ cd /tmp/qemu-linaro && \ -+ git checkout 8f8d8e0796efe1a6f34cdd83fb798f3c41217ec1 && \ -+ ./configure --enable-system --target-list=arm-softmmu \ -+ --python=/usr/bin/python2.7 --disable-sdl --disable-gtk \ -+ --disable-curses --audio-drv-list= --audio-card-list= \ -+ --disable-werror --disable-xen --disable-xen-pci-passthrough \ -+ --disable-brlapi --disable-vnc --disable-curl --disable-slirp \ -+ --disable-kvm --disable-user --disable-linux-user --disable-bsd-user \ -+ --disable-guest-base --disable-uuid --disable-vde --disable-linux-aio \ -+ --disable-cap-ng --disable-attr --disable-blobs --disable-docs \ -+ --disable-spice --disable-libiscsi --disable-smartcard-nss \ -+ --disable-usb-redir --disable-guest-agent --disable-seccomp \ -+ --disable-glusterfs --disable-nptl --disable-fdt && \ -+ make -j$(nproc) && \ -+ cp /tmp/qemu-linaro/arm-softmmu/qemu-system-arm /opt/nokia && \ -+ rm -rf /tmp/qemu-linaro -+ - # Build genimage (required by some targets to generate disk images) - RUN wget -O - https://github.com/pengutronix/genimage/releases/download/v14/genimage-14.tar.xz | tar -C /tmp -xJ && \ - cd /tmp/genimage-14 && \ -@@ -229,6 +250,16 @@ RUN mkdir /tmp/trace && \ - sudo make install && \ - rm -rf /tmp/trace - -+# Files to run Nokia RX-51 (aka N900) tests -+RUN mkdir -p /opt/nokia && \ -+ cd /opt/nokia && \ -+ wget https://raw.githubusercontent.com/pali/u-boot-maemo/master/debian/u-boot-gen-combined && \ -+ chmod 0755 u-boot-gen-combined && \ -+ wget http://repository.maemo.org/qemu-n900/qemu-n900.tar.gz && \ -+ wget http://repository.maemo.org/pool/maemo5.0/free/k/kernel/kernel_2.6.28-20103103+0m5_armel.deb && \ -+ wget http://repository.maemo.org/pool/maemo5.0/free/g/glibc/libc6_2.5.1-1eglibc27+0m5_armel.deb && \ -+ wget http://repository.maemo.org/pool/maemo5.0/free/b/busybox/busybox_1.10.2.legal-1osso30+0m5_armel.deb -+ - # Create our user/group - RUN echo uboot ALL=NOPASSWD: ALL > /etc/sudoers.d/uboot - RUN useradd -m -U uboot -diff --git a/tools/dtoc/README.rst b/tools/dtoc/README.rst -new file mode 100644 -index 0000000000..92b39759ed ---- /dev/null -+++ b/tools/dtoc/README.rst -@@ -0,0 +1,15 @@ -+.. SPDX-License-Identifier: GPL-2.0+ -+ -+Devicetree-to-C generator -+========================= -+ -+This is a Python program and associated utilities, which supports converting -+devicetree files into C code. It generates header files containing struct -+definitions, as well as C files containing the data. It does not require any -+modification of the devicetree files. -+ -+Some high-level libraries are provided for working with devicetree. These may -+be useful in other projects. -+ -+This package also includes some U-Boot-specific features, such as creating -+`struct udevice` and `struct uclass` entries for devicetree nodes. -diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py -index a69a7889ce..39f416cfd8 100644 ---- a/tools/dtoc/dtb_platdata.py -+++ b/tools/dtoc/dtb_platdata.py -@@ -35,9 +35,9 @@ PROP_IGNORE_LIST = [ - 'linux,phandle', - "status", - 'phandle', -- 'u-boot,dm-pre-reloc', -- 'u-boot,dm-tpl', -- 'u-boot,dm-spl', -+ 'bootph-all', -+ 'bootph-pre-sram', -+ 'bootph-pre-ram', - ] - - # C type declarations for the types we support -@@ -442,7 +442,7 @@ class DtbPlatdata(): - """ - parent = node.parent - if parent and not parent.props: -- raise ValueError("Parent node '%s' has no properties - do you need u-boot,dm-spl or similar?" % -+ raise ValueError("Parent node '%s' has no properties - do you need bootph-pre-ram or similar?" % - parent.path) - num_addr, num_size = 2, 2 - if parent: -@@ -754,7 +754,7 @@ class DtbPlatdata(): - # This might indicate that the parent node is not in the - # SPL/TPL devicetree but the child is. For example if we are - # dealing with of-platdata in TPL, the parent has a -- # u-boot,dm-tpl tag but the child has u-boot,dm-pre-reloc. In -+ # bootph-pre-sram tag but the child has bootph-all. In - # this case the child node exists in TPL but the parent does - # not. - raise ValueError("Node '%s' requires parent node '%s' but it is not in the valid list" % -diff --git a/tools/dtoc/fdt.py b/tools/dtoc/fdt.py -index d933972918..a8e05349a7 100644 ---- a/tools/dtoc/fdt.py -+++ b/tools/dtoc/fdt.py -@@ -12,7 +12,7 @@ import sys - from dtoc import fdt_util - import libfdt - from libfdt import QUIET_NOTFOUND --from patman import tools -+from u_boot_pylib import tools - - # This deals with a device tree, presenting it as an assortment of Node and - # Prop objects, representing nodes and properties, respectively. This file -diff --git a/tools/dtoc/fdt_util.py b/tools/dtoc/fdt_util.py -index f34316632a..f1f70568cf 100644 ---- a/tools/dtoc/fdt_util.py -+++ b/tools/dtoc/fdt_util.py -@@ -13,8 +13,8 @@ import struct - import sys - import tempfile - --from patman import command --from patman import tools -+from u_boot_pylib import command -+from u_boot_pylib import tools - - def fdt32_to_cpu(val): - """Convert a device tree cell to an integer -diff --git a/tools/dtoc/main.py b/tools/dtoc/main.py -index 5508759d4d..6c91450410 100755 ---- a/tools/dtoc/main.py -+++ b/tools/dtoc/main.py -@@ -23,6 +23,7 @@ see doc/driver-model/of-plat.rst - - from argparse import ArgumentParser - import os -+import pathlib - import sys - - # Bring in the patman libraries -@@ -35,7 +36,10 @@ sys.path.insert(0, os.path.join(our_path, - '../../build-sandbox_spl/scripts/dtc/pylibfdt')) - - from dtoc import dtb_platdata --from patman import test_util -+from u_boot_pylib import test_util -+ -+DTOC_DIR = pathlib.Path(__file__).parent -+HAVE_TESTS = (DTOC_DIR / 'test_dtoc.py').exists() - - def run_tests(processes, args): - """Run all the test we have for dtoc -@@ -61,54 +65,62 @@ def run_tests(processes, args): - return (0 if result.wasSuccessful() else 1) - - --def RunTestCoverage(): -+def RunTestCoverage(build_dir): - """Run the tests and check that we get 100% coverage""" - sys.argv = [sys.argv[0]] - test_util.run_test_coverage('tools/dtoc/dtoc', '/main.py', -- ['tools/patman/*.py', '*/fdt*', '*test*'], args.build_dir) -- -- --if __name__ != '__main__': -- sys.exit(1) -- --epilog = '''Generate C code from devicetree files. See of-plat.rst for details''' -- --parser = ArgumentParser(epilog=epilog) --parser.add_argument('-B', '--build-dir', type=str, default='b', -- help='Directory containing the build output') --parser.add_argument('-c', '--c-output-dir', action='store', -- help='Select output directory for C files') --parser.add_argument('-C', '--h-output-dir', action='store', -- help='Select output directory for H files (defaults to --c-output-di)') --parser.add_argument('-d', '--dtb-file', action='store', -- help='Specify the .dtb input file') --parser.add_argument('-i', '--instantiate', action='store_true', default=False, -- help='Instantiate devices to avoid needing device_bind()') --parser.add_argument('--include-disabled', action='store_true', -- help='Include disabled nodes') --parser.add_argument('-o', '--output', action='store', -- help='Select output filename') --parser.add_argument('-p', '--phase', type=str, -- help='set phase of U-Boot this invocation is for (spl/tpl)') --parser.add_argument('-P', '--processes', type=int, -- help='set number of processes to use for running tests') --parser.add_argument('-t', '--test', action='store_true', dest='test', -- default=False, help='run tests') --parser.add_argument('-T', '--test-coverage', action='store_true', -- default=False, help='run tests and check for 100%% coverage') --parser.add_argument('files', nargs='*') --args = parser.parse_args() -- --# Run our meagre tests --if args.test: -- ret_code = run_tests(args.processes, args) -- sys.exit(ret_code) -- --elif args.test_coverage: -- RunTestCoverage() -- --else: -- dtb_platdata.run_steps(args.files, args.dtb_file, args.include_disabled, -- args.output, -- [args.c_output_dir, args.h_output_dir], -- args.phase, instantiate=args.instantiate) -+ ['tools/patman/*.py', 'tools/u_boot_pylib/*','*/fdt*', '*test*'], -+ build_dir) -+ -+ -+def run_dtoc(): -+ epilog = 'Generate C code from devicetree files. See of-plat.rst for details' -+ -+ parser = ArgumentParser(epilog=epilog) -+ parser.add_argument('-B', '--build-dir', type=str, default='b', -+ help='Directory containing the build output') -+ parser.add_argument('-c', '--c-output-dir', action='store', -+ help='Select output directory for C files') -+ parser.add_argument( -+ '-C', '--h-output-dir', action='store', -+ help='Select output directory for H files (defaults to --c-output-di)') -+ parser.add_argument('-d', '--dtb-file', action='store', -+ help='Specify the .dtb input file') -+ parser.add_argument( -+ '-i', '--instantiate', action='store_true', default=False, -+ help='Instantiate devices to avoid needing device_bind()') -+ parser.add_argument('--include-disabled', action='store_true', -+ help='Include disabled nodes') -+ parser.add_argument('-o', '--output', action='store', -+ help='Select output filename') -+ parser.add_argument( -+ '-p', '--phase', type=str, -+ help='set phase of U-Boot this invocation is for (spl/tpl)') -+ parser.add_argument('-P', '--processes', type=int, -+ help='set number of processes to use for running tests') -+ if HAVE_TESTS: -+ parser.add_argument('-t', '--test', action='store_true', dest='test', -+ default=False, help='run tests') -+ parser.add_argument( -+ '-T', '--test-coverage', action='store_true', -+ default=False, help='run tests and check for 100%% coverage') -+ parser.add_argument('files', nargs='*') -+ args = parser.parse_args() -+ -+ # Run our meagre tests -+ if HAVE_TESTS and args.test: -+ ret_code = run_tests(args.processes, args) -+ sys.exit(ret_code) -+ -+ elif HAVE_TESTS and args.test_coverage: -+ RunTestCoverage(args.build_dir) -+ -+ else: -+ dtb_platdata.run_steps(args.files, args.dtb_file, args.include_disabled, -+ args.output, -+ [args.c_output_dir, args.h_output_dir], -+ args.phase, instantiate=args.instantiate) -+ -+ -+if __name__ == '__main__': -+ run_dtoc() -diff --git a/tools/dtoc/pyproject.toml b/tools/dtoc/pyproject.toml -new file mode 100644 -index 0000000000..77fe4da215 ---- /dev/null -+++ b/tools/dtoc/pyproject.toml -@@ -0,0 +1,26 @@ -+[build-system] -+requires = ["setuptools>=61.0"] -+build-backend = "setuptools.build_meta" -+ -+[project] -+name = "dtoc" -+version = "0.0.2" -+authors = [ -+ { name="Simon Glass", email="sjg@chromium.org" }, -+] -+dependencies = ["pylibfdt", "u_boot_pylib"] -+description = "Devicetree-to-C generator" -+readme = "README.rst" -+requires-python = ">=3.7" -+classifiers = [ -+ "Programming Language :: Python :: 3", -+ "License :: OSI Approved :: GNU General Public License v2 or later (GPLv2+)", -+ "Operating System :: OS Independent", -+] -+ -+[project.urls] -+"Homepage" = "https://u-boot.readthedocs.io/en/latest/develop/driver-model/of-plat.html" -+"Bug Tracker" = "https://source.denx.de/groups/u-boot/-/issues" -+ -+[project.scripts] -+dtoc = "dtoc.main:run_dtoc" -diff --git a/tools/dtoc/test/dtoc_test_add_prop.dts b/tools/dtoc/test/dtoc_test_add_prop.dts -index fa296e5552..8225de36d2 100644 ---- a/tools/dtoc/test/dtoc_test_add_prop.dts -+++ b/tools/dtoc/test/dtoc_test_add_prop.dts -@@ -11,13 +11,13 @@ - #address-cells = <1>; - #size-cells = <1>; - spl-test { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "sandbox,spl-test"; - intval = <1>; - }; - - spl-test2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "sandbox,spl-test"; - intarray = <5>; - }; -diff --git a/tools/dtoc/test/dtoc_test_addr32.dts b/tools/dtoc/test/dtoc_test_addr32.dts -index 239045497c..3e7dc56729 100644 ---- a/tools/dtoc/test/dtoc_test_addr32.dts -+++ b/tools/dtoc/test/dtoc_test_addr32.dts -@@ -12,13 +12,13 @@ - #size-cells = <1>; - - test1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "test1"; - reg = <0x1234 0x5678>; - }; - - test2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "test2"; - reg = <0x12345678 0x98765432 2 3>; - }; -diff --git a/tools/dtoc/test/dtoc_test_addr32_64.dts b/tools/dtoc/test/dtoc_test_addr32_64.dts -index 7599d5b0a5..7ce16feef1 100644 ---- a/tools/dtoc/test/dtoc_test_addr32_64.dts -+++ b/tools/dtoc/test/dtoc_test_addr32_64.dts -@@ -12,19 +12,19 @@ - #size-cells = <2>; - - test1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "test1"; - reg = <0x1234 0x5678 0x0>; - }; - - test2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "test2"; - reg = <0x12345678 0x98765432 0x10987654>; - }; - - test3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "test3"; - reg = <0x12345678 0x98765432 0x10987654 2 0 3>; - }; -diff --git a/tools/dtoc/test/dtoc_test_addr64.dts b/tools/dtoc/test/dtoc_test_addr64.dts -index 263d251386..5f8c23f04b 100644 ---- a/tools/dtoc/test/dtoc_test_addr64.dts -+++ b/tools/dtoc/test/dtoc_test_addr64.dts -@@ -12,19 +12,19 @@ - #size-cells = <2>; - - test1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "test1"; - reg = /bits/ 64 <0x1234 0x5678>; - }; - - test2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "test2"; - reg = /bits/ 64 <0x1234567890123456 0x9876543210987654>; - }; - - test3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "test3"; - reg = /bits/ 64 <0x1234567890123456 0x9876543210987654 2 3>; - }; -diff --git a/tools/dtoc/test/dtoc_test_addr64_32.dts b/tools/dtoc/test/dtoc_test_addr64_32.dts -index 85e4f5fdae..bfbfd87b8d 100644 ---- a/tools/dtoc/test/dtoc_test_addr64_32.dts -+++ b/tools/dtoc/test/dtoc_test_addr64_32.dts -@@ -12,19 +12,19 @@ - #size-cells = <1>; - - test1 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "test1"; - reg = <0x1234 0x0 0x5678>; - }; - - test2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "test2"; - reg = <0x12345678 0x90123456 0x98765432>; - }; - - test3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "test3"; - reg = <0x12345678 0x90123456 0x98765432 0 2 3>; - }; -diff --git a/tools/dtoc/test/dtoc_test_alias_bad.dts b/tools/dtoc/test/dtoc_test_alias_bad.dts -index d4f502ad0a..69761f9114 100644 ---- a/tools/dtoc/test/dtoc_test_alias_bad.dts -+++ b/tools/dtoc/test/dtoc_test_alias_bad.dts -@@ -18,20 +18,20 @@ - }; - - spl-test { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "sandbox,spl-test"; - boolval; - intval = <1>; - }; - - i2c: i2c { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "sandbox,i2c"; - intval = <3>; - }; - - spl-test3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "sandbox,spl-test"; - stringarray = "one"; - longbytearray = [09 0a 0b 0c 0d 0e 0f 10]; -diff --git a/tools/dtoc/test/dtoc_test_alias_bad_path.dts b/tools/dtoc/test/dtoc_test_alias_bad_path.dts -index 0beca4f0d0..6f566fe4ab 100644 ---- a/tools/dtoc/test/dtoc_test_alias_bad_path.dts -+++ b/tools/dtoc/test/dtoc_test_alias_bad_path.dts -@@ -18,20 +18,20 @@ - }; - - spl-test { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "sandbox,spl-test"; - boolval; - intval = <1>; - }; - - i2c: i2c { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "sandbox,i2c"; - intval = <3>; - }; - - spl-test3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "sandbox,spl-test"; - stringarray = "one"; - longbytearray = [09 0a 0b 0c 0d 0e 0f 10]; -diff --git a/tools/dtoc/test/dtoc_test_alias_bad_uc.dts b/tools/dtoc/test/dtoc_test_alias_bad_uc.dts -index ae64f5b3b2..5d23c63a63 100644 ---- a/tools/dtoc/test/dtoc_test_alias_bad_uc.dts -+++ b/tools/dtoc/test/dtoc_test_alias_bad_uc.dts -@@ -18,20 +18,20 @@ - }; - - spl-test { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "sandbox,spl-test"; - boolval; - intval = <1>; - }; - - i2c: i2c { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "sandbox,i2c"; - intval = <3>; - }; - - spl-test3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "sandbox,spl-test"; - stringarray = "one"; - longbytearray = [09 0a 0b 0c 0d 0e 0f 10]; -diff --git a/tools/dtoc/test/dtoc_test_aliases.dts b/tools/dtoc/test/dtoc_test_aliases.dts -index ae33716863..018b834046 100644 ---- a/tools/dtoc/test/dtoc_test_aliases.dts -+++ b/tools/dtoc/test/dtoc_test_aliases.dts -@@ -9,13 +9,13 @@ - - / { - spl-test { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "compat1", "compat2.1-fred", "compat3"; - intval = <1>; - }; - - spl-test2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "compat1", "simple_bus"; - intval = <1>; - }; -diff --git a/tools/dtoc/test/dtoc_test_driver_alias.dts b/tools/dtoc/test/dtoc_test_driver_alias.dts -index da7973b2e5..22369a4406 100644 ---- a/tools/dtoc/test/dtoc_test_driver_alias.dts -+++ b/tools/dtoc/test/dtoc_test_driver_alias.dts -@@ -9,7 +9,7 @@ - - / { - gpio_a: gpios@0 { -- u-boot,dm-pre-reloc; -+ bootph-all; - gpio-controller; - compatible = "sandbox_gpio_alias"; - #gpio-cells = <1>; -diff --git a/tools/dtoc/test/dtoc_test_inst.dts b/tools/dtoc/test/dtoc_test_inst.dts -index b8177fcef5..9689be391b 100644 ---- a/tools/dtoc/test/dtoc_test_inst.dts -+++ b/tools/dtoc/test/dtoc_test_inst.dts -@@ -18,20 +18,20 @@ - }; - - spl-test { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "sandbox,spl-test"; - boolval; - intval = <1>; - }; - - i2c: i2c { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "sandbox,i2c"; - intval = <3>; - }; - - spl-test3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "sandbox,spl-test"; - stringarray = "one"; - longbytearray = [09 0a 0b 0c 0d 0e 0f 10]; -diff --git a/tools/dtoc/test/dtoc_test_invalid_driver.dts b/tools/dtoc/test/dtoc_test_invalid_driver.dts -index 914ac3e899..042a325913 100644 ---- a/tools/dtoc/test/dtoc_test_invalid_driver.dts -+++ b/tools/dtoc/test/dtoc_test_invalid_driver.dts -@@ -9,7 +9,7 @@ - - / { - spl-test { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "invalid"; - }; - }; -diff --git a/tools/dtoc/test/dtoc_test_noparent.dts b/tools/dtoc/test/dtoc_test_noparent.dts -index e976dd2b8a..0efb17e0cb 100644 ---- a/tools/dtoc/test/dtoc_test_noparent.dts -+++ b/tools/dtoc/test/dtoc_test_noparent.dts -@@ -12,18 +12,18 @@ - #size-cells = <1>; - i2c@0 { - compatible = "sandbox,i2c"; -- u-boot,dm-tpl; -+ bootph-pre-sram; - #address-cells = <1>; - #size-cells = <0>; - spl-test { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "sandbox,spl-test"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - pmic@9 { - compatible = "sandbox,pmic"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <9>; - low-power; - }; -diff --git a/tools/dtoc/test/dtoc_test_noprops.dts b/tools/dtoc/test/dtoc_test_noprops.dts -index e6fdd11b83..75296beb31 100644 ---- a/tools/dtoc/test/dtoc_test_noprops.dts -+++ b/tools/dtoc/test/dtoc_test_noprops.dts -@@ -13,7 +13,7 @@ - i2c@0 { - pmic@9 { - compatible = "sandbox,pmic"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <9>; - low-power; - }; -diff --git a/tools/dtoc/test/dtoc_test_phandle.dts b/tools/dtoc/test/dtoc_test_phandle.dts -index d9aa433503..74a146b9a3 100644 ---- a/tools/dtoc/test/dtoc_test_phandle.dts -+++ b/tools/dtoc/test/dtoc_test_phandle.dts -@@ -9,34 +9,34 @@ - - / { - phandle: phandle-target { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "target"; - intval = <0>; - #clock-cells = <0>; - }; - - phandle_1: phandle2-target { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "target"; - intval = <1>; - #clock-cells = <1>; - }; - phandle_2: phandle3-target { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "target"; - intval = <2>; - #clock-cells = <2>; - }; - - phandle-source { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "source"; - clocks = <&phandle &phandle_1 11 &phandle_2 12 13 &phandle>; - phandle-name-offset = <&phandle_2>, "fred", <123>; - }; - - phandle-source2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "source"; - clocks = <&phandle>; - }; -diff --git a/tools/dtoc/test/dtoc_test_phandle_bad.dts b/tools/dtoc/test/dtoc_test_phandle_bad.dts -index a3ddc59585..94cfada95b 100644 ---- a/tools/dtoc/test/dtoc_test_phandle_bad.dts -+++ b/tools/dtoc/test/dtoc_test_phandle_bad.dts -@@ -9,7 +9,7 @@ - - / { - phandle-source { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "source"; - clocks = <20>; /* Invalid phandle */ - }; -diff --git a/tools/dtoc/test/dtoc_test_phandle_bad2.dts b/tools/dtoc/test/dtoc_test_phandle_bad2.dts -index fe25f565fb..4d24b96ce6 100644 ---- a/tools/dtoc/test/dtoc_test_phandle_bad2.dts -+++ b/tools/dtoc/test/dtoc_test_phandle_bad2.dts -@@ -9,13 +9,13 @@ - - / { - phandle: phandle-target { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "target"; - intval = <0>; - }; - - phandle-source2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "source"; - clocks = <&phandle>; - }; -diff --git a/tools/dtoc/test/dtoc_test_phandle_cd_gpios.dts b/tools/dtoc/test/dtoc_test_phandle_cd_gpios.dts -index 241743e73e..6ad8006266 100644 ---- a/tools/dtoc/test/dtoc_test_phandle_cd_gpios.dts -+++ b/tools/dtoc/test/dtoc_test_phandle_cd_gpios.dts -@@ -9,33 +9,33 @@ - - / { - phandle: phandle-target { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "target"; - intval = <0>; - #gpio-cells = <0>; - }; - - phandle_1: phandle2-target { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "target"; - intval = <1>; - #gpio-cells = <1>; - }; - phandle_2: phandle3-target { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "target"; - intval = <2>; - #gpio-cells = <2>; - }; - - phandle-source { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "source"; - cd-gpios = <&phandle &phandle_1 11 &phandle_2 12 13 &phandle>; - }; - - phandle-source2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "source"; - cd-gpios = <&phandle>; - }; -diff --git a/tools/dtoc/test/dtoc_test_phandle_reorder.dts b/tools/dtoc/test/dtoc_test_phandle_reorder.dts -index aa71d56f27..573a4f6396 100644 ---- a/tools/dtoc/test/dtoc_test_phandle_reorder.dts -+++ b/tools/dtoc/test/dtoc_test_phandle_reorder.dts -@@ -10,13 +10,13 @@ - / { - - phandle-source2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "source"; - clocks = <&phandle>; - }; - - phandle: phandle-target { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "target"; - #clock-cells = <0>; - }; -diff --git a/tools/dtoc/test/dtoc_test_phandle_single.dts b/tools/dtoc/test/dtoc_test_phandle_single.dts -index aacd0b15fa..1b1763932c 100644 ---- a/tools/dtoc/test/dtoc_test_phandle_single.dts -+++ b/tools/dtoc/test/dtoc_test_phandle_single.dts -@@ -9,14 +9,14 @@ - - / { - phandle: phandle-target { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "target"; - intval = <0>; - #clock-cells = <0>; - }; - - phandle-source2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "source"; - clocks = <&phandle>; - }; -diff --git a/tools/dtoc/test/dtoc_test_simple.dts b/tools/dtoc/test/dtoc_test_simple.dts -index aef07efeae..08f667ee5a 100644 ---- a/tools/dtoc/test/dtoc_test_simple.dts -+++ b/tools/dtoc/test/dtoc_test_simple.dts -@@ -11,7 +11,7 @@ - #address-cells = <1>; - #size-cells = <1>; - spl-test { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "sandbox,spl-test"; - boolval; - maybe-empty-int = <>; -@@ -27,7 +27,7 @@ - }; - - spl-test2 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "sandbox,spl-test"; - intval = <3>; - intarray = <5>; -@@ -40,7 +40,7 @@ - }; - - spl-test3 { -- u-boot,dm-pre-reloc; -+ bootph-all; - compatible = "sandbox,spl-test"; - stringarray = "one"; - longbytearray = [09 0a 0b 0c 0d 0e 0f 10]; -@@ -49,12 +49,12 @@ - - i2c@0 { - compatible = "sandbox,i2c"; -- u-boot,dm-pre-reloc; -+ bootph-all; - #address-cells = <1>; - #size-cells = <0>; - pmic@9 { - compatible = "sandbox,pmic"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <9>; - low-power; - }; -diff --git a/tools/dtoc/test/dtoc_test_single_reg.dts b/tools/dtoc/test/dtoc_test_single_reg.dts -index 804b67855b..035937cfbf 100644 ---- a/tools/dtoc/test/dtoc_test_single_reg.dts -+++ b/tools/dtoc/test/dtoc_test_single_reg.dts -@@ -13,12 +13,12 @@ - - i2c@0 { - compatible = "sandbox,i2c"; -- u-boot,dm-pre-reloc; -+ bootph-all; - #address-cells = <1>; - #size-cells = <0>; - pmic@9 { - compatible = "sandbox,pmic"; -- u-boot,dm-pre-reloc; -+ bootph-all; - reg = <9>; - low-power; - -diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py -index c62fcbac83..597c93e8a8 100755 ---- a/tools/dtoc/test_dtoc.py -+++ b/tools/dtoc/test_dtoc.py -@@ -13,6 +13,7 @@ import collections - import copy - import glob - import os -+import pathlib - import struct - import unittest - -@@ -25,10 +26,11 @@ from dtoc.dtb_platdata import get_value - from dtoc.dtb_platdata import tab_to - from dtoc.src_scan import conv_name_to_c - from dtoc.src_scan import get_compat_name --from patman import test_util --from patman import tools -+from u_boot_pylib import test_util -+from u_boot_pylib import tools - --OUR_PATH = os.path.dirname(os.path.realpath(__file__)) -+DTOC_DIR = pathlib.Path(__file__).parent -+TEST_DATA_DIR = DTOC_DIR / 'test/' - - - HEADER = '''/* -@@ -91,7 +93,7 @@ def get_dtb_file(dts_fname, capture_stderr=False): - Returns: - str: Filename of compiled file in output directory - """ -- return fdt_util.EnsureCompiled(os.path.join(OUR_PATH, 'test', dts_fname), -+ return fdt_util.EnsureCompiled(str(TEST_DATA_DIR / dts_fname), - capture_stderr=capture_stderr) - - -diff --git a/tools/dtoc/test_fdt.py b/tools/dtoc/test_fdt.py -index 3b8ee00d4e..32fa69cbb0 100755 ---- a/tools/dtoc/test_fdt.py -+++ b/tools/dtoc/test_fdt.py -@@ -30,8 +30,8 @@ from dtoc import fdt_util - from dtoc.fdt_util import fdt32_to_cpu, fdt64_to_cpu - from dtoc.fdt import Type, BytesToValue - import libfdt --from patman import test_util --from patman import tools -+from u_boot_pylib import test_util -+from u_boot_pylib import tools - - #pylint: disable=protected-access - -@@ -132,10 +132,10 @@ class TestFdt(unittest.TestCase): - """Tests obtaining a list of properties""" - node = self.dtb.GetNode('/spl-test') - props = self.dtb.GetProps(node) -- self.assertEqual(['boolval', 'bytearray', 'byteval', 'compatible', -- 'int64val', 'intarray', 'intval', 'longbytearray', -- 'maybe-empty-int', 'notstring', 'stringarray', -- 'stringval', 'u-boot,dm-pre-reloc'], -+ self.assertEqual(['boolval', 'bootph-all', 'bytearray', 'byteval', -+ 'compatible', 'int64val', 'intarray', 'intval', -+ 'longbytearray', 'maybe-empty-int', 'notstring', -+ 'stringarray', 'stringval', ], - sorted(props.keys())) - - def test_check_error(self): -@@ -814,7 +814,8 @@ def run_test_coverage(build_dir): - build_dir (str): Directory containing the build output - """ - test_util.run_test_coverage('tools/dtoc/test_fdt.py', None, -- ['tools/patman/*.py', '*test_fdt.py'], build_dir) -+ ['tools/patman/*.py', 'tools/u_boot_pylib/*', '*test_fdt.py'], -+ build_dir) - - - def run_tests(names, processes): -diff --git a/tools/dtoc/test_src_scan.py b/tools/dtoc/test_src_scan.py -index f93cd7f5a3..64b740841c 100644 ---- a/tools/dtoc/test_src_scan.py -+++ b/tools/dtoc/test_src_scan.py -@@ -15,8 +15,8 @@ import unittest - from unittest import mock - - from dtoc import src_scan --from patman import test_util --from patman import tools -+from u_boot_pylib import test_util -+from u_boot_pylib import tools - - OUR_PATH = os.path.dirname(os.path.realpath(__file__)) - -diff --git a/tools/fdt_add_pubkey.c b/tools/fdt_add_pubkey.c -new file mode 100644 -index 0000000000..999f5a7e83 ---- /dev/null -+++ b/tools/fdt_add_pubkey.c -@@ -0,0 +1,138 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+#include -+#include "fit_common.h" -+ -+static const char *cmdname; -+ -+static const char *algo_name = "sha1,rsa2048"; /* -a */ -+static const char *keydir = "."; /* -k */ -+static const char *keyname = "key"; /* -n */ -+static const char *require_keys; /* -r */ -+static const char *keydest; /* argv[n] */ -+ -+static void print_usage(const char *msg) -+{ -+ fprintf(stderr, "Error: %s\n", msg); -+ fprintf(stderr, "Usage: %s [-a ] [-k ] [-n ] [-r ]" -+ " \n", cmdname); -+ fprintf(stderr, "Help information: %s [-h]\n", cmdname); -+ exit(EXIT_FAILURE); -+} -+ -+static void print_help(void) -+{ -+ fprintf(stderr, "Options:\n" -+ "\t-a Cryptographic algorithm. Optional parameter, default value: sha1,rsa2048\n" -+ "\t-k Directory with public key. Optional parameter, default value: .\n" -+ "\t-n Public key name. Optional parameter, default value: key\n" -+ "\t-r Required: If present this indicates that the key must be verified for the image / configuration to be considered valid.\n" -+ "\t FDT blob file for adding of the public key. Required parameter.\n"); -+ exit(EXIT_FAILURE); -+} -+ -+static void process_args(int argc, char *argv[]) -+{ -+ int opt; -+ -+ while ((opt = getopt(argc, argv, "a:k:n:r:h")) != -1) { -+ switch (opt) { -+ case 'k': -+ keydir = optarg; -+ break; -+ case 'a': -+ algo_name = optarg; -+ break; -+ case 'n': -+ keyname = optarg; -+ break; -+ case 'r': -+ require_keys = optarg; -+ break; -+ case 'h': -+ print_help(); -+ default: -+ print_usage("Invalid option"); -+ } -+ } -+ /* The last parameter is expected to be the .dtb to add the public key to */ -+ if (optind < argc) -+ keydest = argv[optind]; -+ -+ if (!keydest) -+ print_usage("Missing dtb file to update"); -+} -+ -+static void reset_info(struct image_sign_info *info) -+{ -+ if (!info) -+ fprintf(stderr, "Error: info is NULL in %s\n", __func__); -+ -+ memset(info, 0, sizeof(struct image_sign_info)); -+ -+ info->keydir = keydir; -+ info->keyname = keyname; -+ info->name = algo_name; -+ info->require_keys = require_keys; -+ info->crypto = image_get_crypto_algo(algo_name); -+ -+ if (!info->crypto) { -+ fprintf(stderr, "Unsupported signature algorithm '%s'\n", -+ algo_name); -+ exit(EXIT_FAILURE); -+ } -+} -+ -+static int add_pubkey(struct image_sign_info *info) -+{ -+ int destfd = -1, ret; -+ void *dest_blob = NULL; -+ struct stat dest_sbuf; -+ size_t size_inc = 0; -+ -+ if (!info) -+ fprintf(stderr, "Error: info is NULL in %s\n", __func__); -+ -+ do { -+ if (destfd >= 0) { -+ munmap(dest_blob, dest_sbuf.st_size); -+ close(destfd); -+ -+ fprintf(stderr, ".dtb too small, increasing size by 1024 bytes\n"); -+ size_inc = 1024; -+ } -+ -+ destfd = mmap_fdt(cmdname, keydest, size_inc, &dest_blob, -+ &dest_sbuf, false, false); -+ if (destfd < 0) -+ exit(EXIT_FAILURE); -+ -+ ret = info->crypto->add_verify_data(info, dest_blob); -+ if (ret == -ENOSPC) -+ continue; -+ else if (ret < 0) -+ break; -+ } while (ret == -ENOSPC); -+ -+ return ret; -+} -+ -+int main(int argc, char *argv[]) -+{ -+ struct image_sign_info info; -+ int ret; -+ -+ cmdname = argv[0]; -+ -+ process_args(argc, argv); -+ reset_info(&info); -+ ret = add_pubkey(&info); -+ -+ if (ret < 0) { -+ fprintf(stderr, "%s: Cannot add public key to FIT blob: %s\n", -+ cmdname, strerror(ret)); -+ exit(EXIT_FAILURE); -+ } -+ -+ exit(EXIT_SUCCESS); -+} -+ -diff --git a/tools/fit_image.c b/tools/fit_image.c -index 8763a36d01..6ed57d5c40 100644 ---- a/tools/fit_image.c -+++ b/tools/fit_image.c -@@ -535,9 +535,20 @@ static int fit_extract_data(struct image_tool_params *params, const char *fname) - for (node = fdt_first_subnode(fdt, images); - node >= 0; - node = fdt_next_subnode(fdt, node)) { -+ ulong load_addr; - const char *data; - int len; - -+ /* -+ * HACK: Do not extract data that should be loaded -+ * outside normal SDRAM range, 0x0 - 0xf0000000. -+ * Workaround to avoid failed DMA read from -+ * non-secure MMC into secure SRAM. -+ */ -+ if (!fit_image_get_load(fdt, node, &load_addr) && -+ load_addr > 0xf0000000) -+ continue; -+ - data = fdt_getprop(fdt, node, FIT_DATA_PROP, &len); - if (!data) - continue; -diff --git a/tools/imx8image.c b/tools/imx8image.c -index 395d5c64bd..c25ea84e25 100644 ---- a/tools/imx8image.c -+++ b/tools/imx8image.c -@@ -829,7 +829,6 @@ static int build_container(soc_type_t soc, uint32_t sector_size, - int ret; - - int container = -1; -- int cont_img_count = 0; /* indexes to arrange the container */ - - memset((char *)&imx_header, 0, sizeof(imx_header_v3_t)); - -@@ -879,7 +878,6 @@ static int build_container(soc_type_t soc, uint32_t sector_size, - img_sp->src = file_off; - - file_off += ALIGN(sbuf.st_size, sector_size); -- cont_img_count++; - break; - - case SECO: -@@ -899,7 +897,6 @@ static int build_container(soc_type_t soc, uint32_t sector_size, - img_sp->src = file_off; - - file_off += sbuf.st_size; -- cont_img_count++; - break; - - case NEW_CONTAINER: -@@ -908,8 +905,6 @@ static int build_container(soc_type_t soc, uint32_t sector_size, - CONTAINER_ALIGNMENT, - CONTAINER_FLAGS_DEFAULT, - fuse_version); -- /* reset img count when moving to new container */ -- cont_img_count = 0; - scfw_flags = 0; - break; - -diff --git a/tools/iot2050-sign-fw.sh b/tools/iot2050-sign-fw.sh -new file mode 100755 -index 0000000000..4d1d79498c ---- /dev/null -+++ b/tools/iot2050-sign-fw.sh -@@ -0,0 +1,51 @@ -+#!/bin/sh -+ -+if [ -z "$1" ]; then -+ echo "Usage: $0 KEY" -+ exit 1 -+fi -+ -+TEMP_X509=$(mktemp XXXXXXXX.temp) -+ -+REVISION=${2:-0} -+SHA_VAL=$(openssl dgst -sha512 -hex tispl.bin | sed -e "s/^.*= //g") -+BIN_SIZE=$(stat -c %s tispl.bin) -+ -+cat <$TEMP_X509 -+[ req ] -+distinguished_name = req_distinguished_name -+x509_extensions = v3_ca -+prompt = no -+dirstring_type = nobmp -+ -+[ req_distinguished_name ] -+CN = IOT2050 Firmware Signature -+ -+[ v3_ca ] -+basicConstraints = CA:true -+1.3.6.1.4.1.294.1.3 = ASN1:SEQUENCE:swrv -+1.3.6.1.4.1.294.1.34 = ASN1:SEQUENCE:sysfw_image_integrity -+ -+[ swrv ] -+swrv = INTEGER:$REVISION -+ -+[ sysfw_image_integrity ] -+shaType = OID:2.16.840.1.101.3.4.2.3 -+shaValue = FORMAT:HEX,OCT:$SHA_VAL -+imageSize = INTEGER:$BIN_SIZE -+EOF -+ -+CERT_X509=$(mktemp XXXXXXXX.crt) -+ -+openssl req -new -x509 -key $1 -nodes -outform DER -out $CERT_X509 -config $TEMP_X509 -sha512 -+cat $CERT_X509 tispl.bin > tispl.bin_signed -+# currently broken in upstream -+#source/tools/binman/binman replace -i flash.bin -f tispl.bin_signed blob@0x180000 -+dd if=tispl.bin_signed of=flash.bin bs=$((0x1000)) seek=$((0x180000/0x1000)) conv=notrunc -+ -+rm $TEMP_X509 $CERT_X509 -+ -+tools/mkimage -G $1 -r -o sha256,rsa4096 -F fit@0x380000.fit -+# currently broken in upstream -+#source/tools/binman/binman replace -i flash.bin -f fit@0x380000.fit fit@0x380000 -+dd if=fit@0x380000.fit of=flash.bin bs=$((0x1000)) seek=$((0x380000/0x1000)) conv=notrunc -diff --git a/tools/key2dtsi.py b/tools/key2dtsi.py -new file mode 100755 -index 0000000000..1dbb2cc94b ---- /dev/null -+++ b/tools/key2dtsi.py -@@ -0,0 +1,64 @@ -+#!/usr/bin/env python3 -+# SPDX-License-Identifier: GPL-2.0-only -+# -+# Public key to dtsi converter. -+# -+# Copyright (c) Siemens AG, 2022 -+# -+ -+from argparse import ArgumentParser, FileType -+from os.path import basename, splitext -+from Cryptodome.PublicKey import RSA -+from Cryptodome.Util.number import inverse -+ -+def int_to_bytestr(n, length=None): -+ if not length: -+ length = (n.bit_length() + 7) // 8 -+ byte_array = n.to_bytes(length, 'big') -+ return ' '.join(['{:02x}'.format(byte) for byte in byte_array]) -+ -+ap = ArgumentParser(description='Public key to dtsi converter') -+ -+ap.add_argument('--hash', '-H', default='sha256', -+ help='hash to be used with key (default: sha256)') -+ap.add_argument('--required-conf', '-c', action='store_true', -+ help='mark key required for configuration') -+ap.add_argument('--required-image', '-i', action='store_true', -+ help='mark key required for image') -+ap.add_argument('--spl', '-s', action='store_true', -+ help='mark key for usage in SPL') -+ap.add_argument('key_file', metavar='KEY_FILE', type=FileType('r'), -+ help='key file (formats: X.509, PKCS#1, OpenSSH)') -+ap.add_argument('dtsi_file', metavar='DTSI_FILE', type=FileType('w'), -+ help='dtsi output file') -+ -+args = ap.parse_args() -+ -+key_name, _ = splitext(basename(args.key_file.name)) -+ -+key_data = args.key_file.read() -+key = RSA.importKey(key_data) -+ -+r_squared = (2**key.size_in_bits())**2 % key.n -+n0_inverse = 2**32 - inverse(key.n, 2**32) -+ -+out = args.dtsi_file -+out.write('/ {\n') -+out.write('\tsignature {\n') -+out.write('\t\tkey-{} {{\n'.format(key_name)) -+out.write('\t\t\tkey-name-hint = "{}";\n'.format(key_name)) -+out.write('\t\t\talgo = "{},rsa{}";\n'.format(args.hash, key.size_in_bits())) -+out.write('\t\t\trsa,num-bits = <{}>;\n'.format(key.size_in_bits())) -+out.write('\t\t\trsa,modulus = [{}];\n'.format(int_to_bytestr(key.n))) -+out.write('\t\t\trsa,exponent = [{}];\n'.format(int_to_bytestr(key.e, 8))) -+out.write('\t\t\trsa,r-squared = [{}];\n'.format(int_to_bytestr(r_squared))) -+out.write('\t\t\trsa,n0-inverse = <0x{:x}>;\n'.format(n0_inverse)) -+if args.required_conf: -+ out.write('\t\t\trequired = "conf";\n') -+elif args.required_image: -+ out.write('\t\t\trequired = "image";\n') -+if args.spl: -+ out.write('\t\t\tu-boot,dm-spl;\n') -+out.write('\t\t};\n') -+out.write('\t};\n') -+out.write('};\n') -diff --git a/tools/kwbimage.c b/tools/kwbimage.c -index 6abb9f2d5c..177084adf8 100644 ---- a/tools/kwbimage.c -+++ b/tools/kwbimage.c -@@ -927,6 +927,71 @@ done: - return ret; - } - -+static int image_fill_xip_header(void *image, struct image_tool_params *params) -+{ -+ struct main_hdr_v1 *main_hdr = image; /* kwbimage v0 and v1 have same XIP members */ -+ int version = kwbimage_version(image); -+ uint32_t srcaddr = le32_to_cpu(main_hdr->srcaddr); -+ uint32_t startaddr = 0; -+ -+ if (main_hdr->blockid != IBR_HDR_SPI_ID) { -+ fprintf(stderr, "XIP is supported only for SPI images\n"); -+ return 0; -+ } -+ -+ if (version == 0 && -+ params->addr >= 0xE8000000 && params->addr < 0xEFFFFFFF && -+ params->ep >= 0xE8000000 && params->ep < 0xEFFFFFFF) { -+ /* Load and Execute address is in SPI address space (kwbimage v0) */ -+ startaddr = 0xE8000000; -+ } else if (version != 0 && -+ params->addr >= 0xD4000000 && params->addr < 0xD7FFFFFF && -+ params->ep >= 0xD4000000 && params->ep < 0xD7FFFFFF) { -+ /* Load and Execute address is in SPI address space (kwbimage v1) */ -+ startaddr = 0xD4000000; -+ } else if (version != 0 && -+ params->addr >= 0xD8000000 && params->addr < 0xDFFFFFFF && -+ params->ep >= 0xD8000000 && params->ep < 0xDFFFFFFF) { -+ /* Load and Execute address is in Device bus space (kwbimage v1) */ -+ startaddr = 0xD8000000; -+ } else if (params->addr != 0x0) { -+ /* Load address is non-zero */ -+ if (version == 0) -+ fprintf(stderr, "XIP Load Address or XIP Entry Point is not in SPI address space\n"); -+ else -+ fprintf(stderr, "XIP Load Address or XIP Entry Point is not in SPI nor in Device bus address space\n"); -+ return 0; -+ } -+ -+ /* -+ * For XIP destaddr must be set to 0xFFFFFFFF and -+ * execaddr relative to the start of XIP memory address space. -+ */ -+ main_hdr->destaddr = cpu_to_le32(0xFFFFFFFF); -+ -+ if (startaddr == 0) { -+ /* -+ * mkimage's --load-address 0x0 means that binary is Position -+ * Independent and in this case mkimage's --entry-point address -+ * is relative offset from beginning of the data part of image. -+ */ -+ main_hdr->execaddr = cpu_to_le32(srcaddr + params->ep); -+ } else { -+ /* The lowest possible load address is after the header at srcaddr. */ -+ if (params->addr - startaddr < srcaddr) { -+ fprintf(stderr, -+ "Invalid XIP Load Address 0x%08x.\n" -+ "The lowest address for this configuration is 0x%08x.\n", -+ params->addr, (unsigned)(startaddr + srcaddr)); -+ return 0; -+ } -+ main_hdr->srcaddr = cpu_to_le32(params->addr - startaddr); -+ main_hdr->execaddr = cpu_to_le32(params->ep - startaddr); -+ } -+ -+ return 1; -+} -+ - static size_t image_headersz_align(size_t headersz, uint8_t blockid) - { - /* -@@ -959,10 +1024,10 @@ static size_t image_headersz_v0(int *hasext) - *hasext = 1; - } - -- return image_headersz_align(headersz, image_get_bootfrom()); -+ return headersz; - } - --static void *image_create_v0(size_t *imagesz, struct image_tool_params *params, -+static void *image_create_v0(size_t *dataoff, struct image_tool_params *params, - int payloadsz) - { - struct image_cfg_element *e; -@@ -972,10 +1037,11 @@ static void *image_create_v0(size_t *imagesz, struct image_tool_params *params, - int has_ext = 0; - - /* -- * Calculate the size of the header and the size of the -+ * Calculate the size of the header and the offset of the - * payload - */ - headersz = image_headersz_v0(&has_ext); -+ *dataoff = image_headersz_align(headersz, image_get_bootfrom()); - - image = malloc(headersz); - if (!image) { -@@ -990,7 +1056,7 @@ static void *image_create_v0(size_t *imagesz, struct image_tool_params *params, - /* Fill in the main header */ - main_hdr->blocksize = - cpu_to_le32(payloadsz); -- main_hdr->srcaddr = cpu_to_le32(headersz); -+ main_hdr->srcaddr = cpu_to_le32(*dataoff); - main_hdr->ext = has_ext; - main_hdr->version = 0; - main_hdr->destaddr = cpu_to_le32(params->addr); -@@ -1009,31 +1075,26 @@ static void *image_create_v0(size_t *imagesz, struct image_tool_params *params, - e = image_find_option(IMAGE_CFG_NAND_BADBLK_LOCATION); - if (e) - main_hdr->nandbadblklocation = e->nandbadblklocation; -- main_hdr->checksum = image_checksum8(image, -- sizeof(struct main_hdr_v0)); - - /* -- * For SATA srcaddr is specified in number of sectors starting from -- * sector 0. The main header is stored at sector number 1. -+ * For SATA srcaddr is specified in number of sectors. - * This expects the sector size to be 512 bytes. -- * Header size is already aligned. - */ - if (main_hdr->blockid == IBR_HDR_SATA_ID) -- main_hdr->srcaddr = cpu_to_le32(headersz / 512 + 1); -- -- /* -- * For SDIO srcaddr is specified in number of sectors starting from -- * sector 0. The main header is stored at sector number 0. -- * This expects sector size to be 512 bytes. -- * Header size is already aligned. -- */ -- if (main_hdr->blockid == IBR_HDR_SDIO_ID) -- main_hdr->srcaddr = cpu_to_le32(headersz / 512); -+ main_hdr->srcaddr = cpu_to_le32(le32_to_cpu(main_hdr->srcaddr) / 512); - - /* For PCIe srcaddr is not used and must be set to 0xFFFFFFFF. */ - if (main_hdr->blockid == IBR_HDR_PEX_ID) - main_hdr->srcaddr = cpu_to_le32(0xFFFFFFFF); - -+ if (params->xflag) { -+ if (!image_fill_xip_header(main_hdr, params)) { -+ free(image); -+ return NULL; -+ } -+ *dataoff = le32_to_cpu(main_hdr->srcaddr); -+ } -+ - /* Generate the ext header */ - if (has_ext) { - struct ext_hdr_v0 *ext_hdr; -@@ -1059,7 +1120,9 @@ static void *image_create_v0(size_t *imagesz, struct image_tool_params *params, - sizeof(struct ext_hdr_v0)); - } - -- *imagesz = headersz; -+ main_hdr->checksum = image_checksum8(image, -+ sizeof(struct main_hdr_v0)); -+ - return image; - } - -@@ -1073,10 +1136,6 @@ static size_t image_headersz_v1(int *hasext) - int cfgi; - int ret; - -- /* -- * Calculate the size of the header and the size of the -- * payload -- */ - headersz = sizeof(struct main_hdr_v1); - - if (image_get_csk_index() >= 0) { -@@ -1172,7 +1231,17 @@ static size_t image_headersz_v1(int *hasext) - if (count > 0) - headersz += sizeof(struct register_set_hdr_v1) + 8 * count + 4; - -- return image_headersz_align(headersz, image_get_bootfrom()); -+ /* -+ * For all images except UART, headersz stored in header itself should -+ * contains header size without padding. For UART image BootROM rounds -+ * down headersz to multiply of 128 bytes. Therefore align UART headersz -+ * to multiply of 128 bytes to ensure that remaining UART header bytes -+ * are not ignored by BootROM. -+ */ -+ if (image_get_bootfrom() == IBR_HDR_UART_ID) -+ headersz = ALIGN(headersz, 128); -+ -+ return headersz; - } - - static int add_binary_header_v1(uint8_t **cur, uint8_t **next_ext, -@@ -1331,16 +1400,14 @@ static int kwb_sign_csk_with_kak(struct image_tool_params *params, - return 0; - } - --static int add_secure_header_v1(struct image_tool_params *params, uint8_t *ptr, -- int payloadsz, size_t headersz, uint8_t *image, -+static int add_secure_header_v1(struct image_tool_params *params, uint8_t *image_ptr, -+ size_t image_size, uint8_t *header_ptr, size_t headersz, - struct secure_hdr_v1 *secure_hdr) - { - struct image_cfg_element *e_jtagdelay; - struct image_cfg_element *e_boxid; - struct image_cfg_element *e_flashid; - RSA *csk = NULL; -- unsigned char *image_ptr; -- size_t image_size; - struct sig_v1 tmp_sig; - bool specialized_img = image_get_spezialized_img(); - -@@ -1366,14 +1433,11 @@ static int add_secure_header_v1(struct image_tool_params *params, uint8_t *ptr, - if (kwb_sign_csk_with_kak(params, secure_hdr, csk)) - return 1; - -- image_ptr = ptr + headersz; -- image_size = payloadsz - headersz; -- -- if (kwb_sign_and_verify(csk, image_ptr, image_size, -+ if (kwb_sign_and_verify(csk, image_ptr, image_size - 4, - &secure_hdr->imgsig, "image") < 0) - return 1; - -- if (kwb_sign_and_verify(csk, image, headersz, &tmp_sig, "header") < 0) -+ if (kwb_sign_and_verify(csk, header_ptr, headersz, &tmp_sig, "header") < 0) - return 1; - - secure_hdr->hdrsig = tmp_sig; -@@ -1399,12 +1463,11 @@ static void finish_register_set_header_v1(uint8_t **cur, uint8_t **next_ext, - *datai = 0; - } - --static void *image_create_v1(size_t *imagesz, struct image_tool_params *params, -+static void *image_create_v1(size_t *dataoff, struct image_tool_params *params, - uint8_t *ptr, int payloadsz) - { - struct image_cfg_element *e; - struct main_hdr_v1 *main_hdr; -- struct opt_hdr_v1 *ohdr; - struct register_set_hdr_v1 *register_set_hdr; - struct secure_hdr_v1 *secure_hdr = NULL; - size_t headersz; -@@ -1415,12 +1478,13 @@ static void *image_create_v1(size_t *imagesz, struct image_tool_params *params, - uint8_t delay; - - /* -- * Calculate the size of the header and the size of the -+ * Calculate the size of the header and the offset of the - * payload - */ - headersz = image_headersz_v1(&hasext); - if (headersz == 0) - return NULL; -+ *dataoff = image_headersz_align(headersz, image_get_bootfrom()); - - image = malloc(headersz); - if (!image) { -@@ -1442,7 +1506,7 @@ static void *image_create_v1(size_t *imagesz, struct image_tool_params *params, - main_hdr->headersz_msb = (headersz & 0xFFFF0000) >> 16; - main_hdr->destaddr = cpu_to_le32(params->addr); - main_hdr->execaddr = cpu_to_le32(params->ep); -- main_hdr->srcaddr = cpu_to_le32(headersz); -+ main_hdr->srcaddr = cpu_to_le32(*dataoff); - main_hdr->ext = hasext; - main_hdr->version = 1; - main_hdr->blockid = image_get_bootfrom(); -@@ -1470,27 +1534,24 @@ static void *image_create_v1(size_t *imagesz, struct image_tool_params *params, - main_hdr->flags = e->debug ? 0x1 : 0; - - /* -- * For SATA srcaddr is specified in number of sectors starting from -- * sector 0. The main header is stored at sector number 1. -+ * For SATA srcaddr is specified in number of sectors. - * This expects the sector size to be 512 bytes. -- * Header size is already aligned. - */ - if (main_hdr->blockid == IBR_HDR_SATA_ID) -- main_hdr->srcaddr = cpu_to_le32(headersz / 512 + 1); -- -- /* -- * For SDIO srcaddr is specified in number of sectors starting from -- * sector 0. The main header is stored at sector number 0. -- * This expects sector size to be 512 bytes. -- * Header size is already aligned. -- */ -- if (main_hdr->blockid == IBR_HDR_SDIO_ID) -- main_hdr->srcaddr = cpu_to_le32(headersz / 512); -+ main_hdr->srcaddr = cpu_to_le32(le32_to_cpu(main_hdr->srcaddr) / 512); - - /* For PCIe srcaddr is not used and must be set to 0xFFFFFFFF. */ - if (main_hdr->blockid == IBR_HDR_PEX_ID) - main_hdr->srcaddr = cpu_to_le32(0xFFFFFFFF); - -+ if (params->xflag) { -+ if (!image_fill_xip_header(main_hdr, params)) { -+ free(image); -+ return NULL; -+ } -+ *dataoff = le32_to_cpu(main_hdr->srcaddr); -+ } -+ - if (image_get_csk_index() >= 0) { - /* - * only reserve the space here; we fill the header later since -@@ -1552,19 +1613,10 @@ static void *image_create_v1(size_t *imagesz, struct image_tool_params *params, - &datai, delay); - } - -- if (secure_hdr && add_secure_header_v1(params, ptr, payloadsz + headersz, -- headersz, image, secure_hdr)) -+ if (secure_hdr && add_secure_header_v1(params, ptr + *dataoff, payloadsz, -+ image, headersz, secure_hdr)) - return NULL; - -- *imagesz = headersz; -- -- /* Fill the real header size without padding into the main header */ -- headersz = sizeof(*main_hdr); -- for_each_opt_hdr_v1 (ohdr, main_hdr) -- headersz += opt_hdr_v1_size(ohdr); -- main_hdr->headersz_lsb = cpu_to_le16(headersz & 0xFFFF); -- main_hdr->headersz_msb = (headersz & 0xFFFF0000) >> 16; -- - /* Calculate and set the header checksum */ - main_hdr->checksum = image_checksum8(main_hdr, headersz); - -@@ -1835,7 +1887,7 @@ static void kwbimage_set_header(void *ptr, struct stat *sbuf, int ifd, - FILE *fcfg; - void *image = NULL; - int version; -- size_t headersz = 0; -+ size_t dataoff = 0; - size_t datasz; - uint32_t checksum; - struct stat s; -@@ -1845,7 +1897,9 @@ static void kwbimage_set_header(void *ptr, struct stat *sbuf, int ifd, - * Do not use sbuf->st_size as it contains size with padding. - * We need original image data size, so stat original file. - */ -- if (stat(params->datafile, &s)) { -+ if (params->skipcpy) { -+ s.st_size = 0; -+ } else if (stat(params->datafile, &s)) { - fprintf(stderr, "Could not stat data file %s: %s\n", - params->datafile, strerror(errno)); - exit(EXIT_FAILURE); -@@ -1886,11 +1940,11 @@ static void kwbimage_set_header(void *ptr, struct stat *sbuf, int ifd, - */ - case -1: - case 0: -- image = image_create_v0(&headersz, params, datasz + 4); -+ image = image_create_v0(&dataoff, params, datasz + 4); - break; - - case 1: -- image = image_create_v1(&headersz, params, ptr, datasz + 4); -+ image = image_create_v1(&dataoff, params, ptr, datasz + 4); - break; - - default: -@@ -1908,12 +1962,12 @@ static void kwbimage_set_header(void *ptr, struct stat *sbuf, int ifd, - free(image_cfg); - - /* Build and add image data checksum */ -- checksum = cpu_to_le32(image_checksum32((uint8_t *)ptr + headersz, -+ checksum = cpu_to_le32(image_checksum32((uint8_t *)ptr + dataoff, - datasz)); -- memcpy((uint8_t *)ptr + headersz + datasz, &checksum, sizeof(uint32_t)); -+ memcpy((uint8_t *)ptr + dataoff + datasz, &checksum, sizeof(uint32_t)); - - /* Finally copy the header into the image area */ -- memcpy(ptr, image, headersz); -+ memcpy(ptr, image, kwbheader_size(image)); - - free(image); - } -@@ -1933,9 +1987,9 @@ static void kwbimage_print_header(const void *ptr) - printf("BIN Img Size: "); - genimg_print_size(opt_hdr_v1_size(ohdr) - 12 - - 4 * ohdr->data[0]); -- printf("BIN Img Offs: %08x\n", -- (unsigned)((uint8_t *)ohdr - (uint8_t *)mhdr) + -- 8 + 4 * ohdr->data[0]); -+ printf("BIN Img Offs: "); -+ genimg_print_size(((uint8_t *)ohdr - (uint8_t *)mhdr) + -+ 8 + 4 * ohdr->data[0]); - } - } - -@@ -1947,9 +2001,20 @@ static void kwbimage_print_header(const void *ptr) - } - - printf("Data Size: "); -- genimg_print_size(mhdr->blocksize - sizeof(uint32_t)); -- printf("Load Address: %08x\n", mhdr->destaddr); -- printf("Entry Point: %08x\n", mhdr->execaddr); -+ genimg_print_size(le32_to_cpu(mhdr->blocksize) - sizeof(uint32_t)); -+ printf("Data Offset: "); -+ if (mhdr->blockid == IBR_HDR_SATA_ID) -+ printf("%u Sector%s (LBA)\n", le32_to_cpu(mhdr->srcaddr), -+ le32_to_cpu(mhdr->srcaddr) != 1 ? "s" : ""); -+ else -+ genimg_print_size(le32_to_cpu(mhdr->srcaddr)); -+ if (mhdr->blockid == IBR_HDR_SPI_ID && le32_to_cpu(mhdr->destaddr) == 0xFFFFFFFF) { -+ printf("Load Address: XIP\n"); -+ printf("Execute Offs: %08x\n", le32_to_cpu(mhdr->execaddr)); -+ } else { -+ printf("Load Address: %08x\n", le32_to_cpu(mhdr->destaddr)); -+ printf("Entry Point: %08x\n", le32_to_cpu(mhdr->execaddr)); -+ } - } - - static int kwbimage_check_image_types(uint8_t type) -@@ -2028,23 +2093,9 @@ static int kwbimage_verify_header(unsigned char *ptr, int image_size, - - /* - * For SATA srcaddr is specified in number of sectors. -- * The main header is must be stored at sector number 1. -- * This expects that sector size is 512 bytes and recalculates -- * data offset to bytes relative to the main header. -+ * This expects that sector size is 512 bytes. - */ -- if (blockid == IBR_HDR_SATA_ID) { -- if (offset < 1) -- return -FDT_ERR_BADSTRUCTURE; -- offset -= 1; -- offset *= 512; -- } -- -- /* -- * For SDIO srcaddr is specified in number of sectors. -- * This expects that sector size is 512 bytes and recalculates -- * data offset to bytes. -- */ -- if (blockid == IBR_HDR_SDIO_ID) -+ if (blockid == IBR_HDR_SATA_ID) - offset *= 512; - - /* -@@ -2067,6 +2118,8 @@ static int kwbimage_verify_header(unsigned char *ptr, int image_size, - return 0; - } - -+static int kwbimage_align_size(int bootfrom, int alloc_len, struct stat s); -+ - static int kwbimage_generate(struct image_tool_params *params, - struct image_type_params *tparams) - { -@@ -2085,7 +2138,9 @@ static int kwbimage_generate(struct image_tool_params *params, - exit(EXIT_FAILURE); - } - -- if (stat(params->datafile, &s)) { -+ if (params->skipcpy) { -+ s.st_size = 0; -+ } else if (stat(params->datafile, &s)) { - fprintf(stderr, "Could not stat data file %s: %s\n", - params->datafile, strerror(errno)); - exit(EXIT_FAILURE); -@@ -2141,6 +2196,8 @@ static int kwbimage_generate(struct image_tool_params *params, - exit(EXIT_FAILURE); - } - -+ alloc_len = image_headersz_align(alloc_len, image_get_bootfrom()); -+ - free(image_cfg); - - hdr = malloc(alloc_len); -@@ -2154,6 +2211,22 @@ static int kwbimage_generate(struct image_tool_params *params, - tparams->header_size = alloc_len; - tparams->hdr = hdr; - -+ /* -+ * This function should return aligned size of the datafile. -+ * When skipcpy is set (datafile is skipped) then return value of this -+ * function is ignored, so we have to put required kwbimage aligning -+ * into the preallocated header size. -+ */ -+ if (params->skipcpy) { -+ tparams->header_size += kwbimage_align_size(bootfrom, alloc_len, s); -+ return 0; -+ } else { -+ return kwbimage_align_size(bootfrom, alloc_len, s); -+ } -+} -+ -+static int kwbimage_align_size(int bootfrom, int alloc_len, struct stat s) -+{ - /* - * The resulting image needs to be 4-byte aligned. At least - * the Marvell hdrparser tool complains if its unaligned. -@@ -2182,6 +2255,7 @@ static int kwbimage_generate_config(void *ptr, struct image_tool_params *params) - struct ext_hdr_v0 *ehdr0; - struct bin_hdr_v0 *bhdr0; - struct opt_hdr_v1 *ohdr; -+ int regset_count; - int params_count; - unsigned offset; - int is_v0_ext; -@@ -2215,12 +2289,18 @@ static int kwbimage_generate_config(void *ptr, struct image_tool_params *params) - fprintf(f, "NAND_ECC_MODE %s\n", image_nand_ecc_mode_name(mhdr0->nandeccmode)); - - if (mhdr->blockid == IBR_HDR_NAND_ID) -- fprintf(f, "NAND_PAGE_SIZE 0x%x\n", (unsigned)mhdr->nandpagesize); -+ fprintf(f, "NAND_PAGE_SIZE 0x%x\n", (unsigned)le16_to_cpu(mhdr->nandpagesize)); - -- if (version != 0 && mhdr->blockid == IBR_HDR_NAND_ID) -- fprintf(f, "NAND_BLKSZ 0x%x\n", (unsigned)mhdr->nandblocksize); -+ if (mhdr->blockid == IBR_HDR_NAND_ID && (version != 0 || is_v0_ext || mhdr->nandblocksize != 0)) { -+ if (mhdr->nandblocksize != 0) /* block size explicitly set in 64 kB unit */ -+ fprintf(f, "NAND_BLKSZ 0x%x\n", (unsigned)mhdr->nandblocksize * 64*1024); -+ else if (le16_to_cpu(mhdr->nandpagesize) > 512) -+ fprintf(f, "NAND_BLKSZ 0x10000\n"); /* large page NAND flash = 64 kB block size */ -+ else -+ fprintf(f, "NAND_BLKSZ 0x4000\n"); /* small page NAND flash = 16 kB block size */ -+ } - -- if (mhdr->blockid == IBR_HDR_NAND_ID && (mhdr->nandbadblklocation != 0 || is_v0_ext)) -+ if (mhdr->blockid == IBR_HDR_NAND_ID && (version != 0 || is_v0_ext)) - fprintf(f, "NAND_BADBLK_LOCATION 0x%x\n", (unsigned)mhdr->nandbadblklocation); - - if (version == 0 && mhdr->blockid == IBR_HDR_SATA_ID) -@@ -2266,18 +2346,20 @@ static int kwbimage_generate_config(void *ptr, struct image_tool_params *params) - cur_idx++; - } else if (ohdr->headertype == OPT_HDR_V1_REGISTER_TYPE) { - regset_hdr = (struct register_set_hdr_v1 *)ohdr; -- for (i = 0; -- i < opt_hdr_v1_size(ohdr) - sizeof(struct opt_hdr_v1) - -- sizeof(regset_hdr->data[0].last_entry); -- i++) -+ if (opt_hdr_v1_size(ohdr) > sizeof(*ohdr)) -+ regset_count = (opt_hdr_v1_size(ohdr) - sizeof(*ohdr)) / -+ sizeof(regset_hdr->data[0].entry); -+ else -+ regset_count = 0; -+ for (i = 0; i < regset_count; i++) - fprintf(f, "DATA 0x%08x 0x%08x\n", - le32_to_cpu(regset_hdr->data[i].entry.address), - le32_to_cpu(regset_hdr->data[i].entry.value)); -- if (opt_hdr_v1_size(ohdr) - sizeof(struct opt_hdr_v1) >= -- sizeof(regset_hdr->data[0].last_entry)) { -- if (regset_hdr->data[0].last_entry.delay) -+ if (regset_count > 0) { -+ if (regset_hdr->data[regset_count-1].last_entry.delay != -+ REGISTER_SET_HDR_OPT_DELAY_SDRAM_SETUP) - fprintf(f, "DATA_DELAY %u\n", -- (unsigned)regset_hdr->data[0].last_entry.delay); -+ (unsigned)regset_hdr->data[regset_count-1].last_entry.delay); - else - fprintf(f, "DATA_DELAY SDRAM_SETUP\n"); - } -@@ -2403,12 +2485,7 @@ static int kwbimage_extract_subimage(void *ptr, struct image_tool_params *params - /* Extract data image when -p is not specified or when '-p 0' is specified */ - offset = le32_to_cpu(mhdr->srcaddr); - -- if (mhdr->blockid == IBR_HDR_SATA_ID) { -- offset -= 1; -- offset *= 512; -- } -- -- if (mhdr->blockid == IBR_HDR_SDIO_ID) -+ if (mhdr->blockid == IBR_HDR_SATA_ID) - offset *= 512; - - if (mhdr->blockid == IBR_HDR_PEX_ID && offset == 0xFFFFFFFF) -@@ -2455,9 +2532,6 @@ static int kwbimage_extract_subimage(void *ptr, struct image_tool_params *params - return imagetool_save_subimage(params->outfile, image, size); - } - --/* -- * Report Error if xflag is set in addition to default -- */ - static int kwbimage_check_params(struct image_tool_params *params) - { - if (!params->lflag && !params->iflag && !params->pflag && -@@ -2468,10 +2542,9 @@ static int kwbimage_check_params(struct image_tool_params *params) - return 1; - } - -- return (params->dflag && (params->fflag || params->lflag)) || -- (params->fflag && (params->dflag || params->lflag)) || -- (params->lflag && (params->dflag || params->fflag)) || -- (params->xflag); -+ return (params->dflag && (params->fflag || params->lflag || params->skipcpy)) || -+ (params->fflag) || -+ (params->lflag && (params->dflag || params->fflag)); - } - - /* -diff --git a/tools/kwboot.c b/tools/kwboot.c -index da4fe32da2..348a3203d6 100644 ---- a/tools/kwboot.c -+++ b/tools/kwboot.c -@@ -15,6 +15,12 @@ - * Processor, and High-Definition Video Decoder: Functional Specifications" - * August 3, 2011. Chapter 5 "BootROM Firmware" - * https://web.archive.org/web/20120130172443/https://www.marvell.com/application-processors/armada-500/assets/Armada-510-Functional-Spec.pdf -+ * - "88F6665, 88F6660, 88F6658, 88F6655, 88F6655F, 88F6650, 88F6650F, 88F6610, -+ * and 88F6610F Avanta LP Family Integrated Single/Dual CPU Ecosystem for -+ * Gateway (GW), Home Gateway Unit (HGU), and Single Family Unit (SFU) -+ * Functional Specifications" Doc. No. MV-S108952-00, Rev. A. November 7, 2013. -+ * Chapter 7 "Boot Flow" -+ * CONFIDENTIAL, no public documentation available - * - "88F6710, 88F6707, and 88F6W11: ARMADA(R) 370 SoC: Functional Specifications" - * May 26, 2014. Chapter 6 "BootROM Firmware". - * https://web.archive.org/web/20140617183701/https://www.marvell.com/embedded-processors/armada-300/assets/ARMADA370-FunctionalSpec-datasheet.pdf -@@ -22,6 +28,15 @@ - * Multi-Core ARMv7 Based SoC Processors: Functional Specifications" - * May 29, 2014. Chapter 6 "BootROM Firmware". - * https://web.archive.org/web/20180829171131/https://www.marvell.com/embedded-processors/armada-xp/assets/ARMADA-XP-Functional-SpecDatasheet.pdf -+ * - "BobCat2 Control and Management Subsystem Functional Specifications" -+ * Doc. No. MV-S109400-00, Rev. A. December 4, 2014. -+ * Chapter 1.6 BootROM Firmware -+ * CONFIDENTIAL, no public documentation available -+ * - "AlleyCat3 and PONCat3 Highly Integrated 1/10 Gigabit Ethernet Switch -+ * Control and Management Subsystem: Functional Specifications" -+ * Doc. No. MV-S109693-00, Rev. A. May 20, 2014. -+ * Chapter 1.6 BootROM Firmware -+ * CONFIDENTIAL, no public documentation available - * - "ARMADA(R) 375 Value-Performance Dual Core CPU System on Chip: Functional - * Specifications" Doc. No. MV-S109377-00, Rev. A. September 18, 2013. - * Chapter 7 "Boot Sequence" -@@ -35,6 +50,85 @@ - * System on Chip Functional Specifications" Doc. No. MV-S109896-00, Rev. B. - * December 22, 2015. Chapter 7 "Boot Flow" - * CONFIDENTIAL, no public documentation available -+ * - "Marvell boot image parser", Marvell U-Boot 2013.01, version 18.06. September 17, 2015. -+ * https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/blob/u-boot-2013.01-armada-18.06/tools/marvell/doimage_mv/hdrparser.c -+ * - "Marvell doimage Tool", Marvell U-Boot 2013.01, version 18.06. August 30, 2015. -+ * https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/blob/u-boot-2013.01-armada-18.06/tools/marvell/doimage_mv/doimage.c -+ * -+ * Storage location / offset of different image types: -+ * - IBR_HDR_SPI_ID (0x5A): -+ * SPI image can be stored at any 2 MB aligned offset in the first 16 MB of -+ * SPI-NOR or parallel-NOR. Despite the type name it really can be stored on -+ * parallel-NOR and cannot be stored on other SPI devices, like SPI-NAND. -+ * So it should have been named NOR image, not SPI image. This image type -+ * supports XIP - Execute In Place directly from NOR memory. Destination -+ * address of the XIP image is set to 0xFFFFFFFF and execute address to the -+ * absolute offset in bytes from the beginning of NOR memory. -+ * -+ * - IBR_HDR_NAND_ID (0x8B): -+ * NAND image can be stored either at any 2 MB aligned offset in the first -+ * 16 MB of SPI-NAND or at any blocksize aligned offset in the first 64 MB -+ * of parallel-NAND. -+ * -+ * - IBR_HDR_PEX_ID (0x9C): -+ * PEX image is used for booting from PCI Express device. Source address -+ * stored in image is ignored by BootROM. It is not the BootROM who parses -+ * or loads data part of the PEX image. BootROM just configures SoC to the -+ * PCIe endpoint mode and let the PCIe device on the other end of the PCIe -+ * link (which must be in Root Complex mode) to load kwbimage into SoC's -+ * memory and tell BootROM physical address. -+ * -+ * - IBR_HDR_UART_ID (0x69): -+ * UART image can be transfered via xmodem protocol over first UART. -+ * Unlike all other image types, header size stored in the image must be -+ * multiply of the 128 bytes (for all other image types it can be any size) -+ * and data part of the image does not have to contain 32-bit checksum -+ * (all other image types must have valid 32-bit checksum in its data part). -+ * And data size stored in the image is ignored. A38x BootROM determinates -+ * size of the data part implicitly by the end of the xmodem transfer. -+ * A38x BootROM has a bug which cause that BootROM loads data part of UART -+ * image into RAM target address increased by one byte when source address -+ * and header size stored in the image header are not same. So UART image -+ * should be constructed in a way that there is no gap between header and -+ * data part. -+ * -+ * - IBR_HDR_I2C_ID (0x4D): -+ * It is unknown for what kind of storage is used this image. It is not -+ * specified in any document from References section. -+ * -+ * - IBR_HDR_SATA_ID (0x78): -+ * SATA image can be stored at sector 1 (after the MBR table), sector 34 -+ * (after the GPT table) or at any next sector which is aligned to 2 MB and -+ * is in the first 16 MB of SATA disk. Note that source address in SATA image -+ * is stored in sector unit and not in bytes like for any other images. -+ * Unfortunately sector size is disk specific, in most cases it is 512 bytes -+ * but there are also Native 4K SATA disks which have 4096 bytes long sectors. -+ * -+ * - IBR_HDR_SDIO_ID (0xAE): -+ * SDIO image can be stored on different medias: -+ * - SD(SC) card -+ * - SDHC/SDXC card -+ * - eMMC HW boot partition -+ * - eMMC user data partition / MMC card -+ * It cannot be stored on SDIO card despite the image name. -+ * -+ * For SD(SC)/SDHC/SDXC cards, image can be stored at the same locations as -+ * the SATA image (sector 1, sector 34 or any 2 MB aligned sector) but within -+ * the first 64 MB. SDHC and SDXC cards have fixed 512 bytes long sector size. -+ * Old SD(SC) cards unfortunately can have also different sector sizes, mostly -+ * 1024 bytes long sector sizes and also can be changed at runtime. -+ * -+ * For MMC-compatible devices, image can be stored at offset 0 or at offset -+ * 2 MB. If MMC device supports HW boot partitions then image must be stored -+ * on the HW partition as is configured in the EXT_CSC register (it can be -+ * either boot or user data). -+ * -+ * Note that source address for SDIO image is stored in byte unit, like for -+ * any other images (except SATA). Marvell Functional Specifications for -+ * A38x and A39x SoCs say that source address is in sector units, but this -+ * is purely incorrect information. A385 BootROM really expects source address -+ * for SDIO images in bytes and also Marvell tools generate SDIO image with -+ * source address in byte units. - */ - - #include "kwbimage.h" -@@ -1374,6 +1468,8 @@ kwboot_xmodem(int tty, const void *_img, size_t size, int baudrate) - * followed by the header. So align header size to xmodem block size. - */ - hdrsz += (KWBOOT_XM_BLKSZ - hdrsz % KWBOOT_XM_BLKSZ) % KWBOOT_XM_BLKSZ; -+ if (hdrsz > size) -+ hdrsz = size; - - pnum = 1; - -@@ -1699,6 +1795,47 @@ kwboot_img_is_secure(void *img) - return 0; - } - -+static int -+kwboot_img_has_ddr_init(void *img) -+{ -+ const struct register_set_hdr_v1 *rhdr; -+ const struct main_hdr_v0 *hdr0; -+ struct opt_hdr_v1 *ohdr; -+ u32 ohdrsz; -+ int last; -+ -+ /* -+ * kwbimage v0 image headers contain DDR init code either in -+ * extension header or in binary code header. -+ */ -+ if (kwbimage_version(img) == 0) { -+ hdr0 = img; -+ return hdr0->ext || hdr0->bin; -+ } -+ -+ /* -+ * kwbimage v1 image headers contain DDR init code either in binary -+ * code header or in a register set list header with SDRAM_SETUP. -+ */ -+ for_each_opt_hdr_v1 (ohdr, img) { -+ if (ohdr->headertype == OPT_HDR_V1_BINARY_TYPE) -+ return 1; -+ if (ohdr->headertype == OPT_HDR_V1_REGISTER_TYPE) { -+ rhdr = (const struct register_set_hdr_v1 *)ohdr; -+ ohdrsz = opt_hdr_v1_size(ohdr); -+ if (ohdrsz >= sizeof(*ohdr) + sizeof(rhdr->data[0].last_entry)) { -+ ohdrsz -= sizeof(*ohdr) + sizeof(rhdr->data[0].last_entry); -+ last = ohdrsz / sizeof(rhdr->data[0].entry); -+ if (rhdr->data[last].last_entry.delay == -+ REGISTER_SET_HDR_OPT_DELAY_SDRAM_SETUP) -+ return 1; -+ } -+ } -+ } -+ -+ return 0; -+} -+ - static void * - kwboot_img_grow_data_right(void *img, size_t *size, size_t grow) - { -@@ -1854,10 +1991,26 @@ _inject_baudrate_change_code(void *img, size_t *size, int for_data, - } - } - -+static const char * -+kwboot_img_type(uint8_t blockid) -+{ -+ switch (blockid) { -+ case IBR_HDR_I2C_ID: return "I2C"; -+ case IBR_HDR_SPI_ID: return "SPI"; -+ case IBR_HDR_NAND_ID: return "NAND"; -+ case IBR_HDR_SATA_ID: return "SATA"; -+ case IBR_HDR_PEX_ID: return "PEX"; -+ case IBR_HDR_UART_ID: return "UART"; -+ case IBR_HDR_SDIO_ID: return "SDIO"; -+ default: return "unknown"; -+ } -+} -+ - static int - kwboot_img_patch(void *img, size_t *size, int baudrate) - { - struct main_hdr_v1 *hdr; -+ struct opt_hdr_v1 *ohdr; - uint32_t srcaddr; - uint8_t csum; - size_t hdrsz; -@@ -1866,8 +2019,10 @@ kwboot_img_patch(void *img, size_t *size, int baudrate) - - hdr = img; - -- if (*size < sizeof(struct main_hdr_v1)) -+ if (*size < sizeof(struct main_hdr_v1)) { -+ fprintf(stderr, "Invalid image header size\n"); - goto err; -+ } - - image_ver = kwbimage_version(img); - if (image_ver != 0 && image_ver != 1) { -@@ -1877,24 +2032,23 @@ kwboot_img_patch(void *img, size_t *size, int baudrate) - - hdrsz = kwbheader_size(hdr); - -- if (*size < hdrsz) -+ if (*size < hdrsz) { -+ fprintf(stderr, "Invalid image header size\n"); - goto err; -+ } -+ -+ kwboot_printv("Detected kwbimage v%d with %s boot signature\n", image_ver, kwboot_img_type(hdr->blockid)); - - csum = kwboot_hdr_csum8(hdr) - hdr->checksum; -- if (csum != hdr->checksum) -+ if (csum != hdr->checksum) { -+ fprintf(stderr, "Image has invalid header checksum stored in image header\n"); - goto err; -+ } - - srcaddr = le32_to_cpu(hdr->srcaddr); - - switch (hdr->blockid) { - case IBR_HDR_SATA_ID: -- if (srcaddr < 1) -- goto err; -- -- hdr->srcaddr = cpu_to_le32((srcaddr - 1) * 512); -- break; -- -- case IBR_HDR_SDIO_ID: - hdr->srcaddr = cpu_to_le32(srcaddr * 512); - break; - -@@ -1906,18 +2060,50 @@ kwboot_img_patch(void *img, size_t *size, int baudrate) - case IBR_HDR_SPI_ID: - if (hdr->destaddr == cpu_to_le32(0xFFFFFFFF)) { - kwboot_printv("Patching destination and execution addresses from SPI/NOR XIP area to DDR area 0x00800000\n"); -- hdr->destaddr = cpu_to_le32(0x00800000); -- hdr->execaddr = cpu_to_le32(0x00800000); -+ hdr->destaddr = cpu_to_le32(0x00800000 + le32_to_cpu(hdr->srcaddr)); -+ hdr->execaddr = cpu_to_le32(0x00800000 + le32_to_cpu(hdr->execaddr)); - } - break; - } - -- if (hdrsz > le32_to_cpu(hdr->srcaddr) || -- *size < le32_to_cpu(hdr->srcaddr) + le32_to_cpu(hdr->blocksize)) -+ if (hdrsz > le32_to_cpu(hdr->srcaddr)) { -+ fprintf(stderr, "Image has invalid data offset stored in image header\n"); -+ goto err; -+ } -+ -+ if (*size < le32_to_cpu(hdr->srcaddr) + le32_to_cpu(hdr->blocksize)) { -+ fprintf(stderr, "Image has invalid data size stored in image header\n"); - goto err; -+ } -+ -+ for_each_opt_hdr_v1 (ohdr, hdr) { -+ if (!opt_hdr_v1_valid_size(ohdr, (const uint8_t *)hdr + hdrsz)) { -+ fprintf(stderr, "Invalid optional image header\n"); -+ goto err; -+ } -+ } -+ -+ /* -+ * The 32-bit data checksum is optional for UART image. If it is not -+ * present (checksum detected as invalid) then grow data part of the -+ * image for the checksum, so it can be inserted there. -+ */ -+ if (kwboot_img_csum32(img) != *kwboot_img_csum32_ptr(img)) { -+ if (hdr->blockid != IBR_HDR_UART_ID) { -+ fprintf(stderr, "Image has invalid data checksum\n"); -+ goto err; -+ } -+ kwboot_img_grow_data_right(img, size, sizeof(uint32_t)); -+ /* Update the 32-bit data checksum */ -+ *kwboot_img_csum32_ptr(img) = kwboot_img_csum32(img); -+ } - -- if (kwboot_img_csum32(img) != *kwboot_img_csum32_ptr(img)) -+ if (!kwboot_img_has_ddr_init(img) && -+ (le32_to_cpu(hdr->destaddr) < 0x40000000 || -+ le32_to_cpu(hdr->destaddr) + le32_to_cpu(hdr->blocksize) > 0x40034000)) { -+ fprintf(stderr, "Image does not contain DDR init code needed for UART booting\n"); - goto err; -+ } - - is_secure = kwboot_img_is_secure(img); - -@@ -1999,6 +2185,29 @@ kwboot_img_patch(void *img, size_t *size, int baudrate) - - kwboot_printv("Aligning image header to Xmodem block size\n"); - kwboot_img_grow_hdr(img, size, grow); -+ hdrsz += grow; -+ -+ /* -+ * kwbimage v1 contains header size field and for UART type it -+ * must be set to the aligned xmodem header size because BootROM -+ * rounds header size down to xmodem block size. -+ */ -+ if (kwbimage_version(img) == 1) { -+ hdr->headersz_msb = hdrsz >> 16; -+ hdr->headersz_lsb = cpu_to_le16(hdrsz & 0xffff); -+ } -+ } -+ -+ /* Header size and source address must be same for UART type due to A38x BootROM bug */ -+ if (hdrsz != le32_to_cpu(hdr->srcaddr)) { -+ if (is_secure) { -+ fprintf(stderr, "Cannot align image with secure header\n"); -+ goto err; -+ } -+ -+ kwboot_printv("Removing gap between image header and data\n"); -+ memmove(img + hdrsz, img + le32_to_cpu(hdr->srcaddr), le32_to_cpu(hdr->blocksize)); -+ hdr->srcaddr = cpu_to_le32(hdrsz); - } - - hdr->checksum = kwboot_hdr_csum8(hdr) - csum; -@@ -2182,6 +2391,7 @@ main(int argc, char **argv) - KWBOOT_XM_BLKSZ + - sizeof(kwboot_baud_code) + - sizeof(kwboot_baud_code_data_jump) + -+ sizeof(uint32_t) + - KWBOOT_XM_BLKSZ; - - if (imgpath) { -diff --git a/tools/mkimage.c b/tools/mkimage.c -index af7b0e09b3..a92d9d5ca5 100644 ---- a/tools/mkimage.c -+++ b/tools/mkimage.c -@@ -599,7 +599,12 @@ int main(int argc, char **argv) - exit (retval); - } - -- if ((params.type != IH_TYPE_MULTI) && (params.type != IH_TYPE_SCRIPT)) { -+ if (!params.skipcpy && params.type != IH_TYPE_MULTI && params.type != IH_TYPE_SCRIPT) { -+ if (!params.datafile) { -+ fprintf(stderr, "%s: Option -d with image data file was not specified\n", -+ params.cmdname); -+ exit(EXIT_FAILURE); -+ } - dfd = open(params.datafile, O_RDONLY | O_BINARY); - if (dfd < 0) { - fprintf(stderr, "%s: Can't open %s: %s\n", -@@ -860,7 +865,9 @@ copy_file (int ifd, const char *datafile, int pad) - exit (EXIT_FAILURE); - } - -- if (params.xflag) { -+ if (params.xflag && -+ (((params.type > IH_TYPE_INVALID) && (params.type < IH_TYPE_FLATDT)) || -+ (params.type == IH_TYPE_KERNEL_NOLOAD) || (params.type == IH_TYPE_FIRMWARE_IVT))) { - unsigned char *p = NULL; - /* - * XIP: do not append the struct legacy_img_hdr at the -diff --git a/tools/patman/__init__.py b/tools/patman/__init__.py -index 1b98ec7fee..08eeffdf6d 100644 ---- a/tools/patman/__init__.py -+++ b/tools/patman/__init__.py -@@ -1,6 +1,5 @@ - # SPDX-License-Identifier: GPL-2.0+ - --__all__ = ['checkpatch', 'command', 'commit', 'control', 'cros_subprocess', -- 'func_test', 'get_maintainer', 'gitutil', '__main__', 'patchstream', -- 'project', 'series', 'setup', 'settings', 'terminal', -- 'test_checkpatch', 'test_util', 'tools', 'tout'] -+__all__ = ['checkpatch', 'commit', 'control', 'func_test', 'get_maintainer', -+ 'gitutil', '__main__', 'patchstream', 'project', 'series', -+ 'settings','setup', 'status', 'test_checkpatch', 'test_settings'] -diff --git a/tools/patman/__main__.py b/tools/patman/__main__.py -index 749e6348b6..48ffbc8ead 100755 ---- a/tools/patman/__main__.py -+++ b/tools/patman/__main__.py -@@ -24,10 +24,9 @@ from patman import func_test - from patman import gitutil - from patman import project - from patman import settings --from patman import terminal --from patman import test_util --from patman import test_checkpatch --from patman import tools -+from u_boot_pylib import terminal -+from u_boot_pylib import test_util -+from u_boot_pylib import tools - - epilog = '''Create patches from commits in a branch, check them and email them - as specified by tags you place in the commits. Use -n to do a dry run first.''' -@@ -146,11 +145,12 @@ if not args.debug: - # Run our meagre tests - if args.cmd == 'test': - from patman import func_test -+ from patman import test_checkpatch - - result = test_util.run_test_suites( - 'patman', False, False, False, None, None, None, - [test_checkpatch.TestPatch, func_test.TestFunctional, -- 'gitutil', 'settings', 'terminal']) -+ 'gitutil', 'settings']) - - sys.exit(0 if result.wasSuccessful() else 1) - -diff --git a/tools/patman/checkpatch.py b/tools/patman/checkpatch.py -index d1b902dd96..e03cac115e 100644 ---- a/tools/patman/checkpatch.py -+++ b/tools/patman/checkpatch.py -@@ -3,13 +3,14 @@ - # - - import collections -+import concurrent.futures - import os - import re - import sys - --from patman import command - from patman import gitutil --from patman import terminal -+from u_boot_pylib import command -+from u_boot_pylib import terminal - - EMACS_PREFIX = r'(?:[0-9]{4}.*\.patch:[0-9]+: )?' - TYPE_NAME = r'([A-Z_]+:)?' -@@ -244,26 +245,31 @@ def check_patches(verbose, args, use_tree): - error_count, warning_count, check_count = 0, 0, 0 - col = terminal.Color() - -- for fname in args: -- result = check_patch(fname, verbose, use_tree=use_tree) -- if not result.ok: -- error_count += result.errors -- warning_count += result.warnings -- check_count += result.checks -- print('%d errors, %d warnings, %d checks for %s:' % (result.errors, -- result.warnings, result.checks, col.build(col.BLUE, fname))) -- if (len(result.problems) != result.errors + result.warnings + -- result.checks): -- print("Internal error: some problems lost") -- # Python seems to get confused by this -- # pylint: disable=E1133 -- for item in result.problems: -- sys.stderr.write( -- get_warning_msg(col, item.get('type', ''), -- item.get('file', ''), -- item.get('line', 0), item.get('msg', 'message'))) -- print -- #print(stdout) -+ with concurrent.futures.ThreadPoolExecutor(max_workers=16) as executor: -+ futures = [] -+ for fname in args: -+ f = executor.submit(check_patch, fname, verbose, use_tree=use_tree) -+ futures.append(f) -+ -+ for fname, f in zip(args, futures): -+ result = f.result() -+ if not result.ok: -+ error_count += result.errors -+ warning_count += result.warnings -+ check_count += result.checks -+ print('%d errors, %d warnings, %d checks for %s:' % (result.errors, -+ result.warnings, result.checks, col.build(col.BLUE, fname))) -+ if (len(result.problems) != result.errors + result.warnings + -+ result.checks): -+ print("Internal error: some problems lost") -+ # Python seems to get confused by this -+ # pylint: disable=E1133 -+ for item in result.problems: -+ sys.stderr.write( -+ get_warning_msg(col, item.get('type', ''), -+ item.get('file', ''), -+ item.get('line', 0), item.get('msg', 'message'))) -+ print - if error_count or warning_count or check_count: - str = 'checkpatch.pl found %d error(s), %d warning(s), %d checks(s)' - color = col.GREEN -diff --git a/tools/patman/control.py b/tools/patman/control.py -index 38e98dab84..916ddf8fcf 100644 ---- a/tools/patman/control.py -+++ b/tools/patman/control.py -@@ -14,7 +14,7 @@ import sys - from patman import checkpatch - from patman import gitutil - from patman import patchstream --from patman import terminal -+from u_boot_pylib import terminal - - def setup(): - """Do required setup before doing anything""" -@@ -85,7 +85,7 @@ def check_patches(series, patch_files, run_checkpatch, verbose, use_tree): - # Do a few checks on the series - series.DoChecks() - -- # Check the patches, and run them through 'git am' just to be sure -+ # Check the patches - if run_checkpatch: - ok = checkpatch.check_patches(verbose, patch_files, use_tree) - else: -diff --git a/tools/patman/func_test.py b/tools/patman/func_test.py -index c25a47bdeb..42ac4ed77b 100644 ---- a/tools/patman/func_test.py -+++ b/tools/patman/func_test.py -@@ -23,9 +23,9 @@ from patman import patchstream - from patman.patchstream import PatchStream - from patman.series import Series - from patman import settings --from patman import terminal --from patman import tools --from patman.test_util import capture_sys_output -+from u_boot_pylib import terminal -+from u_boot_pylib import tools -+from u_boot_pylib.test_util import capture_sys_output - - import pygit2 - from patman import status -@@ -240,6 +240,8 @@ class TestFunctional(unittest.TestCase): - self.assertEqual('Change log missing for v3', next(lines)) - self.assertEqual('Change log for unknown version v4', next(lines)) - self.assertEqual("Alias 'pci' not found", next(lines)) -+ while next(lines) != 'Cc processing complete': -+ pass - self.assertIn('Dry run', next(lines)) - self.assertEqual('', next(lines)) - self.assertIn('Send a total of %d patches' % count, next(lines)) -diff --git a/tools/patman/get_maintainer.py b/tools/patman/get_maintainer.py -index f7011be1e4..8df3d124ba 100644 ---- a/tools/patman/get_maintainer.py -+++ b/tools/patman/get_maintainer.py -@@ -7,8 +7,8 @@ import os - import shlex - import shutil - --from patman import command - from patman import gitutil -+from u_boot_pylib import command - - - def find_get_maintainer(script_file_name): -diff --git a/tools/patman/gitutil.py b/tools/patman/gitutil.py -index 5e742102c2..6700057359 100644 ---- a/tools/patman/gitutil.py -+++ b/tools/patman/gitutil.py -@@ -5,9 +5,9 @@ - import os - import sys - --from patman import command - from patman import settings --from patman import terminal -+from u_boot_pylib import command -+from u_boot_pylib import terminal - - # True to use --no-decorate - we check this in setup() - use_no_decorate = True -diff --git a/tools/patman/patchstream.py b/tools/patman/patchstream.py -index fb6a6036f3..f91669a940 100644 ---- a/tools/patman/patchstream.py -+++ b/tools/patman/patchstream.py -@@ -14,10 +14,10 @@ import queue - import shutil - import tempfile - --from patman import command - from patman import commit - from patman import gitutil - from patman.series import Series -+from u_boot_pylib import command - - # Tags that we detect and remove - RE_REMOVE = re.compile(r'^BUG=|^TEST=|^BRANCH=|^Review URL:' -diff --git a/tools/patman/patman.rst b/tools/patman/patman.rst -index 6113962fb4..038b651ee8 100644 ---- a/tools/patman/patman.rst -+++ b/tools/patman/patman.rst -@@ -41,6 +41,18 @@ In Linux and U-Boot this will also call get_maintainer.pl on each of your - patches automatically (unless you use -m to disable this). - - -+Installation -+------------ -+ -+You can install patman using:: -+ -+ pip install patch-manager -+ -+The name is chosen since patman conflicts with an existing package. -+ -+If you are using patman within the U-Boot tree, it may be easiest to add a -+symlink from your local `~/.bin` directory to `/path/to/tools/patman/patman`. -+ - How to use this tool - -------------------- - -diff --git a/tools/patman/pyproject.toml b/tools/patman/pyproject.toml -new file mode 100644 -index 0000000000..c5dc7c7e27 ---- /dev/null -+++ b/tools/patman/pyproject.toml -@@ -0,0 +1,29 @@ -+[build-system] -+requires = ["setuptools>=61.0"] -+build-backend = "setuptools.build_meta" -+ -+[project] -+name = "patch-manager" -+version = "0.0.2" -+authors = [ -+ { name="Simon Glass", email="sjg@chromium.org" }, -+] -+dependencies = ["u_boot_pylib"] -+description = "Patman patch manager" -+readme = "README.rst" -+requires-python = ">=3.7" -+classifiers = [ -+ "Programming Language :: Python :: 3", -+ "License :: OSI Approved :: GNU General Public License v2 or later (GPLv2+)", -+ "Operating System :: OS Independent", -+] -+ -+[project.urls] -+"Homepage" = "https://u-boot.readthedocs.io/en/latest/develop/patman.html" -+"Bug Tracker" = "https://source.denx.de/groups/u-boot/-/issues" -+ -+[project.scripts] -+patman = "patman.__main__:run_patman" -+ -+[tool.setuptools.package-data] -+patman = ["*.rst"] -diff --git a/tools/patman/series.py b/tools/patman/series.py -index 2eeeef71dc..6866e1dbd0 100644 ---- a/tools/patman/series.py -+++ b/tools/patman/series.py -@@ -5,14 +5,17 @@ - from __future__ import print_function - - import collections -+import concurrent.futures - import itertools - import os -+import sys -+import time - - from patman import get_maintainer - from patman import gitutil - from patman import settings --from patman import terminal --from patman import tools -+from u_boot_pylib import terminal -+from u_boot_pylib import tools - - # Series-xxx tags that we understand - valid_series = ['to', 'cc', 'version', 'changes', 'prefix', 'notes', 'name', -@@ -234,6 +237,49 @@ class Series(dict): - str = 'Change log exists, but no version is set' - print(col.build(col.RED, str)) - -+ def GetCcForCommit(self, commit, process_tags, warn_on_error, -+ add_maintainers, limit, get_maintainer_script, -+ all_skips): -+ """Get the email CCs to use with a particular commit -+ -+ Uses subject tags and get_maintainers.pl script to find people to cc -+ on a patch -+ -+ Args: -+ commit (Commit): Commit to process -+ process_tags (bool): Process tags as if they were aliases -+ warn_on_error (bool): True to print a warning when an alias fails to -+ match, False to ignore it. -+ add_maintainers (bool or list of str): Either: -+ True/False to call the get_maintainers to CC maintainers -+ List of maintainers to include (for testing) -+ limit (int): Limit the length of the Cc list (None if no limit) -+ get_maintainer_script (str): The file name of the get_maintainer.pl -+ script (or compatible). -+ all_skips (set of str): Updated to include the set of bouncing email -+ addresses that were dropped from the output. This is essentially -+ a return value from this function. -+ -+ Returns: -+ list of str: List of email addresses to cc -+ """ -+ cc = [] -+ if process_tags: -+ cc += gitutil.build_email_list(commit.tags, -+ warn_on_error=warn_on_error) -+ cc += gitutil.build_email_list(commit.cc_list, -+ warn_on_error=warn_on_error) -+ if type(add_maintainers) == type(cc): -+ cc += add_maintainers -+ elif add_maintainers: -+ cc += get_maintainer.get_maintainer(get_maintainer_script, -+ commit.patch) -+ all_skips |= set(cc) & set(settings.bounces) -+ cc = list(set(cc) - set(settings.bounces)) -+ if limit is not None: -+ cc = cc[:limit] -+ return cc -+ - def MakeCcFile(self, process_tags, cover_fname, warn_on_error, - add_maintainers, limit, get_maintainer_script): - """Make a cc file for us to use for per-commit Cc automation -@@ -241,15 +287,15 @@ class Series(dict): - Also stores in self._generated_cc to make ShowActions() faster. - - Args: -- process_tags: Process tags as if they were aliases -- cover_fname: If non-None the name of the cover letter. -- warn_on_error: True to print a warning when an alias fails to match, -- False to ignore it. -- add_maintainers: Either: -+ process_tags (bool): Process tags as if they were aliases -+ cover_fname (str): If non-None the name of the cover letter. -+ warn_on_error (bool): True to print a warning when an alias fails to -+ match, False to ignore it. -+ add_maintainers (bool or list of str): Either: - True/False to call the get_maintainers to CC maintainers - List of maintainers to include (for testing) -- limit: Limit the length of the Cc list (None if no limit) -- get_maintainer_script: The file name of the get_maintainer.pl -+ limit (int): Limit the length of the Cc list (None if no limit) -+ get_maintainer_script (str): The file name of the get_maintainer.pl - script (or compatible). - Return: - Filename of temp file created -@@ -259,28 +305,42 @@ class Series(dict): - fname = '/tmp/patman.%d' % os.getpid() - fd = open(fname, 'w', encoding='utf-8') - all_ccs = [] -+ all_skips = set() -+ with concurrent.futures.ThreadPoolExecutor(max_workers=16) as executor: -+ for i, commit in enumerate(self.commits): -+ commit.seq = i -+ commit.future = executor.submit( -+ self.GetCcForCommit, commit, process_tags, warn_on_error, -+ add_maintainers, limit, get_maintainer_script, all_skips) -+ -+ # Show progress any commits that are taking forever -+ lastlen = 0 -+ while True: -+ left = [commit for commit in self.commits -+ if not commit.future.done()] -+ if not left: -+ break -+ names = ', '.join(f'{c.seq + 1}:{c.subject}' -+ for c in left[:2]) -+ out = f'\r{len(left)} remaining: {names}'[:79] -+ spaces = ' ' * (lastlen - len(out)) -+ if lastlen: # Don't print anything the first time -+ print(out, spaces, end='') -+ sys.stdout.flush() -+ lastlen = len(out) -+ time.sleep(.25) -+ print(f'\rdone{" " * lastlen}\r', end='') -+ print('Cc processing complete') -+ - for commit in self.commits: -- cc = [] -- if process_tags: -- cc += gitutil.build_email_list(commit.tags, -- warn_on_error=warn_on_error) -- cc += gitutil.build_email_list(commit.cc_list, -- warn_on_error=warn_on_error) -- if type(add_maintainers) == type(cc): -- cc += add_maintainers -- elif add_maintainers: -- -- cc += get_maintainer.get_maintainer(get_maintainer_script, -- commit.patch) -- for x in set(cc) & set(settings.bounces): -- print(col.build(col.YELLOW, 'Skipping "%s"' % x)) -- cc = list(set(cc) - set(settings.bounces)) -- if limit is not None: -- cc = cc[:limit] -+ cc = commit.future.result() - all_ccs += cc - print(commit.patch, '\0'.join(sorted(set(cc))), file=fd) - self._generated_cc[commit.patch] = cc - -+ for x in sorted(all_skips): -+ print(col.build(col.YELLOW, f'Skipping "{x}"')) -+ - if cover_fname: - cover_cc = gitutil.build_email_list(self.get('cover_cc', '')) - cover_cc = list(set(cover_cc + all_ccs)) -diff --git a/tools/patman/status.py b/tools/patman/status.py -index 47ed6d61d4..5fb436e08f 100644 ---- a/tools/patman/status.py -+++ b/tools/patman/status.py -@@ -18,8 +18,8 @@ import requests - - from patman import patchstream - from patman.patchstream import PatchStream --from patman import terminal --from patman import tout -+from u_boot_pylib import terminal -+from u_boot_pylib import tout - - # Patches which are part of a multi-patch series are shown with a prefix like - # [prefix, version, sequence], for example '[RFC, v2, 3/5]'. All but the last -diff --git a/tools/patman/test_checkpatch.py b/tools/patman/test_checkpatch.py -index 4c2ab6e590..a8bb364e42 100644 ---- a/tools/patman/test_checkpatch.py -+++ b/tools/patman/test_checkpatch.py -@@ -452,6 +452,12 @@ index 0000000..2234c87 - self.check_strl("cat"); - self.check_strl("cpy"); - -+ def test_schema(self): -+ """Check for uses of strn(cat|cpy)""" -+ pm = PatchMaker() -+ pm.add_line('arch/sandbox/dts/sandbox.dtsi', '\tu-boot,dm-pre-proper;') -+ self.check_single_message(pm, 'PRE_SCHEMA', 'error') -+ - if __name__ == "__main__": - unittest.main() - gitutil.RunTests() -diff --git a/tools/patman/test_settings.py b/tools/patman/test_settings.py -index c768a2fc64..06b7cbc3ab 100644 ---- a/tools/patman/test_settings.py -+++ b/tools/patman/test_settings.py -@@ -10,7 +10,7 @@ import sys - import tempfile - - from patman import settings --from patman import tools -+from u_boot_pylib import tools - - - @contextlib.contextmanager -diff --git a/tools/proftool.c b/tools/proftool.c -index 089360428c..101bcb6333 100644 ---- a/tools/proftool.c -+++ b/tools/proftool.c -@@ -1713,18 +1713,11 @@ static int make_flame_tree(enum out_format_t out_format, - struct flame_state state; - struct flame_node *tree; - struct trace_call *call; -- int missing_count = 0; -- int i, depth; -+ int i; - - /* maintain a stack of start times, etc. for 'calling' functions */ - state.stack_ptr = 0; - -- /* -- * The first thing in the trace may not be the top-level function, so -- * set the initial depth so that no function goes below depth 0 -- */ -- depth = -calc_min_depth(); -- - tree = create_node("tree"); - if (!tree) - return -1; -@@ -1736,16 +1729,10 @@ static int make_flame_tree(enum out_format_t out_format, - ulong timestamp = call->flags & FUNCF_TIMESTAMP_MASK; - struct func_info *func; - -- if (entry) -- depth++; -- else -- depth--; -- - func = find_func_by_offset(call->func); - if (!func) { - warn("Cannot find function at %lx\n", - text_offset + call->func); -- missing_count++; - continue; - } - -diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c -index 2d2a2ed277..fe8cd6bda9 100644 ---- a/tools/relocate-rela.c -+++ b/tools/relocate-rela.c -@@ -45,6 +45,7 @@ - #endif - - static int ei_class; -+static int ei_data; - - static uint64_t rela_start, rela_end, text_base, dyn_start; - -@@ -61,6 +62,22 @@ static void debug(const char *fmt, ...) - } - } - -+static uint16_t elf16_to_cpu(uint16_t data) -+{ -+ if (ei_data == ELFDATA2LSB) -+ return le16_to_cpu(data); -+ -+ return be16_to_cpu(data); -+} -+ -+static uint32_t elf32_to_cpu(uint32_t data) -+{ -+ if (ei_data == ELFDATA2LSB) -+ return le32_to_cpu(data); -+ -+ return be32_to_cpu(data); -+} -+ - static bool supported_rela(Elf64_Rela *rela) - { - uint64_t mask = 0xffffffffULL; /* would be different on 32-bit */ -@@ -234,7 +251,7 @@ static int decode_elf32(FILE *felf, char **argv) - return 25; - } - -- machine = le16_to_cpu(header.e_machine); -+ machine = elf16_to_cpu(header.e_machine); - debug("Machine %d\n", machine); - - if (machine != EM_MICROBLAZE) { -@@ -242,10 +259,10 @@ static int decode_elf32(FILE *felf, char **argv) - return 30; - } - -- text_base = le32_to_cpu(header.e_entry); -- section_header_base = le32_to_cpu(header.e_shoff); -- section_header_size = le16_to_cpu(header.e_shentsize) * -- le16_to_cpu(header.e_shnum); -+ text_base = elf32_to_cpu(header.e_entry); -+ section_header_base = elf32_to_cpu(header.e_shoff); -+ section_header_size = elf16_to_cpu(header.e_shentsize) * -+ elf16_to_cpu(header.e_shnum); - - sh_table = malloc(section_header_size); - if (!sh_table) { -@@ -273,8 +290,8 @@ static int decode_elf32(FILE *felf, char **argv) - return 27; - } - -- sh_index = le16_to_cpu(header.e_shstrndx); -- sh_size = le32_to_cpu(sh_table[sh_index].sh_size); -+ sh_index = elf16_to_cpu(header.e_shstrndx); -+ sh_size = elf32_to_cpu(sh_table[sh_index].sh_size); - debug("e_shstrndx %x, sh_size %lx\n", sh_index, sh_size); - - sh_str = malloc(sh_size); -@@ -289,8 +306,8 @@ static int decode_elf32(FILE *felf, char **argv) - * Specifies the byte offset from the beginning of the file - * to the first byte in the section. - */ -- sh_offset = le32_to_cpu(sh_table[sh_index].sh_offset); -- sh_num = le16_to_cpu(header.e_shnum); -+ sh_offset = elf32_to_cpu(sh_table[sh_index].sh_offset); -+ sh_num = elf16_to_cpu(header.e_shnum); - - ret = fseek(felf, sh_offset, SEEK_SET); - if (ret) { -@@ -312,13 +329,13 @@ static int decode_elf32(FILE *felf, char **argv) - } - - for (i = 0; i < sh_num; i++) { -- char *sh_name = sh_str + le32_to_cpu(sh_table[i].sh_name); -+ char *sh_name = sh_str + elf32_to_cpu(sh_table[i].sh_name); - - debug("%s\n", sh_name); - -- sh_addr = le64_to_cpu(sh_table[i].sh_addr); -- sh_offset = le64_to_cpu(sh_table[i].sh_offset); -- sh_size = le64_to_cpu(sh_table[i].sh_size); -+ sh_addr = elf32_to_cpu(sh_table[i].sh_addr); -+ sh_offset = elf32_to_cpu(sh_table[i].sh_offset); -+ sh_size = elf32_to_cpu(sh_table[i].sh_size); - - if (!strcmp(".rela.dyn", sh_name)) { - debug("Found section\t\".rela_dyn\"\n"); -@@ -384,6 +401,9 @@ static int decode_elf(char **argv) - ei_class = e_ident[4]; - debug("EI_CLASS(1=32bit, 2=64bit) %d\n", ei_class); - -+ ei_data = e_ident[5]; -+ debug("EI_DATA(1=little endian, 2=big endian) %d\n", ei_data); -+ - if (ei_class == 2) - return decode_elf64(felf, argv); - -@@ -520,9 +540,9 @@ static int rela_elf32(char **argv, FILE *f) - PRIu32 " r_addend:\t%" PRIx32 "\n", - rela.r_offset, rela.r_info, rela.r_addend); - -- swrela.r_offset = le32_to_cpu(rela.r_offset); -- swrela.r_info = le32_to_cpu(rela.r_info); -- swrela.r_addend = le32_to_cpu(rela.r_addend); -+ swrela.r_offset = elf32_to_cpu(rela.r_offset); -+ swrela.r_info = elf32_to_cpu(rela.r_info); -+ swrela.r_addend = elf32_to_cpu(rela.r_addend); - - debug("SWRela:\toffset:\t%" PRIx32 " r_info:\t%" - PRIu32 " r_addend:\t%" PRIx32 "\n", -diff --git a/tools/rmboard.py b/tools/rmboard.py -index ae25632127..0c56b149e0 100755 ---- a/tools/rmboard.py -+++ b/tools/rmboard.py -@@ -28,7 +28,7 @@ import os - import re - import sys - --from patman import command -+from u_boot_pylib import command - - def rm_kconfig_include(path): - """Remove a path from Kconfig files -diff --git a/tools/u_boot_pylib/LICENSE b/tools/u_boot_pylib/LICENSE -new file mode 100644 -index 0000000000..d159169d10 ---- /dev/null -+++ b/tools/u_boot_pylib/LICENSE -@@ -0,0 +1,339 @@ -+ GNU GENERAL PUBLIC LICENSE -+ Version 2, June 1991 -+ -+ Copyright (C) 1989, 1991 Free Software Foundation, Inc., -+ 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA -+ Everyone is permitted to copy and distribute verbatim copies -+ of this license document, but changing it is not allowed. -+ -+ Preamble -+ -+ The licenses for most software are designed to take away your -+freedom to share and change it. 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See the -+ GNU General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License along -+ with this program; if not, write to the Free Software Foundation, Inc., -+ 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. -+ -+Also add information on how to contact you by electronic and paper mail. -+ -+If the program is interactive, make it output a short notice like this -+when it starts in an interactive mode: -+ -+ Gnomovision version 69, Copyright (C) year name of author -+ Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. -+ This is free software, and you are welcome to redistribute it -+ under certain conditions; type `show c' for details. -+ -+The hypothetical commands `show w' and `show c' should show the appropriate -+parts of the General Public License. Of course, the commands you use may -+be called something other than `show w' and `show c'; they could even be -+mouse-clicks or menu items--whatever suits your program. -+ -+You should also get your employer (if you work as a programmer) or your -+school, if any, to sign a "copyright disclaimer" for the program, if -+necessary. Here is a sample; alter the names: -+ -+ Yoyodyne, Inc., hereby disclaims all copyright interest in the program -+ `Gnomovision' (which makes passes at compilers) written by James Hacker. -+ -+ , 1 April 1989 -+ Ty Coon, President of Vice -+ -+This General Public License does not permit incorporating your program into -+proprietary programs. If your program is a subroutine library, you may -+consider it more useful to permit linking proprietary applications with the -+library. If this is what you want to do, use the GNU Lesser General -+Public License instead of this License. -diff --git a/tools/u_boot_pylib/README.rst b/tools/u_boot_pylib/README.rst -new file mode 100644 -index 0000000000..93858f5571 ---- /dev/null -+++ b/tools/u_boot_pylib/README.rst -@@ -0,0 +1,15 @@ -+.. SPDX-License-Identifier: GPL-2.0+ -+ -+# U-Boot Python Library -+===================== -+ -+This is a Python library used by various U-Boot tools, including patman, -+buildman and binman. -+ -+The module can be installed with pip:: -+ -+ pip install u_boot_pylib -+ -+or via setup.py:: -+ -+ ./setup.py install [--user] -diff --git a/tools/u_boot_pylib/__init__.py b/tools/u_boot_pylib/__init__.py -new file mode 100644 -index 0000000000..63c88e85ec ---- /dev/null -+++ b/tools/u_boot_pylib/__init__.py -@@ -0,0 +1,4 @@ -+# SPDX-License-Identifier: GPL-2.0+ -+ -+__all__ = ['command', 'cros_subprocess','terminal', 'test_util', 'tools', -+ 'tout'] -diff --git a/tools/u_boot_pylib/__main__.py b/tools/u_boot_pylib/__main__.py -new file mode 100755 -index 0000000000..8f98d7bd9f ---- /dev/null -+++ b/tools/u_boot_pylib/__main__.py -@@ -0,0 +1,23 @@ -+#!/usr/bin/env python3 -+# SPDX-License-Identifier: GPL-2.0+ -+# -+# Copyright 2023 Google LLC -+# -+ -+import os -+import sys -+ -+if __name__ == "__main__": -+ # Allow 'from u_boot_pylib import xxx to work' -+ our_path = os.path.dirname(os.path.realpath(__file__)) -+ sys.path.append(os.path.join(our_path, '..')) -+ -+ # Run tests -+ from u_boot_pylib import terminal -+ from u_boot_pylib import test_util -+ -+ result = test_util.run_test_suites( -+ 'u_boot_pylib', False, False, False, None, None, None, -+ ['terminal']) -+ -+ sys.exit(0 if result.wasSuccessful() else 1) -diff --git a/tools/patman/command.py b/tools/u_boot_pylib/command.py -similarity index 99% -rename from tools/patman/command.py -rename to tools/u_boot_pylib/command.py -index 92c453b5c1..9bbfc5bdd8 100644 ---- a/tools/patman/command.py -+++ b/tools/u_boot_pylib/command.py -@@ -4,7 +4,7 @@ - - import os - --from patman import cros_subprocess -+from u_boot_pylib import cros_subprocess - - """Shell command ease-ups for Python.""" - -diff --git a/tools/patman/cros_subprocess.py b/tools/u_boot_pylib/cros_subprocess.py -similarity index 100% -rename from tools/patman/cros_subprocess.py -rename to tools/u_boot_pylib/cros_subprocess.py -diff --git a/tools/u_boot_pylib/pyproject.toml b/tools/u_boot_pylib/pyproject.toml -new file mode 100644 -index 0000000000..3f33caf6f8 ---- /dev/null -+++ b/tools/u_boot_pylib/pyproject.toml -@@ -0,0 +1,22 @@ -+[build-system] -+requires = ["setuptools>=61.0"] -+build-backend = "setuptools.build_meta" -+ -+[project] -+name = "u_boot_pylib" -+version = "0.0.2" -+authors = [ -+ { name="Simon Glass", email="sjg@chromium.org" }, -+] -+description = "U-Boot python library" -+readme = "README.md" -+requires-python = ">=3.7" -+classifiers = [ -+ "Programming Language :: Python :: 3", -+ "License :: OSI Approved :: GNU General Public License v2 or later (GPLv2+)", -+ "Operating System :: OS Independent", -+] -+ -+[project.urls] -+"Homepage" = "https://u-boot.readthedocs.io" -+"Bug Tracker" = "https://source.denx.de/groups/u-boot/-/issues" -diff --git a/tools/patman/terminal.py b/tools/u_boot_pylib/terminal.py -similarity index 100% -rename from tools/patman/terminal.py -rename to tools/u_boot_pylib/terminal.py -diff --git a/tools/patman/test_util.py b/tools/u_boot_pylib/test_util.py -similarity index 85% -rename from tools/patman/test_util.py -rename to tools/u_boot_pylib/test_util.py -index 0f6d1aa902..e7564e10c9 100644 ---- a/tools/patman/test_util.py -+++ b/tools/u_boot_pylib/test_util.py -@@ -11,15 +11,14 @@ import os - import sys - import unittest - --from patman import command -+from u_boot_pylib import command - - from io import StringIO - --buffer_outputs = True - use_concurrent = True - try: -- from concurrencytest.concurrencytest import ConcurrentTestSuite -- from concurrencytest.concurrencytest import fork_for_tests -+ from concurrencytest import ConcurrentTestSuite -+ from concurrencytest import fork_for_tests - except: - use_concurrent = False - -@@ -120,7 +119,6 @@ class FullTextTestResult(unittest.TextTestResult): - 0: Print nothing - 1: Print a dot per test - 2: Print test names -- 3: Print test names, and buffered outputs for failing tests - """ - def __init__(self, stream, descriptions, verbosity): - self.verbosity = verbosity -@@ -140,39 +138,12 @@ class FullTextTestResult(unittest.TextTestResult): - self.printErrorList('XFAIL', self.expectedFailures) - self.printErrorList('XPASS', unexpected_successes) - -- def addError(self, test, err): -- """Called when an error has occurred.""" -- super().addError(test, err) -- self._mirrorOutput &= self.verbosity >= 3 -- -- def addFailure(self, test, err): -- """Called when a test has failed.""" -- super().addFailure(test, err) -- self._mirrorOutput &= self.verbosity >= 3 -- -- def addSubTest(self, test, subtest, err): -- """Called at the end of a subtest.""" -- super().addSubTest(test, subtest, err) -- self._mirrorOutput &= self.verbosity >= 3 -- -- def addSuccess(self, test): -- """Called when a test has completed successfully""" -- super().addSuccess(test) -- # Don't print stdout/stderr for successful tests -- self._mirrorOutput = False -- - def addSkip(self, test, reason): - """Called when a test is skipped.""" - # Add empty line to keep spacing consistent with other results - if not reason.endswith('\n'): - reason += '\n' - super().addSkip(test, reason) -- self._mirrorOutput &= self.verbosity >= 3 -- -- def addExpectedFailure(self, test, err): -- """Called when an expected failure/error occurred.""" -- super().addExpectedFailure(test, err) -- self._mirrorOutput &= self.verbosity >= 3 - - - def run_test_suites(toolname, debug, verbosity, test_preserve_dirs, processes, -@@ -208,14 +179,12 @@ def run_test_suites(toolname, debug, verbosity, test_preserve_dirs, processes, - runner = unittest.TextTestRunner( - stream=sys.stdout, - verbosity=(1 if verbosity is None else verbosity), -- buffer=False if test_name else buffer_outputs, - resultclass=FullTextTestResult, - ) - - if use_concurrent and processes != 1: - suite = ConcurrentTestSuite(suite, -- fork_for_tests(processes or multiprocessing.cpu_count(), -- buffer=False if test_name else buffer_outputs)) -+ fork_for_tests(processes or multiprocessing.cpu_count())) - - for module in class_and_module_list: - if isinstance(module, str) and (not test_name or test_name == module): -diff --git a/tools/patman/tools.py b/tools/u_boot_pylib/tools.py -similarity index 99% -rename from tools/patman/tools.py -rename to tools/u_boot_pylib/tools.py -index 2ac814d476..187725b501 100644 ---- a/tools/patman/tools.py -+++ b/tools/u_boot_pylib/tools.py -@@ -11,8 +11,8 @@ import sys - import tempfile - import urllib.request - --from patman import command --from patman import tout -+from u_boot_pylib import command -+from u_boot_pylib import tout - - # Output directly (generally this is temporary) - outdir = None -diff --git a/tools/patman/tout.py b/tools/u_boot_pylib/tout.py -similarity index 99% -rename from tools/patman/tout.py -rename to tools/u_boot_pylib/tout.py -index ff0fd92afc..6bd2806f88 100644 ---- a/tools/patman/tout.py -+++ b/tools/u_boot_pylib/tout.py -@@ -6,7 +6,7 @@ - - import sys - --from patman import terminal -+from u_boot_pylib import terminal - - # Output verbosity levels that we support - ERROR, WARNING, NOTICE, INFO, DETAIL, DEBUG = range(6) -diff --git a/tools/u_boot_pylib/u_boot_pylib b/tools/u_boot_pylib/u_boot_pylib -new file mode 120000 -index 0000000000..5a427d1942 ---- /dev/null -+++ b/tools/u_boot_pylib/u_boot_pylib -@@ -0,0 +1 @@ -+__main__.py -\ No newline at end of file --- -2.34.1 - diff --git a/package/boot/uboot-rockchip-rk3588/patches/101-Add-support-for-orangepi5.patch b/package/boot/uboot-rockchip-rk3588/patches/101-Add-support-for-orangepi5.patch deleted file mode 100644 index a074b800b4..0000000000 --- a/package/boot/uboot-rockchip-rk3588/patches/101-Add-support-for-orangepi5.patch +++ /dev/null @@ -1,320 +0,0 @@ -From 9a5e2f804caf676d4bdec794d68afaa86a3ceb2d Mon Sep 17 00:00:00 2001 -From: baiywt -Date: Thu, 13 Apr 2023 10:30:00 +0800 -Subject: [PATCH] Add support for orangepi5 - ---- - arch/arm/dts/Makefile | 3 +- - arch/arm/dts/rk3588s-orangepi-5-u-boot.dtsi | 127 ++++++++++++++++++++ - arch/arm/dts/rk3588s-orangepi-5.dts | 44 +++++++ - configs/orangepi-5-rk3588_defconfig | 99 +++++++++++++++ - 4 files changed, 272 insertions(+), 1 deletion(-) - create mode 100644 arch/arm/dts/rk3588s-orangepi-5-u-boot.dtsi - create mode 100644 arch/arm/dts/rk3588s-orangepi-5.dts - create mode 100644 configs/orangepi-5-rk3588_defconfig - -diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index 97a48327..acafd995 100644 ---- a/arch/arm/dts/Makefile -+++ b/arch/arm/dts/Makefile -@@ -171,7 +171,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \ - - dtb-$(CONFIG_ROCKCHIP_RK3588) += \ - rk3588-edgeble-neu6a-io.dtb \ -- rk3588-rock-5b.dtb -+ rk3588-rock-5b.dtb \ -+ rk3588s-orangepi-5.dtb - - dtb-$(CONFIG_ROCKCHIP_RV1108) += \ - rv1108-elgin-r1.dtb \ -diff --git a/arch/arm/dts/rk3588s-orangepi-5-u-boot.dtsi b/arch/arm/dts/rk3588s-orangepi-5-u-boot.dtsi -new file mode 100644 -index 00000000..7aca35ae ---- /dev/null -+++ b/arch/arm/dts/rk3588s-orangepi-5-u-boot.dtsi -@@ -0,0 +1,127 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2023 Collabora Ltd. -+ */ -+ -+#include "rk3588-u-boot.dtsi" -+#include -+#include -+#include -+ -+/ { -+ aliases { -+ mmc0 = &sdmmc; -+ }; -+ -+ chosen { -+ u-boot,spl-boot-order = &sdmmc, "same-as-spl"; -+ u-boot,spl-boot-order = &sdmmc, "same-as-spl", &flash0; -+ }; -+}; -+ -+&fspim2_pins { -+ u-boot,dm-spl; -+}; -+ -+&sdmmc { -+ bus-width = <4>; -+ bootph-all; -+ u-boot,spl-fifo-mode; -+ status = "okay"; -+}; -+ -+&pcfg_pull_up_drv_level_2 { -+ bootph-all; -+}; -+ -+&pcfg_pull_up { -+ bootph-all; -+}; -+ -+&sdmmc_bus4 { -+ bootph-all; -+}; -+ -+&sdmmc_clk { -+ bootph-all; -+}; -+ -+&sdmmc_cmd { -+ bootph-all; -+}; -+ -+&sdmmc_det { -+ bootph-all; -+}; -+ -+&usb_host0_ehci { -+ companion = <&usb_host0_ohci>; -+ phys = <&u2phy2_host>; -+ phy-names = "usb2-phy"; -+ status = "okay"; -+}; -+ -+&usb_host0_ohci { -+ phys = <&u2phy2_host>; -+ phy-names = "usb2-phy"; -+ status = "okay"; -+}; -+ -+&usb2phy2_grf { -+ status = "okay"; -+}; -+ -+&u2phy2 { -+ resets = <&cru SRST_OTGPHY_U2_0>, <&cru SRST_P_USB2PHY_U2_0_GRF0>; -+ reset-names = "phy", "apb"; -+ clock-output-names = "usb480m_phy2"; -+ status = "okay"; -+}; -+ -+&u2phy2_host { -+ status = "okay"; -+}; -+ -+&usb_host1_ehci { -+ companion = <&usb_host1_ohci>; -+ phys = <&u2phy3_host>; -+ phy-names = "usb2-phy"; -+ status = "okay"; -+}; -+ -+&usb_host1_ohci { -+ phys = <&u2phy3_host>; -+ phy-names = "usb2-phy"; -+ status = "okay"; -+}; -+ -+&usb2phy3_grf { -+ status = "okay"; -+}; -+ -+&u2phy3 { -+ resets = <&cru SRST_OTGPHY_U2_1>, <&cru SRST_P_USB2PHY_U2_1_GRF0>; -+ reset-names = "phy", "apb"; -+ clock-output-names = "usb480m_phy3"; -+ status = "okay"; -+}; -+ -+&u2phy3_host { -+ status = "okay"; -+}; -+ -+&sfc { -+ bootph-all; -+ pinctrl-0 = <&fspim2_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ -+ flash0: flash@0 { -+ bootph-all; -+ compatible = "jedec,spi-nor"; -+ reg = <0>; -+ spi-max-frequency = <10000000>; -+ spi-rx-bus-width = <4>; -+ spi-tx-bus-width = <1>; -+ }; -+}; -diff --git a/arch/arm/dts/rk3588s-orangepi-5.dts b/arch/arm/dts/rk3588s-orangepi-5.dts -new file mode 100644 -index 00000000..cf5743bc ---- /dev/null -+++ b/arch/arm/dts/rk3588s-orangepi-5.dts -@@ -0,0 +1,44 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+ -+/dts-v1/; -+ -+#include "rk3588s.dtsi" -+ -+/ { -+ model = "RK3588S Orange Pi 5"; -+ compatible = "xunlong,orangepi5", "rockchip,rk3588"; -+ -+ aliases { -+ mmc0 = &sdhci; -+ serial2 = &uart2; -+ }; -+ -+ chosen { -+ stdout-path = "serial2:1500000n8"; -+ }; -+ -+ vcc5v0_sys: vcc5v0-sys-regulator { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc5v0_sys"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ }; -+}; -+ -+&sdhci { -+ bus-width = <8>; -+ no-sdio; -+ no-sd; -+ non-removable; -+ max-frequency = <200000000>; -+ mmc-hs400-1_8v; -+ mmc-hs400-enhanced-strobe; -+ status = "okay"; -+}; -+ -+&uart2 { -+ pinctrl-0 = <&uart2m0_xfer>; -+ status = "okay"; -+}; -diff --git a/configs/orangepi-5-rk3588_defconfig b/configs/orangepi-5-rk3588_defconfig -new file mode 100644 -index 00000000..782a4918 ---- /dev/null -+++ b/configs/orangepi-5-rk3588_defconfig -@@ -0,0 +1,99 @@ -+CONFIG_ARM=y -+CONFIG_SKIP_LOWLEVEL_INIT=y -+CONFIG_COUNTER_FREQUENCY=24000000 -+CONFIG_ARCH_ROCKCHIP=y -+CONFIG_TEXT_BASE=0x00a00000 -+CONFIG_SPL_LIBCOMMON_SUPPORT=y -+CONFIG_SPL_LIBGENERIC_SUPPORT=y -+CONFIG_NR_DRAM_BANKS=2 -+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 -+CONFIG_DEFAULT_DEVICE_TREE="rk3588s-orangepi-5" -+CONFIG_DM_RESET=y -+CONFIG_ROCKCHIP_RK3588=y -+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y -+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y -+CONFIG_SPL_MMC=y -+CONFIG_ROCKCHIP_SPI_IMAGE=y -+CONFIG_SPL_SERIAL=y -+CONFIG_SPL_STACK_R_ADDR=0x600000 -+CONFIG_TARGET_ROCK5B_RK3588=y -+CONFIG_SPL_STACK=0x400000 -+CONFIG_DEBUG_UART_BASE=0xFEB50000 -+CONFIG_DEBUG_UART_CLOCK=24000000 -+CONFIG_SPL_SPI_FLASH_SUPPORT=y -+CONFIG_SPL_SPI=y -+CONFIG_SYS_LOAD_ADDR=0xc00800 -+CONFIG_DEBUG_UART=y -+CONFIG_FIT=y -+CONFIG_FIT_VERBOSE=y -+CONFIG_SPL_FIT_SIGNATURE=y -+CONFIG_SPL_LOAD_FIT=y -+CONFIG_OF_BOARD_SETUP=y -+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-rock-5b.dtb" -+# CONFIG_DISPLAY_CPUINFO is not set -+CONFIG_DISPLAY_BOARDINFO_LATE=y -+CONFIG_SPL_MAX_SIZE=0x20000 -+CONFIG_SPL_PAD_TO=0x7f8000 -+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -+CONFIG_SPL_BSS_START_ADDR=0x4000000 -+CONFIG_SPL_BSS_MAX_SIZE=0x4000 -+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -+CONFIG_SPL_STACK_R=y -+CONFIG_SPL_SPI_LOAD=y -+CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 -+CONFIG_SPL_ATF=y -+CONFIG_CMD_GPIO=y -+CONFIG_CMD_GPT=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_SPI=y -+CONFIG_CMD_USB=y -+# CONFIG_CMD_SETEXPR is not set -+CONFIG_CMD_REGULATOR=y -+# CONFIG_SPL_DOS_PARTITION is not set -+CONFIG_SPL_OF_CONTROL=y -+CONFIG_OF_LIVE=y -+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" -+CONFIG_NET_RANDOM_ETHADDR=y -+CONFIG_SPL_REGMAP=y -+CONFIG_SPL_SYSCON=y -+CONFIG_SPL_CLK=y -+CONFIG_ROCKCHIP_GPIO=y -+CONFIG_SYS_I2C_ROCKCHIP=y -+CONFIG_MISC=y -+CONFIG_SUPPORT_EMMC_RPMB=y -+CONFIG_MMC_DW=y -+CONFIG_MMC_DW_ROCKCHIP=y -+CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_SDMA=y -+CONFIG_MMC_SDHCI_ROCKCHIP=y -+CONFIG_SPI_FLASH_MACRONIX=y -+CONFIG_ETH_DESIGNWARE=y -+CONFIG_GMAC_ROCKCHIP=y -+CONFIG_PHY_ROCKCHIP_INNO_USB2=y -+CONFIG_SPL_PINCTRL=y -+CONFIG_REGULATOR_PWM=y -+CONFIG_DM_REGULATOR_FIXED=y -+CONFIG_PWM_ROCKCHIP=y -+CONFIG_SPL_RAM=y -+CONFIG_BAUDRATE=1500000 -+CONFIG_DEBUG_UART_SHIFT=2 -+CONFIG_ROCKCHIP_SFC=y -+CONFIG_SYSRESET=y -+# CONFIG_BINMAN_FDT is not set -+CONFIG_USB=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_EHCI_GENERIC=y -+CONFIG_USB_OHCI_HCD=y -+CONFIG_USB_OHCI_GENERIC=y -+CONFIG_USB_HOST_ETHER=y -+CONFIG_USB_ETHER_ASIX=y -+CONFIG_USB_ETHER_ASIX88179=y -+CONFIG_USB_ETHER_LAN75XX=y -+CONFIG_USB_ETHER_LAN78XX=y -+CONFIG_USB_ETHER_MCS7830=y -+CONFIG_USB_ETHER_RTL8152=y -+CONFIG_USB_ETHER_SMSC95XX=y -+CONFIG_ERRNO_STR=y -+CONFIG_LEGACY_IMAGE_FORMAT=y --- -2.25.1 - diff --git a/package/boot/uboot-rockchip-rk3588/patches/101-Revert-gpt-return-1-directly-when-test-the-mbr-secto.patch b/package/boot/uboot-rockchip-rk3588/patches/101-Revert-gpt-return-1-directly-when-test-the-mbr-secto.patch new file mode 100644 index 0000000000..3b8fb5ebfd --- /dev/null +++ b/package/boot/uboot-rockchip-rk3588/patches/101-Revert-gpt-return-1-directly-when-test-the-mbr-secto.patch @@ -0,0 +1,66 @@ +From ea133a0b014abc21ac8919e6e370a463784b909b Mon Sep 17 00:00:00 2001 +From: baiywt +Date: Wed, 26 Apr 2023 18:25:06 +0800 +Subject: [PATCH 1/4] Revert "gpt: return 1 directly when test the mbr sector" + +This reverts commit https://github.com/rockchip-linux/u-boot/commit/3bdef7e642ae558d0e61ce26438d10b55b26ec9c + +Reason: It causes recognition errors when the partition is not gpt +--- + disk/part_efi.c | 18 +----------------- + 1 file changed, 1 insertion(+), 17 deletions(-) + +diff --git a/disk/part_efi.c b/disk/part_efi.c +index 0ec1bef..2ad5f9c 100644 +--- a/disk/part_efi.c ++++ b/disk/part_efi.c +@@ -445,7 +445,6 @@ static int part_efi_repair(struct blk_desc *dev_desc, gpt_entry *gpt_pte, + static int part_test_efi(struct blk_desc *dev_desc) + { + ALLOC_CACHE_ALIGN_BUFFER_PAD(legacy_mbr, legacymbr, 1, dev_desc->blksz); +- int ret = 0; + + /* Read legacy MBR from block 0 and validate it */ + if ((blk_dread(dev_desc, 0, 1, (ulong *)legacymbr) != 1) +@@ -489,10 +488,7 @@ static int part_test_efi(struct blk_desc *dev_desc) + if (part_efi_repair(dev_desc, b_gpt_pte, b_gpt_head, + head_gpt_valid, backup_gpt_valid)) + printf("Primary GPT repair fail!\n"); +- } else if (head_gpt_valid == 0 && backup_gpt_valid == 0) { +- ret = -1; + } +- + free(h_gpt_pte); + h_gpt_pte = NULL; + free(h_gpt_head); +@@ -503,7 +499,7 @@ static int part_test_efi(struct blk_desc *dev_desc) + b_gpt_head = NULL; + #endif + #endif +- return ret; ++ return 0; + } + + /** +@@ -1083,18 +1079,6 @@ static int is_pmbr_valid(legacy_mbr * mbr) + { + int i = 0; + +-#ifdef CONFIG_ARCH_ROCKCHIP +- /* +- * In sd-update card, we use RKPARM partition in bootloader to load +- * firmware, and use MS-DOS partition in recovery to update system. +- * Now, we want to use gpt in bootloader and abandon the RKPARM +- * partition. So in new sd-update card, we write the MS-DOS partition +- * table and gpt to sd card. Then we must return 1 directly when test +- * the mbr sector otherwise the gpt is unavailable. +- */ +- return 1; +-#endif +- + if (!mbr || le16_to_cpu(mbr->signature) != MSDOS_MBR_SIGNATURE) + return 0; + +-- +2.25.1 + diff --git a/package/boot/uboot-rockchip-rk3588/patches/102-configs-Add-new-orangepi-5-rk3588_defconfig-for-open.patch b/package/boot/uboot-rockchip-rk3588/patches/102-configs-Add-new-orangepi-5-rk3588_defconfig-for-open.patch new file mode 100644 index 0000000000..8b0362efc3 --- /dev/null +++ b/package/boot/uboot-rockchip-rk3588/patches/102-configs-Add-new-orangepi-5-rk3588_defconfig-for-open.patch @@ -0,0 +1,274 @@ +From 62caaf649a013429c2c7b08ddb70b82c95ef278a Mon Sep 17 00:00:00 2001 +From: baiywt +Date: Wed, 26 Apr 2023 18:37:05 +0800 +Subject: [PATCH 3/4] configs: Add new orangepi-5-rk3588_defconfig for openwrt + +--- + configs/orangepi-5-rk3588_defconfig | 255 ++++++++++++++++++++++++++++ + 1 file changed, 255 insertions(+) + create mode 100644 configs/orangepi-5-rk3588_defconfig + +diff --git a/configs/orangepi-5-rk3588_defconfig b/configs/orangepi-5-rk3588_defconfig +new file mode 100644 +index 0000000..5a71f98 +--- /dev/null ++++ b/configs/orangepi-5-rk3588_defconfig +@@ -0,0 +1,255 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_ROCKCHIP=y ++CONFIG_SPL_GPIO_SUPPORT=y ++CONFIG_SPL_LIBCOMMON_SUPPORT=y ++CONFIG_SPL_LIBGENERIC_SUPPORT=y ++CONFIG_SYS_MALLOC_F_LEN=0x80000 ++CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh" ++CONFIG_ROCKCHIP_RK3588=y ++CONFIG_ROCKCHIP_FIT_IMAGE=y ++CONFIG_ROCKCHIP_HWID_DTB=y ++CONFIG_ROCKCHIP_VENDOR_PARTITION=y ++CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y ++CONFIG_ROCKCHIP_NEW_IDB=y ++CONFIG_LOADER_INI="RK3588MINIALL.ini" ++CONFIG_TRUST_INI="RK3588TRUST.ini" ++CONFIG_PSTORE=y ++CONFIG_SPL_SERIAL_SUPPORT=y ++CONFIG_SPL_DRIVERS_MISC_SUPPORT=y ++CONFIG_TARGET_EVB_RK3588=y ++CONFIG_SPL_LIBDISK_SUPPORT=y ++CONFIG_SPL_SPI_FLASH_SUPPORT=y ++CONFIG_SPL_SPI_SUPPORT=y ++CONFIG_DEFAULT_DEVICE_TREE="rk3588s-orangepi-5" ++CONFIG_DEBUG_UART=y ++CONFIG_FIT=y ++CONFIG_FIT_IMAGE_POST_PROCESS=y ++CONFIG_FIT_HW_CRYPTO=y ++CONFIG_SPL_LOAD_FIT=y ++CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y ++CONFIG_SPL_FIT_HW_CRYPTO=y ++# CONFIG_SPL_SYS_DCACHE_OFF is not set ++CONFIG_BOOTDELAY=0 ++CONFIG_SYS_CONSOLE_INFO_QUIET=y ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_ANDROID_BOOTLOADER=y ++CONFIG_ANDROID_AVB=y ++CONFIG_ANDROID_BOOT_IMAGE_HASH=y ++CONFIG_SPL_BOARD_INIT=y ++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set ++# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set ++CONFIG_SPL_SEPARATE_BSS=y ++CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y ++CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1 ++CONFIG_SPL_MMC_WRITE=y ++CONFIG_SPL_MTD_SUPPORT=y ++CONFIG_SPL_ATF=y ++CONFIG_FASTBOOT_BUF_ADDR=0xc00800 ++CONFIG_FASTBOOT_BUF_SIZE=0x07000000 ++CONFIG_FASTBOOT_FLASH=y ++CONFIG_FASTBOOT_FLASH_MMC_DEV=0 ++CONFIG_CMD_BOOTZ=y ++CONFIG_CMD_DTIMG=y ++# CONFIG_CMD_ELF is not set ++# CONFIG_CMD_IMI is not set ++# CONFIG_CMD_IMLS is not set ++# CONFIG_CMD_XIMG is not set ++# CONFIG_CMD_LZMADEC is not set ++# CONFIG_CMD_UNZIP is not set ++# CONFIG_CMD_FLASH is not set ++# CONFIG_CMD_FPGA is not set ++CONFIG_CMD_GPT=y ++# CONFIG_CMD_LOADB is not set ++# CONFIG_CMD_LOADS is not set ++CONFIG_CMD_BOOT_ANDROID=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_SF=y ++CONFIG_CMD_SPI=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_USB_MASS_STORAGE=y ++# CONFIG_CMD_ITEST is not set ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_TFTPPUT=y ++CONFIG_CMD_TFTP_BOOTM=y ++CONFIG_CMD_TFTP_FLASH=y ++# CONFIG_CMD_MISC is not set ++CONFIG_CMD_MTD_BLK=y ++# CONFIG_SPL_DOS_PARTITION is not set ++# CONFIG_ISO_PARTITION is not set ++CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64 ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_SPL_DTB_MINIMUM=y ++CONFIG_OF_LIVE=y ++CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" ++CONFIG_OF_U_BOOT_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" ++# CONFIG_NET_TFTP_VARS is not set ++CONFIG_REGMAP=y ++CONFIG_SPL_REGMAP=y ++CONFIG_SYSCON=y ++CONFIG_SPL_SYSCON=y ++# CONFIG_SARADC_ROCKCHIP is not set ++CONFIG_SARADC_ROCKCHIP_V2=y ++CONFIG_CLK=y ++CONFIG_SPL_CLK=y ++CONFIG_CLK_SCMI=y ++CONFIG_SPL_CLK_SCMI=y ++CONFIG_DM_CRYPTO=y ++CONFIG_SPL_DM_CRYPTO=y ++CONFIG_ROCKCHIP_CRYPTO_V2=y ++CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y ++CONFIG_DM_RNG=y ++CONFIG_RNG_ROCKCHIP=y ++CONFIG_SCMI_FIRMWARE=y ++CONFIG_SPL_SCMI_FIRMWARE=y ++CONFIG_GPIO_HOG=y ++CONFIG_ROCKCHIP_GPIO=y ++CONFIG_ROCKCHIP_GPIO_V2=y ++CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_I2C_MUX=y ++CONFIG_DM_KEY=y ++CONFIG_RK8XX_PWRKEY=y ++CONFIG_ADC_KEY=y ++CONFIG_MISC=y ++CONFIG_SPL_MISC=y ++CONFIG_MISC_DECOMPRESS=y ++CONFIG_SPL_MISC_DECOMPRESS=y ++CONFIG_ROCKCHIP_OTP=y ++CONFIG_ROCKCHIP_HW_DECOMPRESS=y ++CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y ++CONFIG_SPL_ROCKCHIP_SECURE_OTP=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_SDMA=y ++CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_MTD=y ++CONFIG_MTD_BLK=y ++CONFIG_MTD_DEVICE=y ++CONFIG_NAND=y ++CONFIG_MTD_SPI_NAND=y ++CONFIG_SPI_FLASH=y ++CONFIG_SF_DEFAULT_SPEED=80000000 ++CONFIG_SPI_FLASH_EON=y ++CONFIG_SPI_FLASH_GIGADEVICE=y ++CONFIG_SPI_FLASH_MACRONIX=y ++CONFIG_SPI_FLASH_SST=y ++CONFIG_SPI_FLASH_WINBOND=y ++CONFIG_SPI_FLASH_XMC=y ++CONFIG_SPI_FLASH_XTX=y ++CONFIG_SPI_FLASH_MTD=y ++CONFIG_DM_ETH=y ++CONFIG_DM_ETH_PHY=y ++CONFIG_DWC_ETH_QOS=y ++CONFIG_GMAC_ROCKCHIP=y ++CONFIG_NVME=y ++CONFIG_PCI=y ++CONFIG_DM_PCI=y ++CONFIG_DM_PCI_COMPAT=y ++CONFIG_PCIE_DW_ROCKCHIP=y ++CONFIG_PHY_ROCKCHIP_INNO_USB2=y ++CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX=y ++CONFIG_PHY_ROCKCHIP_USBDP=y ++CONFIG_PINCTRL=y ++CONFIG_SPL_PINCTRL=y ++CONFIG_DM_FUEL_GAUGE=y ++CONFIG_POWER_FG_CW201X=y ++CONFIG_POWER_FG_CW221X=y ++CONFIG_DM_PMIC=y ++CONFIG_PMIC_SPI_RK8XX=y ++CONFIG_DM_POWER_DELIVERY=y ++CONFIG_TYPEC_TCPM=y ++CONFIG_TYPEC_TCPCI=y ++CONFIG_TYPEC_HUSB311=y ++CONFIG_TYPEC_FUSB302=y ++CONFIG_REGULATOR_PWM=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_REGULATOR_GPIO=y ++CONFIG_REGULATOR_RK860X=y ++CONFIG_REGULATOR_RK806=y ++CONFIG_CHARGER_BQ25700=y ++CONFIG_CHARGER_BQ25890=y ++CONFIG_CHARGER_SC8551=y ++CONFIG_CHARGER_SGM41542=y ++CONFIG_DM_CHARGE_DISPLAY=y ++CONFIG_CHARGE_ANIMATION=y ++CONFIG_PWM_ROCKCHIP=y ++CONFIG_RAM=y ++CONFIG_SPL_RAM=y ++CONFIG_TPL_RAM=y ++CONFIG_DM_RAMDISK=y ++CONFIG_RAMDISK_RO=y ++CONFIG_DM_RESET=y ++CONFIG_SPL_DM_RESET=y ++CONFIG_SPL_RESET_ROCKCHIP=y ++CONFIG_BAUDRATE=1500000 ++CONFIG_DEBUG_UART_BASE=0xFEB50000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_ROCKCHIP_SPI=y ++CONFIG_ROCKCHIP_SFC=y ++CONFIG_SYSRESET=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_XHCI_PCI=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_GENERIC=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_USB_OHCI_GENERIC=y ++CONFIG_USB_DWC3=y ++CONFIG_USB_DWC3_GADGET=y ++CONFIG_USB_DWC3_GENERIC=y ++CONFIG_USB_STORAGE=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_MANUFACTURER="Rockchip" ++CONFIG_USB_GADGET_VENDOR_NUM=0x2207 ++CONFIG_USB_GADGET_PRODUCT_NUM=0x350a ++CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_DM_VIDEO=y ++CONFIG_DISPLAY=y ++CONFIG_DRM_ROCKCHIP=y ++CONFIG_DRM_MAXIM_MAX96745=y ++CONFIG_DRM_MAXIM_MAX96752F=y ++CONFIG_DRM_MAXIM_MAX96755F=y ++CONFIG_DRM_PANEL_MAXIM_DESERIALIZER=y ++CONFIG_DRM_ROHM_BU18XL82=y ++CONFIG_DRM_ROCKCHIP_DW_HDMI_QP=y ++CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI2=y ++CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y ++CONFIG_DRM_ROCKCHIP_DW_DP=y ++CONFIG_DRM_ROCKCHIP_SAMSUNG_MIPI_DCPHY=y ++CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX_HDMI=y ++CONFIG_USE_TINY_PRINTF=y ++CONFIG_LIB_RAND=y ++CONFIG_SPL_TINY_MEMSET=y ++CONFIG_RSA=y ++CONFIG_SPL_RSA=y ++CONFIG_RSA_N_SIZE=0x200 ++CONFIG_RSA_E_SIZE=0x10 ++CONFIG_RSA_C_SIZE=0x20 ++CONFIG_XBC=y ++CONFIG_LZ4=y ++CONFIG_LZMA=y ++CONFIG_ERRNO_STR=y ++# CONFIG_EFI_LOADER is not set ++CONFIG_AVB_LIBAVB=y ++CONFIG_AVB_LIBAVB_AB=y ++CONFIG_AVB_LIBAVB_ATX=y ++CONFIG_AVB_LIBAVB_USER=y ++CONFIG_RK_AVB_LIBAVB_USER=y ++CONFIG_OPTEE_CLIENT=y ++CONFIG_OPTEE_V2=y ++CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y ++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y ++CONFIG_CMD_SETEXPR=y ++CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y ++CONFIG_SYS_PROMPT="opi# " ++CONFIG_AHCI=y ++CONFIG_CMD_SCSI=y ++CONFIG_DM_SCSI=y ++CONFIG_DWC_AHCI=y ++CONFIG_LIBATA=y ++CONFIG_SCSI_AHCI=y ++CONFIG_SCSI=y ++CONFIG_USING_KERNEL_DTB_V2=y +-- +2.25.1 + diff --git a/package/boot/uboot-rockchip-rk3588/patches/106-no-kwbimage.patch b/package/boot/uboot-rockchip-rk3588/patches/106-no-kwbimage.patch deleted file mode 100644 index 224c14af91..0000000000 --- a/package/boot/uboot-rockchip-rk3588/patches/106-no-kwbimage.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/tools/Makefile -+++ b/tools/Makefile -@@ -113,7 +113,6 @@ dumpimage-mkimage-objs := aisimage.o \ - imximage.o \ - imx8image.o \ - imx8mimage.o \ -- kwbimage.o \ - lib/md5.o \ - lpc32xximage.o \ - mxsimage.o \ diff --git a/package/boot/uboot-rockchip-rk3588/patches/110-force-pylibfdt-build.patch b/package/boot/uboot-rockchip-rk3588/patches/110-force-pylibfdt-build.patch deleted file mode 100644 index d34ed6f2ae..0000000000 --- a/package/boot/uboot-rockchip-rk3588/patches/110-force-pylibfdt-build.patch +++ /dev/null @@ -1,30 +0,0 @@ ---- a/Makefile -+++ b/Makefile -@@ -2000,26 +2000,7 @@ endif - # Check dtc and pylibfdt, if DTC is provided, else build them - PHONY += scripts_dtc - scripts_dtc: scripts_basic -- $(Q)if test "$(DTC)" = "$(DTC_INTREE)"; then \ -- $(MAKE) $(build)=scripts/dtc; \ -- else \ -- if ! $(DTC) -v >/dev/null; then \ -- echo '*** Failed to check dtc version: $(DTC)'; \ -- false; \ -- else \ -- if test "$(call dtc-version)" -lt $(DTC_MIN_VERSION); then \ -- echo '*** Your dtc is too old, please upgrade to dtc $(DTC_MIN_VERSION) or newer'; \ -- false; \ -- else \ -- if [ -n "$(CONFIG_PYLIBFDT)" ]; then \ -- if ! echo "import libfdt" | $(PYTHON3) 2>/dev/null; then \ -- echo '*** pylibfdt does not seem to be available with $(PYTHON3)'; \ -- false; \ -- fi; \ -- fi; \ -- fi; \ -- fi; \ -- fi -+ $(MAKE) $(build)=scripts/dtc - - # --------------------------------------------------------------------------- - quiet_cmd_cpp_lds = LDS $@ diff --git a/package/boot/uboot-rockchip-rk3588/patches/111-fix-mkimage-host-build.patch b/package/boot/uboot-rockchip-rk3588/patches/111-fix-mkimage-host-build.patch deleted file mode 100644 index cd65c1321f..0000000000 --- a/package/boot/uboot-rockchip-rk3588/patches/111-fix-mkimage-host-build.patch +++ /dev/null @@ -1,24 +0,0 @@ ---- a/tools/image-host.c -+++ b/tools/image-host.c -@@ -1125,6 +1125,7 @@ static int fit_config_add_verification_d - * 2) get public key (X509_get_pubkey) - * 3) provide der format (d2i_RSAPublicKey) - */ -+#ifdef CONFIG_TOOLS_LIBCRYPTO - static int read_pub_key(const char *keydir, const void *name, - unsigned char **pubkey, int *pubkey_len) - { -@@ -1178,6 +1179,13 @@ err_cert: - fclose(f); - return ret; - } -+#else -+static int read_pub_key(const char *keydir, const void *name, -+ unsigned char **pubkey, int *pubkey_len) -+{ -+ return -ENOSYS; -+} -+#endif - - int fit_pre_load_data(const char *keydir, void *keydest, void *fit) - {