
Refresh all patches on top of kernel 5.10.138. The following patches were applied upstream: bcm27xx/patches-5.10/950-0311-drm-vc4-Adopt-the-dma-configuration-from-the-HVS-or-.patch bcm27xx/patches-5.10/950-0317-vc4_hdmi-Remove-firmware-logic-for-MAI-threshold-set.patch bcm27xx/patches-5.10/950-0346-drm-vc4-A-present-but-empty-dmas-disables-audio.patch bcm27xx/patches-5.10/950-0354-drm-vc4-Add-the-2711-HVS-as-a-suitable-DMA-node.patch bcm27xx/patches-5.10/950-0413-drm-vc4-hdmi-Don-t-access-the-connector-state-in-res.patch bcm27xx/patches-5.10/950-0505-vc4-drm-Avoid-full-hdmi-audio-fifo-writes.patch bcm27xx/patches-5.10/950-0512-vc4-drm-vc4_plane-Remove-subpixel-positioning-check.patch bcm27xx/patches-5.10/950-0560-drm-vc4-drv-Remove-the-DSI-pointer-in-vc4_drv.patch bcm27xx/patches-5.10/950-0561-drm-vc4-dsi-Use-snprintf-for-the-PHY-clocks-instead-.patch bcm27xx/patches-5.10/950-0562-drm-vc4-dsi-Introduce-a-variant-structure.patch bcm27xx/patches-5.10/950-0565-drm-vc4-Correct-pixel-order-for-DSI0.patch bcm27xx/patches-5.10/950-0566-drm-vc4-Register-dsi0-as-the-correct-vc4-encoder-typ.patch bcm27xx/patches-5.10/950-0567-drm-vc4-Fix-dsi0-interrupt-support.patch bcm27xx/patches-5.10/950-0568-drm-vc4-Add-correct-stop-condition-to-vc4_dsi_encode.patch bcm27xx/patches-5.10/950-0647-drm-vc4-Fix-timings-for-interlaced-modes.patch bcm27xx/patches-5.10/950-0695-drm-vc4-Fix-margin-calculations-for-the-right-bottom.patch Upstream sets the pixel clock to 340MHz now, do not set it to 600MHz any more. bcm27xx/patches-5.10/950-0576-drm-vc4-hdmi-Raise-the-maximum-clock-rate.patch Fixes: 89956c653252 ("kernel: bump 5.10 to 5.10.138") Fixes: 4209c33ae27d ("kernel: bump 5.10 to 5.10.137") Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
105 lines
3.6 KiB
Diff
105 lines
3.6 KiB
Diff
From bb968f8f963e28d00fff213c62a2449c45ff19f4 Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime@cerno.tech>
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Date: Thu, 6 May 2021 17:15:57 +0200
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Subject: [PATCH] drm/vc4: crtc: Lookup the encoder from the register
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at boot
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At boot, we can't rely on the vc4_get_crtc_encoder since we don't have a
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state yet and thus will not be able to figure out which connector is
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attached to our CRTC.
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However, we have a muxing bit in the CRTC register we can use to get the
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encoder currently connected to the pixelvalve. We can thus read that
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register, lookup the associated register through the vc4_pv_data
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structure, and then pass it to vc4_crtc_disable so that we can perform
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the proper operations.
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Fixes: 875a4d536842 ("drm/vc4: drv: Disable the CRTC at boot time")
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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---
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drivers/gpu/drm/vc4/vc4_crtc.c | 38 ++++++++++++++++++++++++++++++----
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1 file changed, 34 insertions(+), 4 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_crtc.c
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+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
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@@ -432,11 +432,10 @@ static void require_hvs_enabled(struct d
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}
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static int vc4_crtc_disable(struct drm_crtc *crtc,
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+ struct drm_encoder *encoder,
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struct drm_atomic_state *state,
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unsigned int channel)
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{
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- struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc, state,
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- drm_atomic_get_old_connector_state);
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struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder);
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struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
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struct drm_device *dev = crtc->dev;
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@@ -477,10 +476,29 @@ static int vc4_crtc_disable(struct drm_c
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return 0;
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}
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+static struct drm_encoder *vc4_crtc_get_encoder_by_type(struct drm_crtc *crtc,
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+ enum vc4_encoder_type type)
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+{
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+ struct drm_encoder *encoder;
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+
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+ drm_for_each_encoder(encoder, crtc->dev) {
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+ struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder);
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+
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+ if (vc4_encoder->type == type)
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+ return encoder;
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+ }
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+
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+ return NULL;
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+}
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+
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int vc4_crtc_disable_at_boot(struct drm_crtc *crtc)
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{
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struct drm_device *drm = crtc->dev;
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struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
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+ enum vc4_encoder_type encoder_type;
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+ const struct vc4_pv_data *pv_data;
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+ struct drm_encoder *encoder;
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+ unsigned encoder_sel;
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int channel;
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if (!(of_device_is_compatible(vc4_crtc->pdev->dev.of_node,
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@@ -499,7 +517,17 @@ int vc4_crtc_disable_at_boot(struct drm_
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if (channel < 0)
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return 0;
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- return vc4_crtc_disable(crtc, NULL, channel);
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+ encoder_sel = VC4_GET_FIELD(CRTC_READ(PV_CONTROL), PV_CONTROL_CLK_SELECT);
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+ if (WARN_ON(encoder_sel != 0))
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+ return 0;
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+
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+ pv_data = vc4_crtc_to_vc4_pv_data(vc4_crtc);
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+ encoder_type = pv_data->encoder_types[encoder_sel];
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+ encoder = vc4_crtc_get_encoder_by_type(crtc, encoder_type);
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+ if (WARN_ON(!encoder))
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+ return 0;
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+
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+ return vc4_crtc_disable(crtc, encoder, NULL, channel);
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}
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static void vc4_crtc_atomic_disable(struct drm_crtc *crtc,
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@@ -508,6 +536,8 @@ static void vc4_crtc_atomic_disable(stru
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struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state,
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crtc);
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struct vc4_crtc_state *old_vc4_state = to_vc4_crtc_state(old_state);
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+ struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc, state,
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+ drm_atomic_get_old_connector_state);
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struct drm_device *dev = crtc->dev;
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require_hvs_enabled(dev);
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@@ -515,7 +545,7 @@ static void vc4_crtc_atomic_disable(stru
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/* Disable vblank irq handling before crtc is disabled. */
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drm_crtc_vblank_off(crtc);
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- vc4_crtc_disable(crtc, state, old_vc4_state->assigned_channel);
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+ vc4_crtc_disable(crtc, encoder, state, old_vc4_state->assigned_channel);
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/*
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* Make sure we issue a vblank event after disabling the CRTC if
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